
ANT 1
CALIBRATION
RF PORT
U72
5
RF ANTENNA
V_SYN
Q700 - 2
6
RX_ON_N
8
U75
4, 7
TX / RX Switch
V_RX
2
11
DIPLEXER
CONTROL
FUNCTION
5
GSMPA
TX_ON_N
VBAT
RAMP
(From Omega)
PC
(Enable)
6
U73
RF Switch
Control
4
925-960MHz
10
GSM_RX
DCS_RX
1
1805-1880MHz
3
DCSPA
DCSPA
GSMPA
PAC IC
U74
1
3
GSM_T/R
V_BR
DCS_T/R
(VCC)
U66
U67
EGSM RX
Low Channel - 975 = 925.2Mhz
Mid Channel - 37 = 942.4Mhz
High Channel - 124 = 959.8Mhz
EGSM TX
Low Channel - 975 = 880.2Mhz
Mid Channel - 37 = 897.4.4Mhz
High Channel - 124 = 914.8Mhz
BS1
U71
PA
12
10
16
CMOS
U86
4
TX_ON
Buffer
+
5
6
14
VBAT
8
Converter
+
GSM TX
(Both Low For RX)
DCS TX
VBAT
8
4
2
BS
(I-Sense Resistor)
TX_GSM
R702
R706 R703
2
1
V to I
Error
Amp
6
R705
(Limits O/P Pwr)
TX_DCS
7
GSM 1800 RX
Low Channel - 512 = 1805.2Mhz
Mid Channel - 700 = 1842.8Mhz
High Channel - 885 = 1879.8Mhz
GSM 1800 TX
Low Channel - 512 = 1710.2Mhz
Mid Channel - 700 = 1747.8Mhz
High Channel - 885 = 1784.8Mhz
5
APC
V_TX
1
10
R616
Attn
U65
TX VCO
8
RF VCO
GSM 900 - 3700.8 Mhz - 3839.2 Mhz
GSM 1800 - 3604.4 Mhz - 3753.6 Mhz
U64
RF BALUN
U63
RF VCO
2
4
3
4
1
1
2
4
5
3
BS1
BS2
V_RX
TX LOOP
FILTER
V_BR
47, 51, 46
4
5
90
1
o
2
Control Logic
9
1
10
90
o
2
1
2
49
50
Phase Det
44
Charge Pump
N
1
2
1
2
DCS
14
EGSM
o
90
1
2
Phase Det
17
Charge Pump
IQ MOD
U61
DUAL-BAND TRANCEIVER IC
13, 15, 23
RF
PSU
(SPI BUS)
N
IF SYNTH
360Mhz
1
DCS
1
EGSM
IF
PSU
2
2
Supports:
VCC for GSM 1800 LNA - 13
VCC for OPLL & Phase detector - 15
VCC for IQ Modulator - 23
VCC for BaseBand - 46
VCC for RF Local Buffer & Divider - 47
VCC for Direct Conversion Mixers - 51
25
26
27
28
41
35
30
DATA
38
CLK
39
40
1
37
V_SYN
Supports:
VCC for IFVCO & Divider
VCC for IF Synth & TCXO Divider (!3Mhz)
VCC for RF Synth & TCXO I/P Buffer (13Mhz)
4
U84
3
2
4
1
3
U85
2
19, 20
R624
21, 22
1
2
R632
3
4 5
13Mhz
8
7
6
VR3
TCXOEN
AFC
TXI
TXQ
RXQN
RXQP
RXIN
RXIP
Dual Band T191
U90
Dual Regulator
VBAT
TCXOEN
V_BR
TX_ON_N
Q700 - 1
V_TX
GSM SERVICE SUPPORT GROUP 01.11.13
LEVEL 3 RF Block Diagram Rev. 1.2
Dual Band Amethyst
Michael Hansen, Ray Collins, Ralf Lorenzen-Scheil Page 1 of 2
RX SIGNAL PATH
TX SIGNAL PATH
MAIN VCO SIGNAL PATH
TUNING VOLTAGES
REFERENCE CLOCK
Orderable Part
Non - Orderable Part

Dual Band T191
IO13ACCIN
VR3
To U84 / U90
From Omega
To RF Side
To / From Omega
From U61
To Omega
J3
Audio
Jack
TCXOEN
ON_OFF
RX_ON
TX_ON
DCS_T/R
GSM_T/R
BS2
PC
BS1
LE
Test Points 1 to 8
S_IO
S_RST
S_CLK
NRESET
13Mhz
13MOUT
VCLKRX
VDX
VDR
VFSRX
RST, CLK, DI, DO
Hercules / Omega Control SPI BUS
RTC BATTERY
U4A
From VBATBB
(RX Downlink)
RXDO
I03DATA_HP_SEL
U8
VR2B_SW
U10
TXDO
(TX Downlink)
X2
MIC
SPKR
VR1B
VR2B
AFC
To U85
RAMP
To U74
LS1
VR2
VR1
VR3
E11
D6
C6
E6
E9
ACT
B11
D11
B12
B13
H10
JTAG
J13
K14
SIM
J14
G3
G14
TIMER
H14
G11
VOICEBAND
H12
H13
Interface
H11
DAI
Digt. Aud. Int.
Radio
Int.
F12, F13, F14, G13
K3
VCC1
D2
VCC2
G3
VCC3
C1
D1
E1
H1
H10
F8
F9
H7
J8
U14
K8
H8
H9
J9
HWID
HERCULES U1
POWER
ARM 7
DSP
BDR / BDX / BFSX / BFSR
BACKUP
VR1B - 2.0V
VR2B - 2.0V
VR2 - 2.9V
VR1 - 1.8V
VR3 - 2.9V
SPI
AFC
APC
VOICE
UPLINK
VOICE
DOWNLINK
ADC
Analog/Digital
Converter
B5A5D6
E6
TR1
IIC
Inter IC
Cntl.
2M RAM
MEM
I/FACE
G5H5J5
BASEBAND SERIAL
K5
PORT
OMEGA U3
IBIC
BUS
CNTL
VRPC
Volt. Reg. and
Power up Ctnl.
F6
D7
B10
D10
TBAT
BATID
RTC
PWT
PWL
UART
GPIO
SPI
X1
E10
A11
C2
B1
D2
D3
F4
C4
K11
IO0VIBRATOR
J1
J3
M6
A7
NRAMCS
P7
NBLE
K8
NBHE
K7
RNW
N8
NFOE
L8
NROMCS1
P6
FDP
M9
DATA BUS
BASEBAND
UPLINK
BASEBAND
DOWNLINK
TSP
Battery
Charger. Int
USP
Micro Proc.
Ser. Port
SIM I/Face
3V / 5V
LEVEL
SHIFTERS
NRESET
RTCINT
ON_OFF
RTCINT
BU b
BL
TXDO
(To Headset Jack)
RXDO
SCL
SDA
NRSTOUT
IO1BATID_DET
IO3DATA_HP_SEL
IO13ACCIN
ADD BUS
ROW4
DATA
(To From U61)
CLK
C9
C10
D8
D9
E7
E8
E9
E10
ICTL
E3
E5
E4
H6
K7
G7
G6
B2
B3
C4
CLK
B4
RST
B5
D4
A2
VSIM
(To Hercules)
(To Power Switch - S19)
PWON
c
BQ3
e
B5
U6
A1
SRAM
B2
1Mbit
G5
A2
U6
B3
D8
U5
D7
FLASH
B4
MEMORY
32Mbit
U5
COL 0 - COL 4
ROW 0 - ROW 3
TXI
TXI
To U61
TXQ
TXQ
RXI
RXI
From U61
RXQ
RXQ
13MOUT
VCLKRX
VDX
VFSRX
VDR
S_IO
S_RST
S_CLK
1
SIM CONTACTS
3
I/O
2
4
U13
ALERT
b
VIBRATOR
DATA BUS
ADD BUS
VR2
VR2
VBAT
VCHG
To / From Hercules
To / From Hercules
U2
BQ4
M1
VBAT
e
c
BL
VBAT
U18
G1
BATTERY
CONNECTOR
JP1
PWON
U15
b
U7
C48
S1
D1
1
2
3
4
(To Hercules)
ROW4
IO1BATID_DET
J2
LCD Connector
N/C
N/C
1
2
3
4
5
6
7
8
9
10
KEYPAD MATRIX
VBATBB
S1
U17
D1
LCD
Backlights
Keypad
Backlights
F1
U17
G2
R62
S2
D2
D1
J1
POWER JACK
1
3 4
2
(Decides if unit is for
VR3
G1
R65
VBATBB
(To Omega)
HWID
(To Omega)
R77
EMEA or ASIA)
S1
U16
D1
Normal Charge
Trigger Charge (Phase 1 - Charging)
Trigger Charge (Phase 2 - Complete)
Over Voltage Mode
COL 0 - COL 4
ROW 0 - ROW 3
c
e
S2
U18
G2
D2
e
b
BQ2
c
(To Omega)
VCHG
G1
VLCD
C34
GND
GND
SCL
SDA
NRSTOUT
VR2
VR2
RX SIGNAL PATH
TX SIGNAL PATH
MAIN VCO SIGNAL PATH
TUNING VOLTAGES
REFERENCE CLOCK
Orderable Part
Non - Orderable Part
GSM SERVICE SUPPORT GROUP 01.11.13
S19
LEVEL 3 AL Block Diagram Rev. 1.2
Dual Band Amethyst
Michael Hansen, Ray Collins, Ralf Lorenzen-Scheil Page 2 of 2