MOTOROLA SN74LS123M, SN74LS123MEL, SN74LS123ML1, SN74LS123ML2, SN74LS123MR1 Datasheet
...
Semiconductor Components Industries, LLC, 1999
December, 1999 – Rev. 6
1 Publication Order Number:
SN74LS122/D
SN74LS122 SN74LS123
Retriggerable Monostable
Multivibrators
These dc triggered multivibrators feature pulse width control by
three methods. The basic pulse width is programmed by selection of
external resistance and capacitance values. The LS122 has an internal
timing resistor that allows the circuits to be used with only an external
capacitor. Once triggered, the basic pulse width may be extended by
retriggering the gated low-level-active (A) or high-level-active (B)
inputs, or be reduced by use of the overriding clear.
• Overriding Clear Terminates Output Pulse
• Compensated for V
CC
and Temperature Variations
• DC Triggered from Active-High or Active-Low Gated Logic Inputs
• Retriggerable for Very Long Output Pulses, up to 100% Duty Cycle
• Internal Timing Resistors on LS122
GUARANTEED OPERATING RANGES
Symbol Parameter Min Typ Max Unit
V
CC
Supply Voltage 4.75 5.0 5.25 V
T
A
Operating Ambient
T emperature Range
0 25 70 °C
I
OH
Output Current – High –0.4 mA
I
OL
Output Current – Low 8.0 mA
R
ext
External Timing Resistance 5.0 260
k
W
C
ext
External Capacitance No Restriction
R
ext/Cext
Wiring Capacitance at
R
ext/Cext
Terminal
50 pF
LOW POWER SCHOTTKY
Device Package Shipping
ORDERING INFORMATION
SN74LS123N 16 Pin DIP
SN74LS123D 16 Pin
SOIC
D SUFFIX
CASE 751A
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PLASTIC
N SUFFIX
CASE 646
14
1
14
1
SOIC
D SUFFIX
CASE 751B
PLASTIC
N SUFFIX
CASE 648
16
1
16
1
SN74LS122N 14 Pin DIP 2000 Units/Box
SN74LS122D 14 Pin
2500/Tape & Reel
2000 Units/Box
2500/Tape & Reel
SN74LS122 SN74LS123
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2
SN74LS122 (TOP VIEW)
(SEE NOTES 1 THRU 4)
SN74LS123 (TOP VIEW)
(SEE NOTES 1 THRU 4)
NOTES:
1. An external timing capacitor may be connected between C
ext
and R
ext/Cext
(positive).
2. T o use the internal timing resistor of the LS122, connect R
int
to VCC.
3. For improved pulse width accuracy connect an external resistor between R
ext/Cext
and VCC with R
int
open-circuited.
4. To obtain variable pulse widths, connect an external variable resistance between R
int/Cext
and VCC.
14 13 12 11 10 9
123456
8
7
V
CC
R
ext/
C
ext
NC C
ext
NC R
int
Q
A1 A2 B1 B2 CLR Q
GND
CLR
Q
Q
R
int
2
R
ext/
C
ext
1
C
ext
1R
ext/
C
ext
14 13 12 11 10 9
123456
7
16 15
8
V
CC
1A
1Q 2Q
2B
2
CLR
2A
1B 1
CLR
1Q 2Q 2
C
ext
GND
Q
Q
Q
Q
CLR
CLR
NC — NO INTERNAL CONNECTION.
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3
LS122 FUNCTIONAL TABLE
INPUTS OUTPUTS
CLEAR A1 A2 B1 B2 Q Q
L X X X X L H
X H HXXLH
X X XLXLH
X X XXLLH
H L X ↑ H
H L XH↑
H X L ↑ H
H X LH↑
H H ↓ HH
H ↓ ↓ HH
H ↓ HHH
↑ L XHH
↑ X L H H
LS123 FUNCTIONAL TABLE
INPUTS OUTPUTS
CLEAR A B Q Q
L X X L H
X H XLH
X X LLH
H L ↑
H ↓ H
↑ L H
TYPICAL APPLICATION DATA
The output pulse tW is a function of the external
components, C
ext
and R
ext
or C
ext
and R
int
on the LS122.
For values of C
ext
≥ 1000 pF, the output pulse at VCC = 5.0
V and VRC = 5.0 V (see Figures 1, 2, and 3) is given by
tW = K R
ext Cext
where K is nominally 0.45
If C
ext
is on pF and R
ext
is in kΩ then tW is in nanoseconds.
The C
ext
terminal of the LS122 and LS123 is an internal
connection to ground, however for the best system
performance C
ext
should be hard-wired to ground.
Care should be taken to keep R
ext
and C
ext
as close to the
monostable as possible with a minimum amount of
inductance between the R
ext/Cext
junction and the R
ext/Cext
pin. Good groundplane and adequate bypassing should be
designed into the system for optimum performance to ensure
that no false triggering occurs.
It should be noted that the C
ext
pin is internally connected
to ground on the LS122 and LS123, but not on the LS221.
Therefore, if C
ext
is hard-wired externally to ground,
substitution of a LS221 onto a LS123 socket will cause the
LS221 to become non-functional.
The switching diode is not needed for electrolytic
capacitance application and should not be used on the LS122
and LS123.
To find the value of K for C
ext
≥ 1000 pF , refer to Figure 4.
Variations on VCC or VRC can cause the value of K to
change, as can the temperature of the LS123, LS122.
Figures 5 and 6 show the behavior of the circuit shown in
Figures 1 and 2 if separate power supplies are used for V
CC
and VRC. If VCC is tied to VRC, Figure 7 shows how K will
vary with VCC and temperature. Remember, the changes in
R
ext
and C
ext
with temperature are not calculated and
included in the graph.
As long as C
ext
≥ 1000 pF and 5K ≤ R
ext
≤ 260K, the
change in K with respect to R
ext
is negligible.
If C
ext
≤ 1000 pF the graph shown on Figure 8 can be used
to determine the output pulse width. Figure 9 shows how K
will change for C
ext
≤ 1000 pF if VCC and VRC are connected
to the same power supply. The pulse width tW in
nanoseconds is approximated by
tW = 6 + 0.05 C
ext
(pF) + 0.45 R
ext
(kΩ) C
ext
+ 11.6 R
ext
In order to trim the output pulse width, it is necessary to
include a variable resistor between VCC and the R
ext/Cext
pin
or between VCC and the R
ext
pin of the LS122. Figure 10, 11,
and 12 show how this can be done. R
ext
remote should be
kept as close to the monostable as possible.
Retriggering of the part, as shown in Figure 3, must not
occur before C
ext
is discharged or the retrigger pulse will not
have any effect. The discharge time of C
ext
in nanoseconds
is guaranteed to be less than 0.22 C
ext
(pF) and is typically
0.05 C
ext
(pF).
For the smallest possible deviation in output pulse widths
from various devices, it is suggested that C
ext
be kept
≥ 1000 pF.
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4
WAVEFORMS
EXTENDING PULSE WIDTH
OVERRIDING THE OUTPUT PULSE
B INPUT
Q OUTPUT
B INPUT
CLEAR INPUT
CLEAR PULSE
Q OUTPUT
OUTPUT WITHOUT CLEAR PULSE
RETRIGGER
PULSE
(See Application Data)
OUTPUT WITHOUT RETRIGGER
t
W
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