3–676
Motorola Bipolar Power Transistor Device Data
!
The MJE13009 is designed for high–voltage, high–speed power switching inductive
circuits where fall time is critical. They are particularly suited for 115 and 220 V
switchmode applications such as Switching Regulators, Inverters, Motor Controls,
Solenoid/Relay drivers and Deflection circuits.
SPECIFICATION FEATURES:
• V
CEO(sus)
400 V and 300 V
• Reverse Bias SOA with Inductive Loads @ TC = 100_C
• Inductive Switching Matrix 3 to 12 Amp, 25 and 100_C
. . . tc @ 8 A, 100_C is 120 ns (Typ).
• 700 V Blocking Capability
• SOA and Switching Applications Information.
ОООООООО
ОООООООО
ОООООООО
Collector–Emitter Voltage
ОООООООО
ОООООООО
ОООООООО
Collector–Emitter Voltage
ОООООООО
ОООООООО
ОООООООО
ОООООООО
ОООООООО
ОООООООО
Collector Current — Continuous
— Peak (1)
ОООООООО
ОООООООО
ОООООООО
Base Current — Continuous
— Peak (1)
ОООООООО
ОООООООО
ОООООООО
ОООООООО
Emitter Current — Continuous
— Peak (1)
ОООООООО
ОООООООО
ОООООООО
ОООООООО
Total Power Dissipation @ TA = 25_C
Derate above 25_C
ОООООООО
ОООООООО
ОООООООО
Total Power Dissipation @ TC = 25_C
Derate above 25_C
ОООООООО
ОООООООО
ОООООООО
ОООООООО
Operating and Storage Junction Temperature Range
ОООООООО
ОООООООО
ОООООООО
ОООООООО
ОООООООО
ОООООООО
Thermal Resistance, Junction to Ambient
ОООООООО
ОООООООО
ОООООООО
Thermal Resistance, Junction to Case
ОООООООО
ОООООООО
ОООООООО
Maximum Lead Temperature for Soldering Purposes:
1/8″ from Case for 5 Seconds
ОООООООО
ОООООООО
ОООООООО
ОООООООО
_
C
(1) Pulse Test: Pulse Width = 5 ms, Duty Cycle v 10%.
Designer’s Data for “Worst Case” Conditions — The Designer’s Data Sheet permits the design of most circuits entirely from the information presented. SOA Limit
curves — representing boundaries on device characteristics — are given to facilitate “worst case” design.
Preferred devices are Motorola recommended choices for future use and best overall value.
Designer’s and SWITCHMODE are trademarks of Motorola, Inc.
SEMICONDUCTOR TECHNICAL DATA
Order this document
by MJE13009/D
12 AMPERE
NPN SILICON
POWER TRANSISTOR
400 VOLTS
100 WATTS
*Motorola Preferred Device
CASE 221A–06
TO–220AB
REV 2
MJE13009
3–677
Motorola Bipolar Power Transistor Device Data
ELECTRICAL CHARACTERISTICS (T
C
= 25_C unless otherwise noted)
Collector–Emitter Sustaining Voltage
(IC = 10 mA, IB = 0)
Collector Cutoff Current
(V
CEV
= Rated Value, V
BE(off)
= 1.5 Vdc)
(V
CEV
= Rated Value, V
BE(off)
= 1.5 Vdc, TC = 100_C)
Emitter Cutoff Current
(VEB = 9 Vdc, IC = 0)
DC Current Gain
(IC = 5 Adc, VCE = 5 Vdc)
(IC = 8 Adc, VCE = 5 Vdc)
Collector–Emitter Saturation Voltage
(IC = 5 Adc, IB = 1 Adc)
(IC = 8 Adc, IB = 1.6 Adc)
(IC = 12 Adc, IB = 3 Adc)
(IC = 8 Adc, IB = 1.6 Adc, TC = 100_C)
Base–Emitter Saturation Voltage
(IC = 5 Adc, IB = 1 Adc)
(IC = 8 Adc, IB = 1.6 Adc)
(IC = 8 Adc, IB = 1.6 Adc, TC = 100_C)
Current–Gain — Bandwidth Product
(IC = 500 mAdc, VCE = 10 Vdc, f = 1 MHz)
Output Capacitance
(VCB = 10 Vdc, IE = 0, f = 0.1 MHz)
SWITCHING CHARACTERISTICS
IB1 = IB2 = 1.6 A, tp = 25 µs,
Duty Cycle v 1%)
Inductive Load, Clamped (Table 1, Figure 13)
C
= 8 A, V
clamp
= 300 Vdc,
(IC = 8 A, V
clamp
= 300 Vdc,
IB1 = 1.6 A, V
BE(off)
= 5 Vdc, TC = 100_C)
µs
*Pulse Test: Pulse Width = 300 µs, Duty Cycle = 2%.
Second Breakdown Collector Current with base forward biased
Clamped Inductive SOA with Base Reverse Biased
(VCC = 125 Vdc, IC = 8 A,
(I
I
S/b
See Figure 1
See Figure 2
MJE13009
3–678
Motorola Bipolar Power Transistor Device Data
I
C
, COLLECTOR CURRENT (AMP)
10µs
100µs
1 ms
dc
100
7
VCE, COLLECTOR–EMITTER VOLTAGE (VOLTS)
0.02
10
20
10
50
0.5
0.1
0.05
30 50 70 100
Figure 1. Forward Bias Safe Operating Area
Figure 2. Reverse Bias Switching Safe
Operating Area
0.2
0.01
300 5005 20
14
0
800
2
100 300
TC ≤ 100°C
IB1 = 2.5 A
500 700
V
BE(off)
= 9 V
0
6
V
CEV
, COLLECTOR–EMITTER CLAMP VOLTAGE (VOLTS)
10
200 400 600
5 V
2
1
5
TC = 25°C
12
8
4
3 V
1.5 V
I
C
, COLLECTOR (AMP)
200
THERMAL LIMIT
BONDING WIRE LIMIT
SECOND BREAKDOWN LIMIT
CURVES APPLY BELOW RATED V
CEO
The Safe Operating Area figures shown in Figures 1 and 2 are specified ratings for these devices under the test conditions shown.
Figure 3. Forward Bias Power Derating
TC, CASE TEMPERATURE (°C)
0
40 120 160
0.6
POWER DERATING FACTOR
SECOND BREAKDOWN
DERATING
1
0.8
0.4
0.2
60 100 14080
THERMAL
DERATING
20
There are two limitations on the power handling ability of a
transistor: average junction temperature and second breakdown. Safe operating area curves indicate IC – VCE limits of
the transistor that must be observed for reliable operation;
i.e., the transistor must not be subjected to greater dissipation than the curves indicate.
The data of Figure 1 is based on TC = 25_C; T
J(pk)
is
variable depending on power level. Second breakdown pulse
limits are valid for duty cycles to 10% but must be derated
when TC ≥ 25_C. Second breakdown limitations do not derate the same as thermal limitations. Allowable current at the
voltages shown on Figure 1 may be found at any case temperature by using the appropriate curve on Figure 3.
T
J(pk)
may be calculated from the data in Figure 4. At high
case temperatures, thermal limitations will reduce the power
that can be handled to values less than the limitations imposed by second breakdown. Use of reverse biased safe operating area data (Figure 2) is discussed in the applications
information section.
t, TIME (ms)
1
0.01
0.01
0.7
0.2
0.1
0.05
0.02
r(t), TRANSIENT THERMAL RESISTANCE (NORMALIZED)
0.05 1 2 5 10 20 50 100 200 500
Z
θ
JC(t)
= r(t) R
θ
JC
R
θ
JC
= 1.25
°
C/W MAX
D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
READ TIME AT t
1
T
J(pk)
– TC = P
(pk)
Z
θ
JC(t)
P
(pk)
t
1
t
2
DUTY CYCLE, D = t1/t
2
D = 0.5
0.02
SINGLE PULSE
0.1
0.1 0.50.2 1.0 k
0.5
0.3
0.07
0.03
0.02
Figure 4. Typical Thermal Response [Z
θJC
(t)]
0.01
0.05
0.2