Motorola MC74HC14AN, MC74HC14ADT, MC54HC14AJ Datasheet
SEMICONDUCTOR TECHNICAL DATA
1
REV 7
Motorola, Inc. 1995
10/95
High–Performance Silicon–Gate CMOS
The MC54/74HC14A is identical in pinout to the LS14, LS04 and the
HC04. The device inputs are compatible with Standard CMOS outputs;
with pullup resistors, they are compatible with LSTTL outputs.
The HC14A is useful to “square up” slow input rise and fall times. Due
to hysteresis voltage of the Schmitt trigger, the HC14A finds applications
in noisy environments.
• Output Drive Capability: 10 LSTTL Loads
• Outputs Directly Interface to CMOS, NMOS and TTL
• Operating Voltage Range: 2 to 6V
• Low Input Current: 1µA
• High Noise Immunity Characteristic of CMOS Devices
• In Compliance With the JEDEC Standard No. 7A Requirements
• Chip Complexity: 60 FETs or 15 Equivalent Gates
LOGIC DIAGRAM
Y1A1
A2
A3
A4
A5
A6
Y2
Y3
Y4
Y5
Y6
1
3
5
9
11
13
2
4
6
8
10
12
Y = A
Pin 14 = V
CC
Pin 7 = GND
Pinout: 14–Lead Packages (Top View)
1314 12 11 10 9 8
21 3 4 5 6 7
V
CC
A6 Y6 A5 Y5 A4 Y4
A1 Y1 A2 Y2 A3 Y3 GND
L
H
FUNCTION TABLE
Inputs Outputs
A
H
L
Y
D SUFFIX
SOIC PACKAGE
CASE 751A–03
N SUFFIX
PLASTIC PACKAGE
CASE 646–06
ORDERING INFORMATION
MC54HCXXAJ
MC74HCXXAN
MC74HCXXAD
MC74HCXXADT
Ceramic
Plastic
SOIC
TSSOP
1
14
1
14
1
14
DT SUFFIX
TSSOP PACKAGE
CASE 948G–01
J SUFFIX
CERAMIC PACKAGE
CASE 632–08
1
14
MC54/74HC14A
MOTOROLA High–Speed CMOS Logic Data
DL129 — Rev 6
2
MAXIMUM RATINGS*
Symbol
Parameter
Value
Unit
V
CC
DC Supply Voltage (Referenced to GND)
– 0.5 to + 7.0
V
V
in
DC Input Voltage (Referenced to GND)
– 0.5 to VCC + 0.5
V
V
out
DC Output Voltage (Referenced to GND)
– 0.5 to VCC + 0.5
V
I
in
DC Input Current, per Pin
± 20
mA
I
out
DC Output Current, per Pin
± 25
mA
I
CC
DC Supply Current, VCC and GND Pins
± 50
mA
P
D
Power Dissipation in Still Air,Plastic or Ceramic DIP†
SOIC Package†
TSSOP Package†
750
500
450
mW
T
stg
Storage Temperature Range
– 65 to + 150
_
C
T
L
Lead Temperature, 1 mm from Case for 10 Seconds
Plastic DIP, SOIC or TSSOP Package
Ceramic DIP
260
300
_
C
*Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
†Derating — Plastic DIP: – 10 mW/_C from 65_ to 125_C
Ceramic DIP: – 10 mW/_C from 100_ to 125_C
SOIC Package: – 7 mW/_C from 65_ to 125_C
TSSOP Package: – 6.1 mW/_C from 65_ to 125_C
For high frequency or heavy load considerations, see Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
Max
Unit
V
CC
DC Supply Voltage (Referenced to GND)
2.0
6.0
V
Vin, V
out
DC Input Voltage, Output Voltage (Referenced to
GND)
0
V
CC
V
T
A
Operating Temperature Range, All Package Types
– 55
+ 125
_
C
tr, t
f
Input Rise/Fall Time VCC = 2.0 V
(Figure 1) VCC = 4.5 V
VCC = 6.0 V
0
0
0
No Limit*
No Limit*
No Limit*
ns
*When Vin = 50% VCC, ICC > 1mA
This device contains protection
circuitry to guard against damage
due to high static voltages or electric
fields. However, precautions must
be taken to avoid applications of any
voltage higher than maximum rated
voltages to this high–impedance circuit. For proper operation, Vin and
V
out
should be constrained to the
range GND v (Vin or V
out
) v VCC.
Unused inputs must always be
tied to an appropriate logic voltage
level (e.g., either GND or VCC).
Unused outputs must be left open.
MC54/74HC14A
High–Speed CMOS Logic Data
DL129 — Rev 6
3 MOTOROLA
DC CHARACTERISTICS (Voltages Referenced to GND)
Guaranteed Limit
Symbol Parameter Condition
V
CC
V
–55 to 25°C ≤85°C ≤125°C Unit
VT+ max Maximum Positive–Going Input
Threshold Voltage
(Figure 3)
V
out
= 0.1V
|I
out
| ≤ 20µA
2.0
3.0
4.5
6.0
1.50
2.15
3.15
4.20
1.50
2.15
3.15
4.20
1.50
2.15
3.15
4.20
V
VT+ min Minimum Positive–Going Input
Threshold Voltage
(Figure 3)
V
out
= 0.1V
|I
out
| ≤ 20µA
2.0
3.0
4.5
6.0
1.0
1.5
2.3
3.0
0.95
1.45
2.25
2.95
0.95
1.45
2.25
2.95
V
VT– max Maximum Negative–Going Input
Threshold Voltage
(Figure 3)
V
out
= VCC – 0.1V
|I
out
| ≤ 20µA
2.0
3.0
4.5
6.0
0.9
1.4
2.0
2.6
0.95
1.45
2.05
2.65
0.95
1.45
2.05
2.65
V
VT– min Minimum Negative–Going Input
Threshold Voltage
(Figure 3)
V
out
= VCC – 0.1V
|I
out
| ≤ 20µA
2.0
3.0
4.5
6.0
0.3
0.5
0.9
1.2
0.3
0.5
0.9
1.2
0.3
0.5
0.9
1.2
V
VHmax
Note 2
Maximum Hysteresis Voltage
(Figure 3)
V
out
= 0.1V or VCC – 0.1V
|I
out
| ≤ 20µA
2.0
3.0
4.5
6.0
1.20
1.65
2.25
3.00
1.20
1.65
2.25
3.00
1.20
1.65
2.25
3.00
V
VHmin
Note 2
Minimum Hysteresis Voltage
(Figure 3)
V
out
= 0.1V or VCC – 0.1V
|I
out
| ≤ 20µA
2.0
3.0
4.5
6.0
0.20
0.25
0.40
0.50
0.20
0.25
0.40
0.50
0.20
0.25
0.40
0.50
V
V
OH
Minimum High–Level Output
Voltage
Vin ≤ VT– min
|I
out
| ≤ 20µA
2.0
4.5
6.0
1.9
4.4
5.9
1.9
4.4
5.9
1.9
4.4
5.9
V
Vin ≤ VT– min |I
out
| ≤ 2.4mA
|I
out
| ≤ 4.0mA
|I
out
| ≤ 5.2mA
3.0
4.5
6.0
2.48
3.98
5.48
2.34
3.84
5.34
2.20
3.70
5.20
V
OL
Maximum Low–Level Output
Voltage
Vin ≥ VT+ max
|I
out
| ≤ 20µA
2.0
4.5
6.0
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
V
Vin ≥ VT+ max |I
out
| ≤ 2.4mA
|I
out
| ≤ 4.0mA
|I
out
| ≤ 5.2mA
3.0
4.5
6.0
0.26
0.26
0.26
0.33
0.33
0.33
0.40
0.40
0.40
I
in
Maximum Input Leakage Current Vin = VCC or GND 6.0 ±0.1 ±1.0 ±1.0 µA
I
CC
Maximum Quiescent Supply
Current (per Package)
Vin = VCC or GND
I
out
= 0µA
6.0 1.0 10 40 µA
1. Information on typical parametric values along with frequency or heavy load considerations can be found in Chapter 2 of the Motorola High–
Speed CMOS Data Book (DL129/D).
2. VHmin > (VT+ min) – (VT– max); VHmax = (VT+ max) – (VT– min).
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