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MOTOROLA CMOS LOGIC DATA
297
MC14490
The MC14490 is constructed with complementary MOS enhancement
mode devices, and is used for the elimination of extraneous level changes
that result when interfacing with mechanical contacts. The digital contact
bounce eliminator circuit takes an input signal from a bouncing contact and
generates a clean digital signal four clock periods after the i nput has
stabilized. The bounce eliminator circuit will remove bounce on both the
“make” and the “break” of a contact closure. The clock for operation of the
MC14490 is derived from an internal R–C oscillator which requires only an
external capacitor to adjust for the desired operating frequency (bounce
delay). The clock may also be driven from an external clock source or the
oscillator of another MC14490 (see Figure 5).
NOTE: Immediately after power–up, the outputs of the MC14490 are in
indeterminate states.
• Diode Protection on All Inputs
• Six Debouncers Per Package
• Internal Pullups on All Data Inputs
• Can Be Used as a Digital Integrator, System Synchronizer, or Delay
Line
• Internal Oscillator (R–C), or External Clock Source
• TTL Compatible Data Inputs/Outputs
• Single Line Input, Debounces Both “Make” and “Break” Contacts
• Does Not Require “Form C” (Single Pole Double Throw) Input Signal
• Cascadable for Longer Time Delays
• Schmitt Trigger on Clock Input (Pin 7)
• Supply Voltage Range = 3.0 V to 18 V
• Chip Complexity: 546 FETs or 136.5 Equivalent Gates
BLOCK DIAGRAM
Ain1
OSCin7
OSC
out
9
Bin14
Cin3
Din12
Ein5
Fin10
+V
DD
φ
1
φ
2
OSCILLATOR
AND
TWO–PHASE
CLOCK GENERATOR
DATA
SHIFT LOAD
4–BIT STATIC SHIFT REGISTER
1/2–BIT
DELAY
φ1φ
2
φ1φ
2
15 A
out
VDD = PIN 16
VSS = PIN 8
φ1φ
2
φ1φ
2
φ1φ
2
φ1φ
2
φ1φ
2
2 B
out
13 C
out
4 D
out
11 E
out
6 F
out
IDENTICAL TO ABOVE STAGE
IDENTICAL TO ABOVE STAGE
IDENTICAL TO ABOVE STAGE
IDENTICAL TO ABOVE STAGE
IDENTICAL TO ABOVE STAGE
SEMICONDUCTOR TECHNICAL DATA
Motorola, Inc. 1995
REV 3
1/94
L SUFFIX
CERAMIC
CASE 620
P SUFFIX
PLASTIC
CASE 648
DW SUFFIX
SOIC
CASE 751G
ORDERING INFORMATION
MC14490P Plastic
MC14490L Ceramic
MC14490DW SOIC
TA = – 55° to 125°C for all packages.
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MOTOROLA CMOS LOGIC DATAMC14490
298
MAXIMUM RATINGS* (Voltages Referenced to V
SS
)
Input or Output Voltage (DC or Transient)
Input Current (DC or Transient), per Pin
Power Dissipation, per Package†
Lead Temperature (8–Second Soldering)
_
C
*Maximum Ratings are those values beyond which damage to the device may occur.
†Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 MW/_C From 65_C To 125_C
Ceramic “L” Packages: – 12 mW/_C From 100_C to 125_C
ELECTRICAL CHARACTERISTICS (Voltages Referenced to V
SS
)
“1” Level
Vin = 0 or V
DD
“0” Level
(VO = 4.5 or 0.5 Vdc)
(VO = 9.0 or 1.0 Vdc)
(VO = 13.5 or 1.5 Vdc)
“1 Level”
(VO = 1.0 or 9.0 Vdc)
(VO = 1.5 or 13.5 Vdc)
Output Drive Current
Oscillator Output Source
(VOH = 2.5 V)
(VOH = 4.6 V)
(VOH = 9.5 V)
(VOH = 13.5 V)
– 0.6
– 0.12
– 0.23
– 1.4
– 0.4
– 0.08
– 0.16
– 1.0
Debounce Outputs
(VOH = 2.5 V)
(VOH = 4.6 V)
(VOH = 9.5 V)
(VOH = 13.5 V)
– 0.75
– 0.16
– 0.5
– 1.5
Oscillator Output Sink
(VOL = 0.4 V)
(VOL = 0.5 V)
(VOL = 1.5 V)
Debounce Outputs
(VOL = 0.4 V)
(VOL = 0.5 V)
(VOL = 1.5 V)
Input Current
Debounce Inputs (Vin = VDD)
Input Current Oscillator — Pin 7
(Vin = VSS or VDD)
Pullup Resistor Source Current
Debounce Inputs
(Vin = VSS)
Quiescent Current
(Vin = VSS or VDD, I
out
= 0 µA)
µAdc
#Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.
PIN ASSIGNMENT
13
14
15
16
9
10
11
125
4
3
2
1
8
7
6
D
in
C
out
B
in
V
DD
OSC
out
F
in
E
out
D
out
C
in
B
out
A
in
V
SS
OSC
in
F
out
E
in
A
out
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MOTOROLA CMOS LOGIC DATA
299
MC14490
SWITCHING CHARACTERISTICS (C
L
= 50 pF, TA = 25_C)
Output Rise Time
All Outputs
Output Fall Time Oscillator Output
Propagation Delay Time
Oscillator Input to Debounce Outputs
Clock Frequency (50% Duly Cycle)
(External Clock)
Setup Time (See Figure 1)
Maximum External Clock Input
Rise and Fall Time
Oscillator Input
ОООООООООО
ОООООООООО
ОООООООООО
ОООООООООО
Oscillator Frequency
OSC
out
C
ext
≥ 100 pF*
Note: These equations are intended to be a design guide.
Laboratory experimentation may be required. Formulas
are typically ± 15% of actual frequencies.
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ОООООООООО
ОООООООООО
ОООООООООО
ОООООООООО
ОООООООООО
ОООООООООО
ОООООООООО
Hz
*The formulas given are for the typical characteristics only at 25_C.
#Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.
*POWER–DOWN CONSIDERATIONS
Large values of C
ext
may cause problems when powering down the MC14490 because of the amount of energy stored in the
capacitor. When a system containing this device is powered down, the capacitor may discharge through the input protection
diodes at Pin 7 or the parasitic diodes at Pin 9. Current through these internal diodes must be limited to 10 mA, therefore the
turn–off time of the power supply must not be faster than t = (VDD – VSS) C
ext
/(10 mA). For example, If VDD – VSS = 15 V and
C
ext
= 1 µF, the power supply must turn off no faster than t = (15 V) (1 µF)/10 mA = 1.5 ms. This is usually not a problem
because power supplies are heavily filtered and cannot discharge at this rate.
When a more rapid decrease of the power supply to zero volts occurs, the MC14490 may sustain damage. T o avoid this possi-
bility, use external clamping diodes, D1 and D2, connected as shown in Figure 2.
Figure 1. Switching Waveforms Figure 2. Discharge Protection During Power Down
OSC
in
A
out
A
out
OSC
in
A
in
V
DD
0 V
V
DD
0 V
V
DD
0 V
50%
90%
50%
10%
t
r
t
f
t
PHL
90%
10%
50%
50%
t
su
50%
D1 D2C
ext
9
7
OSC
in
OSC
out
MC14490
t
PLH
V
DD
V
DD
4.5
C
ext
(in µF)
6.5
C
ext
(in µF)