Motorola MC143456RDK, MC143455RDK Datasheet


SEMICONDUCTOR TECHNICAL DATA
1
REV 7
Motorola, Inc. 1997
2/97
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High–Performance Silicon–Gate CMOS
The MC74HCT157A is identical in pinout to the LS157. This device may be used as a level converter for interfacing TTL or NMOS outputs to High Speed CMOS inputs.
This device routes 2 nibbles (A or B) to a single port (Y) as determined by the Select input. The data is presented at the outputs in noninverted form. A high level on the Output Enable input sets all four Y outputs to a low level.
The HCT157A is similar in function to the HC257 which has 3–state outputs.
Output Drive Capability: 10 LSTTL Loads
TTL NMOS Compatible Input Levels
Outputs Directly Interface to CMOS, NMOS and TTL
Operating Voltage Range: 4.5 to 5.5 V
Low Input Current: 1.0 µA
In Compliance with the Requirements Defined by JEDEC Standard
No. 7A
Chip Complexity: 102 FETs or 25.5 Equivalent Gates
LOGIC DIAGRAM
2
5 11 14
3
6 10 13
4 7 9
12
1
15
A0 A1
A2 A3
B0 B1 B2 B3
Y0 Y1 Y2 Y3
SELECT
OUTPUT ENABLE
DATA OUTPUTS
NIBBLE
A INPUTS
NIBBLE
B INPUTS
PIN 16 = V
CC
PIN 8 = GND
ОООООООООО
Î
Design Criteria
ÎÎÎ
Î
Value
ÎÎÎ
ÎÎ
Î
Unit
ОООООООООО
Î
Internal Gate Count*
ÎÎÎ
Î
25.5
ÎÎÎ
ÎÎ
Î
ea
Internal Gate Propagation Delay
1.5
ÎÎÎ
ns
Internal Gate Power Dissipation
0.005
ÎÎÎ
µW
Speed Power Product
0.0075
ÎÎÎ
pJ
*Equivalent to a two input NAND gate.

FUNCTION TABLE
PIN ASSIGNMENT
Inputs
Output Outputs Enable Select Y0 – Y3
X = don’t care A0 – A3, B0 – B3 = the levels of the respective Data–Word Inputs.
13
14
15
16
9
10
11
125
4
3
2
1
8
7
6
SELECT
Y0
B0
A0
Y1
B1
A1
GND
Y3
B3
A3
OUTPUT ENABLE
V
CC
B2
A2
Y2
H L L
X L H
L A0–A3 B0–B3
D SUFFIX
SOIC PACKAGE
CASE 751B–05
N SUFFIX
PLASTIC PACKAGE
CASE 648–08
1
16
1
16
ORDERING INFORMATION
MC74HCTXXXAN MC74HCTXXXAD
Plastic SOIC
MC74HCT157A
MOTOROLA High–Speed CMOS Logic Data
DL129 — Rev 6
2
MAXIMUM RATINGS*
Symbol
Parameter
Value
Unit
V
CC
DC Supply Voltage (Referenced to GND)
– 0.5 to + 7.0
V
V
in
DC Input Voltage (Referenced to GND)
– 0.5 to VCC + 0.5
V
V
out
DC Output Voltage (Referenced to GND)
– 0.5 to VCC + 0.5
V
I
in
DC Input Current, per Pin
± 20
mA
I
out
DC Output Current, per Pin
± 25
mA
I
CC
DC Supply Current, VCC and GND Pins
± 50
mA
Î
Î
P
D
ОООООООООООО
Î
Power Dissipation in Still Air Plastic DIP†
SOIC Package†
ÎÎÎÎ
Î
750 500
Î
Î
mW
T
stg
Storage Temperature
– 65 to + 150
_
C
Î
Î
T
L
ОООООООООООО
Î
Lead Temperature, 1 mm from Case for 10 Seconds
(Plastic DIP or SOIC Package)
ÎÎÎÎ
Î
260
Î
Î
_
C
*Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
†Derating — Plastic DIP: – 10 mW/_C from 65_ to 125_C
SOIC Package: – 7 mW/_C from 65_ to 125_C
For high frequency or heavy load considerations, see Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).
RECOMMENDED OPERATING CONDITIONS
ÎÎ
Î
Symbol
ОООООООООООО
Î
Parameter
Î
Î
Min
Î
Î
Max
Î
Î
Unit
ÎÎ
Î
V
CC
ОООООООООООО
Î
DC Supply Voltage (Referenced to GND)
Î
Î
4.5
Î
Î
5.5
Î
Î
V
ÎÎ
Î
Vin, V
out
ОООООООООООО
Î
DC Input Voltage, Output Voltage (Referenced to GND)
Î
Î
0
Î
Î
V
CC
Î
Î
V
T
A
Operating Temperature, All Package Types
– 55
+ 125
_
C
tr, t
f
Input Rise and Fall Time (Figure 1)
0
500
ns
DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)
Guaranteed Limit
Symbol
Parameter
Test Conditions
V
CC
V
– 55 to
25_C
v
85_Cv 125_C
Unit
ÎÎ
Î
V
IH
ООООООО
Î
Minimum High–Level Input Voltage
ООООООО
Î
V
out
= 0.1 V or VCC – 0.1 V
|I
out
| v 20 µA
ÎÎ
Î
4.5
5.5
ÎÎ
2.0
2.0
ÎÎ
Î
2.0
2.0
ÎÎ
Î
2.0
2.0
Î
Î
V
ÎÎ
Î
V
IL
ООООООО
Î
Maximum Low–Level Input Voltage
ООООООО
Î
V
out
0.1 V or VCC – 0.1 V
|I
out
| v 20 mA
ÎÎ
Î
4.5
5.5
ÎÎ
0.8
0.8
ÎÎ
Î
0.8
0.8
ÎÎ
Î
0.8
0.8
Î
Î
V
ÎÎ
V
OH
ООООООО
Minimum High–Level Output Voltage
ООООООО
Vin = VIH or V
IL
|I
out
| v 20 mA
ÎÎ
4.5
5.5
ÎÎ
4 4
5.4
ÎÎ
4.4
5.4
ÎÎ
4.4
5.4
Î
V
ÎÎÎОООООООÎООООООО
Î
Vin = VIH or V
IL
|I
out
| v 4.0 mA
ÎÎ
Î
4.5
ÎÎ
3.98
ÎÎ
Î
3.84
ÎÎ
Î
3.7
Î
Î
ÎÎ
Î
V
OL
ООООООО
Î
Maximum Low–Level Output Voltage
ООООООО
Î
Vin = VIH or V
IL
|I
out
| v 20 µA
ÎÎ
Î
4.5
5.5
ÎÎ
0.1
0.1
ÎÎ
Î
0.1
0.1
ÎÎ
Î
0.1
0.1
Î
Î
V
ÎÎÎОООООООÎООООООО
Î
Vin = VIH or V
IL
|I
out
| v 4.0 mA
ÎÎ
Î
4.5
ÎÎ
0.26
ÎÎ
Î
0.33
ÎÎ
Î
0.4
Î
Î
ÎÎ
Î
I
in
ООООООО
Î
Maximum Input Leakage Current
ООООООО
Î
Vin = VCC or GND
ÎÎ
Î
5.5
ÎÎ
± 0.1
ÎÎ
Î
± 1.0
ÎÎ
Î
± 1.0
Î
Î
µA
ÎÎ
Î
I
CC
ООООООО
Î
Maximum Quiescent Supply Current (per Package)
ООООООО
Î
Vin = VCC or GND I
out
= 0 µA
ÎÎ
Î
5.5
ÎÎ
4.0
ÎÎ
Î
40
ÎÎ
Î
160
Î
Î
µA
I
CC
Additional Quiescent Supply
Vin = 2.4 V, Any One Input
=
– 55_C
25_C to 125_C
Current
V
i
n
=
V
CC
or
GND, Other Inputs
l
out
= 0 µA
5.5
2.9
2.4
mA
NOTE:Information on typical parametric values can be found in Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).
This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high–impedance cir­cuit. For proper operation, Vin and V
out
should be constrained to the
range GND v (Vin or V
out
) v VCC.
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused outputs must be left open.
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