MOTOROLA MC14060BDTR2, MC14060BF, MC14060BFEL, MC14060BFR2, MC14060BDR2 Datasheet

...

 Semiconductor Components Industries, LLC, 2000

March, 2000 – Rev. 3

1 Publication Order Number:

MC14060B/D

MC14060B

14-Bit Binary Counter and Oscillator

The MC14060B is a 14–stage binary ripple counter with an on–chip oscillator buffer. The oscillator configuration allows design of either RC or crystal oscillator circuits. Also included on the chip is a reset function which places all outputs into the zero state and disables the oscillator. A negative transition on Clock will advance the counter to the next state. Schmitt trigger action on the input line permits very slow input rise and fall times. Applications include time delay circuits, counter controls, and frequency dividing circuits.

• Fully static operation

• Diode Protection on All Inputs

• Supply Voltage Range = 3.0 V to 18 V

• Capable of Driving Two Low–power TTL Loads or One Low–power

Schottky TTL Load Over the Rated Temperature Range

• Buffered Outputs Available from Stages 4 Through 10 and

12 Through 14

• Common Reset Line

• Pin–for–Pin Replacement for CD4060B

MAXIMUM RATINGS (Voltages Referenced to V

) (Note 2.)

Symbol

Parameter Value Unit

DC Supply Voltage Range –0.5 to +18.0 V

Vin, V

out

Input or Output Voltage Range

(DC or Transient)

–0.5 to VDD + 0.5 V

Iin, I

out

Input or Output Current

(DC or Transient) per Pin

±10 mA

Power Dissipation,

per Package (Note 3.)

500 mW

Ambient Temperature Range –55 to +125 °C

stg

Storage Temperature Range –65 to +150 °C

Lead Temperature

(8–Second Soldering)

260 °C

2. Maximum Ratings are those values beyond which damage to the device

may occur.

3. Temperature Derating:

Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C T o 125_C

This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high–impedance circuit. For proper operation, V

and V

out

should be constrained

to the range V

v (Vin or V

out

) v VDD.

Unused inputs must always be tied to an appropriate logic voltage level (e.g., either V

or VDD). Unused outputs must be left open.

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A = Assembly Location WL or L = Wafer Lot YY or Y = Year WW or W = Work Week

Device Package Shipping

ORDERING INFORMATION

MC14060BCP PDIP–16 2000/Box MC14060BD SOIC–16 2400/Box MC14060BDR2 SOIC–16 2500/Tape & Reel

1. For ordering information on the EIAJ version of the SOIC packages, please contact your local ON Semiconductor representative.

MARKING

DIAGRAMS

PDIP–16

P SUFFIX

CASE 648

MC14060BCP

AWLYYWW

SOIC–16

D SUFFIX

CASE 751B

14060B

AWLYWW

SOEIAJ–16

F SUFFIX

CASE 966

MC14060B

AWLYWW

MC14060BDT TSSOP–16 96/Rail MC14060BDTR2 TSSOP–16 2500/Tape & Reel MC14060BF SOEIAJ–16 See Note 1. MC14060BFEL SOEIAJ–16 See Note 1.

TSSOP–16 DT SUFFIX

CASE 948F

060B

ALYW

MC14060B

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PIN ASSIGNMENT

125

RESET

Q10

OUT 2

OUT 1

CLOCK

Q13

Q12

Q14

TRUTH TABLE

Clock Reset Output State

L No Change L Advance to next state

X H All Outputs are low

X = Don’t Care

LOGIC DIAGRAM

OUT 2 OUT 1

CLOCK

RESET

Q4 Q5 Q12 Q13 Q14

57123

Q6 = PIN 4 Q7 = PIN 6

Q8 = PIN 14 Q9 = PIN 13

Q10 = PIN 15 VDD = PIN 16

= PIN 8

MC14060B

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ELECTRICAL CHARACTERISTICS (Voltages Referenced to V

)

– 55_C

25_C

125_C

Characteristic

Symbol

Vdc

Min

Max

Min

Typ

(4.)

Max

Min

Max

Unit

ОООООООО

Output Voltage “0” Level

= VDD or 0

ÎÎ

5.0 10 15

— — —

ÎÎ

0.05

— — —

ÎÎ

0 0 0

0.05

— — —

0.05

ОООООООО

Vin = 0 or V

“1” Level

ÎÎ

5.0 10 15

4.95

9.95

14.95

ÎÎ

— — —

4.95

9.95

14.95

ÎÎ

5.0 10 15

— — —

4.95

9.95

14.95

— — —

ОООООООО

Input Voltage “0” Level

= 4.5 or 0.5 V)

= 9.0 or 1.0 V)

= 13.5 or 1.5 V)

ÎÎ

5.0 10 15

— — —

ÎÎ

1.5

3.0

4.0

— — —

ÎÎ

2.25

4.50

6.75

1.5

3.0

4.0

— — —

1.5

3.0

4.0

ОООООООО

(VO = 0.5 or 4.5 V) “1” Level (V

= 1.0 or 9.0 V)

= 1.5 or 13.5 V)

ÎÎ

5.0 10 15

3.5

7.0

11.0

ÎÎ

— — —

3.5

7.0

11.0

ÎÎ

2.75

5.50

8.25

— — —

3.5

7.0

11.0

— — —

ОООООООО

Input Voltage “0” Level

= 4.5 Vdc) (For Input 11

= 9.0 Vdc) and Output 10)

= 13.5 Vdc)

ÎÎ

5.0 10 15

— — —

ÎÎ

1.0

2.0

2.5

— — —

ÎÎ

2.25

4.50

6.75

1.0

2.0

2.5

— — —

1.0

2.0

2.5

Vdc

ОООООООО

(VO = 0.5 Vdc) “1” Level (V

= 1.0 Vdc)

= 1.5 Vdc)

ÎÎ

5.0 10 15

4.0

8.0

12.5

ÎÎ

— — —

4.0

8.0

12.5

ÎÎ

2.75

5.50

8.25

— — —

4.0

8.0

12.5

— — —

Vdc

ОООООООО

Output Drive Current

= 2.5 V) (Except Source

= 4.6 V) Pins 9 and 10)

= 9.5 V)

= 13.5 V)

ÎÎ

5.0

5.0 10 15

– 3.0

– 0.64

– 1.6 – 4.2

ÎÎ

— — — —

– 2.4

– 0.51

– 1.3 – 3.4

ÎÎ

– 4.2 – 0.88 – 2.25

– 8.8

— — — —

– 1.7

– 0.36

– 0.9 – 2.4

— — — —

ОООООООО

(VOL = 0.4 V) Sink (V

= 0.5 V)

= 1.5 V)

ÎÎ

5.0 10 15

0.64

1.6

4.2

ÎÎ

— — —

0.51

1.3

3.4

ÎÎ

0.88

2.25

8.8

— — —

0.36

0.9

2.4

— — —

Input Current

—

± 0.1

—

±0.00001

± 0.1

—

± 1.0

µA

Input Capacitance (Vin = 0)

—

5.0

7.5

—

ОООООООО

Quiescent Current

(Per Package)

ÎÎ

5.0 10 15

— — —

ÎÎ

5.0 10 20

— — —

ÎÎ

0.005

0.010

0.015

5.0 10 20

— — —

150 300 600

µA

ОООООООО

Total Supply Current

(5.) (6.)

(Dynamic plus Quiescent, Per Package) (C

= 50 pF on all outputs,

all buffers switching)

ÎÎ

5.0 10 15

ООООООООООООООО

IT = (0.25 µA/kHz) f + I

IT = (0.54 µA/kHz) f + I

IT = (0.85 µA/kHz) f + I

µA

4. Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.

5. The formulas given are for the typical characteristics only at 25_C.

6. To calculate total supply current at loads other than 50 pF: I

T(CL

) = IT(50 pF) + (CL – 50) Vfk

where: I

is in µA (per package), CL in pF, V = (VDD – VSS) in volts, f in kHz is input frequency, and k = 0.002.

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