MOTOROLA MC14049UBFEL, MC14049UBFL1, MC14049UBFL2, MC14049UBFR1, MC14049UBDR2 Datasheet

...

 Semiconductor Components Industries, LLC, 2000

March, 2000 – Rev. 3

1 Publication Order Number:

MC14049UB/D

MC14049UB

Hex Buffers

The MC14049UB hex inverter/buffer is constructed with MOS P–channel and N–channel enhancement mode devices in a single monolithic structure. This complementary MOS device finds primary use where low power dissipation and/or high noise immunity is desired. This device provides logic–level conversion using only one supply voltage, V

. The input–signal high level (VIH) can exceed the VDD supply voltage for logic–level conversions. Two TTL/DTL Loads can be driven when the device is used as CMOS–to–TTL/DTL converters (VDD = 5.0 V, VOL v 0.4 V, IOL ≥ 3.2 mA). Note that pins 13 and 16 are not connected internally on this device; consequently connections to these terminals will not affect circuit operation.

• High Source and Sink Currents

• High–to–Low Level Converter

• Supply Voltage Range = 3.0 V to 18 V

• Meets JEDEC UB Specifications

• V

can exceed V

• Improved ESD Protection on All Inputs

MAXIMUM RATINGS (Voltages Referenced to V

) (Note 2.)

Symbol

Parameter Value Unit

DC Supply Voltage Range –0.5 to +18.0 V

Input Voltage Range

(DC or Transient)

–0.5 to +18.0 V

out

Output Voltage Range

(DC or Transient)

–0.5 to VDD +0.5 V

Input Current

(DC or Transient) per Pin

±10 mA

out

Output Current

(DC or Transient) per Pin

+45 mA

Power Dissipation,

per Package (Note 3.) Plastic SOIC

825 740

Ambient Temperature Range –55 to +125 °C

stg

Storage Temperature Range –65 to +150 °C

Lead Temperature

(8–Second Soldering)

260 °C

2. Maximum Ratings are those values beyond which damage to the device

may occur.

3. Temperature Derating:

All Packages: See Figure 4.

This device contains circuitry to protect the inputs against damage due to high

static voltages or electric fields referenced to the V

pin, only. Extra precautions must be taken to avoid applications of any voltage higher than the maximum rated voltages to this high–impedance circuit. For proper operation, the ranges V

v 18 V and VSS v V

out

v VDD are recommended.

Unused inputs must always be tied to an appropriate logic voltage level (e.g.,

either V

or VDD). Unused outputs must be left open.

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A = Assembly Location WL or L = Wafer Lot YY or Y = Year WW or W = Work Week

Device Package Shipping

ORDERING INFORMATION

MC14049UBCP PDIP–16 2000/Box MC14049UBD SOIC–16 2400/Box MC14049UBDR2 SOIC–16 2500/Tape & Reel

1. For ordering information on the EIAJ version of the SOIC packages, please contact your local ON Semiconductor representative.

MARKING

DIAGRAMS

PDIP–16

P SUFFIX

CASE 648

MC14049UBCP

AWLYYWW

SOIC–16

D SUFFIX

CASE 751B

14049U

AWLYWW

SOEIAJ–16

F SUFFIX

CASE 966

MC14049U

AWLYWW

MC14049UBDT TSSOP–16 96/Rail MC14049UBDTR2 TSSOP–16 2500/Tape & Reel MC14049UBF SOEIAJ–16 See Note 1. MC14049UBFEL SOEIAJ–16 See Note 1.

TSSOP–16 DT SUFFIX

CASE 948F

049U

ALYW

MC14049UB

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PIN ASSIGNMENT

125

OUT

NC = NO CONNECTION

LOGIC DIAGRAM

MC14049UB

14 15

NC = PIN 13, 16 V

= PIN 8

= PIN 1

CIRCUIT SCHEMATIC

(1/6 OF CIRCUIT SHOWN)

MC14049UB

ELECTRICAL CHARACTERISTICS (Voltages Referenced to V

)

– 55_C

25_C

125_C

Characteristic

Symbol

Vdc

Min

Max

Min

Typ

(4.)

Max

Min

Max

Unit

ОООООООО

Output Voltage “0” Level

= VDD or 0

ÎÎ

5.0 10 15

— — —

0.05

ÎÎ

— — —

0 0 0

ÎÎ

0.05

— — —

0.05

Vdc

ОООООООО

“1” Level

= 0 or V

ÎÎ

5.0 10 15

4.95

9.95

14.95

— — —

ÎÎ

4.95

9.95

14.95

5.0 10 15

ÎÎ

— — —

4.95

9.95

14.95

— — —

Vdc

ОООООООО

Input Voltage “0” Level

= 4.5 Vdc)

= 9.0 Vdc)

= 13.5 Vdc)

ÎÎ

5.0 10 15

— — —

1.0

2.0

2.5

ÎÎ

— — —

2.25

4.50

6.75

ÎÎ

1.0

2.0

2.5

— — —

1.0

2.0

2.5

Vdc

ОООООООО

“1” Level

= 0.5 Vdc)

= 1.0 Vdc)

= 1.5 Vdc)

ÎÎ

5.0 10 15

4.0

8.0

12.5

— — —

ÎÎ

4.0

8.0

12.5

2.75

5.50

8.25

ÎÎ

— — —

4.0

8.0

12.5

— — —

Vdc

ОООООООО

Output Drive Current

= 2.5 Vdc) Source

= 9.5 Vdc)

= 13.5 Vdc)

ÎÎ

5.0 10 15

– 1.6 – 1.6 – 4.7

— — —

ÎÎ

– 1.25

– 1.3

– 3.75

– 2.5 – 2.6

– 10

ÎÎ

— — —

– 1.0 – 1.0 – 3.0

— — —

mAdc

ОООООООО

(VOL = 0.4 Vdc) Sink (V

= 0.5 Vdc)

= 1.5 Vdc)

ÎÎ

5.0 10 15

3.75 10 30

— — —

ÎÎ

3.2

8.0 24

6.0 16 40

ÎÎ

— — —

2.6

6.6 19

— — —

mAdc

Input Current

—

± 0.1

—

±0.00001

± 0.1

—

± 1.0

µAdc

Input Capacitance (Vin = 0)

—

ОООООООО

Quiescent Current

(Per Package)

ÎÎ

5.0 10 15

— — —

1.0

2.0

4.0

ÎÎ

— — —

0.002

0.004

0.006

ÎÎ

1.0

2.0

4.0

— — —

30 60

120

µAdc

ОООООООО

Total Supply Current

(5.) (6.)

(Dynamic plus Quiescent, Per Package) (C

= 50 pF on all outputs, all

buffers switching)

ÎÎ

5.0 10 15

ООООООООООООООО

IT = (1.8 µA/kHz) f + I

IT = (3.5 µA/kHz) f + I

IT = (5.3 µA/kHz) f + I

µAdc

4. Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.

5. The formulas given are for the typical characteristics only at 25_C.

6. To calculate total supply current at loads other than 50 pF: I

T(CL

) = IT(50 pF) + (CL – 50) Vfk

where: I

is in µA (per package), CL in pF, V = (VDD – VSS) in volts, f in kHz is input frequency, and k = 0.002.

MC14049UB

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SWITCHING CHARACTERISTICS

(7.)

= 50 pF, T

= 25_C)

ООООООООООООО

Characteristic

ÎÎÎ

Symbol

ÎÎ

Vdc

ÎÎ

Min

ÎÎ

Typ

(8.)

ÎÎ

Max

Unit

ООООООООООООО

Output Rise Time

TLH

= (0.8 ns/pF) CL + 60 ns

TLH

= (0.3 ns/pF) CL + 35 ns

TLH

= (0.27 ns/pF) CL + 26.5 ns

ÎÎÎ

TLH

ÎÎ

5.0 10 15

ÎÎ

— — —

ÎÎ

100

50 40

ÎÎ

160 100

ООООООООООООО

Output Fall Time

THL

= (0.3 ns/pF) CL + 25 ns

THL

= (0.12 ns/pF) CL + 14 ns

THL

= (0.1 ns/pF) CL + 10 ns

ÎÎÎ

THL

ÎÎ

5.0 10 15

ÎÎ

— — —

ÎÎ

40 20 15

ÎÎ

60 40 30

ООООООООООООО

Propagation Delay Time

PLH

= (0.38 ns/pF) CL + 61 ns

PLH

= (0.20 ns/pF) CL + 30 ns

PLH

= (0.11 ns/pF) CL + 24.5 ns

ÎÎÎ

PLH

ÎÎ

5.0 10 15

ÎÎ

— — —

ÎÎ

80 40 30

ÎÎ

120

65 50

ООООООООООООО

Propagation Delay Time

PHL

= (0.38 ns/pF) CL + 11 ns

PHL

= (0.12 ns/PF) CL + 9 ns

PHL

= (0.11 ns/pF) CL + 4.5 ns

ÎÎÎ

PHL

ÎÎ

5.0 10 15

ÎÎ

— — —

ÎÎ

30 15 10

ÎÎ

60 30 20

7. The formulas given are for the typical characteristics only at 25_C.

8. Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.

Figure 1. Typical Voltage Transfer Characteristics versus Temperature

out

, OUTPUT VOLTAGE (Vdc)

1815105

, INPUT VOLTAGE (Vdc)

VDD = 5 Vdc

VDD = 15 Vdc

–55°C

+125°C

VDD = 10 Vdc

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