Motorola MC10H186P, MC10H186FNR2, MC10H186FN, MC10H186L Datasheet

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SEMICONDUCTOR TECHNICAL DATA

   
 

The MC10H186 is a hex D type flip–flop with common reset and clock lines.
This MECL 10H part is a functional/pinout duplication of the standard MECL
10K family part, with 100
propagation delay and no increase in power–supply current.

• Propagation Delay, 1.7 ns Typical

• Power Dissipation, 460 mW Typical

• Improved Noise Margin 150 mV (Over Operating Voltage and

Temperature Range)

• Voltage Compensated

• MECL 10K–Compatible

MAXIMUM RATINGS

Characteristic Symbol Rating Unit

Power Supply (VCC = 0) V
Input Voltage (VCC = 0) V
Output Current — Continuous

Operating T emperature Range T
Storage T emperature Range — Plastic

— Surge

ELECTRICAL CHARACTERISTICS (VEE = –5.2 V ±5%) (See Note)

Characteristic Symbol Min Max Min Max Min Max Unit

Power Supply Current I
Input Current High

Pins 5,6,7,10,11,12
Pin 9

Pin 1
Input Current Low I
High Output Voltage V
Low Output Voltage V
High Input Voltage V
Low Input Voltage V

AC PARAMETERS

Propagation Delay t
Set–up Time t
Hold Time t
Rise Time t
Fall Time t
T oggle Frequency f
Reset Recovery Time

(t

)

1–9+

NOTE:

Each MECL 10H series circuit has been designed to meet the dc specifications shown in the test table,
after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed
circuit board and transverse air flow greater than 500 linear fpm is maintained. Outputs are terminated
through a 50–ohm resistor to –2.0 volts.

% improvement in clock toggle frequency and

–8.0 to 0 Vdc
0 to V

EE

50

100

0 to +75 °C

–55 to +150
–55 to +165

265
420
765

—
—
—

— Ceramic

E

I

inH

inL

OH
OL

IH

IL

pd

set

hold

r
f

tog
t

rr

EE

I

I

out

A

T

stg

0° 25° 75°

— 121 — 110 — 121 mA

—

430

—

670

—

1250

0.5 — 0.5 — 0.3 — µA
–1.02 –0.84 –0.98 –0.81 –0.92 –0.735 Vdc
–1.95 –1.63 –1.95 –1.63 –1.95 –1.60 Vdc
–1.17 –0.84 –1.13 –0.81 –1.07 –0.735 Vdc
–1.95 –1.48 –1.95 –1.48 –1.95 –1.45 Vdc

0.7 3.0 0.7 3.0 0.7 3.0 ns

1.5 — 1.5 — 1.5 — ns

1.0 — 1.0 — 1.0 — ns

0.7 2.6 0.7 2.6 0.7 2.6 ns

0.7 2.6 0.7 2.6 0.7 2.6 ns

250 — 250 — 250 — MHz

3.0 — 3.0 — 3.0 — ns

—
—
—

Vdc

mA

°C
°C

265
420
765

µA



L SUFFIX

CERAMIC PACKAGE

CASE 620–10

P SUFFIX

PLASTIC PACKAGE

CASE 648–08

FN SUFFIX

PLCC

CASE 775–02

CLOCKED TRUTH TABLE

R

C

L

L

L

H *

L

H *

H

L

* A clock H is a clock transition from

a low to a high state.

PIN ASSIGNMENT

RESET

Q0
Q1
Q2
D0
D1
D2

V

EE

Pin assignment is for Dual–in–Line Package.

For PLCC pin assignment, see the Pin Conversion

T ables on page 6–11 of the Motorola MECL Data

Book (DL122/D).

D

Qn+1

X

L
H
X

Qn

L

H

L

DIP

1
2
3
4
5
6
7

16
15
14
13
12
11
10

8

V

CC

Q5
Q4
Q3
D5
D4
D3
CLOCK

9

3/93

 Motorola, Inc. 1996

2–280

REV 5

APPLICATION INFORMATION

MC10H186

The MC10H186 contains six high–speed, master slave
type “D” flip–flops. Data is entered into the master when
the clock is low. Master–to–slave data transfer takes
place on the positive–going Clock transition. Thus
outputs may change only on a positive–going Clock

LOGIC DIAGRAM

5

D0

6D1

7D2

transition. A change in the information present at the data
(D) input will not affect the output information any other
time due to the master–slave construction of this device.
A common Reset is included in this circuit. THE RESET

ONLY FUNCTIONS WHEN THE CLOCK IS LOW.

2

Q0

3 Q1

4 Q2

CLOCK

RESET 1

D5
9

10D3

11D4

12

VCC= PIN 16
VEE= PIN 8

13 Q3

14 Q4

15 Q5

DL122 — Rev 6

2–281 MOTOROLAMECL Data