SEMICONDUCTOR TECHNICAL DATA
The MC10H159 is a quad 2–input multiplexer with enable. This MECL 10H
part is a functional/pinout duplication of the standard MECL 10K family part,
with 100% improvement in propagation delay and no increase in power–supply
current.
• Propagation Delay, 1.5 ns Typical
• Power Dissipation, 218 mW Typical
• Improved Noise Margin 150 mV (Over Operating Voltage and
Temperature Range)
• Voltage Compensated
• MECL 10K–Compatible
MAXIMUM RATINGS
Characteristic Symbol Rating Unit
Power Supply (VCC = 0) V
Input Voltage (VCC = 0) V
Output Current— Continuous
— Surge
Operating Temperature Range T
Storage Temperature Range— Plastic
— Ceramic
T
I
EE
I
out
A
stg
ELECTRICAL CHARACTERISTICS (VEE = –5.2 V ±5%) (See Note)
0° 25° 75°
Characteristic Symbol Min Max Min Max Min Max Unit
Power Supply Current I
Input Current High
Pin 9
Pins 3–7 and 10–13
Input Current Low I
High Output Voltage V
Low Output Voltage V
High Input Voltage V
Low Input Voltage V
I
E
inH
inL
OH
OL
IH
— 58 — 53 — 58 mA
——475
515——
0.5 — 0.5 — 0.3 — µA
–1.02 –0.84 –0.98 –0.81 –0.92 –0.735 Vdc
–1.95 –1.63 –1.95 –1.63 –1.95 –1.60 Vdc
–1.17 –0.84 –1.13 –0.81 –1.07 –0.735 Vdc
–1.95 –1.48 –1.95 –1.48 –1.95 –1.45 Vdc
IL
AC PARAMETERS
Propagation Delay
Data
Select
Enable
Rise Time t
Fall Time t
NOTE:
Each MECL 10H series circuit has been designed to meet the dc specifications shown in the test table,
after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit
board and transverse air flow greater than 500 Iinear fpm is maintained. Outputs are terminated through
a 50–ohm resistor to –2.0 volts.
t
pd
0.5
2.2
3.2
3.2
0.5
1.0
1.0
1.0
1.0
0.5 2.2 0.5 2.2 0.5 2.2 ns
r
0.5 2.2 0.5 2.2 0.5 2.2 ns
f
–8.0 to 0 Vdc
0 to V
EE
50
100
0 to +75 °C
–55 to +150
–55 to +165
295
320——
2.2
0.5
3.2
1.0
3.2
1.0
Vdc
mA
°C
°C
295
320
2.2
3.2
3.2
µA
ns
L SUFFIX
CERAMIC PACKAGE
CASE 620–10
P SUFFIX
PLASTIC PACKAGE
CASE 648–08
FN SUFFIX
PLCC
CASE 775–02
TRUTH TABLE
Select D0 D1 QEnable
LL LHX
LL HLX
LH XHL
LH XLH
HX XLX
DIP
PIN ASSIGNMENT
Q0
Q1
D11
D10
D01
D00
ENABLE
V
EE
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion
T ables on page 6–11 of the Motorola MECL Data
1
2
3
4
5
6
7
8
Book (DL122/D).
16
15
14
13
12
11
10
V
CC
Q2
Q3
D20
D21
D30
D31
SELECT
9
3/93
Motorola, Inc. 1996
2–242
REV 5
APPLICATION INFORMATION
MC10H159
The MC10H159 is a quad two channel multiplexer with
enable. It incorporates common enable and common
data select inputs. The select input determines which
data inputs are enabled. A high (H) level enables data
LOGIC DIAGRAM
SELECT 9
D0 1 5
D0 0 6
D1 1 3
D1 0 4
ENABLE 7
inputs D0 0, D1 0, D2 0, and D3 0. A low (L) level enables
data inputs D0 1, D1 1, D2 1, and D3 1. Any change on
the data inputs will be reflected at the outputs while the
enable is low. Input levels are inverted at the output.
1 Q0
2 Q1
D2 1 12
D2 0 13
D3 1 10
D3 0 11
15 Q2
14 Q3
VCC PIN 16
VEE PIN 8
DL122 — Rev 6
2–243 MOTOROLAMECL Data