Motorola MC10H141FN, MC10H141L, MC10H141P Datasheet
SEMICONDUCTOR TECHNICAL DATA
The MC10H141 is a four–bit universal shift register. This device is a
functional/pinout duplication of the standard MECL 10K part with 100%
improvement in propagation delay and operation frequency and no increase in
power supply current.
• Shift frequency , 250 MHz Min
• Power Dissipation, 425 mW Typical
• Improved Noise Margin 150 mV (over operating voltage and
temperature range)
• Voltage Compensated
• MECL 10K–Compatible
MAXIMUM RATINGS
Characteristic Symbol Rating Unit
Power Supply (VCC = 0) V
Input Voltage (VCC = 0) V
Output Current— Continuous
— Surge
Operating Temperature Range T
Storage Temperature Range— Plastic
— Ceramic
T
I
EE
I
out
A
stg
ELECTRICAL CHARACTERISTICS (VEE = –5.2 V ±5%)
0° 25° 75°
Characteristic Symbol Min Max Min Max Min Max Unit
Power Supply Current I
Input Current High
Pins 5,6,9,11,12,13
Pins 7,10
Pin 4
Input Current Low I
High Output Voltage V
Low Output Voltage V
High Input Voltage V
Low Input Voltage V
I
E
inH
inL
OH
OL
IH
— 112 — 102 — 112 mA
—
405
—
416
—
510
—
—
—
0.5 — 0.5 — 0.3 — µA
–1.02 –0.84 –0.98 –0.81 –0.92 –0.735 Vdc
–1.95 –1.63 –1.95 –1.63 –1.95 –1.60 Vdc
–1.17 –0.84 –1.13 –0.81 –1.07 –0.735 Vdc
–1.95 –1.48 –1.95 –1.48 –1.95 –1.45 Vdc
IL
AC PARAMETERS
Propagation Delay t
Hold Time —
Data, Select
Set–up Time
Data
t
hold
t
set
pd
Select
Rise Time t
Fall Time t
Shift Frequency f
NOTE:
Each MECL 10H series circuit has been designed to meet the dc specifications shown in the test table,
after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit
board and transverse air flow greater than 500 Iinear fpm is maintained. Outputs are terminated through
a 50 ohm resistor to –2.0 volts.
shift
1.0 2.0 1.0 2.0 1.1 2.1 ns
1.0 — 1.0 — 1.0 — ns
1.5
3.0——
0.5 2.4 0.5 2.4 0.5 2.4 ns
r
0.5 2.4 0.5 2.4 0.5 2.4 ns
f
1.5
3.0——
250 — 250 — 250 — MHz
–8.0 to 0 Vdc
0 to V
EE
50
100
0 to +75 °C
–55 to +150
–55 to +165
255
260
320
—
—
—
1.5
3.0
Vdc
mA
°C
°C
255
260
320
—
—
µA
ns
L SUFFIX
CERAMIC PACKAGE
CASE 620–10
P SUFFIX
PLASTIC PACKAGE
CASE 648–08
FN SUFFIX
PLCC
CASE 775–02
TRUTH TABLE
SELECT
OPERATING
S1
S2 Q1n + 1Q2n + 1Q3n +
Parallel Entry
L
L
L
H Shift Right* Q1nQ2nQ3nDR
H L Shift Left* DL Q0nQ1nQ2
HQ2
H
Stop Shift Q0
* Outputs as exist after pulse appears at “C” input with
input conditions as shown (Pulse Positive transition of
clock input).
MODE
Q0n +
D0 D1 D2 D3
DIP
PIN ASSIGNMENT
V
CC1
Q2
Q3
DR
D3
S2
V
EE
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion
T ables on page 6–11 of the Motorola MECL Data
C
1
2
3
4
5
6
7
8
Book (DL122/D).
OUTPUTS
CC2
1
n
32
n
1
Q1
n
16
15
14
13
12
11
10
n
n
V
Q1
Q0
DL
D0
D1
S1
D2
9
9/96
Motorola, Inc. 1996
2–131
REV 6
MC10H141
LOGIC DIAGRAM
S1
S2
1 OF 4
DECODER
DR
C
D3
PARALLEL ENTER
SHIFT RIGHT
SHIFT LEFT
HOLD
D2 D1 D0
DQ
C
Q3
V
S
V
DQ
C
Q2 Q1 Q0
CC1 = PIN 1
CC2 = PIN 16
EE = PIN 8
DQ
C
DL
DQ
C
APPLICATION INFORMATION
The MC10H141 is a four–bit universal shift
register which performs shift left, or shift right,
serial/parallel in, and serial/parallel out operations
with no external gating. Inputs S1 and S2 control the
four possible operations of the register without
external gating of the clock. The flip–flops shift
MOTOROLA MECL Data
2–132
information on the positive edge of the clock. The
four operations are stop shift, shift left, shift right, and
parallel entry of data. The other six inputs are all data
type inputs; four for parallel entry data, and one for
shifting in from the left (DL) and one for shifting in
from the right (DR).
DL122 — Rev 6
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