SEMICONDUCTOR TECHNICAL DATA
The MC10159 is a quad two channel multiplexer with enable. It incorporates
common enable and common data select inputs. The select input determines
which data inputs are enabled. A high (H) level enables data inputs D00, D10,
D20, and D30. A low (L) level enables data inputs D01, D1 1, D21, and D31. Any
change on the data inputs will be reflected at the outputs while the enable is low.
Input levels are inverted at the output.
PD= 218 mW typ/pkg (No Load)
tpd= 2.5 ns typ (Data to Q)
3.2 ns typ (Select to Q)
tr, tf= 2.5 ns typ (20%–80%)
LOGIC DIAGRAM
SELECT
9
L SUFFIX
CERAMIC PACKAGE
CASE 620–10
P SUFFIX
PLASTIC PACKAGE
CASE 648–08
FN SUFFIX
PLCC
CASE 775–02
D01 5
D00 6
D11 3
D10 4
ENABLE
7
D21 12
D20 13
D31 10
D30 11
TRUTH TABLE
Enable Select D0 D1 Q
L L X L H
L L X H L
L H L X H
L H H X L
H X X X L
1 Q0
2 Q1
15 Q2
14 Q3
VCC= PIN 16
VEE= PIN 8
DIP
PIN ASSIGNMENT
Q0
Q1
D11
D10
D01
D00
ENABLE
V
EE
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion
T ables on page 6–11 of the Motorola MECL Data
1
2
3
4
5
6
7
8
Book (DL122/D).
16
15
14
13
12
11
10
V
CC
Q2
Q3
D20
D21
D30
D31
SELECT
9
3/93
Motorola, Inc. 1996
3–65
REV 5
MC10159
ELECTRICAL CHARACTERISTICS
Test Limits
Pin
Characteristic Symbol
Power Supply Drain Current I
Input Current I
Output Voltage Logic 1 V
Output Voltage Logic 0 V
Threshold Voltage Logic 1 V
Threshold Voltage Logic 0 V
Switching Times (50Ω Load) ns
Propagation Data Input
Delay Select Input
Enable Input
Rise Time (20 to 80%) t
Fall Time (20 to 80%) t
inH
I
inL
OH
OL
OHA
OLA
t
5+1–
t
9+1–
t
7+1–
1+
1–
E
Under
Test
8 58 42 53 58 mAdc
9
5
5 0.5 0.5 0.3 µAdc
1 –1.060 –0.890 –0.960 –0.810 –0.890 –0.700 Vdc
1 –1.890 –1.675 –1.850 –1.650 –1.825 –1.615 Vdc
1 –1.080 –0.980 –0.910 Vdc
1 –1.655 –1.630 –1.595 Vdc
1
1
1
1 1.0 3.7 1.1 2.5 3.5 1.0 3.7
1 1.0 3.7 1.1 2.5 3.5 1.0 3.7
–30°C +25°C +85°C
Min Max Min Typ Max Min Max
1.1
1.5
1.4
360
400
3.8
5.3
5.3
1.2
1.5
1.5
2.5
3.2
2.5
225
250
3.3
5.0
5.0
1.1
1.5
1.4
225
250
3.8
5.3
5.3
Unit
µAdc
ELECTRICAL CHARACTERISTICS (continued)
TEST VOLTAGE VALUES (Volts)
@ Test Temperature V
–30°C –0.890 –1.890 –1.205 –1.500 –5.2
+25°C –0.810 –1.850 –1.105 –1.475 –5.2
+85°C –0.700 –1.825 –1.035 –1.440 –5.2
Pin
Characteristic Symbol
Power Supply Drain Current I
Input Current I
Output Voltage Logic 1 V
Output Voltage Logic 0 V
Threshold Voltage Logic 1 V
Threshold Voltage Logic 0 V
Switching Times (50Ω Load) +1.11V +0.31V Pulse In Pulse Out –3.2 V +2.0 V
Propagation Delay Data Input
Select Input
Enable Input
Rise Time (20 to 80%) t
Fall Time (20 to 80%) t
Each MECL 10,000 series circuit has been designed to meet the dc specifications shown in the test table, after thermal equilibrium has been
established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 linear fpm is maintained.
Outputs are terminated through a 50–ohm resistor to –2.0 volts. Test procedures are shown for only one gate. The other gates are tested in the
same manner.
inH
I
inL
OH
OL
OHA
OLA
t
5+1–
t
9+1–
t
7+1–
1+
1–
E
er
Test
8 8 16
9
5
5 5 8 16
1 8 16
1 5 8 16
1 9 6 8 16
1 9 6 8 16
1
1
1
1 9 5 1 8 16
1 9 5 1 8 16
IHmax
TEST VOLTAGE APPLIED TO PINS LISTED BELOW
V
IHmax
9
5
6
3, 12
V
ILmin
V
ILmin
V
IHAminVILAmax
V
IHAminVILAmax
5
9
7
1
1
1
V
EE
V
EE
8
8
8
8
Gnd
16
16
16
16
MOTOROLA MECL Data
3–66
DL122 — Rev 6