Motorola MC10136P, MC10136FN Datasheet


SEMICONDUCTOR TECHNICAL DATA
  
Three control lines (S1, S2, and Carry In the counter. Lines S1 and S2 determine one of four operations; preset (program), increment (count up), decrement (count down), or hold (stop count). Note that in the preset mode a clock pulse is necessary to load the counter, and the information present on the data inputs (D0, D1, D2, and D3) will be entered into the counter. Carry Out
goes low on the terminal count, or when the counter
is being preset.
This device is not designed for use with gated clocks. Control is via S1 and S2.
PD= 625 mW typ/pkg (No Load)
f
= 150 MHz typ
count
tpd= 3.3 ns typ (C-Q)
7.0 ns typ (C-C
5.0 ns typ (C
FUNCTION TABLE
CinS1 S2 Operating Mode
X L L Preset (Program)
L L H Increment (Count Up)
H L H Hold Count
L H L Decrement (Count Down) H H L Hold Count X H H Hold (Stop Count)
) determine the operation mode of
)
out
-C
)
out
in

L SUFFIX
CERAMIC PACKAGE
CASE 620–10
P SUFFIX
PLASTIC PACKAGE
CASE 648–08
FN SUFFIX
PLCC
CASE 775–02
DIP
PIN ASSIGNMENT
V
CC1
Q2 Q3
C
out D3
D2
S2
V
EE
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion
T ables on page 6–11 of the Motorola MECL Data
1 2 3 4 5 6 7 8
Book (DL122/D).
16 15 14 13 12 11 10
V
CC2
Q1 Q0 CLOCK D0 D1 C
in
S1
9
3/93
Motorola, Inc. 1996
3–27
REV 5
MC10136
S1 9
S2 7
Carry In
10
Clock
13
Q0
T
Q0
T T
C
LOGIC DIAGRAM
Q1T Q1
T
C
V
= PIN 1
CC1
V
= PIN 16
CC2
Q2T
T
Q2
T
C
T
T
Q3
T T
Q3
T
T
C
VEE= PIN 8
12 D0 14 Q0 11 D1 15 Q1 6 D2 2 Q2 5 D3 3 Q3 4 Carry Out
NOTE: Flip-flops will toggle when all T inputs are low.
INPUTS OUTPUTS
S1 S2 D0 D1 D2 D3
L L L L H H X H L L H H L L H X X X X L H H L H H H L H X X X X L H L H H H H L H X X X X L H H H H H L
L H X X X X H L H H H H H L H X X X X H H H H H H H
H H X X X X X H H H H H H
L L H H L L X H H H L L L
H L X X X X L H L H L L H H L X X X X L H H L L L H H L X X X X L H L L L L L H L X X X X L H H H H H H
* Truth table shows logic states assuming inputs vary in sequence shown from top to bottom.
** A clock H is defined as a clock input transition from a low to a high logic level.
SEQUENTIAL TRUTH TABLE*
CarryInClock
**
Q0 Q1 Q2 Q3
Carry
Out
MOTOROLA MECL Data
3–28
DL122 — Rev 6
MC10136
Under
ELECTRICAL CHARACTERISTICS
Test Limits
Pin
Characteristic Symbol
Power Supply Drain Current I Input Current I
Output Voltage Logic 1 V Output Voltage Logic 0 V Threshold Voltage Logic 1 V Threshold Voltage Logic 0 V Switching Times (50 Load) ns Propagation Delay Clock Input t
Carry In to Carry Out t
Setup Time Data Inputs t
Select Inputs t
Carry In Input t
Hold Time Data Inputs t
Select Inputs t
Carry In Input t
Counting Frequency f
Rise Time (20 to 80%) t
Fall Time (20 to 80%) t
1. Individually test each input; apply V
2. Measure output after clock pulse
3. Before test set all Q outputs to a logic high.
4. To preserve reliable performance, the MC10136 (plastic packaged device only) is to be operated in ambient temperatures above 70°C only when 500lfpm blown air or equivalent heat sinking is provided.
E
inH
I
inL
OH
OL
OHA
OLA
13+14+
t
13+14– t
13+4+
t
13+4– 10–4–
t
10+4+
12+13+
t
12–13+
9+13+
t
7+13+
10–13+
t
10+13+ 13+12+
t
13+12–
13+9+
t
13+7+
13+10–
t
13+10+
countup
f
countdown
4+
t
14+
4–
t
14–
ILmin
V
IL
Under
Test
8 138 100 125 138 mAdc
5,6,1 1,12
7
9,10
13
All 0.5 0.5 0.3 µAdc 14 (2.) –1.060 –0.890 –0.960 –0.810 –0.890 –0.700 Vdc 14 (2.) –1.890 –1.675 –1.850 –1.650 –1.825 –1.615 Vdc 14 (2.) –1.080 –0.980 –0.910 Vdc 14 (2.) –1.655 –1.630 –1.595 Vdc
14
14
4 4
4 (3.)
4
14
14
14
14
14
14
14
14
14
14
14
14
14
14
4
14
4
14
to pin under test.
V
IH
appears at clock input (Pin 13).
–30°C +25°C +85°C
Min Max Min Typ Max Min Max
0.8
0.8
2.0
2.0
1.6
1.6
3.5
3.5
6.0
6.0
2.5
1.5 0
0
–1.0 –1.0
0 0
125 125
0.9
0.9
0.9
0.9
350 425 390 460
4.8
4.8
10.9
10.9
7.4
7.4
3.3
3.3
3.3
3.3
1.0
1.0
2.5
2.5
1.6
1.6
3.5
3.5
6.0
6.0
2.5
1.5 0
0
–1.0 –1.0
0 0
125 125
1.1
1.1
1.1
1.1
3.3
3.3
7.0
7.0
5.0
5.0
150 150
2.0
2.0
2.0
2.0
220 265 245 290
4.5
4.5
10.5
10.5
6.9
6.9
3.3
3.3
3.3
3.3
1.4
1.4
2.4
2.4
1.9
1.9
3.5
3.5
6.0
6.0
3.0
1.5 0
0
–1.0 –1.0
0 0
125 125
1.1
1.1
1.1
1.1
220 265 245 290
5.0
5.0
11.5
11.5
7.5
7.5
3.5
3.5
3.5
3.5
Unit
µAdc
MHz
ns
DL122 — Rev 6
3–29 MOTOROLAMECL Data
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