Motorola M68HC11EVB User Manual

M68HC11EVB
M68HC11EVB/D
REV 2
November 1996
EVALUATION BOARD
USER'S MANUAL
Copyright 1986, 1996 by Motorola Inc.
Information contained in this document applies to REVision (C) M68HC11EVB Evaluation Boards,
serial numbers 6000 through 99,999.
The computer program stored in the Read Only Memory of the device contains material copyright ed by Mot oro la Inc., first published 1985, and may be used only under a license such as t he Lic ense Fo r Co mpu t er P ro gr ams (Ar tic le 1 4) co nta ined in Mo t or ola 's T er ms an d Co nd itio ns of Sale, Rev. 1/79.
EXORciser is a trademark of Motorola Inc. IBM-PC is a registered trademark of International Business Machines Corp.
Apple, MacTerminal, MacWrite are trademarks of Apple Computer, Inc. Macintosh is a trademark licensed to Apple Computer, Inc. Macintosh is a trademark of Macintosh Laboratory, Inc. Red Ryder is a trademark of Freesoft Company
Motorola and the Motorola logo are registered trademarks of Motorola Inc. Motorola Inc. is an Equal Opportunity/Affirmative Action Employer.
CAUTION
Caution should be observed when programming or erasing MCU EEPROM locations. The EVB MCU configuration (CONFIG) register ROMON bit is cleared to disable MCU internal ROM, thereby allowing external EPROM containing the BUFFALO program to control EVB operations.
CONTENTS
CONTENTS
CHAPTER 1 GENERAL INFORMATION
1.1 INTRODUCTION.......................................................................................................... 1-1
1.2 FEATURES ................................................................................................................... 1-1
1.3 SPECIFICATIONS ........................................................................................................ 1-2
1.4 GENERAL DESCRIPTION........................................................................................... 1-3
1.5 EQUIPMENT REQUIRED............................................................................................ 1-4
CHAPTER 2 HARDWARE PREPARATION AND INSTALLATION
2.1 INTRODUCTION.......................................................................................................... 2-1
2.2 UNPACKING INSTRUCTIONS.................................................................................... 2-1
2.3 HARDWARE PREPARATION...................................................................................... 2-1
2.3.1 Reset Select Header (J1)....................................................................................... 2-2
2.3.2 Clock Select Header (J2) ...................................................................................... 2-3
2.3.3 Memory Select Headers (J3 and J7)...................................................................... 2-4
2.3.4 Program Execution Select Header (J4).................................................................. 2-5
2.3.5 Terminal Baud Rate Select Header (J5)................................................................. 2-6
2.3.6 Host Port RX Signal Disable Header (J6).............................................................. 2-7
2.4 INSTALLATION INSTRUCTIONS.............................................................................. 2-7
2.4.1 Power Supply - EVB Interconnection ................................................................... 2-7
2.4.2 Terminal - EVB Interconnection ........................................................................... 2-8
2.4.3 Host Computer - EVB Interconnection................................................................. 2-9
2.4.4 Target System - EVB Interconnection................................................................. 2-11
2.5 CHECKOUT PROCEDURE........................................................................................ 2-14
M68HC11EVB/D v
CONTENTS
CHAPTER 3 MONITOR PROGRAM
3.1 INTRODUCTION.......................................................................................................... 3-1
3.2 PROGRAM DESCRIPTION.......................................................................................... 3-1
3.2.1 Initialization.......................................................................................................... 3-1
3.2.2 Command Interpreter............................................................................................ 3-2
3.2.3 I/O Routines ......................................................................................................... 3-2
3.2.4 Utility Subroutines................................................................................................ 3-3
3.2.5 Command Table.................................................................................................... 3-5
3.3 INTERRUPT VECTORS............................................................................................... 3-5
CHAPTER 4 OPERATING INSTRUCTIONS
4.1 INTRODUCTION.......................................................................................................... 4-1
4.2 CONTROL SWITCH..................................................................................................... 4-1
4.3 LIMITATIONS.............................................................................................................. 4-1
4.4 OPERATING PROCEDURES....................................................................................... 4-3
4.4.1 Debugging Mode.................................................................................................. 4-3
4.4.2 Evaluation Mode................................................................................................... 4-3
4.4.3 Monitor Program.................................................................................................. 4-3
4.5 COMMAND LINE FORMAT........................................................................................ 4-4
4.6 MONITOR COMMANDS ............................................................................................. 4-5
4.6.1 Assembler/Disassembler........................................................................................ 4-8
4.6.2 Block Fill............................................................................................................ 4-11
4.6.3 Breakpoint Set.................................................................................................... 4-12
4.6.4 Bulk.................................................................................................................... 4-14
4.6.5 Bulkall................................................................................................................ 4-15
4.6.6 Call..................................................................................................................... 4-16
4.6.7 EEPROM Modify Mapping................................................................................. 4-18
4.6.8 Go...................................................................................................................... 4-19
4.6.9 Help.................................................................................................................... 4-20
4.6.10 Load................................................................................................................... 4-21
4.6.11 Memory Display ................................................................................................. 4-22
4.6.12 Memory Modify.................................................................................................. 4-23
vi M68HC11EVB/D
CONTENTS
CHAPTER 4 OPERATING INSTRUCTIONS (continued)
4.6.13 Move.................................................................................................................. 4-25
4.6.14 Proceed/Continue ............................................................................................... 4-26
4.6.15 Register Modify.................................................................................................. 4-27
4.6.16 Stop at Address .................................................................................................. 4-28
4.6.17 Trace.................................................................................................................. 4-29
4.6.18 Transparent Mode............................................................................................... 4-30
4.6.19 Verify ................................................................................................................. 4-31
4.6.20 Transfer Data Bootstrap Mode............................................................................ 4-32
4.7 ASSEMBLY/DISASSEMBLY PROCEDURES........................................................... 4-34
4.8 DOWNLOADING PROCEDURES.............................................................................. 4-39
4.8.1 EXORciser to EVB............................................................................................. 4-40
4.8.2 Apple Macintosh (with MacTerminal) to EVB .................................................... 4-41
4.8.3 Apple Macintosh (with Red Ryder) to EVB ........................................................ 4-43
4.8.4 IBM-PC (with KERMIT) to EVB....................................................................... 4-44
4.8.5 IBM-PC (with PROCOMM) to EVB.................................................................. 4-45
CHAPTER 5 HARDWARE DESCRIPTION
5.1 INTRODUCTION.......................................................................................................... 5-1
5.2 GENERAL DESCRIPTION........................................................................................... 5-1
5.2.1 Microcomputer..................................................................................................... 5-1
5.2.2 Port Replacement Unit.......................................................................................... 5-2
5.2.3 Memory................................................................................................................ 5-4
5.2.4 Address Decoding/De-multiplexing....................................................................... 5-4
5.2.5 RS-232C I/O Port Interface Circuits ..................................................................... 5-4
CHAPTER 6 SUPPORT INFORMATION
6.1 INTRODUCTION.......................................................................................................... 6-1
6.2 CONNECTOR SIGNAL DESCRIPTIONS.................................................................... 6-1
6.3 PARTS LIST.................................................................................................................. 6-7
6.4 DIAGRAMS................................................................................................................. 6-11
M68HC11EVB/D vii
CONTENTS
APPENDIX A S-RECORD INFORMATION
A.1INTRODUCTION..........................................................................................................A-1
A.2S-RECORD CONTENT.................................................................................................A-1
A.3S-RECORD TYPES.......................................................................................................A-2
A.4S-RECORD CREATION...............................................................................................A-3
A.5S-RECORD EXAMPLE.................................................................................................A-3
APPENDIX B APPLICATIONS
B.1INTRODUCTION..........................................................................................................B-1
FIGURES
1-1.EVB Block Diagram.......................................................................................................1-4
2-1.EVB Connector, Switch, and Jumper Header Location Diagram.....................................2-2
2-2.Terminal/Host Computer Cable Assembly Diagram.......................................................2-10
2-3.MCU I/O Port Extension Cable Assembly Diagram.......................................................2-13
5-1.EVB Block Diagram.......................................................................................................5-2
5-2.EVB Memory Map Diagram...........................................................................................5-3
6-1.EVB Parts Location Diagram..........................................................................................6-7
6-2.EVB Schematic Diagram (Sheet 1 of 2)........................................................................6-11
6-3.EVB Schematic Diagram (Sheet 2 of 2)........................................................................6-12
B-1.Single-Chip Mode Configuration.....................................................................................C-2
viii M68HC11EVB/D
CONTENTS
TABLES
1-1. EVB Specifications......................................................................................................... 1-2
1-2. External Equipment Requirements .................................................................................. 1-4
3-1. Utility Subroutine Jump Table......................................................................................... 3-3
3-2. Interrupt Vector Jump Table........................................................................................... 3-6
4-1. Monitor Memory Map Limitations.................................................................................. 4-2
4-2. Monitor Program Commands.......................................................................................... 4-6
6-1. MCU I/O Port Connector (P1) Pin Assignments ............................................................. 6-2
6-2. Terminal I/O Port Connector (P2) Pin Assignments ........................................................ 6-4
6-3. Host I/O Port Connector (P3) Pin Assignments............................................................... 6-5
6-4. Input Power Connector (P4) Pin Assignments................................................................. 6-6
6-5. EVB Parts List................................................................................................................ 6-8
M68HC11EVB/D ix
CONTENTS
x M68HC11EVB/D
GENERAL INFORMATION
CHAPTER 1
GENERAL INFORMATION
1.1 INTRODUCTION
Th is man u a l pr ovid e s gen e ral in for ma tion, ha rd w a re pr e p a ra tio n , ins ta lla tio n in s tr u c tions , mo n itor program description, operating instructions, hardware description, and support information for the M68HC11 Evaluation Board (EVB).
Downloading S-record information is contained in Appendix A. While a listing of the EVB mo nit o r p r o g ra m is st or e d on t he dis k ett e s su p plie d with t he E V B ( se e file bu f2 5 . as m) . ( T his file may be viewed using any text reader capable of handling a 123K file.)
NOTE
Unless otherwise specified, all address references are in hexadecimal throughout this manual.
An asterisk (*) following the signal name denotes that the signal is true or valid when the signal is low.
1.2 FEATURES
EVB features include:
An economical means of debugging user assembled code and evaluating target systems
incorporating MC68HC11 microcomputer unit (MCU) device
One-line assembler/disassembler
Host computer downloading capability
MC68HC11 MCU based debugging/evaluating circuitry
MC68HC24 Port Replacement Unit (PRU) based MCU I/O expansion circuitry
MC6850 Asynchronous Communications Interface Adapter (ACIA) based terminal
I/O port circuitry
RS-232C compatible terminal/host computer I/O ports
M68HC11EVB/D 1-11
GENERAL INFORMATION
1.3 SPECIFICATIONS
Table 1-1 lists the EVB specifications.
Table 1-1. EVB Specifications
Characteristics Specifications
MCU MC68HC11A1FN PRU MC68HC24FN ACIA MC68B50 I/O ports:
Terminal Host computer MCU extension
RS-232C compatible RS-232C compatible HCMOS-TTL compatible
Temperature:
Operating
Storage Relative humidity 0 to 90% (non-condensing) Power requirements +5 Vdc @ 0.5 A (max)
Dimensions:
Width
Length
+25 degrees C
-40 to +85 degrees C
+12 Vdc @ 0.1 A (max)
-12 Vdc @ 0.1 A (max)
7.062 in. (17.8 cm)
4.625 in. (11.75 cm)
1-2 M68HC11EVB/D
GENERAL INFORMATION
1.4 GENERAL DESCRIPTION
The MC68HC11 MCU device is an advanced single-chip MCU with on-chip memory and peripheral functions. Refer to the MC68HC11 MCU data sheet for additional device information. To de mons tr at e t he ca pa bilitie s of this M CU, t he E VB fu nct io ns w ith a de bug monit o r p ro gr am called BUFFALO (Bit User Fa st Fr iendly Aid t o Lo gica l Operations). T his monit or p rogr am is contained within an on-board EPROM (external to the MCU).
The EVB provides a low cost tool for debugging and evaluation of MC68HC11 MCU-based target system equipment (Figure 1-1 is a block diagram of the EVB). The EVB is not intended to be a replacement for a much more powerful and flexible tool, such as the Motorola M68HC11EVM Evaluation Module. The EVB operates in either the debugging or evaluation (emulation) mode of operation.
The first mode of operation lets you debug your code using the BUFFALO monitor program. User code is assembled on the EVB or on a host computer and then downloaded to the EVB RAM via Motorola S-records. The second mode of operation lets you evaluate (emulate) user co de in a tar get syst em enviro nment utilizing the memo ry of the MC68HC11 MCU. T he EVB emulates the single-chip mode of operation, even though the EVB operates in the expanded multiplexed mode of operation at all times.
Overall evaluation/debugging contro l of the EVB is provided by the BUFFALO monitor pro gr am via terminal inter action. The target system int erface is provided by the MCU and PRU devices. RS-232C terminal/host I/O port interface circuitry provides communication and data transfer operations between the EVB and external terminal/host computer devices.
Independent baud rate selection capabilities are provided for the terminal and host I/O ports. Hardware selectable (300-9600) baud rates are provided for the ACIA-based terminal port. A non-selectable (fixed) 9600 baud rate is provided for the host port via the MCU Serial Communications Interface (SCI).
The EVB requires a user-supplied +5, +12, and -12 Vdc power supply and an RS-232C compatible terminal for o peration. An RS-232C compatible host co mputer is used with the EVB to download Motorola S-records via the BUFFALO monitor commands.
The Motoro la S-record format was devised for the purpo se of encoding programs or data files in a printable format for t ransportat io n between computer systems. The transpor tation process can therefore be mo nitored and the S-recor ds can be easily edited. Refer to Appendix A for additional S-record information.
M68HC11EVB/D 1-33
GENERAL INFORMATION
Figure 1-1. EVB Block Diagram
1.5 EQUIPMENT REQUIRED
Table 1-2 lists the external equipment requirements for EVB operation.
Table 1-2. External Equipment Requirements
External Equipment
+5, +12, -12 Vdc power supply Terminal (RS-232C compatible) Host computer (RS-232C compatible) Terminal/host computer - EVB RS-232C cable assembly Target system - EVB MCU I/O port extension cable assembly
1. Refer to Chapter 2 for details.
2. Optional - not required for basic operation
(1)
(2)
(1)
(1)
1-4 M68HC11EVB/D
HARDWARE PREPARATION AND INSTALLATION
CHAPTER 2
HARDWARE PREPARATION AND INSTALLATION
2.1 INTRODUCTION
This chapter pro vides unpacking instructions, hardware preparat ion, and installat ion instructions for the EVB.
2.2 UNPACKING INSTRUCTIONS
After unpack EVM from shipping carton, refer to the packing list and verify that all items are present. Save packing material for storing or reshipping the EVM.
2.3 HARDWARE PREPARATION
This section describes the inspection/preparation of EVB components prior to target system installation. This description ensures that t he EVB components are pro perly configured for tar get system operation. The EVB has been factory-tested and is shipped with factory-installed jumpers.
Inspect the EVB for jumper placements pr io r to t arget system installat io n. Figure 2-1 illu st r a t es the EVB connector, switch, and jumper header locations.
Use connector P1 to connect the EVB to t he t arget system. Use connecto rs P2 and P3 to co nnect the EVB to the external terminal and host computer equipment, respect ively. Use connecto r P4 t o connect an external power supply to the EVB. Use switch S1 to reset the EVB. Jumper header locations J1 through J7 provide these capabilities:
Reset select (J1)
Clock select (J2)
Memory select (J3 and J7)
Program execution select (J4)
Terminal baud rate select (J5)
Host port RX signal disable (J6)
M68HC11EVB/D 2-11
HARDWARE PREPARATION AND INSTALLATION
Figure 2-1. EVB Connector, Switch, and Jumper Header Location Diagram
2.3.1 Reset Select Header (J1)
Jumper header J1 is used to co nnect an external reset signal fro m the target system (via MCU I/O port connect or P1, pin 17) to be used by the EVB. This is accomplished by the installation of a fabricat ed jumper on pins 1 and 2. T he EVB is factory-configured and shipped with the jumper installed as shown below.
J1
1 2
This jumper is removed from pins 1 and 2 when the EVB reset circuitry is used without target system intervention.
2-2 M68HC11EVB/D
HARDWARE PREPARATION AND INSTALLATION
2.3.2 Clock Select Header (J2)
Jumper header J2 is used t o select either internal or external clock so urce t o be used by the EVB. The internal EVB clock so urce is an 8 MHz crystal fo r a bus rat e o f 2 MHz. The EVB is factory­configured and shipped with the clock input selected for internal clock source. This is accomplished by the installation of a fabricated jumper on pins 2 and 3 as shown below.
J2
1 2 3
External Internal
If an external TT L clock source from the targ et system (via MCU I/O port connecto r P1, pin 7) is required, the jumper is repositioned between pins 1 and 2.
M68HC11EVB/D 2-33
HARDWARE PREPARATION AND INSTALLATION
2.3.3 Memory Select Headers (J3 and J7)
Jumper headers J3 and J7 are used to configure the EVB circuitr y fo r an additional 8k memor y device (e.g. , MCM6164) installed at lo cation U4. This device is provided by t he user if required. If a RAM devic e is inst alled at locat ion U4, a fabr icat ed jumpe r is installed o n pins 1 and 2 of jumper header J3 or J7 as shown below.
J3 J7
1 2
1 2
NOTE
Jumper headers J3 and J7 should not have fabricated jumpers installed at the same time.
Jumper header J7 is for factory use only.
Jumper header J3 or J7 applies a chip enable (CE*) signal t o t he RAM device installed at location U4. The RAM device is selected or deselected by the installation of a fabricated jumper on either jump e r he a d e r J3 or J 7 . I f th e ins ta lle d R A M d e v ic e is n ot re q u ire d , bu t le ft ins ta lle d , both jumper headers J3 and J7 should not have fabricated jumpers installed.
In s ta lling a fab r icate d ju mp e r on ju mp e r he a der J 3 c a u s es th e me mor y d e v ic e a t loc a tio n U 4 t o be mapped at locations $6000 to $7FFF. Inst alling a fabr ica te d jump er on jumpe r he ad er J 7 c aus es the memory device located at location U4 to be mapped at locations $A000 to $BFFF.
MCU EEPROM may be located at $B600 to $B7FF.
2-4 M68HC11EVB/D
NOTE
HARDWARE PREPARATION AND INSTALLATION
2.3.4 Program Execution Select Header (J4)
Ju mpe r he ad e r J4 is u se d t o d ete r mine w he t he r t he B UF FA LO mo nito r p r o mp t w ill be d isp la yed , o r if a jump to int er nal E EP RO M will b e ex ecu te d. Up on r es et , t he mo nit o r d et ect s t he st at e o f the PE0 line. If a low state is detected, the monitor program is executed and the prompt displayed. I f a high stat e is de tec ted , the mo nito r will automa tica lly jump direct ly to EEP ROM (address location $B600) and execute user program code without displaying the monitor prompt.
The EVM is factory-configured and shipped with the program executio n selected for BUFFALO monitor operation as shown below. The user must configure the EVB for the type of program execution required. If progr am execution out of EEPROM is desired, the jumper is repo sit ioned between pins 2 and 3.
J4
1 2 3
Monitor EEPROM
(10K PULLDOWN) (10K PULLUP)
If the PE0 line is used fo r A/D operations, t he lo ading co nditio n int roduced by jumper header J4 may no t be desired. To circumvent this co ndition, program the first three EEPROM locat ions with $7E, $E0, and $0A, respectively. Next, remove installed jumper from jumper header J4 (removes load condition), and proceed into the A/D operation.
For additional info rmat ion pertaining t o the EEPROM jump o peration described above, r efer t o the buf25.asm file on the EVB diskettes.
M68HC11EVB/D 2-55
HARDWARE PREPARATION AND INSTALLATION
2.3.5 Terminal Baud Rate Select Header (J5)
Jumper header J5 is used to select the baud rate for the terminal (P2) I/O port. The EVB is factory configured and shipped with the terminal baud rate selected for 9600 baud as shown below.
J5
12
3
5
7
4
6
8
910
11 12
300 BAUD
600 BAUD
1200 BAUD
2400 BAUD
4800 BAUD
9600 BAUD
BAUD RATE SELECTION
The host (P3) I/O po rt is a fixed MCU SCI 9600 baud rate (non selectable). Refer to Chapter 6 EVB part s list notes for additional informatio n pertaining t o t he host baud rate (crystal vs E-clock vs MCU SCI operation).
2-6 M68HC11EVB/D
HARDWARE PREPARATION AND INSTALLATION
2.3.6 Host Port RX Signal Disable Header (J6)
Jumper header J6 is used t o disable the ho st co mputer I/O port RX out put signal line (connector P3, pin 2) when using the EVB MCU SCI in a target system application. When performing a downloading operation or communicating to a host computer in the transparent mode, a fabricated jumper is installed on pins 1 and 2 as shown below.
J6
1 2
Signal disabling is accomplished by the removal of the fabricated jumper installed on pins 1 and 2.
2.4 INSTALLATION INSTRUCTIONS
The EVB is designed for table top operation. A user supplied power supply and RS-232C compatible t erminal are r equired for EVB o peration. An RS- 232C compatible host comput er is optional for downloading user assembled code to the EVB.
2.4.1 Power Supply - EVB Interconnection
The EVB requires +5 Vdc @ 0.5 A, +12 Vdc @ 0.1 A, -12 Vdc @ 0.1 A, and GND for operat ion. Interconnection of the power supply wiring to the EVB power supply connector P4 is shown below.
P4
1234
-12 VDC GND +5 VDC +12 VDC
The power supply cable simply consists of four 14-22 AWG wires that interconnect -12 VDC, GND, +5 VDC, and +12 VDC, from the user supplied power supply to the EVB connector P4.
M68HC11EVB/D 2-77
HARDWARE PREPARATION AND INSTALLATION
2.4.2 Terminal - EVB Interconnection
Interconnection of an RS-232C compatible terminal to the EVB is accomplished via a user supplied 20 or 25 conductor flat ribbon cable assembly as shown in Figure 2-2. One end of the cable assembly is connected to t he EVB co nnector P2 (shown below). The o t her end o f the cable assembly is connected to the user supplied terminal. For connector pin assignments and signal descriptions of the EVB terminal port connector P2, refer to Chapter 6.
P2
GND
RXD
TXD
NC
CTS
DSR
SIG-GND
DCD
NC NC NC NC NC
1 2 3 4 5 6 7 8
9 10 11 12 13
TERMINAL
14 15 16 17 18 19 20 21 22 23 24 25
NC NC NC NC NC NC DTR NC NC NC NC NC
A dumb terminal or personal computer is always connected to the terminal I/O port but it is very co mmon not t o have any ext ernal equipment connected to the host I/O port.
2-8 M68HC11EVB/D
NOTE
HARDWARE PREPARATION AND INSTALLATION
2.4.3 Host Computer - EVB Interconnection
Interconnection of an RS-232C compatible host computer t o t he EVB is accomplished via a user supplied 20 or 25 conductor flat ribbon cable assembly as shown in Figure 2-2. One end of the cable assembly is connected to t he EVB co nnector P3 (shown below). The o t her end o f the cable assembly is connected to the user supplied host computer. For connector pin assignments and signal descriptions of the EVB host port connector P3, refer to Chapter 6.
P3
GND
RXD
TXD
NC NC
DSR
SIG-GND
DCD
NC NC NC NC NC
10 11 12 13
1
2
3
4
5
6
7
8
9
14 15 16 17 18 19 20 21 22 23 24 25
NC NC NC NC NC NC DTR NC NC NC NC NC
HOST
The RXD and TXD signal directions (output versus input) are reversed as compared to the terminal I / O port . . The EVB looks like a terminal device to the host "computing" device, while the EVB is a computing device to a terminal device even when the terminal device happens to be a personal computer such as an IBM-PC o r a Macintosh computer.
M68HC11EVB/D 2-99
NOTE
HARDWARE PREPARATION AND INSTALLATION
20 OR 25 CONDUCTOR
FLAT RIBBON
CABLE
3M #3365-20
OR
3M #3365-25
RED WIRE
25 "D" SUBMINIATURE MALE (PIN) CONNECTOR PART #'S:
1. CIRCUIT ASSEMBLY CORP #CA•25•SMD•P
2. ITT CANNON #DBSP-B25P
3. ANSLEY #609•25P
4. WINCHESTER #49•1125P
25 PIN "D" SUBMINIATURE CONNECTOR
12 34 5 678910111213
14 15 16 17 18 19 20 21 22 23 24 25
RXD
RTS
CTS
TXD
12 34 5 678910111213
14 15 16 17 18 19 20 21 22 23 24 25
25 "D" SUBMINIATURE FEMALE (SOCKET) CONNECTOR PART #'S:
1. CIRCUIT ASSEMBLY CORP #CA•25•SMD•S
2. ITT CANNON #DBSP-B25S
3. ANSLEY #609•25S
4. WINCHESTER #49•1125S
DSR
DTR
DCD
SIGNAL GND
NOT CONNECTED
Figure 2-2. Terminal/Host Computer Cable Assembly Diagram
The EVB can operate with only pins 2, 3, and 7 (TXD, RXD, and SI GNAL GND) co nnected, however; the terminal device may need the other handshake lines for proper operation.
2-10 M68HC11EVB/D
25 PIN "D" SUBMINIATURE CONNECTOR
HARDWARE PREPARATION AND INSTALLATION
2.4.4 Target System - EVB Interconnection
Target system to E VB interconnection is accomplished via the EVB MCU I/O port connector and a 60 conductor flat ribbon extension cable assembly. This MCU I/O port co nnector P 1 (shown on t he follo w in g p a g e ) is a 60- p in he a der tha t fa c ilita tes th e inte r co n ne c tion of the c able a s s e mb ly fo r evaluatio n purposes. For connecto r pin assignments and signal descript ions of the EVB MCU I/O port connector P1, refer to Chapter 6.
Two types of extension cable assembly construction techniques are available to the user. Cable assembly construction is dependent upon the purpose or use of the EVB. The user must first de t e r mine th e p r imar y a pp lic atio n o f th e E V B in o r d e r t o d e t er min e th e t yp e o f c ab le a s se mbly to be constructed. Cable assembly types and construction methods are described in the following paragraphs.
The first type of cable assembly (user supplied) is low cost and simplest to construct, and is illus t r a t ed in Fig u r e 2 - 3 . T his t ype o f a s se mbly p r o vid e s a n in d ir ec t c o nn ec t io n o f t h e E V B M C U I/O port to the target system MCU device socket. I ndirect connection is accomplished via a 60­pin connector, installed on the target system board, that connects to the target system MCU device socket. This connector is a double row post, 60-pin header type, Amptronics # 929715-01-
30. Target system wiring from the connector to the MCU device socket is implement ed via wire wrap or Printed Wiring Board (PWB) conductive land wiring. Uses for this type of cable assembly are in the early development stages of the MC68HC11 MCU-based product.
The second t ype o f cable asse mbly (no t illust rat ed) is expens ive and hardest to const ruct . This type of assembly provides a direct connection of the EVB MCU I/O port to the target system MCU device socket. Direct connection is accomplished via a specialized plug platform containing a 52-lead plastic leaded chip carrier (PLCC) plug constructed by the user. This type of plug platform mates directly with the target system MCU device socket . Uses for this type of cable assembly are in the production stages of the developed MC68HC11 MCU-based product.
M68HC11EVB/D 2-1111
HARDWARE PREPARATION AND INSTALLATION
P1
GND
NC
EXTAL
PC0 PC2 PC4 PC6
RESET*
IRQ*
PD1 PD3 PD5
PA7 PA5 PA3 PA1
1 3
E
5 7
9 11 13 15 17 19 21 23 25 27 29 31 33
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34
MODB STRA STRB XTAL PC1 PC3 PC5 PC7 XIRQ* PD0 PD2 PD4 Vdd PA6 PA4 PA2
PA0 PB7 PB5 PB3 PB1 PE0 PE1 PE2 PE3 VRL
NC NC NC NC
35 37 39 41 43 45 47 49 51 53 55 57 59
MCU I/O PORT
36 38 40 42 44 46 48 50 52 54 56 58 60
PB6
PB4
PB2
PB0
PE4
PE5
PE6
PE7
VRH
NC
NC
NC
NC
2-12 M68HC11EVB/D
HARDWARE PREPARATION AND INSTALLATION
Figure 2-3. MCU I/O Port Extension Cable Assembly Diagram
M68HC11EVB/D 2-1313
HARDWARE PREPARATION AND INSTALLATION
2.5 CHECKOUT PROCEDURE
This procedure lets you perform a pre-operat ional checkout of the EVB for basic operation. Upon completion of t he EVB installat ion to an external power supply and t erminal, check t hat t he E VB is configured for the proper terminal baud rate (refer to paragraph 2.3.5.).
Applying power to the EVB causes a power-on reset ( POR) t o o ccur. POR causes t he MCU and user I/O port circuitry to be reset, and the monitor invoked. The terminal monitor displays the following EVB monitor prompt:
BUFFALO X.X (ext) - Bit User Fast Friendly Aid to Logical Operation
where:
X.X is the revision of the monitor program. (ext) denotes monitor program residing in external EPROM (U3). (int) denotes monitor program residing in EEPROM MCU (U10).
If the EVB monitor pro mpt is not displayed ( as shown above), press t he user reset switch S1. If t he mo nit o r p ro mp t can no t b e d isp laye d, t he p o ss ibilit y ex ist s t ha t t he E VB ca nno t c ommu nic at e via the terminal port because the CONFIG register NOSEC bit is enabled (logic 0). Erasing the entire EEPROM array including the CONFIG register must be performed as follows:
1. Remo ve installed jumper fr om rese t se lect header J1. Reinst all jump er o n MCU I /O port connector P1, pins 1 and 2 (top two pins).
2. Press reset switch S1.
3. Re mov e ins talled jumper fro m connector P1. Rein stall jumper on hea de r J1 (pins 1 and
2).
4. Press reset switch S1. Internal (int) BUFFALO monitor prompt is displayed.
5. Memory modify (MM) command (refer to paragraph 4.6.11) is used to change CONFIG register contents to $0D. BUFFALO monitor will respond with "rom" message.
6. Press reset switch S1. External (ext) BUFFALO monitor prompt is displayed.
Proceed to Chapter 4 for complete operating instructions.
2-14 M68HC11EVB/D
MONITOR PROGRAM
CHAPTER 3
MONITOR PROGRAM
3.1 INTRODUCTION
Th is c h a p te r pr ovid e s th e ove rall de s c r ip tion of the monitor p r og ra m. This de s c r ip tion w ill e n a ble the user to understand the basic structure of the program, and to modify or customize the program for specific applications.
3.2 PROGRAM DESCRIPTION
Th e monit or pro gr am sup plied for t he E VB is c alled BUF FALO ( Bit Use r Fa st F riend ly Aid t o Logical Operations). This program communicates via the MC6850 Asynchronous Communications Interface Adapter (ACIA) device and the MCU Serial Co mmunicat ions Interface (SCI). Refer t o the buf25.asm file on the EVB diskettes for additional information pert aining to the monitor (BUFFALO) program.
The EVB monitor program is contained in EPROM (external to the MCU). The EVB resident MCU have t he configurat ion (CONFIG) register ROMON bit cleared thereby disabling the MCU internal ROM. Having the monito r pr og ram in EPROM ext ernal to the MCU at locat ions $E000­$FFFF is a great advantage because it allows the user to add instructions to customize the monitor for specific requirements.
The BUFFALO monitor program consists of five parts (or sections) which are as follows:
Initialization
Command interpreter
I/O routines
Utility subroutines
Command table
3.2.1 Initialization
Th is pa rt o f B UFF ALO co nt a ins a ll o f t he r e se t in itia liza t io n co d e. I n t his s ec t ion , in te r nal R AM locations are set up, and the I/O channel for the terminal is set up. To set up t he terminal I/O port, BUFFALO must determine if the terminal is connected to the SCI or to an external ACIA or DUART. This is accomplished by sending a sign- on message to all ports and then waiting for the user to type carriage return (RETURN) on whichever device is the terminal port. When
M68HC11EVB/D 3-11
MONITOR PROGRAM
BUFFALO recognizes a carriage return from a port, that port is then used for all subsequent terminal I/O operations.
3.2.2 Command Interpreter
The next section of BUFFALO is the command interpreter. American Standard Code for Information Interchange (ASCII) characters are read from the terminal into the input buffer until a carriage return or a slash (/) is received. The command field is then parsed out of the input buffer and placed into the command buffer. A table of commands is then searched and if a match is found, the correspo nding command module is called as a subroutine. All co mmands return co ntr ol back to the command interpreter upon completion of the operation.
3.2.3 I/O Routines
The I/O section of BUFFALO consists of a set of supervisor routines, and three sets of driver routines. The supervisor routines are INIT, INPUT, and OUTPUT. These routines determine which driver subroutine to call to perform the specific action. Each set of driver routines consists o f a n initia lizat ion r ou tine , an inp ut r ou tine , and an o ut put ro ut ine. One s et o f dr iver s is fo r t he SCI port and t hese rout ines are called ONSCI , IN SCI, and OUTSCI. T he seco nd set of drivers is for a DUART and these routines are called ONUART, INUART, and OUTUART. The third set of drivers is for an ACIA and these routines are called ONACIA, INACIA, and OUTACIA.
All I/O communications are controlled by three RAM locations (IODEV, EXTDEV, and HOSTDEV). EXTDEV specifies the external device type (0=none, 1=ACIA, 2=DUART). HOSTDEV specifies which I/O port is used for host communications (0=SCI, 1=ACIA, 3=DUARTB). IODEV instructs the supervisor routine which port/driver routine to use (0=SCI, 1=ACIA, 2=DUARTA, 3=DUARTB).
The INIT routines set up a serial transmission format of eight data bits, one stop bit, and no parity. For the SCI, the baud rate is set to 9600 for an 8 MHz crystal (2 MHz E-clock). A different baud rate can be achieved by modifying address location $102B (refer to MCU data sheet, SCI baud rate selection).
The INPUT routine reads from the specified port. If a character is received, the character is returned in accumulator A. If no character is received a zero (0) is returned in accumulator A. This routine does not wait for a character t o be received before ret urning (function is performed by the INCHAR subroutine).
The OUTPUT routine takes the ASCII character in accumulat or A and writes to t he specified I/ O port. This r outine waits until the character is transmitted before returning.
3-2 M68HC11EVB/D
MONITOR PROGRAM
3.2.4 Utility Subroutines
Several subroutines exist t hat ar e available for performing I /O t asks. A jump table has been set up in ROM directly before the interrupt vectors. To use these subroutines, execute a jump to subroutine (JSR) command to the appropriate entry in the jump table. By default, all I/O performed with these routines are sent to the terminal port. Redirection of the I/O port is achieved by placing the specified value ( 0=SCI, 1=ACIA, 2=DUARTA, 3=DUARTB) into RAM location IODEV.
Utility subroutines available to the user are listed in Table 3-1.
Table 3-1. Utility Subroutine Jump Table
Address Routine Description
$FF7C .WARMST Go to ">" prompt point (skip BUFFALO... message). $FF7F .BPCLR Clear breakpoint table. $FF82 .RPRINT Display user's registers. $FF85 .HEXBIN Convert ASCII character in A register to 4-bit binary number.
Shift binary number into SHFTREG from the right. SHFTREG is a 2-byte (4 hexadecimal digits) buffer. If A register is not hexadecimal, location TMP1 is incremented and SHFTREG is unchanged.
$FF88 .BUFFAR Read 4-digit hexadecimal argument from input buffer to
SHFTREG.
$FF8B .TERMAR Read 4-digit hexadecimal argument from terminal device to
SHFTREG.
$FF8E .CHGBYT Write value (if any) from SHFTREG+1 to memory location
pointed to by X. (Operation also applicable to EEPROM
locations.) $FF91 .READBU Read next character from INBUFF. $FF94 .INCBUF Increment pointer into input buffer. $FF97 .DECBUF Decrement pointer into input buffer. $FF9A .WSKIP Read input buffer until non-white-space character found. $FF9D .CHKABR Monitor input for (CTRL)X, (DELETE), or (CTRL)W requests. $FFA0 .UPCASE If character in accumulator A is lower case alpha, convert to
M68HC11EVB/D 3-33
upper case.
MONITOR PROGRAM
Table 3-1. Utility Subroutine Jump Table (continued)
Address Routine Description
$FFA3 .WCHEK Test character in accumulator A and return with Z bit set if
character is white space (space, comma, tab). $FFA6 .DCHEK Test character in accumulator A and return with Z bit set if
character is delimiter (carriage return or white space). $FFA9 .INIT Initialize I/O device. $FFAC .INPUT Read I/O device. $FFAF .OUTPUT Write I/O device. $FFB2 .OUTLHL Convert left nibble of accumulator A contents to ASCII and
output to terminal port. $FFB5 .OUTRHL Convert right nibble of accumulator A contents to ASCII and
output to terminal port. $FFB8 .OUTA Output accumulator A ASCII character. $FFBB .OUT1BY Convert binary byte at address in index register X to two
ASCII characters and output. Returns address in index
register X pointing to next byte. $FFBE .OUT1BS Convert binary byte at address in index register X to two
ASCII characters and output followed by a space. Returns
address in index register X pointing to next byte. $FFC1 .OUT2BS Convert two consecutive binary bytes starting at address in
index register X to four ASCII characters and output followed
by a space. Returns address in index register X pointing to
next byte. $FFC4 .OUTCRL Output ASCII carriage return followed by a line feed. $FFC7 .OUTSTR Output string of ASCII bytes pointed to by address in index
register X until character is an end of transmission ($04). $FFCA .OUTST0 Same as OUTSTR except leading carriage return and line
feed is skipped. $FFCD .INCHAR Input ASCII character to accumulator A and echo back. This
routine loops until character is actually received. $FFD0 .VECINIT Used during initialization to preset indirect interrupt vector
area in RAM. This routine or a similar routine should be
included in a user program which is invoked by the jump to
$B600 feature of BUFFALO.
3-4 M68HC11EVB/D
MONITOR PROGRAM
When accessing BUFFALO utility routines, always reference the routines by the applicable address ($FF7C through $FFD0) in the jump table rather than the actual address in the BUFFALO monitor program. Jump table addresses remain the same when a new version of BUFFALO is developed even though the actual addresses of the routine may change. Pr ograms that reference rout ines by the jump t able addr esses are not required to be changed t o operat e on revised versions of the BUFFALO monitor program.
3.2.5 Command Table
The command table consists of three lines for each entry. The first byte is the number of characters in t he command name. The second entry is the ASCII co mmand name. The third entry is the starting address of the command module. As an example:
FCB 3 3 characters in command name FCC 'ASM' ASCII literal command name string FDB #ASM Jump address for command module
Each command in the BUFFALO program is a individual module. Thus, to add or delete co mma nd s , all t h at is r eq u ir e d is t o in clu d e a n ew c o mman d mo d ule o r d ele t e a n e xis t in g mo d ule and/or delete the entry in the command table.
3.3 INTERRUPT VECTORS
Interrupt vectors residing in MCU internal ROM are accessible as follows. Each vector is assigned a t hree byte field residing in EVB memory map lo catio ns $0000-$00FF. This is where the monitor progr am expects t he MCU RAM to reside. Each vector point s to a three byte field which is used as a jump table to t he vecto r service ro utine. T able 3-2 list s the interr upt vectors and associated three byte field.
M68HC11EVB/D 3-55
MONITOR PROGRAM
Serial Communications Interface (SCI) $00C4 - $00C6 Serial Peripheral Interface (SPI) $00C7 - $00C9 Pulse Accumulator Input Edge $00CA - $00CC Pulse Accumulator Overflow $00CD - $00CF Timer Overflow $00D0 - $00D2 Timer Output Compare 5 $00D3 - $00D5 Timer Output Compare 4 $00D6 - $00D8 Timer Output Compare 3 $00DC - $00DE Timer Output Compare 1 $00DF - $00E1
Table 3-2. Interrupt Vector Jump Table
Interrupt Vector Field
Timer Input Capture 3 $00E2 - $00E4 Timer Input Capture 2 $00E5 - $00E7 Timer Input Capture 1 $00E8 - $00EA Real Time Interrupt $00EB - $00ED IRQ $00EE - $00F0 XIRQ $00F1 - $00F3 Software Interrupt (SWI) $00F4 - $00F6 Illegal Opcode $00F7 - $00F9 Computer Operating Properly (COP) $00FA - $00FC Clock Monitor $00FD - $00FF
To use vecto rs specified in Table 3-2, t he user must insert a jump extended op code in t he three byte field of the vector required. For an example, for the IRQ vector, the following is performed:
1. Place $7E (JMP) at location $00EE.
2. Place IRQ service routine address at locations $00EF and $00F0. The following is an example where the IRQ service routine starts at $0100:
$00EE 7E 01 00 JMP IRQ SERVICE
3-6 M68HC11EVB/D
MONITOR PROGRAM
During initialization BUFFALO checks the first byt e o f each set of three locations.. I f a $7E jump o pcode is not fo und, BUFFALO will install a jump to a routine c alled ST OP IT. This assures there will be no unin itia lized int err up t vect o rs whic h wo uld cau se und esir able o per at io n du rin g p ow er up and power down. If an interr upt is accident ally encountered, t he STOPIT ro utine will for c e a STOP instruction sequence to be executed. A user may replace any of the JMP STOPIT instructions wit h a JMP to a user written interrupt service routine. If reset is issued via switch S1, BU FF ALO w ill no t o v er w r it e t he s e u s er ju mp ins t r u ct ion s s o t he y ne e d not be r e - init ia liz ed a ft e r every reset.
M68HC11EVB/D 3-77
MONITOR PROGRAM
3-8 M68HC11EVB/D
OPERATING INSTRUCTIONS
CHAPTER 4
OPERATING INSTRUCTIONS
4.1 INTRODUCTION
This chapter provides the necessary information to initialize and operate the EVB in a target sys t em e nv ir o nme nt . I n fo r matio n con sis t s o f t he c o nt r o l s w it c h d e sc r ip t io n, o p er a t in g limit a t io ns , command line for mat, monitor co mmands, and operating procedures. The operating procedures consist of assembly/disassembly and downloading descriptions and examples.
4.2 CONTROL SWITCH
The EVB contains a user r eset switch S1. This swit ch is a momentary action push-button switch that resets the EVB MCU circuits.
4.3 LIMITATIONS
CAUTION
Caution should be observed when programming or erasing MCU EEPROM locations. EVB MCU configuration (CONFIG) register ROMON bit is cleared to disable MCU internal ROM, thereby allowing external EPROM containing the BUFFALO program to control EVB operations.
The MC68HC11 MCU SCI has been set for 9600 baud using a 2 MHz E clock external bus. T his baud rate can be changed by software by reprogramming the BAUD register in the ONSCI subroutine of the BUFFALO monitor program. Refer to the buf25.asm file on the EVB diskettes for additional information pertaining to the ONSCI subroutine.
As the RS-232C handshake lines are not used, a delay of approximately 300 milliseconds is present between successive characters sent to the host computer during the execution of the LOAD command in the monitor program.
The mo nitor progr am uses t he MCU internal RAM locat ed at $0048-$00FF. The contr ol registers are located at $1000-$103F. The monitor program also uses Output Compare 5 (OC5) for the TRACE instruction, therefore OC5 should not be used in user routines being traced.
M68HC11EVB/D 4-11
OPERATING INSTRUCTIONS
The EVB allows the user to use all the feat ures o f the BUFFALO evaluat ion software, ho wever it should be noted (when designing code) that the BUFFALO uses the MCU on-chip RAM locations $0048-$00FF leaving only 72 bytes for the user (i.e., $0000-$0047).
The user must be awar e of t he BUFFALO monitor address location restr ictions. Table 4-1 list s the monitor memory map limitations.
Table 4-1. Monitor Memory Map Limitations
Address Restrictions
$0000-$0047 Available to user. (BUFFALO sets default value of the user stack
pointer at location $0047.) $0048-$0065 BUFFALO monitor stack area. $0066-$00C3 BUFFALO variables. $00C4-$00FF Interrupt pseudo vectors (jumps). $0100-$01FF User available. $1000-$103F MCU control registers. Although RAM and registers can be moved in
the memory map, BUFFALO expects RAM at $0000 (actually requires
$0048-$00FF) and registers at $1000-$103F. $4000 Some versions of EVBs have a D flip-flop addressed at this location.
During initialization, BUFFALO 3.2 writes $00 to location $4000 and
various monitor operations cause $00 or $01 to be written to $4000.
(Refer to the buf25.asm file on the EVB diskette for the definitions of
DFLOP, TARGCO, and HOSTCO for additional information).
Since the EVB has no memory or peripherals located at $4000, these
writes should not concern most EVB users. $D000-$D00F BUFFALO supports serial I/O to a terminal and/or host via a DUART
(external IC) located at $D000 in the memory map. During
initialization, BUFFALO 3.2 reads and writes to location $D00C to see
if a DUART is present in the system. Refer to the buf25.asm file on
the EVB diskette.
4-2 M68HC11EVB/D
OPERATING INSTRUCTIONS
4.4 OPERATING PROCEDURES
The EVB is a simplified debugging/evaluat ing tool designed to oper at e in either the debugging or evaluation (emulation) mode of operation. Jumper header J4 is used to determine whether the BU F FA L O monitor p ro mpt will be d is played, or if a ju mp to in terna l EE P R O M w ill b e e x e c ut e d. Refer to paragraph 2.3.4 for additional program execution selection information.
Upon reset, the monitor detects the stat e of the PE0 line. If a low state is detected, the monit or program is executed and the prompt displayed. If a high state is detected, the monitor will automatically jump directly to EEPROM (address location $B600) and execute user program code without displaying the monitor prompt.
4.4.1 Debugging Mode
The first mode of operation allows the user to debug user code under control of the monitor pr ogr am. User cod e can be assembled in one of two method s. T he firs t met hod is to assemble code using the line assembler in t he BUFFALO mo nitor pr ogram via the EVB user RAM ($C000­$DFFF) . The sec o nd metho d is to asse mble code o n a ho st c o mpu t er a nd then downloa d the code to t he EVB user RAM via Motoro la S- records. The monitor pro gram is then used to debug the assembled user code. Having the monitor program in EPROM external to the MCU ($E000­$FFFF) allows the user to add instructions to customize the monitor for specific requirements.
4.4.2 Evaluation Mode
The second mode of operat ion allows t he user to evaluate (emulat e) user co de in a target system env iro nment ut ilizing t he me mor y of t he M C68 HC11 MCU . T his is accomplished by relocating the code from locations $C000-$DFFF (EVB user RAM) to $E000-$FFFF (MCU 8k ROM). MCU locations $0000-$00FF (RAM) and $B600-$B7FF (EEPROM) are also available to the user. The EVB t hen emulates an EPROM equivalent of the masked ROM device in the single chip mode of operation. The EVB emulates as if in a single-chip mode of operation, even though operating in the expanded multiplexed mode of operation at all times.
4.4.3 Monitor Program
The monitor BUFFALO program is the resident firmware for the EVB, which provides a self contained operating environment. The monitor interacts with the user through predefined commands t hat are entered from a terminal. T he user can use any of the commands supported by the monitor.
M68HC11EVB/D 4-33
OPERATING INSTRUCTIONS
A standard input routine controls the EVB operation while the user types a command line. Command pr ocessing begins only after t he command line has been terminat ed by depressing the keyboard carriage return (<CR>) key.
4.5 COMMAND LINE FORMAT
The command line format is as follows:
><command> [<parameters>]<CR>
where:
> EVB monitor prompt.
<command> Command mnemonic (single letter for most commands).
<parameters> Expression or address.
<CR> ENTER keyboard key - depressed to enter command.
NOTES
1. The co mmand line format is defined using special char acters which have t he following syntactical meanings:
< > Enclose syntactical variable
[ ] Enclose optional fields [ ]... Enclose optional fields repeated
These characters are not entered by the user, but are for definition purposes only.
2. Fields are separated by any number of space, comma, or tab characters.
3. All input numbers are interpreted as hexadecimal.
4. All input commands can be entered either upper or lower case lettering. All input commands are co nverted aut o matically to upper case lettering except for do wnloading commands sent to the host computer, or when operating in the transparent mode.
5. A maximum of 35 characters may be entered on a command line. After the 36th character is entered, the monitor aut omatically terminat es the command ent ry and the terminal CRT displays the message "Too Long".
6. Command line erro rs may be corrected by backspacing (CTRL-H) or by abort ing t he command (CTRL-X or DELETE).
7. After a command has been entered, pressing <CR> a second time will repeat the command.
4-4 M68HC11EVB/D
OPERATING INSTRUCTIONS
4.6 MONITOR COMMANDS
Th e mon ito r B UFFA LO p ro gr am co mmand s ar e list ed alph abe tic ally by mne mon ic in T able 4- 2. Each of the commands are described in detail following the tabular command listing. In most ca s e s the in itia l s ingle le tt e r of t h e c omma n d mn e monic or a s pecific s ymb ol (sh ow n in Ta ble 4 -2 ) can be used. A minimum number of characters must be entered t o at least guarantee uniqueness from other commands (i.e., MO = MOVE, ME = MEMORY). If the letter M is entered, BUFFALO uses the first command in Table 4-2 that starts with M.
Additional terminal keyboard functions are as follows:
(CTRL)A (CTRL)B (CTRL)H (CTRL)J (CTRL)W (DELETE) <CR>
Exit transparent mode or assembler Send break command to host in transparent mode Backspace Line feed <lf> Wait/freeze screen Abort/cancel command Enter command/repeat last command
(1)
NOTES
1. Execution is restarted by any terminal keyboard key.
2. When using the control key with a specialized command such as (CTRL)A, the (CTRL) key is depressed and held, then the A key is depressed. Both keys are t hen released.
Command line input examples in this chapter are amplified with the following:
Bold entries are user-entered on the terminal keyboard.
Command line input is entered when the keyboard <CR> key is depressed.
Typical example of this explanation is as follows:
>MD F000 F100<CR>
M68HC11EVB/D 4-55
OPERATING INSTRUCTIONS
Table 4-2. Monitor Program Commands
Command Description
ASM
[<address>] Assembler/disassembler
ASSEM (same as ASM)
BF
<addr1> <addr2> <data> Block fill memory with data
BR
[-] [<address>]... Breakpoint set
BREAK (same as BR)
BULK
Bulk erase EEPROM
BULKA (same as BULKALL)
BULKALL CALL
[<address>] Execute subroutine
Bulk erase EEPROM + CONFIG register
COPY (same as MOVE) DUMP (same as MD)
EEMOD
Modify EEPROM mapping
ERASE (same as BULK) FILL (same as BF)
G
[<address>] Execute program
GO (same as G)
HELP
Display monitor commands
HOST (same as TM)
LOAD
<host download command> Download (S-records*) via host port
LOAD
<T> Download (S-records*) via terminal port
(1)
(2)
(2)
MEMORY (same as MM)
MD
[<addr1> [<addr2>]] Dump memory to terminal
MM
[<address>] Memory modify
MOVE
<addr1> <addr2> [<dest>] Move memory to new location
P
PROCEED (same as P) RD (same as RM)
4-6 M68HC11EVB/D
Proceed/continue from breakpoint
OPERATING INSTRUCTIONS
Table 4-2. Monitor Program Commands (continued)
Command Description
READ (same as MOVE) REGISTER (same as RM)
RM
[p,x,y,a,b,c,s] Register modify/display user registers
STOPAT T
[<n>] Trace $1-$FF instructions
TM
TRACE (same as T)
VERIFY
VERIFY
XBOOT
? (same as HELP) [<address>]/ (same as MM [<address>])
<address> Stop at address
Enter transparent mode
<host download command> Compare memory to download data via host
port
<T> Compare memory to download data via
terminal port
[<address1> [<address2>]] Send program to another M68HC11 via
bootstrap mode
NOTES
1. On newer mask sets of MC68HC11, CONFIG can only be changed in special test or bootstrap modes of operation.
2. * Refer to Appendix A for S-record information.
M68HC11EVB/D 4-77
OPERATING INSTRUCTIONS
ASM Assembler/Disassembler
4.6.1 Assembler/Disassembler
ASM [<address>]
where:
<address> The starting address for the assembler operation. Assembler operation
defaults to internal RAM if no address is given.
Th e as semb ler/ dis ass emble r is a n int er ac tive ass emble r/ edit o r. Ea ch s ou rc e line is co nve rt ed int o the proper machine language code and is stored in memory overwriting previous dat a on a line­by-line basis at the time of entry. In order to display an instruction, the machine code is disassembled and the instruction mnemonic and operands are displayed. All valid opcodes are converted to assembly language mnemonics. All invalid opcodes are displayed on the terminal CRT as "ILLOP".
The syntax rules for the assembler are as follows: (a.) All numerical values are assumed to be hexadecimal. Therefore no base designators (e.g., $ = hex, % = binary, etc.) are allowed. (b.) Operands must be separated by o ne or more space or tab charact ers. (c.) Any characters after a valid mnemonic and associated operands are assumed to be comments and are ignored.
Addressing modes are designated as follows: (a.) Immediate addressing is designated by preceding the address with a # sign. (b.) Indexed addressing is designated by a comma. The comma must be preceded a one byte relative offset ( even if t he offset is 00), and the co mma must be followed by an X or Y designating which index register to use ( e.g., LDAA 00,X). (c.) Direct and extended addressing is specified by the length of the address o perand (1 or 2 digits specifies direct, 3 or 4 digits specifies extended). Extended addressing can be forced by padding the address operand with leading zero s. (d.) Relative offsets for branch instructions are computed by the assembler. T herefore the valid operand for any branch instruction is the branch-if-t r ue address, not the relative offset.
4-8 M68HC11EVB/D
OPERATING INSTRUCTIONS
ASM Assembler/Disassembler
When a new sourc e line is assembled, the assemb ler ov er wr ites what was previo usly in memory. If no new source line is submitted, or if there is an error in the source line, then the contents of memory remain unchanged. Four instruction pairs have the same opcode, so disassembly will display the following mnemonics:
Arithmetic Shift Left (ASL)/Logical Shift Left (LSL) displays as ASL
Arit hmetic S hift Le ft Do uble (AS LD)/Log ical Shift Left D ouble (LSLD) d isplays as
LSLD
Branch if Carry Clear (BCC)/Branch if Higher or Same (BHS) displays as BCC
Branch if Carry Set (BCS)/Branch if Lower (BLO) displays as BCS
If the assembler tries to assemble at an address that is not in RAM or EEPROM, an invalid address message "rom-xxxx" is displayed on the terminal CRT (xxxx = invalid address).
Ass e mb le r /d is a s s e mb le r s u b c omma n d s a r e as follow s . If the a s s e mb le r d e te c ts a n er r or in th e n e w source line, the assembler will output an error message and then reopen the same address location.
/ Assemble the current line and then disassemble the same address location.
^ Assemble the current line and then disassemble the previous sequential
address location.
<CR> Assemble the current line and then disassemble the next opcode address.
(CTRL)J Assemble the current line. If there isn't a new line to assemble, then
disassemble t he next sequ ential add ress location. O therw ise, dis asse mble the next opcode address.
(CTRL)A Exit the assembler mode of operation.
M68HC11EVB/D 4-99
OPERATING INSTRUCTIONS
ASM Assembler/Disassembler
EXAMPLES DESCRIPTION
>ASM C000<CR> C000 STX $FFFF >LDAA #55<CR> Immediate mode addressing, requires # before 86 55 operand. C002 STX $FFFF >STAA C0<CR> Direct mode addressing. 97 C0 C004 STX $FFFF >LDS 0,X<CR> Index mode, if offset = 0 (,X) will not be accepted. AE 00 C006 STX $FFFF >BRA C500<CR> Branch out of range message.
Branch out of range C006 STX $FFFF >BRA C030<CR> Branch offsets calculated automatically, address 20 28 required as branch operand. C008 STX $FFFF >(CTRL)A Assembler operation terminated. >
NOTE
Above example memory lo catio ns $C000-$C008 cont ain $FF data which disassembles to STX $FFFF.
Refer to the end o f this chapt er for additional operational information pertaining to t he use of the assembler/disassembler.
4-10 M68HC11EVB/D
OPERATING INSTRUCTIONS
BF Block Fill
4.6.2 Block Fill
BF <address1> <address2> <data>
where:
<address1> Lower limit for fill operation. <address2> Upper limit for fill operation.
<data> Fill pattern hexadecimal value.
The BF command allows the user to repeat a specific pattern throughout a determined user memory range. If an invalid address is specified, an invalid address message "rom-xxxx" is displayed on the terminal CRT (xxxx = invalid address).
EXAMPLES DESCRIPTION
>BF C000 C030 FF<CR>
>BF C000 C000 0
Fill each byte of memory from C000 through C030 with data pattern FF.
Set location C000 to 0.
M68HC11EVB/D 4-1111
OPERATING INSTRUCTIONS
BR Breakpoint Set
4.6.3 Breakpoint Set
BR [-][<address>]...
where:
- removes (clears) all breakpoints.
- [<address>]... removes individual or multiple addresses from breakpoint table.
The BR command sets the address into the breakpoint address table. During program execution, a halt occurs to the program execution immediately preceding the execution of any instruction address in the breakpoint table. A maximum of four breakpoints may be set. After setting the breakpoint, the current breakpoint addresses, if any, ar e displayed. Whenever the G, CALL, or P commands ar e invoked, the monitor progr am inserts breakpoints int o t he user co de at t he address specified in the breakpoint table.
Breakpoints are accomplished by the placement of a software interrupt (SWI) at each address specified in the breakpoint address table. The SWI service routine saves and displays the internal machine state, then restores the original opcodes at the breakpoint location before returning control back to the monitor program.
SWI opcode cannot be executed or breakpointed in user code because the monitor pro gram uses the SWI vector. Only RAM lo cations can be br eakpointed. Branch on self instructions cannot be breakpointed.
COMMAND FORMATS DESCRIPTION
BR BR <address> BR <addr1> <addr2> ... BR ­BR -<addr1> <addr2>... BR <addr1> - <addr2>... BR <addr1> -<addr2>...
Display all current breakpoints. Set breakpoint. Set several breakpoints. Remove all breakpoints. Remove <addr1> and add <addr2>. Add <addr1>, clear all entries, then add <addr2>. Add <addr1>, then remove <addr2>.
4-12 M68HC11EVB/D
OPERATING INSTRUCTIONS
BR Breakpoint Set
EXAMPLES DESCRIPTION
>BR C003<CR> Set breakpoint at address location C003.
C003 0000 0000 0000 >
>BR C003 C005 C007 C009<CR> Sets four breakpoints. Breakpoints at same address C003 C005 C007 C009 will result in only one breakpoint being set. >
>BR<CR> Display all current breakpoints.
C003 C005 C007 C009 >
>BR -C009<CR> Remove breakpoint at address location C009.
C003 C005 C007 0000 >
>BR - C009<CR> Clear breakpoint table and add C009.
C009 0000 0000 0000 >
>BR -<CR> Remove all breakpoints.
0000 0000 0000 0000 >
>BR E000<CR> Only RAM locations can be breakpointed.
rom-E000 Invalid address message. 0000 0000 0000 0000 >
>BR C005 C007 C009 C011 C013<CR>Maximum of four breakpoints can be set.
Full Buffer full message. C005 C007 C009 C011 >
M68HC11EVB/D 4-1313
OPERATING INSTRUCTIONS
BULK BULK
4.6.4 Bulk
The BULK command allo ws the user to erase all MCU EEPROM lo cations ($B600-$B7FF). A delay loop is built in such that the erase time is about 10 ms when running at 1 MHz E clock.
NOTE
No e ra s e ve r ific at ion mess a g e w ill be d isp la yed u p o n c o mp letio n o f the bulk EEPROM erase operation. User must verify erase o per at io n by exa mining EE PR OM lo ca tio ns u sing t he MM or MD command.
EXAMPLE DESCRIPTION
>BULK<CR> >
Bulk erase all MCU EEPROM locations ($B600-$B7FF). Prompt indicates erase sequence completed.
4-14 M68HC11EVB/D
OPERATING INSTRUCTIONS
BULKALL BULKALL
4.6.5 Bulkall
BULKALL
The BULKALL command allows the user to erase all MCU EE PROM locations ($B600-$B7FF) including t he configurat ion (CONFIG) register location ($103F). A delay loop is built in such t hat the erase time is about 10 ms when running at 1 MHz E clock. T his co mmand is only applicable for A38P and A95J mask sets. Newer mask sets do not allow CONFIG t o be changed in normal operating modes.
NOTE
No e ra s e ve r ific at ion mess a g e w ill be d isp la yed u p o n c o mp letio n o f the bulkall EEPROM and configuration register erase operation. User must verify erase operat ion by examining EEPROM locations or the configuration register location using the MM or MD command.
CAUTION
Caution should be observed when erasing MCU EEPROM locations. EVB MCU configuration (CONFIG) register ROMON bit is cleared to disable MCU internal ROM, thereby allowing external EPROM containing the BUFFALO program to control EVB operations.
EXAMPLE DESCRIPTION
>BULKALL<CR>
>
Bulk erase all MCU EEPROM ($B600-$B7FF) and configuration register ($103F) locations. Prompt indicates erase sequence completed.
M68HC11EVB/D 4-1515
OPERATING INSTRUCTIONS
CALL CALL
4.6.6 Call
CALL [<address>]
where:
<address> The starting address where user program subroutine execution begins.
The CALL command allows the user to execut e a user program subroutine. Execution starts at the current program counter (PC) address location, unless a starting address is specified. Two extra bytes are placed onto t he stack before the return from interrupt (RTI) is issued so t hat the firs t un ma tc he d re tu rn fr om su bro ut in e ( R T S) en c ou nte r ed w ill r e tu rn c ontr ol back t o the monitor program. Thus any user program subroutine can be called and executed via the monitor pro gr am. Program execution continues until a breakpoint is encountered, or the EVB reset switch S1 is activated (pressed).
Example program for CALL, G, and P command examples
>ASM C000<CR> C000 STX $FFFF >LDAA #44<CR> 86 44 C002 STX $FFFF >STAA C7FC<CR> B7 C7 FC C005 STX $FFFF >NOP<CR> 01 C006 STX $FFFF >NOP<CR> 01 C007 STX $FFFF >NOP<CR> 01 C008 STX $FFFF >RTS<CR> 39 C009 STX $FFFF >(CTRL)A
4-16 M68HC11EVB/D
OPERATING INSTRUCTIONS
CALL CALL
EXAMPLE DESCRIPTION
>CALL C000<CR> Execute program subroutine.
P-C000 Y-DEFE X-F4FF A-44 B-FE C-D0 S-004A Displays register status at time > RTS encountered (except
P register contents).
M68HC11EVB/D 4-1717
OPERATING INSTRUCTIONS
EEMOD EEPROM Modify Mapping
4.6.7 EEPROM Modify Mapping
EEMOD [<address1>] [<address2>]
where:
None Display current starting and ending EEPROM address. <address1> Specify new EEPROM starting address. <address2> Specify new EEPROM ending address.
The EEMOD command is only used when the EVB resident MCU is changed from XC68HC11A1FN device to an XC68HC11A2FN, XC68HC11E2FN, or XC68HC811E2FN device. The EEMOD command informs the monitor where the EEPROM resident MCU is mapped.
If the starting address is specified and the ending addr ess is no t specified, t he re-mapped address location will end at <address1> + 2K bytes.
EXAMPLES DESCRIPTION
>EEMOD<CR> B600 B7FF >
>EEMOD E800<CR> E800 EFFF >
>EEMOD F800 FFFF<CR> F800 FFFF >
Displays current EEPROM starting and ending address locations (XC68HC11A1 device).
Specify remapped EEPROM starting address. Starting address & ending address displayed. Ending address automatically established via (<addr1> + 2K bytes).
Specify remapped EEPROM starting and ending address for an XC68HC811E2 device.
4-18 M68HC11EVB/D
OPERATING INSTRUCTIONS
GGo
4.6.8 Go
G [<address>]
where:
<address> The starting address where program execution begins.
The G command allows the user to initiate user progr am execution (free run in real time). The user may opt ionally specify a st arting address where execution is t o begin. Execution starts at the current program counter (PC) address location, unless a starting address is specified. Program execution continues until a breakpoint is encountered, or t he EVB reset switch S1 is activated (pressed).
NOTE
Refer to example program shown on page 4-15 and insert breakpoints at locations $C005 and $C007 for the following G command example.
EXAMPLE DESCRIPTION
>G C000<CR> P-C005 Y-0000-X-00CD A-44 B-FB C-D0 S-004A >
Begin program execution at PC address location C000.
Breakpoint encountered at C005.
M68HC11EVB/D 4-1919
OPERATING INSTRUCTIONS
HELP HELP
4.6.9 Help
HELP
The HELP command enables the user available EVB command infor mation t o be displayed on the terminal CRT for quick reference purposes.
EXAMPLE
>HELP
ASM [<addr>] Line assembler/disassembler. / Do same address. ^ Do previous address. CTRL-J Do next address. RETURN Do next opcode. CTRL-A Quit. BF <addr1> <addr2> [<data>] Block fill. BR [-][<addr>] Set up breakpoint table. BULK Erase the EEPROM. BULKALL Erase EEPROM and CONFIG. CALL [<addr>] Call user subroutine. G [<addr>] Execute user code. LOAD, VERIFY <T> or <host download command> Load or Verify S-records. MD [<addr1> [<addr2>]] Memory dump. MM [<addr>] Memory modify. / Open same address. CTRL-H or ^ Open previous address. CTRL-J Open next address. SPACE Open next address. RETURN Quit. <addr>O Compute Offset to <addr>. MOVE <s1> <s2> [<d>] Block move. P Proceed/continue execution. RM [P, Y, X, A, B, C, or S] Register modify. T [<n>] Trace n instructions. TM Transparent mode (CTRL-A = exit, CTRL-B = send break). CTRL-H Backspace. CTRL-W Wait for any key. CTRL-X or DELETE Abort/cancel command. RETURN Repeat last command. >
4-20 M68HC11EVB/D
OPERATING INSTRUCTIONS
LOAD LOAD
4.6.10 Load
LOAD <host download command><T>
where:
<host download command> download S-records to EVB via host port.
<T> download S-records to EVB via terminal port.
The LOAD command moves (downloads) object data in S-recor d format (see Appendix A) from an external host computer t o EVB. As the EVB monitor pr ocesses only valid S-reco rd data, it is possible for the monit or t o hang up during a lo ad o perat ion. If an S-record st art ing address points to an invalid memor y locat ion, t he invalid add ress message "err or add r xxxx" is disp layed on t he terminal CRT (xxxx = invalid address).
EXAMPLES DESCRIPTION
>
LOAD cat trial.out<CR>
cat trial.out done >
>
LOAD cat trial.out<CR>
cat trial.out error addr E000 >
LOAD command entered to download data from host computer to EVB via host port.
LOAD command entered.
Invalid address message. S-records must be downloaded into RAM.
Refer to the downloading procedures at the end of this chapter for additional information pertaining to the use of the LOAD command.
M68HC11EVB/D 4-2121
OPERATING INSTRUCTIONS
MD Memory Display
4.6.11 Memory Display
MD [<address1> [<address2>]]
where:
<address1> Memory starting address (optional).
[<address2>] Memory ending address (optional).
The MD command allows the user to display a blo ck of user memor y beginning at address1 and continuing to address2. If address2 is not entered, 9 lines of 16 byt es are displayed beginning at ad dre ss1 . If ad dre ss1 is g rea te r tha n ad dre ss2, th e disp lay will d efau lt t o t he fir st a ddr ess . If n o addresses are specified, 9 lines of 16 bytes are displayed near the last memory location accessed.
EXAMPLES
>
MD E61F<CR>
E61F 42 55 46 46 41 4C 4F 20 33 2E 32 20 28 69 6E 74 29 20 2D 20 42 69 74 20 55 73 65 72 20 46 61 73 74 20 46 72 69 65 6E 64 6C 79 20 41 69 64 20 74 6F 20 4C 6F 67 69 63 61 6C 20 4F 70 65 72 61 >
>
MD C030 C020<CR>
C030 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF >
>
MD C000 C020<CR>
C000 86 04 B7 01 FC 01 01 01 39 FF FF FF FF FF FF C010 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF C020 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF >
FF 9
4-22 M68HC11EVB/D
OPERATING INSTRUCTIONS
MM Memory Modify
4.6.12 Memory Modify
MM [<address>]
where:
<address> is the memory location at which to start display/modify.
CAUTION
Caution should be observed when mo difying E EPROM locatio ns. EVB MCU CONFIG register ROMON bit is cleared to disable MCU internal ROM.
The MM command allows the user to examine/modify contents in user memory at specified lo c a tio n s in a n in te r a ct iv e ma n ne r. The M M c omma n d w ill a ls o e ras e any E EP R O M loc a tion, a n d will reprogram the location with the corresponding value (EEPROM locations treated as if RAM).
Once entered, the MM command has several sub-modes of operation that allo w modification and verification of data. The following subcommands are recognized.
(CTRL)J or (SPACE BAR) or + Examine/modify next location. (CTRL)H or ^ or - Examine/modify previous location. / Examine/modify same location. <CR> Terminate MM operation. O Compute branch instruction relative offset.
If a n inva lid a ddr es s is s pec ified , t he in valid add re ss me ssa ge "ro m" is dis playe d o n t he t er minal CRT.
M68HC11EVB/D 4-2323
OPERATING INSTRUCTIONS
MM Memory Modify
CAUTION
Caution should be observed when mo difying E EPROM locatio ns. EVB MCU CONFIG register ROMON bit is cleared to disable MCU internal ROM.
EXAMPLES DESCRIPTION
>MM C700<CR>
C700 44 66/<CR> C700 66 55 ^ C6FF FF AA<CR>
>MM C13C<CR>
C13C F7 C18EO 51<CR> C13C F7
>MM C000<CR>
C000 55 80 C2 00 CE C4
>MM B600<CR>
Display memory location C700.
Change data at C700 and reexamine location. Change data at C700 and backup one location. Change data at C6FF and terminate MM operation.
Display memory location.
Compute offset, result = $51.
Examine location $C000.
Examine next location(s) using (SPACE BAR).
Examine EEPROM location $B600.
B600 73 52<CR> >MM B600<CR>
B600 52 >
4-24 M68HC11EVB/D
Change data at location $B600. Reexamine EEPROM location $B600.
OPERATING INSTRUCTIONS
MOVE MOVE
4.6.13 Move
MOVE <address1> <address2> [<dest>]
where:
<address1> Memory starting address. <address2> Memory ending address.
[<dest>] Destination starting address (optional).
The MOVE command allows the user to copy/move memory to new memory location. If the destinat ion is not specified, the bloc k of data residing fr om address1 to addr ess2 will be moved up one byte. Using the MOVE command on EEPROM locations will program EEPROM cells.
The MOVE command is useful when programming EEPROM. As an example, a program is created in user RAM using the assembler, debugged using the monitor, and t hen programmed into EEPROM with the MOVE command.
No me ssages will be displayed on th e terminal CR T upon comp letio n of the c opy/mov e op er atio n, only the prompt is displayed.
CAUTION
Caution should be observed when moving data into EEPROM locations. EVB MCU CONFIG register ROMON bit is cleared to disable MCU internal ROM.
EXAMPLE DESCRIPTION
>MOVE E000 E7FF C000<CR>
>
M68HC11EVB/D 4-2525
Move data from locations $E000-$E7FF to locations $C000-$C7FF.
OPERATING INSTRUCTIONS
P Proceed
4.6.14 Proceed/Continue
P
This command is used to proceed or continue program execution without having to remove assigned breakpoints. This command is used to bypass assigned breakpoints in a program executed by the G command.
NOTE
Refer to example program shown on page 4-15 fo r t he fo llo w ing P command example. Breakpoints have been inserted at locations $C005 and $C007 (refer to example on page 4-17).
EXAMPLE DESCRIPTION
>G C000<CR>
P-C005 Y-7982 X-FF00 A-44 B-70 C-D0 S-004A
>P<CR>
P-C007 Y-7982 X-FF00 A-44 B-70 C-C0 S-004A
>
Start execution at C000.
Breakpoint encountered at C005. Continue execution.
Breakpoint encountered at C007.
4-26 M68HC11EVB/D
OPERATING INSTRUCTIONS
RM Register Modify
4.6.15 Register Modify
RM [p, y, x, a, b, c, s]
The RM command is used to modify the MCU program counter (P), Y index (Y), X index (X), A accumulator (A), B accumulator (B), C accumulator (C), and stack pointer (S) register contents.
EXAMPLES DESCRIPTION
>RM<CR> P-C007 Y-7982 X-FF00 A-44 B-70 C-C0 S-0054 P-C007 C020<CR>
>
>RM X<CR> P-C007 Y-7982 X-FF00 A-44 B-70 C-C0 S-0054 X-FF00 C020<CR>
>
>RM<CR> P-C020 Y-DEFE X-C020 A-DF B-DE C-D0 S-0054 P-C020 (SPACE BAR) Y-DEFE (SPACE BAR) X-C020 (SPACE BAR) A-DF (SPACE BAR) B-DE (SPACE BAR) C-D0 (SPACE BAR) S-0054 (SPACE BAR) >
Display P register contents.
Modify P register contents.
Display X register contents.
Modify X register contents.
Display P register contents.
Display remaining registers.
(SPACE BAR) entered following stack pointer display terminates RM command.
M68HC11EVB/D 4-2727
OPERATING INSTRUCTIONS
STOPAT Stop at Address
4.6.16 Stop at Address
STOPAT <address>
where:
<address> The specified user program counter (PC) stop address.
The STOPAT command causes a user program to be executed one instruction at t ime until t he specified address is encountered. Execution begins with t he current user PC address and st op just before execution of the instruction at the specified st op address. The STOPAT co mmand shou ld only be used when the current value of the user PC register is known. For example after a breakpoint is reached or after an RD command is used to set the user PC.
The STOPAT command has an advantage o ver breakpoints in t hat a st op address can be a ROM location while breakpoints only operate in RAM or EEPROM locations. Since the STOPAT command traces one instruction at a time with a hidden return to the monitor after each user instruction, some user programs will appear to execute slowly.
The stop address specified in the ST OPAT command must be the address of an opcode just as breakpoints can only be set at opcode addresses.
NOTE
Refer to example program shown on page 4-15 for the follo wing STOPAT command example. The RD command was used prior to this example to set the user PC register to $C000.
EXAMPLE DESCRIPTION
>STOPAT 0108<CR> P-0108 Y-DEFE X-F4FF A-04 B-FE C-90 S-0047 >
Execute example program until $0108 is reached.
4-28 M68HC11EVB/D
OPERATING INSTRUCTIONS
T Trace
4.6.17 Trace
T [<n>]
where:
<n> The number (in hexadecimal, $1-FF max.) of instructions to execute.
The T command allows the user t o mo nito r program execution on an instruct ion-by-inst ruction basis. The user may optionally execute several instructions at a t ime by entering a count value (up to $FF). E xecution starts at t he current progr am counter (PC). T he PC displayed with the event message is o f the next instruction to be executed. T he t r ace command o per ates by setting the OC5 interrupt to time out after the first cycle of the first opcode fetched.
NOTE
The RD command was used t o set t he user PC register t o $FF85 prior to starting the following trace examples.
SINGLE TRACE EXAMPLE
<CR>
>
T
JMP $E1F7 P-E1F7 Y-FFFF X-FFFF A-04 B-FF C-10 S-0046 >
MULTIPLE TRACE EXAMPLES
T 2<CR>
> PSHA P-E1F8 Y-FFFF X-FFFF A-04 B-FF C-10 S-0046 PSHB P-E1F9 Y-FFFF X-FFFF A-04 B-FF C-10 S-0045
T 3<CR>
> PSHX P-E1FA Y-FFFF X-FFFF A-04 B-FF C-10 S-0043 JSR $E19D P-E19D Y-FFFF X-FFFF A-04 B-FF C-10 S-0041 CMPA #$61 P-E19F Y-FFFF X-FFFF A-04 B-FF C-19 S-0041
T 4<CR>
> BLT $E1A7 P-E1A7 Y-FFFF X-FFFF A-04 B-FF C-19 S-0041 RTS P-E1FD Y-FFFF X-FFFF A-04 B-FF C-19 S-0043 CMPA #$30 P-E1FF Y-FFFF X-FFFF A-04 B-FF C-19 S-0043 BLT $E223 P-E223 Y-FFFF X-FFFF A-04 B-FF C-19 S-0043 >
M68HC11EVB/D 4-2929
OPERATING INSTRUCTIONS
TM Transparent Mode
4.6.18 Transparent Mode
TM
The TM command connects the EVB host port to the terminal port, which allows direct communication between the terminal and the host computer. All I/O between the ports are ignored by the EVB until the exit character is entered from the terminal.
The TM subcommands are as follows:
(CTRL)A Exit from transparent mode. (CTRL)B Send break to host computer.
EXAMPLE DESCRIPTION
>TM<CR>
appslab login: ED<CR> Password:XXXX<CR>
"System Message"
$ . . . $(CTRL)A >
Enter transparent mode.
Host computer login response. XXXX = host computer password.
Task completed. Enter exit command. Exit transparent mode.
Refer to the downloading procedures at the end of this chapter for additional information pertaining to the use of the TM command.
4-30 M68HC11EVB/D
OPERATING INSTRUCTIONS
VERF Verify
4.6.19 Verify
VERIFY <host download command><T>
where:
<host download command> Compare memory to host port download data.
<T> compare memory to terminal port download data.
The VERIFY command is similar to the LOAD command except that the VERIFY command instructs the EVB to compare the downloaded S-record data to the data stored in memory.
EXAMPLES DESCRIPTION
>VERIFY cat trial.out<CR> cat trial.out done >
>VERIFY cat trial.out<CR> cat trial.out
error addr E000 >
Enter verify command.
Verification completed.
Enter verify command. Mismatch encountered.
Error message displaying first byte address.
Refer to the downloading procedures at the end of this chapter for additional information pertaining to the use of the LOAD command.
M68HC11EVB/D 4-3131
OPERATING INSTRUCTIONS
XBOOT Transfer Data Bootstrap Mode
4.6.20 Transfer Data Bootstrap Mode
XBOOT [<address1> [<address2>]]
where:
<address1> Starting address. <address2> Ending address.
The XBOOT command loads/transfers a block of data from address1 through address2 via the serial co mmunications int erface (SCI) to another MC68HC11 MCU device which has been reset in t he bootstr ap mode. A leading control character o f $FF is sent prior t o sending the data block. This control character is part of the boot str ap mode prot o co l and establishes the baud rate for t he rest of the transfer.
If on ly o n e a dd r e s s is p rovid e d , the a dd r e s s w ill b e u s e d a s the s ta r tin g ad d r e s s a n d the bloc k s iz e will default to 256 bytes. If no addresses are provided, the block of addresses from $C000 through $C0FF is assumed by the BUFFALO monitor program.
NOTE
The MC68HC11A8 MCU requires a fixed block size o f 256 byt es for bootloading while the MC68HC11E9 MCU can accept a variable length block of 1 to 512 bytes.
The XBOOT command generates SCI transmitter output signals at 7812.5 baud which are intended for another MC68HC11 MCU device operating in the bootstrap mode. These signals appear as nonsense data to the terminal display used for no rmal communicat ion with t he EVB. After using the XBOOT command the EVB must be reset by pressing the reset switch S1 before normal communications can resume.
4-32 M68HC11EVB/D
OPERATING INSTRUCTIONS
XBOOT Transfer Data Bootstrap Mode
The following procedure describes the use of the XBOOT command:
1. As se mble o r fill EV B M CU E EP RO M (lo c at io ns $B 600-$B6FF) wit h program to be bootloaded (transmitted/transferred) to target MC68HC11 MCU device.
2. Ent er XBOOT command and addresses without pr essing carriage return <CR> key as follows:
>XBOOT B600 B6FF (Do not press the RETURN key.)
3. Remove previously installed fabricated jumper from jumper header J6.
4. Connect jumper wire from jumper header J6 pin 1 to RxD input o f targ et MC68HC11 MCU device.
5. Reset target MC68HC11 MCU device in bootstrap mode.
6. Press carriage return <CR> key to invoke XBOOT command. Since TxD is not connected to the terminal, the user will not observe any changes on
the terminal display CRT. The bootload process takes approximately a third of a second to finish.
7. Disconnect jumper wire installed in step d.
8. Install fabricated jumper removed in step c.
9. Press EVBU reset switch S1 to restore normal EVB operation.
M68HC11EVB/D 4-3333
OPERATING INSTRUCTIONS
4.7 ASSEMBLY/DISASSEMBLY PROCEDURES
Th e as semb ler/ dis ass emble r is a n int er ac tive ass emble r/ edit o r. Ea ch s ou rc e line is co nve rt ed int o the proper machine language code and is stored in memory overwriting previous dat a on a line­by-line basis at the time of entry. In order to display an instruction, the machine code is disassembled and the instruction mnemonic and operands are displayed. All valid opcodes are converted to assembly language mnemonics. All invalid opcodes are displayed on the terminal CRT as "ILLOP".
The syntax rules for the assembler are as follows: (a.) All numerical values are assumed to be hexadecimal. Therefore no base designators (e.g., $ = hex, % = binary, etc.) are allowed. (b.) Operands must be separated by o ne or more space or tab charact ers. (c.) Any characters after a valid mnemonic and associated operands are assumed to be comments and are ignored.
Addressing modes are designated as follows: (a.) Immediate addressing is designated by preceding the address with a # sign. (b.) Indexed addressing is designated by a comma. The comma must be preceded a one byte relative offset ( even if t he offset is 00), and the co mma must be followed by an X or Y designating which index register to use ( e.g., LDAA 00,X). (c.) Direct and extended addressing is specified by the length of the address o perand (1 or 2 digits specifies direct, 3 or 4 digits specifies extended). Extended addressing can be forced by padding the address operand with leading zero s. (d.) Relative offsets for branch instructions are computed by the assembler. T herefore the valid operand for any branch instruction is the branch-if-t r ue address, not the relative offset.
Ass e mble r/ d is as se mb ler s ub comma nd s ar e a s fo llo w s . I f t he a ss emb le r d ir e cts a n e rr or in th e n ew source line, the assembler will output an error message and then reopen the same address location.
/ Assemble the current line and then disassemble the same address location.
^ Assemble the current line and then disassemble the previous sequential
address location.
<CR> Assemble the current line and then disassemble the next opcode address.
(CTRL)J Assemble the current line. If there isn't a new line to assemble, then
disassemble t he next sequ ential add ress location. O therw ise, dis asse mble the next opcode address.
(CTRL)A Exit the assembler mode of operation.
4-34 M68HC11EVB/D
OPERATING INSTRUCTIONS
When a new sourc e line is assembled, the assemb ler ov er wr ites what was previo usly in memory. If no new source line is submitted, or if there is an error in the source line, then the contents of memory remain unchanged. Each of the instruction pairs Arithmetic Shift Left (ASL)/Logical Sh ift Le ft (L SL) hav e t h e s a me op c od e, s o d is a s s e mbly always disp lays th e ASL mn e monic . I f th e as semble r t r ies t o ass emble at an a ddr es s t hat is no t in R AM, an invalid ad dr es s mes sag e " ro m­xxxx" is displayed on the terminal CRT (xxxx = invalid address).
The following pages describe how to operate the assembler/disassembler by creating a typical program loop, and debugging t he program by t he use of the EVB monitor co mmands. A t ypical Serial Communications Interface (SCI) program loop is first assembled. Routine examples are then provided to illustrate how to perform breakpoint setting, proceeding from breakpoint, register display and modification, and initiation of user program execution.
A program loop (that transmits RAM data from the SCI transmitter to the SCI receiver) is assembled as follows:
EXAMPLE PROGRAM PROGRAM DESCRIPTION
>BF C200 C21F 00<CR>
>ASM C000
C000 CLR $0800 >LDY #C200<CR> 18 CE C2 00 C004 TEST >LDX #C400<CR> CE C4 00 C007 TEST >LDAA 102E<CR> B6 10 2E C00A TEST >LDAA 0,X<CR> A6 00 C00C TEST >STAA 102F<CR> B7 10 2F C00F INX >LDAA 102E<CR> B6 10 2E C012 TEST >ANDA #80<CR> 84 80 C014 TEST >BEQ C00F<CR> 27 F9 C016 BITB $80F6 >LDAA 102E<CR> B6 10 2E C019 BVS $C01B >ANDA #20<CR> 84 20
Clear memory space.
Enter assembler/disassembler mode.
First byte where data is stored.
Point to data to be fetched.
Clear RDRF bit if set.
Get first data byte.
Store data in SCI data register.
Read SCI status register.
Send data byte.
Wait for empty transmit data reg.
Read SCI status register.
Extract RDRF bit from status reg.
(continued)
M68HC11EVB/D 4-3535
OPERATING INSTRUCTIONS
EXAMPLE PROGRAM PROGRAM DESCRIPTION
C01B STX $00FF >BEQ C016<CR> Branch true = SCI RDR not full. 27 F9 Branch false = SCI RDR full. C01D STX $4D65 >LDAA 102F<CR> Read data from SCI RDR. B6 10 2F C020 STAA $00,Y >STAA 0,Y<CR> Store data byte. 18 A7 00 C023 STX $00FF >INX<CR> Increment fetch pointer. 08 C024 TEST >INY<CR> Increment storage pointer. 18 08 C026 ASRB >CPX #C41F<CR> Done sending data? 8C C4 1F C029 ASLD >BEQ C02E<CR> 27 03 C02B STX $00FF >JMP C00C<CR> No, get next data byte. 7E C0 0C C02E MUL >BRA C02E<CR> Yes, stop here. 20 FE C030 ILLOP >(CTRL)A Exit assembler/dissembler mode. >
The routines, on the next page, are performed on the SCI program loop just assembled:
NOTE
Connector P1 pins 20 and 21 are connected (connects SCI transmitter to the receiver) in order to perform the following routines.
4-36 M68HC11EVB/D
OPERATING INSTRUCTIONS
TERMINAL CRT/KEYBO ARD ROUTINE DESCRIPTION
>RM Display user machine state. P-C000 Y-E8CC X-6FD1 A-DF B-0F C-D0 S-0054 P-C000 C000 Y-E8CC (SPACE BAR) X-6FD1 (SPACE BAR) A-DF (SPACE BAR) B-0F (SPACE BAR) C-D0 FF >BF C400 C41F 55<CR> Block fill with $55.
>MD C400 C41F<CR> Verify block fill.
C400 55 55 55 55 55 55 55 55 55 55 55 55 55 55 55 55 UUUUUUUUUUUUUUUU C410 55 55 55 55 55 55 55 55 55 55 55 55 55 55 55 55 UUUUUUUUUUUUUUUU >BF C200 C220 00<CR> Clear data storage area.
>BR C004 C00A C02E<CR> Set breakpoints.
C004 C00A C02E 0000 >G C000<CR> Execute program.
P-C004 Y-C200 X-6FD1 A-DF B-0F C-F9 S-004A >P<CR> Proceed thru first breakpoint.
P-C00A Y-C200 X-C400 A-C0 B-0F C-E9 S-004A >BR C024<CR> Insert breakpoint.
C004 C00A C02E C024 >P<CR>
P-C024 Y-C200 X-C401 A-55 B-0F C-E1 S-004A >MD C200 C210<CR> Display machine state after first loop.
C200 55 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 U C210 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 >P
P-C024 Y-C201 X-C402 A-55 B-0F C-E1 S-004A >MD C200 C210<CR> Display machine state after second loop. C200 55 55 00 00 00 00 00 00 00 00 00 00 00 00 00 00 UU C210 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 >BR -C024<CR> Remove breakpoint.
C004 C00A C02E 0000
(continued)
M68HC11EVB/D 4-3737
OPERATING INSTRUCTIONS
TERMINAL CRT/KEYBO ARD ROUTINE DESCRIPTION
>P
<CR>
P-C02E Y-C21F X-C41F A-55 B-0F C-E4 S-004A >MD C200 C210 C200 55 55 55 55 55 55 55 55 55 55 55 55 55 55 55 55 UUUUUUUUUUUUUUUU C210 55 55 55 55 55 55 55 55 55 55 55 55 55 55 55 00 UUUUUUUUUUUUUUU >
<CR>
Display machine state after last breakpoint.
4-38 M68HC11EVB/D
OPERATING INSTRUCTIONS
4.8 DOWNLOADING PROCEDURES
This portion of text describes the EVB downloading procedures. The downloading operation enables the user to transfer information from Motorola's EXORciser development station or a host (personal) computer to the EVB (or target system memory). Specific downloading procedures are described enabling the user to perform downloading operations with an EXORciser development station and host personal computer (PC) systems.
EXORciser downloading operations are accomplished utilizing t he TM and LOAD co mmands. The TM (Transparent Mode) co mmand connects t he EVB host port to the t erminal port, which allo ws direct communication between the terminal and host computer. All I/O between the port s are ignored by the EVB until the exit command (CTRL)A is entered from the terminal. The LOAD command moves data informatio n in S-record format (see
Appendix A
host computer to the EVB user RAM. The VERIFY command is used t o compare the S-reco rd data to memory data.
Ensure that a jumper is installed on pins 1 and 2 of t he ho st port RX signal disabling header J4 during all downloading operations or when communicating to a host computer ( e.g., E XORciser) in the transparent mode. (Refer to
paragraph 2.3.6
.) The tr ansparent mo de of operation is not applicable to the PC to EVB operations. Therefore the TM command is not utilized in the PC (e.g., Apple Macintosh and IBM-PC) downloading procedures.
) from an external
The following pages provide examples and descriptions of how to perform EVB downloading operations in conjunction with an EXORciser development station, and Apple Macintosh and IBM-PC host computer systems.
Downloading operations allow Mo toro la's S-reco rd files to be transferred fro m a ho st computer to t he EVB o r t o be verified against data in EVB memor y. S-reco rd files are made up o f data and checksum values in a special format which facilitates downloading.
A software terminal emulator program is required for PC downloading S-record files. Some typical terminal emulat or prog rams for t he IBM-PC include PROCOMM and KERMIT. Typical terminal emulator programs for the Apple Macintosh include MacTerminal and Red Ryder.
S-record programs for downloading are created by assembling programs on the PC. The steps needed to develop a program are described briefly as follows:
1. Asse mb ly la n g u a ge p r og ra m is e nte red into a te x t file on the PC . A te xt e d itor is u s e d to create this text file which is called a source program.
2. An assembler pro gram operating on the PC is used to translate the source program int o an S-r e c or d o bje c t file a n d / or lis ting file . B u f25.a s m file on the EV B d is k e tte is a n example of a large listing.
3. Aft er t he creat ion of the S-reco rd files, the files are downloaded to the EVB as sho wn in the following step-by-step procedures.
M68HC11EVB/D 4-3939
OPERATING INSTRUCTIONS
4.8.1 EXORciser to EVB
To perform the EXORciser to EVB downloading procedure, perform/observe the following:
EXAMPLES DESCRIPTION
>TM <CR> <CR>
EXBUG09 2.1 *E MDOS <CR> MDOS09 3.05 =(CTRL)A >LOAD COPY TRIAL.LX:1,#CN
>LOAD COPY TRIAL.LX:1,#CN COPY TRIAL.LX:1,#CN done >
>LOAD COPY TRIAL.LX:1,#CN COPY TRIAL.LX:1,#CN
error addr F800 >
<CR>
<CR>
<CR>
EXORciser initialized into MDOS via TM command to download S-records.
Exit transparent mode. LOAD command entered to download data to EVB through host port.
LOAD command entered. Downloading successful. Data transfer completed.
LOAD command entered. Downloading unsuccessful. Error address displayed.
>VERIFY COPY TRIAL.LX:1,#CN COPY TRIAL.LX:1,#CN done >
>VERIFY COPY TRIAL.LX:1,#CN COPY TRIAL.LX:1,#CN
error addr F800 >
4-40 M68HC11EVB/D
<CR>
<CR>
VERIFY command entered. Compares S-records to RAM file. Comparison verified.
VERIFY command entered. Verification unsuccessful. Error address displayed.
OPERATING INSTRUCTIONS
4.8.2 Apple Macintosh (with MacTerminal) to EVB
The MacTerminal downlo ading prog ram in this application is used as a terminal emulator for the Apple Macintosh computer. To download a Motorola S-record file from the Apple Macintosh computer to the EVB, perform the following steps:
1. Select the following menu Terminal Settings:
Terminal: TTY Cursor Shape: Underline Line Width: 80 Columns Select: On Line
Auto Repeat
Click on: OK
2. Select the following menu Compatibility Settings:
Baud rate: 9600 (same as EVBU) Bits per Character: 8 Bits Parity: None Handshake: None Connection: Modem or Another Computer Connection Port: Modem or Printer Click on: OK
3. Select the following menu File Transfer Settings:
Settings for Pasting or Sending Text: Word Wrap Outgoing Text
File Transfer Protocol: Text
Settings for Saving Lines Off Top: Retain Line Breaks
Click on: OK
4. Apply power to the EVB.
5. Press Apple Macintosh computer keyboard carriage return <CR> key to display applicable EVB monitor prompt.
6. Apple Macintosh computer displays the > prompt.
M68HC11EVB/D 4-4141
OPERATING INSTRUCTIONS
7. Enter EVB monitor download command as follows:
>LOAD T (Press RETURN after entering LOAD T.)
8. Operate pull-down File menu, and select (choose): Send File ...
9. Use dialog box and select applicable S-record object file.
Click on: Send
Motorola S-record file is now transferred to the EVB.
S- r e cor d file will n o t be d isp la yed du r ing t he file t r a ns fe r t o the EVB.
Upon completion of the S-record transfer, the following message is displayed:
done >
NOTE
NOTE
The EVB may have to be reset to regain monitor control depending on the version of BUFFALO and how the file transfer program terminates the download operation.
There is a problem which occurs when using the EVB with the MacTerminal program when performing a downloading operat ion. The MacTerminal program sends a carriage ret urn and line feed characters at the end of the downloaded S-record file. The EVB monitor treats this as a erroneous command; you must RESET the EVB to regain control of the monitor.
4-42 M68HC11EVB/D
OPERATING INSTRUCTIONS
4.8.3 Apple Macintosh (with Red Ryder) to EVB
1. Launch Red Ryder program.
2. Set up computer program to match EVB baud rate (typically) as follows:
9600 baud, no parity, 8-bits, 1-stop bit, full duplex
3. Apply power to EVB.
4. Press Apple Macintosh computer keyboard carriage return <CR> key to display applicable EVB monitor prompt.
5. Enter EVB monitor download command as follows:
>LOAD T (Press RETURN after entering LOAD T.)
6. Operate pull-down File menu, and select (choose):
Send File - ASCII...
7. Use dialog box and select applicable S-record object file.
Click on: Send
Motorola S-record file is now transferred to the EVB.
NOTE
S- r e cor d file will n o t be d isp la yed du r ing t he file t r a ns fe r t o the EVB.
Upon completion of the S-record transfer, the following message is displayed:
done >
M68HC11EVB/D 4-4343
OPERATING INSTRUCTIONS
4.8.4 IBM-PC (with KERMIT) to EVB
Prior to perfo rming any I BM- PC operation, ensure that bot h IBM-PC and EVB baud rat es are identical, and that t he IBM-P C asynchronous port is configured for terminal mode of operation. I f the asynchro nous por t is hard wired fo r host mode of operation and cannot be reconfigured fo r a terminal mode of operation, the use a null modem (transmit (TxD) and receive (RxD) and associated handshake lines are cross coupled) is required.
NOTE
IBM-PC to EVB interconnection is accomplished by one RS-232C cable assembly. This cable is connected to the EVB terminal I/O port connector P2 for downloading operations.
To perform the IBM-PC to EVB downloading procedure, perform/observe the following:
EXAMPLE DESCRIPTION
C>KERMIT<CR> IBM-PC Kermit-MS VX.XX Type ? for help
Kermit-MS>SET BAUD 9600<CR> Kermit-MS>CONNECT<CR>
[Connecting to host, type Control-] C to return to PC]
<CR> >LOAD T<CR>
(CTRL)C
Kermit-MS>PUSH<CR>
The IBM Personal Computer DOS Version X.XX (C)Copyright IBM Corp 1981, 1982, 1983
C>TYPE (File Name) > COM1
C>EXIT
<CR>
<CR>
IBM-PC prompt. Enter Kermit program.
Set IBM-PC baud rate. Connect IBM-PC to EVB.
EVB download command (via terminal port) entered.
Motorola S-record file name.
S-record downloading completed.
Kermit-MS>CONNECT
>(CTRL)C Kermit-MS>EXIT
4-44 M68HC11EVB/D
<CR>
<CR>
Return to EVB monitor program.
Exit Kermit program.
OPERATING INSTRUCTIONS
4.8.5 IBM-PC (with PROCOMM) to EVB
To perform the IBM-PC to EVB do wnloading pro cedure with PROCOMM, perform/observe the following:
1. Invoke the PROCOMM.EXE program.
2. Setup PROCOMM to match EVB baud rate and protocol (type (Alt)S, then the number 2) as follows:
9600 baud, no parity, 8-bits, 1-stop bit, full duplex
3. Setup ASCII transfer parameters (type (Alt)S, then the number 6) as follows:
Echo Local - Yes Expand Blank Lines - Yes Pace Character - 0 Character pacing - 25 (1/1000 second) Line Pacing - 10 CR Translation - None LF Translation - None Save above settings to disk for future use.
4. Apply power to EVB.
5. Press IBM-PC keyboard carriage return <CR> key to display applicable EVB monitor prompt.
6. Enter EVB monitor download command as:
>LOAD T (Press RETURN after entering LOAD T.)
7. Instruct PROCOMM to send the S- record file by pressing the Pg Up key on the PC, then follow PROCOMM instructions on the display screen to select the S-record file.
Motorola S-record file is now transferred to the EVB. Upon completion of the S-record transfer, the following message is displayed:
done >
M68HC11EVB/D 4-4545
OPERATING INSTRUCTIONS
4-46 M68HC11EVB/D
HARDWARE DESCRIPTION
CHAPTER 5
HARDWARE DESCRIPTION
5.1 INTRODUCTION
This chapter pr ovides an overall general description o f the EVB hardware. This description is supported by a simplified block diagram (Figure 5-1) and a memory map diagram (Figure 5-2). The EVB schematic diagram, located in Chapter 6, can also be referred to for the following descriptions.
5.2 GENERAL DESCRIPTION
Overall evaluation/debugging contro l of the EVB is provided by the monit o r BUFFALO program residing in EPROM (external to the MCU) via terminal intervention. The target system interface is provided by the MCU and PRU devices. RS-232C terminal/host I/O port interface circuitry provides communication and data transfer oper ations between the EVB and ext er nal terminal/ho st computer devices.
5.2.1 Microcomputer
The M68HC11A1 MCU (U10) operat es in the expanded mode of operation. This is accomplished by +5 Vdc applied to the MCU MODA and MODB pins. The MCU configuration (CONFIG) register (implemented in EEPROM) is programmed such t hat t he ROMON bit is cleared for EVB operations. When this bit is cleared, MCU internal ROM is disabled , and that memory space becomes externally accessed space. This allows the memory at $E000-$FFFF to contain the monitor BUFFALO program (or user program for emulation) in external EPROM.
The mo nitor progr am uses t he MCU internal RAM locat ed at $0048-$00FF. The contr ol registers are located at $1000-$103F.
The EVB allows the user to use all the features of the monitor BUFFALO program, however it should be noted that the monit or program uses the MCU on-chip RAM locations $0048-$00FF leaving only 72 bytes for the user (i.e., $0000-$0047). This should be remembered when writing code.
M68HC11EVB/D 5-1
HARDWARE DESCRIPTION
5.2.2 Port Replacement Unit
The EVB operates in the expanded multiplexed mode of operat ion. An MC68HC24 PRU device (U1) is used t o replace the MCU I/O po rts B and C (including STRA and STRB control lines) us e d for sin g le c hip mod e o f o pe r a tion. T h e P R U pr ovid e s th e r e qu ir e d sin g le c h ip mod e I/ O lin e s for target system evaluation (emulation) via the EVB MCU extension I/O port connector P1.
5-2 M68HC11EVB/D
Figure 5-1. EVB Block Diagram
HARDWARE DESCRIPTION
INTERNAL RAM
(MCU RESERVED)
NOT USED
PRU+REG.DECODE
NOT USED
FLIP-FLOP DECODE
OPTIONAL 8K RAM
NOT USED
TERMINAL ACIA
NOT USED
$0000 $00FF $0100 $0FFF $1000 $17FF $1800 $3FFF $4000 $5FFF $6000 $7FFF $8000 $97FF $9800 $9FFF $A000 $B5FF
EEPROM
$B600 $B7FF $B800
NOT USED
$BFFF $C000
USER RAM
$DFFF $E000
MONITOR EPROM
$FFFF
$0000-$0032 USER RAM $0033-$0047 USER STACK POINTER $0048-$00C3 MONITOR VARIABLES $00C4-$00FF VECTOR JUMP TABLE
Figure 5-2. EVB Memory Map Diagram
M68HC11EVB/D 5-3
HARDWARE DESCRIPTION
5.2.3 Memory
Th e E V B memor y ma p is a s in g le ma p de sign. Use r R AM r esid e s at d iffe re nt a d dr e s s loca tions to that o f the MCU ROM. Any code debugged in the RAM which is no t re-locatable will re quir e modification before being tr ansferred to EPROM and executed instead of t he monitor (evaluation mode).
To evaluate programs normally held in ROM, an 8k byte RAM is provided (socket U5). An access time o f 250 nanoseconds is necessary for a bus frequency of 2.1 MHz. Jumper headers J3 and J7 configure socket U4 for an additional 8k byte RAM supplied by the user if r equired. Refer to paragraph 2.3.3 for additional memory select information.
5.2.4 Address Decoding/De-multiplexing
Address decoding is accomplished via a MC74HC138 device (U6) and is segmented into 8k byte blocks. The low order address and data lines are de-multiplexed using a MC74HC373 device (U2), to communicat e with ROM, RAM, and the ACIA. The PRU uses a mult iplexed input direct from the MCU.
5.2.5 RS-232C I/O Port Interface Circuits
The EVB uses an MC68B50 ACIA device (U9) to co mmunicate to a ter minal via an RS-232C driver/receiver interface (terminal I/O port). The terminal I/O port baud rate is hardware selectable (300-9600 baud) via jumper header J5.
A second RS-232C driver/receiver interface (ho st I/O port) is fixed at 9600 baud via the MCU SCI using a 2 MHz E clock external bus. This baud rate can be changed by software by re pr og r a mmin g the BA U D re g is te r in the O NS C I s u b ro u tin e o f th e B UFF AL O monitor p ro gr a m. Refer to the buf25.asm file on the EVB diskette for additional information pertaining to the ONSCI subroutine.
The host I/O po rt is provided for do wnloading Motor ola S- records via t he BUFFALO monitor commands. When using the host I /O port, either by executing t he HOST or LOAD commands, The target system Serial Co mmunications Interface (SCI) is switched to the host I/O por t via the MC74HC4066 digital switch device (U7) and MC74HC74 latch device (U11). The receiver connection from the host I/O por t is now connected to t he RXD port o f the MCU. T he switching of the receiver line from the target system to t he host I /O port is accomplished by wr iting a lo gic one in the bit 0 to any address in t he range $4000-$5FFF. Likewise, writ ing a zer o in bit 0 t o any address in the same range results in the target system being connected to the RXD pin of the MCU.
As the RS-232C handshake lines are not used, a delay of approximately 300 milliseconds is present between successive characters sent to the host computer during the execution of the LOAD command in the monitor program.
5-4 M68HC11EVB/D
SUPPORT INFORMATION
CHAPTER 6
SUPPORT INFORMATION
6.1 INTRODUCTION
This chapt er provides the connector signal descr iptions, part s list with associated par ts location diagram, and schematic diagrams for the EVB.
6.2 CONNECTOR SIGNAL DESCRIPTIONS
The EVB provides one input/output (I/O) connector that is used to interconnect the EVB t o a target system. Connector P1 facilitates this interconnection.
Connect ors P2 and P3 are also provided to facilitate interconnection of a terminal and a host computer, respectively. Connector P4 interconnects an external power supply to the EVB.
Pin assignment s for the above connectors (P1 t hrough P4) are identified in Tables 6-1 t hrough 6­4, respectively. Co nnecto r signals are identified by pin number, signal mnemonic, and signal name and description.
M68HC11EVB/D 6-11
SUPPORT INFORMATION
Table 6-1. MCU I/O Port Connector (P1) Pin Assignments
Signal
Pin Number
1 GND Ground 2 MODB MODE B - An input control line used for MCU mode selection.
3 MODA MODE A - An input control line used for MCU mode selection
4 STRA STROBE A - An input control line used for parallel port I/O
5 E ENABLE CLOCK - An output control line used for timing
Mnemonic Signal Name and Description
A high level enables the expanded multiplexed mode, and a low level enables the special test mode of the EVB MCU.
during reset. An open-drain output line used for LIR* status indication.
operations.
reference. E clock frequency is one fourth the frequency of the XTAL and EXTAL pins.
6 STRB STROBE B - An output control line used for parallel port I/O
operations. 7 EXTAL EXTAL - External MCU clock input line. 8 XTAL XTAL - Internal MCU clock line used to control the EVB clock
generator circuitry.
9-16 PC0-PC7 PORT C (bits 0-7) - General purpose I/O lines.
17 RESET* RESET - An active low bi-directional control line used to
initialize the MCU.
18 XIRQ* X INTERRUPT REQUEST - An active low input line used to
request asynchronous non-maskable interrupts to the MCU.
6-2 M68HC11EVB/D
SUPPORT INFORMATION
Table 6-1. MCU I/O Port Connector (P1) Pin Assignments (continued)
Signal
Pin Number
19 IRQ* INTERRUPT REQUEST – An active low input line used to
Mnemonic Signal Name and Description
request asynchronous interrupts to the MCU.
20 21 22 23 24 25
26 VDD VDD – +5.0 Vdc power. 27-34 PA7-PA0 PORT A (bits 7-0) – General purpose I/O lines. 35-42 PB7-PB0 PORT B (bits 7-0) – General purpose output lines. 43
44 45 46 47 48 49 50
51 VRL VOLTAGE REFERENCE LOW - Input reference supply
PD0 PD1 PD2 PD3 PD4 PD5
PE0 PE4 PE1 PE5 PE2 PE6 PE3 PE7
PORT D (bits 0-5)
can be used with the MCU Serial Communications
Interface(SCI) and Serial Peripheral Interface(SPI).
PORT E (bits 0-7)
input lines.
voltage (low) line for the MCU analog-to-digital (A/D)
converter. Used to increase accuracy of the A/D conversion.
General purpose I/O lines. These lines
General purpose input or A/D channel
52 VRH VOLTAGE REFERENCE HIGH - Input reference supply
53-60 NC Not connected.
M68HC11EVB/D 6-33
voltage (high) line. Same purpose as pin 51.
SUPPORT INFORMATION
Table 6-2. Terminal I/O Port Connector (P2) Pin Assignments
Signal
Pin Number
1 GND PROTECTIVE GROUND 2 RXD RECEIVED DATA - Serial data input line. 3 TXD TRANSMITTED DATA - Serial data output line. 4 NC Not connected. 5 CTS CLEAR TO SEND - An output signal used to indicate ready-
6 DSR DATA SET READY - An output signal used to indicate an on-
Mnemonic Signal Name and Description
to-transfer data status. This pin is connected to both DSR pin
6 and DCD pin 8.
line/in-service/active status. This pin is connected to both
CTS pin 5 and DCD pin 8. 7 SIG-GND SIGNAL GROUND - This line provides signal ground or
common return connection (common ground reference)
between the EVB and RS-232C compatible terminal. 8 DCD DATA CARRIER DETECT - An output signal used to indicate
an acceptable received line (carrier) signal has been detected.
This pin is connected to both CTS pin 5 and DSR pin 6.
9-19 NC Not connected.
20 DTR DATA TERMINAL READY - An input line used to indicate an
on-line/in-service/active status.
21-25 NC Not connected.
6-4 M68HC11EVB/D
SUPPORT INFORMATION
Table 6-3. Host I/O Port Connector (P3) Pin Assignments
Signal
Pin Number
1 GND PROTECTIVE GROUND 2 RXD RECEIVED DATA - Serial data output line. 3 TXD TRANSMITTED DATA - Serial data input line.
4, 5 NC Not connected.
6 DSR DATA SET READY - An output signal used to indicate an on-
7 SIG-GND SIGNAL GROUND - This line provides signal ground or
Mnemonic Signal Name and Description
line/in-service/active status. This pin is connected to DCD pin
8.
common return connection (common ground reference)
between the EVB and RS-232C compatible host computer. 8 DCD DATA CARRIER DETECT - An output signal used to indicate
an acceptable received line (carrier) signal has been detected.
This pin is connected to DSR pin 6.
9-19 NC Not connected.
20 DTR DATA TERMINAL READY - An input line used to indicate an
on-line/in-service/active status.
21-25 NC Not connected.
M68HC11EVB/D 6-55
SUPPORT INFORMATION
Table 6-4. Input Power Connector (P4) Pin Assignments
Signal
Pin Number
1 -12 V -12 Vdc Power - Input voltage (-12 Vdc @ 0.1 A) used by the
2 GND GROUND 3 +5 V +5 Vdc Power - Input voltage (+5 Vdc @ 0.5 A) used by the
4 +12 V +12 Vdc Power - Input voltage (+12 Vdc @ 0.1 A) used by the
Mnemonic Signal Name and Description
EVB logic circuits.
EVB logic circuits.
EVB logic circuits.
6-6 M68HC11EVB/D
SUPPORT INFORMATION
6.3 PARTS LIST
Table 6-5 lists the components of the EVB by reference designation order. The reference designat ion is used to identify the particular part on the parts location diagram (Figure 6-1) t hat is associated with the parts list table. This parts list reflects the latest issue of hardware at the time of printing.
Figure 6-1. EVB Parts Location Diagram
M68HC11EVB/D 6-77
SUPPORT INFORMATION
Table 6-5. EVB Parts List
Reference Designation Component Description
Printed Wiring Board (PWB) M68HC11EVB
C1-C5, C8-C11, C13, C14, C17, C18 Capacitor, 0.1 uF @ 50 Vdc, +/-20%
C6, C7, C16 Capacitor, 24 pF @ 50 Vdc, +/-20%
C12 Capacitor, 1.0 uF @ 50 Vdc, +/-20% C15 Capacitor, electrolytic, 100 uF @ 50 Vdc, +/-20%
J1, J3, J6 Header, jumper, single row post, 2 pin, Aptronics # 929705-
01-02
J2, J4 Header, jumper, single row post, 3 pin, Aptronics # 929705-
01-03
J5 Header, jumper, double row post, 12 pin, Aptronics # 929715-
01-06
P1 Header, double row post, 60 pin, Aptronics # 929715-01-30
(MCU I/O port connector)
P2, P3 Connector, cable, 25-pin, ITT # DBP-25SAA (terminal/host I/O
port connector)
P4 Terminal block, 4 position, Electrovert # 25.112.0453 (power
supply connector)
R1-R3, R5-R10 Resistor, 10k ohm, 5%, 1/4W
R4 Resistor, 10M ohm, 5%, 1/4W
R11, R13-R15 Resistor, 27k ohm, 5%, 1/4W
R12 Resistor, 620 ohm, 5%, 1/4W
6-8 M68HC11EVB/D
SUPPORT INFORMATION
Table 6-5. EVB Parts List (continued)
Reference Designation Component Description
R16 Resistor, 100k ohm, 5%, 1/4W
R17, R18 Resistor, 2.2k ohm, 5%, 1/4W
S1 Switch, push-button, SPDT, C&K #8125-R2/7527 U1 I.C., MC68HC24FN, PRU U2 I.C., MC74HC373N, transparent latch U3 I.C., 2764, 8k EPROM, 250 nS U4 I.C., MCM6164, 8k RAM (user supplied) U5 I.C., MCM6164, 8k RAM, 250 nS U6 I.C., MC74HC138, decoder/de-multiplexer U7 I.C., MC74HC4066/MC14066B, digital switch U8 I.C., MC1488P, RS-232C driver U9 I.C., MC68B50P, ACIA
U10 I.C., MC68HC11A1FN, MCU (Note 1) U11 I.C., MC74HC74, D-type flip-flop U12 I.C., MC74HC14, inverter U13 I.C., MC74HC4040, binary ripple counter U14 I.C., MC1489P, RS-232C receiver U15 Voltage detector, 3.80-4.20 Vdc, Motorola #MC34064P or
Seiko # S-8054HN
XU1 Socket, PC mount, 44 pin, PLCC, AMP # 821-551-1 (use with
U1)
M68HC11EVB/D 6-99
SUPPORT INFORMATION
Reference Designation Component Description
XU3-XU5 Socket, 28 pin, DIP, Robinson Nugent # ICL-286-S7-TG
XU9 Socket, 24 pin, DIP, Robinson Nugent # ICL-246-S7-TG
XU10 Socket, PC mount, 52 pin, PLCC, AMP # 821-575-1
Y1 Crystal, MCU, 8.0 MHz (Notes 2 & 3)
Y2 Crystal, ACIA, 2.4576 MHz
Fabricated jumper Aptronics # 929955-00 (use with jumper headers J1-J6)
Table 6-5. EVB Parts List (continued)
(use with U3-U5)
(use with U9)
(use with U10)
NOTES
1. MCU supplied with the EVB have the configuration (CONFIG) register ROMON bit cleared to disable MCU int ernal ROM, thereby allowing ext ernal E PROM containing the BUFFALO program to control EVB operations.
2. Crystal frequencies from 4 to 8 MHz (up to 8.4 MHz) can be used without any changes to the 24 pF capacitors (C6 and C7) and 10M ohm resistor (R5) values.
3. 8 MHz crystal o bt ains 2 MHz E-clock/9600 baud MCU SCI operation. 4 MHz crystal obtains 1 MHz E-clock/4800 baud MCU SCI operation.
6-10 M68HC11EVB/D
6.4 DIAGRAMS
Figure 6-2 is the EVB schematic diagram.
SUPPORT INFORMATION
M68HC11EVB/D 6-1111
Figure 6-2. EVB Schematic
Diagram (Sheet 1 of 2)
SUPPORT INFORMATION
6-12 M68HC11EVB/D
Figure 6-3. EVB Schematic
Diagram (Sheet 2 of 2)
S-RECORD INFORMATION
APPENDIX A
S-RECORD INFORMATION
A.1 INTRODUCTION
The S-record format for ou tput modules was devised fo r the purpose of encoding programs or data files in a printable format for t ransportation between computer systems. The tr ansportation process can thus be visually monitored and the S-records can be more easily edited.
A.2 S-RECORD CONTENT
When viewed by the user, S-recor ds are essentially character st rings made of several fields which identify the record type, record length, memory address, co de/data, and checksum. Each byte o f binary data is encoded as a 2-character hexadecimal number: t he first character repr esenting t he high-order 4 bits, and the second the low-order 4 bits of the byte.
The 5 fields which comprise an S-record are shown below:
TYPE RECORD LENGTH
ADDRESS
CODE/DATA
CHECKSUM
where the fields are composed as follows:
Printable
Field
Characters Contents
Type 2 S-record type - S0, S1, etc.
Record length 2 The count of the character pairs in the record, excluding the type and
record length.
Address 4, 6, or 8 The 2-, 3-, or 4-byte address at which the data field is to be loaded into
memory.
Code/data 0-2n From 0 to n bytes of executable code, memory loadable data, or
descriptive information. For compatibility with teletypewriters, some programs may limit the number of bytes to as few as 28 (56 printable characters in the S-record).
Checksum 2 The least significant byte of the one's complement of the sum of the
values represented by the pairs of characters making up the record length, address, and the code/data fields.
M68HC11EVB/D A-1
1
S-RECORD INFORMATION
Each record may be terminated with a CR/LF/NULL. Additionally, an S-record may have an initial field to accommodate other data such as line numbers generated by some time-sharing systems.
Accuracy of transmission is ensured by the record length (byte count) and checksum fields.
A.3 S-RECORD TYPES
Eight types of S-records have been defined to acco mmodat e the sever al needs of the encoding, transportation, and decoding functions. The various Motorola upload, download, and other record transportation control programs, as well as cross assemblers, linkers, and other file­creating or debugging programs, utilize only those S-records which serve the purpose of the program. For specific informat ion on which S-reco rds are support ed by a particular program, t he user manual for that program must be consulted.
NOTE
The EVB monit or supports only the S1 and S9 reco rds. All dat a before the first S1 record is ignored. Thereafter, all records must be S1 type until the S9 record terminates data transfer.
An S-record format module may contain S-records of the following types: S0 The header record for each block of S-records. The code/data field may contain any
descriptive information identifying the following block of S-records. The address field is normally zeroes.
S1 A record containing code/data and the 2-byte address at which the code/data is to reside.
S2-S8 Not applicable to EVB.
S9 A termination record for a block of S1 records. The address field may optionally contain the
2-byte address of the instruction to which control is to be passed. If not specified, the first entry point specification encountered in the object module input will be used. There is no code/data field.
Only one termination record is used for each block of S-records. Normally, only one header record is used, although it is possible for multiple header records to occur.
A-2 M68HC11EVB/D
S-RECORD INFORMATION
A.4 S-RECORD CREATION
S-r e c or d format p ro gr a ms ma y b e p ro du c e d b y s e ve ra l d u mp u tilit ie s , deb uggers, or several cross assemblers or cross linkers. Several programs are available for downloading a file in S-record format from a host system to an 8-bit or 16-bit microprocessor-based system.
A.5 S-RECORD EXAMPLE
Shown below is a typical S-record format module, as printed or displayed:
S00600004844521B S1130000285F245F2212226A000424290008237C2A S11300100002000800082629001853812341001813 S113002041E900084E42234300182342000824A952 S107003000144ED492 S9030000FC
The above module consists of an S0 header record, four S1 code/data records, and an S9 termination record.
The S0 header record is comprised of the following character pairs:
S0 S-record type S0, indicating a header record. 06 Hexadecimal 06 (decimal 6), indicating six character pairs (or ASCII bytes)
follow.
00
Four-character 2-byte address field, zeroes.
00 48
44
ASCII H, D, and R - "HDR".
52
1B Checksum of S0 record.
The first S1 code/data record is explained as follows:
S1 S -recor d type S1, indicating a co de/data r ecord t o be loaded/verified at a 2-byte
address.
13 Hexadecimal 13 (decimal 19), indicating 19 character pairs, representing 19
bytes of binary data, follow.
00 Four-character 2-byte address field; hexadecimal address 0000, indicates
location where the following data is to be loaded.
M68HC11EVB/D A-3
3
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