Motorola M68CPU32BUG User Manual

Download

Page 1

M68CPU32BUG/D

M68CPU32BUG DEBUG MONITOR

USER’S MANUAL

REV 1

May 1995

M68CPU32BUG/D

Page 2

Motorola reserves the right to make changes without further notice to any products herein to improve reliability, function or design. Motorola does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part.

Page 3

TABLE OF CONTENTS

CHAPTER 1 GENERAL INFORMATION

1.1 Introduction......................................................................................................................... 1-1

1.2 General Description............................................................................................................ 1-1

1.3 Using This Manual ............................................................................................................. 1-3

1.4 Installation and Start-Up..................................................................................................... 1-3

1.5 System Restart.................................................................................................................... 1-4

1.5.1 Reset......................................................................................................................... 1-4

1.5.2 Abort......................................................................................................................... 1-4

1.5.3 Break ........................................................................................................................ 1-5

1.6 Memory Requirements ....................................................................................................... 1-5

1.7 Terminal Input/Output Control........................................................................................... 1-7

CHAPTER 2 DEBUG MONITOR DESCRIPTION

2.1 Introduction......................................................................................................................... 2-1

2.2 Entering Debugger Command Lines.................................................................................. 2-1

2.2.1 Syntactic Variables...................................................................................................2-2

2.2.1.1 Expression as a Parameter............................................................................... 2-3

2.2.1.2 Address as a Parameter.................................................................................... 2-4

2.2.1.3 Offset Registers............................................................................................... 2-5

2.2.2 Port Numbers............................................................................................................ 2-7

2.3 Entering And Debugging Programs.................................................................................... 2-7

2.4 Calling System Utilities From User Programs ................................................................... 2-7

2.5 Preserving Debugger Operating Environment.................................................................... 2-7

2.5.1 CPU32Bug Vector Table and Workspace................................................................2-8

2.5.2 CPU32Bug Exception Vectors................................................................................. 2-8

2.5.2.1 Using CPU32Bug Target Vector Table........................................................... 2-9

2.5.2.2 Creating Vector Tables.................................................................................. 2-10

2.5.2.3 CPU32Bug Generalized Exception Handler................................................. 2-11

2.6 Function Code Support..................................................................................................... 2-12

CHAPTER 3 DEBUG MONITOR COMMANDS

3.1 Introduction......................................................................................................................... 3-1

3.2 Block Of Memory Compare (BC)...................................................................................... 3-3

3.3 Block Of Memory Fill (BF)................................................................................................ 3-5

3.4 Block Of Memory Move (BM)........................................................................................... 3-7

3.5 Breakpoint Insert/Delete (BR/NOBR)................................................................................ 3-9

3.6 Block Of Memory Search (BS)......................................................................................... 3-10

3.7 Block Of Memory Verify (BV)........................................................................................ 3-13

M68CPU32BUG/D REV 1 i

Page 4

TABLE OF CONTENTS

CHAPTER 3 DEBUG MONITOR COMMANDS (continued)

3.8 Data Conversion (DC)...................................................................................................... 3-15

3.9 Dump S-Records (DU)..................................................................................................... 3-16

3.10 Go Direct (GD)................................................................................................................. 3-19

3.11 Go To Next Instruction (GN)............................................................................................ 3-21

3.12 Go Execute User Program (GO)....................................................................................... 3-23

3.13 Go To Temporary Breakpoint (GT).................................................................................. 3-26

3.14 Help (H)............................................................................................................................ 3-28

3.15 Load S-Records From Host (LO)..................................................................................... 3-31

3.16 Macro Define/Display/Delete (MAL/NOMA)................................................................. 3-34

3.17 Macro Edit (MAE)............................................................................................................ 3-37

3.18 Macro Expansion Listing Enable/Disable (MAL/NOMAL)............................................ 3-39

3.19 Memory Display (MD)..................................................................................................... 3-40

3.20 Memory Modify (MM)..................................................................................................... 3-42

3.21 Memory Set (MS)............................................................................................................. 3-44

3.22 Offset Registers Display/Modify (OF)............................................................................. 3-45

3.23 Printer Attach/Detach (PA/NOPA)................................................................................... 3-48

3.24 Port Format (PF)............................................................................................................... 3-49

3.24.1 List Current Port Assignments............................................................................... 3-49

3.24.2 Port Configuration.................................................................................................. 3-49

3.24.3 Port Format Parameters.......................................................................................... 3-50

3.24.4 New Port Assignment............................................................................................. 3-51

3.25 Register Display (RD) ...................................................................................................... 3-52

3.26 Cold/Warm Reset (RESET).............................................................................................. 3-56

3.27 Register Modify (RM)...................................................................................................... 3-57

3.28 Register Set (RS) .............................................................................................................. 3-58

3.29 Switch Directories (SD).................................................................................................... 3-59

3.30 Trace (T)........................................................................................................................... 3-60

3.31 Trace On Change Of Control Flow (TC).......................................................................... 3-63

3.32 Transparent Mode (TM)................................................................................................... 3-65

3.33 Trace To Temporary Breakpoint (TT).............................................................................. 3-66

3.34 Verify S-Records Against Memory (VE)......................................................................... 3-68

CHAPTER 4 ASSEMBLER/DISASSEMBLER

4.1 Introduction......................................................................................................................... 4-1

4.1.1 M68300 Family Assembly Language....................................................................... 4-1

4.1.1.1 Machine-Instruction Operation Codes ............................................................ 4-1

4.1.1.2 Directives......................................................................................................... 4-1

4.1.2 M68300 Family Resident Structured Assembler Comparison................................. 4-2

4.2 Source Program Coding...................................................................................................... 4-2

4.2.1 Source Line Format.................................................................................................. 4-3

4.2.1.1 Operation Field................................................................................................ 4-3

4.2.1.2 Operand Field.................................................................................................. 4-4

M68CPU32BUG/D REV 1 ii

Page 5

TABLE OF CONTENTS

CHAPTER 4 ASSEMBLER/DISASSEMBLER (continued)

4.2.1.3 Disassembled Source Line .............................................................................. 4-4

4.2.1.4 Mnemonics and Delimiters ............................................................................. 4-5

4.2.1.5 Character Set ................................................................................................... 4-6

4.2.2 Addressing Modes.................................................................................................... 4-6

4.2.3 Define Constant Directive (DC.W).......................................................................... 4-9

4.2.4 System Call Directive (SYSCALL)....................................................................... 4-10

4.3 Entering and Modifying Source Program......................................................................... 4-10

4.3.1 Executing the Assembler/Disassembler................................................................. 4-11

4.3.2 Entering a Source Line........................................................................................... 4-11

4.3.3 Entering Branch and Jump Addresses....................................................................4-12

4.3.4 Assembler Output/Program Listings ................................................................................ 4-12

CHAPTER 5 SYSTEM CALLS

5.1 Introduction......................................................................................................................... 5-1

5.1.1 Executing System Calls Through TRAP #15........................................................... 5-1

5.1.2 Input/Output String Formats..................................................................................... 5-2

5.2 System Call Routines.......................................................................................................... 5-2

5.2.1 Calculate BCD Equivalent Specified Binary Number (.BINDEC).......................... 5-4

5.2.2 Parse Value, Assign to Variable (.CHANGEV)....................................................... 5-5

5.2.3 Check for Break (.CHKBRK).................................................................................. 5-7

5.2.4 Timer Delay Function (.DELAY)............................................................................. 5-8

5.2.5 Unsigned 32 x 32 Bit Divide (.DIVU32)................................................................. 5-9

5.2.6 Erase Line (.ERASLN)........................................................................................... 5-10

5.2.7 Input Character Routine (.INCHR)........................................................................ 5-11

5.2.8 Input Line Routine (.INLN).................................................................................... 5-12

5.2.9 Input Serial Port Status (.INSTAT)........................................................................ 5-13

5.2.10 Unsigned 32 x 32 Bit Multiply (.MULU32)........................................................... 5-14

5.2.11 Output Character Routine (.OUTCHR).................................................................. 5-15

5.2.12 Output String Using Pointers (.OUTLN/OUTSTR)............................................... 5-16

5.2.13 Print <CR><LF> (.PCRLF) ................................................................................... 5-17

5.2.14 Read Line to Fixed-Length Buffer (.READLN)..................................................... 5-18

5.2.15 Read String Into Variable-Length Buffer (.READSTR)........................................5-19

5.2.16 Return to CPU32Bug (.RETURN)......................................................................... 5-20

5.2.17 Send Break (.SNDBRK)......................................................................................... 5-21

5.2.18 Compare Two Strings (.STRCMP)........................................................................ 5-22

5.2.19 Timer Initialization (.TM_INI)............................................................................... 5-23

5.2.20 Read Timer (.TM_RD)........................................................................................... 5-24

5.2.21 Start Timer at T=0 (.TM_STR0)............................................................................ 5-25

5.2.22 Output String with Data (.WRITD/WRITLN)....................................................... 5-27

5.2.23 Output String Using Character Count (.WRITE/WRITELN)................................5-29

M68CPU32BUG/D REV 1 iii

Page 6

TABLE OF CONTENTS

CHAPTER 6 DIAGNOSTIC FIRMWARE GUIDE

6.1 Introduction......................................................................................................................... 6-1

6.2 Diagnostic Monitor............................................................................................................. 6-1

6.2.1 Monitor Start-Up...................................................................................................... 6-1

6.2.2 Command Entry and Directories.............................................................................. 6-1

6.2.3 Help (HE)................................................................................................................. 6-2

6.2.4 Self Test (ST) ........................................................................................................... 6-2

6.2.5 Switch Directories (SD) ........................................................................................... 6-2

6.2.6 Loop-On-Error Mode (LE)....................................................................................... 6-2

6.2.7 Stop-On-Error Mode (SE)........................................................................................ 6-3

6.2.8 Loop-Continue Mode (LC)....................................................................................... 6-3

6.2.9 Non-Verbose Mode (NV)......................................................................................... 6-3

6.2.10 Display Error Counters (DE).................................................................................... 6-3

6.2.11 Clear (Zero) Error Counters (ZE)............................................................................. 6-3

6.2.12 Display Pass Count (DP).......................................................................................... 6-3

6.2.13 Zero Pass Count (ZP)............................................................................................... 6-4

6.3 Utilities ............................................................................................................................... 6-4

6.3.1 Write Loop ............................................................................................................... 6-4

6.3.2 Read Loop ................................................................................................................ 6-5

6.3.3 Write/Read Loop...................................................................................................... 6-5

6.4 CPU Tests For The MCU (CPU)........................................................................................ 6-6

6.4.1 Register Test (CPU A) ............................................................................................. 6-7

6.4.2 Instruction Test (CPU B).......................................................................................... 6-8

6.4.3 Address Mode Test (CPU C).................................................................................... 6-9

6.4.4 Exception Processing Test (CPU D)...................................................................... 6-10

6.5 Memory Tests (MT).......................................................................................................... 6-11

6.5.1 Set Function Code (MT A)..................................................................................... 6-13

6.5.2 Set Start Address (MT B)....................................................................................... 6-14

6.5.3 Set Stop Address (MT C)....................................................................................... 6-15

6.5.4 Set Bus Data Width (MT D)................................................................................... 6-16

6.5.5 March Address Test (MT E)................................................................................... 6-17

6.5.6 Walk a Bit Test (MT F).......................................................................................... 6-18

6.5.7 Refresh Test (MT G).............................................................................................. 6-19

6.5.8 Random Byte Test (MT H)..................................................................................... 6-20

6.5.9 Program Test (MT I) .............................................................................................. 6-21

6.5.10 Test and Set Test (MT J)........................................................................................ 6-22

6.6 Bus Error Test (BERR)..................................................................................................... 6-23

M68CPU32BUG/D REV 1 iv

Page 7

TABLE OF CONTENTS

APPENDIX A S-RECORD INFORMATION

A.1 Introduction.........................................................................................................................A-1

A.2 S-Record Content................................................................................................................A-1

A.3 S-Record Types...................................................................................................................A-2

A.4 S-Records Creation.............................................................................................................A-3

APPENDIX B SELF-TEST ERROR MESSAGES

B.1 Introduction.........................................................................................................................B-1

APPENDIX C USER CUSTOMIZATION

C.1 Introduction.........................................................................................................................C-1

C.2 CPU32BUG Customization................................................................................................C-2

C.3 Customization Table...........................................................................................................C-5

C.4 Communication Formats ..................................................................................................C-14

C.5 BCC REV. A Chip Selection Summary...........................................................................C-15

C.6 BCC REV. B Chip Selection Summary............................................................................C-16

C.7 BCC REV. C Chip Selection Summary ...........................................................................C-17

C.8 Platform Board (PFB) REV. C Compatibility..................................................................C-18

C.9 CPU32BUG Questions and Answers ...............................................................................C-19

M68CPU32BUG/D REV 1 v

Page 8

TABLE OF CONTENTS

LIST OF FIGURES

FIGURES PAGE

1-1. CPU32Bug Operation Mode Flow Diagram ...................................................................... 1-2

1-2. BCC Memory Map............................................................................................................. 1-6

LIST OF TABLES

TABLES PAGE

2-1. Debugger Address Parameter Format................................................................................. 2-5

2-2. CPU32Bug Exception Vectors........................................................................................... 2-8

3-1. Debug Monitor Commands ................................................................................................ 3-1

4-1. CPU32Bug Assembler Addressing Modes......................................................................... 4-7

5-1. CPU32Bug System Call Routines...................................................................................... 5-3

6-1. MCU CPU Diagnostic Tests............................................................................................... 6-6

6-2. Memory Diagnostic Tests................................................................................................. 6-11

B-1. Self-Test Error Messages....................................................................................................B-1

C-1. CPU32Bug Customization Area.........................................................................................C-5

C-2. MCU SCI Communication Formats.................................................................................C-14

C-3. Rev. A Chip Selection Summary......................................................................................C-15

C-4. Rev. B Chip Selection Summary......................................................................................C-16

C-5. BCC Rev. C Chip Selection Summary.............................................................................C-17

C-6. PFB Rev. C Compatibility................................................................................................C-18

M68CPU32BUG/D REV 1 vi

Page 9

GENERAL INFORMATION

CHAPTER 1

GENERAL INFORMATION

1.1 INTRODUCTION

This chapter provides a general description, installation instructions, start-up and system restart instructions, memory requirements, and a terminal input/output (I/O) control description for the M68CPU32BUG Debug Monitor (hereafter referred to as CPU32Bug). Information in this manual covers the 1.00 version of the CPU32Bug.

1.2 GENERAL DESCRIPTION

The CPU32Bug package evaluates and debugs systems built around the M6833XBCC Business Card Computer. System evaluation facilities are available for loading and executing user programs. Various CPU32Bug routines that handle I/O, data conversion, and string functions are available to user programs through the TRAP #15 handler.

CPU32Bug includes:

• Commands for display and modification of memory,

• Breakpoint capabilities,

• An assembler/disassembler useful for patching programs,

• A power-up self test feature which verifies system integrity,

• A command-driven user-interactive software debugger (the debugger), and

• A user interface which accepts commands from the system console terminal.

There are two modes of operation in the CPU32Bug monitor; the debugger mode and the diagnostic mode. When the user is in the debugger directory the prompt CPU32Bug> is displayed, and the user has access to the debugger commands (see Chapter 3). When the user is in the diagnostic mode the prompt CPU32Diag> is displayed, and the user has access to the diagnostic commands (see Chapter 6). These modes are also called directories.

CPU32Bug is command-driven. It performs various operations in response to user commands entered at the keyboard. Figure 1-1 illustrates the flow of control in CPU32Bug. CPU32Bug executes entered commands and the prompt reappears upon completion. However, if a command is entered which causes execution of user target code (i.e., GO) then control may or may not return to CPU32Bug. This depends upon the user program function.

CPU32Bug is similar to Motorola’s other debugging packages, but there are two noticeable differences. Many of the commands are more flexible with enhanced functionality. And the debugger has more detailed error messages and an expanded on-line help facility.

M68CPU32BUG/D REV 1 1-1

Page 10

GENERAL INFORMATION

POWER-UP/RESET

WARM START?

YES

SET DEBUGGER

DIRECTORY

DISPLAY DEBUGGER NAME & VERSION

DISPLAY RESULTS OF CONFIDENCE

TEST

GO TO MAIN

EXECPTION

EXCEPTION HANDLERS

SAVE TARGET STATE

DISPLAY TARGET REGISTERS

M68CPU32BUG/D REV 1 1-2

Page 11

GENERAL INFORMATION

1.3 USING THIS MANUAL

Those users unfamiliar with debugging packages should read Chapter 1 before attempting to use CPU32Bug. This provides information about CPU32Bug structure and capabilities.

Paragraph 1.4 Installation and Start-up describes a step-by-step procedure for powering up the module and obtaining the CPU32Bug prompt on the terminal screen.

For questions about syntax or operation of a particular CPU32Bug command, turn to the paragraph which describes that particular command in Chapter 3.

Some debugger commands take advantage of the built-in one-line assembler/disassembler. The command descriptions in Chapter 3 assume that the user is familiar with the assembler/disassembler functionality. Chapter 4 includes a description of the assembler/ disassembler.

NOTE

In the examples shown, all user inputs are given in bold text. This should clarify the examples by distinguishing between character input by the user and character output by CPU32Bug. The symbol <CR> represents the carriage return key on the user’s terminal keyboard. Whenever this symbol appears it indicates a carriage return should be entered by the user.

1.4 INSTALLATION AND START-UP

Use the following set-up procedure to enable CPU32Bug to operate with the BCC:

1. Configure the jumpers on the BCC module. Refer to the EVK User’s Manual Motorola publication number M68332EVK/AD1 or M68331EVK/AD1.

2. Connect the DB-9 serial communication cable connector to the terminal or host computer which is to be the CPU32Bug system console. Connect the other end of the cable to P4 on the BCC.

Set up the terminal as follows:

• Eight bits per character

• One stop bit per character

• Parity disable

• 9600 baud rate

M68CPU32BUG/D REV 1 1-3

Page 12

GENERAL INFORMATION

NOTE

In order for high-baud rate serial communication between CPU32Bug and the terminal to function properly, the terminal must use XON/XOFF handshaking. If messages are garbled and have missing characters, check the terminal to verify XON/XOFF handshaking is enabled.

3. Power up the system. CPU32Bug executes a self-test and displays the sign on message (which includes version number) and the debugger prompt CPU32Bug>.

1.5 SYSTEM RESTART

There are three ways to initialize the system to a known state. Each situation determines the appropriate system restart technique.

1.5.1 Reset

The M68300PFB platform board reset switch returns the system to a known state. When the reset switch is first pushed the MCU send the default XON character to the terminal to prevent possible terminal lockup. There are two reset modes: COLD and WARM. COLD reset is the CPU32Bug default, refer to the RESET command description. During COLD reset a total system initialization occurs, similar to the BCC power-up sequence. All static variables are restored to their default states. The serial port is reset to its default state. The breakpoint table is cleared. The offset registers are cleared. The target registers are invalidated. Input and output character queues are cleared. On-board devices (timer, serial ports, etc) are reset. During WARM reset, CPU32Bug variables and tables are preserved, as well as the target state registers and breakpoints.

Use reset if the processor halts, for example, after a halt monitor fault, or if the CPU32Bug environment is lost (vector table is destroyed, etc).

1.5.2 Abort

The M68300PFB platform board abort switch terminates all in-process instructions. When abort is executed while running target code, a snapshot of the processor state is captured and stored in the target registers. For this reason abort is appropriate when terminating a user program that is being debugged. Use abort to regain control if the program gets caught in a loop, etc. The target PC, stack pointers, etc. help pinpoint malfunctions.

Abort generates a non-maskable, level-seven interrupt. The target registers reflect the machine state at the time of an abort and are displayed on the display screen. Any breakpoints installed in the user code are removed and the breakpoint table remains intact. Control is then returned to the debugger.

M68CPU32BUG/D REV 1 1-4

Page 13

GENERAL INFORMATION

1.5.3 Break

The BREAK key on the terminal keyboard initiates a break. Break does not generate an interrupt. The only time break is recognized is when characters are sent or received by the debugger console. Break removes any breakpoints in the user code and keeps the breakpoint table intact. Break does not, however, take a snapshot of the machine state nor does it display the target registers. It is useful for terminating active debugger commands that are outputing large blocks of data.

NOTE

When using terminal emulation programs such as ProComm or Kermit, the BREAK key on the keyboard is local to the emulation program and may not be transmitted to the BCC. Consult your emulation program’s user manual for the procedure on sending a BREAK signal to the port connected to the BCC.

1.6 MEMORY REQUIREMENTS

The program portion of CPU32Bug is approximately 64k bytes of code. The EPROM on-board the BCC contains 128k bytes and is mapped at locations $E0000 to $FFFFF. However, the CPU32Bug code is position-independent and can execute anywhere in memory. The second half of the EPROM ($F0000 - $FFFFF) is blank and available for user programs. See Appendix C CPU32Bug Customization.

CPU32Bug requires a minimum of 12k bytes of random access memory (RAM) to operate. This memory may be either off-board system memory (i.e., on an external memory board) or BCC onboard RAM. On-board RAM allows stand-alone operation of the BCC.

The first 12k bytes are used for CPU32Bug stack and static variable space and the rest of memory is reserved as user space. Whenever the BCC is reset, the target program counter is initialized to the beginning user space address and the target stack pointers are initialized to addresses at the end of the user space. The target instruction stack pointer (SSP) is set to the top of the user space. Register initialization is done solely as a convenience for the user. Consult the CPU32 Reference Manual for information regarding actual register values during a poweron/reset.

M68CPU32BUG/D REV 1 1-5

Page 14

INTERNAL RAM(1)

GENERAL INFORMATION

XXX7FF(2)

XXX000

MCU

INTERNAL

MODULES

OPTIONAL FPCP(3)

PFB(4): U5

ALTERNATE MCU

INTERNAL MODULES

LOCATION

(see APPENDIX C)

OPTIONAL RAM/EPROM

PFB: U2 & U4

CPU32BUG EPROM

BCC: U4

OPTIONAL RAM

PFB: U1 & U3

TARGET RAM

BCC: U2 & U3

SYSTEM RAM

BCC: U2 & U3

FFFFFF

FFF000

FFE800 800000

7FF000

110000 /120000(5)

100000

0E0000

020000

010000

003000

000000

CPU32BUG

STACK

CPU32BUG

INTERNAL

VARIABLES

CPU32BUG VECTOR

TABLE

TARGET VECTOR

TABLE

(1) Consult the MCU device User’s Manual. (2) XXXBase address is user programmable. Internal MCU modules, such as internal RAM, can be configured on power-up/reset by using the Initialization Table (INITTBL) covered in Appendix C. (3) Floating Point Coprocessor - MC68881/MC68882 (4) Platform Board (5) Depends on the memory device type used.

M68CPU32BUG/D REV 1 1-6

Figure 1-2. BCC Memory Map

Page 15

GENERAL INFORMATION

1.7 TERMINAL INPUT/OUTPUT CONTROL

When entering a command at the prompt, the following control codes may have a caret, " ^ ", preceding the character, this indicates that the Control or CTRL key must be held down while striking the character key).

^X (Cancel line) The cursor is backspaced to the beginning of the line.

^H (backspace) The cursor is moved back one position. The character at the new

cursor position is erased.

<del> (delete/rubout) Performs the same function as ’’^H’’.

^D (redisplay) The entire command line as entered is redisplayed on the following

line.

When observing output from any CPU32Bug command, the XON and XOFF characters may be entered to control the output, if the XON/XOFF protocol is enabled (default). These characters are initialized to ’’^S’’ and ’’^Q’’ respectively by CPU32Bug, but may be changed by the user using the PF command. The initialized (default) mode operations are:

^S (wait) Console output is halted.

^Q (resume) Console output is resumed.

M68CPU32BUG/D REV 1 1-7

Page 16

GENERAL INFORMATION

M68CPU32BUG/D REV 1 1-8

Page 17

DEBUG MONITOR DESCRIPTION

CHAPTER 2

DEBUG MONITOR DESCRIPTION

2.1 INTRODUCTION

CPU32Bug performs various operations in response to user commands entered at the keyboard. When the debugger prompt CPU32Bug> appears on the terminal screen the debugger is ready to accept commands.

2.2 ENTERING DEBUGGER COMMAND LINES

As the command line is entered it is stored in an internal buffer. Execution begins only after the carriage return is entered. This allows the user to correct entry errors using the control characters described in paragraph 1.7.

The debugger executes commands and returns the CPU32Bug> prompt. However, if the entered command causes execution of user target code, (i.e., GO), then control may or may not return to the debugger. This depends upon the user program function. For example, if a breakpoint is specified, then control returns to the debugger when the breakpoint is encountered. The user program also returns control to the debugger by means of the TRAP #15 function, RETURN (described in paragraph 5.2.16). Also refer to the paragraphs in Chapter 3 which detail elements of the GO commands.

In general debugger commands include:

• A command identifier (i.e., MD or md for the memory display command). Both

upper- or lower-case characters are allowed for command identifiers and options.

• At least one intervening space before the first argument.

• A port number for running with multiple ports.

• Any required arguments, as specified by command.

• An option field, set off by a semicolon (;) to specify conditions other than the default

conditions of the command.

• Some commands (MD, GO, T, etc) are repeatable, i.e., entering a carriage return

(<CR>) only causes the last command to be repeated and the address (<ADDR>), if any, incremented. Thus after an MD command, sequential memory locations will be displayed by entering a carriage return only. Or after entering a TRACE (T) command, entering a carriage return (<CR>) only traces the next instruction.

• Multiple debugger commands may be entered on a single command line by separating

the commands with the explanation point (!) character.

M68CPU32BUG/D REV 1 2-1

Page 18

DEBUG MONITOR DESCRIPTION

The commands use a modified Backus-Naur syntax. The meta-symbols are:

<> The angular brackets enclose a symbol, known as a syntactic variable. The

syntactic variable is replaced in a command line by one of a class of symbols it represents.

[] Square brackets enclose an optional symbol. The enclosed symbol may

occur zero or one time. In some cases, where noted, square brackets are required characters.

[]... Square brackets followed by periods enclose a symbol that is

optional/repetitive. The symbol within the brackets may appear zero or more times.

| This symbol indicates that a choice is to be made. Select one of several

symbols separated by a straight line.

/ Select one or more of the symbols separated by the slash.

{} Brackets enclose optional symbols that may occur zero or more times.

2.2.1 Syntactic Variables

The following syntactic variables are used in the command descriptions which follow. In addition, other syntactic variables may be used and are defined in the particular command description in which they occur.

<DEL> Delimiter; either a comma or a space. <EXP> - Expression (described in

detail in paragraph 2.2.1.1).

<ADDR> Address (described in detail in paragraph 2.2.1.2). <COUNT> Count; the same syntax as < EXP> . <RANGE> A range of memory addresses which may be specified either by <

ADDR><DEL><ADDR> or by <ADDR> :<COUNT> .

<TEXT> An ASCII string of as many as 255 characters, delimited with single quote

marks (’TEXT’).

M68CPU32BUG/D REV 1 2-2

Page 19

DEBUG MONITOR DESCRIPTION

2.2.1.1 Expression as a Parameter

An expression is one or more numeric values separated by the arithmetic operators:

+ plus

– minus * multiplied by / divided by & logical AND << shift left >> shift right

Base identifiers define numeric values as either a hexadecimal, decimal, octal or binary number.

Base Identifier Examples

Hexadecimal $ $FFFFFFFF Decimal & &1974, &10-&4 Octal @ @456 Binary % %1000110

If no base identifier is specified, then the numeric value is assumed to be hexadecimal. A numeric value may also be expressed as a string literal of as many as four characters. The

string literal must begin and end with single quote marks ('). The numeric value is interpreted as the concatenation of the ASCII values of the characters. This value is right-justified, as is any other numeric value.

String Literal Numeric Value (in hex)

’A’ 41 ’ABC’ 414243 ’TEST’ 54455354

Evaluation of an expression is always from left to right unless parentheses are used to group part of the expression. There is no operator precedence. Sub-expressions within parentheses are evaluated first. Nested parenthetical sub-expressions are evaluated from the inside out.

M68CPU32BUG/D REV 1 2-3

Page 20

DEBUG MONITOR DESCRIPTION

EXAMPLES Valid expressions.

Expression Result (in hex)

FF0011 FF0011 45+99 DE &45+&99 90 @35+@67+@10 5C %10011110+%1001 A7 88<<10 00880000 AA&F0 A0

The total value of the expression must be between 0 and $FFFFFFFF.

2.2.1.2 Address as a Parameter

Many commands use <ADDR> as a parameter. The syntax accepted by CPU32Bug is similar to the one accepted by the MC68300 Family one-line assembler. All control addressing modes are allowed. An address+offset register mode is also allowed.

Table 2-1 summarizes the address formats which are acceptable for address parameters in debugger command lines.

M68CPU32BUG/D REV 1 2-4

Page 21

DEBUG MONITOR DESCRIPTION

Table 2-1. Debugger Address Parameter Format

Format Example Description

N 140 Absolute address+contents of automatic offset register. N+Rn 332+R5 Absolute address+contents of the specified offset register (not an

assembler-accepted syntax). (An) (A1) Address register indirect. (d,An)

or d(An)

(d,An,Xn) or d(An,Xn)

(120,A1) 120(A1)

(&120,A1,D2) &120(A1,D2)

N - Absolute address (any valid expression) Dn - Data register n An - Address register n Xn - Index register n (An or Dn) d Displacement (any valid expression) bd - Base displacement (any valid expression) n Register number (0 to 7) Rn - Offset register n ZXn - Zero suppressed register Xn

2.2.1.3 Offset Registers

Address register indirect with displacement (two formats accepted).

Address register indirect with index and displacement (two formats

accepted).

Symbol Definition

Eight pseudo-registers (R0 through R7) called offset registers are used to simplify the debugging of re-locatable and position-independent files. These files when listed have a starting address (normally 0), but when loaded into memory, due to the offset registers, they are loaded into a different memory location. Implementing offset registers makes it harder to correlate addresses in the listing with addresses in the loaded program. The offset registers solve this problem by taking into account this difference and forcing the display of addresses in a relative address+offset format. The range for each offset register is set by two addresses: base and top. Specifying the base and top addresses for an offset register sets its range. Offset registers have adjustable ranges which may overlap. In the event that an address falls in two or more offset register ranges, the one that yields the least offset is chosen.

Relative addresses are limited to 1 megabyte (5 digits), regardless of the range of the closest offset register.

M68CPU32BUG/D REV 1 2-5

NOTE

Page 22

DEBUG MONITOR DESCRIPTION

EXAMPLE A portion of the listing file of a re-locatable module assembled with the

MC68300 Family DOS resident assembler is shown below:

1 2* 3 * MOVE STRING SUBROUTINE 4* 5 0 00000000 48E78080 MOVESTR MOVEM.L D0/A0,-(A7) 6 0 00000004 4280 CLR.L D0 7 0 00000006 1018 MOVE.B (A0)+,D0 8 0 00000008 5340 SUBQ.W #1,D0 9 0 0000000A 12D8 LOOP MOVE.B (A0)+,(A1)+ 10 0 0000000C 51 C8FFFC MOVS DBRA D0,LOOP 11 0 00000010 4CDF0101 MOVEM.L (A7)+,D0/A0 12 0 00000014 RTS 13 14 END ****** TOTAL ERRORS 0****** TOTAL WARNINGS 0-

The above program was loaded at address 0000427C. The disassembled code is:

CPU32Bug>MD 427C;DI<CR> 0000427C 48E78080 MOVEM.L D0/A0,-(A7) 00004280 4280 CLR.L D0 00004282 1018 MOVE.B (A0)+,D0 00004284 5340 SUBQ.W #1,D0 00004286 12D8 MOVE.B (A0)+,(A1)+ 00004288 51C8FFFC DBF D0,$4286 0000428C 4CDF0101 MOVEM.L (A7)+,D0/Ao 00004290 4E75 RTS

By using one of the offset registers, the disassembled code address can be made to match the listing file address as follows:

CPU32Bug>OF R0<CR> R0 =00000000 00000000? 427C: 16.<CR> CPU32Bug>MD 0+R0;DI<CR> 00000+R0 48E78080 MOVEM.L D0/A0,-(A7) 00004+R0 4280 CLR.L D0 00006+R0 1018 MOVE.B (A0)+,D0 00008+R0 5340 SUBQ.W #1,D0 0000A+R0 12D8 MOVE.B (A0)+,(A1)+ 0000C+R0 51C8FFFC DBF D0,$A+R0 00010+R0 4CDF0101 MOVEM.L (A7)+,D0/A0 00014+R0 4E75 RTS CPU32Bug>

For Additional information about the offset registers, see the OF command description.

M68CPU32BUG/D REV 1 2-6

Page 23

DEBUG MONITOR DESCRIPTION

2.2.2 Port Numbers

Some CPU32Bug commands allow the user to decide which port is the input or output port. Valid port numbers are:

0 - MCU SCI Port (RS-232C communication port; P4 on the BCC and P9 on the PFB)

Although CPU32Bug supports other ports (see PF command), there is no hardware present on the BCC to support additional ports. Thus the commands which allow port numbers (DU, LO, PF, VE) can only use port 0. Those commands requiring a second port (PA, TM) are not functional without additional hardware.

2.3 ENTERING AND DEBUGGING PROGRAMS

There are various ways to enter a user program into system memory. One is to create the program using the assembler/disassembler option and the MM (memory modify) command.

The user enters the program one source line at a time. After each source line is entered, it is assembled and the object code is loaded into memory. Refer to Chapter 4 for complete details of the CPU32Bug assembler/disassembler.

Another way to enter a program is to download an object file from a host system (i.e., a personal computer). The program must be in S-record format (described in Appendix A) and may be assembled or compiled on the host system. The file is downloaded from the host into BCC memory via the debugger LO command. Alternately, the program may be created using the CPU32Bug MM command as outlined above and stored to the host using the DU (dump) command. A communication link must exist between the host system and the BCC’s serial port.

2.4 CALLING SYSTEM UTILITIES FROM USER PROGRAMS

A convenient method to input and output characters as well as many other useful operations is provided by the TRAP #15 instructions. This frees the user from having to write these routines into the target code. Refer to Chapter 5 for details on various TRAP #15 utilities and how to execute them from a user program.

2.5 PRESERVING DEBUGGER OPERATING ENVIRONMENT

Avoiding contamination of the debugger operating environment is explained in the following paragraphs. CPU32Bug uses certain MCU on-board resources and may also use off-board system memory to store temporary variables, exception vectors, etc. If the user violates CPU32Bug dependent memory space, then the debugger may not function.

M68CPU32BUG/D REV 1 2-7

Page 24

DEBUG MONITOR DESCRIPTION

2.5.1 CPU32Bug Vector Table and Workspace

CPU32Bug requires 12k bytes of RAM to operate. On power-up or reset, CPU32Bug allocates this memory space. The first 1024-bytes are reserved as a user program vector table area and the second 1024-bytes are reserved as an exception vector table for use by the debugger. Next, CPU32Bug reserves space for static variables and initializes these variables to predefined default values. After the static variables, CPU32Bug allocates space for the system stack, then initializes the system stack pointer to the top of this area.

With the exception of the first 1024-byte vector table area, do not to use the above-mentioned reserved memory areas. Refer to paragraph 1.6 to define the reserved memory area location. If, for example, a user program inadvertently wrote over the static variable area containing the seri al communication parameters, these parameters would be lost, resulting in a loss of communication with the system terminal. If a user program corrupts the system stack, then an incorrect value may be loaded into the processor’s counter, causing the system to crash.

2.5.2 CPU32Bug Exception Vectors

The debugger exception vectors are listed below. Do not change these specified vector offsets in the target program vector table or the associated debugger facilities (breakpoints, trace mode, etc.) will not operate.

Table 2-2. CPU32Bug Exception Vectors

Vector

Number

4 $10 Illegal Instruction breakpoints (Used instruction by GO, GN,

9 $24 Trace T. TC, TT 31 $7C Level 7 interrupt ABORT push-button 47 $BC TRAP #15 System calls (see Chapter 5) 66 $108 User Defined Timer Trap #15 Calls ($4X)

Offset Exception CPU32bug Facility

GT)

When the debugger handles one of the exceptions listed in Table 2-2, the target stack pointer is left pointing past the bottom of the exception stack frame; that is, it reflects the system stack pointer values just before the exception occurred. In this way, the operation of the debugger facility (through an exception) is transparent to the user, but it does change the locations on the stack.

M68CPU32BUG/D REV 1 2-8

Page 25

DEBUG MONITOR DESCRIPTION

EXAMPLE Trace one instruction using debugger.

CPU32Bug>RD<CR>

PC =00003000 SR =2700=TR:OFF_S_7_..... VBR =00000000

SFC =5=SD DFC =5=SD USP =00003830 SSP* =00004000 D0 =00000000 D1 =00000000 D2 =00000000 D3 =00000000 D4 =00000000 D5 =00000000 D6 =00000000 D7 =00000000 A0 =00000000 A1 =00000000 A2 =00000000 A3 =00000000 A4 =00000000 A5 =00000000 A6 =00000000 A7 =00004000 00003000 203900100000 MOVE.L ($100000).L,D0

CPU32Bug>T<CR>

PC =00003006 SR =2700=TR:OFF_S_7_..... VBR =00000000

SFC =5=SD DFC =5=SD USP =00003830 SSP* =00004000 D0 =12345678 D1 =00000000 D2 =00000000 D3 =00000000 D4 =00000000 D5 =00000000 D6 =00000000 D7 =00000000 A0 =00000000 A1 =00000000 A2 =00000000 A3 =00000000 A4 =00000000 A5 =00000000 A6 =00000000 A7 =00004000 00003006 D280 ADD.L D0,D1 CPU32Bug>

Notice that the value of the target stack pointer register (A7) has not changed even though a trace exception has taken place. The user program may use the exception vector table provided by CPU32Bug or it may create a separate exception vector table of its own.

2.5.2.1 Using CPU32Bug Target Vector Table

CPU32Bug initializes and maintains a vector table area for target programs. A target program is any user program started by the CPU32Bug with GO or Trace commands. The starting address of this target-vector table area is the base address of the BCC, described in paragraph 1.6. This address is loaded into the target-state-vector base register at power-up or during a cold-start reset. For verification use the RD command immediately after power-up to display the target-state registers.

CPU32Bug loads the target-vector table with the debugger vectors (listed in Table 2-2) and the other vector locations with the address of a generalized exception handler (refer to paragraph

2.5.2.3). The target program allocates as many vectors as required by simply writing its own exception vectors into the table. If the vector locations listed in Table 2-2 are over-written, then the accompanying debugger functions will be lost.

CPU32Bug maintains a separate vector table for its own use in a 1k byte space in the reserved memory space. The debugger vector table is completely transparent to the user and no modifications should ever be made to it.

M68CPU32BUG/D REV 1 2-9

Page 26

DEBUG MONITOR DESCRIPTION

2.5.2.2 Creating Vector Tables

A user program may create a separate vector table to store its exception vectors. If this is done, the user program must change the value of the vector base register to point to the new vector table. To use the debugger facilities, copy the vectors from the CPU32Bug vector table into the corresponding user vector table locations (block of memory move (BM) command).

The vector for the CPU32Bug generalized exception handler (described in detail in paragraph

2.5.2.3) may be copied from offset $08 (Bus Error vector) in the target-vector table to all locations in the user’s vector table where a separate exception handler is not used. This provides diagnostic support in the event execution of the user program is terminated by an unexpected exception. The generalized exception handler gives a formatted display of the target registers and identifies the type of the exception.

The following is an example of a user routine which builds a separat e vector table and then set s the vector base register to point at it.

* *** BUILDX * BUILDX MOVEC.L VBR,A0

LOOP MOVE.L D0,(A1,D1)

– Build exception vector table ***

LEA $1 0000,A1 MOVE.L $8(A0),D0 MOVE.W $3FC,D1

SU BQ.W #4, D 1 BPL.B LOOP MOVE.L $1 0(A0),$1 0(A1 ) MOVE.L $24(A0),$24(A1 ) MOVE.L $BC(A0),$BC(A1 ) LEA.L TIMER(PC),A2 MOVE.L A2,$2C(A1 ) MOVEC.L A1 ,VBR RTS END

Get copy of VBR. New vectors at $10000. Get generalized exception vector. Load count (all vectors). Store generalized exception vector.

Initialize entire vector table. Copy breakpoints vector. Copy trace vector. Copy system call vector. Get user exception vector. Install as F-Line handler. Change VBR to new table.

The user program may use one or more of the exception vectors that are required for debugger operation if the user’s excepti on handler can determine when to handle the exception itself and when to pass the exception to the debugger.

When an exception occurs which requires debugger operation (i.e., ABORT), the user’s exception handler must read the vector offset from the exception-stack-frame format word. This offset is added to the address of the CPU32Bug target program vector table (which the user program saves), producing the address of the CPU32Bug exception vector. The user program then jumps to the address stored at this vector location (i.e., which is the address of the CPU32Bug exception handler).

The user program must ensure an exception stack frame is in the stack and that it i s identical to one the processor would create for the particular exception. It may then jump to the address of the exception handler.

M68CPU32BUG/D REV 1 2-10

Page 27

DEBUG MONITOR DESCRIPTION

EXAMPLE The user exception handler passes an exception along to the debugger.

* *** EXCEPT - Exception handler **** *

EXCEPT SUBQ.L #4,A7

LINK A6,#0 MOVEM.L A0-A5/D0-D7,-(A7)

: decide here if user code will handle exception, if so, branch...

MOVE.L BUFVBR,A0 MOVE.W 14(A6), Do AND.W #$0FFF,D0 MOVE.L (A0,D0.W),4(A6) UNLK RTS

Save space in stack for a PC value. Frame pointer for accessing PC space. Save registers.

Pass exception to debugger; Get VBR. Get the vector offset from stack frame. Mask off the format information. Store address of debugger exception handler. A6 Put address of exception handler into PC and go.

2.5.2.3 CPU32Bug Generalized Exception Handler

The CPU32Bug generalized exception handler supervises all exceptions not listed in Table 2-2. For these exceptions, the target stack pointer points to the top of the user exception stack frame. In this way, if an unexpected exception occurs during user code segment execution, the exception stack frame displays to assist in determining the cause of the exception.

EXAMPLE Bus error at address $F00000. It is assumed for this example that an access

of memory location $F00000 initiates bus error exception processing.

CPU32Bug>RD<CR>

PC =00003000 SR =2700=TR:OFF_S_7_.... VBR =00000000

SFC =5=SD DFC =5=SD USP =0000FC00 SSP* =00004000 D0 =00000000 D1 =00000000 D2 =00000000 D3 =00000000 D4 =00000000 D5 =00000000 D6 =00000000 D7 =00000000 A0 =00000000 A1 =00000000 A2 =00000000 A3 =00000000 A4 =00000000 A5 =00000000 A6 =00000000 A7 =00004000 00003000 203900F0 0000 MOVE.L ($F00000).L,D0 CPU32Bug>T<CR> Exception: Bus Error Format/Vector=C008 SSW=0065 Fault Addr.=00F00000 Data=FFFF3000 Cur. PC=00003000 Cnt. Reg.=0001

PC =00003000 SR =A700=TR:ALL_S_7_.... VBR =00000000

SFC =5=SD DFC =5=SD USP =0000FC00 SSP* =00003FE8 D0 =00000000 D1 =00000000 D2 =00000000 D3 =00000000 D4 =00000000 D5 =00000000 D6 =00000000 D7 =00000000 A0 =00000000 A1 =00000000 A2 =00000000 A3 =00000000 A4 =00000000 A5 =00000000 A6 =00000000 A7 =00003FE8 00003000 203900F0 0000 MOVE.L ($F00000).L,D0 CPU32Bug>

M68CPU32BUG/D REV 1 2-11

Page 28

DEBUG MONITOR DESCRIPTION

Before the normal register display information is printed, the exception type information is displayed. This includes the type of exception with its format/vector word and the following:

Mnemonic Description Offset

SSW Special Status Word +$16 Fault Addr. Faulted Address +$10 Data Data +$0C Cur. PC Program Counter +$02 Cnt. Reg. Internal Transfer

Count Register

+$14

The upper nibble of the count register (Cnt. Reg.) contains the microcode revision number of the MCU device. Consult the CPU32 Reference Manual, Section 6 Exception Processing for more details.

Notice that the target stack pointer is different. The target stack pointer now points to the last value of the stacked exception stack frame. Examine the exception stack frame using the MD command.

CPU32Bug>MD (A7):C<CR>

00003FE8 A700 0000 3000 C008 00F0 0000 FFFF 3000 ‘...0.@ p....0.

00003FF8 0000 3000 0001 0065 ..0....e

CPU32Bug>

2.6 FUNCTION CODE SUPPORT

Function codes identify the address space being accessed on any given bus cycle, and are an extension of the address. The function codes provide additional information required to find the proper memory location.

For this reason, all debugger commands involving an address field were changed to allow the specification of function codes:

The caret ( ^ ) symbol following the address field indicates that a function code specification follows. The function code can be entered by specifying a valid function code mnemonic or by specifying a number between 0 and 7. The syntax for address and function code specifications are:

<ADDR>^<FC> Sets the function code to <FC> value.

<ADDR>^^ Toggles the displaying of function code values.

<ADDR>^<FC>= Sets the function code to <FC> and the default function code to <FC>.

The default value at power up is SD.

M68CPU32BUG/D REV 1 2-12

Page 29

DEBUG MONITOR DESCRIPTION

The valid function code mnemonics are:

Function Code Mnemonic Description

0 F0 Unassigned, reserved 1 UD User Data 2 UP User Program 3 F3 Unassigned, reserved 4 F4 Unassigned, reserved 5 SD Supervisor Data 6 SP Supervisor Program 7 CS CPU Space Cycle

The BR, GD, GO, and GT commands set the valid function codes to either a user program (UP) or supervisor program (SP). When execution is started via GO, GN, or GD, the default address space is determined by bit 13 (the S-bit) of the status register (SR). When set, SP i s used; when cleared, UP is used. By specifying a function code with GO, GT, or GD command, the SR S-bit is forced to the correct state before execution begins.

For the GT command, the temporary breakpoint is set using the function code specified, or it defaults to SP or UP, depending on the state of the S-bit in the SR.

Though function codes are supported, the BCC hardware does not require function codes to operate.

EXAMPLE To change data at location $5000 in the user data space.

CPU32Bug>m 5000^ud<CR> 00005000^UD 0000 ? 1234.<CR> CPU32Bug>

M68CPU32BUG/D REV 1 2-13

Page 30

DEBUG MONITOR DESCRIPTION

M68CPU32BUG/D REV 1 2-14

Page 31

DEBUG MONITOR COMMANDS

CHAPTER 3

DEBUG MONITOR COMMANDS

3.1 INTRODUCTION

This chapter contains descriptions and examples of the CPU32Bug debugger commands. Table 3-1 summarizes these commands.

Table 3-1. Debug Monitor Commands

Command

Mnemonic Title Paragraph

BC Block of Memory Compare 3.2 BF Block of Memory Fill 3.3

BM Block of Memory Move 3.4

BR/NOBR Breakpoint Insert/Delete 3.5

BS Block of Memory Search 3.6 BV Block of Memory Verify 3.7 DC Data Conversion 3.8

DU Dump S-Records 3.9 GD Go Direct (Ignore Breakpoints) 3.10 GN Go to Next Instruction 3.11 GO Go Execute User Program (alias G) 3.12

GT Go To Temporary Breakpoint 3.13

HE Help 3.14

LO Load S-Records from Host 3.15

MA/NOMA Macro Define/Display/Delete 3.16

MAE Macro Edit 3.17

MAL/NOMAL Macro Expansion Listing Enable/Disable 3.18

MD Memory Display 3.19 MM Memory Modify (alias M) 3.20 MS Memory Set 3.21

M68CPU32BUG/D REV 1 3-1

Page 32

DEBUG MONITOR COMMANDS

Table 3-1. Debug Monitor Commands (continued)

Command

Mnemonic Title Paragraph

OF Offset Registers Display/Modify 3.22

PA/NOPA Printer Attach/Detach 3.23

PF Port Format 3.24

RD Register Display 3.25

RESET Cold/Warm Reset 3.26

RM Register Modify 3.27

RS Register Set 3.28

SD Switch Directories 3.29

T Trace 3.30 TC Trace On Change of Control Flow 3.31 TM Transparent Mode 3.32

TT Trace To Temporary Breakpoint 3.33

VE Verify S-Records Against Memory 3.34

Each command is described in the following text. Command syntax symbols are explained in section 2.1. In the examples of the debugger commands all user inputs are in bold type. This helps clarify examples by distinguishing user input characters from CPU32Bug output characters. The symbol <CR> represents the carriage return key on the user’s terminal keyboard. This symbol indicates the user should enter a carriage return.

M68CPU32BUG/D REV 1 3-2

Page 33

DEBUG MONITOR COMMANDS

BC Block of Memory Compare BC

3.2 BLOCK OF MEMORY COMPARE

BC <range><del><addr>[;B|W|L]

options:

B – Byte W – Word L – Longword

The BC command compares the contents of the memory addresses defined by <range> to another place in memory, beginning at <addr>.

The option field is only allowed when <range> is specified using a count. In this case, the B, W, or L defines the size of data to which the count is referring. For example, a count of four with an option of L would mean to compare four long words (or 16 bytes) to the <addr> location. If the range beginning address is greater than the end address, an error results. An error also results if an option field is specified without a count in the range.

For the following examples, assume the following data is in memory.

CPU32Bug>MD 4000:20;B<CR> 00004000 54 48 49 53 20 49 53 20 41 20 54 45 53 54 21 21 THIS IS A TEST!!

00004010 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................

CPU32Bug>MD 4100:20;B<CR> 00004100 54 48 49 53 20 49 53 20 41 20 54 45 53 54 21 21 THIS IS A TEST!!

00004110 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................

EXAMPLES

CPU32Bug>BC 4000,401F 4100<CR> Effective address: 00004000 Effective address: 0000401F Effective address: 00004100 CPU32Bug> Memory compares, nothing printed

M68CPU32BUG/D REV 1 3-3

Page 34

DEBUG MONITOR COMMANDS

BC Block of Memory Compare BC

CPU32Bug>BC 4000:20 4100;B<CR> Effective address: 00004000 Effective count : &32 Effective address: 00004100 CPU32Bug> Memory compares, nothing printed

CPU32Bug>MM 410F;B<CR> 0000410F 21? 0.<CR> CPU32Bug> Create a mismatch

CPU32Bug>BC 4000:20 4100;B<CR> Effective address: 00004000 Effective count : &32 Effective address: 00004100 0000400F: 21 0000410F: 00 CPU32Bug> Mismatch is printed out

M68CPU32BUG/D REV 1 3-4

Page 35

DEBUG MONITOR COMMANDS

BF Block of Memory Fill BF

3.3 BLOCK OF MEMORY FILL

BF <range><del><data>[<del><increment>] [;B|W|L]

where:

<data> and <increment> are both expression parameters

options:

B – Byte W – Word L – Longword

The BF command fills the specified range of memory with a data pattern. If an increment is specified, then <data> is incremented by this value following each write, otherwise <data> remains a constant value. Enter a negative value in t he increment field to create a decrementing pattern . The data entered by the user is right-justified in either a byte, word, or longword field as specified by the option selected. The default field length is W (Word).

User-entered data or increment must fit into the data field or leading bits are truncated to size. If truncation occurs, then a message is printed stating the actual data pattern and/or the actual increment value.

If the range is specified using a count then the count is assumed to be in terms of the data size. Truncation always occurs on byte or word sized fields when negative values are entered. For

example, entering "-1" in ternally becomes $FFFFFFFF which gets truncated to $FF for byte or $FFFF for word sized field s. There i s no di fference int ernally between enteri ng "-1" and enterin g $FFFFFFFFF, so truncation occurs for byte or word sized fields.

If the upper address of the range is not on the correct boundary for an integer multiple of the data to be written, then data is filled to the last boundary before the upper address. Addresses outside of the specified range are not written under any condition. ''Effective address'' messages displayed by the command show the extent of the area written.

EXAMPLES Assume memory from $4000 to $402F is clear.

CPU32Bug>BF 4000,401F 4E71<CR> Effective address: 00004000 Effective address: 0000401F CPU32Bug>MD 4000 402F<CR> 00004000 4E71 4E71 4E71 4E71 4E71 4E71 4E71 4E71 NqNqNqNqNqNqNqNq 00004010 4E71 4E71 4E71 4E71 4E71 4E71 4E71 4E71 NqNqNqNqNqNqNqNq

00004020 0000 0000 0000 0000 0000 0000 0000 0000 ................

Since no option was specified, the length of the data field defaulted to word.

M68CPU32BUG/D REV 1 3-5

Page 36

DEBUG MONITOR COMMANDS

BF Block of Memory Fill BF

CPU32Bug>BF 4000:10 4E71 ;B<CR> Effective address: 00004000 Effective count : &16 Truncated data = $71 CPU32Bug>MD 4000:30;B<CR> 00004000 71 71 71 71 71 71 71 71 71 71 71 71 71 71 71 71 qqqqqqqqqqqqqqqq

00004010 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................

00004020 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................

CPU32Bug>

The specified data did not fit into the specified data field size. The dat a was truncated and the ’’Data = ’’ message was output.

CPU32Bug>BF 4000,4006 12345678 ;L<CR> Effective address: 00004000 Effective address: 00004003 CPU32Bug>MD 4000:30;B<CR>

00004000 12 34 56 78 00 00 00 00 00 00 00 00 00 00 00 00 .4Vx............

00004010 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................

00004020 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................

CPU32Bug>

The longword pattern would not fit evenly in the given range. Only one longword was written and the ’’Effective address’’ messages reflect the fact that data was not written all the way up to the specified address.

CPU32Bug>BF 4000:18 0 1<CR> Default size is Word Effective address: 00004000 Effective count : &24 CPU32Bug>MD 4000:18<CR>

00004000 0000 0001 0002 0003 0004 0005 0006 0007 ................

00004010 0008 0009 000A 000B 000C 000D 000E 000F ................

00004020 0010 0011 0012 0013 0014 0015 0016 0017 ................

M68CPU32BUG/D REV 1 3-6

Page 37

DEBUG MONITOR COMMANDS

BM Block of Memory Move BM

3.4 BLOCK OF MEMORY MOVE

BM <range><del><addr> [;B|W|L]

options:

B – Byte W – Word L – Longword

The BM command copies the contents of the memory addresses, defined by <range>, to another place in memory, beginning at <addr>. The option field is only allowed when <range> is specified using a count. In this case the B, W, or L defines the size of data to which the count is referring. For example, a count of four with an option of L would mean to move four longwords (or 16 bytes) to the new location. An error results if an option field is specified without a count in the range.

EXAMPLES Assume memory from $4000 to $402F is clear.

CPU32Bug>MD 4100:20;B<CR> 00004100 544B 4953 2049 5320 4120 5445 5354 2121 THIS IS A TEST!!

00004110 0000 0000 0000 0000 0000 0000 0000 0000 ................

CPU32Bug>BM 4100 410F 4000<CR> Effective address: 00004100 Effective address: 0000410F Effective address: 00004000

CPU32Bug>MD 4000:20;B<CR> 00004000 5448 4953 2049 5320 4120 5445 5354 2121 THIS IS A TEST!!

00004010 0000 0000 0000 0000 0000 0000 0000 0000 ................

This utility is useful for patching assembly code in memory. Suppose the user had a short program in memory at address $6000.

CPU32Bug>MD 6000 600A;DI<CR> 00004000 D480 ADD.L D0,D2 00004002 E2A2 ASR.L D1,D2 00004004 2602 MOVE.L D2,D3 00004006 4E4F0021 SYSCALL .OUTSTR 0000400A 4E71 NOP

M68CPU32BUG/D REV 1 3-7

Page 38

DEBUG MONITOR COMMANDS

BM Block of Memory Move BM

Now suppose the user would like to insert an NOP between the ADD.L instruction and the ASR.L instruction. Block move the object code down two bytes to make room for the NOP.

CPU32Bug>BM 6002 600B 6004<CR> Effective address: 00006002 Effective address: 0000600B Effective address: 00006004 CPU32Bug>MD 6000 600C;DI<CR> 00006000 D480 ADD.L D0,D2 00006002 E2A2 ASR.L D1,D2 00006004 E2A2 ASR.L D1,D2 00006006 2602 MOVE.L D2,D3 00006008 4E4F SYSCALL OUTSTR 0000600C 4E71 NOP

Now the user need simply enter the NOP at address 6002.

CPU32Bug>MM 6002;DI <CR> 00006002 E2A2 ASR.L D1,D2 ? NOP<CR> 00006002 4E71 NOP 00006004 E2A2 ASR.L D1,D2 ? .<CR> CPU32Bug>

CPU32Bug>MD 6000 600C;DI<CR> 00006000 D480 ADD.L D0,D2 00006002 4E71 NOP 00006004 E2A2 ASR.L D1,D2 00006006 2602 MOVE.L D2,D3 00006008 4E4F TRAP #15 0000600C 4E71 NOP CPU32Bug>

M68CPU32BUG/D REV 1 3-8

Page 39

DEBUG MONITOR COMMANDS

BR Breakpoint Insert BR NOBR

Breakpoint Delete NOBR

3.5 BREAKPOINT INSERT/DELETE

BR {<addr>[:<count> ]} NOBR [<addr>]

The BR command allows the user to set a target code instruction address as a breakpoint address for debugging purposes. Enter only the BR command to display the current breakpoints in the breakpoint table, or enter {<addr> [:<count> ]} one or more times to set multiple breakpoints. If during target code execution a breakpoint with 0 count is found, the target code state is saved in the target registers and control returned to CPU32Bug. This allows the user to see the act ual stat e of the processor at selected instructions in the code.

Breakpoints are normally only used in RAM, but they may be used in ROM when operating under the TRACE commands (see T, TC, and TT commands for details).

As many as eight breakpoints can be defined. Breakpoints are kept in a table which is displayed each time either BR or NOBR is used. If an address is specified with the BR command, that address is added to the breakpoint table. The count field specifies how many times the instruction at the breakpoint address is fetched before a breakpoint is taken. The count field defaults to hexidecimal input, unless a numeric identifier prefix is used. The count, if greater than zero, is decremented with each fetch. Every time a breakpoint with zero count is found, a breakpoint handler routine prints the CPU state on the screen and control is returned to CPU32Bug. The maximum <count> is a 32-bit value ($FFFFFFFF = 4,294,967,295).

NOBR is used to delete breakpoints from the breakpoint table. To remove a specific address from the breakpoint table, enter NOBR followed by the address. If NOBR <CR> is entered then all entries are deleted from the breakpoint table and the empty table is displayed.

EXAMPLE

CPU32Bug>BR 4000,4200 4700:&12 <CR> Set multiple breakpoints BREAKPOINTS 00004000 00004200 00004700:C

CPU32Bug>NOBR 4200 <CR> BREAKPOINTS 00004000 00004700:C

CPU32Bug>NOBR <CR> BREAKPOINTS CPU32Bug>

M68CPU32BUG/D REV 1 3-9

Delete one breakpoint

Delete all breakpoints

Page 40

DEBUG MONITOR COMMANDS

BS Block of Memory Search BS

3.6 BLOCK OF MEMORY SEARCH

BS <range><del><text> [;B|W|L] or BS <range><del><data>[<del><mask>] [;B|W|L|N|V]

The BS command searches the specified range of memory for a match with a user-entered data pattern. This command has three modes:

Mode 1 LITERAL STRING SEARCH — ex ecutes a search for the ASCII equivalent of

the literal string entered by the user. Mode 1 is indicated if <RANGE> is followed by a <text> field. The size as specified in the option field defines whether the count field in <range> refers to bytes, words, or longwords. The option field is available only if <range> is specified using a count. If a match is found then the address of the first byte of the match is output.

Mode 2 DATA SEARCH — a data pattern is entered by the user as part of the command

line. The data field size is entered by the user in the option field; the default is word (W). The size entered in the option field also dictates whether the count field in <RANGE> refers to bytes, words, or longwords. The following occurs during a data search:

1. The user-entered data pattern is right-justified. Leading bits are truncated or leading zeros are added as necessary to make the data pattern the specified size.

2. Successive bytes, words, or longwords, within the specified range, are compared to the user-entered data. Comparison is made only on those bits at bit positions corresponding to a 1 in the mask. If no mask is specified then a default mask of all one's is used (all bits are compared). The size of the mask is the same size as the data.

3. If the ''N'' (non-aligned) option has been selected then the data is searched on a byte-by-byte basis, rather than by words or longwords regardless of the size of <data>. This is useful if a word (or longword) pattern is being sought, but is not expected to lie on a word (or longword) boundary.

4. If a match is found, the address of the first byte of the match is output along with the memory contents. If a mask was in use, then the actual data at the memory location is displayed, rather than the masked data.

Mode 3 DATA VERIFICATION — If the ''V'' (verify) option is selected and the memory

contents do not match the user-specified pattern, then addresses and data are displayed. Otherwise this mode is identical to Mode 2.

M68CPU32BUG/D REV 1 3-10

Page 41

DEBUG MONITOR COMMANDS

BS Block of Memory Search BS

In all three modes information on matches is output to the screen in a four-column format. Only 24 lines of matches are displayed on the screen at a time. A message prints at the bottom of the screen indicating there are more lines to display. Press any charact er key to resume output. Press the BREAK key to cancel the output and exit the command.

If a match (or a mismatch in the case of Mode 3) is found with a series of bytes of memory whose beginning is within and end is outside of the range, then that match and a message is output stating that the last match does not lie entirely within the range. The user may search noncontiguous memory with this command without causing a Bus Error.

EXAMPLES Assume the following data is in memory.

00003000 0000 0045 7272 6F72 2053 7461 7475 733D ...Error Status= 00003010 3446 2F2F 436F 6E66 6967 5461 626C 6553 4F//ConfigTableS

00003020 7461 7274 3A00 0000 0000 0000 0000 0000 tart:...........

CPU32Bug>BS 3000 302F ’Task Status’<CR> Effective address: 00003000 Effective address: 0000302F message is output.

-not found-

CPU32Bug>BS 3000 302F ’Error Status’<CR> Effective address: 00003000 Effective address: 0000302F address of its first byte is output. 00003003

CPU32Bug>BS 3000 301F ’ConfigTableStart’<CR> Effective address: 00003000 Effective address: 0000301F outside of the range, so the address of 00003014 its first byte and a message are output.

-last match extends over range boundary-

CPU32Bug>BS 3000:30 ’t’ ;B<CR> Effective address: 00003000 Effective count : &48 and size option: count is displayed in 0000300A 0000300C 00003020 00003023 decimal, and address of each occur-

Mode 1: the string is not found, so a

Mode 1: the string is found, and the

Mode 1: the string is found, but it ends

Mode 1, using <RANGE> with count

rence of the string is output.

M68CPU32BUG/D REV 1 3-11

Page 42

DEBUG MONITOR COMMANDS

BS Block of Memory Search BS

CPU32Bug>BS 3000:18,2F2F<CR> Effective address: 00003000 Effective count : &24 count is displayedin decimal, and the data 00003012|2F2F pattern is found and displayed.

CPU32Bug>bs 3000,302F 3d34<CR> Effective address: 00003000 Effective address: 0000302F pattern is not found, so a message is output.

-not found-

CPU32Bug>bs 3000,302F 3d34 ;n<CR> Effective address: 00003000 Effective address: 0000302F aligned option is used, so the data pattern is 0000300F|3D34 found and displayed.

Mode 2, using <RANGE> with count:

Mode 2: the default size is word and the data

Mode 2: the default size is word and non-

CPU32Bug>BS 3000:30 60,F0 ;B<CR> Effective address: 00003000 Effective count : &48 00003006|6F 0000300B|61 00003015|6F 00003016|6E 00003017|66 00003018|69 00003019|67 0000301B|61 0000301C|62 0000301D|6C 0000301E|65 00003021|61

Mode 2, using <RANGE> with count, mask option, and size option: count is displayed in decimal, and the actual unmasked data patterns found are displayed.

CPU32Bug>BS 3000 302F 0 F;V<CR> Effective address: 00003000 Effective address: 0000302F 00003002|0045 00003004|7272 00003006|6F72 00003008|2053 0000300A|7461 0000300C|7475 0000300E|733D 00003010|3446 00003012|2F2F 00003014|436F 00003016|6E66 00003018|6967 0000301A|5461 0000301C|626C 0000301E|6553 00003020|7461 00003022|7274

Mode 3, mask option, scan for words with low nibble non-zero: 17 non-matching locations found.

M68CPU32BUG/D REV 1 3-12

Page 43

DEBUG MONITOR COMMANDS

BV Block of Memory Verify BV

3.7 BLOCK OF MEMORY VERIFY

BV <range><del><data> [<del><increment>][;B|W|L]

where:

<data> and <increment> are both expression parameters

options:

B – Byte W – Word L – Longword

The BV command compares the specified range of memory against a data pattern. If an increment is specified, then <data> is incremented by this value following each comparison, otherwise <data> remains a constant value. Enter a negative increment to execute a decrementing pattern. The data entered by the user is right-justified in either a byte, word, or longword field length (as specified by the option selected). The default field length is W (word).

If the range is specified using a count then the count is assumed to be in terms of the data size. Truncation always occurs on byte or word sized fields when negative values are entered. For

If the upper address of the range is not on the correct boundary for an integer multiple of the data to be verified, then data is verified to the last boundary before the upper address. Addresses outside of the specified range are not read under any condition. ''Effective address'' messages displayed by the command show the extent of the area read.

M68CPU32BUG/D REV 1 3-13

Page 44

DEBUG MONITOR COMMANDS

BV Block of Memory Verify BV

EXAMPLES Assume memory from $6000 to $602F is as indicated.

CPU32Bug>MD 6000:30;B <CR> 00006000 4E71 4E71 4E71 4E71 4E71 4E71 4E71 4E71 NqNqNqNqNqNqNqNq 00006010 4E71 4E71 4E71 4E71 4E71 4E71 4E71 4E71 NqNqNqNqNqNqNqNq 00006020 4E71 4E71 4E71 4E71 4E71 4E71 4E71 4E71 NqNqNqNqNqNqNqNq CPU32Bug>BV 6000 601F 4E71 <CR> Effective address: 00006000 Effective address: 0000601F

CPU32Bug>

Assume memory from $5000 to $502F is as indicated.

CPU32Bug>MD 5000:30;B<CR>

00005000 0000 0000 0000 0000 0000 0000 0000 0000 ................

00005010 0000 0000 0000 0000 0000 0000 0000 0000 ................

00005020 0000 0000 0000 0000 0000 4AFB 4AFB 4AFB ..........J.J.J.

CPU32Bug>BV 5000:30,0;B<CR> Effective address: 00005000 Effective count : &48 0000502A|4A 0000502B|FB 0000502C|4A 0000502D|FB 0000502E|4A 0000502F|FB

CPU32Bug>

Default size is Word

Verify successful, nothing printed.

Mismatches are printed out.

Assume memory from $7000 to $702F is as indicated.

CPU32Bug>MD 7000:18 <CR>

00007000 0000 0001 0002 0003 0004 0005 0006 0007 ................

00007010 0008 FFFF 000A 000B 000C 000D 000E 000F ................

00007020 0010 0011 0012 0013 0014 0015 0016 0017 ................

CPU32Bug>BV 7000:18,0,1 <CR> Effective address: 00007000 Effective count : &24 00007012|FFFF

CPU32Bug>

Default size is Word.

Mismatches are printed out.

M68CPU32BUG/D REV 1 3-14

Page 45

DEBUG MONITOR COMMANDS

DC Data Conversion DC

3.8 DATA CONVERSION

DC <exp>I<addr>

Use the DC command to simplify an expression into a single numeric value. The equivalent value is displayed in its hexadecimal and decimal representation. If the numeric value is interpreted as a signed negative number (i.e., if the most significant bit of the 32-bit internal representation of the number is set) then both the signed and unsigned interpretations are displayed.

Use DC to obtain the equivalent effective address of an MCU device addressing mode.

EXAMPLES

CPU32Bug>DC 10<CR>

00000010 = $10 = &16

CPU32Bug>DC &10-&20<CR> SIGNED : FFFFFFF6 = -$A = -&10 UNSIGNED: FFFFFFF6 = $FFFFFFF6 = &4294967286

CPU32Bug>DC 123+&345+@67+%1100001<CR>

00000314 = $314 = &788

CPU32Bug>DC (2*3*8)/4<CR>

0000000C = $C = &12

CPU32Bug>DC 55&F<CR>

00000005 = $5 = &5

CPU32Bug>DC 55>>1<CR>

0000002A = $2A = &42

The subsequent examples assume A0=00003000 and the following data resides in memory:

00003000 11111111 22222222 33333333 44444444 ....""""3333DDDD

CPU32Bug>DC (A0)<CR>

00003000 = $3000 = &12288

CPU32Bug>DC ([A0])<CR>

11111111 = $11111111 = &286331153

CPU32Bug>DC (4,A0)<CR>

00003004 = $3004 = &12292

CPU32Bug>DC ([4,A0])<CR>

22222222 = $22222222 = &572662306

M68CPU32BUG/D REV 1 3-15

Page 46

DEBUG MONITOR COMMANDS

DU Dump S-Records DU

3.9 DUMP S-RECORDS

DU [<port><del>]<range><del>[<text><del>][<addr>][<offset>] [;B|W|L]

The DU command outputs data from memory in the form of Motorola S-records to a port specified by the user. If <port> is not specified then the S-records are sent to the I/O port (port 0). For S-record information see Appendix A.

The option field is only allowed when <range> is specified using a count. In this case the B, W, or L defines the size of data to which the count is referring. For example, a count of four with an option of L would mean to move four longwords (or 16 bytes) to the new location. An error results if an option field is specified without a count in the range.

Use the optional <text> field for incorporating text into the S0 header record of the block of records that is to be dumped.

To use the optional <addr> field, enter an entry address for code contained in the block of records. This address is incorporated into the address field of the block’s termination record. If no entry address is entered then the address field of the termination record will contain the beginning <range> address. The termination record is an S7, S8, or S9 record and depends upon the entered address.

An optional offset may also be specified by the user in the <offset> field. The offset value is added to the addresses of the memory locations being dumped. This generates the address which is written to the address field of the S-records, creating an S-record file which is loaded back into memory at a different location than that from which it was dumped. The default offset is zero.

NOTE

If an offset is specified but no entry address is specified then two commas (indicating a missing field) must precede the offset to keep it from being interpreted as an entry address.

EXAMPLES Dump memory from $8000 to $802F to port 1.

CPU32Bug>DU 1 8000 802F<CR> Effective address: 00008000 Effective address: 0000802F CPU32Bug>

M68CPU32BUG/D REV 1 3-16

Page 47

DEBUG MONITOR COMMANDS

DU Dump S-Records DU

Dump 10 bytes of memory beginning at $3000 to terminal screen (port 0).

CPU32Bug>DU 3000:&10;B<CR> Effective address: 00003000 Effective count : &10 S0003000FC S10D3000000000040008000C00109A S9030000FC CPU32Bug>

Dump memory from $4000 to $402F to host (port 1). Specify a file name of ’’TEST’’ in the S0 header record and specify an entry point of $400A.

CPU32Bug>DU 1 4000 402F ’TEST’ 400A<CR> Effective address: 00004000 Effective address: 0000402F CPU32Bug>

The following example illustrates the procedure for uploading S-records to a host computer, in this case an IBM-PC or compatible running MS-DOS with the ProComm terminal emulation utility. Assume memory from $4000 to $4007 is initialized as follows:

CPU32Bug>MD 4000:4;DI<CR> 00004000 7001 MOVEQ.L #$1,D0 00004002 D089 ADD.L A1,D0 00004004 4A00 TST.B D0 00004006 4E75 RTS CPU32Bug>

Enter the following command to dump S-records from memory locations $4000-$4007 with a start address of $4000, a title of ’TEST.MX’, and an offset of $65000000. Before entering the <CR> to send the DU command to CPU32Bug, enter the ProComm command <ALT-F1> keys to open a log file. Enter the filename as TEST.MX. Then enter the carriage return, <CR> to complete the DU command entry. The DU command output is sent to the screen and ProComm copies it into the file TEST.MX.

CPU32Bug>DU 4000 4007 ’TEST.MX’ 4000 65000000<ALT-F1><CR> Effective address: 00004000 Effective address: 00004007 S00A0000544553542E4D58E2 S30D650040007001D089A004E7576 S7056500400055 CPU32Bug>

M68CPU32BUG/D REV 1 3-17

Page 48

DEBUG MONITOR COMMANDS

DU Dump S-Records DU

Enter ALT-F1 again to close the log file TEST.MX. The log file contains the extra lines of "Effective address" and "CPU32Bug", but they will not affect subsequent CPU32Bug load (LO) commands, as it keys on the "S" character. The file could be edited to remove the extra lines, if so desired.

M68CPU32BUG/D REV 1 3-18

Page 49

DEBUG MONITOR COMMANDS

GD Go Direct (Ignore Breakpoints) GD

3.10 GO DIRECT (IGNORE BREAKPOINTS)

GD [<addr>]

Use the GD command to start target code execution. If an address is specified, it is placed in the target PC. Execution starts at the target PC address. Under the GD command no breakpoints are inserted.

Once execution of target code begins, control is returned to CPU32Bug by various conditions:

• Press the ABORT switch or RESET switch of the M68300PFB Platform Board

• Execute the .RETURN TRAP #15 function

• Generation of an unexpected exception

EXAMPLE The following program resides at $4000.

CPU32Bug>MD 4000;DI<CR> 00004000 2200 MOVE.L D0,D1 00004002 4282 CLR.L D2 00004004 D401 ADD.B D1,D2 00004006 E289 LSR.L #$1,D1 00004008 66FA BNE.B $4004 0000400A E20A LSR.B #$1,D2 0000400C 55C2 SCS.B D2 0000400E 60FE BRA.B $400E CPU32Bug>RM D0<CR>

Initialize D0 and start target program:

D0 =00000000 ? 52A9C.<CR> CPU32Bug>GD 4000<CR> Effective address: 00004000

M68CPU32BUG/D REV 1 3-19

Page 50

DEBUG MONITOR COMMANDS

GD Go Direct (Ignore Breakpoints) GD

To exit target code, press ABORT pushbutton.

Exception: Abort PC =0000400E SR =2711=TR:OFF_S_7_X...C VBR =00000000 SFC =0=F0 DFC =0=F0 USP =0000FC00 SSP* =0000FF50 D0 =00052A9C D1 =00000000 D2 =000000FF D3 =00000000 D4 =00000000 D5 =00000000 D6 =00000000 D7 =00000000 A0 =00005000 A1 =00000000 A2 =00000000 A3 =00000000 A4 =00000000 A5 =00000400 A6 =00000000 A7 =0000FF50 0000400E 60FE BRA.B $400E CPU32Bug>

Set PC to start of program and restart target code:

CPU32Bug>RM PC<CR> PC =0000400E ? 4000.<CR> CPU32Bug>GD<CR> Effective address: 00004000

M68CPU32BUG/D REV 1 3-20

Page 51

DEBUG MONITOR COMMANDS

GN Go To Next Instruction GN

3.11 GO TO NEXT INSTRUCTION

Use the GN command to set a temporary breakpoint at the next instruction’s address, that is, the one following the current instruction. GN then starts target code execution. After setting the temporary breakpoint, the sequence of events is similar to that of the GO command. If there is already a breakpoint at the tempory breakpoint location, the breakpoint must have a count less than or equal to one or an error occurs.

GN is helpful when debugging modular code, because it allows the user to trace through a subroutine call as if it were a single instruction.

EXAMPLE The following section of code resides at $6000.

CPU32Bug>MD 6000:4;DI<CR> 00006000 7003 MOVE.L #$3,D0 00006002 7201 MOVEQ.L #$1,D1 00006004 61000FFA BSR.W $7000 00006008 2600 MOVE.L D0,D3 CPU32Bug>

The following simple subroutine resides at address $7000.

CPU32Bug>MD 7000:2;DI<CR> 00007000 D081 ADD.L D1,D0 00007002 4E75 RTS CPU32Bug>

Execute up to the BSR instruction.

CPU32Bug>RM PC<CR> PC =00003000 ? 6000.<CR> CPU32Bug>GT 6004<CR>

Effective address: 00006004 Effective address: 00006000 Current PC at $6000.

At Breakpoint PC =00006004 SR =2700=TR:OFF_S_7 VBR =00000000 SFC =0=F0 DFC =0=F0 USP =00003830 SSP* =00010000 D0 =00000003 D1 =00000001 D2 =00000000 D3 =00000000 D4 =00000000 D5 =00000000 D6 =00000000 D7 =00000000 A0 =00000000 A1 =00000000 A2 =00000000 A3 =00000000 A4 =00000000 A5 =00000000 A6 =00000000 A7 =00010000 00006004 61000FFA BSR.W $7000 CPU32Bug>

Tempory breakpoint at $6004.

M68CPU32BUG/D REV 1 3-21

Page 52

DEBUG MONITOR COMMANDS

GN Go To Next Instruction GN

Use the GN command to trace through the subroutine call and display the results.

CPU32Bug>GN<CR> Effective address: 00006008 Effective address: 00006004 Current PC at $6000.

At Breakpoint

PC =00006008 SR =2700=TR:OFF_S_7_..... VBR =00000000

SFC =0=F0 DFC =0=F0 USP =00003830 SSP* =00010000 D0 =00000004 D1 =00000001 D2 =00000000 D3 =00000000 D4 =00000000 D5 =00000000 D6 =00000000 D7 =00000000 A0 =00000000 A1 =00000000 A2 =00000000 A3 =00000000 A4 =00000000 A5 =00000000 A6 =00000000 A7 =00010000 00006008 2600 MOVE.L D0,D3 CPU32Bug>

Tempory breakpoint at $6004.

M68CPU32BUG/D REV 1 3-22

Page 53

DEBUG MONITOR COMMANDS

GO Go Execute User Program GO

3.12 GO EXECUTE USER PROGRAM

GO [<addr>]

Use the GO command (alias G) to initiate target code execution. All previously set breakpoints are enabled. If an address is specified, it is placed in the target PC. Execution st arts at the target PC address.

The sequence of events is:

1. An address is specified and loaded into the target PC

2. If a breakpoint is set at the target PC address, the instruction is traced at the target P C (executed in trace mode)

3. All breakpoints are inserted in the target code

4. Target code execution resumes at the target PC address

There are several methods for returning control to CPU32Bug:

• Execute the .RETURN TRAP #15 function

• Press the ABORT switch or RESET switch of the M68300PFB Platform Board

• Encountering a breakpoint with 0 count

• Generation of an unexpected exception

EXAMPLE The following program resides at $4000.

M68CPU32BUG/D REV 1 3-23

Page 54

DEBUG MONITOR COMMANDS

GO Go Execute User Program GO

Initialize D0, set breakpoints, and start target program:

D0 =00000000 ? 52A9C.<CR> CPU32Bug>BR 4000,400E<CR> BREAKPOINTS 00004000 0000400E CPU32Bug>GO 4000<CR> Effective address: 00004000 At Breakpoint PC =0000400E SR =2711=TR:OFF_S_7_X...C VBR =00000000 SFC =5=SD DFC =5=SD USP =0000FC00 SSP* =00010000 D0 =00052A9C D1 =00000000 D2 =000000FF D3 =00000000 D4 =00000000 D5 =00000000 D6 =00000000 D7 =00000000 A0 =00000000 A1 =00000000 A2 =00000000 A3 =00000000 A4 =00000000 A5 =00000000 A6 =00000000 A7 =00010000 0000400E 60FE BRA.B $400E

Note that in this case breakpoints are inserted after tracing the first instruction, therefore the first breakpoint is not taken.

Continue target program execution.

CPU32Bug>G<CR> Effective address: 0000400E At Breakpoint PC =0000400E SR =2711=TR:OFF_S_7_X...C VBR =00000000 SFC =5=SD DFC =5=SD USP =0000FC00 SSP* =00010000 D0 =00052A9C D1 =00000000 D2 =000000FF D3 =00000000 D4 =00000000 D5 =00000000 D6 =00000000 D7 =00000000 A0 =00000000 A1 =00000000 A2 =00000000 A3 =00000000 A4 =00000000 A5 =00000000 A6 =00000000 A7 =00010000 0000400E 60FE BRA.B $400E

Remove breakpoints and restart target code.

CPU32Bug>NOBR<CR> BREAKPOINTS CPU32Bug>GO 4000<CR> Effective address: 00004000

M68CPU32BUG/D REV 1 3-24

Page 55

DEBUG MONITOR COMMANDS

GO Go Execute User Program GO

Press the ABORT pushbutton on the platform board to exit target code.

Exception: ABORT PC =0000400E SR =2711=TR:OFF_S_7_X.C VBR =00000000 SFC =5=SD DFC =5=SD USP =0000FC00 SSP* =00010000 D0 =00052A9C D1 =00000000 D2 =000000FF D3 =00000000 D4 =00000000 D5 =00000000 D6 =00000000 D7 =00000000 A0 =00000000 A1 =00000000 A2 =00000000 A3 =00000000 A4 =00000000 A5 =00000000 A6 =00000000 A7 =00010000 0000400E 60FE BRA.B $400E

M68CPU32BUG/D REV 1 3-25

Page 56

DEBUG MONITOR COMMANDS

GT Go To Temporary Breakpoint GT

3.13 GO TO TEMPORARY BREAKPOINT

GT <addr>[:<count>]

Use the GT command to set a temporary breakpoint and start target code execution. A count may be specified with the temporary breakpoint. Control is given at the target PC address. All previously set breakpoints are enabled. The temporary breakpoint is removed when any breakpoint with 0 count is encountered.

After setting the temporary breakpoint, the sequence of events is similar to that of the GO command. At this point control is returned to CPU32Bug by:

• Executing the .RETURN SYSCALL (TRAP #15) function

• Press the ABORT switch or RESET switch of the M68300PFB Platform Board

• Encountering a breakpoint with 0 count

• Generation of an unexpected exception

EXAMPLE The following program resides at $4000.

Initialize D0 and set a breakpoint:

D0 =00000000 ? 52A9C.<CR> CPU32Bug>BR 400E<CR> BREAKFOINTS 0000400E CPU32Bug>

Set PC to beginning of program, set temporary breakpoint, and start target code:

CPU32Bug>RM PC<CR> PC =0000400E ? 4000.<CR> CPU32Bug>

M68CPU32BUG/D REV 1 3-26

Page 57

DEBUG MONITOR COMMANDS

GT Go To Temporary Breakpoint GT

CPU32Bug>GT 4006<CR> Effective address: 00004006 Effective address: 00004000 Current PC at $4000.

At Breakpoint PC =00004006 SR =2711=TR:OFF_S_7_X...C VBR =00000000 SFC =0=F0 DFC =0=F0 USP =00003830 SSP* =00010000 D0 =00052A9C D1 =00000029 D2 =00000009 D3 =00000000 D4 =00000000 D5 =00000000 D6 =00000000 D7 =00000000 A0 =00000000 A1 =00000000 A2 =00000000 A3 =00000000 A4 =00000000 A5 =00000000 A6 =00000000 A7 =00010000 00004006 E289 LSR.L #1,D1 CPU32Bug>

Set another temporary breakpoint at $4002 and continue target program execution.

Tempory breakpoint at $4006.

CPU32Bug>GT 4002<CR> Effective address: 00004002 Effective address: 00004006 Current PC at $4006.

At Breakpoint PC =0000400E SR =2711=TR:OFF_S_7_X...C VBR =00000000 SFC =0=F0 DFC =0=F0 USP =00003830 SSP* =00010000 D0 =00052A9C D1 =00000000 D2 =000000FF D3 =00000000 04 =00000000 D5 =00000000 D6 =00000000 D7 =00000000 A0 =00000000 A1 =00000000 A2 =00000000 A3 =00000000 A4 =00000000 A5 =00000000 A6 =00000000 A7 =00010000 0000400E 60FE BRA.B $400E

Tempory breakpoint at $4002.

Note that a breakpoint from the breakpoint table was encountered before the temproary breakpoint.

M68CPU32BUG/D REV 1 3-27

Page 58

DEBUG MONITOR COMMANDS

HE Help HE

3.14 HELP

HE [<command>]

HE is the CPU32Bug help facility. HE <CR> displays all available commands and their title plus any macro commands that have been defined (see macro define/display (MA) command). All CPU32Bug commands are in alphabetical order except for NOxx and the "alias" commands. Macro commands are displayed first, in the inverse order in which they were defined. When the HE command output fills the terminal screen, a message is printed asking the user to press "RETURN" to continue. Entering he <command> displays the specified command name and title.

EXAMPLES

CPU32Bug>HE<CR> BC Block Compare BF Block Fill BM Block Move BR Breakpoint Insert NOBR Breakpoint Delete BS Block Search BV Block Verify DC Data Conversion and Expression Evaluation DU Dump S-Records GD Go Direct (no breakpoints) GN Go and Stop after Next Instruction GO Go to Target Code G "Alias" for previous command GT Go and Insert Temporary Breakpoint HE Help Facility LO Load S-Records MA Macro Define/Display NOMA Macro Delete MAE Macro Edit MAL Enable Macro Expansion Listing NOMAL Disable Macro Expansion Listing MD Memory Display MM Memory Modify M "Alias" for previous command MS Memory Set OF Offset Registers PA Printer Attach NOPA Printer Detach PF Port Format RD Register Display RESET Warm/Cold Reset RM Register Modify RS Register Set

M68CPU32BUG/D REV 1 3-28

Page 59

DEBUG MONITOR COMMANDS

HE Help HE

SD Switch Directory T Trace Instruction TC Trace on Change of Flow TM Transparent Mode TT Trace to Temporary Breakpoint VE Verify S-Records CPU32Bug>

To display the available commands in the diagnostic directory use the switch directory (SD) command and at the CPU32Diag> prompt enter HE.

CPU32Bug>sd<CR> CPU32Diag>he<CR> DE Display Errors DP Display Pass Count LC Loop-Continue Mode LE Loop-on-Error Mode NV NOn-Verbose Mode MT Memory Tests (Dir) RL Read Loop (Dir) SE Stop-on-Error Mode SM Modify Self-Test Mask ST Self Test Sequence WL Write Loop (Dir) WR Write/Read Loop (Dir) ZE Clear Error Counters ZP Zero Pass Count BC Block Compare BF Block Fill BM Block Move BR Breakpoint Insert NOBR Breakpoint Delete BS Block Search BV Block Verify DC Data Conversion and Expression Evaluation DU Dump S-Records GD Go Direct (no breakpoints) GN Go and Stop after Next Instruction GO Go to Target Code G "Alias" for previous command GT Go and Insert Temporary Breakpoint HE Help Facility LO Load S-Records MA Macro Define/Display NOMA Macro Delete MAE Macro Edit MAL Enable Macro Expansion Listing

M68CPU32BUG/D REV 1 3-29

Page 60

DEBUG MONITOR COMMANDS

HE Help HE

NOMAL Disable Macro Expansion Listing MD Memory Display MM Memory Modify M "Alias" for previous command MS Memory Set OF Offset Registers PA Printer Attach NOPA Printer Detach PF Port Format RD Register Display RESET Warm/Cold Reset RM Register Modify RS Register Set SD Switch Directory T Trace Instruction TC Trace on Change of Flow TM Transparent Mode TT Trace to Temporary Breakpoint VE Verify S-Records CPU32Bug>

To display the command TC, enter:

CPU32Bug>HE TC<CR> TC Trace on Change of Flow CPU32Bug>

M68CPU32BUG/D REV 1 3-30

Page 61

DEBUG MONITOR COMMANDS

LO Load S-Records From Host LO

3.15 LOAD S-RECORDS FROM HOST

LO [<port><del>][<addr>][;<X/-C/T>][=<text>]

Use the LO command to download a Motorola S-records format data file from a host computer to the BCC. The LO command accepts serial data from the host and loads it into on-board memory.

The optional port number allows the user to specify the download port. If this number is omitted, the default is port 0.

The BCC default hardware configuration consists of one I/O port; P4 on the BCC or P9 on the PFB. This limits the user to one host computer running a terminal emulation program. To send Srecords, the user must escape out of the terminal emulati on program because the host computer can not perform terminal emulation and send S-records at the same time. When the host is not in terminal emulation mode, all status messages from CPU32Bug would be lost. Thus the user must press <CR> twice after re-entering the terminal emulation program to signal CPU32Bug that status messages can now be sent.

The optional <addr> field allows the user to enter an offset address. This offset address is added to the address contained in the address field of each record which causes the records to be stored in memory at a different location. The contents of the automatic offset register are not added to the S-record addresses (see OF command). If the address is in the range $0 to $1F and the port number is omitted, enter a comma before the address to distinguish it from a port number. Only absolute addresses (i.e., "1000") should be entered, as other addressing modes cause unpredictable results. An address is allowed here rather than an offset (expression) to permit support for function codes (see paragraph 2.5).

The optional text field, entered after the equal sign (=), is sent to the host before CPU32Bug begins looking for S-records at the host port. This allows the user to send a download command to the host device. This text should NOT be delimited by quote marks. The text string begins immediately following the equal sign and terminates with the carriage return. If the host is operating full duplex, the string is echoed back to the host port by the host and appears on the user’s terminal screen.

In order to accommodate host systems that echo all received characters, the above-mentioned text string is transmitted to and received from the host one character at a time. After the entire command is sent to the host, LO looks for a line feed (LF) character from the host, signifying the end of the echoed command. No data records are processed until this LF is received. If the host system does not echo characters, LO continues looking for an LF character before data records are processed. In situations where the host system does not echo characters, it is required that the first record transferred by the host system be a header record. The header record is not used, but the LF after the header record serves to break LO out of the loop so data records are processed.

M68CPU32BUG/D REV 1 3-31

Page 62

DEBUG MONITOR COMMANDS

LO Load S-Records From Host LO

Other options:

-C Ignore checksum. A checksum for the data contained within an S-record is calculated as the S-record is read in through the port. Normally this calculated checksum is compared to the checksum contained within the S-record. If the compare fails, an error message is sent to the screen on completion of the download. If this option is selected, then the comparison is not made.

X Echo. As the S-records are read in at the host port, they are echoed to the user’s

terminal. Do not use this option when port 0 is specified.

T TRAP #15 code. This option causes LO to set the target register D4 = ’LO’x, with

x = $0C ($4C4F200C). The ASCII string ’LO’ indicates that this is the LO command; the code $0C indicates TRAP #15 support with stack parameter/result passing and TRAP #15 disk support. This code is used by the downloaded program to select the appropriate calling convention when executing debugger functions. Since some Motorola debuggers use conventions different from CPU32Bug, they set a different code in D4.

The S-record format (refer to Appendix A) allows a specified ent ry point in the address field of the S-record-block termination record. The contents of the termination-record address fi eld (plus any offset address) is put into the target PC. Thus after a download the user need only enter G or GO instead of G <addr> or GO <addr> to execute the downloaded code.

If a non-hex character is encountered within the data field of a data record, then that part of the record, preceeding the non-hex character, is displayed. This causes the CPU32Bug error handler to point at the faulty character.

An error condition exists if the embedded-record checksum does not agree with the checksum calculated by CPU32Bug. An output message displays the address of the record (as obtained from the address field of the record), the calculated checksum, and the checksum read with the record. A copy of the record is also output. A checksum error is a fatal error and causes the command to abort.

When a load is in progress, each data byte is written to memory and then the contents of this memory location are compared to the data to determine if the data is stored properly. If for some reason the compare fails, then an output message displays the address where the data was to be stored, the data written, and the data read back during the compare. This is also a fatal error and causes the command to abort.

S-records are processed character-by-character. So if the command aborts due to an error, all data stored previous to the error is still in memory .

M68CPU32BUG/D REV 1 3-32

Page 63

DEBUG MONITOR COMMANDS

LO Load S-Records From Host LO

EXAMPLES Suppose a host computer was used to create a program that looks like this:

1 * Test Program. 2* 3 65004000 ORG $65004000 4 5 65004000 7001 MOVEQ.L #1,D0 6 65004002 D088 ADD.L A0,D0 7 65004004 4A00 TST.B D0 8 65004006 4E75 RTS 9 END ****** TOTAL ERRORS 0-****** TOTAL WARNINGS 0--

Then this program was converted into an S-record file named TEST.MX as follows:

S00F00005445535453335337202001015E S30D650040007001D0884A004E7577 S7056500400055

Load this file into BCC memory for execution at address $4000 as follows:

CPU32Bug>LO -65000000<CR>

Blank line as the BCC waits for an S-record.

Enter the terminal emulator’s escape key to return to the host computer’s operating system (ALTF4 for ProComm). A host command is then entered to send the S-record file to the port where the BCC is connected (for MS-DOS based host computer this would be "type test.mx >com1", where the BCC was connected to the com1 port).

After the file has been sent, the user then restarts the terminal emulation program (for MS-DOS based host computers, enter EXIT at the prompt).

Since the port number equals the current terminal, two <CR>’s are required to signal CPU32Bug that the download is complete and the terminal emulation program is ready to receive any error messages.

<CR><CR> Signal download completion. CPU32Bug> No error messages.

M68CPU32BUG/D REV 1 3-33

Page 64

DEBUG MONITOR COMMANDS

MA Macro Define/Display MA NOMA

Macro Delete NOMA

3.16 MACRO DEFINE/DISPLAY/DELETE

MA [<name>] NOMA [<name>]

The <name> can be any combination of 1-8 alphanumeric characters. The MA command allows the user to define a complex command consisting of any number of

CPU32Bug primitive commands with optional parameter specifications. By simply entering the new <name> plus any arguments on the command line, the stored CPU32Bug commands are executed. This allows the user to design new commands to simplify the debug process. The NOMA command is used to delete either a single macro or all macros.

Entering MA without specifying a macro name causes CPU32Bug to list all currently defined macros and their definitions.

When MA is executed with the name of a currently defined macro, that macro definition is displayed.

Line numbers are shown when displaying macro definitions to facilitate editing via the macro edit (MAE) command. If MA is executed with a valid name that does not currently have a definition, then the CPU32Bug enters the macro definition mode. In response to each macro definition prompt "M=", enter a CPU32Bug command and a carriage return. Commands entered are not checked for syntax until the macro is executed. To exit the macro definition mode, enter only a carriage return (null line) in response to the prompt. If the macro contains errors, it can either be deleted and redefined or it can be edited with the MAE command. A macro containing no primitive CPU32Bug commands (i.e., no definition) is not accepted.

Macro definitions are stored in a string pool of fixed size. If the string pool becomes full while in the definition mode, the offending string is discarded, a message STRING POOL FULL, LAST LINE DISCARDED is printed and the user is returned to the CPU32Bug command prompt. This also happens if the string entered would cause the string pool to overflow. The string pool has a capacity of 511 characters. The only way to add or expand macros when the string pool is full is to either edit or delete macros.

CPU32Bug commands contained in macros may reference arguments supplied at invocation time. Arguments are denoted in macro definitions by embedding a back slash (\) followed by a numerial. As many as ten arguments are permitted. A definition containing a back slash followed by a zero would cause the first argument to that macro to be inserted in place of the "\0" characters.

M68CPU32BUG/D REV 1 3-34

Page 65

DEBUG MONITOR COMMANDS

MA Macro Define/Display MA NOMA

Macro Delete NOMA

The second argument is used whenever the sequence "\1" occurs. Entering ARGUE 3000 1 ;B on the debugger command line would execute the macro named ARGUE with the text strings 3000, 1, and ;B replacing "\0", "\1", and "\2", respectively, within the body of the macro.

To delete a macro, execute NOMA followed by the name of the macro. Executing NOMA without specifying a macro name deletes all macros. If NOMA is executed with a valid macro name that does not have a definition, an error message is printed.

EXAMPLES

CPU32Bug>MA ABC<CR> Define macro ABC. M=MD 3000 M=GO \0 M=<CR> CPU32Bug>

CPU32Bug>MA DASM<CR> M=MD \0:5;DI M=<CR> CPU32Bug>

Define macro DASM.

CPU32Bug>MA<CR> MACRO ABC 010 MD 3000 020 GO \0 MACRO DIS 010 MD \0:5;DI CPU32Bug>

CPU32Bug>DASM 427C<CR> 0000427C 48E78080 MOVEM.L D0/A0,-(A7) 00004280 4280 CLR.L D0 00004282 1018 MOVE.B (A0)+,D0 00004284 5340 SUBQ.W #$1,D0 00004286 12D8 MOVE.B (A0)+,(A1)+ CPU32Bug>

CPU32Bug>MA ABC<CR> MACRO ABC 010 MD 3000 020 GO \0 CPU32Bug>

CPU32Bug>NOMA DASM<CR> CPU32Bug>

List macro definitions.

Execute DASM macro.

List definitions macro ABC.

Delete macro DASM.

M68CPU32BUG/D REV 1 3-35

Page 66

DEBUG MONITOR COMMANDS

MA Macro Define/Display MA NOMA

CPU32Bug>MA ASM<CR> Define macro ASM. M=MM \0;DI M=<CR> CPU32Bug>

CPU32Bug>MA<CR> MACRO ABC 010 MD 3000 020 GO \0 MACRO ASM 010 MD \0;DI CPU32Bug>

CPU32Bug>NOMA<CR> CPU32Bug>

CPU32Bug>MA<CR> NO MACROS DEFINED CPU32Bug>

Macro Delete NOMA

List all macros.

Delete all macros.

List all macros.

M68CPU32BUG/D REV 1 3-36

Page 67

DEBUG MONITOR COMMANDS

MAE Macro Edit MAE

3.17 MACRO EDIT

MAE <name><del><line#><del>[<string>]

Where:

<name> any combination of 1-8 alphanumeric characters

<line#> line number in range 1-999

<string> replacement line to be inserted

The MAE command permits modification of the macro named on the command line. MAE is line oriented and supports the following actions: insertion, deletion, and replacement.

To insert a line, specify a line number between the numbers of the lines that the new line is to be inserted between. The text of the new line to be inserted must also be specified on the command line following the line number.

To replace a line, specify its line number and enter the replacement text after the lin e number on the command line.

A line is deleted if its line number is specified and the replacement line is omitted. Attempting to delete a nonexistent line results in an error message being printed. MAE does not

permit deletion of a line if the macro consists of only that line. NOMA must be used to remove a macro. To define new macros, use MA; the MAE command operates only on previously defined macros.

Line numbers serve one purpose: specifying the location within a macro definition to perform the editing function. After the editing is complete, the macro definition is displayed with a new set of line numbers.

M68CPU32BUG/D REV 1 3-37

Page 68

DEBUG MONITOR COMMANDS

MAE Macro Edit MAE

EXAMPLES

CPU32Bug>MA<CR> List definitions of macro ABC. MACRO ABC 010 MD 3000 020 GO \0 CPU32Bug>

CPU32Bug>MAE ABC 15 RD<CR> MACRO ABC 010 MD 3000 020 RD 030 GO \0 CPU32Bug>

CPU32Bug>MAE ABC 10 MD 10+R0<CR> MACRO ABC

010 MD 10+R0 020 RD 030 GO \0 CPU32Bug>

CPU32Bug>MAE ABC 30<CR> MACRO ABC 010 MD 10+R0 020 RD CPU32Bug>

Add a line to macro ABC.

This line was inserted.

Replace line 10. This line was overwritten.

Delete line 30.

M68CPU32BUG/D REV 1 3-38

Page 69

DEBUG MONITOR COMMANDS

MAL Macro Expansion Listing Enable MAL NOMAL

Macro Expansion Listing Disable NOMAL

3.18 MACRO EXPANSION LISTING ENABLE/DISABLE

MAL NOMAL

The MAL command allows t he user to view expanded macro lines as they are executed. This is especially useful when errors result, as the line with the error appears on the display.

The NOMAL command is used to suppress the listing of macro lines during execution. The use of MAL and NOMAL is a convenience for the user and in no way interacts with the

function of the macros.

M68CPU32BUG/D REV 1 3-39

Page 70

DEBUG MONITOR COMMANDS

MD Memory Display MD

3.19 MEMORY DISPLAY

MD[S] <addr>[:<count>|<addr>][; [B|W|L|DI]]

Use the MD command to display the contents of multiple memory locations. MD accepts the following data types:

Integer Data Type

B – Byte W – Word L – Longword

The default data type is word (W). Integer data types are always displayed in both hex and ASCII. The DI option enables the resident MCU disassembler. No other option is allowed if DI is selected.

The optional count argument in the MD command specifies the number of data items to be displayed, or the number of disassembled instructions to display if the disassembly option is selected. The default is 8 if no value for <count> is entered. The default count is changed to 128 if the S (sector) modifier is used. After the command has completed, enter <CR> at the prompt to re-execute the command and display the same number of lines of data beginning at the next address.

EXAMPLES

CPU32Bug>md C000<CR> 0000C000 2800 1942 2900 1942 2800 1842 2900 2846 (..B)..B(..B).(F

CPU32Bug><CR>

0000C010 FC20 0050 ED07 9F61 FF00 000A E860 F060 1..Pm..a....h’p’

Assume the following processor state: A2=00003500, D5=00000127.

CPU32Bug>md (a2,d5):&19;b<CR> 00003627 4F82 00C5 9B10 337A DF01 6C3D 4B50 0F0F 0..E..3z_.l=KP.. 00003637 31AB 80 1+. CPU32Bug>

M68CPU32BUG/D REV 1 3-40

Page 71

DEBUG MONITOR COMMANDS

MD Memory Display MD

CPU32Bug>md 5008;di<CR> 00005008 46FC2700 MOVE.W #$2700,SR 0000500C 61FF0000023E BSR.L #$524C 00005012 4E7AD801 MOVEC.L VBR,A5 00005016 41ED7FFC LEA.L $7FFC(A5),A0 0000501A 5888 ADDQ.L #$4,A0 0000501C 2E48 MOVE.L A0,A7 0000501E 2C48 MOVE.L A0,A6 00005020 13C7FFFB003A MOVE.B D7,($FFFB003A).L CPU32Bug>

NOTE

If the address location requested is not displayed, the automatic offset register is non-zero and has been added to the address. See the offset (OF) command.

M68CPU32BUG/D REV 1 3-41

Page 72

DEBUG MONITOR COMMANDS

MM Memory Modify MM

3.20 MEMORY MODIFY

MM <addr>[;[[B|W|L][A][N]]|[DI]]

Use the MM command (alias M) to examine and change memory locations. MM accepts the following data types:

Integer Data Type

B – Byte W – Word L – Longword

The default data type is word. The MM command (alias M) reads and displays the contents of memory at the specified address and prompts the user with a question mark ( ? ). The user may enter new data for the memory location, followed by <CR>, or may simply enter <CR>, which leaves the contents unaltered. That memory location is closed and the next memory location is opened.

The user may also enter one of several step control characters, either at the prompt or after writing new data. Enter one of the following step control characters to modify the command execution:

V or v The next successive memory location is opened. This is the default. It

initializes whenever MM is executed and remains initialized until changed by entering one of the other special characters.

^ MM backs up and opens the previous memory location.

= MM re-opens the same memory location. This is useful for examining I/O

registers or memory locations that are changing over time).

. Terminates MM command. Control returns to CPU32Bug.

The N option of the MM command disables the read portion of the command. The A option forces alternate location accesses only, i.e. skip a byte/word/longword access per the data type in use.

NOTE

If the address location requested is not displayed, the automatic offset register is non-zero and has been added to the address. See the offset (OF) command.

M68CPU32BUG/D REV 1 3-42

Page 73

DEBUG MONITOR COMMANDS

MM Memory Modify MM

EXAMPLES

CPU32Bug>MM 3100<CR> Access location 3100. 00003100 1234?<CR> 00003102 5678? 4321<CR> Modify memory. 00003104 9ABC? 8765^<CR> Modify memory and backup. 00003102 4321?<CR> No change, backup still utilized. 00003100 1234? abcd.<CR> Modify memory and exit.

CPU32Bug>MM 3001;LA<CR> Longword access to location 3001. 00003001 CD432187?<CR> Alternate location accesses. 00003009 00068010? 68010+10=<CR> Modify and re-open location. 00003009 00068020?<CR> No change, re-open still utilized. 00003009 00068020? .<CR> Exit MM.

CPU32Bug>MM 4000<CR> Modify WORDs starting at $4000. 00004000 0000? ’A’<CR> Enter ASCII ’A’, right justified. 00004002 0000? ’B’<CR> Enter ASCII ’B’, right justified. 00004004 0000? ’CD’<CR> Enter ASCII ’CD’, right justified. 00004006 0000? ’EFG’<CR> Enter ASCII ’FG’, right justified. Note the ’E’ is

truncated due to right justified WORD size!

00004008 0000? .<CR> Exit MM. CPU32Bug>MD 4000<CR>

00004008 0041 0042 4344 4647 0000 0000 0000 0000 .A.BCDFG........

CPU32Bug>

The DI option activates the one-line assembler/disassembler. All other options are invalid if DI is selected. The contents of the specified memory location is disassembled and displayed and the user prompted for an input with a question mark ( ? ). At this point the user has three options:

• Enter <CR> – This closes the present location and continues with disassembly of the

next instruction. The instruction is unchanged.

• Enter a new source instruction followed by <CR> – This actuates the assembler to

assemble the new instruction and generate a disassembly of the object code generated.

• Enter <CR> – This closes the present location and exits the MM command.

If a new source line is entered (second option above), the present line is erased and replaced by the new source line.

If an error is found during assembly, the caret symbol (^) appears below the suspect field followed by an error message. The accessed location is redisplayed.

Refer to Chapter 4 for additional information about the assembler.

M68CPU32BUG/D REV 1 3-43

Page 74

DEBUG MONITOR COMMANDS

MS Memory Set MS

3.21 MEMORY SET

MS <addr>{hexadecimal number}/{’string’}

Use the MS command to write data to memory starting at a specified address. Hex numbers are not size specific, so they can contain any number of digits (as allowed by command line buffer size). If an odd number of digits is entered, the least significant nibble of the last byte accessed is unchanged.

ASCII strings are entered by enclosing them in single quotes (’string’). To include a quote as part of the string, enter two consecutive quotes.

EXAMPLE Memory is initially cleared:

CPU32Bug>ms 25000 0123456789abcDEF ’This is ’’CPU32Bug’’’ 23456<CR> CPU32Bug>md 25000:10;w<CR> 00025000 0123 4567 89AB CDEF 5468 6973 2069 7320 .#Eg.+MoThis is

00025010 2733 3332 4275 6727 2345 6000 0000 0000 ’CPU32Bug’#E‘.....

CPU32Bug>

NOTE

If the address location requested is not displayed, the automatic offset register is non-zero and has been added to the address. See the offset (OF) command.

The MS command stores all data on a byte-by byte basis and thus should not be used on any locations that require word accessing only, such as the MC68332 TPU registers. For those locations requiring word accessing, use the memory modify (MM) command with the ;W or ;L option.

M68CPU32BUG/D REV 1 3-44

Page 75

DEBUG MONITOR COMMANDS

OF Offset Registers Display/Modify OF

3.22 OFFSET REGISTERS DISPLAY/MODIFY

OF [Rn[;A]]

The OF command allows the user to access and change pseudo-registers called offset registers. These registers are used to simplify the debugging of relocatable and position independent modules (refer to offset registers in paragraph 2.1.1.3).

There are 8 offset registers (R0 through R7), but only R0 through R6 can be changed. Both the base and top addresses of R7 is always set to 0. This disables the automatic register function by selecting R7 as the automatic register.

Each offset register has two values: base and top. The base is the absolute least address used for the range declared by the offset register. The top address is the absolute greatest address used. When entering the base and top, the user may use either an address/address format or an address/count format. When specifying a count the value of count is in bytes. If the top address is omitted from the range, then a top address of $FFFFFFFF is the default. The top address must equal or exceed the base address. Wrap-around is not permitted.

Command usage:

OF Display all offset registers. An asterisk indicates which register is the

OF Rn Display/modify Rn. Scroll through the registers using the same method as

OF Rn;A Display/modify Rn and set it as the automatic register. The automatic

Range entry:

Ranges are entered in three formats; base address alone, base and top as a pair of addresses, and base address followed by byte count. Step control characters as described in the MM (memory modify) command are supported.

Range syntax:

automatic register.

the MM command.

register is added to the absolute address argument of every command except if an offset register is explicitly added. in the display an asterisk indicates which register is the automatic register.

[<base address> [<del> <top address>] ] [^|v|=|.]

[<base address> [ : <byte count> ] ] [^|v|=|.]

M68CPU32BUG/D REV 1 3-45

Page 76

DEBUG MONITOR COMMANDS

OF Offset Registers Display/Modify OF

Offset register rules:

• At power-up and cold-start reset, R7 is the automatic register, and all offset registers

have both base and top addresses preset to 0. This disables the offset registers.

• R7 always has both base and top addresses set to 0; it cannot be changed.

• Any offset register can be set as the automatic register.

• The automatic register is always added to every absolute address argument of every

CPU32Bug command where an offset register is not explicitly defined (this includes the OF command itself). To enter an absolute address, always add R7 to the address, i.e. +R7.

• The register commands (RD, RM) do not use the automatic register, i.e. the program

counter is always displayed/entered absolutely. However, the RS (register set) command does use the automatic register.

• There is always an automatic register. To disable the effect of the automatic register

set R7 as the automatic register. This is the default condition.

EXAMPLES Display offset registers. Shows base and top values for each register.

CPU32Bug>OF<CR> R0 = 00000000 00000000 R1 = 00000000 00000000 R2 = 00000000 00000000 R3 = 00000000 00000000 R4 = 00000000 00000000 R5 = 00000000 00000000 R6 = 00000000 00000000 R7*= 00000000 00000000

Modify offset registers.

CPU32Bug>OF R0<CR> R0 = 00000000 00000000? 5000 50FF<CR>

R1 = 00000000 00000000? 5100:200^<CR> R0 = 00020000 000200FF? <CR> No change, backup still utilized R6 = 00000000 00000000? .<CR> Exit. Notice wrap around to R6.

Modify and backup

Display location $5000. Shows base and top values for each register.

CPU32Bug>M 5000;DI<CR> 00000+R0 41F95445 5354 LEA.L ($54455354).L,A0 .<CR> CPU32Bug>M R0;DI <CR> 00000+R0 41F95445 5354 LEA.L ($54455354).L,A0 .<CR> CPU32Bug>

M68CPU32BUG/D REV 1 3-46

Page 77

DEBUG MONITOR COMMANDS

OF Offset Registers Display/Modify OF

Set R0 as the automatic register.

CPU32Bug>OF R0;A<CR> R0*=00005000 000050FF? .<CR>

Display location 0 relative to the default offset register, (R0), i.e. absolute location $5000.

CPU32Bug>M 0;DI<CR> 00000+R0 41F95445 5354 LEA.L ($54455354).L,A0 .<CR> CPU32Bug>

Display absolute location 0, override the automatic offset.

CPU32Bug>M 0+R7;DI <CR> 00000000 FFF8 DC.W $FFF8 .<CR> CPU32Bug>

M68CPU32BUG/D REV 1 3-47

Page 78

DEBUG MONITOR COMMANDS

PA Printer Attached PA NOPA

Printer Detached NOPA

3.23 PRINTER ATTACH/DETACH

PA [<port>] NOPA [<port>]

PA attach a printer to a specified port. NOPA detaches a printer from a speci fied port. When the printer is attached, everything appearing on the computer terminal is echoed to the attached printer. If no port is specified when executing PA, the default is port 1. NOPA detaches all attached printers. The port number must be in the range 0 to $1F.

If the port number specified is not currently assigned, PA displays an error message. If NOPA is attempted on a printer that is not currently attached, an error message is displayed. Use the PF (port format) command to configure the port before attaching a printer to it.

RECOVERING FROM A ’’HUNG’’PRINTER: attached ports are not detached by exceptions (bus errors, abort, etc). If PA is executed using incorrect parameters, or a fault such as a paper jam occurs, press the RESET switch on the M68300PFB Platform Board to recover control of the printer.

EXAMPLES CONSOLE DISPLAY: PRINTER OUTPUT:

CPU32Bug>PA <CR> (attaching port 1 by default) (printer now attached)

CPU32Bug>HE NOPA <CR> CPU32Bug>HE NOPA NOPA Printer detach NOPA Printer detach

CPU32Bug>NOPA <CR> CPU32Bug>NOPA (detach all attached printers) (printer now detached) CPU32Bug>

M68CPU32BUG/D REV 1 3-48

Page 79

DEBUG MONITOR COMMANDS

PF Port Format PF

3.24 PORT FORMAT

PF [<port>]

Use the PF command to display and change the serial input/output environment. Use PF to display a list of the current port assignments, configure a port that is already assigned, or assign and configure a new port. The configuration process is interactive, much like modifying registers or memory (RM and MM commands). An interlock is provided prior to configuring the hardware, the user must explicitly direct PF to proceed.

Only eight ports are assigned at any given time. The port number must be within the range 0 to $1F.

3.24.1 List Current Port Assignments Executing PF without specifying a port number lists the board and port names. EXAMPLE

CPU32Bug>PF <CR> Current port assignments: (Port #: Board name, Port name) 00: BCC, "SCI" CPU32Bug>

3.24.2 Port Configuration

Use PF to primarily change baud rates, stop bits, etc. Execute the PF command with the desired port number to assign and configure port parameters. Refer to paragraph 3.20.4 New Port Assignment.

When PF is executed with the number of a previously assigned port, the interactive mode is entered immediately. To exit from the interactive mode, enter a period by itself or following a new value/setting. While in the interactive mode, step control characters as described in the MM (memory modify) command are supported.

EXAMPLE Change number of stop bits on port number 0.

CPU32Bug>PF 0 <CR> Baud rate [110,300,600,1200,2400,4800,9600,19200] = 9600? <CR> Even, Odd, or No Parity [E,O,N] = N? <CR> Char Width [5,6,7,8] = 8? <CR>

Stop bits [1,2] = 1? 2<CR>

M68CPU32BUG/D REV 1 3-49

New value entered.

Page 80

DEBUG MONITOR COMMANDS

PF Port Format PF

( the next response demonstrates reversing the prompting order )

XON/XOFF protocol [Y,N] = Y? ^ <CR> Backup Stop Bits [1,2] = 2? .<CR> Value acceptable, exit interactive

mode.

OK to proceed (y/n)? Y Note: Carriage return not required. CPU32Bug>

3.24.3 Port Format Parameters

The port format parameters are:

• Port base address – When assigning a port, there is a set base address option. This

allows the user to adjust the base address for different hardware configurations. Entering no value selects the default address.

• Baud rate – Select the baud rate: 110, 300, 600, 1200, 2400, 4800, 9600, 19200.

• Parity type – Set parity: even (E), odd (0), or disabled (N).

• Character width – Select 5-, 6-, 7-, or 8-bit characters.

• Number of stop bits – Only 1 and 2 stop bits are supported.

• Automatic software handshake – Current drivers have the capability of responding to

XON/XOFF characters sent to the debugger ports. Receiving a XOFF causes a driver to cease transmission until a XON character is received. None of the current drivers utilize FIFO buffering, therefore, none initiate an XOFF condition.

• Software handshake character values – The values used by a port for XON and XOFF

may be defined as any 8-bit value. ASCII control characters or hexadecimal values are accepted.

NOTE

Not all combinations of parity type, character width, and stop bits are supported for the BCC "SCI" port, 00. See Appendix C for details.

M68CPU32BUG/D REV 1 3-50

Page 81

DEBUG MONITOR COMMANDS

PF Port Format PF

3.24.4 New Port Assignment PF supports a set of drivers for a number of different boards and ports. To assign one of these to

a previously unassigned port number, execute the command with that port number. A message is then printed to indicate that the port is unassigned and a prompt issued to request the type of serial communication device. Pressing RETURN at this point lists the currently supported boards and ports. Once the name of the board is entered, the port name is requested at the prompt. After the port name is entered, PF prompts the user through the port configuration process.

Once a valid port is specified, default parameters are supplied. The base address of this new port is one of these default parameters. Before entering the interactive configuration mode, the user is allowed to change the port base address. Press RETURN to retain the present base address.

If the configuration of the new port is not fixed, then the system enters the interactive configuration mode. Refer to paragraph 3.20.2 regarding configuring assigned ports. If the new port has a fixed configuration, then PF issues the ’’OK to proceed (Y/N)?’’ prompt.

The user must enter the letter ’’Y’’ at the ’’OK to proceed (Y/N)?’’ prompt before PF initializes the hardware. Pressing BREAK any time prior to this step or responding with the letter ’’N’’ at the prompt leaves the port unassigned. This is only true of ports not previously assigned.

EXAMPLE Assigning port 1.

CPU32Bug>PF 1<CR> Logical unit $01 unassigned

Name of board?<CR> Boards and ports supported: BCC: SCI MC68681: A, B

Name of board? mc68681<CR> Name of port? a<CR> Port base address = $FFFFE000?<CR> Baud rate [110, 300, 600, 1200, 2400, 4800, 9600, 19200] = 9600? .<CR>

OK to proceed (Y/N)? n CPU32Bug>

Cause PF to list supported boards, ports.

Note: Upper or lowercase accepted.

Note: Aborted, no hardware!

M68CPU32BUG/D REV 1 3-51

Page 82

DEBUG MONITOR COMMANDS

RD Register Display RD

3.25 REGISTER DISPLAY

RD {[+|-|=][<dname>][/]}{[+|-|=][<reg1>[-<reg2>]][/]}

Use the RD command to display the target state, that is, the register state associated with the target program (refer to the GO command). The target PC points to the instruction to be disassembled and displayed. Internally, a register mask specifies which registers are displayed when RD <CR> is executed. At reset time, this mask is set to display the MPU registers only. Change this register mask with the RD command. Optional arguments allow the user the capability to enable or disable the display of any register or group or registers. This is useful for showing only the registers of interest, minimizing unnecessary data on the screen.

The arguments are:

+ Add a device or register range

- Remove a device or register range, except when used between two register names. In which case it indicates a register range.

= Set a device or register range.

/ Use this delimiter between device names and register ranges. <reg1> Indicates the first register in a range of registers. <reg2> Indicates the last register in a range of registers.

<dname> Indicates a device name. Use <DNAME> to enable or disable all device

registers for:

MPU Microprocessor Unit

M68CPU32BUG/D REV 1 3-52

Page 83

DEBUG MONITOR COMMANDS

RD Register Display RD

Observe the following when specifying any arguments in the command line:

• The qualifier is applied to the next register range only.

• If no qualifier is specified, a + qualifier is assumed.

• All device names should precede register names.

• The command line arguments are parsed from left to right, with each field being

processed after parsing, thus, the sequence in which qualifiers and registers are organized has an impact on the resultant register mask.

• When specifying a register range, <REG1> and <REG2> do not have to be of the

same class, i.e. D0 - A7.

• The register mask used by RD is also used by all the exception handler routines,

including the trace and breakpoint exception handlers.

The MPU registers in ordering sequence are:

Number of registers

10 System Registers (PC,SR,USP,SSP,VBR,SFC,DFC) 8 Data Registers (D0-D7) 8 Address Registers (A0-A7)

M68CPU32BUG/D REV 1 3-53

Page 84

DEBUG MONITOR COMMANDS

RD Register Display RD

EXAMPLES

CPU32Bug>rd<CR>

PC =00003000 SR =2700=TR:OFF_S_7_..... VBR =00000000

SFC =0=F0 DFC =0=F0 USP =0000F830 SSP* =00004000 D0 =00000000 D1 =00000000 D2 =00000000 D3 =00000000 D4 =00000000 D5 =00000000 D6 =00000000 D7 =00000000 A0 =00000000 A1 =00000000 A2 =00000000 A3 =00000000 A4 =00000000 A5 =00000000 A6 =00000000 A7 =00004000 00003000 424F DC.W $424F CPU32Bug>

NOTES

An asterisk following a stack pointer name indicates an active stack pointer. To facilitate reading the status register it includes a mnemonic portion. These mnemonics are:

Trace Bits The trace bits (T0, T1) control the trace feature of the MCU and are

displayed by the mnemonic as shown in the following table. The user should not modify these bits when executing user programs.

T1 T0 Mnemonic Description

0 0 TR:OFF Trace off 0 1 TR:CHG Trace on change of flow 1 0 TR:ALL Trace all states 1 1 TR:INV Invalid mode

S Bits The bit name (S) appears if the supervisor/user state bit is set, otherwise a

period (.) indicates it is cleared.

Interrupt Mask A number from 0 to 7 indicates the current processor priority level.

Condition Codes The bit name (X, N, Z, V, C) appears if the respective bit is set, otherwise

a period (.) indicates it is cleared.

M68CPU32BUG/D REV 1 3-54

Page 85

DEBUG MONITOR COMMANDS

RD Register Display RD

The source and destination function code registers (SFC, DFC) include a two character mnemonic:

Function Code Mnemonic Description

0 F0 Undefined 1 UD User Data 2 UP User Program 3 F3 Undefined 4 F4 Undefined 5 SD Supervisor Data 6 SP Supervisor Program 7 CS CPU Space

To set the display to D6 and A3 only.

CPU32Bug>RD =D6/A3<CR> D6 =00000000 A3 =00000000 00003000 4AFC ILLEGAL CPU32Bug>

Note that the above sequence sets the display to D6 only and then adds register A3 to the display.

To restore all the MPU registers.

CPU32Bug>rd +mpu<CR>

PC =00003000 SR =2700=TR:OFF_S_7_..... VBR =00000000

SFC =0=F0 DFC =0=F0 USP =00003830 SSP* =00004000 D0 =00000000 D1 =00000000 D2 =00000000 D3 =00000000 D4 =00000000 D5 =00000000 D6 =00000000 D7 =00000000 A0 =00000000 A1 =00000000 A2 =00000000 A3 =00000000 A4 =00000000 A5 =00000000 A6 =00000000 A7 =00004000 00003000 4AFC ILLEGAL CPU32Bug>

Note that an equivalent command is ’’RD +PC-A7’’ or ’’RD =PC-A7’’.

M68CPU32BUG/D REV 1 3-55

Page 86

DEBUG MONITOR COMMANDS

RESET Cold/Warm Reset RESET

3.26 COLD/WARM RESET

RESET

Use the RESET command to specify the reset operation level when a RESET exception is detected by the processor. Press the RESET switch on the M68300PFB platform board to generate a reset exception.

Two RESET levels are available:

COLD This is the standard mode of operation, and is the default at power-up. In

this mode all the static variables are initialized every time a reset is executed.

WARM In this mode all the static variables are preserved when a reset exception

occurs. This is convenient for keeping breakpoints, offset register values, the target register state, and any other static variables in the system.

EXAMPLE

CPU32Bug>RESET<CR> Cold/Warm Start = C (C/W)? W<CR>

CPU32Bug>

Set to warm start. Press the RESET pushbutton.

CPU32Bug>

M68CPU32BUG/D REV 1 3-56

Page 87

DEBUG MONITOR COMMANDS

RM Register Modify RM

3.27 REGISTER MODIFY

RM <reg>

Use the RM command to display and change the target registers. The RM command functions in essentially the same way as the MM command, and the same step control characters are used to control the display/change session. Refer to the MM command.

EXAMPLES

CPU32Bug>RM D4<CR> D5 =12345678? ABCDEF^<CR> D4 =00000000? 3000.<CR> Modify register and exit. CPU32Bug>

Modify register and backup.

CPU32Bug>rm sfc<CR> SFC =7=CS ? 1=<CR> SFC =1=UD ? .<CR> Exit CPU32Bug>

Modify register and re-open.

M68CPU32BUG/D REV 1 3-57

Page 88

DEBUG MONITOR COMMANDS

RS Register Set RS

3.28 REGISTER SET

RS <reg>[<exp>][;A]

Use the RS command to display or change a single target register. The default offset register value is always added to <exp> unless overridden by specifically including an offset register. See the OF (offset register) command.

The ;A option is only valid when <reg> is an offset register, i.e. R0 - R7. Use the ;A option to set <reg> as the automatic register. If R7 is specified, no <exp> is allowed (R7 cannot be changed). See the OF (offset register) command.

EXAMPLES

CPU32Bug>RS PC 40*1000+4<CR> PC =00040004 CPU32Bug>

CPU32Bug>OF R4;A<CR> R4*00000000 00000000? 4000 4FFF<CR> Set up automatic offset register R4. CPU32Bug>RS PC 124<CR> PC =00004124 Set PC=$124+R4. CPU32Bug>RS A4 32A<CR> A4 =0000432A Set A4=$32A+R4. CPU32Bug>RS A5 400+R7<CR> A5 =00000400 Set A5 equal to absolute location $400

($400+R7).

CPU32Bug>

M68CPU32BUG/D REV 1 3-58

Page 89

DEBUG MONITOR COMMANDS

SD Switch Directories SD

3.29 SWITCH DIRECTORIES

Use the SD command to toggle between the debugger directory and the diagnostic directory. Use the HE (Help) command to list the current directory commands. Directory structure allows access to the debugger commands from either directory but the

diagnostic commands are only available from the diagnostic directory.

EXAMPLES

CPU32Bug>SD<CR> CPU32Diag>

The user has changed from the debugger directory to the diagnostic directory, as can be seen by the ’’CPU32Diag>’’ prompt

CPU32Diag>SD<CR> CPU32Bug>

The user is now back in the debugger directory.

M68CPU32BUG/D REV 1 3-59

Page 90

DEBUG MONITOR COMMANDS

T Trace T

3.30 TRACE

T [<count>]

Use the T command to execute one instruction at a time and display the target state after execution. T starts tracing at the address in the target PC. The optional count field specifies the number of instructions to be traced before returning control to CPU32Bug. The count field default is 1. As each instruction is traced, a register display printout is generated.

During tracing, breakpoints in ROM or write protected memory are monitored (but not inserted) for all trace commands which allow the use of breakpoints in ROM or write protected memory. Control is returned to CPU32Bug if a breakpoint with 0 count is encountered.

Trace functions are implemented with the trace bits (T0, T1) in the MCU device status register. Do not modify trace bits (T0, T1) while using the trace commands. Because the t race functions are implemented using the hardware trace bits in the MCU, code i n ROM can be traced. During trace mode, breakpoints are monitored and their counts decremented when the corresponding instruction with breakpoint is traced. This allows breakpoints to work in ROM, but only in the trace mode.

EXAMPLE The following program resides at location $7000.

CPU32Bug>MD 7000;DI<CR> 00007000 2200 MOVE.L D0,D1 00007002 4282 CLR.L D2 00007004 D401 ADD.B D1,D2 00007006 E289 LSR.L #$1,D1 00007008 66FA BNE.B $7004 0000700A E20A LSR.B #$1,D2 0000700C 55C2 SCS.B D2 0000700E 60FE BRA.B $700E CPU32Bug>

Initialize PC and D0:

CPU32Bug>RM PC<CR> PC =00008000 ? 7000.<CR>

CPU32Bug>RM D0 <CR> D0 =00000000 ? 8F4IC.<CR>

M68CPU32BUG/D REV 1 3-60

Page 91

DEBUG MONITOR COMMANDS

T Trace T

Display target registers and trace one instruction:

CPU32Bug>RD<CR>

PC =00007000 SR =2700=TR:OFF_S_7_..... VBR =00000000

SFC =0=F0 DFC =0=F0 USP =0000382C SSP* =00004000 D0 =0008F41C D1 =00000000 D2 =002003A2 D3 =00000000 D4 =00000000 D5 =00000000 D6 =00000000 D7 =00000000 A0 =00000000 A1 =00000000 A2 =00000000 A3 =00000000 A4 =00000000 A5 =00000000 A6 =00000000 A7 =00004000 00007000 2200 MOVE.L D0,D1

CPU32Bug>T<CR>

PC =00007002 SR =2700=TR:OFF_S_7_..... VBR =00000000

SFC =0=F0 DFC =0=F0 USP =0000382C SSP* =00004000 D0 =0008F41C D1 =0008F41C D2 =002003A2 D3 =00000000 D4 =00000000 D5 =00000000 D6 =00000000 D7 =00000000 A0 =00000000 A1 =00000000 A2 =00000000 A3 =00000000 A4 =00000000 A5 =00000000 A6 =00000000 A7 =00004000 00007002 4282 CLR.L D2 CPU32Bug>

Trace next instruction:

CPU32Bug><CR> PC =00007004 SR =2704=TR:OFF_S_7_..Z.. VBR =00000000 SFC =0=F0 DFC =0=F0 USP =0000382C SSP* =00004000 D0 =0008F41C D1 =0008F41C D2 =00000000 D3 =00000000 D4 =00000000 D5 =00000000 D6 =00000000 D7 =00000000 A0 =00000000 A1 =00000000 A2 =00000000 A3 =00000000 A4 =00000000 A5 =00000000 A6 =00000000 A7 =00004000 00007004 D401 ADD.B D1,D2 CPU32Bug>

M68CPU32BUG/D REV 1 3-61

Page 92

DEBUG MONITOR COMMANDS

T Trace T

Trace the next two instructions:

CPU32Bug>T 2<CR>

PC =00007006 SR =2700=TR:OFF_S_7_..... VBR =00000000

SFC =0=F0 DFC =0=F0 USP =0000382C SSP* =00004000 D0 =0008F41C D1 =0008F41C D2 =0000001C D3 =00000000 D4 =00000000 D5 =00000000 D6 =00000000 D7 =00000000 A0 =00000000 A1 =00000000 A2 =00000000 A3 =00000000 A4 =00000000 A5 =00000000 A6 =00000000 A7 =00004000 00007006 E289 LSR.L #$1,D1

PC =00007008 SR =2700=TR:OFF_S_7_ ..... VBR =00000000

SFC =0=F0 DFC =0=F0 USP =0000382C SSP* =00004000 D0 =0008F41C D1 =00047A0E D2 =0000001C D3 =00000000 D4 =00000000 D5 =00000000 D6 =00000000 D7 =00000000 A0 =00000000 A1 =00000000 A2 =00000000 A3 =00000000 A4 =00000000 A5 =00000000 A6 =00000000 A7 =00004000 00007008 66FA BNE.B $7004 CPU32Bug>

M68CPU32BUG/D REV 1 3-62

Page 93

DEBUG MONITOR COMMANDS

TC Trace On Change Of Control Flow TC

3.31 TRACE ON CHANGE OF CONTROL FLOW

TC [<count>]

Use the TC command to start execution at the address in the target PC. Tracing begins at detection of an instruction that causes a change of control flow, such as Bcc, JSR, BSR, RTS, etc. Execution is in real time until a change of flow instruction is encountered. The optional count field specifies the number of change of flow instructions to be traced before returning control to CPU32Bug. The optional count field default is 1. Register display printout only occurs when a change of control flow occurs.

During tracing, breakpoints in ROM or write protected memory are monitored (but not inserted) for all trace commands which allow the use of breakpoints. Note that the TC command recognizes a breakpoint only if it is at a change of flow instruction. Control is returned to CPU32Bug if a breakpoint with 0 count is encountered. See the trace (T) command for more details.

The trace functions are implemented with the trace bits (T0, T1) in the MCU device status register. Do not modify the trace bits (T0, T1) while using the trace commands. Because the trace functions are implemented using the hardware trace bits in the MCU, code in ROM can be traced. During trace mode, breakpoints are monitored and their counts decremented when the corresponding instruction with breakpoint is traced. This allows breakpoints to work in ROM, but only in the trace mode.

EXAMPLE The following program resides at location $7000.

Initialize PC and D0:

CPU32Bug>RM PC <CR> PC =00008000 ? 7000.<CR>

CPU32Bug>RM D0 <CR> D0 =00000000 ? 8F41C.<CR>

M68CPU32BUG/D REV 1 3-63

Page 94

DEBUG MONITOR COMMANDS

TC Trace On Change Of Control Flow TC

Trace on change of flow:

CPU32Bug>TC<CR> 00007008 66FA BNE.B $7004

PC =00007004 SR =2700=TR:OFF_S_7_..... VBR =00000000

Note that the above display also shows the change of flow instruction.

M68CPU32BUG/D REV 1 3-64

Page 95

DEBUG MONITOR COMMANDS

TM Transparent Mode TM

3.32 TRANSPARENT MODE

TM [<port>][<escape>]

The TM command connects the console serial port and the host port together, allowing the user to communicate with a host computer. A message displayed by TM shows the current escape character, i.e., the character used to exit the t ransparent mode. The two ports remain connected until the escape character is received by the console port. The escape character is not transmitted to the host and at power up or reset is initialized to $01=^A.

The optional port number allows the user to specify which port is the host port. If the port number is omitted the default is port 1. The port number must be within the range 0 to $1F.

Ports do not have to have the same baud rate, but for reliable operation the terminal port baud rate should be equal to or greater than the host port baud rate. Use the PF command to change baud rates.

The optional escape argument allows the user to specify the exit character. Use one of three formats:

ascii code : $03 Set escape character to ^C

ascii character : ’c Set escape character to c

control character : ^C Set escape character to ^C

If the port number is omitted and the escape argument is entered as a numeric value, precede the escape argument with a comma to distinguish it from a port number.

EXAMPLES

CPU32Bug>TM<CR> Escape character: $01=^ A <^A>

CPU32Bug>TM ^g<CR> Enter TM and set escape character Escape character: $07=^ G to ^ G. <^G> Exit transparent mode. CPU32Bug>

Enter TM. Exit code is always displayed. Exit transparent mode.

M68CPU32BUG/D REV 1 3-65

Page 96

DEBUG MONITOR COMMANDS

TT Trace To Temporary Breakpoint TT

3.33 TRACE TO TEMPORARY BREAKPOINT

TT <addr>

Use the TT command to set a temporary breakpoint at a specified address and trace until encountering a 0 count breakpoint. The temporary breakpoint is then removed (TT is analogous to the GT command) and control is returned to CPU32Bug. Tracing starts at the target PC address. As each instruction is traced, a register display printout is generated.

During tracing, breakpoints in ROM or write protected memory are monitored (but not inserted) for all trace commands which allow the use of breakpoints. Control is returned to CPU32Bug if a breakpoint with 0 count is encountered. See the trace (T) command for more details.

The trace functions are implemented with the trace bit s (T0, T1) in the MCU status register. Do not modify trace bits (T0, T1) while using the trace commands. Because the t race functions are implemented using the hardware trace bits in the MCU, code in ROM can be traced. During trace mode, breakpoints are monitored and their counts decremented when the corresponding instruction with breakpoint is traced. This allows breakpoints to work in ROM, but only in the trace mode.

EXAMPLE The following program resides at location $7000.

Initialize PC and D0:

CPU32Bug>RM PC<CR> PC =00008000 ? 7000.<CR>

CPU32Bug>RM D0<CR> D0 =00000000 ? 8F41C.<CR>

M68CPU32BUG/D REV 1 3-66

Page 97

DEBUG MONITOR COMMANDS

TT Trace To Temporary Breakpoint TT

Trace to temporary breakpoint:

CPU32Bug>TT 7006<CR>

PC =00007002 SR =2700=TR:OFF_S_7_..... VBR =00000000

SFC =0=F0 DFC =0=F0 USP =0000382C SSP* =00004000 D0 =0008F41C D1 =0008F41C D2 =00100200 D3 =00000000 D4 =00000000 D5 =00000000 D6 =00000000 D7 =00000000 A0 =00000000 A1 =00000000 A2 =00000000 A3 =00000000 A4 =00000000 A5 =00000000 A6 =00000000 A7 =00004000 00007002 4282 CLR.L D2 PC =00007004 SR =2704=TR:OFF_S_7_..Z.. VBR =00000000 SFC =0=F0 DFC =0=F0 USP =0000382C SSP* =00004000 D0 =0008F41C D1 =0008F41C D2 =00000000 D3 =00000000 D4 =00000000 D5 =00000000 D6 =00000000 D7 =00000000 A0 =00000000 A1 =00000000 A2 =00000000 A3 =00000000 A4 =00000000 A5 =00000000 A6 =00000000 A7 =00004000 00007004 D401 ADD.B D1,D2 At Breakpoint

PC =00007006 SR =2700=TR:OFF_S_7_..... VBR =00000000

M68CPU32BUG/D REV 1 3-67

Page 98

DEBUG MONITOR COMMANDS

VE Verify S-Records Against Memory VE

3.34 VERIFY S-RECORDS AGAINST MEMORY

VE [<port>][<addr>][;<X/-C>][=<text>]

VE is identical to the LO command with the exception that data is not stored to memory but merely compared to the contents of memory.

The VE command accepts serial data from a host system in the form of a Mot orola S -records fil e and compares it to data already in memory. If the data does not compare, then the user is alerted via information sent to the terminal screen.

The optional port number allows the user to specify which is the download port. If the port number is omitted the default is port 0. The port number must be within the range 0 to $1F.

The optional <addr> field allows the user to enter an offset address which is added to the address contained in the record address field. This causes the records to be compared to memory at different locations than would normally occur. The contents of the automatic offset register are not added to the S-record addresses. If the address is in the range $0 to $1F and the port number is omitted, precede the address with a comma to distinguish it from a port number. Only absolute addresses (i.e., "1000") should be entered, as other addressing modes cause unpredictable results. An address is allowed here rather than an offset (expression) to permit support for function codes (see paragraph 2.5).

The optional text field, entered after the equals sign (=), is sent to the host before CPU32Bug begins to look for S-records at the host port. This allows the user to send a command to the host device to initiate the download. Do not delimited text with quote marks. The text follows the equals sign and terminates with a carriage return. If the host is operating full duplex, the string echoes back to the host port and appears on the user’s terminal screen.

Some host systems echo all received characters so the text string is sent to and received from the host one character at a time. After the entire command is sent to the host, VE looks for an LF character from the host signifying the end of the echoed command. No data records are processed until LF is received. If the host system does not echo characters, VE still looks for an LF character before data records are processed. For this reason it is required in situations where the

M68CPU32BUG/D REV 1 3-68

Page 99

DEBUG MONITOR COMMANDS

VE Verify S-Records Against Memory VE

host system does not echo characters that the first record transferred by the host system be a header record. The header record is not used, but the LF after the header record serves to break VE out of the loop so that data records are processed.

Other VE options are:

-C option Ignore checksum. A checksum for the data contained within an S-Record is calculated as the S-record is read in at the port. Normally, this calculated checksum is compared to the checksum contained within the S-Record and if the compare fails, an error message is sent to the screen. If this option is selected, the comparison is not made.

X option Echo. This option echoes the S-records to the user’s terminal as they are

read in at the host port. Do not use this option when port 0 is specified.

During a verify operation S-record data is compared to memory. Verification begins with the address contained in the S-record address field (plus the offset address). If the verification fails, then the non-comparing record is set aside until the verify is complete and then it is displayed on the screen. If three non-comparing records are encountered in the course of a verify operation, then the command is aborted.

If a non-hex character is encountered within the data field, then the received portion of the record is printed to the screen and CPU32Bug’s error handler points to the faulty character.

An error condition exists if the embedded checksum of a record does not agree with the checksum calculated by CPU32Bug. A message is displayed showing the address of the record (as obtained from the address field of the record), the calculated checksum, and the checksum read with the record. A copy of the record is also output. This is a fatal error and causes the command to abort.

EXAMPLES

This short program was developed on a host system.

1 * Test Program 2* 3 65004000 ORG $65004000 4 5 65004000 7001 MOVEQ.L #1,D0 6 65004002 D088 ADD.L A0,D0 7 65004004 4A00 TST.B D0 8 65004006 4E75 RTS

9 END ****** TOTAL ERRORS 0-****** TOTAL WARNINGS 0--

M68CPU32BUG/D REV 1 3-69

Page 100

DEBUG MONITOR COMMANDS

VE Verify S-Records Against Memory VE

Then converted into an S-Record file named TEST.MX as follows:

S00A0000544553542E4D58E2 S30D650040007001D0884A004E7577 S7056500400055

This file was downloaded into memory using "LO -65000000" at address $4000. The program may be examined in memory using the MD (memory display) command.

CPU32Bug>MD 4000:4;DI<CR> 00004000 7001 MOVEQ.L #$1,D0 00004002 D088 ADD.L A0,D0 00004004 4A00 TST.B D0 00004006 4E75 RTS CPU32Bug>

To ensure the program has not been destroyed in memory, use the VE command to perform a verification.

CPU32Bug>VE -65000000<CR>

Blank line as the BCC waits for an S-record.

After the file has been sent, the user then restarts the terminal emulation program (for MS-DOS based host computers, enter EXIT at the prompt).

Since the port number equals the current terminal, two <CR>’s are required to signal CPU32Bug that verification is complete and the terminal emulation program is ready to receive the status message.

<CR><CR> Signal verfication complete. Verify passes. CPU32Bug>

The verification passes. The program stored in memory was the same as that in the downloaded S-record file.

M68CPU32BUG/D REV 1 3-70