Mitsubishi Electric PSSxxMC1Fx, PSSxxNC1Fx User Manual

<Dual-In-Line Package Intelligent Power Module >
DIPIPM+ Series APPLICATION NOTE
PSSxxMC1Fx, PSSxxNC1Fx
Table of contents
CHAPTER 1 : INTRODUCTI ON ............................................................................................................................... 2
1.1 Feature of DIPIPM+ ..................................................................................................................................................................................... 2
1.2 Functions ..................................................................................................................................................................................................... 3
1.3 Applications ................................................................................................................................................................................................. 3
1.4 Line-up ........................................................................................................................................................................................................ 4
CHAPTER 2 : SPE CI FICATIONS and CHARACTERISTICS ................................................................................. 5
2.1 Specification of DIPIPM+ ............................................................................................................................................................................. 5
2.1.1 Maximum ratings ........................................................................................................................................................................................................................... 5
2.1.2 Thermal Resistance ...................................................................................................................................................................................................................... 8
2.1.3 Electric Characteristics and Recommended Conditions ............................................................................................................................................................... 9
2.1.4 Mechanical characteristics and speci fications ............................................................................................................................................................................13
2.2 Protection functions and operating sequence ............................................................................................................................................ 14
2.2.1 Short circ uit pr otection.................................................................................................................................................................................................................14
2.2.2 Control Supply UV Protection .....................................................................................................................................................................................................16
2.2.3 Temperature output function VOT ................................................................................................................................................................................................19
2.3 Package outline of DIPIPM+ ...................................................................................................................................................................... 21
2.3.1 Package outline ...........................................................................................................................................................................................................................21
2.3.2 Marking ........................................................................................................................................................................................................................................22
2.3.3 Terminal Description ...................................................................................................................................................................................................................23
2.4 Mounting Method ....................................................................................................................................................................................... 26
2.4.1 Electric Spacing of DIPIPM+ .......................................................................................................................................................................................................26
2.4.2 Mounting Method and Precautions .............................................................................................................................................................................................26
2.4.3 Soldering Conditions ...................................................................................................................................................................................................................28
CHAPTER 3 : SYSTEM APPL ICATION G UIDANCE ............................................................................................ 29
3.1 Application guidance ................................................................................................................................................................................. 29
3.1.1 System connection ......................................................................................................................................................................................................................29
3.1.2 Interface Circuit (Direct Coupling Interface example for using one shunt resistor) ....................................................................................................................30
3.1.3 Interface circuit (example of opto-coupler isolated interface) .....................................................................................................................................................32
3.1.4 External SC protection circuit with using three shunt resistors...................................................................................................................................................33
3.1.5 Circuits of Signal Input Terminals and Fo Terminal ....................................................................................................................................................................33
3.1.6 Snubber circuit ............................................................................................................................................................................................................................35
3.1.7 Recommen de d wiri ng me tho d a rou nd s hu nt resistor .................................................................................................................................................................36
3.1.8 SOA of DIPIPM+ at switching state ............................................................................................................................................................................................38
3.1.9 SCSOA ........................................................................................................................................................................................................................................39
3.1.10 Power Life Cycles ......................................................................................................................................................................................................................40
3.2 Power loss and thermal dissipation calculation .......................................................................................................................................... 41
3.2.1 Power loss calculation .................................................................................................................................................................................................................41
3.2.2 DIPIPM+ performance according to carreir frequency ...............................................................................................................................................................43
3.3 Noise and ESD withstand capability........................................................................................................................................................... 45
3.3.1 Evaluation circuit of noise withstand capability ...........................................................................................................................................................................45
3.3.2 Countermeasures and precautions .............................................................................................................................................................................................46
3.3.3 Static electricity withstand capability ...........................................................................................................................................................................................47
CHAPTER 4 : Bootstrap Circuit O peration ......................................................................................................... 48
4.1 Bootstrap Circuit Operation ........................................................................................................................................................................ 48
4.2 Bootstrap supply circuit current at switching state ...................................................................................................................................... 49
4.3 Note for designing the bootstrap circuit ...................................................................................................................................................... 51
4.4 Initi a l charging in bootstrap circuit .............................................................................................................................................................. 52
CHAPTER 5 : PACKAGE HANDLING .................................................................................................................. 53
5.1 Packaging Specification ............................................................................................................................................................................. 53
5.2 Handling Precautions................................................................................................................................................................................. 54
Publication Date: September 2016
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< Dual-In-Line Package Intelligent Power Module >
Fig.1-1. Package photograph
1-2 Cross-sectional structure
Molding resin
Aluminum heatsink
Insulation sheet
IGBT
IC
FWDi
Aluminum wire
Gold wire
Copper frame
BSD
DIPIPM+ Series Application note

CHAPTER 1 : INTRODUCTION

1.1 Feature of DIPIPM+ DIPIPM+ series is our latest transfer molding CIB type IPM(CIB: Converter Inverter Brake, IPM: Intelligent

Power Module). It in tegrates the inverter, c onverter and brake parts to make up a compact inverter systems for commercial and industria l inverter application lik e com m ercial air c ondi tioner, ser vo an d gener al purpose inverter. We also offers DIPIPM+ without brake type.
General DIPIPM integrates a inverter part only, but recent market demand requires highly integrated IPM
products including more functions and peripheral circuits. So we realized this All-in-One DIPIPM, “DIPIPM+”. DIPIPM+ series is well designed transfer molding package from our long term histroy as the pioneer.
DIPIPM+ integrates m ain compornents f or inverter circuit a nd it will contribute to reduce total cos t by smaller
mounting area for inverter circuit, shorter designing time and more reasonable assembly cost. It employs low-voltage (LV) and high voltage (HV) control ICs a nd their correspon ding bootstrap circ uit for IGBT driving and protection, as same as general DIPIPM series. So DIPIPM+ series enable same system design for its inverter part like general DIPIPM series.
By adopting same s tructur e of heat r adiation as Lar ge DIPIPM ser ies which h as h igh th erm al conduc tivit y, it is
possible to design system with high reliability. Main features of this series are described as follows;
Newly optimized CSTBT are integrated for improving performance
1200V series covers from 5A to 35A and 600V has 50A rating product, DIPIPM+ has wide lineup
Easy to design a PCB pattern wiring by smart terminal layout.
Incorporating bootstrap diode(BSD) with current limiting resistor for P-side gate driving supply
Easy to use temperature output function of the sensor integrated on control IC
Fig.1-1 shows package photograph and Fig.1-2 shows the cross-sectional structure.
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Inverter block
Fig. 1-3 Internal circuit block diagram for
DIPIPM+ with Brake circuit
UN
VN
WN
Fo
VN1 V
VFB
VP
V
WFB
WP
UP
VNC
CIN P U
V W NW
VP1
LVIC
V
UFB
NV
NU
VOT
HVIC
P1 R S
T
N1
B
N(B)
AIN
VNC
LVIC
VP1
V
V
VFS
V
WFS
CFo
DIPIPM+ Series Application note

1.2 Functions

Brake block
Common items
For P-side IGBT
- Drive circuit
- High voltage level shift circuit
- Control supply under voltage (UV) lockout circuit (without fault signal output)
- Built-in bootstrap diode (BSD) with current limiting resistor
For N-side IGBTs:
- Drive circuit;
- Short circuit (SC) protection circuit
- Control supply under voltage (UV) lockout circuit (with fault signal output)
- Outputting LVIC temperature by analog signal (No self over temperature protection)
(note) about SC protection By detecting voltage of external shunt resistor, DIPIPM+ works to protect.
●Fault signal output
- Corresponding to N-side IGBT SC protection and N-side UV protection.
●For IGBT
- Drive circuit
- UV protection circuit without fault signal
●IGBT drive supply
- Single DC15V power supply
●Control input supply
- High active logic with 5V
●UL recognized
- UL1557 File E323585
UFS

1.3 Applications

Motor drives for low power industrial equipment and commercial equipment such as air conditioners
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< Dual-In-Line Package Intelligent Power Module >
Type name
Rated current
Rated voltage
Motor ratings
(note1)
Brake
Isolation voltage
PSS05MC1FT
5A
0.75kW/440VAC
PSS10MC1FT
10A
1.5kW/440VAC
PSS15MC1FT
15A
2.2kW/440VAC
PSS25MC1FT
25A
3.7kW/440VAC
PSS35MC1FT
35A
5.5kW/440VAC
PSS50MC1F6
50A
600V
3.7kW/220VAC
Type name
Rated current
Rated voltage
Motor ratings
(note1)
Brake
Isolation voltage
PSS05NC1FT
5A
0.75kW/440VAC
PSS10NC1FT
10A
1.5kW/440VAC
PSS15NC1FT
15A
2.2kW/440VAC
PSS25NC1FT
25A
3.7kW/440VAC
PSS35NC1FT
35A
5.5kW/440VAC
PSS50NC1F6
50A
600V
3.7kW/220VAC
DIPIPM+ Series Application note
1.4 Line-up
Line-ups are described as following table 1-1. and 1-2. Table 1-1. DIPIPM+ with Brake circuit
1200V
Yes 2500Vrms
Table 1-1. DIPIPM+ without Brake circuit
1200V
No 2500Vrms
(note 1)
The motor ratings are described for industrial and general motor capability, and actual ratings are different with application condition.
(note 2)
Isolation voltage is tested under the condition of which all terminals are connected with conductive material and DIPIPM+ is applied 60Hz sinusoidal voltage between the terminals and heatsink for 1minute.
(note2)
(note2)
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INVERTER PART
Symbol Parameter Condition
Ratings
Unit
V
CC
Supply voltage
Applied between P-NU,NV,NW
900
V
V
CC(surge)
Supply voltage (surge)
Applied between P-NU,NV,NW
1000
V
V
CES
Collector-emitter voltage
1200
V
±IC
Each IGBT collector current
TC= 25°C
(Note 1)
25
A
±ICP
Each IGBT collector current (peak)
TC= 25°C, less than 1ms
50
A
Tj
Junction temperature
-30~+150
°C
BRAKE PART
Symbol Parameter Condition
Ratings
Unit
V
Supply voltage
Applied between P-N(B)
900
V
V
CC(surge)
Supply voltage (surge)
Applied between P-N(B)
1000
V
V
CES
Collector-emitter voltage
1200
V
IC
Each IGBT collector current
TC= 25°C
15
A
ICP
Each IGBT collector current (peak)
TC= 25°C, less than 1ms
30
A
V
RRM
Repetitive peak reverse voltage
1200
V
IF
Forward current
TC= 25°C
15
A
CONVERTER PART
Symbol Parameter Condition
Ratings
Unit
Repetitive peak reverse voltage
Io
DC output current
3-phase full wave rectification
25
A
I
FSM
Surge forward current
Peak value of half cycle at 60Hz, Non-repetitive
315
A
I2t
I2t capability
Value for 1 cycle of surge current
416
A2s
Tj
Junction temperature
-30~+150
°C
CONTROL (PROTECTION) PART
Symbol Parameter Condition
Ratings
Unit
VD
Control supply voltage
Applied between
VP1-VNC, VN1-VNC
20
V
VDB
Control supply voltage
Applied between
V
, V
, V
20
V
VIN
Input voltage
Applied between
UP,VP,WP,UN, VN, WN, AIN-VNC
-0.5~VD+0.5
V
F
VSC
Current sensing input voltage
Applied between CIN-VNC
-0.5~VD+0.5
V
(1) (2) (3) (4)
(5)
(5)
(5)
DIPIPM+ Series Application note

CHAPTER 2 : SPECIFICATIONS and CHARACTERISTICS

2.1 Specification of DIPIPM+ It is representatively described as follows with PSS25MC1FT (25A/1200V,CIB type). For the other products, please refer each data sheets in details.

2.1.1 Maximum ratings Maximum ratings are described as following table 2-1-1. (T

Table 2-1-1 Maximum rating of PSS25MC1FT (25A/1200V,CIB type)
MAXIMUM RATINGS (T
= 25°C, unless otherwise noted)
j
= 25°C, unless otherwise noted)
j
CC
IFP Forward current (peak) 30 A Tj Junction temperature -30~+150 °C
V
RRM
1600 V
(Note 1)
VFO Fault output supply voltage Applied between IFO Fault output current Sink current at FO terminal 5 mA
Note1: Pulse width and period are limited due to junction temperature.
Publication Date: September 2016
UFB-VUFS
O-VNC
5
VFB-VVFS
-0.5~VD+0.5 V
WFB-VWFS
< Dual-In-Line Package Intelligent Power Module >
TOTAL SYSTEM
Symbol Parameter Condition
Ratings
Unit
Self protection supply voltage limit (Short circuit protection capability)
VD = 13.5~16.5V, Inverter Part Tj = 125°C, non-repetitive, less than 2μs
TC
Module case operation temperature
-30~+110
°C
T
stg
Storage temperature
-40~+125
°C
60Hz, Sinusoidal, AC 1min, between connected all pins and heat sink plate
No.
Symbol
Description
brake circuit is necessary if P-N voltage exceeds this value.
The maximum P-N surge voltage in switching status. If P-N voltage exceeds this voltage, a snubber circuit is necessary to absorb the surge under this voltage.
(3)
V
CES
The maximum sustained collector-emitter voltage of built-in IGBT and FWDi.
are limited due to junction temperature.
The maximum junction temperature rating is 150°C. But for safe operation, it is recommended
for safety design.
The maximum supply voltage for turning off IGBT s afely in the case of an SC or OC faults. higher than this specif ic atio n.
Isolation voltage is the withstanding voltage between all terminals connected with conductive material and heatsink of heat radiation.
information. Due to the control schemes such different control between P and
is necessary to change the measuring point to that under the highest power chip.
Tc point IGBT chip
Heat radiation
6.4mm
19.6mm
Control terminals
Power terminals
(7)
(6)
DIPIPM+ Series Application note
V
CC(PROT)
V
Isolation voltage
iso
Note2: Measurement point of Tc is described in below figure. (8)
(Note 2)
800 V
2500 V
rms
surface
(1) VCC
(2) V
CC(surge)
(4) +/- IC
(5) Tj
(6) V
CC(PROT)
(7) Viso
(8) Tc position
The maximum voltage can be biased between P-N. A voltage suppressing circuit such as a
The allowable cont inuous current flowing at collect electrode (Tc=25°C) Pulse width and period
to limit the average junction temperature up to 125°C (at Tc is less than 100℃). Repetitive temperature variation ΔTj affects the life time of power cycle, so please refer life time curves
The power chip might not be protected and break down in the case that the supply voltage is
Tc (case temperature) is defined to be the temperature just beneath the specified power chip. Please mount a thermocouple on the heat sink surface at the defined position to get accurate temperature N-side, there is the possibility that highest Tc point is different from above point. In such cases, it
Publication Date: September 2016
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INV-IGBT x 6
INV-Di x 6
Br UP VP WP UN VN WN
Br-Di
CONV-Di x 3
CONV-Di x 3
RP SP TP
RN SN TN
Tc position
Br-IGBT
Reference point of location
DIPIPM+ Series Application note
Power chips layout Fig.2-1-1 indicates the position of the each power chips. (This figure is the view from laser marked side.) In case of PSSxxNC1Fx, Br-IGBT and Br-Di are not built-in.
Fig. 2-1-1 Power chips layout (Unit : mm)
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Limits
Min.
Typ.
Max.
R
Inverter IGBT part (per 1/6 module)
- - 1.15
R
th(j-c)F
Inverter FWD part (per 1/6 module)
- - 1.65
R
th(j-c)Q
Brake IGBT part (per 1module)
- - 1.45
R
Brake Di part (per 1module)
- - 1.65
R
Converter part (per 1/6module)
- - 1.10
0.01
0.10
1.00
0.001 0.01 0.1 1
Normalized transient
thermal impedance Zth(j-c)*
DIPIPM+ Series Application note

2.1.2 Thermal Resistance Table 2-1-2 shows the thermal resistance between its chip junction and case.

Table 2-1-2. Thermal resistance of PSS25MC1FT (25A/1200V, CIB type)
Symbol Parameter Condition
th(j-c)Q
Junction to case thermal
th(j-c)F
resistance
th(j-c)R
(Note 3)
Unit
K/W
Note 3: Grease with good thermal conductivity and long-term endurance should be applied evenly with about +100μm~
+200μm on the contacting surface of DIPIPM and heat sink. The contacting thermal resistance between DIPIPM case and heat sink Rth(c-f) is determined by the thickness and the thermal conductivity of the applied grease. For reference, Rth(c-f) is about 0.25K/ W (per 1chip, grease thickness: 20μm, thermal conductivity: 1.0W/m•K).
The above data shows static state ther m al resis tance. T he ther m al resistanc e goes into sat uratio n in about 10 seconds. The unsaturated thermal resistance is called as transient thermal impedance which is shown in Fig.2-1-2. Zth(j-c)* is the normalized transient thermal impedance and formulation is described as Zth(j-c)*= Zth(j-c) / Rth(j-c)max. For example, the IGBT transient thermal impedance at 0.2s is 1.15×0.7=0.81K/W. The transient thermal im pedance isn’t used for constantly current, but f or short period current as millisecond order. (e.g. motor starting, motor lock・・・e.t.c)
Publication Date: September 2016
Fig. 2-1-2. Normalized transient thermal impedance
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< Dual-In-Line Package Intelligent Power Module >
INVERTER PART
IC= 25A, Tj= 25°C
-
1.50
2.20
IC= 25A, Tj= 125°C
-
1.80
2.45
VEC
FWDi forward voltage
VIN= 0V, -IC= 25A
-
2.40
3.10
V
ton
1.10
1.90
2.60
μs
t
C(on)
- 0.60
0.90
μs
t
off
- 2.80
3.80
μs t
C(off)
- 0.50
0.90
μs
trr - 0.60 - μs
Tj= 25°C
- - 1
Tj= 125°C
- - 10
BRAKE PART
IC= 15A, Tj= 25°C
-
1.50
2.20
IC= 15A, Tj= 125°C
-
1.80
2.45
VF
Di forward voltage
VIN= 0V, IF= 15A
-
2.20
2.80
V
ton
1.10
1.90
2.60
μs t
C(on)
- 0.65
1.00
μs t
off
- 2.60
3.60
μs
t
C(off)
- 0.40
0.95
μs
trr - 0.65 - μs
Tj= 25°C
- - 1
Tj= 125°C
- - 10
CONVERTER PART
Limits
Repetitive reverse current
Forward voltage drop
DIPIPM+ Series Application note

2.1.3 Electric Characteristics and Recommended Conditions Table 2-1-3 shows the typical static characteristics and switching characteristics. (T

Table 2-1-3 Static characteristics and switching characteristics of PSS25MC1FT(25A/1200V, CIB type)
ELECTRICAL CHARACTERISTICS (T
= 25°C, unless otherwise noted)
j
= 25°C, unless otherwise noted)
j
Symbol Parameter Condition
V
CE(sat)
Collector-emitter saturation voltage
Switching times
VD=VDB = 15V, VIN= 5V
V
= 600V, VD= VDB= 15V
CC
= 25A, Tj= 125°C, VIN= 05V
I
C
Inductive Load (upper-lower arm)
I
CES
Collector-emitter cut-off current
VCE=V
CES
Symbol Parameter Condition
V
I
CES
CE(sat)
Collector-emitter saturation voltage
Switching times
Collector-emitter cut-off current
VD=VDB = 15V, VIN= 5V
V
= 600V, VD= VDB= 15V
CC
= 15A, Tj= 125°C, VIN= 05V, Inductive Load
I
C
VCE=V
CES
Limits
Min. Typ. Max.
Limits
Min. Typ. Max.
Unit
V
mA
Unit
V
mA
Symbol Parameter Condition
I
RRM
VF
VR=V IF=25A
, Tj=125°C
RRM
Min. Typ. Max.
1.1 1.4
7.0
Unit
mA
V
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trr
Irr
tc(on)
10%
10%
10%
10%
90%
90%
td(on)
tc(off)
td(off)
tf
tr
( ton=td(on)+tr )
( toff=td(off)+tf )
Ic
VCE
V
CIN
P-side SW Input signal
N-side SW Input signal
VIN(5V0V)
VD
VCC
IN GND CIN
LO
VCC
IN
VB
S
HO
UP,VP,WP
UN,VN,WN
VNC
V
UFB,VVFB,VWFB
VN1
CIN
COM
VP1 P U,V,W
Ic
VCC
N-side
P-side
VDB
NU,NV, NW
V
UFS,VVFS,VWFS
L load
L load
time:500nsec/div.
VCE:200V/div.
Ic:10A/div.
time:500nsec/div.
VCE:200V/div.
Ic:10A/div.
DIPIPM+ Series Application note
Definition of switching time and performance test topology are shown in Fig.2-1-3 and 2-1-4. Switching characteristics are measured b y half bridge c irc uit with ind uct ance loa d.
Fig. 2-1-3 Switching time definition Fig. 2-1-4 Evaluation circuit (inductive load)
V
TURN OFF TURN ON
Fig. 2-1-5 Typical switching waveform for PSS25MC1FT (25A/1200V) inverter part
Condition: V
=600V, VD=VDB=15V, Ic=25A, Tj=125°C, inductive load half bridge circuit
CC
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CONTROL (PROTECTION) PART
Min.
Typ.
Max.
VD=15V, VIN=0V
- - 5.70
VD=15V, VIN=5V
- - 5.70
V
SC(ref)
Short circuit trip level
VD = 15V
0.455
0.480
0.505
V
UV
DBt
Control supply under-voltage inverter part
Trip level
10.0 - 12.0
V
UVDt
Control supply under-voltage inverter part and brake part
Trip level
10.3 - 12.5
V
LVIC Temperature=100°C
tFO
Fault output pulse width
In case of CFo=22nF
1.6
2.4
ms
IIN
Input current
VIN = 5V
0.70
1.00
1.50
mA
V
th(on)
ON threshold voltage
3.5
V
th(off)
OFF threshold voltage
0.8
VF
Bootstrap Di forward voltage
IF=10mA including voltage drop by limiting resistor
0.9
1.3
V R Built-in limiting resistance
Included in bootstrap Di
16
20
24
Ω
DIPIPM+ Series Application note
Table 2-1-4 shows the typical control part characteristics. (T Table 2-1-4. Typical control part characteristics of PSS25MC1FT(25A/1200V, CIB type)
= 25°C, unless otherwise noted)
j
Symbol Parameter Condition
ID
Circuit current
IDB
UV
UVDr Reset level 10.8 - 13.0 V VOT Temperature Output Pull down R=5.1kΩ (Note 5)
V
FOH
V
FOL
protection(UV) for P-side of
Reset level 10.5 - 12.5 V
DBr
protection(UV) for N-side of
Fault output voltage
VSC = 1V, IFO = 1mA - - 0.95 V
Total of VP1-VNC, VN1-VNC
=15V, VIN=0V - - 0.55
V
Each part of V V
VSC = 0V, FO terminal pulled up to 5V by 10kΩ 4.9 - - V
Applied between UP,VP,WP,UN, VN, WN, AIN-VNC
VFB-VVFS
, V
WFB-VWFS
UFB-VUFS
,
D=VDB
VD=VDB=15V, VIN=5V - - 0.55
(Note 4)
2.89 3.02 3.14 V
(Note 6,7)
Limits
Note 4 : SC protection works only for N-side IGBT in inverter part. Please select the external shunt resistance such that
the SC trip-level is less than 1.7 times of the current rating.
5 : DIPIPM don't shutdown IGBTs and output fault signal automatically when temperature rises excessively. When
temperature exceeds the protective level that user defined, controller (MCU) should stop the DIPIPM. Temperature of LVIC vs. VOT output characteristics is described in Section 2.2.3.
6 : Fault signal Fo outputs when SC or UV protection works for N-side IGBT in inverter part. The fault output
pulse-width t
is depended on the capacitance value of CFO (CFO = tFO × 9.1 × 10-6 [F]).
FO
7 : UV protection also works for P-side IGBT in inverter part or brake part without fault signal Fo.
Unit
mA
V
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RECOMMENDED OPERATION CONDITIONS
Limits
Min.
Typ.
Max.
VCC
Supply voltage
Applied between P-NU,NV,NW
0
600
800
V
VD
Control supply voltage
Applied between VP1-VNC,VN1-VNC
13.5
15.0
16.5
V
t
dead
Arm shoot-through blocking time
For each input signal
3.0 - -
μs
f
PWM
PWM input frequency
T
C
100°C, T
j
125°C
- - 20
kHz
PWIN(on)
1.5 - -
Less than rated current
From rated
current
VNC
VNC variation
Between VNC- NU、NV、NW (including surge)
-5.0 - +5.0
V
Tj
Junction temperature
-20 - 125
°C
P Side Control Input
Internal IGBT Gate
Output Current Ic
t1
t2
Real line…off pulse width>PWIN(off); turn on time t1 Broken line
DIPIPM+ Series Application note
Table 2-1-5 shows recommended operation conditions. Please apply and use under the recommended conditions to operate DIPIPM+ series safely. (T
Table 2-1-5. Recommended operation conditions of PSS25MC1FT (25A/1200V, CIB type)
= 25°C, unless otherwise noted)
j
Symbol Parameter Condition
VDB Control supply voltage Applied between V ΔVD, ΔVDB Control supply variation -1 - 1 V/μs
I
1.7 times of rated current (Note 8)
C
800V, 13.5VD≤16.5V,
0V
PWIN(off)
Note 8: DIPIPM might not make response if the input signal pulse width is less than PWIN(on).
Minimum input pulse width
CC
13.0≤V N line wiring inductance less than 10nH
18.5V, -20TC≤100°C,
DB
UFB-VUFS,VVFB-VVFS,VWFB-VWFS
(Note 9)
current to 1.7 times of rated
13.0 15.0 18.5 V
3.0 - -
3.5 - -
9: DIPIPM might make no response or delayed response (P-side IGBT only) for the input signal with off pulse width
less than PWIN(off). Please refer below figure about delayed response.
About Delayed Response Against Shorter Input Off Signal Than PWIN(off) (P side only)
off pulse width<PWIN(off); turn on time t2
[note] About control supply variation
If high frequency noise superimposed to the control supply line, IC malfunction might happen and cause DIPIPM erroneous operation. To avoid such problem, line ripple voltage should meet the following specifications:
dV/dt +/-1V/μs, Vripple2Vp-p
Unit
μs
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< Dual-In-Line Package Intelligent Power Module >
MECHANICAL CHARACTERISTICS AND RATINGS
Limits
Terminal pulling strength
20N load
JEITA-ED-4701
10
s
Terminal bending strength
90deg bending with 10N load
JEITA-ED-4701
2
times
Weight
40
g
Heat radiation part flatness
-50 -
+100
μm
3.5
15.5
11.5
2
2
Aluminum heatsink
Heatsink side
Heatsink side
Measurement position (X)
Measurement position (Y)
+
+
-
DIPIPM+ Series Application note

2.1.4 Mechanical characteristics and specifications Table 2-1-6 shows mechanical characteristics and specifications. Please also refer section 2.4 for mounting instruction of DIPIPM+.

Table 2-1-6. Mechanical characteristics and specifications of PSS25MC1FT (25A/1200V, CIB type)
Parameter Condition
Mounting torque Mounting screw : M4 (Note 10) Recommended 1.18N·m 0.98 1.18 1.47 N·m
(Note 11)
Min. Typ. Max.
- -
Note 10: Plain washers (ISO 7089~7094) are recommended. Note 11: Measurement positions of heat radiati on part flatness are as below.
Unit
Publication Date: September 2016
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< Dual-In-Line Package Intelligent Power Module >
V
N1
N
C
Shunt resistor
P V U W N-side IGBTs
P-side IGBTs
Drive circuit
SC protection circuit
CIN
DIPIPM
R
External parts
Lower-side control input
Protection circuit state
Internal IGBT gate
Output current Ic
Sense voltage of the
Error output Fo
SC trip current level
a2
SET
RESET
SC reference voltage
a1
a3
a6
a7
a4
a8
a5
Delay by RC filtering
SC protection level
Collector current Ic
Input pulse width tw (μs)
2
0
Collector waveform
DIPIPM+ Series Application note

2.2 Protection functions a nd operating sequence DIPIPM+ has two protec t io n f unc tions of s hort c irc uit ( SC ) an d u nder vo lta ge of c ontrol s upp ly (UV). And i t has

also temperature output function of LVIC (VOT). The operating principle and sequence are described as follows.

2.2.1 Short circuit protection (1) Outline

DIPIPM+ uses ex ternal shunt resistor for the current detec tion as shown in F ig.2-2-1. The intern al protection circuit inside the IC ca ptures the excessive large curr ent by comparing the CIN voltage ge nerated at the shunt resistor with the ref erenced SC tr ip voltage , and perf orm protec tion autom aticall y. The thres hold voltage tr ip leve l of the SC protection Vsc(ref) is 0.48V typical.
In case of SC protec tion works, all the gates of N-side thr ee phase IGBTs will be interrupted t ogether with a fault signal output. To prevent DIPIPM+ erroneous protection due to normal switching noise and/or recovery current, it is necessar y to set an RC f ilter (tim e constant: 1.5μ ~ 2μs) to the CIN t erminal input (Fi g.2-2-1, 2-2-2). Also, please make the pattern wiring around the shunt resistor as short as possible.
NC
Fig.2-2-1 SC protection circuit Fig.2-2-2 Filtering time constant setting
Drive circuit
Current
(2) SC protection sequence for only low-side with external shunt resistor and RC filter
a1. Normal operation: IGBT ON and outputs current. a2. Short circuit current detection (SC trigger)
(It is recommended to set RC time constant 1.5~2.0μs so that IGBT shut down within 2.0μs when SC.) a3. All N-side IGBT's gates are hard interrupted. a4. All N-side IGBTs turn OFF. a5. LVIC starts outputting fault signal (fault signal output time is controlled by external capacitor C a6. Input = “L”: IGBT OFF a7. Fo finishes output, but IGBTs don't turn on until inputting next ON signal (LH).
(IGBT of each phase can return to normal state by inputting ON signal to each phase.) a8. Normal operation: IGBT ON and outputs current.
shunt resistor
Fig.2-2-3 SC protection timing chart
FO
)
Publication Date: September 2016
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Symbol
Condition
Min
Typ
Max
Unit
V
SC(ref)
Tj=25°C, VD=15V
0.455
0.480
0.505
V
Condition
min.
typ.
max.
Unit
Tj=25°C, VD=15V
34.7
38.4
42.5
A
)1ln(1
)1(
1
cshunt
SC
t
cshuntSC
IR
V
t
IRV
=
=
τ
ε
τ
Item
Min
typ
max
Unit
IC transfer delay time
-
-
1.0
μs
DIPIPM+ Series Application note
(3) Calculation of shunt resistance
The value of current sensing shunt resistance for current sensing is calculated by the following formulation:
= V
R
Shunt
The maximum SC trip level SC(max) should be set less than the IGBT minimum saturation current which is 1.7 times as large as th e rated current. F or example, t he SC(max) of PSS25MC1FT s hould be set to 25x 1.7=42.5A. The parameters ( V of DIPIPM+ series is +/-0.025V in the specification of V
Table 2-2-1 Specification for V
Therefore, the rang e of SC trip level can be c alculated b y the following d escriptions w ith +/-5% disp ersion of shunt resistor :
R
Shunt(min)=VSC(ref) max
where SC(max) is 1.7 times of rated current, and so 0.95 is due to -5% dispersion of shunt resistor that R
Shunt(typ)
Therefore, SC(typ) = V R
Shunt(max)
Therefore, SC(min)= V In this case, SC trip level is 42.5A,
R
Shunt(min)
When the both of SC tr ip level and s hunt resis tor will be m aximum, t ypical and m inimum, these will be des cribed as follows;
SC(max)= 42.5 A (setting), SC (typ) = 0.480 / 12.5 = 38.4 A, SC(min) = 0.455 / 13.1 = 34.7 A
From the above, the SC trip level range is described as Table 2-2-2. Table 2-2-2 Operative SC Range
/SC where V
SC(ref)
SC(ref)
, R
) dispersion s hould be c onsid ered w hen d esignin g the SC tr ip le vel. The dispersion
Shunt
SC(ref)
SC(ref)
/SC(max)
= R
= R
Shunt(min)
Shunt(typ)
/ 0.95
SC(ref) typ
/ R
Shunt(typ)
x 1.05* *1.05 is due to +5% dispersion of shunt resistor
SC(ref) min
/ R
Shunt(max)
= 0.505V / 42.5A = 11.9 mΩ, R
is the SC trip voltage.
as shown in Table 2-2-1.
SC(ref)
.
= 11.9mΩ / 0.95 = 12.5 mΩ, R
Shunt(typ)
Shunt(max)
= 12.5 x 1.05 = 13.1mΩ
There is the possibility that the actual SC protection level becomes less than the calculated value. This is considered due to the resonant signals caused mainly by parasitic inductance and parasitic capacitance. It is recommended to make a confirmation of the resistance by prototype experiment.
(4) RC filter time constant
It is necessar y to s e t a n R C f ilter i n the S C s e ns ing ci r c uit in or der to prevent m al f unc tion of SC protection due to noise interferenc e. The RC time cons tant is determined dep ending on the appl ying time of noise interf erence and the SCSOA of the DIPIPM.
When the voltage dro p on the external shunt resisto r exceeds the SC trip level, The tim e (t1) that the CIN terminal voltage rises to the referenced SC trip level can be calculated by the following expression:
Where Vsc is the CIN terminal input voltage, Ic is the peak current, τ is the RC time constant.
On the other hand, t he typical t ime dela y t2 (from Vs c voltage reaches Vsc(ref ) to IGBT ga te shutdown) of IC is shown in Table 2-2-3.
Table 2-2-3 Internal time delay of IC
Therefore, the total delay time from an SC level current happened to the IGBT gate shutdown becomes:
Publication Date: September 2016
t
TOTAL
=t1t2
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< Dual-In-Line Package Intelligent Power Module >
Control supply voltage
(VD, VDB)
In this voltage range, built-in control IC may not work properly. Normal
xternal noise may cause DIPIPM
starts-up.
UV function becomes active and output Fo (N-side only). Even if control signals are applied, IGBT does not work.
UVDt (N)-13.5V UV
DBt
(P)-13.0V
IGBT can work. However, conducting loss and switching loss will increase, and result extra temperature rise at this state,.
13.5-16.5V (N)
13.0-18.5V (P)
16.5-20.0V (N)
18.5-20.0V (P)
IGBT works. However, switching speed becomes fast and saturation current becomes large at this state, increasing SC broken risk.
20.0V- (P, N)
The control circuit might be destroyed.
DIPIPM+ Series Application note

2.2.2 Control Supply UV Protect ion The UV prot ection is designed to prevent u nexpected operating behavior as described in Table 2-2-4. Both P-side, N-side of inverter part and Brak e part have UV protecting functi on. However fault s ignal(Fo) output only corresponds to N-side UV protection. Fo output continuously during UV state. In addition, there is a no ise filter (typ. 10μs) integr at ed i n t he UV protection circ uit t o pr e vent insta ntan eous UV erroneous trip. Therefore, the control signals are still transferred in the initial 10μs after UV happened.

Table 2-2-4 DIPIPM operating behavior versus control supply voltage
Operating behavior
operating of each protection function (UV, Fo output etc.) is not also assured.
0-4.0V (P, N)
Normally IGBT does not work. But e malfunction (turns ON) , so DC-link voltage need t o s ta r t up af ter contr ol supply
4.0-UVDt (N), UV
(note) Ripple Voltage Limitation of Control Supply
If high frequency noise superimpos ed to the control supp ly line, IC m alfunction might happ en and cause DIPIPM erroneous operation. To avoid such problem happens, line ripple voltage should meet the following specifications:
dV/dt
(P)
DBt
Recommended conditions.
≤ +/-1V/μs, Vripple ≤ 2Vp-p
Publication Date: September 2016
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UVDr
RESET
SET
RESET
UVDt
a1
a2 a3
a4 a6
a7
a5
Control input
Protection circuit state
Control supply voltage VD
Output current Ic
Error output Fo
Control input
Protection circuit state
Control supply voltage VDB
Output current Ic
Error output Fo
UV
RESET
SET
RESET
UV
Keep High-level (no fault output)
a1
a2 a3
a4
a5
a6
DIPIPM+ Series Application note
(1) N-side UV Protection Sequence
a1. Control supp ly voltage V
ON signal (LH).
(IGBT of each phase can return to normal state by inputting ON signal to each phase.)
a2. Normal operation: IGBT ON and carrying current.
level dips to under v olta ge tr ip le vel . (UVDt).
a3. V
D
a4. All N-side IGBTs turn OFF in spite of contr ol input c ondit io n. a5. Fo outputs for the period set by the capacitance C
level reaches UVDr.
a6. V
D
a7. Normal operation: IGBT ON and outputs current.
Fig.2-2-4 Timing Chart of N-side UV protection
(2) P-side UV Protection Sequence
a1. Control supply voltage V
IGBT turns on by next ON signal (LH). a2. Normal operation: IGBT ON and outputs current. a3. V
level drops to under voltage trip level (UV
DB
a4. IGBT of the corresponding phase only turns OFF in spite of control input signal level,
but there is no F a5. V
level reaches UV
DB
signal output.
O
a6. Normal operation: IGBT ON and outputs current.
Fig.2-2-5 Timing Chart of P-side UV protection
exceeds under voltage reset level (UVDr), but IGBT turns ON by next
D
but output is extended during VD keeps below UVDr.
FO,
rises. After the voltage r eac hes under voltage reset level UV
DB
).
DBt
.
DBr
DBr
DBt
DBr
,
Publication Date: September 2016
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