Mitsubishi M5M29F25611VP Datasheet

CMOS 3.3V-ONLY SERIAL READ FLASH MEMORY

DESCRIPTION

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4839383736353433323130292827262547464544434241

40

The MITSUBISHI M5M29F25611 is a CMOS Flash Memory

with AND type multi-level memory cells.

It has fully automatic programming and erase capabilities

with a single 3.3V power supply.

The functions are controlled by simple external commands.
To fit the I/O card applications, the unit of programming and
erase is as small as (2048+64) bytes.

Available sectors of M5M29F25611 are more than
16,057(98% of all sector address) and less than 16,384
sectors.

FEATURES

On-board single power supply(Vcc) :
Vcc=3.0V to 3.6V
Organization
AND Flash Memory :

(2048+64)bytes x (More than 16,057 sectors)
Data register : (2048+64)bytes
Multi-level memory cell:

2bit / per memory cell.
Automatic programming :
Sector program time : 2.5 ms typ.
System bus free
Address,data latch function
Internal automatic program verify function
Status data polling function
Automatic erase :
Single sector erase time : 1.0 ms typ.
System bus free
Internal automatic erase verify function
Status data polling function
Erase mode :
Single sector erase ((2048+64)byte unit)
Fast access time :
Serial read First access time : 50µs max.

Serial access time : 50ns max.
Low power dissipation :
ICC2 = 30mA typ. / 50mA max. (Read)
ISB2 = 30µA typ. / 50µA max. (Standby)
ICC3 = 20mA typ. / 40mA max. (Program)
ICC4 = 20mA typ. / 40mA max. (Erase)
ISB3 = 1µA typ. / 10µA max. (Deep standby)

Package : 48pin-TSOP(I) (12.0 x 20.0mm2)

MITSUBISHI LSIs

M5M29F25611VP

MORE THAN 16,057 SECTORS (271,299,072 BITS)

PIN CONFIGURATION(TOP VIEW)

GND

Vcc

DQ0
DQ1
DQ2
DQ3

GND

NC
NC
NC
NC
NC
NC
NC
NC

Vcc
DQ4
DQ5
DQ6
DQ7

SC
GND
GND

M5M29F25611VP

Outline 48P3R-B

Pin Description

Pin name
DQ0-7

Vcc note1
GND note1
R/

SC
NC

DU note2

Function
Input / Output
Chip enable
Output enable
Write enable

Command data enable
Power supply
Ground

Ready /
Reset

Serial clock
No connect
Don't Use

Note1:All Vcc and GND pins should be connected to

a common power supply and a ground, respectively.

Note2:Pin should not be connected to anything.

GND
GND

NC
NC

NC
Vcc
NC
NC
NC
NC
NC
NC
NC
NC
GND
R/

DU
NC

Vcc
GND

1

Rev.2.3.1 2001.2.2

CMOS 3.3V-ONLY SERIAL READ FLASH MEMORY

Block Diagram

Sector
Address
Buffer

X-Decoder

MITSUBISHI LSIs

M5M29F25611VP

MORE THAN 16,057 SECTORS (271,299,072 BITS)

2048+64

16384 x (2048+64) x 8
Memory Matrix

DQ0
DQ7

R/

Vcc

GND

Multi­plexer

Data Register(2048+64)

8

~

Data
Input
Buffer

~

Read/Program/
Erase Control

Input
Data
Control

Y-Address
Counter

Y-Gating

Y-Decoder

Data
Output
Buffer

~

SC

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Rev.2.3.1 2001.2.2

CMOS 3.3V-ONLY SERIAL READ FLASH MEMORY

Memory Map & Address

CA9

Sector Address.

MITSUBISHI LSIs

M5M29F25611VP

MORE THAN 16,057 SECTORS (271,299,072 BITS)

3FFFH
3FFEH
3FFDH

0002H
0001H
0000H

000H

2048 Bytes
2048 Bytes
2048 Bytes

2048 Bytes
2048 Bytes
2048 Bytes

800H

64Bytes
64 Bytes
64Bytes

64 Bytes
64 Bytes

64 Bytes

83FH

Column Address

(2048+ 64) Bytes

Control Bytes

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7
SA0

SA1

SA2

SA3

Sector address

Column address

SA(1) : First Cycle
SA(2) : Second Cycle
CA(1) : First Cycle
CA(2) : Second Cycle

SA8
CA0
CA8

SA9
CA1

SA10

CA2

CA10

SA11

CA3

CA11

SA4

SA12

CA4

X

SA5

SA13

CA5

Note 1: Some failed sectors may exist in the device.

The failed sectors can be recognized by reading the sector valid data written in a
part of the column address 820H - 825H. The sector valid data must be read and
kept outside of the sector before the sector erase.

When the sector is programmed, the sector valid data should be written back to
the sector.

2: An X means “Don’t care”. The pin level can be set to either VIL or VIH, as shown

on page 12.

SA6

SA7

X

X

CA6

CA7

X

X

X

(Note2)

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Rev.2.3.1 2001.2.2

CMOS 3.3V-ONLY SERIAL READ FLASH MEMORY

MITSUBISHI LSIs

M5M29F25611VP

MORE THAN 16,057 SECTORS (271,299,072 BITS)

Mode Selection

Mode
Deep Standby (note4)
Standby

Output disable
Status register read (note1)

Command Write (note2) Din

Pin

X
VIH
VIL
VIL

X

X
VIH
VIL

X

X
VIH
VIH

SC

X
X
X

VILRX
VIHR
VIHR

Notes: 1. Default mode after the power on is the status register read mode(refer to status transition P.11).

From DQ0 to DQ7 pins output the status when =VIL and =VIL.

2. Refer to the command definition(P.5). Data can be read, programmed and erased after commands
are written in this mode.

3. The R/ bus should be pulled up to Vcc to maintain the VOH level while the R/ pin outputs
a high impedance.

4. An X means “Don’t care”. The pin level can be set to either VIL or VIH as shown on page 12.

Pin Description

(note3)

R/

X
X
X
XVIHR

VOH
VOH
VOH
VOH

VOHVILVIHRVILVILVIHVIL

DQ0 - DQ7

Hi - Z
Hi - Z
Hi - Z

Status register

outputs

is used to select the device. The status returns to the Standby at the rising edge of in the
reading operation. However, the status does not return to the Standby at the rising edge of in
the busy state in programming and erase operation.

Memory data, status register data and identifier code (ID code) can be read, when is VIL.

Commands and address are latched at the rising edge of .

SC

Programming and reading data is latched at the rising edge of SC.

pin must be kept at the VILR (GND±0.2V) level when Vcc is turned on and off. In this way,
data in the memory is protected against unintentional erase and programming. must be kept
at the VIHR (Vcc±0.2V) level during any operations such as programming, erase and read

Commands and data are latched when is VIL and Address is latched when is VIH.

R/

The R/ indicates the program/erase status of the flash memory. The R/ signal is initially at a
high impedance state. It turns to a VOL level after the (40H) command in programming operation or
the(B0H) command in erase operation. No commands can be written during the R/ pin outputs a VOL.
After the erase or programming operation finishes, the R/ signal turns back to the high impedance state.

The R/ indicates the first access status of the flash memory in serial read (1) and (2). It turns to
a VOL level after the sector address (SA(2)) in serial read (1) and serial read (2) operation.
No commands can be written during the R/ pin outputs a VOL. Also, no serial clock can be input during
the R/ pin outputs a VOL. After the first access operation finishes, the R/ signal turns back to the high
impedance state.

DQ0-DQ7

The DQ pins are used to input data, address and command, and are used to output memory data,
status register data and identifier code (ID code).

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Rev.2.3.1 2001.2.2

CMOS 3.3V-ONLY SERIAL READ FLASH MEMORY

MITSUBISHI LSIs

mode

mode

M5M29F25611VP

MORE THAN 16,057 SECTORS (271,299,072 BITS)

Command Definition

Serial read(1)
Serial read(2)

Read identifier codes
Data Recovery Read
Auto Erase

Auto Program

Reset
Clear status register

Data Recovery Write

Serial read(1)

Serial read(2)
Auto Erase

Auto Program

Data Recovery Write

Without CA
With CA

Single sector

Program (1) Without CA (note 7)

Program (2) (note 10)
Program (3) (control bytes) (note 7)

Program (4) Without CA (note 7)

Without CA
With CA

Single sector
Program (1) Without CA (note 7)

Program (2) (note 10)
Program (3) (control bytes) (note 7)

Program (4) Without CA (note 7)

(note 1,2)

Command

Command

With CA (note 7)

With CA (note 7)

With CA (note 7)

With CA (note 7)

Bus

cycles

3

3+2h(note6)

3
1

1
4
4

4+2h(note6)

4
4

4

4+2h(note6)

1
1
4

Bus

cycles

3

3+2h(note6)

3
4

4

4+2h(note6)

4
4
4

4+2h(note6)

4

First

Operation
mode (note 3)

Write
Write
Write

Write
Write

Write
Write
Write
Write

Write
Write
Write

Write
Write

Write

Third cycle

Operation

Write
Write

Write
Write
Write

Write
Write

Write
Write
Write

Write

Data

Operation

in

00H
00H
F0H
90H
01H
20H
10H
10H
1FH

0FH
11H

11H
FFH

50H
12H

Data

in

SA(2) (note4)
SA(2) (note4)
SA(2) (note4)

SA(2) (note4)

SA(2) (note4)
SA(2) (note4)
SA(2) (note4)

SA(2) (note4)

SA(2) (note4)

SA(2) (note4)

SA(2) (note4)

mode

Write
Write

Write
Read

Read
Write

Write
Write
Write

Write
Write
Write

-

-

Write

Second cycle

in out

SA(1) (note 4)

SA(1) (note 4)

SA(1) (note 4)

-

-

SA(1) (note 4)

SA(1) (note 4)

SA(1) (note 4)
SA(1) (note 4)
SA(1) (note 4)
SA(1) (note 4)

SA(1) (note 4)

-

-

SA(1) (note 4)

Fourth cycle

Operation

mode

-

Write

-

Write
Write

Write
Write
Write
Write
Write

Write

Data

-

-

-

ID (note8,9)

Recovery Data

-

-

-

-

-

-

-

-

-

-

Data

in

-

CA(1) (note5)

-

B0H (note11)

40H (note11,12)

CA(1) (note5)

40H (note11,12)
40H (note11,12)

CA(1) (note5)

40H (note11,12)

40H (note11,12)

Fifth cycle

Operation

Write
Write

Write

Data

in

CA(2) (note5)
CA(2) (note5)
CA(2) (note5)

Serial read(1)
Auto Program

Command

With CA
Program (1) With CA (note 7)
Program (4) With CA (note 7)

Bus

cycles

3+2h(note6)
4+2h(note6)

4+2h(note6)

Notes : 1. Commands, sector address and column address are latched at rising edge of pulses.

Program data is latched at rising edge of SC pulses.

2. The chip is in the read status register mode when is set to VIHR first time after the power up.

3. Refer to the command read and write mode in mode selection table (P.4).

4. SA(1)=Sector address (SA0 - SA7), SA(2)=Sector address (SA8 - SA13).

5. CA(1)=Column address (CA0 - CA7), CA(2)=Column address (CA8 - CA11).(0≤CA11 - CA0≤83FH)

6. The variable h is the input number of times of set of CA(1) and CA(2).(1≤h≤2048+64)
Set of CA(1) and CA(2) can be input not only one time but free times.

7. By using program(1) and (3), data can additionally be programmed for each sector before erase.

8. ID=Identifier code; Manufacturer code (1CH), Device code (6CH).

9. The manufacturer identifier code is output when is low and the device identifier code is output when
is high.

10. Before program (2) operations, data in the programmed sector must be erased.

11. No commands can be written during auto program and erase (when the R/ pin outputs a VOL).

12. The fourth cycle or sixth cycle of the auto program comes after the program data input is complete.

5

Sixth cycle

Operation

mode

-

Write

Write

Data

in

-

40H (note11,12)
40H (note11,12)

Rev.2.3.1 2001.2.2

CMOS 3.3V-ONLY SERIAL READ FLASH MEMORY

MITSUBISHI LSIs

counted

whenever program(4) execute.

M5M29F25611VP

MORE THAN 16,057 SECTORS (271,299,072 BITS)

Mode Description

Read

Serial read(1)

Memory data D0-D2111 in the sector of address SA is sequentially read. Output data is not valid after the number of the
serial clock SC pulse exceeds 2112. When the column address CA is input after SA, memory data D(m) -D(m+j) in the sector
of address SA is sequentially read. Then output data is not valid after the number of the SC pulse exceeds (2112-m).

The mode turns back to the Standby mode at any time when is VIH.

Serial read(2)

Memory data D2048-D2111 in the sector of address SA is sequentially read. Output data is not valid after the number of the
SC pulse exceeds 64.The mode turns back to the Standby mode at any time when is VIH.

Automatic Erase

Single sector Erase

Memory data D0-D2111 in the sector of address SA is erased automatically by internal control circuits. After the sector
erase starts, the erasure completion can be checked through the R/ signal and status data polling. All the bits in the sector
are “1” after the erase. The sector valid data stored in a part of memory data D2048-D2111 must be read and kept outside of
the sector before the sector erase.

Automatic program

Program(1)

Program data PD0-PD2111 is programmed into the sector of address SA automatically by internal control circuits. When
CA is input after SA, program data PD(m) -PD(m+j) is programmed form CA into the sector of address SA automatically by
internal control circuits. By using program(1), data can additionally be programmed for each sector before the following erase.
When the column is programmed, the data of the column must be [FF].

After the programming starts, the program completion can be checked through the R/ signal and status data polling.
Programmed bits in the sector turn from “1” to “0” when they are programmed. The sector valid data should be included in the
program data PD2048-PD2111. In this mode, E/W number of times must be counted whenever program(1) execute.

Program(2)

Program data PD0-PD2111 is programmed into the sector of address SA automatically by internal control circuits. After the
programming starts, the program completion can be checked through the R/ signal and status data polling. Programmed bits
in the sector turn from “1” to “0” when they are programmed. The sector must be erased before programming. The sector valid
data should be included in the program data PD2048-PD2111. In this mode, Write number of times must be counted whenever
program(2) execute.

Program(3)

Program data PD2048-PD2111 is programmed into the sector of address SA automatically by internal control circuits. By
using program(3), data can additionally be programmed for each sector before the following erase. When the column is
programmed, the data of the column must be [FF].

After the programming starts, the program completion can be checked through the R/ signal and status data polling.
Programmed bits in the sector turn from “1” to “0” when they programmed. In this mode, E/W number of times must be counted
whenever program(3) execute.

Program(4)

Program data PD0-PD2111 is programmed into the sector of address SA automatically by internal control circuits. When CA
is input after SA, program data PD(m) -PD(m+j) is programmed from CA into the sector of address SA automatically by internal
control circuits. By using program(4), data can be rewritten for each sector before the following erase. So the column data
before programming operation are either “1” to “0”.

After the programming starts,the program completion can be checked through the R/ single and status data polling. The
sector valid data should be included in the program data PD2048-PD2111. In this mode, E/W number of times must be

6

Rev.2.3.1 2001.2.2

CMOS 3.3V-ONLY SERIAL READ FLASH MEMORY

MITSUBISHI LSIs

M5M29F25611VP

MORE THAN 16,057 SECTORS (271,299,072 BITS)

16383

Sector

Address

0

Memory Array

Serial read(1), (Without CA)
Program(1), (Without CA)
Program(2)
Program(4), (Without CA)

16383

Sector

Address

0

21110 Register

Memory Array

Column

0

address

Serial read(1), (With CA)
Program(1), (With CA)
Program(4), (With CA)

Register

2111

16383

Sector

Address

0

Memory Array

2048

Serial read(2)

Program(3)

Register

2111

0

Status Register Read

The status returns to the register read mode from Standby mode ,when and is VIL. In the status register read

mode, DQ pins output the same operation status as in the status data polling defined in the function description, table 1

(page 34).

Identifier Read

The manufacturer and device identifier code can be read in the identifier read mode. The manufacturer and device

identifier code is selected with VIL and VIH, respectively.

Data Recovery Read

When programming was error, the program data can be read. When additional programming (Program(1),(3),(4))was error,

the data compounded of the program data and the original data in the sector of address SA can be read. Output data is not
valid after the number of SA pulse exceeds 2112. The mode turns back to the Standby mode at any time when is VIH.
(See timing waveform in page 31)

Data Recovery Write

When programming into a sector of address SA was an error,the program data can be re-written automatically by selecting

the other sector SA'.In this Case,top address [SA13] of sector of address SA' must be the same as SA.Since the data
recovery write mode utilizes program(4),rewritten sector of address SA' needs no sector erase before rewritten.After the data
recovery write mode starts,the program completion can be checked through R/ signal and the status data polling.

7

Rev.2.3.1 2001.2.2

CMOS 3.3V-ONLY SERIAL READ FLASH MEMORY

Command / Address / Data Input Sequence

MITSUBISHI LSIs

M5M29F25611VP

MORE THAN 16,057 SECTORS (271,299,072 BITS)

8

Rev.2.3.1 2001.2.2

CMOS 3.3V-ONLY SERIAL READ FLASH MEMORY

Command / Address / Data Input Sequence

MITSUBISHI LSIs

M5M29F25611VP

MORE THAN 16,057 SECTORS (271,299,072 BITS)

9

Rev.2.3.1 2001.2.2

CMOS 3.3V-ONLY SERIAL READ FLASH MEMORY

Command / Address / Data Input Sequence

MITSUBISHI LSIs

M5M29F25611VP

MORE THAN 16,057 SECTORS (271,299,072 BITS)

10

Rev.2.3.1 2001.2.2

CMOS 3.3V-ONLY SERIAL READ FLASH MEMORY

Status Transition

MITSUBISHI LSIs

M5M29F25611VP

MORE THAN 16,057 SECTORS (271,299,072 BITS)

Deep

Standby

Standby

Vcc

Output
disable

Power off

00H / F0H

FFH

90H

FFH

20H

FFH

10H/

11H

FFH

Read (1), (2)

setup

ID Read set up

Sector Erase

set up

Program (1),(4)

set up

Column address

input

CA(1)
CA(2)

SA(1), SA(2)

CA(1)
CA(2)

SA(1)
SA(2) Program

Sector address

,

SA(1), SA(2)

Erase finish

input

Program finish

Sector address

input

ID Read

Sector address

Column address

input

CA(1)',CA(2)'

PD0 ~ PD2111

SC,

CA(1)',CA(2)'

, SC

input

Program data

input

SC,

PD(m)~

PD(m+j)

Read(1), (2)

B0H

40H

SC

Erase start

start

BUSY

Status

register

read

Status

register

read

11

(note4)

1FH/

0FH

Program (2),(3)

set up

FFH

Status register clear 50H

(note2)

FFH

(note2)

SA(1)
SA(2)

Sector address

input

Program finish

PD0 ~ PD2111

SC,

Program data

input

40H

Program

start

Status

register

read

Program or
Erase Error

ERROR

Status

register

read

Error
Standby
(note3)

(note1)

01H

Error
Output
disable

(note1)

12H

FFH

Data

Recovery Read

set up

Status register read

Data

Recovery Write

set up

,SC Data

SA(1)
SA(2)

Sector address

Recovery Read

input

Note 1: (01H)/(12H) Data Recovery Read/Write can be used only for Program(1),(2),(3),(4) Errors.

2: When Reset is done by CE or FFH, Error Status Flag is cleared.
3: When Error Standby, Icc3 level is current.
4: When Program(3) mode, input data is PD2048 ~ PD2111.

Rev.2.3.1 2001.2.2

40H