Mitsubishi M32171F4VFP, M32171F3VFP, M32171F2VFP Datasheet
2001-5-14 Rev.1.0
Mitsubishi Microcomputers
32171 Group
SINGLE-CHIP 32-BIT CMOS MICROCOMPUTER
Description
32171 Group is a 32-bit, single-chip RISC microcomputer
with built-in flash memory, which was developed for use in
general industrial and household equipment.
To make full use of microcomputer built-in mass volume
flash memory, this microcomputer contains a variety of peripheral functions ranging from two independent blocks of
16-channel A-D converters to 37-channel multifunction timers, 10-channel DMAs, 3-channel serial I/Os, and 1-channel
real time debugger. Also included 1-channel Full-CAN modules and JTAG (boundary scan facility).
With lower power consumption and low noise characteristics
also considered, these microcomputers are ideal for embedded equipment applications.
Features
M32R RISC CPU core
• Uses the M32R family RISC CPU core (Instruction set
common to all microcomputers in the M32R family)
• Five-stage pipelined processing
• Sixteen 32-bit general-purpose registers
• 16-bit/32-bit instructions implemented
• DSP function instructions (sum-of-products calculation
using 56-bit accumulator)
• Built-in flash memory
• Built-in flash programming boot program
• Built-in RAM
• PLL clock generating circuit .............. Built-in × 4 PLL circuit
• Maximum operating frequency of the CPU clock
40MHz(when operating at -40 to +85
32MHz(when operating at -40 to +125oC)
o
C)
Real-time Debugger
• Includes dedicated clock-synchronized serial I/O that can
read and write the contents of the internalRAM independently of the CPU.
• Can look up and update the data table in real time while the
program is running.
• Can generate a dedicated interrupt based on RTD communication.
Abundant internal peripheral functions
In addition to the timers and real-time debugger, the
microcomputer contains the following peripheral functions.
• DMAC ............................................................ 10 channels
• A-D converter.................... 10-bit converter × 16 channels
• Serial I/O...........................................................3 channels
• Interrupt controller......... 22 interrupt sources, 8 priority levels
• Wait controller
• Full CAN ............................................................ 1 channel
• JTAG (Boundary scan function, Mitsubishi original)
Designed to operate at high temperatures
To meet the need for use at high temperatures, the microcomputer is designed to be able to operate in the temperature
range of -40 to +125oC when CPU clock operating
frequency = 32 MHz. When CPU clock operating frequency =
40 MHz, the microcomputer can be used in the temperature
o
range of -40 to +85
Note: This does not guarantee continuous operation at
o
125
puter at 125
C. If you are considering use of the microcom
C.
o
C, please consult Mitsubishi.
Table 1 Type Name List (32171 Group)
Type Name RAM Size ROM Size
M32171F4VFP 16K bytes 512K bytes
M32171F3VFP 16K bytes 384K bytes
M32171F2VFP 16K bytes 256K bytes
37-channel multijunction timers (MJT)
Multifunction timers are incorporated that support various
purposes of use.
16-bit output related timers ....................................... 35ch
16-bit input/output related timers .............................. 10ch
16-bit input related timers ........................................... 8ch
32-bit input related timers ........................................... 8ch
• Flexible configuration is possible through interconnection
of timers.
•
The internal DMAC and A-D converter can be started by a timer .
Applications
Automobile equipment control (e.g., Engine, ABS, AT), industrial equipment system control, and high-function OA equipment (e.g., PPC)
2001-5-14 Rev.1.0
Pin Assignment(top view)
MS
JT
JTCK
JTRST
JTDO
JTDI
P103/TO11
P104/TO12
P105/TO
P106/TO14
P107/TO15
P124/TCLK
P125/TCLK1
P126/TCLK
P127/TCLK3
VCCI
P130/TIN16
P131/TIN1
P132/TIN1
P133/TIN19
P134/TIN2
P135/TIN2
P136/TIN2
P137/TIN23
VCCE
P150/TIN0
P153/TIN3
P41/ BLW / BLE
P42/ BHW / BHE
VCCI
VSS
P43/ RD
P44/ CS0
P45/ CS1
P46/A13
P47/A14
P220/CT
13
0
2
7
8
0
1
2
X
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
Mitsubishi Microcomputers
32171 Group
SINGLE-CHIP 32-BIT CMOS MICROCOMPUTER
R
DTXD
4/RT
P7
82
W
/
Q
IT
K
L
C
WA
B
HACK
HRE
/
/
3
7
P71/
P70
P
P72/
0
8
81
8
79
7
4/ SBI
P6
77
CC
3
2
6
V
P
P6
P61
F
6
4
7
75
7
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
VSS
P87/SCLKI1/SCLKO1
D1
P86/RX
P85/TXD1
P84/SCLKI0/SCLKO0
P83/RXD0
P82/TXD0
VC
CE
P175/RXD2
P174/TXD2
VSS
VCCI
AVSS0
AD0IN15
AD0IN14
AD0IN13
AD0IN12
AD0IN11
AD0IN10
AD0IN9
AD0IN8
AD0IN7
AD0IN6
AD0IN5
AD0IN4
AD0IN3
AD0IN2
AD0IN1
AD0IN0
AVCC0
VREF0
P17/DB15
P16/DB14
P15/DB13
P14/DB12
P13/DB11
D
4/TO17
5/TO18
P9
P9
7
88
8
CK
A
6
1
D
DRX
O
T
/
3
6/RT
7
P9
P77/RTDCLK
P
P75/RT
83
86
85
84
1
102/TO10
P
107
P101/TO9
P100/TO8
05
106
1
116/TO6
P117/TO7
P
04
03
1
1
P115/TO5
02
1
DD
V
108
111/TO
114/TO4
112/TO2
P
P113/TO3
P
01
00
99
98
1
1
P
VSS
P
P110/TO0
VCCE
F
4
97
96
95
9
1
MOD
3
9
MOD0
2
1
9
9
19
TO20
RESET
P97/
P96/TO
9
90
8
M32171F4VFP
M32171F3VFP
M32171F2VFP
1
2
3
S
221/CRX
P225/A12
OSC-VS
P
8
5
XOUT
6
7
CNT
V
SC-VCC
O
9
P30/A15
P31/A16
4
IN
X
Figure 1 Pin Layout Diagram of the M32171
2
0
2
1
11
1
13
7
19
P32/A1
P33/A18
P34/A
P35/A20
8
9
17
14
15
16
1
1
20
21
22
7
6
CE
S
A2
/
3
VC
20/A23
P36/A21
P37/A22
P
VS
21/A24
22/A25
2
P
P24/A2
P
P
Package 144P6Q-A
6
24
6/A29
P2
8
25
2
27
2
29
30
0
3
A
DB3
DB0
/
7
1/DB1
2
P
4/DB4
P0
P02/DB2
P03/
P0
P00/
23
8
A2
/
5
2
P
31
5/DB5
P0
5
32
33
34
3
36
0
1
DB8
DB9
DB7
DB
/
6/DB6
2
0
1
P10/
P11/
P
P07/
P
2001-5-14 Rev.1.0
M32R CPU core
(max 40MHz)
Multiplieraccumulator
(32 × 16 + 56)
Mitsubishi Microcomputers
32171 Group
SINGLE-CHIP 32-BIT CMOS MICROCOMPUTER
32171
Internal bus
interface
DMAC
(10 channels)
Multijunction timer
(MJT : 37 channels)
Internal flash memory
(M32171F4VFP : 512KB)
(M32171F3VFP : 384KB)
(M32171F2VFP : 256KB)
Internal RAM
(16KB )
Real-time debugger
(RTD)
PLL clock generation
circuit
Internal 32-bit bus
Internal 16-bit bus
External bus
Data
A-D converter
(10-bit, 16 channels)
Serial I/O
(3 channels)
Interrupt controller
(22 sources, 8 levels)
Wait controller
Full CAN
(1 channel)
interface
Address
Figure 2 Block diagram
Input/output port(JTAG) 97 lines
3
2001-5-14 Rev.1.0
SINGLE-CHIP 32-BIT CMOS MICROCOMPUTER
Table 2 Outline Performance (1/2)
Functional Block Features
M32R CPU core M32R family CPU core, internally configured in 32 bits
Built-in multiplier-accumulator (32 × 16 + 56)
Basic bus cycle : 25 ns (CPU clock frequency at 40 MHz, Internal peripheral clock frequency at 20 MHz)
Logical address space : 4G bytes, linear
General-purpose register : 32-bit register × 16, Control register: 32-bit register × 5
accumulator : 56 bits
External data bus 16 bits data bus
Instruction set 16-bit/32-bit instruction formats
83 instructions/ 9 addressing modes
Internal flash memory M32171F4VFP : 512K bytes
M32171F3VFP : 384K bytes
M32171F2VFP : 256K bytes
Rewrite durability : 100 times
Mitsubishi Microcomputers
32171 Group
Internal RAM 16K bytes
DMAC 10 channels (DMA transfers between internal peripheral I/Os, between internal
peripheral I/O and internal RAM, and between internal RAMs)
Channels can be cascaded and can operate in combination with internal peripheral I/O
Multijunction timer 37 channels of multijunction timers
• 16-bit output-related timers × 11 channels (single-shot, delayed single-shot)
• 16-bit input/output-related timers × 10 channels (event count mode, single-shot, PWM, measurement)
• 16-bit input-related timers × 8 channels (measurement, event count mode)
• 32-bit input-related timers × 8 channels (measurement)
Flexible timer configuration is possible through interconnection of channels using the event bus.
A-D converter 10-bit multifunction A-D converters
• Input 16 channels
• Scan-based conversion can be switched with 4, 8, and 16
• Capable of interrupt conversion during scan
• 8-bit/10-bit readout function available
Serial I/O 3 channels (The serial I/Os can be set for synchronous serial I/O or UART.
SIO2 is UART mode only)
Real-time debugger (RTD) 1-channels dedicated clock-synchronized serial
• The entire internal RAM can be read or rewritten from the outside without CPU intervention
Interrupt controller Controls interrupts from internal peripheral I/Os
(Priority can be set to one of 8 levels including interrupt disabled)
Wait controller Controls wait when accessing external extended area
(1 to 4 wait cycles inserted + prolonged by external WAIT signal input)
CAN 16-channels message slots
JTAG Boundary-Scan function
4
2001-5-14 Rev.1.0
Mitsubishi Microcomputers
32171 Group
SINGLE-CHIP 32-BIT CMOS MICROCOMPUTER
Table 1 Outline Performance (2/2)
Function Block Features
Clock Maximum internal CPU memory clock : 40MHz (access to CPU, internal ROM, andinternal RAM)
Maximum internal peripheral clock : 20MHz (access to internal peripheral module)
Maximum external input clock : 10.0MHz, Built-in multiply-by-4 PLL circuit
Power Supply Voltage External I/O : 5V (±0.5V) or 3.3V (±0.3V)
Internal logic : 3.3V (±0.3V)
Operating temperature rang -40 to +125°C (CPU memory clock 32MHz , internal peripheral clock 16MHz)
-40 to +85°C (CPU memory clock 40MHz , internal peripheral clock 20MHz)
Package 0.5mm pitches / 144-pin plastic LQFP
5
2001-5-14 Rev.1.0
Mitsubishi Microcomputers
32171 Group
SINGLE-CHIP 32-BIT CMOS MICROCOMPUTER
Outline of the CPU core
The M32171 Group uses the M32R RISC CPU core, and has
an instruction set which is common to all microcomputers in
the M32R family.
Instructions are processed in five pipelined stages consisting
of instruction fetch, decode, execution, memory access, and
write back. Thanks to its “out-of-order-completion” mechanism,
the M32R CPU allows for clock cycle efficient, instruction execution control.
The M32R CPU internally has sixteen 32-bit general-purpose
registers. The instruction set consists of 83 discrete instructions, which come in either a 16-bit instruction or a 32-bit instruction format. Use of the 16-bit instruction format helps to
reduce the code size of a program. Also, the availability of 32bit instructions facilitates programming and increases the performance at the same clock speed, as compared to
architectures with segmented address spaces.
Sum-of-products instructions comparable to DSP
The M32R CPU contains a multiplier/accumulator that can
execute 32 bits × 16 bits in one cycle. Therefore, it executes a
32 bit × 32 bit integer multiplication instruction in three cycles.
Also, the M32R CPU supports the following four sum-of-products instructions (or multiplication instructions) for DSP function use.
(1) 16 high-order register bits × 16 high-order register bits
(2) 16 low-order register bits × 16 low-order register bits
(3) All 32 register bits × 16 high-order register bits
(4) All 32 register bits × 16 low-order register bits
Furthermore, the M32R CPU has instructions for rounding the
value stored in the accumulator to 16 or 32 bits, and instructions for shifting the accumulator value to adjust digits before
storing in a register. Because these instructions also can be
executed in one cycle, DSP comparable data processing capability can be obtained by using them in combination with
high-speed data transfer instructions such as Load & Address
Update or Store & Address Update.
Address space
The M32171 Group’s logical addresses are always handled in
32 bits, providing 4 Gbytes of linear address space. The
M32171 Group’s address space consists of the following.
User space
A 2-Gbyte area from H’0000 0000 to H’7FFF FFFF is the user
space. Located in this space are the user ROM area, external
extended area, internal RAM area, and SFR (Special Function Register) area (internal peripheral I/O registers). Of
these, the user ROM area and external extended area are located differently depending on mode settings.
Boot program space
A 1-Gbyte area from H’8000 0000 to H’BFFF FFFF is the boot
program area. This space contains the on-board programming program (boot program) used in blank state by the internal flash memory.
System space
A 1-Gbyte area from H’C000 0000 to H’FFFF FFFF is the
system area. This space is reserved for use by development
tools such as an in-circuit emulator and debug monitor, and
cannot be used by the user.
Three operation modes
The M32170 and M32174 Group has three operation modes:
single-chip mode, external extended mode, and processor
mode. These operation modes are changed from one to another by setting the MOD0 and MOD1 pins.
6
2001-5-14 Rev.1.0
Mitsubishi Microcomputers
32171 Group
SINGLE-CHIP 32-BIT CMOS MICROCOMPUTER
Port 7
Port 22
Port 15
Port 13
Port 12
Port 11
Port 10
Port 9
Multijunction
converter
Clock
Reset
Mode
CAN
timer
A-D
XIN
XOUT
VC
NT
C
OSC-VC
S
OSC-VS
P70 / BCLK / W
RESET
D0
MO
D1
MO
FP
P220 / C
P221 / C
P150,P153 / TIN0,TIN3
P130-P137 / TIN16-TIN23
P124-P127 / TCLK0-TCLK3
P93-P97 / TO16-TO720
P100-P107 / TO8-TO15
P110-P117 / TO0-TO7
AD0IN0A-D0IN15
AVCC
AVSS
VREF
R
TX
RX
0
0
0
10
4
21
16
3.3V (Note)
2VFP
5V
M32171F4VFP, M32171F3VFP, M32171F
P45 / C
P44 / C
P43 / R
P42 / BHW / B
P41 / BLW / B
P71 / WAI
P72 / HREQ
P73 / HACK
19
P20-P27 / A23-A30
P30-P37 / A15-A22
P46, P47 / A13, A14
P225 / A12
16
P00-P07 / DB0-DB7
P10-P17 / DB8-DB15
P82 / TXD
P83 / RXD
5V
P84 / SCLKI 0 / SCLKO
P85 / TXD1
P86 / RXD
P87 / SCLKI 1 / SCLKO
P174 / TXD
P175 / RXD2
P74 / RTDTXD
P75 / RTDRXD
P76 / RTDACK
P77 / RTDCL
S1
S0
D
HE
LE
T
0
0
1
2
K
Bus
control
Address
bus
Data
bus
0
Serial
I/O
1
Real-time
debugger
Port 4
Port 7
Port 2
Port 3
Port 4
Port 22
Port 0
Port 1
Port 8
Port 17
Port 7
Port 6
Port 6
Interrupt
controller
Note:
P61-P63
P64 / S
VCCE
VCCI
3.3V
5V
BI
: Operates with a 3.3V power supply.
Operates with a 5V or 3.3V power supply.
:
Figure 3 Pin Function Diagram of 240QFP
JTMS
JTCK
JTRST
DO
JT
DI
3V
3.
JT
VDD
FVCC
4
3
3.3V
5
S
VS
JT
AG
7
2001-5-14 Rev.1.0
Mitsubishi Microcomputers
32171 Group
SINGLE-CHIP 32-BIT CMOS MICROCOMPUTER
Table 4 Description of Pin Function (1/4 )
Type Pin Name Description Input/Output Function
Power VCCE Power supply — Supplies power (5 V or 3.3V) to external I/O ports.
supply VCCI Power supply — Supplies power (3.3 V) to the internal logic.
VDD RAM power supply — nternal RAM backup power supply (3.3 V).
FVCC Flash power supply — Internal flash memory backup power supply (3.3 V).
VSS Ground — Connect all VSS pins to ground (GND).
Clock XIN, Clock Input Clock input/output pins. These pins contain a PLL-based
XOUT Output frequency multiply-by-4, so input the clock whose frequency is quarter
the operating frequency. (XIN input = 10 MHz when CPU clock operates
at 40 MHz)
BCLK / System clock Output
______
WR external inpout clock. (BCLK output = 20 MHz when CPU clock operates at 40
When this signal is System Clock(BCLK), it outputs a clock whose is twice
MHz). Use this clock when circuits are synchronized externally.
When this signal is Write(WR), during external write access it indicates the
valid data on the data bus to transfer.
______
that of
OSC-VCC Power supply — Power supply to the PLL circuit. Connect OSC-VCC to the power supply(3.3V)
OSC-VSS Ground — Connect OSC-VSS to ground.
VCNT PLL control Input This pin controls the PLL circuit. Connect a resistor and capacitor to this pin.
Reset
Mode MOD0 Mode Input These pins set an operation mode.
Address A12-A30 Address Output 19 lines of address bus (A12-A30) are provided to accommodate two
bus bus
Data bus DB0-DB15 Data bus Input/output This 16-bit data bus connects to external device.
______
RESET Reset Input This pin resets the internal circuits.
MOD1 MOD0 MOD1 Mode
0 0 Single-chip mode
0 1 Expanded external mode
1 0 Processor mode
0 0 (Boot mode) (Note)
1 1 (Reserved)
channels of 1 MB memory space (max.) connected external to the chip.
A31 is not output.
In the write cycle, of the 16-bit data bus the valid byte positions to write are
output as BHW/ BHE and BLW/ BLE. In read cycle, data on the entire 16-bit
data bus is read. However, only the data at the valid byte positions are
transferred to the M32R’s internal circuit.
_________ ________ ________ _______
Note: FP pin should be “H” level in Boot Mode.
8
2001-5-14 Rev.1.0
Table 5 Description of Pin Function (2/4)
Mitsubishi Microcomputers
32171 Group
SINGLE-CHIP 32-BIT CMOS MICROCOMPUTER
Type Pin type Description Input/Output Function
Bus
___
CS0, Chip Output Chip select signals for external devices.
control CS1 select
__
RD Read Output This signal is output when reading external devices.
___
_______
BHW/ BHE Byte high Output Indicates the byte positions to which valid are transferred when writing to
___
write
_______
BLW/ BLE Byte low Output
external devices.BHW/ BHE and BLW/ BLE correspond to the upper address
side(D0-D7 effective) and the lower address side(D8-D15 effective),respectivel.
write
____
WAIT Wait Input
_________
If WAIT input is low when the M32R accesses external devices, the wait cycle
extended.
_____
HREQ Hold Input This pin is used by an external device to request control of the external bus.
____
request
HACK Hold Output This signal indicates to the external device that the M32R has entered a hold
The M32R goes to a hold state when HREQ input is pulled low.
acknowledge state and relinquished control of the external bus.
Multijunction
TIN0, TIN3 Timer input Input Input pins for multijunction timer.
timer TIN16-TIN23
TO0 Timer output Output Output pins for multijunction timer.
-TO20
TCLK0 Timer clock Input Clock input pins for multijunction timer.
-TCLK3
________ _______ ________ _______
__________
A-D AVCC0, Analog power – AVCC0 is the power supply for the A-D0 converters.Connect AVCC0
converter
upply
to the power supply (5V or 3.3V).
AVSS0 Analog ground – AVSS0 is the analog ground for the A-D0 converters. Connect AVCC0 to ground
AD0IN0 Analog input Input 16-channel analog input pin for A-D0 converter.
-AD0IN15
VREF0 Reference Input VREF0 is the reference voltage input pin (5V or 3.3V) for the A-D0 converters.
voltage input
___
Interrupt
SBI System Input System break interrupt(SBI) input pin of the interrupt controller.
controller break
interrupt
9
2001-5-14 Rev.1.0
SINGLE-CHIP 32-BIT CMOS MICROCOMPUTER
Table 6 Description of Pin Functions (3/4)
Type Pin name Description Input/output Function
Serial SCLKI0/ UART transmit/ Input/output When channel 0 is in UART mode:
I/O
SCLKO0 receive clock Clock output derived from BRG output by dividing it by 2
output or CSIO
transmit/receive When channel 0 is in CSIO mode:
clock Transmit/receive clock input when external clock is selected
input/output Transmit/receive clock output when internal clock is selected
SCLKI1/ UART transmit/ Input/output When channel 1 is in UART mode:
SCLKO1 receive clock Clock output derived from BRG output by dividing it by 2
output or CSIO
transmit/receive When channel 1 is in CSIO mode:
clock Transmit/receive clock input when external clock is selected
input/output Transmit/receive clock output when internal clock is selected
Mitsubishi Microcomputers
32171 Group
TXD0 Transmit data Output Transmit data output pin for serial I/O channel 0
RXD0 Receive data Input Receive data input pin for serial I/O channel 0
TXD1 Transmit data Output Transmit data output pin for serial I/O channel 1
RXD1 Receive data Input Receive data input pin for serial I/O channel 1
TXD2 Transmit data Output Transmit data output pin for serial I/O channel 2
RXD2 Receive data Input Receive data input pin for serial I/O channel 2
Real-Time
Debugger
Flash- FP Flash protect Input This pin protects the flash memory against E/W in hardware.
only
CAN CTX Transmit data Output Data output pin from CAN module.
RTDTXD Transmit data Output Serial data output pin of the real-time debugger
RTDRXD Receive data Input Serial data input pin of the real-time debugger
RTDCLK Clock input Input Serial data transmit/receive clock input pin of the real-time debugger
RTDACK Acknowledge Output This pin outputs a low pulse synchronously with the real-time debugger’s
first clock of serial data output word. The low pulse width indicates the
type of the command/data the realtime debugger has received.
CRX Receive data Input Data input pin to CAN module.
JTAG JTMS Test mode Input Test select input for controlling the test circuit’s state transition
JTCK Clock Input Clock input to the debugger module and test circuit.
JTRST Test reset Input Test reset input for initializing the test circuit asynchronously.
JTDO Serial output Output Serial output of test instruction code or test data.
JTDI Serial input Input Serial input of test instruction code or test data.
10
2001-5-14 Rev.1.0
SINGLE-CHIP 32-BIT CMOS MICROCOMPUTER
Table 7 Description of Pin Functions (4/4)
Type Pin name Description Input/output Function
Input/
output
port
(Note)
P00-P07 Input/output port 0 Input/output Programmable input/output port.
P10-P17 Input/output port 1 Input/output Programmable input/output port.
P20-P27 Input/output port 2 Input/output Programmable input/output port.
P30-P37 Input/output port 3 Input/output Programmable input/output port.
P41-P47 Input/output port 4 Input/output Programmable input/output port.
P61-P64 Input/output port 6 Input/output Programmable input/output port.
(However, P64 is an input-only port)
P70-P77 Input/output port 7 Input/output Programmable input/output port.
P82-P87 Input/output port 8 Input/output Programmable input/output port.
P93-P97 Input/output port 9 Input/output Programmable input/output port.
Mitsubishi Microcomputers
32171 Group
P100 Input/output port 10 Input/output Programmable input/output port.
-P107
P110 Input/output port 11 Input/output Programmable input/output port.
-P117
P124 Input/output port1 2 Input/output Programmable input/output port.
-P127
P130 Input/output port 13 Input/output Programmable input/output port.
-P137
P150, P153 Input/output port 15 Input/output Programmable input/output port.
P174, P175 Input/output port 17 Input/output Programmable input/output port.
P220, Input/output port 22 Input/output Programmable input/output port.
P221, P225 (However, P221 is an input-only port)
Note: Input/output port 5 is reserved for future use.
Input/output ports 14, 16, 18, 19, 20, and 21 do not exist.
11
2001-5-14 Rev.1.0
Mitsubishi Microcomputers
32171 Group
SINGLE-CHIP 32-BIT CMOS MICROCOMPUTER
< Logical space of the M32171F4VFP >
Logical address
H'0000 0000
(16M bytes)
2G bytes
H'7FFF FFFF
H'8000 0000
1G bytes
H'BFFF FFFF
H'C000 0000
User space
Boot
program
space
BOOT ROM
area
(8K bytes)
Reserved area
(8K bytes)
Expanded external area
(4M bytes)
Ghost area
in units of
16M bytes
H'8000 0000
H'8000 1FFF
H'8000 2000
H'8000 3FFF
H'8000 4000
Ghost area
in units of
16K bytes
H'BFFF FFFF
EIT vector entry
User ROM
area
Reserved area
(512K bytes)
CS0 area
CS1 area
Ghost area in
CS1
(1M byte)
SFR area
(16K bytes)
Internal RAM
(16K bytes)
Reserved area
(96K bytes)
H'0000 0000
H'0007 FFFF
H'000F FFFF
H'0010 0000
H'001F FFFF
H'0020 0000
H'002F FFFF
H'0030 0000
H'003F FFFF
H'0040 0000
Ghost area in
units of 4M bytes
H'007F FFFF
H'0080 0000
H'0080 3FFF
H'0080 4000
H'0080 7FFF
H'0080 8000
H'0081 FFFF
H'0082 0000
1G bytes
System
space
H'FFFF FFFF
Figure 4 Address Space of the M32171F4VFP
12
Ghost area in
units of 128K bytes
H'00FF FFFF
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