MXIC MX23C8000MC-10, MX23C8000TC-12, MX23C8000TC-10, MX23C8000QC-20, MX23C8000QC-12 Datasheet
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MX23C8000
FEATURES
•1M x 8 organization
•Single +5V power supply
•Fast access time : 100/120/150/200ns
•Totally static operation
•Completely TTL compatible
GENERAL DESCRIPTION
The MX23C8000 is a 5V only, 8M-bit, Read Only Memory. It is organized as 1M words by 8 bits, operates from a single +5V supply, has a static standby mode, and has an access time of 100/120/150/200ns. It is designed to be compatible with all microprocessors and similar applications in which high performance, large bit storage and simple interfacing are important design considerations.
8M-BIT [1M x 8] CMOS MASK ROM
•Operating current : 40mA
•Standby current : 100uA
•Package
-32 pin plastic DIP
-32 pin plastic SOP
-32 pin plastic PLCC
-32 pin plastic TSOP
MX23C8000 offers automatic power-down, with power- down controlled by the chip enable (CE) input. When CE goes high, the device automatically powers down and remains in a low-power standby modes as long as CE remains high.
MX23C8000 pin 24 may also be programmed either active HIGH or LOW in order to eliminate bus contention in multiple-bus microprocessor systems.
PIN CONFIGURATION
32 PDIP |
A19 |
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1 |
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32 |
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VCC |
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A16 |
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2 |
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31 |
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A18 |
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A15 |
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3 |
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30 |
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A17 |
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A12 |
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29 |
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A14 |
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A7 |
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5 |
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28 |
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A13 |
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A6 |
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6 |
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MX23C8000 |
27 |
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A8 |
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A1 |
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11 |
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22 |
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CE/CE |
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A5 |
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7 |
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26 |
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A9 |
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A4 |
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8 |
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25 |
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A11 |
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A3 |
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9 |
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24 |
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OE/OE |
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A2 |
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10 |
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23 |
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A10 |
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A0 |
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12 |
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21 |
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Q7 |
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Q0 |
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13 |
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20 |
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Q6 |
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Q1 |
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14 |
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19 |
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Q5 |
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Q2 |
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15 |
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18 |
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Q4 |
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VSS |
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16 |
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17 |
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Q3 |
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32 PLCC |
A12 |
A15 |
A16 |
A19 |
VCC |
A18 |
A17 |
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1 |
32 |
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30 |
A14 |
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A7 |
5 |
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29 |
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A6 |
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A13 |
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A5 |
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A8 |
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A4 |
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A9 |
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A3 |
9 |
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MX23C8000 |
25 |
A11 |
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A2 |
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OE/OE |
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A1 |
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A10 |
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A0 |
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CE/CE |
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DQ |
13 |
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17 |
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21 |
Q7 |
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14 |
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20 |
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Q1 |
Q2 |
VSS |
Q3 |
Q4 |
Q5 |
Q6 |
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P/N:PM0137
32 SOP |
A19 |
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A16 |
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A15 |
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A12 |
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A7 |
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A6 |
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A5 |
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A4 |
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A3 |
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A2 |
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A1 |
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A0 |
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Q0 |
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Q1 |
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Q2 |
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VSS |
32 TSOP |
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A11 |
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1 |
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A9 |
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2 |
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A8 |
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A13 |
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A14 |
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A17 |
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A18 |
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VCC |
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A19 |
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A16 |
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10 |
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A15 |
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11 |
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A12 |
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12 |
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A7 |
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13 |
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A6 |
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14 |
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A5 |
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15 |
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A4 |
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16 |
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1
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32 |
2 |
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31 |
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30 |
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29 |
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28 |
6 |
MX23C8000 |
27 |
7 |
26 |
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8 |
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25 |
9 |
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24 |
10 |
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23 |
11 |
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22 |
12 |
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21 |
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10 |
14 |
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19 |
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18 |
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MX23C8000
VCC
A18
A17
A14
A13
A8
A9
A11
OE/OE
A10
CE/CE
Q7
Q6
Q5
Q4
Q3
32 
OE/OE
31 
A10
30 
CE/CE
29 
Q7
28 
Q6
27 
Q5
26 
Q4
25 
Q3
24 
VSS
23 
Q2
22 
Q1
21 
Q0
20 
A0
19 
A1
18 
A2
17 
A3
REV. 3.8, JUL. 16, 2001
MX23C8000
PIN DESCRIPTION |
BLOCK DIAGRAM |
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Symbol |
Pin Function |
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A0~A19 |
Address Inputs |
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Q0~Q7 |
Data Outputs |
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CE/CE |
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Chip Enable Input |
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Output Enable Input |
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OE/OE |
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VCC |
Power Supply Pin (+5V) |
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VSS |
Ground Pin |
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CE/CE |
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CONTROL |
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OUTPUT |
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Q0~Q7 |
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OE/OE |
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LOGIC |
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BUFFERS |
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Y-DECODER |
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Y-SELECT |
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A0~A19 |
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ADDRESS |
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. |
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8M BIT |
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INPUTS |
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X-DECODER |
ROM ARRAY |
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VCC
VSS
ABSOLUTE MAXIMUM RATINGS*
RATING |
VALUE |
Ambient Operating Temperature |
0°C to 70°C |
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Storage Temperature |
-65°C to 125°C |
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Applied Input Voltage |
-0.5V to VCC+0.5 |
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Applied Output Voltage |
-0.5V to VCC+0.5 |
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VCC to Ground Potential |
-0.5V to 7.0V |
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Power Dissipation |
1.0W |
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*Note:
Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended period may affect reliability.
DC CHARACTERISTICS (Ta = 0°C ~ 70°C, VCC = 5.0V ± 10%)
Item |
Symbol |
MIN. |
MAX. |
Conditions |
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Output High Voltage |
VOH |
2.4V |
- |
IOH = -1.0mA |
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Output Low Voltage |
VOL |
- |
0.4V |
IOL = 2.1mA |
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Input High Voltage |
VIH |
2.2V |
VCC+0.3V |
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Input Low Voltage |
VIL |
-0.3V |
0.8V |
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Input Leakage Current |
ILI |
- |
10uA |
VIN=0 to 5.5V |
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Output Leakage Current |
ILO |
- |
10uA |
VOUT=0 to 5.5V |
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Power-Down Supply Current |
ICC3 |
- |
100uA |
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CE>VCC-0.2V |
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Standby Supply Current |
ICC2 |
- |
1.0mA |
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CE=VIH |
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Operating Supply Current |
ICC1 |
- |
40mA |
Note 1 |
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CAPACITANCE (Ta = 25°C, f=1.0MHz (Note 2))
Item |
Symbol |
MIN. |
MAX. |
UNIT |
Conditions |
Input Capacitance |
CIN |
- |
10 |
pF |
VIN=0V |
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Output Capacitance |
COUT |
- |
10 |
pF |
VOUT=0V |
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P/N:PM0137 |
REV. 3.8, JUL. 16, 2001 |
2
MX23C8000
AC CHARACTERISTICS (Ta = -10°C ~ 70°C, VCC = 5.0V ± 10%)
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23C8000-10 |
23C8000-12 |
23C8000-15 |
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23C8000-20 |
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PARAMETER |
SYMBOL |
MIN. |
MAX. |
MIN. |
MAX. |
MIN. |
MAX. |
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MIN. |
MAX. |
CONDITIONS |
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Cycle Time |
tCYC |
100ns |
- |
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120ns |
- |
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150ns |
- |
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200ns |
- |
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Address Access Time |
tAA |
- |
100ns |
- |
120ns |
- |
150ns |
- |
200ns |
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Output Hold Time After |
tOH |
0ns |
- |
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0ns |
- |
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0ns |
- |
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0ns |
- |
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Address Change |
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Chip Enable Access Time |
tACE |
- |
100ns |
- |
120ns |
- |
150ns |
- |
200ns |
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Output Enable/Chip Select |
tAOE |
- |
80ns |
- |
80ns |
- |
80ns |
- |
100ns |
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Access Time |
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Output Low Z Delay |
tLZ |
0ns |
- |
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0ns |
- |
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0ns |
- |
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0ns |
- |
Note 3 |
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Output High Z Delay |
tHZ |
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20ns |
- |
20ns |
- |
20ns |
- |
20ns |
Note 4 |
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Note:
1.Measured with device selected at f=5MHz and output unloaded.
2.This parameter is periodically sampled and is not 100% teseted.
3.Output low-impedance delay (tLA) is measured from CE going low.
4.Output high-impedance delay (tHZ) is measured from CE going high.
AC Test Conditions
Input Pulse Levels |
0.4V~2.4V |
Input Rise and Fall Times |
10ns |
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Input Timing Level |
1.5V |
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Output Timing Level |
0.8V and 2.0V |
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Output Load |
See Figure |
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TIMING DIAGRAM
PROPAGATION DELAY FROM ADDRESS (CE/OE=ACTIVE)
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tCYC |
ADDRESS |
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VALID ADDRESS |
INPUTS |
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tAA |
tOH |
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DATA OUT |
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VALID DATA |
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P/N:PM0137 |
REV. 3.8, JUL. 16, 2001 |
3
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