MCNIX MX23C3211RC-12, MX23C3211RC-10, MX23C3211MC-10, MX23C3211TC-12, MX23C3211TC-10, MX23C3211MC-12 Datasheet

MX23C3211

5 Volt 32-Mbit (4M x 8 / 2M x 16) Mask ROM with Page Mode

FEATURES

ORDER INFORMATION

•Bit organization

-4M x 8 (byte mode)

-2M x 16 (word mode)

•Fast access time

-Random access: 100ns (max.)

-Page access: 30ns (max.)

•Page Size

-8 words per page

•Current

-Operating:60mA

-Standby:50uA

•Supply voltage

-5V±10%

•Package

-44 pin SOP (500mil)

-48 pin TSOP (12mm x 20mm)

PIN CONFIGURATION

48 TSOP (Normal Type)

BYTE		1
A16		2
A15		3
A14		4
A13		5
A12		6
A11		7
A10		8
A9		9
A8		10
A19		11	MX23C3211
VSS		12
A20		13	(Normal Type)
A18		14
A17		15
A7		16
A6		17
A5		18
A4		19
A3		20
A2		21
A1		22
A0		23
CE		24

48 VSS

47 VSS

46 D15/A-1

45 D7

44 D14

43 D6

42 D13

41 D5

40 D12

39 D4

38 VCC

37 VCC

36 NC

35 D11

34 D3

33 D10

32 D2

31 D9

30 D1

29 D8

28 D0

27 OE

26 VSS

25 VSS

48 TSOP (Reverse Type)

VSS		48		1		BYTE
VSS		47		2		A16
D15/A-1		46		3		A15
D7		45		4		A14
D14		44		5		A13
D6		43		6		A12
D13		42		7		A11
D5		41		8		A10
D12		40		9		A9
D4		39		10		A8
VCC		38	MX23C3211	11		A19
VCC		37		12		VSS
NC		36	(Reverse Tpye)	13		A20
D11		35		14		A18
D3		34		15		A17
D10		33		16		A7
D2		32		17		A6
D9		31		18		A5
D1		30		19		A4
D8		29		20		A3
D0		28		21		A2
OE		27		22		A1
VSS		26		23		A0
VSS		25		24		CE

P/N:PM0258

1

Part No.	Access Page Access Package
	Time	Time
MX23C3211MC-10	100ns	30ns	44 pin SOP
MX23C3211MC-12	120ns	50ns	44 pin SOP
MX23C3211TC-10	100ns	30ns	48 pin TSOP
MX23C3211TC-12	120ns	50ns	48 pin TSOP
MX23C3211RC-10	100ns	30ns	48 pin TSOP
			(Reverse type)
MX23C3211RC-12	120ns	50ns	48 pin TSOP
			(Reverse type)

PIN DESCRIPTION

Symbol

Pin Function

A0~A20

Address Inputs

D0~D14

Data Outputs

D15/A-1

D15 (Word Mode)/ LSB Address

(Byte Mode)

Chip Enable Input

CE

Output Enable Input

OE

Word/ Byte Mode Selection

Byte

VCC

Power Supply Pin

VSS

Ground Pin

NC

No Connection

44 SOP

A20

NC

44

A18

2

43

A19

A17

3

42

A8

A7

4

41

A9

A6

5

40

A10

A5

6

39

A11

A4

7

38

A12

A3

8

MX23C3211

37

A13

A2

9

36

A14

A1

10

35

A15

A0

11

34

A16

33

12

BYTE

CE

VSS

13

32

VSS

14

31

D15/A-1

OE

D0

15

30

D7

D8

16

29

D14

D1

17

28

D6

18

27

D13

D9

19

26

D5

D2

20

25

D12

D10

D3

21

24

D4

22

23

VCC

D11

REV. 3.0,JUL. 17, 2001

MX23C3211

MODE SELECTION

CE	OE	Byte	D15/A-1	D0~D7	D8~D15	Mode	Power
H	X	X	X	High Z	High Z	-	Stand-by
L	H	X	X	High Z	High Z	-	Active
L	L	H	Output	D0~D7	D8~D15	Word	Active
L	L	L	Input	D0~D7	High Z	Byte	Active

BLOCK DIAGRAM

A0/(A-1)

A2

A3

D0

Address

Memory

Page

Page

Word/

Output

Buffer

Array

Buffer

Decoder

Byte

Buffer

A20

D15/(D7)

CE

BYTE

OE

ABSOLUTE MAXIMUM RATINGS

Item	Symbol	Ratings
Voltage on any Pin Relative to VSS	VIN	-1.3V to VCC+2.0V (Note)
Ambient Operating Temperature	Topr	0°C to 70°C
Storage Temperature	Tstg	-65°C to 125°C

Note: Minimum DC voltage on input or I/O pins is -0.5V. During voltage transitions, inputs may undershoot VSS to -1.3V for periods of up to 20ns. Maximum DC voltage on input or I/O pins is VCC+0.5V. During voltage transitions, input may overshoot VCC to VCC+2.0V for periods of up to 20ns.

P/N:PM0258

REV. 3.0, JUL. 17, 2001

2

				MX23C3211
DC CHARACTERISTICS (Ta = 0°C ~ 70°C, VCC = 5V±10%)
Item	Symbol	MIN.	MAX.		Conditions
Output High Voltage	VOH	2.4V	-	IOH = -1.0mA
Output Low Voltage	VOL	-	0.4V		IOL = 2.1mA
Input High Voltage	VIH	2.2V	VCC+0.3V
Input Low Voltage	VIL	-0.3V	0.8V
Input Leakage Current	ILI	-	5uA	0V, VCC
Output Leakage Current	ILO	-	5uA	0V, VCC
Operating Current	ICC1	-	60mA		tRC = 100ns, all output open
Standby Current (TTL)	ISTB1	-	1mA				= VIH
						CE
Standby Current (CMOS)	ISTB2	-	50uA
					CE>VCC-0.2V
Input Capacitance	CIN	-	10pF	Ta = 25°C, f = 1MHZ
Output Capacitance	COUT	-	10pF		Ta = 25°C, f = 1MHZ

AC CHARACTERISTICS (Ta = 0°C ~ 70°C, VCC = 5V±10%)

Item	Symbol	23C3211-10			23C3211-12
		MIN.	MAX.		MIN.	MAX.
Read Cycle Time	tRC	100ns	-		120ns	-
Address Access Time	tAA	-	100ns	-		120ns
Chip Enable Access Time	tACE	-	100ns	-		120ns
Page Mode Access Time	tPA	-	30ns	-		50ns
Output Enable Time	tOE	-	30ns	-		50ns
Output Hold After Address	tOH	0ns	-		0ns	-
Output High Z Delay	tHZ	-	20ns	-		20ns

Note:Output high-impedance delay (tHZ) is measured from OE or CE going high, and this parameter guaranteed by design over the full voltage and temperature operating range - not tested.

AC Test Conditions

Input Pulse Levels	0.4V~ 3.3V
Input Rise and Fall Times	10ns
Input Timing Level	1.5V
Output Timing Level	0.8V and 2.0V
Output Load	See Figure

IOH (load)=-1mA

DOUT

IOL (load)=2.1mA

C<100pF

Note:No output loading is present in tester load board.

Active loading is used and under software programming control.

Output loading capacitance includes load board's and all stray capacitance.

P/N:PM0258

REV. 3.0, JUL. 17, 2001

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