LG Display LC320DXJ-SFE1 Specification

LC320DXJ

Product Specification

SPECIFICATION

FOR

APPROVAL

)

(
(

Preliminary Specification

)

Final Specification

●

Title 32.0” WXGA TFT LCD

BUYER General

MODEL

APPROVED BY

/

/

/

KONKA

SIGNATURE

DATE

SUPPLIER LG.Display Co., Ltd.

*MODEL LC320DXJ

SUFFIX SFE1 (RoHS Verified)

APPROVED BY

S.J. Lee / Team Leader

REVIEWED BY

H.J. Kim / Project Leader

PREPARED BY

D.S. Kim / Engineer

SIGNATURE

DATE

Please return 1 copy for your confirmation with

your signature and comments.

Ver. 1.0

TV Products Development Dept.

LG. Display LCD Co., Ltd

1 /37

Product Specification

CONTENTS

LC320DXJ

Number ITEM

COVER
CONTENTS

RECORD OF REVISIONS 3

1 GENERAL DESCRIPTION
2 ABSOLUTE MAXIMUM RATINGS
3 ELECTRICAL SPECIFICATIONS

3-1 ELECTRICAL CHARACTERISTICS

3-2 INTERFACE CONNECTIONS
3-3 SIGNAL TIMING SPECIFICATIONS

3-4 LVDS SIGNAL SPECIFICATION 9
3-5 INTRA INTERFACE SIGNAL SPECIFICATION

3-6 COLOR DATA REFERENCE

3-7 POWER SEQUENCE
4 OPTICAL SPECIFICATIONS
5 MECHANICAL CHARACTERISTICS

Page

1
2

4
5

6

6
7
8

10
11
12
13
19

6 MECHANICAL DIMENSION

6-1 BOARD ASSEMBLY DIMENSION

6-2 CONTROL BOARD ASSEMBLY DIMENSION

6-3 FFC DIMENSION
7 RELIABILITY
8 INTERNATIONAL STANDARDS

8-1 ENVIRONMENT 24

9 PACKING

8-2 PACKING FORM
10 PRECAUTIONS 26

10-1 MOUNTING PRECAUTIONS 26
10-2 OPERATING PRECAUTIONS 26
10-3 ELECTROSTATIC DISCHARGE CONTROL 27
10-4 PRECAUTIONS FOR STRONG LIGHT EXPOSURE 27
10-5 STORAGE 27

Ver. 1.0

20
20
21
22
23
24

25
25

2 /37

Product Specification

RECORD OF REVISIONS

Revision No. Revision Date Page Description

0.1 Sep, 19, 2012 - Preliminary Specification(First Draft)

0.2 Oct, 11, 2012 - Kit. Biz New CAS Up-dated

0.3 Jan, 07, 2013 4 Up-dated General Features
15 Up-dated Table 6. OPTICAL CHARACTERISTICS

25, 28, 29 Up-dated 9-1. Packing Form, APPENDIX-I, APPENDIX-I-2

1.0 Jan, 08, 2013 - CAS Version 1.0 Release

- Final Specification

LC320DXJ

Ver. 1.0

3 /37

LC320DXJ

Product Specification

1. General Description

The LC320DDXJ is a Color Active Matrix Liquid Crystal Display with an integral the Source PCB and Gate
implanted on Panel (GIP). The matrix employs a-Si Thin Film Transistor as the active element.
It is a transmissive type display operating in the normally black mode. It has a 31.51 inch diagonally measured
active display area with WXGA resolution (768 vertical by 1366 horizontal pixel array).
Each pixel is divided into Red, Green and Blue sub-pixels or dots which are arranged in vertical stripes.
Gray scale or the luminance of the sub-pixel color is determined with a 8-bit gray scale signal for each dot.
Therefore, it can present a palette of more than 16.7M(6bit + FRC) colors.
It is intended to support LCD TV, PCTV where high brightness, super wide viewing angle, high color gamut,

high color depth and fast response time are important.

Mini-LVDS(RGB)

Control
Signals

LVDS Select

LVDS 1Port

+12.0V

#9

CN1

(30pin)

EEPROM

SCL

SDA

Timing Controller

[LVDS Rx]

Power Circuit

Block

Power Signals

General Features

Active Screen Size 31.51 inches(800.4mm) diagonal
Outline Dimension 715.0(H) x 411.0 (V) x 1.3 mm(D) (Typ.)
Pixel Pitch

170.25㎛ x 510.75㎛ x RGB

Source Driver Circuit

S1 S1366

G1

TFT - LCD Panel

(1366 × 768 x RGB pixels)

[Gate In Panel]

G768

Pixel Format 1366 horiz. by 768 vert. Pixels, RGB stripe arrangement
Color Depth 8-bit (D), 16.7 M colors

Drive IC Data Interface
Transmittance (With POL) 6.15 % (Typ.)

Viewing Angle (CR>10) Viewing angle free ( R/L 178 (Min.), U/D 178 (Min.))

Weight 0.86 Kg (Typ.)
Display Mode Transmissive mode, Normally black
Surface Treatment (Top) Hard coating(3H), Anti-glare treatment of the front polarizer (Haze < 1%)

Ver. 1.0

Source D-IC : 6-bit mini-LVDS, gamma reference voltage, and control signals
Gate D-IC : Gate In Panel

4 /37

LC320DXJ

Product Specification

2. Absolute Maximum Ratings

The following items are maximum values which, if exceeded, may cause faulty operation or permanent damage
to the LCD module.

Table 1. ABSOLUTE MAXIMUM RATINGS

Parameter Symbol

Value

Min Max

Power Input Voltage LCD Circuit VLCD -0.3 +14.0 VDC

T-Con Option Selection Voltage VLOGIC -0.3 +4.0 VDC
Operating Temperature TOP 0 +50
Storage Temperature TST -20 +60
Panel Front Temperature TSUR - +68

Operating Ambient Humidity HOP 10 90 %RH

Storage Humidity HST 10 90 %RH

Notes:

1. Ambient temperature condition (Ta = 25  2 °C )

2. Temperature and relative humidity range are shown in the figure below. Wet bulb temperature
should be Max 39 °C and no condensation of water.

3. Gravity mura can be guaranteed below 40℃ condition.

4. The maximum operating temperature is based on the test condition that the surface temperature
of display area is less than or equal to 68 ℃ with LCD module alone in a temperature controlled
chamber. Thermal management should be considered in final product design to prevent the surface

temperature of display area from being over 68 ℃. The range of operating temperature may

degrade in case of improper thermal management in final product design.

Unit Note

1

°C
°C

°C

2,3

4

2,3

Ver. 1.0

Wet Bulb
Temperature [°C]

20

10

0

10 20 30 40 50 60 70 800-20
Dry Bulb Temperature [°C]

30

40

50

60

90%

60%

40%

10%

Storage

Operation

Humidity

[(%)RH]

5 /37

LC320DXJ

Product Specification

3. Electrical Specifications
3-1. Electrical Characteristics

It requires two power inputs. One is employed to power for the LCD circuit. The other Is used for the LED
backlight

Table 2. ELECTRICAL CHARACTERISTICS

Parameter Symbol

Min Typ Max

Circuit :

Power Input Voltage VLCD 10.8 12.0 13.2 VDC

Power Input Current ILCD

Power Consumption PLCD 3.1 4.0 Watt 1

Rush current IRUSH - - 4.0 A 3

Notes :

1. The specified current and power consumption are under the V

- 255 332 mA 1

- 320 416 mA 2

Value

Unit notes

=12.0V, Ta=25  2°C, fV=60Hz

LCD

condition, and mosaic pattern(8 x 6) is displayed and fVis the frame frequency.

2. The current is specified at the maximum current pattern.

3. The duration of rush current is about 2ms and rising time of power input is 0.5ms (min.).

4. Ripple voltage level is recommended under ± 5% of typical voltage

White : 255 Gray
Black : 0 Gray

Ver. 1.0

Mosaic Pattern(8 x 6)

6 /37

Product Specification

3-2. Interface Connections

3-2-1. LCD Module

- LCD Connector(CN1) : FI-X30SSL-HF (Manufactured by JAE) or Compatible.

- Mating Connector : FI-X30C2L (Manufactured by JAE) or Equivalent

Table 3. MODULE CONNECTOR(CN1) PIN CONFIGURATION

Pin No. Symbol Description Note

1 VLCD Power Supply +12.0V
2 VLCD Power Supply +12.0V
3 VLCD Power Supply +12.0V
4 VLCD Power Supply +12.0V
5 GND Ground
6 GND Ground
7 GND Ground
8 GND Ground

9
10
11 GND Ground
12 RA- LVDS Receiver Signal(-)
13 RA+ LVDS Receiver Signal(+)
14 GND Ground
15 RB- LVDS Receiver Signal(-)
16 RB+ LVDS Receiver Signal(+)
17 GND Ground
18 RC- LVDS Receiver Signal(-)
19 RC+ LVDS Receiver Signal(+)
20 GND Ground
21 RCLK- LVDS Receiver Clock Signal(-)
22 RCLK+ LVDS Receiver Clock Signal(+)
23 GND Ground
24 RD- LVDS Receiver Signal(-)
25 RD+ LVDS Receiver Signal(+)
26 GND Ground
27
28
29
30 GND Ground

LVDS Select ‘H’ =JEIDA , ‘L’ or NC = VESA

NC No Connection

NC
NC
NC

No Connection (Note 4)
No Connection (Note 4)
No Connection (Note 4) 4

LC320DXJ

Appendix IV

4

4
4

Notes :

Ver. 1.0

1. All GND (Ground) pins should be connected together to the LCD module‟s metal frame.

2. All VLCD(power input) pins should be connected together.

3. All Input levels of LVDS signals are based on the EIA 644 Standard.

4. These pins are used only for LGD (Do not connect)

5. Specific pin No. #30 is used for “No signal detection” of system signal interface.

It should be GND for NSB (No Signal Black) while the system interface signal is not.

If this pin is “H”, LCD Module displays AGP (Auto Generation Pattern).

7 /37

LC320DXJ

Product Specification

3-3. Signal Timing Specifications

Table 6 shows the signal timing required at the input of the LVDS transmitter. All of the interface signal
timings should be satisfied with the following specification for normal operation.

Table 4. TIMING TABLE (DE Only Mode)

ITEM Symbol Min Typ Max Unit Note

Horizontal

Vertical

Frequency

Display

Period

Blank tHB 90 162 410 tclk

Total tHP 1456 1528 1776 tclk

Display

Period

Blank tVB

Total tVP

ITEM Symbol Min Typ Max Unit Note

DCLK fCLK 63.0 72.4 80.0 MHz

Horizontal fH 45 47.4 55 KHz 2

Vertical fV

tHV - 1366 - tclk

tVV - 768 - tHP

20

(126)

788

(894)

57

(47)

22

(180)

790

(948)

60

(50)

240

(295)

1008

(1063)

63

(53)

tHP 1

tHP

Hz

2

NTSC :

57~63Hz

(PAL : 47~53Hz)

Note: 1. The input of HSYNC & VSYNC signal does not have an effect on normal operation (DE Only Mode).

If you use spread spectrum of EMI, add some additional clock to minimum value for clock margin.

2. The performance of the electro-optical characteristics may be influenced by variance of the vertical
refresh rate and the horizontal frequency

※ Timing should be set based on clock frequency.

Ver. 1.0

8 /37

3-4. LVDS Signal Specification

3-4-1. LVDS Input Signal Timing Diagram

LC320DXJ

Product Specification

DCLK

1366

tCLK

0.5 Vcc

Invalid data

DE(Data Enable)

DE, Data

tHT

Valid data

1

0.7VDD

tHV

0.3VDD

1366

Invalid data

DE(Data Enable)

Ver. 1.0

768

1 768

tVV

tVT

9 /37

3-4-2. LVDS Input Signal Characteristics

1) DC Specification

LVDS -

LVDS +

LC320DXJ

Product Specification

# VCM= {(LVDS +) + ( LVDS -)}/2

0V

V

CM

V

IN _ MAXVIN _ MIN

Description Symbol Min Max Unit Note

LVDS Common mode Voltage V

LVDS Input Voltage Range V

CM

IN

1.0 1.5 V -

0.7 1.8 V -

Change in common mode Voltage ΔVCM - 250 mV -

2) AC Specification

T

clk

LVDS Clock

A

LVDS Data

(F

= 1/T

)

clk

A

LVDS 1‟st Clock

LVDS 2nd/ 3rd/ 4thClock

tSKEW

t

SKEW_mintSKEW_max

tSKEW

clk

T

clk

80%

20%

t

RF

Description Symbol Min Max Unit Note

V

LVDS Differential Voltage

LVDS Clock to Data Skew t

LVDS Clock/DATA Rising/Falling time t

Effective time of LVDS t

LVDS Clock to Clock Skew (Even to Odd) t

1. All Input levels of LVDS signals are based on the EIA 644 Standard.

notes

2. If t

isn‟t enough, t

RF

should be meet the range.

eff

TH

V

TL

SKEW

RF

eff

SKEW_EO

3. LVDS Differential Voltage is defined within t

Ver. 1.0

100 600 mV

-600 -100 mV

- |(0.20*T

260 |(0.3*T

|± 360|

- |1/7* T

eff

Tested with Differential Probe

)/7| ps -

clk

)/7| ps 2

clk

- ps -

| ps -

clk

3

10 /37

Product Specification

LC320DXJ

LVDS Data

0V

(Differential)

LVDS CLK

0.5tui

360ps

tui

VTH

VTL

360ps

teff

tui : Unit Interval

0V

(Differential)

* This accumulated waveform is tested with differential probe

Ver. 1.0

11 /37

Product Specification

* Source PCB

3-5. Intra interface Signal Specification

3-5-1. Mini-LVDS Signal Specification

Table 5. ELECTRICAL CHARACTERISTICS

Parameter Symbol Condition MIN TYP MAX Unit notes

LC320DXJ

Mini-LVDS Clock

frequency

mini-LVDS input Voltage
(Center)

mini-LVDS input Voltage
Distortion (Center)

mini-LVDS differential

Voltage range

mini-LVDS differential
Voltage range Dip

VID

VCM (0V)

* Differential Probe

VID

CLK 3.0V≤VCC ≤3.6V - 290 MHz

VIB

ΔVIB - - 0.8 V

Mini-LVDS Clock

and Data

VID 200 - 800 mV

ΔVID 25 - 800 mV

△VID

△VID

0.7 +

(VID/2)

* Active Probe

-

(VCC-1.2)

− VID / 2

V

△VIB

VIB

Ver. 1.0

FIG. 1 Description of VID, ΔVIB, ΔVID

FIG. 2 Measure point

12 /37