The LC320DDXJ is a Color Active Matrix Liquid Crystal Display with an integral the Source PCB and Gate
implanted on Panel (GIP). The matrix employs a-Si Thin Film Transistor as the active element.
It is a transmissive type display operating in the normally black mode. It has a 31.51 inch diagonally measured
active display area with WXGA resolution (768 vertical by 1366 horizontal pixel array).
Each pixel is divided into Red, Green and Blue sub-pixels or dots which are arranged in vertical stripes.
Gray scale or the luminance of the sub-pixel color is determined with a 8-bit gray scale signal for each dot.
Therefore, it can present a palette of more than 16.7M(6bit + FRC) colors.
It is intended to support LCD TV, PCTV where high brightness, super wide viewing angle, high color gamut,
high color depth and fast response time are important.
Mini-LVDS(RGB)
Control
Signals
LVDS Select
LVDS 1Port
+12.0V
#9
CN1
(30pin)
EEPROM
SCL
SDA
Timing Controller
[LVDS Rx]
Power Circuit
Block
Power Signals
General Features
Active Screen Size31.51 inches(800.4mm) diagonal
Outline Dimension715.0(H) x 411.0 (V) x 1.3 mm(D) (Typ.)
Pixel Pitch
170.25㎛ x 510.75㎛ x RGB
Source Driver Circuit
S1S1366
G1
TFT - LCD Panel
(1366 × 768 x RGB pixels)
[Gate In Panel]
G768
Pixel Format1366 horiz. by 768 vert. Pixels, RGB stripe arrangement
Color Depth8-bit (D), 16.7 M colors
Drive IC Data Interface
Transmittance (With POL)6.15 % (Typ.)
Weight0.86 Kg (Typ.)
Display ModeTransmissive mode, Normally black
Surface Treatment (Top)Hard coating(3H), Anti-glare treatment of the front polarizer (Haze < 1%)
Ver. 1.0
Source D-IC : 6-bit mini-LVDS, gamma reference voltage, and control signals
Gate D-IC : Gate In Panel
4 /37
LC320DXJ
Product Specification
2. Absolute Maximum Ratings
The following items are maximum values which, if exceeded, may cause faulty operation or permanent damage
to the LCD module.
Table 1. ABSOLUTE MAXIMUM RATINGS
ParameterSymbol
Value
MinMax
Power Input VoltageLCD CircuitVLCD-0.3+14.0VDC
T-Con Option Selection VoltageVLOGIC-0.3+4.0VDC
Operating TemperatureTOP0+50
Storage TemperatureTST-20+60
Panel Front Temperature TSUR-+68
Operating Ambient HumidityHOP1090%RH
Storage HumidityHST1090%RH
Notes:
1. Ambient temperature condition (Ta = 25 2 °C )
2. Temperature and relative humidity range are shown in the figure below. Wet bulb temperature
should be Max 39 °C and no condensation of water.
3. Gravity mura can be guaranteed below 40℃ condition.
4. The maximum operating temperature is based on the test condition that the surface temperature
of display area is less than or equal to 68 ℃ with LCD module alone in a temperature controlled
chamber. Thermal management should be considered in final product design to prevent the surface
temperature of display area from being over 68 ℃. The range of operating temperature may
degrade in case of improper thermal management in final product design.
No Connection (Note 4)
No Connection (Note 4)
No Connection (Note 4)4
LC320DXJ
Appendix IV
4
4
4
Notes :
Ver. 1.0
1. All GND (Ground) pins should be connected together to the LCD module‟s metal frame.
2. All VLCD(power input) pins should be connected together.
3. All Input levels of LVDS signals are based on the EIA 644 Standard.
4. These pins are used only for LGD (Do not connect)
5. Specific pin No. #30 is used for “No signal detection” of system signal interface.
It should be GND for NSB (No Signal Black) while the system interface signal is not.
If this pin is “H”, LCD Module displays AGP (Auto Generation Pattern).
7 /37
LC320DXJ
Product Specification
3-3. Signal Timing Specifications
Table 6 shows the signal timing required at the input of the LVDS transmitter. All of the interface signal
timings should be satisfied with the following specification for normal operation.
Table 4. TIMING TABLE (DE Only Mode)
ITEMSymbolMinTypMaxUnitNote
Horizontal
Vertical
Frequency
Display
Period
BlanktHB90162410tclk
TotaltHP145615281776tclk
Display
Period
BlanktVB
TotaltVP
ITEMSymbolMinTypMaxUnitNote
DCLKfCLK63.072.480.0MHz
HorizontalfH4547.455KHz2
VerticalfV
tHV-1366-tclk
tVV-768-tHP
20
(126)
788
(894)
57
(47)
22
(180)
790
(948)
60
(50)
240
(295)
1008
(1063)
63
(53)
tHP1
tHP
Hz
2
NTSC :
57~63Hz
(PAL : 47~53Hz)
Note: 1. The input of HSYNC & VSYNC signal does not have an effect on normal operation (DE Only Mode).
If you use spread spectrum of EMI, add some additional clock to minimum value for clock margin.
2. The performance of the electro-optical characteristics may be influenced by variance of the vertical
refresh rate and the horizontal frequency
※ Timing should be set based on clock frequency.
Ver. 1.0
8 /37
3-4. LVDS Signal Specification
3-4-1. LVDS Input Signal Timing Diagram
LC320DXJ
Product Specification
DCLK
1366
tCLK
0.5 Vcc
Invalid data
DE(Data Enable)
DE, Data
tHT
Valid data
1
0.7VDD
tHV
0.3VDD
1366
Invalid data
DE(Data Enable)
Ver. 1.0
768
1768
tVV
tVT
9 /37
3-4-2. LVDS Input Signal Characteristics
1) DC Specification
LVDS -
LVDS +
LC320DXJ
Product Specification
# VCM= {(LVDS +) + ( LVDS -)}/2
0V
V
CM
V
IN _ MAXVIN _ MIN
DescriptionSymbolMinMaxUnitNote
LVDS Common mode VoltageV
LVDS Input Voltage RangeV
CM
IN
1.01.5V-
0.71.8V-
Change in common mode VoltageΔVCM-250mV-
2) AC Specification
T
clk
LVDS Clock
A
LVDS Data
(F
= 1/T
)
clk
A
LVDS 1‟st Clock
LVDS 2nd/ 3rd/ 4thClock
tSKEW
t
SKEW_mintSKEW_max
tSKEW
clk
T
clk
80%
20%
t
RF
DescriptionSymbolMinMaxUnitNote
V
LVDS Differential Voltage
LVDS Clock to Data Skewt
LVDS Clock/DATA Rising/Falling timet
Effective time of LVDSt
LVDS Clock to Clock Skew (Even to Odd)t
1. All Input levels of LVDS signals are based on the EIA 644 Standard.
notes
2. If t
isn‟t enough, t
RF
should be meet the range.
eff
TH
V
TL
SKEW
RF
eff
SKEW_EO
3. LVDS Differential Voltage is defined within t
Ver. 1.0
100600mV
-600-100mV
-|(0.20*T
260|(0.3*T
|± 360|
-|1/7* T
eff
Tested with Differential Probe
)/7|ps-
clk
)/7|ps2
clk
-ps-
|ps-
clk
3
10 /37
Product Specification
LC320DXJ
LVDS Data
0V
(Differential)
LVDS CLK
0.5tui
360ps
tui
VTH
VTL
360ps
teff
tui : Unit Interval
0V
(Differential)
* This accumulated waveform is tested with differential probe
Ver. 1.0
11 /37
Product Specification
* Source PCB
3-5. Intra interface Signal Specification
3-5-1. Mini-LVDS Signal Specification
Table 5. ELECTRICAL CHARACTERISTICS
ParameterSymbolConditionMINTYPMAXUnitnotes
LC320DXJ
Mini-LVDS Clock
frequency
mini-LVDS input Voltage
(Center)
mini-LVDS input Voltage
Distortion (Center)
mini-LVDS differential
Voltage range
mini-LVDS differential
Voltage range Dip
VID
VCM (0V)
* Differential Probe
VID
CLK3.0V≤VCC ≤3.6V-290MHz
VIB
ΔVIB--0.8V
Mini-LVDS Clock
and Data
VID200-800mV
ΔVID25-800mV
△VID
△VID
0.7 +
(VID/2)
* Active Probe
-
(VCC-1.2)
− VID / 2
V
△VIB
VIB
Ver. 1.0
FIG. 1 Description of VID, ΔVIB, ΔVID
FIG. 2 Measure point
12 /37
LC320DXJ
Product Specification
3-6. Color Data Reference
The brightness of each primary color(red,green,blue) is based on the 8bit gray scale data input for the color.
The higher binary input, the brighter the color. Table 7 provides a reference for color versus data input.
White11111111 11111111 11111111
RED (000) 00000000 00000000 00000000
RED (001)00000001 00000000 00000000
............
RED (254)11111110 00000000 00000000
RED (255)11111111 00000000 00000000
GREEN (000) 00000000 00000000 00000000
GREEN
BLUE
Ver. 1.0
GREEN (001)00000000 00000001 00000000
............
GREEN (254)00000000 11111110 00000000
GREEN (255)00000000 11111111 00000000
BLUE (000) 00000000 00000000 00000000
BLUE (001)00000000 00000000 00000001
............
BLUE (254)00000000 00000000 11111110
BLUE (255)00000000 00000000 11111111
13 /37
3-7. Power Sequence
3-6-1. LCD Driving circuit
LC320DXJ
Product Specification
Power Supply For LCD
V
LCD
Interface Signal (Tx_clock)
User Control Signal
(LVDS_select)
Power for LED
Table 8. POWER SEQUENCE
Parameter
90%
10%
0V
T1
T2
30%
0V
100%
T6
Valid Data
T3T4
LED ON
Value
MinTypMax
90%
10%
T7
T5
Vcm : LVDS Common mode Voltage
UnitNote
10%
Note :
Ver. 1.0
T10.5-20ms1
T20--ms2
T3400--ms3
T4200--ms3
T51.0--s4
T60-T2ms5
T70--ms6
1. Even though T1 is over the specified value, there is no problem if I2T spec of fuse is satisfied.
2. If T2 is satisfied with specification after removing LVDS Cable, there is no problem.
3. The T3 / T4 is recommended value, the case when failed to meet a minimum specification,
abnormal display would be shown. There is no reliability problem.
4. T5 should be measured after the Module has been fully discharged between power off and on period.
5. If the on time of signals (Interface signal and user control signals) precedes the on time of Power (V
it will be happened abnormal display. When T6 is NC status, T6 doesn‟t need to be measured.
6. It is recommendation specification that T7 has to be 0ms as a minimum value.
※ Please avoid floating state of interface signal at invalid period.
※ When the power supply for LCD (VLCD) is off, be sure to pull down the valid and invalid data to 0V.
LCD
),
14 /37
LC320DXJ
Product Specification
4. Optical Specification
Optical characteristics are determined after the unit has been „ON‟ and stable in a dark environment at 25± 2°C.
The values are specified at distance 50cm from the LCD surface at a viewing angle of and equal to 0 °.
FIG. 6 shows additional information concerning the measurement equipment and method.
Optical Stage(x,y)
LCD Module
Pritchard 880 or
equivalent
50cm
FIG. 3 Optical Characteristic Measurement Equipment and Method
Ta= 25± 2°C, VDD,H_VDD,VGH,VGL=typ, fV=60Hz,
Table 6. OPTICAL CHARACTERISTICS
ParameterSymbol
Contrast RatioCR8501200-1
Response Time
Color Coordinates
[CIE1931]
Viewing Angle (CR>10)
x axis, right(=0°)
x axis, left (=180°)
y axis, up (=90°)
y axis, down (=270°)
Gray Scale---4
RisingTrFallingTf-
RED
GREEN
BLUE
Rx
Ry0.331
Gx0.306
Gy0.587
Bx0.151
By0.063
r89--
l89--
u89--
d89--
BW=0.693GBPS , EXTVBR-B =100% Back Light : LGD B/L
Value
MinTypMax
812
Unitnotes
ms2
1014
0.647
Typ
-0.03
Typ
+0.03
degree3
Ver. 1.0
15 /37
Product Specification
notes : 1. Contrast Ratio(CR) is defined mathematically as :
LC320DXJ
Contrast Ratio =
Surface Luminance with all white pixels
Surface Luminance with all black pixels
It is measured at center 1-point.
2. Surface luminance are determined after the unit has been „ON‟ and 1 Hour after lighting the
backlight in a dark environment at 25± 2°C. Surface luminance is the luminance value at center
1-point across the LCD surface 50cm from the surface with all pixels displaying white.
For more information see the FIG. 3.
3. Response time is the time required for the display to transit from any gray to white (Rise Time, TrR)
and from any gray to black (Decay time, TrD). For additional information see the FIG. 5.
※ G to GBWSpec stands for average value of all measured points.
Photo Detector : RD-80S / Field : 2 °
4. G to G σ is Variation of Gray to Gray response time composing a picture
G to G (σ) =
√
Σ(Xi- u)
N
2
Xi = Individual Data
u = Data average
N : The number of Data
5. Viewing angle is the angle at which the contrast ratio is greater than 10. The angles are
determined for the horizontal or x axis and the vertical or y axis with respect to the z axis which
is normal to the LCD module surface. For more information, see the FIG. 6.
6. Gray scale specification
Gamma Value is approximately 2.2. For more information, see the Table 7.
Measuring point for surface luminance & luminance variation
H
A
LC320DXJ
③②
V
①
B
A : H / 4 mm
④
FIG. 4 5 Points for Luminance Measure
Response time is defined as the following figure and shall be measured by switching the input signal for
“Black” ~ “White” and “White” ~ “Black”.
Tr
100
90
⑤
Tf
B : V / 4 mm
@ H,V : Active Area
Ver. 1.0
Optical
Response
10
0
Black
White
FIG. 5 Response Time
White
Black
17 /37
Dimension of viewing angle range
Normal
Y
E
= 0, Right
= 180, Left
= 270, Down
= 90, Up
LC320DXJ
Product Specification
FIG.6 Viewing Angle
Ver. 1.0
18 /37
Product Specification
5. Mechanical Characteristics
Table 8 provides general mechanical characteristics.
Table 8. MECHANICAL CHARACTERISTICS
ItemValue
Horizontal715.0mm
Outline Dimension
(Only Glass)
Active Display Area
Weight0.86 (TBD) kg(typ)
Vertical411.0mm
Thickness1.3 mm
Horizontal697.9mm
Vertical392.3mm
LC320DXJ
Surface Treatment
Hard coating(3H),
Anti-glare treatment of the front polarizer (Haze < 1%)
notes : Please refer to a mechanic drawing in terms of tolerance at the next page.
Ver. 1.0
19 /37
6. Mechanical Dimension
6-1. Board Assembly Dimension
LC320DXJ
Product Specification
Ver. 1.0
20 /37
Product Specification
6-2. Control Board Assembly Dimension
LC320DXJ
Ver. 1.0
21 /37
6-3. FFC Dimension
60.0± 1.0
LC320DXJ
Product Specification
Adhesive
Area
Silicone Tape
Area
◈ Note
- Layer : Single Side
- Pad : GOLD Plating
- #e dimension : Cpk 1.0 more
- ## dimension : Cpk 1.33 more
- Stiffener Color : Sky Blue
- H-F
- Dimension Unit : mm
Adhesive
Area
- Material List
Ver. 1.0
22 /37
Product Specification
7. Reliability
Table 9. ENVIRONMENT TEST CONDITION
No.Test ItemCondition
LC320DXJ
1High temperature storage test
2Low temperature storage test
3High temperature operation test
4Low temperature operation test
5Humidity condition Operation
6
Altitude operating
storage / shipment
Ta= 60°C 240h
Ta= -20°C 240h
Ta= 50°C 50%RH 240h
Ta= 0°C 240h
Ta= 40 °C ,90%RH
0 - 16,400 ft
0 - 40,000 ft
notes : Before and after Reliability test, Board ass‟y should be operated with normal function.
Ver. 1.0
23 /37
Product Specification
8. International Standards
8-1. Environment
a) RoHS, Directive 2002/95/EC of the European Parliament and of the council of 27 January 2003
LC320DXJ
Ver. 1.0
24 /37
Product Specification
9. Packing
9-1. Packing Form
a) Package quantity in one Pallet : 160 pcs
b) Pallet Size :1140 mm(L) X 910 mm(W) X 1085 mm(H)
LC320DXJ
Ver. 1.0
25 /37
LC320DXJ
Product Specification
10. Precautions
Please pay attention to the followings when you use this TFT LCD panel.
10-1. Assembly Precautions
(1) Please attach the surface transparent protective plate to the surface in order to protect the polarizer.
Transparent protective plate should have sufficient strength in order to the resist external force.
(2) You should adopt radiation structure to satisfy the temperature specification.
(3) Acetic acid type and chlorine type materials for the cover case are not desirable because the former
generates corrosive gas of attacking the polarizer at high temperature and the latter causes circuit break
by electro-chemical reaction.
(4) Do not touch, push or rub the exposed polarizers with glass, tweezers or anything harder than HB
pencil lead. And please do not rub with dust clothes with chemical treatment.
Do not touch the surface of polarizer for bare hand or greasy cloth.(Some cosmetics are detrimental
to the polarizer.)
(5) When the surface becomes dusty, please wipe gently with absorbent cotton or other soft materials like
chamois soaks with petroleum benzine. Normal-hexane is recommended for cleaning the adhesives
used to attach front / rear polarizers. Do not use acetone, toluene and alcohol because they cause
chemical damage to the polarizer
(6) Wipe off saliva or water drops as soon as possible. Their long time contact with polarizer causes
deformations and color fading.
(7) Board ass‟y should be put on the mold frame properly.
(8) FFC Cable should be connected between System board and Source PCB correctly.
(9) Mechanical structure for backlight system should be designed for sustaining board ass‟y safely.
10-2. Operating Precautions
(1) Response time depends on the temperature.(In lower temperature, it becomes longer.)
(2) Brightness depends on the temperature. (In lower temperature, it becomes lower.)
And in lower temperature, response time(required time that brightness is stable after turned on)
becomes longer
(3) Be careful for condensation at sudden temperature change.Condensation makes damage to polarizer or
electrical contacted parts. And after fading condensation, smear or spot will occur.
(4) When fixed patterns are displayed for a long time, remnant image is likely to occur.
(5) Module has high frequency circuits. Sufficient suppression to the electromagnetic interference shall be
done by system manufacturers. Grounding and shielding methods may be important to minimized the
interference.
(6) Please do not give any mechanical and/or electrical impact to board assy. Otherwise, it can‟t be operated
its full characteristics perfectly.
Ver. 1.0
26 /37
LC320DXJ
Product Specification
10-3. Electrostatic Discharge Control
Since a module is composed of electronic circuits, it is not strong to electrostatic discharge. Make certain that
treatment persons are connected to ground through wrist band etc. And don‟t touch interface pin directly.
Panel ground path should be connected to metal ground.
10-4. Precautions for Strong Light Exposure
Strong light exposure causes degradation of polarizer and color filter.
10-5. Storage
When storing the board ass‟y as spares for a long time, the following precautions are necessary.
(1) Store them in a dark place. Do not expose the board ass‟y to sunlight or fluorescent light. Keep the
temperature between 5°C and 35°C at normal humidity.
(2) The polarizer surface should not come in contact with any other object.
It is recommended that they be stored in the container in which they were shipped.
Ver. 1.0
27 /37
# APPENDIX-I
■ Pallet Ass‟y
①②
③④
Product Specification
ⓐ
ⓒ
LC320DXJ
ⓑ
ⓓ
ⓔ
⑤
⑥
ⓘ
ⓗ
No.DescriptionMaterial
No.DescriptionMaterial
PalletPlywood
ⓐ
ⓐ
ⓑ
ⓑ
ⓒ
ⓒ
ⓓ
ⓓ
ⓔ
ⓔ
ⓕ
ⓕ
ⓖ
ⓖ
PalletPlywood
Carton PlateSingle Wall
Carton PlateSingle Wall
PE SheetCarbon
PE SheetCarbon
Top PackingEPS
Top PackingEPS
Bottom PackingEPS
Bottom PackingEPS
Angle PackingSingle Wall
Angle PackingSingle Wall
TapeOPP
TapeOPP
Ver. 1.0
ⓗ
ⓗ
ⓘ
ⓘ
BandPP
BandPP
ClipPP
ClipPP
28 /37
Product Specification
# APPENDIX-I-2
■ Control PCB Packing Ass’y
a) Control PCB Qty / Box : 160 pcs
b) Tray Qty / Box : 18Tray(Upperst Tray Is empty)
c) Tray Size : 466 X 353 X 16
d) Box size : 468 X 355 X 197
[10pcs/Tray]
LC320DXJ
[18Tray+Empty Tray]
[17Tray]
[Inserting into Box
NO.DESCRIPTIONMATERIAL
1PCB Packing A,ssy2TrayPET
3BoxSWR4
Ver. 1.0
29 /37
# APPENDIX- II-1
■ Board Ass’y ID Label
LC320DXJ
Product Specification
Model
Serial No.
Work Other
LC320DXJ-SFE1
XXXX
Ver. 1.0
30 /37
# APPENDIX- II-2
■ BOX Label
LC320DXJ
Product Specification
LC320DXJ-SFE1
QTY : 10
■ Pallet Label
LC320DXJ
160 PCS
MADE IN KOREA
001/01-01
XXXXXXXXXXXXX XXX
SFE1
RoHS Verified
Ver. 1.0
31 /37
Product Specification
# APPENDIX- III-1
■ Required signal assignment for Flat Link (Thine : THC63LVD103) Transmitter(Pin7= “L” or “NC”)
LC320DXJ
Host System
24 Bit
RED0
RED1
RED2
RED3
RED4
RED5
RED6
RED7
GREEN0
GREEN1
GREEN2
GREEN3
GREEN4
GREEN5
GREEN6
GREEN7
BLUE0
BLUE1
BLUE2
BLUE3
BLUE4
BLUE5
BLUE6
BLUE7
Hsync
Vsync
Data Enable
CLOCK
DS90C385
or Compatible
51
52
54
55
56
3
50
2
4
6
7
11
12
14
8
10
15
19
20
22
23
24
16
18
27
28
30
31
TxCLKOUTTxCLKOUT+
TxOUT0TxOUT0+
TxOUT1TxOUT1+
TxOUT2TxOUT2+
TxOUT3-
TxOUT3+
KDF71G-30S-1H
48
47
46
45
42
41
40
39
38
37
GND
12
13
15
16
18
19
21
22
24
25
Timing
Controller
100Ω
100Ω
100Ω
100Ω
100Ω
9
RxIN0RxIN0+
RxIN1RxIN1+
RxIN2-
RxIN2+
RxCLKINRxCLKIN+
RxIN3RxIN3+
VESA / JEIDA
LCD Module
Note: 1. The LCD module uses a 100 Ohm[Ω] resistor between positive and negative lines of each receiver
input.
2. Refer to LVDS Transmitter Data Sheet for detail descriptions. (THC63LVD103 or Compatible)
3. „7‟ means MSB and „0‟ means LSB at R,G,B pixel data.
Ver. 1.0
32 /37
Product Specification
# APPENDIX- III-2
■ Required signal assignment for Flat Link (Thine : THC63LVD103) Transmitter(Pin7= “H” )
LC320DXJ
Host System
24 Bit
RED0
RED1
RED2
RED3
RED4
RED5
RED6
RED7
GREEN0
GREEN1
GREEN2
GREEN3
GREEN4
GREEN5
GREEN6
GREEN7
BLUE0
BLUE1
BLUE2
BLUE3
BLUE4
BLUE5
BLUE6
BLUE7
Hsync
Vsync
Data Enable
CLOCK
DS90C385
or Compatible
50
2
51
52
54
55
56
3
8
10
4
6
7
11
12
14
16
18
15
19
20
22
23
24
27
28
30
31
TxCLKOUT-
TxCLKOUT+
TxOUT0TxOUT0+
TxOUT1TxOUT1+
TxOUT2TxOUT2+
TxOUT3TxOUT3+
KDF71G-30S-1H
48
47
46
45
42
41
40
39
38
37
Vcc
12
13
15
16
18
19
21
22
24
25
Timing
Controller
100Ω
100Ω
100Ω
100Ω
100Ω
9
RxIN0RxIN0+
RxIN1RxIN1+
RxIN2RxIN2+
RxCLKINRxCLKIN+
RxIN3-
RxIN3+
VESA / JEIDA
LCD Module
Note :1. The LCD module uses a 100 Ohm[Ω] resistor between positive and negative lines of each receiver
input.
2. Refer to LVDS Transmitter Data Sheet for detail descriptions. (THC63LVD103 or Compatible)
3. „7‟ means MSB and „0‟ means LSB at R,G,B pixel data.
Ver. 1.0
33 /37
Product Specification
# APPENDIX- IV
■ LVDS Data-Mapping Information (8 Bit )
1) LVDS Select : “H” Data-Mapping (JEIDA format)
RCLKP
RCLKM
LC320DXJ
RAP
RBP
RCP
RDP
R17R16R15R14G12R13R12’R12R13’G12”
B12G17G16G15B13G14G13’G13G14’B13”
V
SYNCHSYNC
B17B16DEB15B14’B14B15’DE”
B11B10G11G10XR11R10’R10R11’X”
2) LVDS Select : “L” Data-Mapping (VESA format)
RCLKP
RCLKM
RAP
RBP
R15R14R13R12G10R11R10’R10R11’G10”
B10G15G14G13B11G12G11’G11G12’B15”
Ver. 1.0
RCP
RDP
V
SYNCHSYNC
B15B14DEB13B12’B12B13’DE”
B17B16G17G16XR17R16’R16R17’X”
34 /37
Product Specification
# APPENDIX- V
■ Option Pin Circuit Block Diagram
1) Circuit Block Diagram of LVDS Format Selection pin
LVDS Select Pin : Pin 9
LC320DXJ
LVDS Select
1KΩ
(Pin 7)
50kΩ
System SideLCM Side
LVDS Select
ASIC
(TCON)
Ver. 1.0
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# APPENDIX- VI
■ Flicker Adjustment
ParameterUnitMinTypMaxNote
LC320DXJ
Product Specification
Inversion Method-
Adjust Pattern /
Gray Level
Position-
Voltage rangeV5.46.47.4
-
H2-Dot Inversion
G H2-Dot Full Flicker,
127 Gray, 60Hz
Center
R G B R G B R G B R G B
Row 1
Row 2
Row 3
Row 4
60Hz
R G B
127 Gray
0Gray
Ver. 1.0
SCL
SDA
Adjustment JIG
FIG.7 VCOM Adjustment Pattern & Block Diagram
A
PMIC
B
LCD Module
A : Pull-up Resistors
(If it is necessary)
B : I2C Connector
(Refer to Appendix IX)
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Product Specification
# APPENDIX-Ⅶ
■ The reference method of BL burst dimming
It is recommended to use synchronous V-sync frequency to prevent waterfall
(Vsync * 2 =Burst Frequency)
LC320DXJ
Ver. 1.0
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