This manual provides the information necessary to repair, calibration, description and download the
features of the KP275C.
1.2 Regulatory Information
A. Security
Toll fraud, the unauthorized use of telecommunications system by an unauthorized part (for example,
persons other than your company’s employees, agents, subcontractors, or person working on your
company’s behalf) can result in substantial additional charges for your telecommunications services.
System users are responsible for the security of own system.
There are may be risks of toll fraud associated with your telecommunications system. System users
are responsible for programming and configuring the equipment to prevent unauthorized use. LGE
does not warrant that this product is immune from the above case but will prevent unauthorized use of
common carrier telecommunication service of facilities accessed through or connected to it. LGE will
not be responsible for any charges that result from such unauthorized use.
B. Incidence of Harm
If a telephone company determines that the equipment provided to customer is faulty and possibly
causing harm or interruption in service to the telephone network, it should disconnect telephone
service until repair can be done. A telephone company may temporarily disconnect service as long as
repair is not done.
C. Changes in Service
A local telephone company may make changes in its communications facilities or procedure. If these
changes could reasonably be expected to affect the use of the KP275C or compatibility with the net
work, the telephone company is required to give advanced written notice to the user, allowing the user
to take appropriate steps to maintain telephone service.
D. Maintenance Limitations
Maintenance limitations on the KP275C must be performed only by the LGE or its authorized agent.
The user may not make any changes and/or repairs expect as specifically noted in this manual.
Therefore,note that unauthorized alternations or repair may affect the regulatory status of the system
and may void any remaining warranty.
This model complies with rules regarding radiation and radio frequency emission as defined by local
regulatory agencies. In accordance with these agencies, you may be required to provide information
such as the following to the end user.
F. Pictures
The pictures in this manual are for illustrative purposes only; your actual hardware may look slightly
different.
G. Interference and Attenuation
An KP275C may interfere with sensitive laboratory equipment, medical equipment, etc. Interference
from unsuppressed engines or electric motors may cause problems.
H. Electrostatic Sensitive Devices
ATTENTION
Boards, which contain Electrostatic Sensitive Device (ESD), are indicated by theFollowing
information is ESD handling:
• Service personnel should ground themselves by using a wrist strap when exchange system boards.
• When repairs are made to a system board, they should spread the floor with anti-static mat which is
also grounded.
• Use a suitable, grounded soldering iron.
• Keep sensitive parts in these protective packages until these are used.
• When returning system boards or parts like EEPROM to the factory, use the protective package as
described.
APC Automatic Power Control
BB Baseband
BER Bit Error Ratio
CC-CV Constant Current - Constant Voltage
DAC Digital to Analog Converter
DCS Digital Communication System
dBm dB relative to 1 milliwatt
DSP Digital Signal Processing
EEPROM Electrical Erasable Programmable Read-Only Memory
EL Electroluminescence
ESD Electrostatic Discharge
FPCB Flexible Printed Circuit Board
GMSK Gaussian Minimum Shift Keying
GPIB General Purpose Interface Bus
GSM Global System for Mobile Communications
IPUI International Portable User Identity
IF Intermediate Frequency
LCD Liquid Crystal Display
LDO Low Drop Output
LED Light Emitting Diode
OPLL Offset Phase Locked Loop
PAM Power Amplifier Module
PCB Printed Circuit Board
PGA Programmable Gain Amplifier
PLL Phase Locked Loop
PSTN Public Switched Telephone Network
RF Radio Frequency
RLR Receiving Loudness Rating
RMS Root Mean Square
RTC Real Time Clock
FEM Front End Module
SIM Subscriber Identity Module
SLR Sending Loudness Rating
SRAM Static Random Access Memory
STMR Side Tone Masking Rating
TA Travel Adapter
TDD Time Division Duplex
TDMA Time Division Multiple Access
UART Universal Asynchronous Receiver/Transmitter
VCO Voltage Controlled Oscillator
VCTCXO Voltage Control Temperature Compensated Crystal Oscillator
WAP Wireless Application Protocol
S-GOLD3H-LC is a HSDPA/WCDMA/EDGE/GPRS/GSM system in package solution consisting of a
mixed signal baseband IC with a 3G coprocessor IC.
l Baseband IC containing all analog and digital functionality of a cellular radio. Additionally SGOLD3TM
Provides multimedia extensions such as camera, software MIDI, MP3 sound. It is designed as a single
chip solution, integrating the digital and mixed signal portions of the base band in 0.09um, 1.2V
technology.
The chip will support the FR, EFR, HR and AMR-NB vocoding.
S-GOLD3™ support multi-slot operation modes HSCSD (up to class 10), GPRS for high speed data
application (up to class 12), EGPRS (up to class 12) and DTM(class11) without additional external
hardware.
- Incremental Redundancy(IR) Memory of 35904 words of 16bit
• Shared Memory Block
1.5K x 32bit Shared RAM(dual ported) between controller system and TEAKLite.
• Controller Bus system
The processor cores and their peripherals are connected by powerful buses.
-Multi-layer AHB for connecting the ARM and the other master capable building blocks with
theinternal and external memories and with the peripheral buses.
-An FPI-Bus for connecting GSM peripherals, called hereafter FPI3 bus.
-A controller FPI bus for connecting the low performance controller peripherals such as keypad,
Called hereafter fPI2 bus.
-FPI2 and FPI3 are connected asynchronously to the AHB buses.
• Clock system
The clock system allows widely independent selection of frequencies for the essential parts of the
SGOLD3H-LC. Thus power consumption and performance can be optimized for each application.
T_OUT0 TXON_PA PAM Power on
T_OUT1T_OUT2 ANT_SEL1
T_OUT3
T_OUT4 FEM control
T_OUT5 FEM control
T_OUT6 PA_MODE PAM Mode select
T_OUT7 ANT_SEL2
T_OUT8 ANT_SEL3
T_OUT9
T_OUT10
Page 18
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3. TECHNICAL BRIEF
3.2.4 ADC channel
ADC block is composed of 11 external ADC channel. This block operates charging process and other
related process by reading battery voltage and other analog values.
M0 BAT_ID Battery temperature measure
M1 RF_TEMP RF block temperature measure
kM2 N.C
M3 JACK_TYPE Accessory type detect
M4 N.C
M5 N.C
M6 N.C
M7 H/W VERSION H/W version detect
M8 VBAT Battery supply voltage measure
M9 N.C
M10 N.C
Page 19
3.2.5 GPIO map
Over a hundred allowable resources, KP275C is using as follows except dedicated to SIM and
Memory.
KP275C GPIO(General Purpose Input/Output) Map, describing application, I/O state, and enable level,
is shown in below table
KP_IN0KEYIN0
KP_IN1 KEYIN1
KP_IN2 KEYIN2
KP_IN3 KEYIN3
KP_IN4 KEYIN4
KP_IN5 KEYIN05
KP_IN6 KEYOUT5
KP_OUT0 KEYOUT0
KP_OUT1 KEYOUT1
KP_OUT2 KEYOUT2
KP_OUT3 KEYOUT3
USIF1
USIF1_RXD_MRST UART_RX UART Data
USIF1_TXD_MTSR UART_TX UART Data
USIF1_RTS_N USB_ DAT_VP USB Data
USIF1_CTS_N USB_SE0_VM USB Data
USIF2
USIF2 _RXD_MRST BT_UART_RX Bluetooth UART Data
USIF2 _TXD_MTSR BT_UART_TX Bluetooth UART Data
USIF2_RTS_N BT_UART_RTS Bluetooth RTS
USIF2_CTS_N BT_UART_CTS Bluetooth CTS
USIF3
GPIO_19FM_RESET FM radio reset
USIF3 _TXD_MTSR
GPIO_21 VT_PWR_EN VT camera power enable
CLK
CLK32K CLK32kFor FM Radio, BT CLK32K
Audio I/F
EPN1 REC_N For Receiver
EPP1 REC_P For Receiver
EPPA1 HS_L For Headset
EPREF Reference
EPPA2 HS_R For Headset
MICN1 MAIN_MIC_N For Main Mic
MICP1 MAIN_MIC_P For Main Mic
MICN2 HS_MIC_N For Headset Mic
MICP2 HS_MIC_N For Headset Mic
VMICP VMIC_P Power for MIC
VMICN GND Ground for MIC
ADC
M0 BAT_ID Battery temperature measure
M1 RF_TEMP RF block temperature measure
M2
M3 JACK_TYPE Accessory type detect
M7 H/W VERSION H/W version detect
M8 VBAT Battery supply voltage measure
M9
M10
Reference
VREF VREFN
IREF GND with resistor
JTAG I/F
JTAG0_TDO
JTAG0_TDI
JTAG0_TMS
JTAG0_TCK
JTAG0_TRST_n
JTAG0_RTCK
JTAG1_TDO
JTAG1_TDI
JTAG1_TMS
JTAG1_rTCK
JTAG0_TRST_n
ETM I/F
TRIG_IN
MON1 MON1 ETM
MON2 MON2 ETM
TRACESYNC
TRACECLK
PIPESTAT[2]
PIPESTAT[1]
PIPESTAT[0]
TRACEPKT[0]
TRACEPKT[1]
TRACEPKT[2]
TRACEPKT[3]
TRACEPKT[4]
TRACEPKT[5]
TRACEPKT[6]
TRACEPKT[7]
Memory
MEM_AD[0] DATA(0)
MEM _AD[1] DATA(1)
MEM _AD[2] DATA(2)
MEM _AD[3] DATA(3)
MEM _AD[4]DATA(4
MEM _AD[5] DATA(5)
MEM _AD[6] DATA(6)
MEM _AD[7] DATA(7)
MEM _AD[8] DATA(8)
MEM _AD[9] DATA(9)
MEM _AD[10] DATA(10)
MEM _AD[11] DATA(11)
MEM _AD[12] DATA(12)
MEM _AD[13] DATA(13)
MEM _AD[14] DATA(14)
MEM _AD[15] DATA(15)
MEM _WR_n _WR
MEM _RD_n _RD
MEM _BC0_n _BC0
MEM _BC1_n _BC1
MEM _BC2_n LDQS
MEM _BC3_n UDQS
MEM _A[0] ADD(0)
MEM _A[1] ADD(1)
MEM _A[2] ADD(2)
MEM _A[3] ADD(3)
MEM _A[4] ADD(4)
MEM _A[5] ADD(5)
MEM _A[6] ADD(6)
MEM _A[7] ADD(7)
MEM _A[8] ADD(8)
MEM _A[9] ADD(9)
MEM _A[10] ADD(10)
MEM _A[11] ADD(11)
MEM _A[12] ADD(12)
MEM _A[13] ADD(13)
MEM _A[14] ADD(14)
MEM _A[15] ADD(15)
MEM _A[16] ADD(16)
MEM _A[17] ADD(17)
MEM _A[18] ADD(18)
MEM _A[19] ADD(19)
MEM _A[20] ADD(20)
MEM _A[21] ADD(21
MEM _A[22] ADD(22)
MEM _A[23] ADD(23)
MEM _A[24] ADD(24)
MEM _A[25] ADD(25)
MEM _A[26] ADD(26)
MDM_SDA[11] ADD(27)
MDM_SDA[12] ADD(28)
MDM_SDA[13] ADD(29)
MDM_SDA[14]ADD(30)
MEM _CS0_n __NAND_CSINTEL NOR (64MB)
FEM_CTRL[0] ANT_SEL4
FEM_CTRL[1] ANT_SEL5
FEM_CTRL[2] ANT_SEL6
System Port
AFC AFC
CLKOUT0 [<=26MHz] Not used
F26M 26MHZ 26M Main Clock
F32K to 32k crystal
OSC32K to 32k crystal
RESET_n _RESET
TRIG_OUT TRIG_OUT
RTC_OUT RTC_OUT
VCXO_EN VCXO_EN
DSP
DSPIN0 CLK32K
DSPOUT1 WDOG Navi key LED Backlight Control
DSPIN1
Page 27
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3. TECHNICAL BRIEF
3.3 Power management IC
3.3.1 General Description
SM-POWER is a highly integrated Power and Battery Management IC for mobile handsets. It has
been specially designed for usage with S-Gold3. Although optimized for usage with the Infineon
SGOLD
baseband device it is suitable for the S-GOLD lite and the E-GOLD+ baseband devices as well. It also
supports the cellular RF devices like SMARTi-DC, SMARTi-DC+, SMARTi-SD and the Bluemoon
Single, Infineon’s single chip solution for Bluetooth. If used with S-GOLD3 it provides all power supply
functions (except for the RF PA) for a complete advanced GSM Edge smart phone minimizing external
device count.
Block Description
• Highly efficient step-down converter for main digital baseband supply including Core, DSP and
memory interface (External Bus Unit).
• Support of S-GOLD standby power-down concept
• Low-drop-out (LDO) regulators for Flash and mobile RAM memory devices
• Voltage independent switching of two SIM cards
• LDO regulators for baseband I/O supply
• LDO regulator for analog mixed-signal section of S-GOLD
• Low-noise LDO regulators for RF devices
• Supply for Bluemoon Single, Infineon°Øs single chip solution for Bluetooth
• Audio amplifier 8 Ohms for handsfree operation and ringing
• Charge Control for charging Li-Ion/Polymer batteries under software control
• Pre-charge current generator with selectable current level
• RTC regulator with ultra-low quiescent current
• USB interface support for peripheral and mini-host mode
• Backlight LEDs driver with current selection and PWM dimming function
• Two single LED driver outputs for signaling
• Vibrator driver with adjustable voltage
• Fully controlable by software via I2C - Bus
• Temperature and battery voltage sensors
• Interrupt channels for peripherals
• System debug mode
• VQFN 48 package with heat sink and non-protruding leads
SM-POWER is a further step on the successful E-Power product line with enhanced and optimized
functionality.
SM-POWER features a baseband supply concept with a DC/DC step-down converter cascaded by
two linear regulators
• SM-POWER’s DC/DC converter makes up to 40 % reduction of battery current for smart phone
functions (e.g. organizer functions, games, MP3 decoding) possible.
• SDBB has high efficiency up to 95% and also a power save mode.
• Memory Interface is directly supported by the SDBB
• SDBB can also act as main supply voltage for E-GOLD+ or S-GOLDlite baseband devices.
• For S-GOLD two linear regulators for DSP and Core are cascaded after the SDBB.
SM-POWER supports the standby power-down concept of S-GOLD by temporarily switching off the
linear regulator for the DSP during mobile standby whenever this subsystem is not used. In this
phase the ARM controller and most peripherals including parts of the on-chip SRAM are kept
powered-up withpower being supplied by the other linear regulator.
SM-POWER includes a fully differential audio amplifier able to drive loads down to a nominal value
of 8 Ohm for usage in hands-free phones and for ringing
• 450 mW maximum output power
• adjustable gain
• mute switch SM-POWER also integrates a charging function for Li-Ion, Li-Polymer batteries
• click and pop -protection SM-POWER also integrates a charging function for Li-Ion, Li-Polymer
batteries
• Precharge current source with two current levels
• Constant current / constant voltage charging with 3 different termination voltages
• Programable charge current limitation for use with different batteries
• Freely programable pulse charging to reduce the thermal power dissipation in the constant voltage
charging phase
• Top-off charge current sensing SM-POWER completes the USB interface of S-GOLD
• Regulated voltage for S-GOLD USB interface including reverse current and overvoltage protection
• Switch to supply USB pull-up resistor
• Mini-host pull down resistor functionality
• Charge pump with internal switching capacitor for USB host VBUS supply voltage SM-POWER
fully supports LED and Vibra Motor functionality
• no external components needed
• driver for backlight LEDs adjustable in steps up to 140mA and with soft turn on and off by PWM
dimming
• two driver outputs for single LEDs for precharge indication and signaling with i.e. change of colour
• driver for Vibra Motor with adjustable voltages, soft startup / shutdown and current limitation
7. Full charge indication current (icon stop current) : 117 mA
8. Recharge voltage : 4.15 V
9. Low battery alarm
a. Idle : 3.45 V ~ 3.31 V
b. Dedicated : 3.45 V ~ 3.3 V
10. Low battery alarm interval
a. Idle : 3 min
b. Dedicated : 1 min
11. Switch-off voltage : 3.31 V
12. Charging temperature adc range
a. ~ -20°C : low charging voltage operation (3.6 V ~ 3.9 V) .
b. -20°C ~ 60°C : standard charging (up to 4.2 V)
c. 60°C~ : low charging voltage operation (3.6V ~ 3.9V)
KS360 series Power State : Defined 3cases as follow
Voltage level of PWRON pin is high before push the END_KEY button.
If push the END_KEY button, voltage level of PWRON pin is change from high to low.
ON_OFF1 is a power-on input for SM-POWER3 with active low levels.
[Figure 3.4-1] Remote power on and End-key power on circuit
KP275C supports 1.8V & 2.9V plug in SIM. SIM_IO, SIM_CLK, SIM_RST ports are used to
communicate with S-Gold3H-LC and the SIM power supply enabled by PMIC.
1Gbit NAND Flash & 512Mbit DDR SDRAM employed on KP275C with 16 bit parallel data bus thru
ADD(0) ~ ADD(24). The 1Gbit Nand Flash memory with DDR SDRAM stacked device family offers
multiple high-performance solutions.
The keypad interface is a peripheral which can be used for scanning keypads up to 8 rows (outputs
from Port Control Logic) and 8 columns (inputs to PCL). The number of rows and columns depend on
settings of the PCL.
[Figure 3.9-1] Number key circuit diagram[Figure 3.9-2]
Function key circuit diagram
KEY PAD
KEYIN3
VA801
EVLC5S0250
VA802
MENU
LEFT
SOFT802
CALL
EVLC5S0250
KEYIN4
DOWN
VA803
UP
OK
EVLC5S0250
KEYIN5
SOFT801
RIGHT
SOFT803
END_KEY
VA805
EVLC5S0250
VA806
EVLC5S0250
VA807
EVLC5S0250
VA808
EVLC5S0250
END
VA804
EVLC5S0250
VBAT
KEYOUT1
KEYOUT2
KEYOUT3
KEYOUT5
NUMBER KEY PAD
KEYIN0
KB_STAR
KEYIN1
301
4
304
7
307
*
21
302
5
8
308
0
310
KEYIN2
3
303
6
306305
9
309
#
KB301
KEYOUT1
KEYOUT2
KEYOUT3
KEYOUT5
Page 40
3.10 keypad back-light illumination
3.10.1 Number keypad back-light illumination
There are 2 snow white color LEDs on Key for keypad illumination. Keypad Back-light is controlled by
SMPower3 Flash LED port which has constant current control function. The whole configuration of the
SMPOWER3 Flash LED drivers is shown in below Figure.
[Figure 3.10.2-1] Function KEY back-light LED circuit diagram
VBAT
SUB KEY LED
C803
1u
UPPER_KEY_LED
R801
LD801
LEBB-S14E
EVLC5S02100
VA812
LD802
R802
150
LD803
LEBB-S14E
R803
150
1KR809
R810
10K
LD804
LEBB-S14E
R804
150150
Q801
KTC4075E
LD805
LEBB-S14E
R805
150
LEBB-S14E
EVLC5S02100
VA813
LD806
R806
150
LD807
LEBB-S14E
R807
150
LD808
LEBB-S14E
R808
150
C804
1u
LEBB-S14E
Page 42
3.11 LCD back-light illumination
SC624 is high efficiency charge pump LED driver using Semtech’s proprietary mAhXLife technology.
The load and supply conditions determine whether the charge pump operates 1X, 1.5X, or 2X mode.
SC624 also provides two low-drop out, low-noise linear regulators for powering a camera module or
other peripheral circuits.
KP275C Audio signal flow diagram as following diagram.
[ Figure 3.13-1] Audio signal flow diagram
AN
AN
FM RADIO
FM RADIO
RADIO_OUT_L
RADIO_OUT_L
RADIO_OUT_R
RADIO_OUT_R
HS_L
32
32
I2C
I2C
EPPA1
EPPA1
EPPA2
EPPA2
EPP1
EPP1
EPN2
EPN2
I2C
I2C
K
K
HS_L
HS_R
HS_R
REC_P
REC_P
REC_
REC_
I2C
I2C
T
T
AMP
AMP
N
N
Ear-Phone
Ear-Phone
RCV/SPK
RCV/SPK
S-Gold3H
S-Gold3H
Page 45
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3. TECHNICAL BRIEF
3.13.1 Audio amplifier
MAX9877 combines a high efficiency Class D audio power amplifier with a stereo Class AB
capacitorless Direct Drive headphone amplifier.
MAX9877 del KP275C use external AMP(MAX9877).
ivers up to 725mV from a 3.7V supply into an 8ohm load with 87% efficiency to extend battery life.
The Broadcom BCM2046 is a monolithic single-chip, Bluetooth 2.1-compliant, stand-alone baseband
processor with an integrated 2.4 GHz transceiver. It employs the highest level of integration and
eliminates all critical external components, thus minimizing the footprint and implementation cost of
Bluetooth solution.
The BCM2046 is the optimal solution for any voice and/or data application that that requires the
Bluetooth SIG standard HCI Controller interface (HCI) via USB, UART, or H5 and PCM audio interface
support . The BCM2046 radio transceiver provides enhanced radio performance to meet the most
stringent industrial temperature applications or the tightest intergration into mobile handsets and
portable devices. It is fully compatible with any of the standard TCXO frequencies and provides full
radio compatibility to operate simultaneously with GPS and cellular radios.
The PMB 6952 SMARTi 3GE combines the SMARTiPM quad-band GSM/EDGE and SMARTi3G
tripleband W-CDMA transceivers in a laminate based PG-TFSGA-121-2 package. A significant circuit
board area reduction is achieved compared to using separately packaged transceivers. SMARTiPM is
a quad-band transceiver for EGSM900/GSM900/ GSM1800/GSM1900 voice and data applications.
SMARTiPM features a direct conversion receiver and a quad-band polar modulator transmitter forGSM
and EDGE. An analog I/Q baseband interface is provided. The HSCSD and GPRS/EDGE capable
synthesizer is fully integrated, including all RF oscillators. A reference oscillator buffer amplifier with
three outputs is provided to simplify clock distribution. A three wire bus interface is used for control and
programming. SMARTi3G is a triple-band W-CDMA transceiver for voice and high speed data
applications. SMARTi3G features a direct conversion receiver and a direct modulation transmitter.
Analog I/Q baseband interfaces are supported. A three wire bus interface is provided for control and
programming. A second three wire bus may optionally be used for fast control of the receiver
programmable gain amplifier. Fractional-N PLL RF synthesizers including separate TX and RX VCOs
are fully integrated. Programmable logic outputs are provided to control external low noise amplifiers,
power amplifiers, and antenna switches. To avoid interference between the 2.5G and 3G transceivers,
simultaneous operation of SMARTiPM and SMARTi3G is not permitted.
The constant gain direct conversion receiver contains all active circuits for a complete receiver chain
for GSM/GPRS/EDGE (see [Figure 3.19.1-1] ). The GSM850/900/DCS1800/ PCS1900 LNAs with
balanced inputs are fully integrated. No interstage filtering is needed. The orthogonal LO signals are
generated by a divider-by-four for GSM850/900 band and a divider-by-two for the DCS1800/PCS1900
band.Down conversion to baseband domain is performed by low/high band quadrature direct down
conversion mixers. The baseband chain contains a LNB (low noise buffer), channel filter, output buffer
and DC-offset compensation. The 3rd order lowpass filter is fully integrated and provides sufficient
suppression of blocking signals as well as adjacent channel interferers and avoids anti-aliasing
through the baseband ADC. The receive path is fully differential to suppress on-chip interferences.
Several gain steps are implemented to cope with the dynamic range of the input signals. Depending
on the baseband ADC dynamic range, single- or multiple gain step switching schemes are applicable.
Furthermore an automatic DC-offset compensation can be used (depending on the gain setting) to
reduce the DC-offset at baseband-output. A programmable gain correction can be applied to correct
for front end- and receiver gain tolerances.
The GMSK transmitter supports power class 4 for EGSM900 and GSM900 as well as power class 1
for DCS1800 and PCS1900. The digital transmitter architecture is based on a very low power
fractional-N Sigma-Delta synthesizer without any external components (see [Figure 3.19.2-1]). The
analog I/Q modulation data from the baseband is converted to digital, filtered and transformed to polar
coordinates. The phase/frequency signal is further on processed by the Sigma-Delta modulation loop.
The output of its associated VCO is divided by four or two, respectively, and connected via an output
buffer to the appropriate single ended output pin. This configuration ensures minimum noise level.
The 8PSK transmitter supports power class E2 for EGSM900 and GSM900 as well as for DCS1800
and PCS1900. The digital transmitter architecture is based on a polar modulation architecture, where
the analog modulation data (rectangular I/Q coordinates) is converted to digital data stream and is
subsequently transformed to polar coordinates by means of a CORDIC algorithm. The resulting
amplitude information is fed into a digital multiplier for power ramping and level control. The ready
processed amplitude signal is applied to a DAC followed by a low pass filter which reconstructs the
analog amplitude information. The phase signal from the CORDIC is applied to the Sigma-Delta
fractional-N modulation loop. The divided output of its associated VCO is fed to a highly linear
amplitude modulator, recombining amplitude and phase information. The output of the amplitude
modulator is connected to a single ended output RF PGA for digitally setting the wanted transmit
power.
[Figure 3.19.2-1] GSM Transmitter Part Block Diagram
Page 60
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3. TECHNICAL BRIEF
The PA interface of SMARTi 3GE supports direct control of standard dual mode power amplifiers
(PA’s) which usually have a power control input VAPC and an optional bias control pin VBIAS for
efficiency enhancement. In GMSK mode, the PA is in saturated high efficiency mode and is controlled
via its VAPC pin directly by the baseband ramping DAC. In this way both up- / down-ramping and
output power level are set. In 8PSK mode, the ramping functionality is assured by an on-chip ramping
generator, whereas output power is controlled by the PGA’s as described above.
3.19.3 GSM RF Synthesizer
The SMARTi 3GE contains a fractional-N sigma-delta synthesizer for the frequency synthesis in the
RX operation mode. For TX operation mode the fractional-N sigma-delta synthesizer is used as
Sigma-Delta modulation loop to process the phase/frequency signal. The 26MHz reference signal is
provided by the internal crystal oscillator. This frequency serves as comparison frequency of the phase
detector and as clock frequency for all digital circuitry.
The divider in the feedback path of the synthesizer is carried out as a multi-modulus divider (MMD).
The loop filter is fully integrated and the loop bandwidth is about 100 kHz to allow the transfer of the
phase modulation. The loop bandwidth is automatically adjusted prior to each slot (OLGA2). To
overcome the statistical spread of the loopfilter element values an automatic loopfilter adjustment
(ALFA) is performed before each synthesizer startup.
The fully integrated quad-band VCO is designed for the four GSM bands (850, 900, 1800, 1900 MHz)
and operates at double or four times transmit or receive frequency. To cover the wide frequency range
the VCO is automatically aligned by a binary automatic band selection (BABS) before each
synthesizer startup.
3.19.4 Reference Oscillator
The SMARTi 3GE comprises three 26MHz reference frequency outputs for the GSM baseband, for the
3G RF and for other subsystems (GPS, Bluetooth, etc.) as well as an reference frequency input for
application of an external VCXO module.
3.19.5 Front End Module Control
Implemented in the SMARTi 3GE are two outputs for direct control of GSM front end modules with two
logic input pins to select RX- and TX-mode as well as low- and highband operation.
The single-chip transceiver is designed to fulfill the W-CDMA UTRA FDD system requirements for
bands I, II, III, IV, V, VI and IX. It contains all active circuits required to simultaneously modulate an
analog W-CDMA I/Q signal to the TX RF frequency and demodulate a RX RF W-CDMA signal to an
I/Q baseband signal.
3.20.1 WCDMA Receiver
The direct conversion receiver for each band consists of:
• fully differential signal path
• RF low noise amplifier (LNA2)
• I/Q demodulator including LO buffer and I/Q divider
• LO including on-chip VCO and synthesizer
• DC offset compensation without external components
• analog channel filter including auto calibration circuit (w/o external components)
• programmable gain control (PGC) controlled by 3-wire bus programming and gain setting unit onchip
• allpass filter (auto calibrated)
• configurable output drivers (programmable DC voltages and driver currents for different load
impedances)
RX Front-End
An external low noise amplifier as well as duplex and interstage filters are needed to form a complete
receive chain for each band.
Baseband Processing (analog)
The amplified RF signal is converted by a quadrature demodulator to I and Q signals at baseband
frequency. The resulting inphase and quadrature signals are fed into the analog baseband low pass
filter (Chebyshev type). An optional, additional filter stage can be activated in order to provide the
required selectivity for narrowband blockers. The filter corner frequency is controlled by an on-chip
filter alignment circuit. This filter also provides the overall baseband PGC functionality. The differential
offset voltage after the demodulator is reduced by an on-chip DC compensation loop. The subsequent
last PGC amplifier stage provides 1 dB gain steps. All gains are selected by 3-wire bus program-ming.
The direct-up conversion transmitter for each band consists of:
• fully differential signal path
• configurable input stages (programmable AC and DC input voltages)
• analog channel filter including auto calibration circuit (w/o external components)
• automatic carrier adjustment also featuring compensation of residual I/Q DC offsets
• I/Q modulator including LO buffer and I/Q divider
• LO including on-chip VCO and synthesizer
• RF voltage-controlled gain amplifier (VGA)
For each band, the modulator performs a direct quadrature modulation of the baseband input signals
at I and Q. The internally divided RF VCO signal is split into two orthogonal carriers. The gain of the
VGA is controlled by the voltage at the control pin TXGC. The robustness against PCB and baseband
processor spurious as well as noise is improved by an integrated baseband filter (Butterworth type).
The RF output signal is available at the differential outputs TXOUTH,/TXOUTHX,
TXOUTM/TXOUTMX, and TXOUTL/TXOUTLX. The modulator supply voltage must also be applied to
these open drain differential outputs.
TX Output Power
The voltage at the VGA control pin TXGC (VGC) should be limited to ensure that the specified
maximum output power (minimum Poutmax) is not exceeded. The VGC value at which the specified
minimum Poutmax is reached varies from device to device. ACLR and other specifications are only
valid for output power levels below the specified minimum Poutmax.
TX Front End
An external power amplifier as well as duplex and interstage filters are needed to form a complete
transmit chain for each band.
3.20.3 Synthesizer
The receiver and the transmitter contain each a complete fractional-N RF synthesizer with fast locking.
The VCO’s run at 4 GHz and the RX and TX frequencies are obtained through division by two (bands
I, II, III and IV) or four (bands V and VI). The PLL loop filters are fully integrated. The reference
frequency has to be provided by an external clock.
The total VCO frequency range is divided in 256 subranges, in order to limit the VCO slope. Before the
settling process of the PLL starts, a successive approximation algorithm selects the most appropriate
subrange.
[Figure 3.21-1] Schematic Diagram of 2.5G PAM (TQM7M5005)
[Table 3.21-1] TQM7M5005 Pin description
Pin#DescriptionFunction
1 DCS/PCS inDCS/PCS RF input-DC blocked
2 MODE SELECTMODE = High, the PAM operates in EDGE(8PSK)mode
MODE = Low, the PAM operates in GMSK mode
3 BAND SELECT(BS)BAND SELECT = Low, Low-Band active
BAND SELECT = High, High-Band active
4 VBATT Battery supply voltage, typ. 3.0-4.5V, nom. 1.6A
5 VRAMPDAC Control Signal(anaiog). Nominal Vramp range is 0.2 to 1.6V
GGMSK mode - Controls ramp profile and output power.
EDGE mode - Continuous bias adjustment. Reducing Vramp from max of
1.6V reduces current when used at lower power levels.
6 TX_ENTX_EN = High, PA is enabled for operation.
TX_EN = Low, PA is In Sleep mode
7GSM850/900 inGSM850/GSM900 RF input - DC blocked
10 GSM850/900 outGSM850/GSM900 RF output - DC blocked
12 DCS/PCS outDCS/PCS RF output - DC blocked
9,14Bypass CapConnect 0.01µF bypass capacitor as close to pin as practical
[Figure 3.23-1] Schematic Diagram of WCDMA Band1 LNA (BGA711L7)
[Figure 3.23-2] Schematic Diagram of WCDMA Band5 LNA (BGA751L7)
[Table 3.23-1] BGA711L7 Pin description
Pin#SymbolFunction
1 RFINLNA input
2 VENMode control
3 VGSGain step control
4 VCCSupply voltage
5 RREFTunable current consumption
6 RFOUTLNA output
7GNDGround connection for band and control circuitry