This manual provides the information necessary to repair, calibration, description and download the
features of this model.
1.2 Regulatory Information
A. Security
Toll fraud, the unauthorized use of telecommunications system by an unauthorized part (for example,
persons other than your company’s employees, agents, subcontractors, or person working on your
company’s behalf) can result in substantial additional charges for your telecommunications services. System
users are responsible for the security of own system. There are may be risks of toll fraud associated with your
telecommunications system. System users are responsible for programming and configuring the equipment
to prevent unauthorized use. The manufacturer does not warrant that this product is immune from the
above case but will prevent unauthorized use of common-carrier telecommunication service of facilities
accessed through or connected to it.
The manufacturer will not be responsible for any charges that result from such unauthorized use.
B. Incidence of Harm
If a telephone company determines that the equipment provided to customer is faulty and possibly causing
harm or interruption in service to the telephone network, it should disconnect telephone service until repair
can be done. A telephone company may temporarily disconnect service as long as repair is not done.
C. Changes in Service
A local telephone company may make changes in its communications facilities or procedure. If these
changes could reasonably be expected to affect the use of the this phone or compatibility with the network,
the telephone company is required to give advanced written notice to the user, allowing the user to take
appropriate steps to maintain telephone service.
D. Maintenance Limitations
Maintenance limitations on this model must be performed only by the manufacturer or its authorized agent.
The user may not make any changes and/or repairs expect as specifically noted in this manual. Therefore,
note that unauthorized alternations or repair may affect the regulatory status of the system and may void
any remaining warranty.
This model complies with rules regarding radiation and radio frequency emission as defined by local
regulatory agencies. In accordance with these agencies, you may be required to provide information such
as the following to the end user.
F. Pictures
The pictures in this manual are for illustrative purposes only; your actual hardware may look slightly
different.
G. Interference and Attenuation
Phone may interfere with sensitive laboratory equipment, medical equipment, etc.Interference from
unsuppressed engines or electric motors may cause problems.
H. Electrostatic Sensitive Devices
ATTENTION
Boards, which contain Electrostatic Sensitive Device (ESD), are indicated
by the sign. Following information is ESD handling:
• Service personnel should ground themselves by using a wrist strap when exchange system
boards.
• When repairs are made to a system board, they should spread the floor with anti-static mat
which is also grounded.
• Use a suitable, grounded soldering iron.
• Keep sensitive parts in these protective packages until these are used.
• When returning system boards or parts like EEPROM to the factory, use the protective
The AD6725 is a tightly integrated single-package baseband processing solution offered by Analog Devices
as part of the AD20msp520 SoftFone® chipset family. The AD6725 incorporates all digital, analog, and power
management functions required in GSM, GPRS, EGPRS handsets with advanced multimedia and system
power management capabilities.
▪ Shared on-chip peripherals and off-chip interfaces:
▪ Support for Burst-mode, Page-mode, and NAND Flash memory
▪ Support for SRAM, SDRAM, and PSRAM (cellular RAM)
▪ Full-Speed USB 2.0 Dual-Role Interface with OTG (On-The-Go) Host Mode or
▪ Serial Display Interface
▪ 8x8 Keypad Interface
▪ Thumbwheel Interface
▪ 4 Independent Programmable Backlights plus a Service Light
▪ 1.8V and 3.0V, 64 kbps SIM Interface
▪ Universal System Connector Interface
▪ Multimedia Card (MMC) Interface
▪ Secure Data (SD) Card Interface and SD I/O
▪ IrDA transceiver interfaces, including Fast IrDA (4 Mbps baud)
▪ 2 Configurable Generic Serial Ports (GSPs)
▪ 7 Configurable Enhanced Generic Serial Ports (eGSPs)
Applications Subsystem for Enhanced Multimedia:
▪ Dedicated 8/16/18-bit interface for parallel displays
▪ 8/10-bit Parallel Peripheral Interface (PPI) for camera sensor
▪ Image Signal Processing (ISP) module supporting resolutions up to 3.14 mega pixels.
▪ Flexible 2-D DMA controller
▪ Camera Flash synchronization strobe
▪ Hardware image scaling
▪ YCbCr/RGB color conversion
▪ JPEG decoder hardware Hardware
▪ JPEG compression
OTHER FEATURES
▪ Real-Time Clock (RTC) with Alarm
▪ Four General-Purpose Timers
▪ Compatible with Othello® radio subsystem
▪ Configurable interrupt controller architecture
▪ Programmable bus arbitration to optimize system performance
▪ Programmable Power Management and Clock Management
Slow Clocking Scheme for Low Idle Mode Current
Power Down modes
Dynamic Core Voltage Scaling
Active Leakage Current Management
▪ Independent I/O Voltage Domains
▪ On-chip support for EGPRS Data Services up to Class 12
▪ JTAG Interface for Test and In-Circuit Emulation of both the MCU and DSP
▪ Embedded Trace Macrocell for MCU Debug
▪ Advanced features for security Real-Time Clock (RTC) with Alarm
The AD6725 is a complete mixed-signal baseband processor that combines all of the data converters and
power supply regulators required for a GSM 900 / GSM 850 / DCS 1800 / PCS 1900 mobile on a single device,
including HSCSD, GPRS and EGPRS.
The AD6725 baseband transmit section supports the following mobile station GMSK
modulation power classes:
• GSM 900/850 power classes 4 and 5,
• DCS 1800 power classes 1 and 2, and
• PCS 1900 power classes 1 and 2.
The AD6725 baseband transmit section supports the following mobile station 8-PSK
modulation power classes:
• GSM 900/850 power classes E2 and E3,
• DCS 1800 power classes E2 and E3, and
• PCS 1900 power classes E2 and E3.
The AD6725 baseband receive section supports GMSK and 8-PSK applications.
The AD6725 auxiliary section provides a voltage reference, an automatic frequency control DAC, an auxiliary
ADC, and light controllers. The auxiliary ADC provides two channels for measuring temperature using discrete
external devices placed in critical locations. The AD6725 audio section provides 8 kHz and 16 kHz sampling
rates for voiceband data input and output and provides nine standard sample rates ranging from 8kHz to 48
kHz for personal audio output on two PCM Audio serial ports. The two Audio serial ports allow support for
concurrency. The AD6725 power management section provides voltage regulators for digital and analog
components, a battery charger, battery protection circuitry, and power supply activation logic. The AD6725
digital processor
interface provides serial ports for control data, baseband transmit and receive data, and two for audio data.
CSPORT interface, power management control interface and the circuit that generates power up RESET
pulses(RESET1P8) for use by the DBB chip.
All regulators except the USB interface regulator are powered from the main battery.
The USB regulator is powered from USB VBUS.
And the user presses KEYON which puts the AD6725 power management system into ACTIVATION state
(see definitions below) and signals DBB software that it’s time to wake up and operate using the KEYOUT
signal.
The power-on reset signals (RESET1P8 and RESET2P8) are asserted based on the VCORE (if VAPPCFG = 0),
VMEM, VEXT, and VPLL regulators. RESET1P8 and RESET2P8 are low when reset is enabled and high when
reset is disabled.
When the outputs of all four regulators reach their corresponding threshold voltages, reset will be disabled
after a nominal reset period of 130ms.
The outputs of all four regulators must remain at or above their corresponding threshold voltages for the
duration of the reset period for reset to be disabled (pulled high).
The nominal 130ms reset period is restarted whenever all four regulators reach their threshold voltages.
The nominal reset period of 130ms can be extended by connecting an external capacitor to CRST. This
capacitor is charged using a small current when reset is enabled. Once the capacitor reaches the threshold,
reset is disabled.
Reset will be enabled immediately if any one of the four regulators falls below their corresponding
threshold voltages. In addition, reset will be enabled if VBAT falls below VRTC. The PWREN signal is the
logical AND of all the state controls that enable or disable many of the regulators on the chip. If the
regulators enabled by PWREN are
disabled by PMT state controls described below then PWREN must go low.
When PWREN goes low reset will be immediately enabled causing RESET1P8 and RESET2P8 to be pulled
low.
When reset is enabled, both RESET1P8 and RESET2P8 are actively pulled low.
CRST is also actively pulled low when reset is enabled.
VABB Regulator Enable/Disable Logic Operation
The VABB regulator powers many on-chip analog circuits on the ABB. The VCXOEN signal, the VABBEn bit
in the LDOControl1 Bit Positions ( Addr 0x35) register, and the AFCDACMode and AFCDACOn bits in the
AuxControl1 Bit Positions ( Addr 0x13) register all particpate in controlling the VABB enable/disable.
When the ABB power management system transitions from Off state, DDLO state, UVLO state, or Thermal
Shutdown State to Power Key Activation, Charger Activation, USB Charger Activation, or Active State VABB
will be enabled. During these state transitions ABBEn = 0 and AFCDACMode = 0, VRF is enabled.
Once the ABB power management system is in Power Key Activation, Charger Activation, USB Charger
Activation, Active-Standby or Active State the VABB regulator enable/disable is controlled by the
information written to the VABBEn and AFCDACMode register bits by system software.
The Digital Baseband Core regulator supplies the digital baseband processor (DBB) core.
The voltage on VCORE is selectable using the VCOREControl register.
The VCOREActive code selects the voltage on VCORE in high power mode and the VCOREStandby code
selects the voltage on VCORE in low-power mode.
DBB Interface (VINT)
The DBB interface regulator supplies the DBB/ABB digital interfaces. The output voltage of the VINT regulator
is nominal 1.8V.
Memory (VMEM)
The VMEM regulator supplies the external memory(s) and the interface to the external memory on the digital
baseband processor. The output voltage of the Memory Interface regulator can be selected as 1.8V nominal
or 2.8V nominal using the VMEMSEL terminal.
External Interface (VEXT)
The External Interface regulator supplies the Radio digital interface and the high voltage (>1.8V) interface
between the digital baseband processor and various peripherals, such as the LED indicators and the LCD
display.
SIM Interface (VSIM)
AD6725 is designed to support 3.0 V and 1.8 V SIMs exclusively (i.e. no 5 V SIMs).
The SIM Interface regulator supplies the SIM interface circuitry on the digital processor and the SIM card. By
default the SIM Interface regulator output is 2.85 V, which can be decreased to 1.8 V if a 1.8 V SIM is detected.
Real-Time Clock (VRTC)
The Real-Time Clock regulator supplies the Real-Time Clock module. The Real-Time Clock regulator is
optimized for low ground current.
The Baseband Analog regulator supplies the analog portions of the AD6725. Operation of the VABB
regulator is controlled by the VABBEn bit in the LDOControl1 register.
If VABBEn = 0, the VABB regultor will be disabled unless the AFCDAC is enabled or VCXOEN = 1. If VABBEn
= 1 (the default state) VABB is enabled along with VCORE, VMEM, and VEXT. The Baseband Analog
regulator is optimized for high ripple rejection and low noise. The output of the Baseband Analog
regulator should not be used as a supply for any external components.
Microphone (VMIC)
The Microphone regulator supplies the microphone interface circuitry. The Microphone regulator is
optimized for extremely high ripple rejection up to 217 Hz and low noise.
VRF (VRF)
The VCXO regulator supplies the voltage controlled crystal oscillator (VCXO). The VCXO regulator is
optimized for high ripple rejection and low noise.
USB Interface (VUSB)
The VUSB regulator supplies the USB transceiver located in the DBB. Digital Baseband PLL (VPLL) The
VPLL regulator supplies the phase locked loop on the digital baseband (DBB).
General Purpose Regulator (VGP)
The General Purpose regulator is intended primarily to serve as a supply rail for camera modules. Its
voltage is programmable by setting VGPSel[3:0] in theLDOControl2 Register. VGP is enabled by setting
the VGPEn bit in LDOControl1 to 1.
Applications Regulator (VAPP)
The VAPP regulator is an adjustable regulator that uses an off chip pass device. It has two modes of
operation selected by the state of the VAPPCFG terminal. If VAPPCFG is pulled low the VAPP regulator
functions as a programmable voltage applications supply.
In this mode, VAPP is enabled or disabled using the VAPPEn bit of LDOControl1.
The AD6546 is a fully integrated Quad band GSM Transceiver with an advanced modulator design that fully
supports 8-PSK EDGE modulation format.
The AD6546 contains a translation loop modulator for directly modulating baseband signals onto an
integrated Tx VCO. The translation loop modulator and Tx VCO are extremely low noise removing the need
for external TX filtering.
The LNAs have differential inputs which help minimize the effect of unwanted interferers. The
voltage gain of the LNAs is typically 24 dB. Each LNA can be switch to a low gain mode when
receiving large input signals as part of the AGC system.
Down-Converting Mixers
Two quadrature mixers are used to mix down the signals from the LNAs, one for the high bands (1800
and 1900 MHz) and one for the low bands (850 and 900 MHz). The outputs of the mixers are
connected to the baseband section through an integrated
single pole filter with nominal cut-off frequency of 800kHz.
The highly integrated transmit section of the AD6546 radio has been designed to fully support 8 PSK
modulation for EDGE applications, and GMSK modulation for GSM. A translational loop is used for
phase modulation, and for 8 PSK additional envelope (AM) circuits are enabled to implement a Polar
modulator.
Quadrature Modulator
The Quadrature modulator takes the baseband I/Q signals and converts this onto a complex
modulated signal (containing both amplitude and phase information) at the TX IF frequency. After
bandpass filtering the TX IF signal is used as the reference
input to the Phase Frequency Detector (PFD) for the transmit PLL, and in EDGE mode also provides
the input to the Reference Path Log Detector circuit for AM restoration.
The SKY77523 provides a complete transmit Voltage-Controlled Oscillator (VCO)-to-antenna and
antenna-to-receive Surface Acoustic Wave (SAW) filter solution.
The module consists of a single GSM850/EGSM900 and DCS1800/PCS1900 PA block, a PA Control (PAC)
block, impedance-matching circuitry for 50 Ω inputs and outputs, transmit harmonic filtering, an
integrated coupler, high-linearity and low insertion-loss PHEMT RF switches, and a diplexer. A custom
CMOS integrated circuit provides the internal PAC function, interface circuitry, and decoder circuitry to
control the RF switches.
The BlueCore 5-FM BGA is a single-chip radio and baseband IC for Bluetooth 2.4GHz systems including
enhanced data rates (EDR) to 3Mbits/s.
It includes anintegrated FM receiver with stereo audio output stage and an RDS demodulator. With the
on-chip CSR Bluetooth software stack, it provides a fully compliant Bluetooth system to v2.1 +EDR of
the specification for data and voice communications.