LG 32LV5500DD Schematic

LED LCD TV

SERVICE MANUAL

CAUTION

BEFORE SERVICING THE CHASSIS,
READ THE SAFETY PRECAUTIONS IN THIS MANUAL.

CHASSIS : LT12E

MODEL : 32LV5500 32LV5500-DD

North/Latin America http://aic.lgservice.com
Europe/Africa http://eic.lgservice.com
Asia/Oceania http://biz.lgservice.com

Internal Use Only

Printed in KoreaP/NO : MFL67007902 (1102-REV00)

LGE Internal Use OnlyCopyright LG Electronics. Inc. All right reserved.

Only for training and service purposes

- 2 -

CONTENTS

CONTENTS .............................................................................................. 2

SAFETY PRECAUTIONS ......................................................................... 3

SPECIFICATION....................................................................................... 6

ADJUSTMENT INSTRUCTION .............................................................. 18

EXPLODED VIEW .................................................................................. 26

SVC. SHEET ...............................................................................................

LGE Internal Use OnlyCopyright LG Electronics. Inc. All right reserved.

Only for training and service purposes

- 3 -

SAFETY PRECAUTIONS

Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the
Schematic Diagram and Exploded View.
It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent
Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.

General Guidance

An isolation Transformer should always be used during the
servicing of a receiver whose chassis is not isolated from the AC
power line. Use a transformer of adequate power rating as this
protects the technician from accidents resulting in personal injury
from electrical shocks.

It will also protect the receiver and it's components from being
damaged by accidental shorts of the circuitry that may be
inadvertently introduced during the service operation.

If any fuse (or Fusible Resistor) in this TV receiver is blown,
replace it with the specified.

When replacing a high wattage resistor (Oxide Metal Film Resistor,
over 1W), keep the resistor 10mm away from PCB.

Keep wires away from high voltage or high temperature parts.

Before returning the receiver to the customer,

always perform an AC leakage current check on the exposed
metallic parts of the cabinet, such as antennas, terminals, etc., to
be sure the set is safe to operate without damage of electrical
shock.

Leakage Current Cold Check(Antenna Cold Check)

With the instrument AC plug removed from AC source, connect an
electrical jumper across the two AC plug prongs. Place the AC
switch in the on position, connect one lead of ohm-meter to the AC
plug prongs tied together and touch other ohm-meter lead in turn to
each exposed metallic parts such as antenna terminals, phone
jacks, etc.
If the exposed metallic part has a return path to the chassis, the
measured resistance should be between 1MΩ and 5.2MΩ.
When the exposed metal has no return path to the chassis the
reading must be infinite.
An other abnormality exists that must be corrected before the
receiver is returned to the customer.

Leakage Current Hot Check (See below Figure)

Plug the AC cord directly into the AC outlet.

Do not use a line Isolation Transformer during this check.

Connect 1.5K/10watt resistor in parallel with a 0.15uF capacitor
between a known good earth ground (Water Pipe, Conduit, etc.)
and the exposed metallic parts.
Measure the AC voltage across the resistor using AC voltmeter
with 1000 ohms/volt or more sensitivity.
Reverse plug the AC cord into the AC outlet and repeat AC voltage
measurements for each exposed metallic part. Any voltage
measured must not exceed 0.75 volt RMS which is corresponds to

0.5mA.
In case any measurement is out of the limits specified, there is
possibility of shock hazard and the set must be checked and
repaired before it is returned to the customer.

Leakage Current Hot Check circuit

1.5 Kohm/10W

To Instrument's
exposed
METALLIC PARTS

Good Earth Ground
such as WATER PIPE,
CONDUIT etc.

AC Volt-meter

IMPORTANT SAFETY NOTICE

0.15uF

LGE Internal Use OnlyCopyright LG Electronics. Inc. All right reserved.

Only for training and service purposes

- 4 -

CAUTION: Before servicing receivers covered by this service
manual and its supplements and addenda, read and follow the

SAFETY PRECAUTIONS on page 3 of this publication.
NOTE: If unforeseen circumstances create conflict between the

following servicing precautions and any of the safety precautions on
page 3 of this publication, always follow the safety precautions.
Remember: Safety First.

General Servicing Precautions

1. Always unplug the receiver AC power cord from the AC power
source before;
a. Removing or reinstalling any component, circuit board

module or any other receiver assembly.

b. Disconnecting or reconnecting any receiver electrical plug or

other electrical connection.

c. Connecting a test substitute in parallel with an electrolytic

capacitor in the receiver.
CAUTION: A wrong part substitution or incorrect polarity
installation of electrolytic capacitors may result in an
explosion hazard.

2. Test high voltage only by measuring it with an appropriate high
voltage meter or other voltage measuring device (DVM,
FETVOM, etc) equipped with a suitable high voltage probe.
Do not test high voltage by "drawing an arc".

3. Do not spray chemicals on or near this receiver or any of its
assemblies.

4. Unless specified otherwise in this service manual, clean
electrical contacts only by applying the following mixture to the
contacts with a pipe cleaner, cotton-tipped stick or comparable
non-abrasive applicator; 10% (by volume) Acetone and 90% (by
volume) isopropyl alcohol (90%-99% strength)
CAUTION: This is a flammable mixture.
Unless specified otherwise in this service manual, lubrication of
contacts in not required.

5. Do not defeat any plug/socket B+ voltage interlocks with which
receivers covered by this service manual might be equipped.

6. Do not apply AC power to this instrument and/or any of its
electrical assemblies unless all solid-state device heat sinks are
correctly installed.

7. Always connect the test receiver ground lead to the receiver
chassis ground before connecting the test receiver positive
lead.
Always remove the test receiver ground lead last.

8. Use with this receiver only the test fixtures specified in this

service manual.

CAUTION: Do not connect the test fixture ground strap to any
heat sink in this receiver.

Electrostatically Sensitive (ES) Devices

Some semiconductor (solid-state) devices can be damaged easily
by static electricity. Such components commonly are called
Electrostatically Sensitive (ES) Devices. Examples of typical ES
devices are integrated circuits and some field-effect transistors and
semiconductor "chip" components. The following techniques
should be used to help reduce the incidence of component
damage caused by static by static electricity.

1. Immediately before handling any semiconductor component or
semiconductor-equipped assembly, drain off any electrostatic
charge on your body by touching a known earth ground.
Alternatively, obtain and wear a commercially available
discharging wrist strap device, which should be removed to
prevent potential shock reasons prior to applying power to the

unit under test.

2. After removing an electrical assembly equipped with ES
devices, place the assembly on a conductive surface such as
aluminum foil, to prevent electrostatic charge buildup or
exposure of the assembly.

3. Use only a grounded-tip soldering iron to solder or unsolder ES
devices.

4. Use only an anti-static type solder removal device. Some solder
removal devices not classified as "anti-static" can generate
electrical charges sufficient to damage ES devices.

5. Do not use freon-propelled chemicals. These can generate
electrical charges sufficient to damage ES devices.

6. Do not remove a replacement ES device from its protective
package until immediately before you are ready to install it.
(Most replacement ES devices are packaged with leads
electrically shorted together by conductive foam, aluminum foil
or comparable conductive material).

7. Immediately before removing the protective material from the
leads of a replacement ES device, touch the protective material
to the chassis or circuit assembly into which the device will be
installed.
CAUTION: Be sure no power is applied to the chassis or circuit,
and observe all other safety precautions.

8. Minimize bodily motions when handling unpackaged
replacement ES devices. (Otherwise harmless motion such as
the brushing together of your clothes fabric or the lifting of your
foot from a carpeted floor can generate static electricity
sufficient to damage an ES device.)

General Soldering Guidelines

1. Use a grounded-tip, low-wattage soldering iron and appropriate
tip size and shape that will maintain tip temperature within the
range or 500°F to 600°F.

2. Use an appropriate gauge of RMA resin-core solder composed
of 60 parts tin/40 parts lead.

3. Keep the soldering iron tip clean and well tinned.

4. Thoroughly clean the surfaces to be soldered. Use a mall wire­bristle (0.5 inch, or 1.25cm) brush with a metal handle.
Do not use freon-propelled spray-on cleaners.

5. Use the following unsoldering technique
a. Allow the soldering iron tip to reach normal temperature.

(500°F to 600°F)
b. Heat the component lead until the solder melts.
c. Quickly draw the melted solder with an anti-static, suction-

type solder removal device or with solder braid.

CAUTION: Work quickly to avoid overheating the circuit

board printed foil.

6. Use the following soldering technique.
a. Allow the soldering iron tip to reach a normal temperature

(500°F to 600°F)

b. First, hold the soldering iron tip and solder the strand against

the component lead until the solder melts.

c. Quickly move the soldering iron tip to the junction of the

component lead and the printed circuit foil, and hold it there
only until the solder flows onto and around both the
component lead and the foil.
CAUTION: Work quickly to avoid overheating the circuit
board printed foil.

d. Closely inspect the solder area and remove any excess or

splashed solder with a small wire-bristle brush.

SERVICING PRECAUTIONS

LGE Internal Use OnlyCopyright LG Electronics. Inc. All right reserved.

Only for training and service purposes

- 5 -

IC Remove/Replacement

Some chassis circuit boards have slotted holes (oblong) through
which the IC leads are inserted and then bent flat against the
circuit foil. When holes are the slotted type, the following technique
should be used to remove and replace the IC. When working with
boards using the familiar round hole, use the standard technique
as outlined in paragraphs 5 and 6 above.

Removal

1. Desolder and straighten each IC lead in one operation by gently
prying up on the lead with the soldering iron tip as the solder
melts.

2. Draw away the melted solder with an anti-static suction-type
solder removal device (or with solder braid) before removing the
IC.

Replacement

1. Carefully insert the replacement IC in the circuit board.

2. Carefully bend each IC lead against the circuit foil pad and
solder it.

3. Clean the soldered areas with a small wire-bristle brush.
(It is not necessary to reapply acrylic coating to the areas).

"Small-Signal" Discrete Transistor
Removal/Replacement

1. Remove the defective transistor by clipping its leads as close as
possible to the component body.

2. Bend into a "U" shape the end of each of three leads remaining
on the circuit board.

3. Bend into a "U" shape the replacement transistor leads.

4. Connect the replacement transistor leads to the corresponding
leads extending from the circuit board and crimp the "U" with
long nose pliers to insure metal to metal contact then solder
each connection.

Power Output, Transistor Device
Removal/Replacement

1. Heat and remove all solder from around the transistor leads.

2. Remove the heat sink mounting screw (if so equipped).

3. Carefully remove the transistor from the heat sink of the circuit
board.

4. Insert new transistor in the circuit board.

5. Solder each transistor lead, and clip off excess lead.

6. Replace heat sink.

Diode Removal/Replacement

1. Remove defective diode by clipping its leads as close as
possible to diode body.

2. Bend the two remaining leads perpendicular y to the circuit
board.

3. Observing diode polarity, wrap each lead of the new diode
around the corresponding lead on the circuit board.

4. Securely crimp each connection and solder it.

5. Inspect (on the circuit board copper side) the solder joints of
the two "original" leads. If they are not shiny, reheat them and if
necessary, apply additional solder.

Fuse and Conventional Resistor
Removal/Replacement

1. Clip each fuse or resistor lead at top of the circuit board hollow
stake.

2. Securely crimp the leads of replacement component around
notch at stake top.

3. Solder the connections.
CAUTION: Maintain original spacing between the replaced
component and adjacent components and the circuit board to
prevent excessive component temperatures.

Circuit Board Foil Repair

Excessive heat applied to the copper foil of any printed circuit
board will weaken the adhesive that bonds the foil to the circuit
board causing the foil to separate from or "lift-off" the board. The
following guidelines and procedures should be followed whenever
this condition is encountered.

At IC Connections

To repair a defective copper pattern at IC connections use the
following procedure to install a jumper wire on the copper pattern
side of the circuit board. (Use this technique only on IC
connections).

1. Carefully remove the damaged copper pattern with a sharp
knife. (Remove only as much copper as absolutely necessary).

2. carefully scratch away the solder resist and acrylic coating (if
used) from the end of the remaining copper pattern.

3. Bend a small "U" in one end of a small gauge jumper wire and
carefully crimp it around the IC pin. Solder the IC connection.

4. Route the jumper wire along the path of the out-away copper
pattern and let it overlap the previously scraped end of the good
copper pattern. Solder the overlapped area and clip off any
excess jumper wire.

At Other Connections

Use the following technique to repair the defective copper pattern
at connections other than IC Pins. This technique involves the
installation of a jumper wire on the component side of the circuit
board.

1. Remove the defective copper pattern with a sharp knife.
Remove at least 1/4 inch of copper, to ensure that a hazardous
condition will not exist if the jumper wire opens.

2. Trace along the copper pattern from both sides of the pattern
break and locate the nearest component that is directly
connected to the affected copper pattern.

3. Connect insulated 20-gauge jumper wire from the lead of the
nearest component on one side of the pattern break to the lead
of the nearest component on the other side.
Carefully crimp and solder the connections.
CAUTION: Be sure the insulated jumper wire is dressed so the
it does not touch components or sharp edges.

LGE Internal Use OnlyCopyright LG Electronics. Inc. All right reserved.

Only for training and service purposes

1. Application range

This spec sheet is applied all of the 32”,42”,47”,55”,60”, 72”
LCD TV with LT12B/C/D/E/N chassis.

2. Requirement for Test

Each part is tested as below without special appointment.

1) Temperature: 25 ºC ± 5 ºC, CST : 40 ± 5 ºC

2) Relative Humidity: 65 ± 10 %

3) Power Voltage : Standard input voltage(100-240V~, 50/60Hz)
* Standard Voltage of each product is marked by models

4) Specification and performance of each parts are followed

each drawing and specification by part number in
accordance with BOM.

5) The receiver must be operated for about 20 minutes prior to

the adjustment.

3. Test method

1) Performance: LGE TV test method followed

2) Demanded other specification

- Safety : CE, IEC specification

- EMC: CE,IEC

- 6 -

SPECIFICATION

NOTE : Specifications and others are subject to change without notice for improvement.

- 7 -

LGE Internal Use OnlyCopyright LG Electronics. Inc. All right reserved.

Only for training and service purposes

4. General Specification(TV)

No Item Specification Remark

32 wide Color Display Module Resolution: 1920*1080
42 wide Color Display Module Resolution: 1920*1080
47 wide Color Display Module Resolution: 1920*1080
55 wide Color Display Module Resolution: 1920*1080
65 wide Color Display Module Resolution: 1920*1080

1. Display Screen Device

72 wide Color Display Module Resolution: 1920*1080

2. Aspect Rat io 16:9
32" TFT WUXGA LCD
42" TFT WUXGA LCD
47 TFT WUXGA LCD
55 TFT WUXGA LCD

3. LCD Module

42 ALEF
47 ALEF
55 ALEF
65
72 IOL

TFT

Temp. : 0 ~ 40 deg
Humidity : 0 ~ 85%

ALEF

Temp. : 0 ~ 50 deg
Humidity : 20 ~ 90%

4. Operating Environment

IOL

Temp. : 0 ~ 50 deg
Humidity : 20 ~ 90%

TFT

Temp. : -20 ~ 60 deg
Humidity : 10 ~ 90%

ALEF

Temp. : -20 ~ 60 deg
Humidity : 10 ~ 90%

5. Storage Environment

IOL

Temp. : -20 ~ 60 deg
Humidity : 10 ~ 90%

LGE SPEC

6. Input Voltage AC100 ~ 240V, 50/60Hz

32 50 W Normal : LC320EUN-SDV2 [32LV3700-DA]
42 90 W Normal : LC420EUN-SDV3 [42LV3700-DA]

FHD
60Hz
Edge LED

47 90 W Normal : LC470EUE-SDV1 [37LV3700-DA]

100 W Normal : V315H3-LE8 [32LV5500-DD]
60 W Normal : LC320EUD-SDA1 [32LV5500-DD]

32

60 W PG : LC320EUD-S DF1 [32LW5700-DA]
110 W Normal : V420H2-LE6 [42LV5500-DD]
90

100
110

W Normal : LC420EUF-SDA1 [42LV5500-DD]

42

100 W

W
W

PG : LC420EUF-SDF1 [42LW5700-DA]

Normal : LC470EUF-SDA1 [47LV5500-DD]

47

PG : LC470EUF-SDF1 [47LW5700-DA]

FHD
120Hz
Edge LED

55 14 0 W

Normal : LC550EUF-SDA1 [55LV5500-DD]
42 110 W SG : LC420DUC-SDS1 [42LW7700-DA]
47 160 W SG : LC470DUC-SDS1 [47LW7700-DA]

7.

Power Consumption
= LCD(Module) +
Backlight(LED)

FHD
M240Hz
ALEF

55 170 W SG : LC550DUC- SDS1 [55LW7700-DA]
47 30 W SG : LC470DUT-SDA1 Only Cell

FHD
T480Hz
ALEF

55 30 W SG : LC550DUT-SDA1 Only Cell

65

FHD
T480Hz
IOL

72 400 W SG : LC720DUC-SCM1 Only Cell

- 8 -

LGE Internal Use OnlyCopyright LG Electronics. Inc. All right reserved.

Only for training and service purposes

Maker Inch (H)mm x (V)mm x (D)mm Unit: mm

735.4 x 433.0 x 10.8

LC320EUN-SDV2 : Edge Non-3D_60Hz

735.4 x 433.0 x 10.8

LC320EUD-SDA1 : Edge Non-3D_120Hz

32

698.40 x 392.85 x 10.8

LC320EUD-SDF1 : Edge 3D-PG

968.4 x 564 x 10.8

LC420EUN-SDV3: Edge Non-3D_60Hz

968.4 x 564 x 10.8

LC420EUF-SDA1 : Edge Non-3D_120Hz

968.4 x 564 x 10.8

LC420EUF-SDF1 : Edge 3D-PG

42

968.4 x 564 x 12.2

LC420DUC-SDS1 : ALEF 3D-SG M240

1078.6 x 626.0 x 10.8

LC470EUE-SDV1 : Edge Non-3D_6 0Hz

1078.6 x 626.0 x 10.8

LC470EUF-SDA1 : Edge Non-3D_120Hz

1078.6 x 626.0 x 10.8

LC470EUF-SDF1 : Edge 3D-PG

1078.6 x 626.0 x 12.2

LC470DUC-SDS1 : ALEF 3D-SG M240

47

1054.5 x 600.0 x 1.8

LC470DUT-SDA1 : ALEF 3D-SG T480

1255.6 x 726.4 x 19.0

LC550EUF-SDA1 : Edge Non-3D_120Hz

1255.6 x 726.4 x 12.2

LC550DUC- SDS1 : ALEF 3D-SG M240

55

1220.8 x 693.8 x 1.8

LC550DUT-SDA1 : ALEF 3D-SG T480
65

LGD

72 1666.0 x 96 8.0 x 60.0

LC720DUC-SCM1 : IOL 3D-SG

32 735.4 x 433 x 10.8

V315H3-LE8 : Edge Non-3D

Size

CMI

42 968.4 x 564 x 10.8

V420H2-LE6 : Edge Non-3D

Maker Inch mm x mm

mm

LC320EUN-SDV2 : Edge Non-3D_60Hz

LC320EUD-SDA1 : Edge Non-3D_120Hz

8. LCD Module

Pixel Pitch

LGD

32 0.36375 x 0.36375

LC320EUD-SDF1 : Edge 3D-PG

LC420EUN-SDV3: Edge Non-3D_60Hz

LC420EUF-SDA1 : Edge Non-3D_120Hz

LC420EUF-SDF1 : Edge 3D-PG

42

0.4845 x 0.4845
LC420DUC-SDS1 : ALEF 3D-SG M240

LC470EUE-SDV1 : Edge Non-3D_60Hz
LC470EUF-SDA1 : Edge Non-3D_120Hz
LC470EUF-SDF1 : Edge 3D-PG
LC470DUC-SDS1 : ALEF 3D-SG M240

47 0.5415 x 0.5415

LC470DUT-SDA1 : ALEF 3D-SG T480
LC550EUF-SDA1 : Edge Non-3D
LC550DUC- SDS1 : ALEF 3D-SG M240

55 0.630 x 0.630

LC550DUT-SDA1 : ALEF 3D-SG T480

65
72 0.831 x 0.831

LC720DUC-SCM1 : IOL 3D-SG

32 0.12125 x 0.12125

V315H3-LE8 : Edge Non-3D

CMI

42

0.1615 x 0.4845

V420H2-LE6 : Edge Non-3D

32 Ed ge-LED

LC320EUN-SDV2

LC320EUD-SDA1
LC320EUD-SDF1

Edge-LED

LC420EUN-SDV3

LC420EUF-SDA1
LC420EUF-SDF1

42

ALEF

LC420DUC-SDS1

Edge-LED

LC470EUE-SDV1

LC470EUF-SDA1
LC470EUF-SDF1

47

ALEF

LC470DUC-SDS1

LC470DUC-SDS1

Edge-LED

LC550EUF-SDA1

55

ALEF

LC550DUC- SDS1

LC550DUT-SDA1

Back Light LGD

65

- 9 -

LGE Internal Use OnlyCopyright LG Electronics. Inc. All right reserved.

Only for training and service purposes

72 IOL

LC720DUC-SCM1

32 Ed ge-LED

V315H3-LE8

CMI

42 Ed ge-LED

V420H2-LE6

1.06 B (10-bit) Except FHD 60Hz models

Display Colors

16.7 M (8-bit) Only FHD 60Hz models

Coating 3H(Hard coating), Anti-glare

5. Chrominance & Luminance

No Item Min Typ Max Unit Remark

89/89
89/89

Edge : LC320EUN-SDV2
Edge : LC420EUN-SDV3
Edge : LC470EUE-SDV1
Edge : LC320EUD-SDA1
Edge : LC420EUF-SDA1
Edge : LC470EUF-SDA1
Edge : LC550EUF-SDA1
Edge : LC320EUD-SDF1
Edge : LC420EUD-SDF1
Edge : LC470EUF-SDF1
ALEF : LC420DUC-SDS1
ALEF : LC470DUC-SDS1
ALEF : LC550DUC-SDS1
ALEF : LC470DUT-SDA1
ALEF : LC550DUT-SDA1
IOL : LC720DUC-SCM1

1 View angle (R/L, U/D)

88/88
88/88

degree

Edge : V315H3-LE8
Edge : V420H2-LE6

290 360

Edge : LC320EUN-SDV2

Edge : LC420EUN-SDV3
Edge : LC470EUE-SDV1

320 400

Edge : V315H3-LE8

Edge : LC320EUD-SDA1
Edge : LC420EUF-SDA1
Edge : LC470EUF-SDA1
Edge : LC550EUF-SDA1
: FHD 120Hz Edge LED
Edge : LC320EUD-SDF1
Edge : LC420EUF-SDF1
Edge : LC470EUF-SDF1
: FHD 120Hz Patterned Edge LED

2

Luminance
(W/O PC mode)

360 450

cd/m

ALEF : LC420DUC-SDS1

ALEF : LC470DUC-SDS1
ALEF : LC550DUC-SDS1
: FHD M240Hz ALEF LED

- 10 -

LGE Internal Use OnlyCopyright LG Electronics. Inc. All right reserved.

Only for training and service purposes

350 450

Edge : V420H2-LE6
: FHD 120Hz Edge LED

360 450

ALEF : LC470DUT-SDA1
ALEF : LC550DUT-SDA1
: FHD T480Hz ALEF LED

400 500

IOL : LC720DU C-SCM1
: FHD T480Hz IOL LED

1000:1 1400:1

Edge : LC320EUN-SDV2
Edge : LC420EUN-SDV3
Edge : LC470EUE-SDV1

3500:1 5000:1 Edge : V315H3-LE8

4200:1 6000:1 Edge : V420H2-LE6

1100:1 1600:1

Edge : LC320EUD-SDA1
Edge : LC420EUF-SDA1
Edge : LC470EUF-SDA1
Edge : LC550EUF-SDA1
Edge : LC320EUD-SDF1
Edge : LC420EUF-SDF1
Edge : LC470EUF-SDF1

900:1 1300:1

ALEF : LC420DUC-SDS1

ALEF : LC470DUC-SDS1
ALEF : LC550DUC-SDS1

900:1 1300:1

ALEF : LC470DUT-SDA1

ALEF : LC550DUT-SDA1

3

Module Contrast Ratio

1000:1 1200:1 IOL : LC720DUC-SCM1

X

0.279

White

Y

0.292

X

0.637

Red

Y

0.341

X

0.320

Green

Y

0.606

X

0.152

Blue

Y

Typ.

-0.03

0.055

Typ.

+0.03

Edge : LC320EUN-SDV2

X

0.279

4 CIE

Color Coordinates

White

Y

0.292

Typ. Edge : LC420EUN-SDV3

X

0.637

Red

Y

0.341

X

0.325

Green

Y

0.600

X

0.152

Blue

Y

Typ.

-0.03

0.051

+0.03

X

0.279

White

Y

0.292

X

0.639

Red

Y

0.343

X

0.316

Green

Y

0.595

X

0.152

Blue

Y

Typ.

-0.03

0.058

Typ.

+0.03

Edge : LC470EUE-SDV1

X

0.280

White

Y

0.290

X

0.635

Red

Y

0.323

X

0.288

Green

Y

0.600

X

0.148

Blue

Y

Typ.

-0.03

0.050

Typ.

+0.03

Edge : V315H3-LE8

X

0.279

White

Y

0.292

X

0.649

Red

Y

0.333

X

0.301

Green

Y

0.609

X

0.152

Blue

Y

Typ.

-0.03

0.060

Typ.

+0.03

Edge : LC320EUD-SDA1

- 11 -

LGE Internal Use OnlyCopyright LG Electronics. Inc. All right reserved.

Only for training and service purposes

Y
X

X

0.280

White

0.290

0.644

Red

Y

Typ.

-0.03

0.331

Typ.

+0.03

Edge : V420H2-LE6

0.297

Green

0.618

0.147

Blue

0.054

X

0.279

White

Y

0.292

X

0.644

Red

Y

X
Y
X
Y

0.333

X

0.306

Green

Y

0.604

X

0.150

Blue

Y

Typ.

-0.03

0.058

Typ.

+0.03

Edge : LC420EUF-SDA1

X

0.279

White

Y

0.292

X

0.648

Red

Y

0.333

X

0.308

Green

Y

0.600

X

0.149

Blue

Y

Typ.

-0.03

0.059

Typ.

+0.03

Edge : LC470EUF-SDA1

X

X

X

X

0.279

White

Y

0.292

0.649

Red

Y

0.332

0.307

Green

Y

Y

0.595

0.149

Blue

Y

Typ.

-0.03

0.059

Typ.

+0.03

Edge : LC550EUF-SDA1

X

0.279

White

0.292

X

0.648

Red

Y

0.334

X

0.307

Green

Y

Typ.

-0.03

0.606

Typ.

+0.03

Edge : LC320EUD-SDF1

X

0.152

Blue

Y

Y

0.058

X

0.279

White

0.292

X

0.650

Red

Y

0.333

X

0.307

Green

Y

0.604

X

0.150

Blue

Y

Y

Typ.

-0.03

0.059

Typ.

+0.03

Edge : LC420EUF-SDF1

X

0.279

White

0.292

X

0.648

Red

Y

0.332

X

0.306

Green

Y

0.606

X

0.150

Blue

Y

Typ.

-0.03

0.058

Typ.

+0.03

Edge : LC470EUF-SDF1

X

White

Y
X

Red

Y
X

Green

Y
X

Blue

Y

Typ.

-0.03

Typ.

+0.03

ALEF : LC420DUC-SDS1

Y
X

X

0.280

White

0.290

0.644

Red

Y

Typ.

-0.03

0.331

Typ.

+0.03

Edge : V420H2-LE6

0.297

Green

0.618

0.147

Blue

0.054

X

0.279

White

Y

0.292

X

0.644

Red

Y

X
Y
X
Y

0.333

X

0.306

Green

Y

0.604

X

0.150

Blue

Y

Typ.

-0.03

0.058

Typ.

+0.03

Edge : LC420EUF-SDA1

X

0.279

White

Y

0.292

X

0.648

Red

Y

0.333

X

0.308

Green

Y

0.600

X

0.149

Blue

Y

Typ.

-0.03

0.059

Typ.

+0.03

Edge : LC470EUF-SDA1

X

X

X

X

0.279

White

Y

0.292

0.649

Red

Y

0.332

0.307

Green

Y

Y

0.595

0.149

Blue

Y

Typ.

-0.03

0.059

Typ.

+0.03

Edge : LC550EUF-SDA1

X

0.279

White

0.292

X

0.648

Red

Y

0.334

X

0.307

Green

Y

Typ.

-0.03

0.606

Typ.

+0.03

Edge : LC320EUD-SDF1

X

0.152

Blue

Y

Y

0.058

X

0.279

White

0.292

X

0.650

Red

Y

0.333

X

0.307

Green

Y

0.604

X

0.150

Blue

Y

Y

Typ.

-0.03

0.059

Typ.

+0.03

Edge : LC420EUF-SDF1

X

0.279

White

0.292

X

0.648

Red

Y

0.332

X

0.306

Green

Y

0.606

X

0.150

Blue

Y

Typ.

-0.03

0.058

Typ.

+0.03

Edge : LC470EUF-SDF1

X

White

Y
X

Red

Y
X

Green

Y
X

Blue

Y

Typ.

-0.03

Typ.

+0.03

ALEF : LC420DUC-SDS1

- 12 -

LGE Internal Use OnlyCopyright LG Electronics. Inc. All right reserved.

Only for training and service purposes

Y

X

Y

X

Y

X

X

0.279

White

0.292

0.644

Red

0.333

0.308

Green

0.605

0.149

Blue

Y

Typ.

-0.03

0.059

Typ.

+0.03

ALEF : LC470DUC-SDS1

X

0.279

White

Y 0.292
X 0.644

Red

Y 0.333
X 0.308

Green

Y 0.605
X 0.149

Blue

Y

Typ.

-0.03

0.059

Typ.

+0.03

ALEF : LC550DUC-SDS1

X 0.280

White

Y 0.290
X

0.651

Red

Y

0.334

X

0.312

Green

Y

0.598

X

0.150

Blue

Y

Typ.

-0.03

0.068

Typ.

+0.03

ALEF : LC470DUT-SDA1

X 0.279

White

Y 0.292
X 0.642

Red

Y 0.333
X 0.307

Green

Y 0.606
X 0.149

Blue

Y

Typ.

-0.03

0.068

Typ.

+0.03

ALEF : LC550DUT-SDA1

X 0.279

White

Y 0.292
X 0.646

Red

Y 0.330
X 0.303

Green

Y 0.640
X 0.152

Blue

Y

Typ.

-0.03

0.059

Typ.

+0.03

IOL : LC720DUC-SCM1

- 13 -

LGE Internal Use OnlyCopyright LG Electronics. Inc. All right reserved.

Only for training and service purposes

5 8

Edge : LC320EUD-SDA1

Edge : LC370EUD-SDA1
Edge : LC420EUF-SDA1
Edge : LC470EUF-SDA1
Edge : LC320EUD-SDP1
Edge : LC420EUD-SDP1
Edge : LC470EUF-SDP1
Edge : LC550EUF-SDP1
ALEF : LC420DUC-SDS1
ALEF : LC470DUC-SDS1
ALEF : LC550DUC-SDS1
ALEF : LC470DUT-SDA1
ALEF : LC550DUT-SDA1
IOL : LC720DUC-SCM1

8. 5 Edge : V315H3-LE8
6 12 Edge : V420H2-LE6

Gray to Gray

6 9

Edge : LC320EUN-SDV2
Edge : LC420EUN-SDV3
Edge : LC470EUE-SDV1

8 12

Edge : V315H3-LE8
Edge : LC320EUD-SDA1
Edge : LC370EUD-SDA1
Edge : LC420EUF-SDA1
Edge : LC470EUF-SDA1

8 12

Edge : LC320EUD-SDF1
Edge : LC420EUF-SDF1
Edge : LC470EUF-SDF1

8 12

ALEF : LC420DUC-SDS1
ALEF : LC470DUC-SDS1
ALEF : LC550DUC-SDS1

8 12

ALEF : LC470DUT-SDA1
ALEF : LC550DUT-SDA1

5 Response time

MPRT

8 12

ms

IOL : LC720DUC-SCM1

14 18 %

Edge : LC320EUD-SDF1
Edge : LC420EUF-SDF1
Edge : LC470EUF-SDF1

14 18 %

ALEF : LC420DUC-SDS1
ALEF : LC470DUC-SDS1
ALEF : LC550DUC-SDS1

14 18 %

ALEF : LC470DUT-SDA1
ALEF : LC550DUT-SDA1

5 3D Crosstalk

14 18 %

IOL : LC720DUC-SCM1

- 14 -

LGE Internal Use OnlyCopyright LG Electronics. Inc. All right reserved.

Only for training and service purposes

6. Component Video Input (Y, CB/PB, CR/PR)

No Resolution H-freq(kHz) V-freq.(kHz) Pixel clock Proposed

1. 720*480 15.73 60 13.5135 SDTV ,DVD 480I

2. 720*480 15.73 59.94 13.5 SDTV ,DVD 480I

3. 720*480 31.50 60 27.027 SDTV 480P

4. 720*480 31.47 59.94 27.0 SDTV 480P

5. 720*576 15.625 50* 13.5 SDTV 576I

6. 720*576 31.25 50* 13.5 SDTV 576P

7. 1280*720 37.5 50* 74.25 HDTV 720P

8. 1280*720 45.00 60.00 74.25 HDTV 720P

9. 1280*720 44.96 59.94 74.176 HDTV 720P

10. 1929*1080 28.125 50* 74.25 HDTV 1080I

11. 1920*1080 33.75 60.00 74.25 HDTV 1080I

12. 1920*1080 33.72 59.94 74.176 HDTV 1080I

13. 1920*1080 56.25 50* 148.5 HDTV 1080P

14. 1920*1080 67.500 60 148.50 HDTV 1080P

15. 1920*1080 67.432 59.94 148.352 HDTV 1080P

16. 1920*1080 27.000 24.000 74.25 HDTV 1080P

17. 1920*1080 26.97 23.976 74.176 HDTV 1080P

18. 1920*1080 33.75 30.000 74.25 HDTV 1080P

19. 1920*1080 33.71 29.97 740176 HDTV 1080P

7. RGB Input (PC)

No Resolution H-freq(kHz) V-freq.(kHz) Pixel clock Proposed

PC

1. 640*350 31.468 70.09 25.17 EGA

2. 720*400 31.469 70.08 28.32 DOS

3. 640*480 31.469 59.94 25.17 VESA(VGA)

4. 800*600 37.879 60.31 40.00 VESA(SVGA)

5. 1024*768 48.363 60.00 65.00 VESA(XGA)

6. 1360*768 47.712 60.015 85.50 VESA(WXGA)

7. 1920*1080 66.587 59.94 138.50 WUXGA (Reduced Blanking)

LGE Internal Use OnlyCopyright LG Electronics. Inc. All right reserved.

Only for training and service purposes

- 15 -

8. HDMI input (PC/DTV)

No Resolution H-freq(kHz) V-freq.(kHz) Pixel clock Proposed

PC DDC

1. 640*350 31.468 70.09 25.17 EGA X

2. 720*400 31.469 70.08 28.32 DOS O

3. 640*480 31.469 59.94 25.17 VESA(VGA) O

4. 800*600 37.879 60.31 40.00 VESA(SVGA) O

5. 1024*768 48.363 60.00 65.00 VESA(XGA) O

6. 1280*768 47.776 59.870 79.5 CVT(WXGA) O

7. 1360*768 47.712 60.015 85.50 VESA (WXGA) O

8. 1280*1024 63.981 60.020 108.00 VESA (SXGA) O

9. 1600*1200 75.00 60.00 162 VESA (UXGA) O

10. 1920*1080 67.500 60.000 148.50 HDTV 1080P O

DTV
1 720*480 31.50 60 27.027 SDTV 480P
2 720*480 31.47 59.94 27.00 SDTV 480P
3 720*576 31.25 50* 13.5 SDTV 576P
4 1280*720 37.5 50* 74.25 HDTV 720P
5 1280*720 45.00 60.00 74.25 HDTV 720P
6 1280*720 44.96 59.94 74.176 HDTV 720P
7 1929*1080 28.125 50* 74.25 HDTV 1080I
8 1920*1080 33.75 60.00 74.25 HDTV 1080I
9 1920*1080 33.72 59.94 74.176 HDTV 1080I

10 1920*1080 56.25 50* 148.5 HDTV 1080P
11 1920*1080 67.500 60 148.50 HDTV 1080P
12 1920*1080 67.432 59.939 148.352 HDTV 1080P
13 1920*1080 27.000 24.000 74.25 HDTV 1080P
14 1920*1080 26.97 23.976 74.176 HDTV 1080P
15 1920*1080 33.75 30.000 74.25 HDTV 1080P
16 1920*1080 33.71 29.97 74.176 HDTV 1080P

(* Except Brazil)

• HDMI Monitor Range Limits

Min Vertical Freq - 56 Hz
Max Vertical Freq - 62 Hz
Min Horiz. Freq - 30 kHz
Max Horiz. Freq - 80 kHz
Pixel Clock - 170 MHz

- 16 -

LGE Internal Use OnlyCopyright LG Electronics. Inc. All right reserved.

Only for training and service purposes

* Only 3DTV

9. HDMI Input(1.4a)

10. HDMI Input(1.3a)

No Resolution H-freq(kHz) V-freq.(kHz) Pixel clock Proposed 3D input proposed mode

1 1920*1080 53.95 / 54 23.98 / 24 148.35/148.5 HDTV 1080P Frame packing
2 1280*720 89.9 / 90 59.94/60 148.35/148.5 HDTV 720P Frame packing
3 1280*720 75 50 148.5 HDTV 720P Frame packing
4 1920*1080 67.5 60 148.5 HDTV 1080P Side by Side(half), Top and bottom
5 1920*1080 56.250 50 148.5 HDTV 1080P Side by Side(half), Top and bottom,
6 1280*720 45 60 74.25 HDTV 720P Side by Side(half), Top and Bottom
7 1280*720 37.5 50 74.25 HDTV 720P Side by Side(half), Top and Bottom
8 1920*1080 33.75 60 74.25 HDTV 1080i Side by Side(half), Top and Bottom
9 1920*1080 28.125 50 74.25 HDTV 1080i Side by Side(half), Top and Bottom

10 1920*1080 27 24 74.25 HDTV 1080P Side by Side(half), Top and Bottom
11 1920*1080 33.75 30 89.1 HDTV 1080P Side by Side(half), Top and Bottom

No Resolution H-freq(kHz) V-freq.(kHz) Pixel clock Proposed 3D input proposed mode

1 1280*720 45.00 60.00 74.25 HDTV 720P Side by Side, Top & Bottom
2 1280*720 37.500 50 74.25 HDTV 720P Side by Side, Top & Bottom
3 1920*1080 33.75 60.00 74.25 HDTV 1080I Side by Side, Top & Bottom
4 1920*1080 28.125 50.00 74.25 HDTV 1080I Side by Side, Top & Bottom
5 1920*1080 27.00 24.00 74.25 HDTV 1080P Side by Side, Top & Bottom, Checkerboard
6 1920*1080 33.75 30.00 74.25 HDTV 1080P Side by Side, Top & Bottom, Checkerboard
7 1920*1080 67.50 60.00 148.5 HDTV 1080P Side by Side, Top & Bottom, Checkerboard

Single Frame Sequential

8 1920*1080 56.250 50 148.5 HDTV 1080P Side by Side, Top & Bottom, Checkerboard

Single Frame Sequential

- 17 -

LGE Internal Use OnlyCopyright LG Electronics. Inc. All right reserved.

Only for training and service purposes

11. Wireless Input(1.3)

12. RGB input 3D(PC)

No Resolution H-freq(kHz) V-freq.(kHz) Pixel clock Proposed 3D input proposed mode

1 1280*720 45.00 60.00 74.25 HDTV 720P Side by Side, Top & Bottom
2 1280*720 37.500 50 74.25 HDTV 720P Side by Side, Top & Bottom
3 1920*1080 33.75 60.00 74.25 HDTV 1080I Side by Side, Top & Bottom
4 1920*1080 28.125 50.00 74.25 HDTV 1080I Side by Side, Top & Bottom
5 1920*1080 27.00 24.00 74.25 HDTV 1080P Side by Side, Top & Bottom, Checkerboard
6 1920*1080 33.75 30.00 74.25 HDTV 1080P Side by Side, Top & Bottom, Checkerboard
7 1920*1080 67.50 60.00 148.5 HDTV 1080P Side by Side, Top & Bottom, Checkerboard

Single Frame Sequential

8 1920*1080 56.250 50 148.5 HDTV 1080P Side by Side, Top & Bottom, Checkerboard

Single Frame Sequential

No Resolution H-freq(kHz) V-freq.(kHz) Pixel clock Proposed

PC DDC

1. 1920*1080 67.50 60.00 148.5 WUXGA (Reduced Blanking) (Side by Side), Top and Bottom

O

LGE Internal Use OnlyCopyright LG Electronics. Inc. All right reserved.

Only for training and service purposes

- 18 -

ADJUSTMENT INSTRUCTION

1. Application Range

This specification sheet is applied all of the LT12C/D/E/F/N
LCD TV models, which produced in manufacture department
or similar LG TV factory

2. Notice

(1) Because this is not a hot chassis, it is not necessary to use

an isolation transformer. However, the use of isolation

transformer will help protect test instrument.
(2) Adjustment must be done in the correct order.
(3) The adjustment must be performed in the circumstance of

25 ºC ± 5 ºC of temperature and 65 % ± 10 % of relative
humidity if there is no specific designation.

(4) The input voltage of the receiver must keep AC 100-220

V~ 50 / 60Hz.
(5) Before adjustment, execute Heat-Run for 5 minutes.

A After Receive 100% Full white pattern (06CH) then

process Heat-run

(or “8. Test pattern” condition of Ez-Adjust status)

A How to make set white pattern

1) Press Power ON button of Service Remocon

2) Press ADJ button of Service remocon. Select “8. Test
pattern” and, after select “White” using navigation
button, and then you can see 100% Full White pattern.

* In this status you can maintain Heat-Run useless any

pattern generator

* Notice: if you maintain one picture over 20 minutes

(Especially sharp distinction black with white
pattern – 13Ch, or Cross hatch pattern – 09Ch)
then it can appear image stick near black level.

3. Adjustment Items

3.1. PCB Assembly Adjustment

A MAC Address Download
A Adjust 480i Comp1

A Adjust 1080p Comp1/RGB

• If it is necessary, it can adjustment at Manufacture Line

• You can see set adjustment status at “1. ADJUST
CHECK” of the “In-start menu”

A EDID (The Extended Display Identification Data)/DDC

(Display Data Channel) download

3.2. Set Assembly Adjustment

A Color Temperature (White Balance) Adjustment
A Using RS-232C
A PING Test
A Selection Factory output option

4. PCB Assembly Adjustment

4.1. MAC Address

4.1.1. Equipment & Condition

• Play file: Serial.exe

• MAC Address edit

• Input Start / End MAC address

4.1.2 Download method

4.1.2.1 Communication Prot connection

Connect: PCBA Jig-> RS-232C Port== PC-> RS-232C Port

4.1.2.2 MAC Address Download

• Com 1,2,3,4 and 115200(Baudrate)

• Port connection button click(1)

• Load button click(2) for MAC Address write.

• Start MAC Address write button(3)

• Check the OK Or NG

4.1.3 Equipment & Condition

• Each other connection to LAN Port of IP Hub and Jig

PCBA

PC(RS-232C)

RS-23 2C Po r t

- 19 -

LGE Internal Use OnlyCopyright LG Electronics. Inc. All right reserved.

Only for training and service purposes

4.1.4 LAN inspection solution

• LAN Port connection with PCB

• Network setting at MENU Mode of TV

• Setting automatic IP

• Setting state confirmation

- If automatic setting is finished, you confirm IP and MAC
Address.

4.1.5 LAN Port Inspection (PING Test)

4.1.5.1 Equipment setting

1) Play the LAN Port Test PROGRAM.

2) Input IP set up for an inspection to Test Program.

*IP Number : 12.12.2.2

4.1.6 LAN Port Inspection (PING Test)

1) Play the LAN Port Test Program.

2) connect each other LAN Port Jack.

3) Play Test (F9) button and confirm OK Message.

4) remove LAN CABLE

4.2. Using RS-232C

Adjust 3 items at 3.1 PCB assembly adjustments “adjustment
sequence” one after the order.

A Adjustment protocol

See ADC Adjustment RS232C Protocol_Ver1.0

A Necessary items before Adjustment items

• Pattern Generator : (MSPG-925FA)

•Adjust 480i Comp1 (MSPG-925FA:model :209 , pattern
:65) – Comp1 Mode

• Adjust 1080p Comp1 (MSPG-925FA:model :225 ,

pattern :65) – Comp1 Mode

• Adjust RGB (MSPG-925FA:model :225 , Pattern :65) –

RGB-PC Mode

* If you want more information then see the below

Adjustment method (Factory Adjustment)

A Adjustment sequence

• aa 00 00: Enter the ADC Adjustment mode.

• xb 00 40: Change the mode to Component1 (No actions)

• ad 00 10: Adjust 480i Comp

• ad 00 10: Adjust 1080p Comp

• xb 00 60: Change to RGB-PC mode(No action)

• ad 00 10: Adjust 1080p RGB

• xb 00 90: Endo of Adjustmennt

- 20 -

LGE Internal Use OnlyCopyright LG Electronics. Inc. All right reserved.

Only for training and service purposes

5 Factory Adjustment

5.1 Manual Adjust Component 480i/1080p
RGB 1080p

A Summary : Adjustment component 480i/1080i and RGB

1080p is Gain and Black level setting at Analog to Digital
converter, and compensate the RGB deviation

A Using instrument

• Adjustment remocon, 801GF(802B, 802F, 802R) or
MSPG925FA pattern generator (It can output 480i/1080i
horizontal 100% color bar pattern signal, and its output
level must setting 0.7V±0.1V p-p correctly)

<Pic.4 Adjustment pattern : 480i / 1080p 60Hz Pattern >

A You must make it sure its resolution and pattern cause

every instrument can have different setting

A Adjustment method 480i Comp1, Adjust 1080p Comp1/RGB

(Factory adjustment)

• ADC 480i Component1 adjustment

- Check connection of Component1

- MSPG-925FA -> Model: 209, Pattern 65

• Set Component 480i mode and 100% Horizontal Color
Bar Pattern(HozTV31Bar), then set TV set to
Component1 mode and its screen to “NORMAL”

• ADC 1080p Component1 / RGB adjustment

- Check connection both of Component1 and RGB

- MSPG-925FA -> Model: 225, Pattern 65

• Set Component 1080p mode and 100% Horizontal Color
Bar Pattern(HozTV31Bar), then set TV set to
Component1 mode and its screen to “NORMAL”

• After get each the signal, wait more a second and enter
the “IN-START” with press IN-START key of Service
remocon. After then select “7. External ADC” with
navigator button and press “Enter”.

• After Then Press key of Service remocon “Right
Arrow(VOL+)”

• You can see “ADC Component1 Success”

• Component1 1080p, RGB 1080p Adjust is same method.

• Component 1080p Adjustment in Component1 input

mode

• RGB 1080p adjustment in RGB input mode

• If you success RGB 1080p Adjust. You can see “ADC
RGB-DTV Success”

5.2 EDID (The Extended Display
Identification Data) / DDC (Display Data
Channel) Download.

A Summary

• It is established in VESA, for communication between PC
and Monitor without order from user for building user
condition. It helps to make easily use realize “Plug and
Play” function.

• For EDID data write, we use DDC2B protocol.

A Auto Download

• After enter Service Mode by pushing “ADJ” key,

• Enter EDID D/L mode.

• Enter “START” by pushing “OK” key.

=> Caution : - Never connect HDMI & D-sub Cable when

the user downloading .

- Use the proper cables below for EDID
Writing.

§ Edid data and Model option download (RS232)

- 21 -

LGE Internal Use OnlyCopyright LG Electronics. Inc. All right reserved.

Only for training and service purposes

5.2.1 Manual Download

A Write HDMI EDID data

• Using instruments

- Jig. (PC Serial to D-Sub connection) for PC, DDC
adjustment.

- S/W for DDC recording (EDID data write and read)

- D-sub jack

- Additional HDMI cable connection Jig.

• Preparing and setting.

- Set instruments and Jig. Like pic.5), then turn on PC and
Jig.

- Operate DDC write S/W (EDID write & read)

- It will operate in the DOS mode.

Pic.3) For write EDID data, setting Jig and another instruments.
See Working Guide if you want more information about EDID
communication.

• EDID data for Non 3DTV (Model name = LG TV )

- HDMI EDID table (0x1E : Physical Address)

1) HDMI 1 Check sum : 0x7F, 0xD9 (CEA Block 0x1E :10)

2) HDMI 2 Check sum : 0x7F, 0xC9 (CEA Block 0x1E :20)

3) HDMI 3 Check sum : 0x7F, 0xB9 (CEA Block 0x1E :30)

4) HDMI 4 Check sum : 0x7F, 0xA9 (CEA Block 0x1E :40)

- Analog (RGB) EDID table

1) RGB CheckSum : 1C

• EDID data for 3DTV ( Model name = LG TV )

- HDMI EDID table (0x1E : Physical Address)

1) HDMI 1 Check sum : 0x7F, 0xCB (CEA Block 0x1E :10)

2) HDMI 2 Check sum : 0x7F, 0xBB (CEA Block 0x1E :20)

3) HDMI 3 Check sum : 0x7F, 0xAB (CEA Block 0x1E :30)

4) HDMI 4 Check sum : 0x7F, 0x9B (CEA Block 0x1E :40)

- Analog (RGB) EDID table

1) CheckSum : 1C

PC

VSC

B/D

- 22 -

LGE Internal Use OnlyCopyright LG Electronics. Inc. All right reserved.

Only for training and service purposes

5.3 Adjustment Color Temperature (White

balance)

A Using Instruments

• Color Analyzer: CA-210 (CH 9)

- Using LCD color temperature, Color Analyzer (CA-210)
must use CH 9, which Matrix compensated (White, Red,
Green, Blue compensation) with CS-2100. See the
Coordination bellowed one.

• Auto-adjustment Equipment (It needs when Auto­adjustment – It is availed communicate with RS-232C :
Baud rate: 115200)

• Video Signal Generator MSPG-925F 720p, 216Gray
(Model: 217, Pattern 78)

A Connection Diagram (Auto Adjustment)

• Using Inner Pattern

• Using HDMI input

<Pic.5 Connection Diagram for Adjustment White balance>

A White Balance Adjustment

If you can’t adjust with inner pattern, then you can adjust it
using HDMI pattern. You can select option at “Ez-Adjust
Menu – 7. White Balance” there items “NONE, INNER,
HDMI”. It is normally setting at inner basically. If you can’t
adjust using inner pattern you can select HDMI item, and
you can adjust.

In manual Adjust case, if you press ADJ button of service
remocon, and enter “Ez-Adjust Menu – 7. White Balance”,
then automatically inner pattern operates. (In case of

“Inner” originally “Test-Pattern. On” will be selected in The
“Test-Pattern. On/Off”.

• Connect all cables and equipments like Pic.5)

• Set Baud Rate of RS-232C to 115200. It may set 115200

orignally.

• Connect RS-232C cable to set

• Connect HDMI cable to set

A RS-232C Command (Commonly apply)

• “wb 00 00”: Start Auto-adjustment of white balance.

• “wb 00 10”: Start Gain Adjustment (Inner pattern)

• “jb 00 c0” :

• …

• “wb 00 1f”: End of Adjustment

* If it needs, offset adjustment (wb 00 20-start, wb 00 2f-

end)

• “wb 00 ff”: End of white balance adjustment (inner pattern
disappear)

CA-100+

COL OR
ANALYZER
TYPE; CA-100+

Full W hite Pattern

RS-232C

-- 23 -

LGE Internal Use OnlyCopyright LG Electronics. Inc. All right reserved.

Only for training and service purposes

O Notice) Adjustment Mapping information

• When Color temperature (White balance) Adjustment
(Automatically)

- Press “Power only key” of service remocon and operate
automatically adjustment.

- Set BaudRate to 115200.

• If it needs, then adjustment “Offset”.

A White Balance Adjustment (Manual adjustment)

• Test Equipment: CA-210

- Using LCD color temperature, Color Analyzer (CA-210)
must use CH 9, which Matrix compensated (White, Red,
Green, Blue compensation) with CS-2100. See the
Coordination bellowed one.

• Manual adjustment sequence is like bellowed one.

- Turn to “Ez-Adjust” mode with press ADJ button of
service remocon.

- Select “10.Test Pattern” with CH+/- button and press
enter. Then set will go on Heat-run mode. Over 30
minutes set let on Heat-run mode.

- Let CA-210 to zero calibration and must has gap more
10cm from center of LCD module when adjustment.

- Press “ADJ” button of service remocon and select
“7.White-Balance” in “Ez-Adjust” then press “

G ” button

of navigation key.

(When press “

G ” button then set will go to full white

mode)

- Adjust at three mode (Cool, Medium, Warm)

- If “cool” mode
Let B-Gain to 192 and R, G, B-Cut to 64 and then
control R, G gain adjustment High Light adjustment.

- If “Medium” and “Warm” mode
Let R-Gain to 192 and R, G, B-Cut to 64 and then
control G, B gain adjustment High Light adjustment.

- All of the three mode
Let R-Gain to 192 and R, G, B-Cut to 64 and then
control G, B gain adjustment High Light adjustment.

- With volume button (+/-) you can adjust.

- After all adjustment finished, with Enter (A key) turn to
Ez-Adjust mode. Then with ADJ button, exit from
adjustment mode

Attachment: White Balance adjustment coordination and

color temperature.

• Using CS-1000 Equipment.

- COOL : T=11000K, ∆uv=0.000, x=0.276 y=0.283

- MEDIUM : T=9300K, ∆uv=0.000, x=0.285 y=0.293

- WARM : T=6500K, ∆uv=0.000, x=0.313 y=0.329

• Using CA-210 Equipment. (9 CH)

- Contrast value: 216 Gray

• Using CA-210 Equipment. (14 CH)

- White Balance adjustment coordination and color
temperature for Edge / IOP LED, ALEF

-White Balance adjustment table for Edge (IOP) LED

Color coordination is different according to heat run time.
LGD IOP LED, LGD EDGE LED, LGD 3D EDGE LED
(for LV5500, LW5700)

White Balance adjustment table for ALEF Model
(LW9500)

White Balance adjustment table for IOL LED MODEL
(LZ9700)

Color Coordination

Color temperature Test Equipment

x y

COOL

CA-210
CA-210

CA-210

0.269±0.002 0.273±0.002

MEDIUM

0.285±0.002 0.293±0.002

WARM

0.313±0.002 0.329±0.002

Cool 13,000k

K

o

X=0.269 (±0.002)
Y=0.273 (±0.002)

Medium 9,300k

K

X=0.285 (±0.002)
Y=0.293 (±0.002)

Color

Temperature

Warm 6,500k

K

X=0.313 (±0.002)
Y=0.329 (±0.002)

<Test Signal>

Inner pattern

(216gray,85IRE)

o

o

Aging time Cool Medium Warm

(Min) x y x y x y

GP3

269 273 285 293 313 329

1 0-2

3-5
6-9

10-19

279 308
2 278 306
3 277 305
4 276 303
5 20-35 274 300
6 36-49 272 297
7 50-79 271 295
8 80-149 270 294
9 Over 150 269

288
286
285
283
280
277
275
274
273

295
294
293
292
290
288
287
286
285

319
318
317
316
314
312
311
310
309

338
336
335
333
330
327
325
324
323293

Aging time Cool Medium Warm

(Min) x y x y x y

GP3

269 273 285 293 313 329
1 0-2

3-5
6-9

10-19

282 314
2 281 312
3 280 311
4 279 309
5 20-35 277 304
6 36-49 274 299
7 50-79 271 297
8 80-149 270 294
9 Over 150 269

294
292
291
289
284
279
277
274
273

298
297
296
295
293
290
287
286
285

322
321
320
319
317
314
311
310
309

343
341
340
338
333
328
326
323
322293

Aging time Cool Medium Warm

(Min) x y x y x y

GP3

269 273 285 293 313 329

1 0-2

3-5
6-9

10-19

278 307
2 277 305
3 276 304
4 274 302
5 20-35 272 298
6 36-49 270 295
7 50-79 269 293
8 Over80 269 293

288
286
284
282
278
275
273
273

295
294
293
291
289
287
285
285

316
315
314
313
311
309
308
308

334
332
331
329
325
322
323
323

- 24 -

LGE Internal Use OnlyCopyright LG Electronics. Inc. All right reserved.

Only for training and service purposes

5.4 EYE-Q function check

1) Turn on TV

2) Press EYE key of Adj. R/C

3) Cover the Eye Q II sensor on the front of the using your
hand and wait for 6 seconds

4) Confirm that R/G/B value is lower than 10 of the “Raw Data
(Sensor data, Back lignt )” . If after 6 seconds, R/G/B value
is not lower than 10, replace Eye Q II sensor

5) Remove your hand from the Eye Q II sensor and wait for 6
seconds

6) Confirm that “ok” pop up.
If change is not seen, replace Eye Q II sensor

5.5 HDCP (High-Bandwidth Digital
Contents Protection) Setting

• No Need.

5.6 Test of RS-232C control.

Press In-Start button of Service Remocon then set the
“4.Baud Rate” to 115200. Then check RS-232C control and

5.7 Selection of Country option.

Selection of country option is allowed only North American
model (Not allowed Korean model). It is selection of Country
about Rating and Time Zone.

Models: All models which use LA75A Chassis (See the first
page.)
Press “In-Start” button of Service Remocon, then enter the
“Option” Menu with “PIP CH-“ Button
Select one of these three (USA, CANADA, MEXICO) defends
on its market using “Vol. +/-“button.

* Caution : Don’t push The INSTOP KEY after completing

the function inspection.

6. GND and ESD Testing

6.1 Prepare GND and ESD Testing.

A Check the connection between set and power cord

6.2 Operate GND and ESD auto-test.

A Fully connected (Between set and power cord) set enter the

Auto-test sequence.

A Connect D-Jack AV jack test equipment.
A Turn on Auto-controller(GWS103-4)
A Start Auto GND test.
A If its result is NG, then notice with buzzer.
A If its result is OK, then automatically it turns to ESD Test.
A Operate ESD test
A If its result is NG, then notice with buzzer.
A If its result is OK, then process next steps. Notice it with

Good lamp and STOPER Down.Check Items.

A Test Voltage

• GND: 1.5KV/min at 100mA

• Signal: 3KV/min at 100mA

A Test time: just 1 second.
A Test point

• GND test: Test between Power cord GND and Signal
cable metal GND.

• ESD test: Test between Power cord GND and Live and

neutral.

A Leakage current: Set to 0.5mA(rms)

7. Preset Ch information.

In case of POWER ONLY, System color is operated multi
system
In case of IN STOP, System color is operated default system
(PAN-M)

- 25 -

LGE Internal Use OnlyCopyright LG Electronics. Inc. All right reserved.

Only for training and service purposes

8. Default Service option.

8.1 ADC-Set.

A R-Gain adjustment Value (default 128)
A G-Gain adjustment Value (default 128)
A B-Gain adjustment Value (default 128)
A R-Offset adjustment Value (default 128)
A G-Offset adjustment Value (default 128)
A B-Offset adjustment Value (default 128)

8.2 White balance. Value.

9. USB DOWNLOAD (*.epk file
download)

9.1 Put the USB Stick to the USB socket

9.2 Press Menu key, and move OPTION

9.3 Press “FAV” Press 7 times.

9.4 Select download file (epk file)

9.5 After download is finished, remove the

USB stick.

9.6 Press “IN-START” key of ADJ remote

control, check the S/W version.

LGE Internal Use OnlyCopyright LG Electronics. Inc. All right reserved.

Only for training and service purposes

- 26 -

300

200

530

540

521

400

710

810

910

900

120

510

511

¿˝¿¸∏µ ø‹∫¿‘∑

§ø§

¿‘√øµªÛ

3D

TV

¿∑

¿ß¡¨

Ω∏∆ TV

¿Ã¿¸

∞∆º¡§

3D ø…º«

≥∞±

»Æ¿Œ

«ˆ¿Áπº¤

πº¤æ»≥ ¡§∫«•Ω

≥»

º±»£√≥

∆¿Ã¡ˆ

øµªÛ√≥∏∑

¡øλ˜

º±≈

¡ˆøÚ

«—/øµ/º˝¿⁄

ó

»√∞

¿Ã¿¸√≥

!

A2

A5

!

!

!

!

!

!

!

A10

LV1

LV2

EXPLODED VIEW

Many electrical and mechanical parts in this chassis have special safety-related characteristics. These
parts are identified by in the Schematic Diagram and EXPLODED VIEW.
It is essential that these special safety parts should be replaced with the same components as
recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.

IMPORTANT SAFETY NOTICE

NAND FLASH MEMORY 8Gbit

+3.3V_Normal

NC_1

1

NC_2

2

NC_3

3

NC_4

4

NC_5

5

NC_6

6

RY/BY

7

RE

8

CE

9

NC_7

10

NC_8

11

VCC_1

12

VSS_1

13

NC_9

14

NC_10

15

CLE

16

ALE

17

WE

18

WP

19

NC_11

20

NC_12

21

NC_13

22

NC_14

23

NC_15

24

LGE35230(BCM35230KFSBG)

B5
C5

A4
B4

A3
B3

A2
B2

W2

V4
W4

V3
V2

D13

E6

R106
3K

IC101

NON_BCM_CAP

HDMI0_CLKN
HDMI0_CLKP

HDMI0_D0N
HDMI0_D0P

HDMI0_D1N
HDMI0_D1P

HDMI0_D2N
HDMI0_D2P

CEC

DDC0_SCL
DDC0_SDA

HDMI0_HTPLG_IN
HDMI0_HTPLG_OUT

HDMI0_ARC
HDMI0_RESREF

LT0VCAL_MONITOR

NAND_RBb

NAND_REb

NAND_CEb

NAND_CEb2

NAND_CLE

NAND_ALE

R101

4.7K

FLASH_WP

R105

4.7K

NAND_WEb

R104

4.7K

R195

4.7K

Write Protection

- High : Normal Operation

- Low : Write Protection

+3.3V_Normal

R107 2.7K

R148

+3.3V_Normal

R103

4.7K

HDMI_CLK­HDMI_CLK+

HDMI_RX0­HDMI_RX0+

HDMI_RX1­HDMI_RX1+

HDMI_RX2­HDMI_RX2+

HDMI_ARC

16Gbit

R149 0

16Gbit

0

C102

4700pF

C101

0.1uF

OPT

IC102

TC58DVG3S0ETA00

NAND_8Gbit

TXOUT0_L0N
TXOUT0_L0P
TXOUT0_L1N
TXOUT0_L1P
TXOUT0_L2N
TXOUT0_L2P

TXCLK_LN

TXCLK_LP
TXOUT0_L3N
TXOUT0_L3P
TXOUT0_L4N
TXOUT0_L4P

TXOUT0_U0N
TXOUT0_U0P
TXOUT0_U1N
TXOUT0_U1P
TXOUT0_U2N
TXOUT0_U2P

TXCLK_UN

TXCLK_UP
TXOUT0_U3N
TXOUT0_U3P
TXOUT0_U4N
TXOUT0_U4P

TXOUT1_L0N
TXOUT1_L0P
TXOUT1_L1N
TXOUT1_L1P
TXOUT1_L2N
TXOUT1_L2P

TXCLK1_LN

TXCLK1_LP
TXOUT1_L3N
TXOUT1_L3P
TXOUT1_L4N
TXOUT1_L4P

TXOUT1_U0N
TXOUT1_U0P
TXOUT1_U1N
TXOUT1_U1P
TXOUT1_U2N
TXOUT1_U2P

TXCLK1_UN

TXCLK1_UP
TXOUT1_U3N
TXOUT1_U3P
TXOUT1_U4N
TXOUT1_U4P

GPIO_BL_ON

BL_PWM/GPIO

AE27
AE28
AF27
AF28
AG27
AG28
AE26
AF26
AH27
AG26
AF25
AE25

AH26
AG25
AE24
AD24
AH25
AF24
AE23
AD23
AG24
AF23
AC22
AD22

AG23
AH23
AE22
AE21
AF22
AH22
AG22
AF21
AG21
AF20
AD21
AC21

AG20
AH20
AD19
AE19
AF19
AH19
AE18
AD18
AG19
AF18
AG18
AF17

AC18
AH16
AG16

16Gbit

IC102-*1

TH58DVG4S0ETA20

SDA0_3.3V
SCL0_3.3V

SCL2_3.3V
SDA2_3.3V

R199 22
R197 22

48

47

46

45

44

43

42

41

40

39

38

37

36

35

34

33

32

31

30

29

28

27

26

25

NC_26

NC_25

NC_24

NC_23

I/O8

I/O7

I/O6

I/O5

NC_22

PSL

NC_21

VCC_2

VSS_2

NC_20

NC_19

NC_18

I/O4

I/O3

I/O2

I/O1

NC_17

NC_16

NC_15

NC_14

+3.3V_Normal

NC_1

1

NC_28

48

NC_27

47

NC_26

46

NC_25

45

I/O8

44

NAND_DATA[7]

I/O7

43

NAND_DATA[6]

I/O6

42

NAND_DATA[5]

I/O5

41

NAND_DATA[4]

NC_24

40

39

38

37

36

35

34

33

32

31

30

29

28

27

26

25

PSL

NC_23

VCC_2

VSS_2

NC_22

NC_21

NC_20

I/O4

I/O3

I/O2

I/O1

NC_19

NC_18

NC_17

NC_16

16Gbit

R151

+3.3V_Normal

C104 10uF

NAND_DATA[3]

NAND_DATA[2]

NAND_DATA[1]

NAND_DATA[0]

TXB4P
TXB4N
TXB3P
TXB3N
TXBCLKP
TXBCLKN
TXB2P
TXB2N
TXB1P
TXB1N
TXB0P
TXB0N

TXA4P
TXA4N
TXA3P
TXA3N
TXACLKP
TXACLKN
TXA2P
TXA2N
TXA1P
TXA1N
TXA0P
TXA0N

TXD4P
TXD4N
TXD3P
TXD3N
TXDCLKP
TXDCLKN
TXD2P
TXD2N
TXD1P
TXD1N
TXD0P
TXD0N

TXC4P
TXC4N
TXC3P
TXC3N
TXCCLKP
TXCCLKN
TXC2P
TXC2N
TXC1P
TXC1N
TXC0P
TXC0N

+3.3V_Normal

0

C103

0.1uF

10V

R194

2.7K

R108 10K

NAND_DATA[0-7]

RGB_DDC_SDA

RGB_DDC_SCL

BBS CONNECT

P101

TJC2508-4A

1

2

3

4

C105

2.2uF
10V

Q101
BSS83

Q102
BSS83

+3.3V_Normal

VCC

SCL

SDA

GND

A_DIM

RY/BY2

RY/BY1

VCC_1

VSS_1

NC_10

NC_11

NC_12

NC_13

SBD

G

SBD

G

NC_2

NC_3

NC_4

NC_5

NC_6

NC_7

NC_8

NC_9

CE1

CE2

CLE

ALE

RE

WE

WP

C106

4.7uF

DEV_NAND_16Gbit

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

+3.3V_Normal

R196
10K

C118

0.1uF
16V

+3.3V_Normal

R198
10K

C119

0.1uF
16V

R110

R109

1.5K

1.5K

DVB_S Option: apply EU Satellite model

FOR HDMI STANDARD
APPLY ONLY WHEN CONNECT TO PULL-UP GPIO

Boot ROM Device Select - (FA4,FAD7,FAD2,FAD1)

+3.3V_Normal

R113
10K

R114
10K

OPT

R117
10K
OPT

R118
10K

R122
10K

R123
10K

OPT

R127
10K
OPT

R128
10K

CI_ADDR[4]
NAND_DATA[7]
NAND_DATA[2]
NAND_DATA[1]

NAND ECC (FA3, FA2, FALE)

+3.3V_Normal

R119

R115

R111
10K

OPT

R112
10K

10K

R116
10K
OPT

10K
OPT

R120
10K

CI_ADDR[3]
CI_ADDR[2]
NAND_ALE

DUAL COMPONENT

IC102 1ST : EAN61000101 2ND : T-TH58DVG4S0ETA20

IC102-*1

LGE35230(BCM35230KFSBG)

AG6

TVM_XTALIN

AF6

TVM_XTALOUT

V5

IRRXDA

AB4

FP_IN0

Y4

FP_IN1

AA4

SPARE_ADC1

Y5

SPARE_ADC2

AB2

FS_IN1

AB5

FS_IN2

U3

VGA_SDA

U2

VGA_SCL

Y2

RDA

Y1

TDA

33

AA3

BSCDATAA

AA2

BSCCLKA

H3

RDB/GPIO

H2

TDB/GPIO

H4

BSC_S_SCL

H5

BSC_S_SDA

F25

NMIB

W5

POWER_CTRL

U5

AON_HSYNC

U4

AON_VSYNC

W3

AON_GPIO_36

W1

AON_GPIO_37

AB6

AON_RESETOUTB

Y6

TVM_BYPASS

Y3

RESETB

G24

RESETOUTB

J6

TMODE

W6

TESTEN

F7

VDAC_VREG

E7

VDAC_RBIAS

BCM REFRENCE is 562ohm

R121

1.2K

C107
33pF
50V

DVB_S

+3.3V_Normal

+3.3V_Normal

R124
1K

OPT

R125
1K

R126

1.2K

C108
33pF
50V

DVB_S

R129

1.2K

C109
33pF
50V

5V_HDMI_3

R130

OPT

2K

R132 4.7K

+3.3V_Normal

C111 0.01uF
C112 0.1uF

54MHz_XTAL_P

54MHz_XTAL_N

R131

1.2K

C110
33pF
50V

PCM_5V_CTL

5V_HDMI_1

5V_HDMI_2

5V_HDMI_4

SOC_RESET

LNB_INT

SC_ID

BCM_RX
BCM_TX

R135
R136 33

+3.3V_Normal

R141 4.7K

R142 22
R143 22

R144 22
R145 22

R139 0

SRST

R140
560
1%

OPT

OPT
OPT

OPT

0000: ST Micro M25P or compatible Serial Flash
0010: 8-bit 512Mbit 512B page SLC NAND Flash devices
0100: 8-bit 128, 256Mbit 512B page SLC NAND Flash devices
0110: 8-bit 1Gbit 2KB page SLC NAND Flash devices
1000: 8-bit 2Gbit, 4Gbit, 8Gbit 2KB page SLC NAND Flash devices
1010: 8-bit 16Gbit, 32Gbit 4KB page SLC NAND Flash devices (O)
0001: 8-bit 8/16/32Gbit 2KB page MLC NAND Flash devices
0011: 8-bit 16/32Gbit 4KB page MLC NAND Flash devices
0101: 8-bit 32Gbit 8KB page MLC NAND Flash devices
0111: 3B dual IO Serial Flash
1001: BB dual IO Serial Flash
1011: fast Serail Flash > 50Mhz
1100: OneNAND Flash (always 16-bit)
1110: Reserved
1101, 1111: Reserved

000 = ECC disabled
001 = ECC 1-bit repair
010 = ECC 4-bit BCH (O)
011 = ECC 8-bit BCH, 27 byte spare
100 = ECC 12-bit BCH, 27 byte spare
101 = ECC 8-bit BCH, 16 byte spare
110, 111 = Reservedd

IC101

NON_BCM_CAP

AVS_NDRIVE_1
AVS_PDRIVE_1

FAD_7
FAD_6
FAD_5
FAD_4
FAD_3
FAD_2
FAD_1
FAD_0

FALE
FCEB_0
FCEB_1
FCEB_2
FCEB_3

NFWPB

FRDYB

FA_0

FA_1

FA_2

FA_3

FA_4

FA_5

FA_6

FA_7

FA_8

FA_9

FA_10
FA_11
FA_12
FA_13
FA_14
FA_15

TRSTB

TDI/GPIO

TMS/GPIO
TCK/GPIO

DINT/GPIO

AVS_VFB
AVS_VSENSE
AVS_RESETB

VDAC_1
VDAC_2

AB1

NAND_DATA[7]

AB3

NAND_DATA[6]

AC1

NAND_DATA[5]

AC2

NAND_DATA[4]

AC3

NAND_DATA[3]

AD2

NAND_DATA[2]

AD3

NAND_DATA[1]

AE2

NAND_DATA[0]

AG1
AF1
AC5
AE6
AG5

AF3
AG2

FWE

AE3

FRD

AA5

AF2
AE1
AC4
AD5
AD4
AE4
AE5
AD6
AH3
AF4
AH4
AG4
AF5
AG3
AH2
AH5

AD15
AF14
AH14

TDO

AD14
AG14
AC16

AH7
AG7
AD7
AF7
AH8

C6
D7

NAND_ALE
NAND_CEb
NAND_CEb2
/CI_CE1
/CI_CE2

FLASH_WP
NAND_WEb
NAND_REb
/PCM_WAIT

NAND_CLE
NAND_RBb

CI_ADDR[2]
CI_ADDR[3]
CI_ADDR[4]
CI_ADDR[5]
CI_ADDR[6]
CI_ADDR[7]
CI_ADDR[8]

CI_ADDR[9]
CI_ADDR[10]
CI_ADDR[11]
CI_ADDR[12]
CI_ADDR[13]

CI_ADDR[14]

R146 10K

NAND_DATA[0-7]

R147
1K

DTV/MNT_V_OUT

Strap Setting

CI_ADDR[2-14]

+3.3V_Normal

R156

R153

R150
1K

1K

1K

For L/R sync GPIO

SRST

+3.3V_Normal

R166
1K

R157
10K

OPT

R158
10K

R160
10K

OPT

R161
10K

R164
10K

OPT

R165
10K

R154
10K

OPT

R155
10K

NAND_DATA[0]:
0: System is LITTLE endian (O)
1: System is BIG endian

CI_ADDR[7]:
0: Disable EDID automatic Downloading from Flash (O)
1: Enable EDID automatic Downloading from Flash

NAND_DATA[6] :
0: Disable OSC clock output on chip Pin (O)
1: Enable OSC clock output on chip pin.

CI_ADDR[6]:
0: Host MIPS run at 500 MHz (O)
1: Host MIPS run at 250 MHz

NAND_CLE:
0: Differential Oscillators TVM not bypassed (O)
1: Differential Oscillators TVM bypassed

NAND_DATA[4]:
0: 27MHz TVM Crystal Frequency
1: 54MHz TVM Crystal Frequency (O)

R162

R159

1K

1K

R163
1K

L/R_SYNC_DINT
L/R_SYNC_DINT

R167
10K

OPT

R168
10K

R175
10K

OPT

R176
10K

R177
10K

R178
10K

OPT

R170
10K

R171
10K

OPT

CI_ADDR[9],CI_ADDR[11],CI_ADDR[12],CI_ADDR[13]
TVM Crystal oscillator bias/gain control
0000: 210uA
0001: 390uA
0010: 570uA
0011: 730uA
0100: 890uA (O)
0111: 1290uA
1000: 1416uA
1111: 2196uA
0101, 0110, 1001, 1010, 1011, 1100, 1101, 1110: Reserved

CI_ADDR[8]:
0: RESETOUTb (in On/Off only) stay asserted until software releases them.
1: Fix amount of delay for de-assertion on RESETOUTb (in On/IOff only)
at end of RESETb pulse (O)

NAND_DATA[3]:
0: MIPS will boot from external flash (O)
1: MIPS will boot from ROM

NAND_DATA[5]:
0: FLASH MODE (O)
1: BSC_SLAVE(BBS) MODE

R179
10K

OPT

R180
10K

R181
10K

OPT

R182
10K

R183
10K

R184
10K

OPT

R187
10K

OPT

R188
10K

NVRAM

+3.3V_Normal

R169
0

R173

R172

4.7K

4.7K

OPT

R174

4.7K

BCM_NVM_1M

IC103

M24M01-HRMN6TP

OPT

NC

1

E1

2

A8’h

E2

3

VSS

4

+3.3V_Normal

VCC

8

WP

7

SCL

6

SDA

5

R190 33

R191 33

54MHz X-TAL

C113
12pF

50V

3

X-TAL_2

4

GND_2

54MHz

X101

CRYSTAL_BCM_Sunny

C114

12pF

EAW58812611

50V

SUNNY ELECTRONICS CORPORATION

2

1

GND_1

X-TAL_1

R185 0

R186 0

R189
1M
OPT

54MHz_XTAL_N

54MHz_XTAL_P

R192
10K

OPT

NAND_DATA[0]
CI_ADDR[7]
NAND_DATA[6]
CI_ADDR[6]
NAND_CLE
NAND_DATA[4]
CI_ADDR[9]
CI_ADDR[11]
CI_ADDR[12]
CI_ADDR[13]
CI_ADDR[8]
NAND_DATA[3]
NAND_DATA[5]

R193
10K

BCM_NVM_256K

IC103-*1

AT24C256C-SSHL-T

A0

1

A1

2

A2

3

GND

4

Write Protection

- Low : Normal Operation

- High : Write Protection

X101-*2

54MHz

X-TAL_1

1

GND_1

2

CRYSTAL_BCM_KDS

EAW58239604

DAISHINKU CORPORATION.

X101-*1

54MHz

X-TAL_1

1

GND_1

2

CRYSTAL_BCM_Lihom

EAW60763703

LIHOM CO., LTD.

VCC

8

WP

7

SCL

6

SDA

5

SCL3_3.3V

SDA3_3.3V

GND_2

4

X-TAL_2

3

GND_2

4

X-TAL_2

3

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

BCM35230

MAIN & NAND FLASH

2010.09.18

1

+3.3V_Normal

FHD

R252

1K

HD

R262

1K

PHM

OLED

LCD

BCM
internal
FRC

00 11

1 100

HIGH

Support

FE_TS_DATA[0-7]

CHBO_TS_CLK

CHBO_TS_SERIAL

CHBO_TS_SYNC

CHBO_TS_VAL_ERR

R251

1K

1K

1K

BCM_FRC/URSA5

R261

1K

NO_FRC/FRC2

R250

FRC2/URSA5

R260

NO_FRC/BCM_FRC

MODEL OPTION

MODEL_OPT_0

MODEL_OPT_1

MODEL_OPT_2

MODEL_OPT_3

MODEL_OPT_4

MODEL_OPT_5

MODEL_OPT_6

MODEL_OPT_7 Enable Disable

NO_FRC

DDR speed

T2 Tuner

S Tuner

R253

R263

1K

1K

R254

1K

OPT

R264

1K

LG FRC2

LOW

HDFHD

LCDOLED

16001333

Not Support

Not SupportSupport

R255

1K

T2_TUNER

R265

1K

NO_T2_TUNER

external
URSA5

SIDE_USB_OCD1

SIDE_USB_OCD2

PCM_TS_DATA[0-7]

R201 0

F/NIM_EU_CN

PCM_MDI[0-7]

OPT

R202

0

R256

1K

S_TUNER

R266

1K

NO_S_TUNNER

+3.3V_Normal

R286
10K

WIFI

TU_TS_CLK

FE_TS_DATA[0]
FE_TS_DATA[1]
FE_TS_DATA[2]
FE_TS_DATA[3]
FE_TS_DATA[4]
FE_TS_DATA[5]
FE_TS_DATA[6]
FE_TS_DATA[7]

PHM

NO_PHM

R287
10K
WIFI

R257

1K

R267

1K

R203 0
R204 0
R205 0
R206 0
R207 0
R208 0
R209 0

C201
100pF

OPT

F/NIM_EU_CN
F/NIM_EU_CN

F/NIM_EU_CN

PCM_MDI[0]
PCM_MDI[1]
PCM_MDI[2]
PCM_MDI[3]
PCM_MDI[4]
PCM_MDI[5]
PCM_MDI[6]
PCM_MDI[7]

R211

6.04K
EPHY_TDP

EPHY_TDN
EPHY_RDP
EPHY_RDN

R210

4.87K
1%

SIDE_USB_DM
SIDE_USB_DP

SIDE_USB_CTL1

WIFI_DM
WIFI_DP

SIDE_USB_CTL2

PCM_TS_CLK

PCM_TS_DATA[0]
PCM_TS_DATA[1]
PCM_TS_DATA[2]
PCM_TS_DATA[3]
PCM_TS_DATA[4]
PCM_TS_DATA[5]
PCM_TS_DATA[6]
PCM_TS_DATA[7]

PCM_TS_SYNC

PCM_TS_VAL

F/NIM_EU_CN

F/NIM_EU_CN
F/NIM_EU_CN
F/NIM_EU_CN

TU_TS_SYNC

TS_VAL_ERR

PCM_MCLKI

PCM_MISTRT

PCM_MIVAL_ERR

/PCM_IRQA

MODEL_OPT_0

MODEL_OPT_1

MODEL_OPT_2

MODEL_OPT_3
MODEL_OPT_4

MODEL_OPT_5

MODEL_OPT_6
MODEL_OPT_7

LGE35230(BCM35230KFSBG)

F26
D26

F27
F28
E27
E26

F5
E5

C2
D1

E1
D2

B1
C1

C3
C4

M4
L5
M5
L6
N3
N1
N2
M3
M2
L4
N4

K6
J4
K5
J2
J3
K2
K1
K3
L1
L3
L2

P4
T2
R3
R2
P3
P2
P1
R6
N5
T4
P5

R4
U1
T3
T1
T5

IC101

NON_BCM_CAP
EPHY_VREF
EPHY_RDAC

EPHY_TDP
EPHY_TDN
EPHY_RDP
EPHY_RDN

USB_MONCDR
USB_RREF

USB_PORT1DN
USB_PORT1DP

USB_PWRFLT_1/GPIO
USB_PWRON_1/GPIO

USB_PORT2DN
USB_PORT2DP

USB_PWRFLT_2/GPIO
USB_PWRON_2/GPIO

TCLKA/GPIO
TDATA_0/GPIO
TDATA_1/GPIO
TDATA_2/GPIO
TDATA_3/GPIO
TDATA_4/GPIO
TDATA_5/GPIO
TDATA_6/GPIO
TDATA_7/GPIO
TSTRTA/GPIO
TVLDA/GPIO

TCLKD/GPIO
TDATD_0/GPIO
TDATD_1/GPIO
TDATD_2/GPIO
TDATD_3/GPIO
TDATD_4/GPIO
TDATD_5/GPIO
TDATD_6/GPIO
TDATD_7/GPIO
TSTRTD/GPIO
TVLDD/GPIO

MPEG_CLK/GPIO
MPEG_D_0/GPIO
MPEG_D_1/GPIO
MPEG_D_2/GPIO
MPEG_D_3/GPIO
MPEG_D_4/GPIO
MPEG_D_5/GPIO
MPEG_D_6/GPIO
MPEG_D_7/GPIO
MPEG_SYNC/GPIO
MPEG_DATA_EN/GPIO

MCIF_RESET/GPIO
MCIF_SCLK/GPIO
MCIF_SCTL/GPIO
MCIF_SDI/GPIO
MCIF_SDO/GPIO

PCI_CBE01/GPIO
PCI_CBE02/GPIO

PCI_DEVSELB/GPIO

PCI_FRAMEB/GPIO

PCI_IRDYB/GPIO

PCI_PERRB/GPIO

PCI_SERRB/GPIO
PCI_STOPB/GPIO
PCI_TRDYB/GPIO

C225

0.22uF

6.3V

VI_IFP0
VI_IFM0

VDDR_AGC

AGC_SDM_2
AGC_SDM_1

GPIO_0
GPIO_1
GPIO_2
GPIO_3

PCI_VIO_0
PCI_VIO_1
PCI_VIO_2

GPIO_4
GPIO_5
GPIO_6

GPIO_7
GPIO_70
GPIO_71
GPIO_72
GPIO_73
GPIO_74
GPIO_75
GPIO_76
GPIO_77
GPIO_78
GPIO_79

PCI_AD05
PCI_AD06
PCI_AD07

PCI_AD08
PCI_AD09/GPIO
PCI_AD10/GPIO
PCI_AD11/GPIO
PCI_AD12/GPIO
PCI_AD13/GPIO
PCI_AD14/GPIO
PCI_AD15/GPIO
PCI_AD16/GPIO
PCI_AD17/GPIO
PCI_AD18/GPIO
PCI_AD19/GPIO
PCI_AD20/GPIO
PCI_AD21/GPIO

PCI_AD22

PCI_AD23

PCI_AD24

PCI_AD25

PCI_CBE00

PCI_CBE03

PCI_PAR/GPIO

PCI_REQ1B

+0.9V_CORE

C221

0.1uF

C17
B17
D15

B16
A16

A15
C16
G28
G26

+3.3V_Normal

W14
W15
W13

J5
R5
V6
H6
AE15
AF15
AG15
AF16
AD16
AE16
AG17
AH17
AE17
AD17

AB13
AC15
AB12
AB11
AE14
AG13
AH13
AF13
AE13
AD12
AF12
AG10
AF10
AE10
AD10
AE9
AE8
AC10
AC11
AC8
AB8

AC14
AG12
AH10
AB7

AG11
AD11
AE11
AD13
AE12
AC12
AC13
AH11
AF11

C223

0.01uF

C203
10uF
10V

close to soc

Non_CHB

R212

C218

1K

closed to soc

R213 2K

C216 0.01uF

R280
22

R214 22

R215 22
R281 22
R282 22

R216 22

R218 22

R220 22

R221 22

R222 22

R283
22

R223 22

R284 22

R224 22

R235

R225 0

R226 22
R285 22

R227 22

C207

C205

4.7uF

10uF

10V

10V

C217

16V

100

0.1uF
R241

100

0.1uF
R242

16V

3D_SYNC

M_REMOTE_RX

CI_DET
M_RFModule_RESET

EPHY_ACTIVITY
EPHY_LINK

DTV_ATV_SELECT
RF_SWITCH_CTL_2

INSTANT_MODE

BCM_L/DIM
BCM_L/DIM

100

OPT

NFM18PS105R0J

C233

6.3V

OUTIN

GND

C232

4.7uF
10V

C209

4.7uF
10V

IF_P

IF_N

IF_AGC

MODEL_OPT_0

MODEL_OPT_1
MODEL_OPT_2
MODEL_OPT_3

SC_DET/COMP2_DET

CHB_RESET

TW9910_RESET

AV2_CVBS_DET
RF_BOOSTER_CTL
DSUB_DET
PCM_RST

MODEL_OPT_4
DC_MREMOTE
DD_MREMOTE

L/DIM0_MOSI
L/DIM0_SCLK

COMP1_DET

MODEL_OPT_5

3D_GPIO_0
MODEL_OPT_6
MODEL_OPT_7

ERROR_OUT

RF_SWITCH_CTL

3D_GPIO_1

3D_GPIO_2

NFM18PS105R0J

C234

0.1uF

C211

0.1uF

+3.3V_Normal

+3.3V_Normal

R228 22
R230 22

BCM_L/DIM

R231 100

C204

6.3V

GND

C236

0.1uF

C213

0.1uF

BLM18PG121SN1D

0.1uF

R240

2.7K

R231-*1 0

FRC2_RESET

URSA_RESET

OUTIN

NFM18PS105R0J

C238

4.7uF
10V

C215

0.01uF

L201

C229

NON_NTP

PWM_DIM
L/DIM0_VS

+3.3V_Normal

4.7K

C244

6.3V

GND

C220

0.1uF

+3.3V_Normal

4.7K

R232

URSA_RESET

+0.9V_CORE

+3.3V_Normal

OUTIN

+1.5V_DDR

C222

0.01uF

R233

1.2K

C227
33pF
50V

R232-*1

FRC2_RESET

R234

1.2K

C231
33pF
50V

C247
22uF

C248
10uF

10V

NON_NTP

FRC_RESET

SDA1_3.3V
SCL1_3.3V

POWER 2.5V

+2.5V_BCM35230

+2.5V_BCM35230

Place Cap
Very close to R22 Ball

L202

BLM18PG121SN1D

C249
10uF
10V

L203

BLM18PG121SN1D

C251

0.1uF
16V

+2.5V_BCM35230

BLM18PG121SN1D

C250

4.7uF
10V

+1.5V_DDR

Place Cap

Very close to R22 Ball

C242

0.1uF

+3.3V_Normal

C253
10uF
10V

EPHY_VDD25

C252

4.7uF
10V

L204

C254

4.7uF

MLG1005S22NJT

C224

L220

1uF
25V
OPT

+0.9V_CORE

AADC_AVDD25

C256

0.1uF

C255

0.1uF

VAFE3_VDD25

C257

0.1uF

+0.9V_CORE

C226

0.1uF
16V
OPT

+3.3V_Normal

+2.5V_BCM35230

L205

BLM18PG121SN1D

C258

0.1uF

+2.5V_BCM35230

C260

C259

4.7uF

10uF
10V

+2.5V_BCM35230

+2.5V_BCM35230

NON_BCM_CAP

VDDC_1
VDDC_2
VDDC_3
VDDC_4
VDDC_5
VDDC_6
VDDC_7
VDDC_8
VDDC_9
VDDC_10
VDDC_11
VDDC_12
VDDC_13
VDDC_14
VDDC_15
VDDC_16
VDDC_17
VDDC_18
VDDC_19
VDDC_20
VDDC_21
VDDC_22
VDDC_23
VDDC_24
VDDC_25
VDDC_26
VDDC_27
VDDC_28
VDDC_29
VDDC_30
VDDC_31
VDDC_32
VDDC_33
VDDC_34
VDDC_35
VDDC_36
VDDC_37
VDDC_38
VDDC_39
VDDC_40
VDDC_41
VDDC_42

POR_VDD

VDDR1_1
VDDR1_2
VDDR1_3
VDDR1_4
VDDR1_5
VDDR1_6
VDDR1_7
VDDR1_8
VDDR1_9
VDDR1_10
VDDR1_11
VDDR1_12

DDR_LDO_VDDO

VDDR3_1
VDDR3_2
VDDR3_3
VDDR3_4
VDDR3_5
VDDR3_6
VDDR3_7
VDDR3_8
VDDR3_9
VDDR3_10
VDDR3_11

AON_VDDC_1
AON_VDDC_2
AON_POR_VDD

AON_VDDR3

AON_VDDR10_1
AON_VDDR10_2

IC101

LGE35230(BCM35230KFSBG)

V12

V7
M10
N10
P10
R10
T10
U10
V10
W10
V13
L11
M11
N11
P11
R11
T11
U11
V11
W11
V14
L18
M18
N18
P18
R18
T18
U18
V18
W18
V15
L19
M19
N19
P19
R19
T19
U19
V19
W19
V16
V17

L10

L22

AA28

V28
R28
M28
J28
K23
M22
T22
T23
U22
Y22

R22

G15
H22
G23
AB9

K7

AB15

L7

AB14

M7

N6

P6

AA6
AA7

Y7

U7

T7

T6

C261
10uF
10V

C262
10uF

L206

BLM18PG121SN1D

L207

BLM18PG121SN1D

K10

VSS_1

K11

VSS_2

K12

VSS_3

L12

VSS_4

M12

VSS_5

N12

VSS_6

P12

VSS_7

R12

VSS_8

T12

VSS_9

U12

VSS_10

W12

VSS_11

K13

VSS_12

L13

VSS_13

M13

VSS_14

N13

VSS_15

P13

VSS_16

R13

VSS_17

T13

VSS_18

U13

VSS_19

W16

VSS_20

K14

VSS_21

L14

VSS_22

M14

VSS_23

N14

VSS_24

P14

VSS_25

R14

VSS_26

T14

VSS_27

U14

VSS_28

K15

VSS_29

L15

VSS_30

M15

VSS_31

N15

VSS_32

P15

VSS_33

R15

VSS_34

T15

VSS_35

U15

VSS_36

K16

VSS_37

L16

VSS_38

M16

VSS_39

N16

VSS_40

P16

VSS_41

R16

VSS_42

T16

VSS_43

U16

VSS_44

K17

VSS_45

L17

VSS_46

M17

VSS_47

N17

VSS_48

P17

VSS_49

R17

VSS_50

T17

VSS_51

U17

VSS_52

W17

VSS_53

K18

VSS_54

K19

VSS_55

H7

VSS_56

G14

VSS_57

AB16

VSS_58

R7

VSS_59

M6

VSS_60

AB23

VSS_61

P7

VSS_62

W7

VSS_63

J7

VSS_64

N7

VSS_65

AB10

VSS_66

AC23

VSS_67

AC6

VSS_68

G19

VSS_69

AA22

VSS_70

J23

VSS_71

J22

VSS_72

K22

VSS_73

J25

VSS_74

N22

VSS_75

N23

VSS_76

M25

VSS_77

P22

VSS_78

R25

VSS_79

V22

VSS_80

W22

VSS_81

W23

VSS_82

V25

VSS_83

AA25

VSS_84

ADAC_AVDD25

C263

4.7uF

C265

4.7uF

PLL_VAFE_AVDD25

C264

4.7uF

C271

C267

0.01uF

0.1uF

C266

C270

0.1uF

C269

0.1uF

C268

0.1uF

C272

0.01uF

4.7uF C277

VAFE2_VDD25

CORE 0.9V

+0.9V_CORE

L209

BLM18PG121SN1D

C274
22uF

+0.9V_CORE

L210

BLM18PG121SN1D

+0.9V_CORE

L211

BLM18PG121SN1D

POWER 3.3V

+3.3V_Normal

Place as close as possible to the pad

use only for A0/B0 chip

C210-*1
220pF
50V

BCM_A0/B0

PLL_VAFE_AVDD25

+0.9V_CORE

Place as close as possible to the pad

C281

0.1uF

C282

0.1uF

L212

VAFE2_DVDD

VAFE3_DVDD

C208
390pF
50V

C206
390pF
50V

+0.9V_CORE

+0.9V_CORE

USB_AVDD33

C283

0.1uF

+3.3V_Normal

+2.5V_BCM35230

+2.5V_BCM35230

VDAC_AVDD33

BCM_C0

PLL_MIPS_AVDD

C273

0.1uF

BLM18PG121SN1D

C284
22uF

BLM18PG121SN1D

L213

BLM18PG121SN1D

ADAC_AVDD25

EPHY_VDD25

HDMI_AVDD33

C275

0.1uF
OPT

USB_AVDD33

C212
390pF
50V

C210
390pF
50V

PLL_MAIN_AVDD

C276

0.01uF

OPT

HDMI_AVDD

C280

0.1uF

PLL_AUD_AVDD

4.7uF

PLL_VAFE_AVDD

C279

4.7uF

BLM18PG121SN1D

VAFE2_VDD25

VAFE3_VDD25

Place as close as possible to the pad

PLL_VAFE_AVDD

C202
390pF
50V

L214

C285

4.7uF

L215

+3.3V_Normal

AADC_AVDD25

HDMI_AVDD

USB_AVDD

C214
390pF
50V

PLL_AUD_AVDD

+3.3V_Normal

C288

0.1uF

C290

0.1uF

L216

BLM18PG121SN1D

C289

0.1uF

+0.9V_CORE

+0.9V_CORE

+0.9V_CORE

HDMI_AVDD33

C291

4.7uF

USB_AVDD

VAFE3_DVDD

C287

4.7uF

VDAC_AVDD33

C286

4.7uF

LGE35230(BCM35230KFSBG)

AADC_AVDD25

ADACA_AVDD25
ADACC_AVDD25
ADACD_AVDD25

EPHY_BVDD25
EPHY_AVDD25

D5

HDMI0_AVDD

D4

HDMI0_AVDD33

LT0VDD25_1
LT0VDD25_2
LT0VDD25_3
LT0VDD25_4

SPDIF_IN_AVDD25

E4

USB_AVDD

D3

USB_AVDD33

D6

VDAC_AVDD33

VAFE2_DVDD
VAFE2_AVDD25_1
VAFE2_AVDD25_2
VAFE2_DVDD25

D9

VAFE3_DVDD

D8

VAFE3_AVDD25_1

E8

VAFE3_AVDD25_2

F9

VAFE3_AVDD25_3

E9

VAFE3_DVDD25

F8

POR_VDD25

PLL_AUD_AVDD

K4

PLL_MAIN_AVDD
PLL_MIPS_AVDD

PLL_VAFE_AVDD
PLL_VAFE_AVDD25

TVM_OSC_AVDD

U6

AUX_AVDD33

NON_BCM_CAP

C278

0.1uF

AE20
AD20
AC20
AB20

AD25

F19

D25
D24
E24

F24
E25

D14

D18
E17
D16
D17

G25

D11
D12

AE7

L219

BLM18PG121SN1D

C292
22uF

L217

BLM18PG121SN1D

L218

BLM18PG121SN1D

C293

0.1uF

IC101

AADC_AVSS

ADACA_AVSS
ADACC_AVSS
ADACD_AVSS

EPHY_AVSS

HDMI0_AVSS_1
HDMI0_AVSS_2

LT0VSS_1
LT0VSS_2
LT0VSS_3
LT0VSS_4
LT0VSS_5
LT0VSS_6
LT0VSS_7

SPDIF_IN_AVSS

USB_AVSS_1
USB_AVSS_2

VDAC_AVSS

VAFE2_VSS_1
VAFE2_VSS_2
VAFE2_VSS_3
VAFE2_VSS_4
VAFE2_VSS_5
VAFE2_VSS_6
VAFE2_VSS_7

VAFE3_VSS_1
VAFE3_VSS_2
VAFE3_VSS_3
VAFE3_VSS_4
VAFE3_VSS_5
VAFE3_VSS_6

PLL_MIPS_AVSS

TVM_OSC_AVSS

VAFE2_DVDD

C299

C296

0.1uF

4.7uF

PLL_MAIN_AVDD

C294

C297

4.7uF

0.1uF

PLL_MIPS_AVDD

C295

C298

4.7uF

0.1uF

F20

G22
G21
F22

F23

F6
G6

AB22
AB21
AB19
AC19
AB18
AB17
AC17

F15

G7
G8

G9

G20
E18
G18
G17
F18
G16
F16

G13
G12
F12
G11
G10
F10

AD26

AC7

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

BCM35230

MAIN POWER

2

50

DSUB_R+

INCM_R

DSUB_G+

INCM_G

DSUB_B+

INCM_B

COMP1_Y
COMP1_Pr
COMP1_Pb

INCM_VID_SC/COMP2

AV2_CVBS_IN

INCM_VID_AV2

C320 0.1uF
C321 0.1uF

R311
36

C327 0.1uF
C328 0.1uF
R317

36

C322 0.1uF
C323 0.1uF
R312

36

INCM_VID_COMP1

SC_R/COMP2_Pr

SC_G/COMP2_Y

SC_B/COMP2_Pb

C303 0.1uF
C304 0.1uF
R303

36

TU_CVBS

AV1_CVBS_IN

INCM_VID_AV1

TU_SIF

R310
0

R318
0

EU

R325-*1

10

C317 0.1uF
C318 0.1uF
R304

36

SC_CVBS_IN

INCM_VID_SC

NON_EU
R325 0

INCM_TUNER
R306

75
1%

OPT

+2.5V_BCM35230

C319 0.1uF

R305
240

OPT

INCM_SIF

C325 0.1uF
C326 0.1uF
R316

36

R313
10K

+2.5V_BCM35230

R314
12K

C324 0.1uF
R315

120
OPT

DSUB_HSYNC
DSUB_VSYNC

C329 0.1uF
C330 0.1uF
C331 0.1uF
C332 0.1uF

C333 0.1uF
C334 0.1uF
C335 0.1uF
C336 0.1uF

SC_FB

R319
10K
OPT

R320
12K
OPT

LGE35230(BCM35230KFSBG)

B6
A6
C7
A7
B7
C8

C13
A13

C9
A9
B9
B8

C11
A10
B10
C10

D10
F13

A12
C12
B12
B11

E12
E14

E15
F17
E16
F14
E11

C18
B18
A18
C19
A19
B19
C20
B20

E19
D19
E10
F11

IC101

NON_BCM_CAP

VI_R
VI_INCM_R
VI_G
VI_INCM_G
VI_B
VI_INCM_B

HSYNC_IN
VSYNC_IN

VI_Y1
VI_PR1
VI_PB1
VI_INCM_COMP1

VI_SC_R1
VI_SC_G1
VI_SC_B1
VI_INCM_SC1

VI_FB_1/GPIO
VI_FS1

VI_SC_R2
VI_SC_G2
VI_SC_B2
VI_INCM_SC2

VI_FB_2/GPIO
VI_FS2

VI_L1
VI_C1_1
VI_INCM_LC1_1
VI_C1_2
VI_INCM_LC1_2

VI_CVBS1
VI_INCM_CVBS1
VI_CVBS2
VI_INCM_CVBS2
VI_CVBS3
VI_INCM_CVBS3
VI_CVBS4
VI_INCM_CVBS4

VI_SIF1_1
VI_INCM_SIF1_1
VI_SIF1_2
VI_INCM_SIF1_2

Near

Near

Near

Near

Near

Near

Near
Near

P801

P801

P801

JK1101

JK1104

TU2101/2
TU2201/2/3

JK1102

JK1103
JK2501

VIDEO INCM

Run Along DSUB_R Trace

Run Along DSUB_G Trace

Run Along DSUB_B Trace

Run Along COMP_Y_IN,COMP_Pr_IN,COMP_Pb_IN Trace

Run Along AV2_CVBS Trace

Run Along TUNER_CVBS_IF_P Trace

Run Along AV1_CVBS Trace

Run Along COMP_Y_IN,COMP_Pr_IN,COMP_Pb_IN/SC R,G,B Trace

INCM_R

INCM_G

INCM_B

INCM_VID_COMP1

INCM_VID_AV2

INCM_TUNER

INCM_VID_AV1

INCM_VID_SC/COMP2

BCM35230_with_CAP_220pF

IC101-*1
LGE35230

B6

BCM_CAP

VI_R

A6

VI_INCM_R

C7

VI_G

A7

VI_INCM_G

B7

VI_B

C8

VI_INCM_B

C13

HSYNC_IN

A13

VSYNC_IN

C9

VI_Y1

A9

VI_PR1

B9

VI_PB1

B8

VI_INCM_COMP1

C11

VI_SC_R1

A10

VI_SC_G1

B10

VI_SC_B1

C10

VI_INCM_SC1

D10

VI_FB_1/GPIO

F13

VI_FS1

A12

VI_SC_R2

C12

VI_SC_G2

B12

VI_SC_B2

B11

VI_INCM_SC2

E12

VI_FB_2/GPIO

E14

VI_FS2

E15

VI_L1

F17

VI_C1_1

E16

VI_INCM_LC1_1

F14

VI_C1_2

E11

VI_INCM_LC1_2

C18

VI_CVBS1

B18

VI_INCM_CVBS1

A18

VI_CVBS2

C19

VI_INCM_CVBS2

A19

VI_CVBS3

B19

VI_INCM_CVBS3

C20

VI_CVBS4

B20

VI_INCM_CVBS4

E19

VI_SIF1_1

D19

VI_INCM_SIF1_1

E10

VI_SIF1_2

F11

VI_INCM_SIF1_2

SCL3_3.3V
SDA3_3.3V

+3.3V_Normal

R301

1.2K

C301
33pF
50V

PHONE JACK

INCM_AUD_SC/COMP2

R302

1.2K
M_REMOTE_TX

C302
33pF
50V

PC_L_IN
PC_R_IN

AV1_L_IN
AV1_R_IN

INCM_AUD_AV1

AV2_L_IN
AV2_R_IN

INCM_AUD_AV2

SC/COMP2_L_IN
SC/COMP2_R_IN

C305 1uF 10V
C306 1uF 10V
C307 1uF 10V

C308 1uF 10V
C309 1uF 10V
C310 1uF 10V

C311 1uF 10V
C312 1uF 10V
C313 1uF 10V

C314 1uF 10V
C315 1uF 10V
C316 1uF 10V

NON_BCM_CAP

SPDIF_INC_P
SPDIF_INC_N

SPDIF_IND_P
SPDIF_IND_N

I2SSCK_IN/GPIO
I2SWS_IN
I2SSD_IN/GPIO

AADC_LINE_L1
AADC_LINE_R1
AADC_INCM1

AADC_LINE_L2
AADC_LINE_R2
AADC_INCM2

AADC_LINE_L3
AADC_LINE_R3
AADC_INCM3

AADC_LINE_L4
AADC_LINE_R4
AADC_INCM4

AADC_LINE_L5
AADC_LINE_R5
AADC_INCM5

AADC_LINE_L6
AADC_LINE_R6
AADC_INCM6

AADC_LINE_L7
AADC_LINE_R7
AADC_INCM7

IC101

I2SSCK_OUTA/GPIO

I2SWS_OUTA/GPIO

I2SSD_OUTA0/GPIO

I2SSOSCK_OUTA/GPIO

I2SSD_OUTA1/GPIO
I2SSD_OUTA2/GPIO

I2SSCK_OUTC/GPIO

I2SWS_OUTC/GPIO
I2SSD_OUTC/GPIO

I2SSOSCK_OUTC/GPIO

I2SSCK_OUTD/GPIO

I2SWS_OUTD/GPIO
I2SSD_OUTD/GPIO

I2SSOSCK_OUTD/GPIO

SPDIF_OUTA/GPIO

LGE35230(BCM35230KFSBG)

B15
C15

C14
B14

G4
F4
G5

C25
B24
A24

E22
E23
D23

C24
C23
B23

E21
D21
D22

B22
C22
A22

F21
D20
E20

A21
C21
B21

AUDMUTE_0/GPIO

AUDMUTE_1

ADAC_AL_N
ADAC_AL_P

ADAC_AR_N
ADAC_AR_P

ADAC_CL_N
ADAC_CL_P

ADAC_CR_N
ADAC_CR_P

ADAC_DL_N
ADAC_DL_P

ADAC_DR_N
ADAC_DR_P

AF8
AF9
AG9
AC9
AD8
AD9

E2
F2
E3
F3

G2
G3
G1
H1

B13

AG8
E13

C28
C27

D28
D27

C26
A27

B27
B28

B25
A25

A26
B26

R326 100
R327 100
R328 100
R329 100

TU_RESET_SUB

HP_DET
AV1_CVBS_DET
TU_RESET

SC_RE1
SC_RE2INCM_AUD_PC
/RST_HUB
S2_RESET

SPDIF_OUT

HP_LOUT_N
HP_LOUT_P

HP_ROUT_N
HP_ROUT_P

SCART1_Lout_N
SCART1_Lout_P

SCART1_Rout_N
SCART1_Rout_P

C337
22pF

OPT

C338
22pF

OPT

C339
22pF
OPT

C340
33pF

OPT

AUD_SCK
AUD_LRCK
AUD_LRCH
AUD_MASTER_CLK

Near

Near

Near

Near

Near

JK1102

JK1103
JK2501

JK1104
JK801

TU2101/2
TU2201/2/3

R321 0

R322 0

R323 0

R324 0

AUDIO INCM

Route Between AV1_L_IN & AV1_R_IN Trace

Route Between SC/COMP2_L_IN & SC/COMP2_R_IN Trace

Route Between AV2_L_IN & AV2_R_IN Trace

Route Between PC_L_IN & PC_R_IN Trace

Route Along With TUNER_SIF_IF_N

INCM_AUD_AV1

INCM_AUD_SC/COMP2

INCM_AUD_AV2

INCM_AUD_PC

INCM_SIF

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

BCM35230

MAIN AUDIO/VIDEO

3

50

DDR STRAP

R401

4.7K

DDR_1333

R403

4.7K

R405

4.7K

DDR_1333

R407

4.7K

DDR_DQ[0]
DDR_DQ[1]
DDR_DQ[2]
DDR_DQ[3]
DDR_DQ[4]

JEDEC Types : DDR_DQ[0:4]

R409

00001 : DDR3-1333H (CasL=9)

4.7K
OPT

10101 : DDR3-1600K (CasL=11) (O)

DUAL COMPONENT

IC401,IC402 1ST : EAN61667501, 2ND : EAN61570701

IC401-*1
IC402-*1

1ST : T-K4B2G1646B_HCK0, 2ND : T-H5TQ2G63BFR-PBC

+1.5V_DDR

OUTIN

GND

C403

2.2uF

C405
10uF

C407

2.2uF

NFM18PS105R0J

C410

6.3V

C417
470pF

C421

2.2uF

C423
10uF

C425
10uF

NFM18PS105R0J

C432

6.3V

OUTIN

GND

+1.5V_DDR

DDR_DQ[10]
DDR_DQ[9]
DDR_DQ[7]
DDR_DQ[8]
DDR_DQ[6]
DDR_DQ[5]

R408

4.7K

IC101

NON_BCM_CAP

DDR_ADA_ALT_4
DDR_ADA_ALT_5
DDR_ADA_ALT_6

DDR_CKA01_P
DDR_CKA01_N

DDR_CKA23_P
DDR_CKA23_N

R410

4.7K

OPT

DDR_ADA_0
DDR_ADA_1
DDR_ADA_2
DDR_ADA_3

DDR_ADA_4
DDR_ADA_5
DDR_ADA_6

DDR_ADA_7
DDR_ADA_8

DDR_ADA_9
DDR_ADA_10
DDR_ADA_11
DDR_ADA_12
DDR_ADA_13
DDR_ADA_14

DDR_BAA_0

DDR_BAA_1

DDR_BAA_2

DDR_RASA_N
DDR_CASA_N

DDR_WEA_N

DDR_CKEA

DDR_VREFA

DDR_RST_N

DDR_ZQ

V23
AB27
Y23
Y26

AB26
Y24
AC26

AB24
AC25
AC24

AB25
AD28
Y25
AA27
AC27
AA26
AA24
AD27

Y27
AB28
W24

V24
W25
V26

U24

W27
W28

N28
N27

U23

AA23

W26

IC401-*2

NT5CB128M16BP-CG

DDR_1333_NANYA

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

NC_6

M7

NC_5

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

L2

CS

K1

ODT

J3

RAS

K3

CAS

L3

WE

T2

RESET

F3

DQSL

G3

DQSL

C7

DQSU

B7

DQSU

E7

DML

D3

DMU

E3

DQL0

F7

DQL1

F2

DQL2

F8

DQL3

H3

DQL4

H8

DQL5

G2

DQL6

H7

DQL7

D7

DQU0

C3

DQU1

C8

DQU2

C2

DQU3

A7

DQU4

A2

DQU5

B8

DQU6

A3

DQU7

Bus Width : DDR_DQ[10]
0 - 16b
1 - 32b (O)
Chip Width : DDR_DQ[8]
0 - 8b
1 - 16b (O)
Chip Size : DDR_DQ[6:5]
00 - 4Gbit
01 - 2Gbit (O)
10 - 1Gbit
11 - 512Mbit

DDR_AA0
DDR_AA1
DDR_AA2
DDR_AA3

DDR01_AA4
DDR01_AA5
DDR01_AA6

DDR23_AA4
DDR23_AA5
DDR23_AA6

DDR_AA7
DDR_AA8
DDR_AA9
DDR_AA10
DDR_AA11
DDR_AA12
DDR_AA13
DDR_AA14

DDR_BAA0
DDR_BAA1
DDR_BAA2

DDR_RASb
DDR_CASb
DDR_WEb

DDR_CKE

DDR01_CLK
DDR01_CLKb

DDR23_CLK
DDR23_CLKb

DDR_VREFA

DDR_RESETb

R411 240

1%

M8

VREFCA

H1

VREFDQ

L8

ZQ

B2

VDD_1

D9

VDD_2

G7

VDD_3

K2

VDD_4

K8

VDD_5

N1

VDD_6

N9

VDD_7

R1

VDD_8

R9

VDD_9

A1

VDDQ_1

A8

VDDQ_2

C1

VDDQ_3

C9

VDDQ_4

D2

VDDQ_5

E9

VDDQ_6

F1

VDDQ_7

H2

VDDQ_8

H9

VDDQ_9

J1

NC_1

J9

NC_2

L1

NC_3

L9

NC_4

T7

NC_7

A9

VSS_1

B3

VSS_2

E1

VSS_3

G8

VSS_4

J2

VSS_5

J8

VSS_6

M1

VSS_7

M9

VSS_8

P1

VSS_9

P9

VSS_10

T1

VSS_11

T9

VSS_12

B1

VSSQ_1

B9

VSSQ_2

D1

VSSQ_3

D8

VSSQ_4

E2

VSSQ_5

E8

VSSQ_6

F9

VSSQ_7

G1

VSSQ_8

G9

VSSQ_9

IC402-*2

NT5CB128M16BP-CG

DDR_1333_NANYA

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

NC_6

M7

NC_5

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

L2

CS

K1

ODT

J3

RAS

K3

CAS

L3

WE

T2

RESET

F3

DQSL

G3

DQSL

C7

DQSU

B7

DQSU

E7

DML

D3

DMU

E3

DQL0

F7

DQL1

F2

DQL2

F8

DQL3

H3

DQL4

H8

DQL5

G2

DQL6

H7

DQL7

D7

DQU0

C3

DQU1

C8

DQU2

C2

DQU3

A7

DQU4

A2

DQU5

B8

DQU6

A3

DQU7

C453
1uF

6.3V

DDR01_CLK

DDR01_CLKb

R412

56
1%

C401
1000pF

DDR_DQ[0-7]

DDR_DQ[8-15]

IC401-*3

NT5CB128M16BP-DI

DDR_1600_NANYA

M8

VREFCA

H1

VREFDQ

L8

ZQ

B2

VDD_1

D9

VDD_2

G7

VDD_3

K2

VDD_4

K8

VDD_5

N1

VDD_6

N9

VDD_7

R1

VDD_8

R9

VDD_9

A1

VDDQ_1

A8

VDDQ_2

C1

VDDQ_3

C9

VDDQ_4

D2

VDDQ_5

E9

VDDQ_6

F1

VDDQ_7

H2

VDDQ_8

H9

VDDQ_9

J1

NC_1

J9

NC_2

L1

NC_3

L9

NC_4

T7

NC_7

A9

VSS_1

B3

VSS_2

E1

VSS_3

G8

VSS_4

J2

VSS_5

J8

VSS_6

M1

VSS_7

M9

VSS_8

P1

VSS_9

P9

VSS_10

T1

VSS_11

T9

VSS_12

B1

VSSQ_1

B9

VSSQ_2

D1

VSSQ_3

D8

VSSQ_4

E2

VSSQ_5

E8

VSSQ_6

F9

VSSQ_7

G1

VSSQ_8

G9

VSSQ_9

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

NC_6

M7

NC_5

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

L2

CS

K1

ODT

J3

RAS

K3

CAS

L3

WE

T2

RESET

F3

DQSL

G3

DQSL

C7

DQSU

B7

DQSU

E7

DML

D3

DMU

E3

DQL0

F7

DQL1

F2

DQL2

F8

DQL3

H3

DQL4

H8

DQL5

G2

DQL6

H7

DQL7

D7

DQU0

C3

DQU1

C8

DQU2

C2

DQU3

A7

DQU4

A2

DQU5

B8

DQU6

A3

DQU7

M8

VREFCA

H1

VREFDQ

L8

ZQ

B2

VDD_1

D9

VDD_2

G7

VDD_3

K2

VDD_4

K8

VDD_5

N1

VDD_6

N9

VDD_7

R1

VDD_8

R9

VDD_9

A1

VDDQ_1

A8

VDDQ_2

C1

VDDQ_3

C9

VDDQ_4

D2

VDDQ_5

E9

VDDQ_6

F1

VDDQ_7

H2

VDDQ_8

H9

VDDQ_9

J1

NC_1

J9

NC_2

L1

NC_3

L9

NC_4

T7

NC_7

A9

VSS_1

B3

VSS_2

E1

VSS_3

G8

VSS_4

J2

VSS_5

J8

VSS_6

M1

VSS_7

M9

VSS_8

P1

VSS_9

P9

VSS_10

T1

VSS_11

T9

VSS_12

B1

VSSQ_1

B9

VSSQ_2

D1

VSSQ_3

D8

VSSQ_4

E2

VSSQ_5

E8

VSSQ_6

F9

VSSQ_7

G1

VSSQ_8

G9

VSSQ_9

IC402-*3

NT5CB128M16BP-DI

DDR_1600_NANYA

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

NC_6

M7

NC_5

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

L2

CS

K1

ODT

J3

RAS

K3

CAS

L3

WE

T2

RESET

F3

DQSL

G3

DQSL

C7

DQSU

B7

DQSU

E7

DML

D3

DMU

E3

DQL0

F7

DQL1

F2

DQL2

F8

DQL3

H3

DQL4

H8

DQL5

G2

DQL6

H7

DQL7

D7

DQU0

C3

DQU1

C8

DQU2

C2

DQU3

A7

DQU4

A2

DQU5

B8

DQU6

A3

DQU7

OPT

R432

4.7K

R404

4.7K
OPT

4.7K
OPT

R402

4.7K
OPT

R406

LGE35230(BCM35230KFSBG)

DDR_DQ[0-7]

DDR_DQ[0]
DDR_DQ[1]
DDR_DQ[2]
DDR_DQ[3]
DDR_DQ[4]
DDR_DQ[5]

DDR_DQ[24]
DDR_DQ[25]
DDR_DQ[26]
DDR_DQ[27]
DDR_DQ[28]
DDR_DQ[29]
DDR_DQ[30]
DDR_DQ[31]

DDR_DM[0]
DDR_DM[1]
DDR_DM[2]
DDR_DM[3]

DDR_QS0

DDR_QS0b

DDR_QS1

DDR_QS1b

DDR_QS2

DDR_QS2b

DDR_QS3

DDR_QS3b

DDR_DQ[6]

DDR_DQ[7]
DDR_DQ[8]
DDR_DQ[9]
DDR_DQ[10]
DDR_DQ[11]
DDR_DQ[12]
DDR_DQ[13]
DDR_DQ[14]
DDR_DQ[15]

DDR_DQ[16]
DDR_DQ[17]
DDR_DQ[18]
DDR_DQ[19]
DDR_DQ[20]
DDR_DQ[21]
DDR_DQ[22]
DDR_DQ[23]

DDR_DQ[8-15]

DDR_DQ[16-23]

DDR_DQ[24-31]

DDR_DM[0-3] DDR_QS3

U26
R26
U27
R27
V27
P26
U25
P27
R24
N24
T25
M23
R23
N25
T24
N26
L26
H27
L27
J26
M27
G27
M26
H26
L23
H25
L24
J24
M24
H23
L25
H24

T26
P25
J27
K24

T27
T28

P24
P23

K27
K28

K25
K26

DDR_DQA_0
DDR_DQA_1
DDR_DQA_2
DDR_DQA_3
DDR_DQA_4
DDR_DQA_5
DDR_DQA_6
DDR_DQA_7
DDR_DQA_8
DDR_DQA_9
DDR_DQA_10
DDR_DQA_11
DDR_DQA_12
DDR_DQA_13
DDR_DQA_14
DDR_DQA_15
DDR_DQA_16
DDR_DQA_17
DDR_DQA_18
DDR_DQA_19
DDR_DQA_20
DDR_DQA_21
DDR_DQA_22
DDR_DQA_23
DDR_DQA_24
DDR_DQA_25
DDR_DQA_26
DDR_DQA_27
DDR_DQA_28
DDR_DQA_29
DDR_DQA_30
DDR_DQA_31

DDR_DMA_0
DDR_DMA_1
DDR_DMA_2
DDR_DMA_3

DDR_DQSA_P_0
DDR_DQSA_N_0

DDR_DQSA_P_1
DDR_DQSA_N_1

DDR_DQSA_P_2
DDR_DQSA_N_2

DDR_DQSA_P_3
DDR_DQSA_N_3

R413
56
1%

+1.5V_DDR

C455

C454

1uF

1uF

6.3V

6.3V

DDR_AA0
DDR_AA1
DDR_AA2

DDR_AA3
DDR01_AA4
DDR01_AA5
DDR01_AA6

DDR_AA7

DDR_AA8

DDR_AA9

DDR_AA10
DDR_AA11
DDR_AA12
DDR_AA13

DDR_BAA0
DDR_BAA1
DDR_BAA2

DDR_CKE

+1.5V_DDR

R414 10K

DDR_RASb
DDR_CASb

DDR_WEb

DDR_RESETb

DDR_QS0

DDR_QS0b

DDR_QS1

DDR_QS1b

DDR_DM[0]
DDR_DM[1]

DDR_DQ[0]

DDR_DQ[1]

DDR_DQ[2]

DDR_DQ[3]

DDR_DQ[4]

DDR_DQ[5]

DDR_DQ[6]

DDR_DQ[7]

DDR_DQ[8]
DDR_DQ[14]
DDR_DQ[13]
DDR_DQ[12]
DDR_DQ[9]
DDR_DQ[10]
DDR_DQ[15]
DDR_DQ[11]

M8

VREFCA

H1

VREFDQ

L8

ZQ

B2

VDD_1

D9

VDD_2

G7

VDD_3

K2

VDD_4

K8

VDD_5

N1

VDD_6

N9

VDD_7

R1

VDD_8

R9

VDD_9

A1

VDDQ_1

A8

VDDQ_2

C1

VDDQ_3

C9

VDDQ_4

D2

VDDQ_5

E9

VDDQ_6

F1

VDDQ_7

H2

VDDQ_8

H9

VDDQ_9

J1

NC_1

J9

NC_2

L1

NC_3

L9

NC_4

T7

NC_7

A9

VSS_1

B3

VSS_2

E1

VSS_3

G8

VSS_4

J2

VSS_5

J8

VSS_6

M1

VSS_7

M9

VSS_8

P1

VSS_9

P9

VSS_10

T1

VSS_11

T9

VSS_12

B1

VSSQ_1

B9

VSSQ_2

D1

VSSQ_3

D8

VSSQ_4

E2

VSSQ_5

E8

VSSQ_6

F9

VSSQ_7

G1

VSSQ_8

G9

VSSQ_9

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3

M7

M2
N8
M3

J7
K7
K9

L2
K1
J3
K3
L3

T2

F3
G3

C7
B7

E7
D3

E3
F7
F2
F8
H3
H8
G2
H7

D7
C3
C8
C2
A7
A2
B8
A3

NFM18PS105R0J

K4B2G1646C

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13

NC_5

BA0
BA1
BA2

CK
CK
CKE

CS
ODT
RAS
CAS
WE

RESET

DQSL
DQSL

DQSU
DQSU

DML
DMU

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

C402

6.3V

OUTIN

GND

IC401

DDR_1333_SS

VREFCA

VREFDQ

VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9

VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9

NC_1
NC_2
NC_3
NC_4
NC_6

VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8

VSS_9
VSS_10
VSS_11
VSS_12

VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9

C412
1uF

ZQ

M8

H1

L8

R415 240

B2
D9
G7
K2
K8
N1
N9
R1
R9

A1
A8
C1
C9
D2
E9
F1
H2
H9

J1
J9
L1
L9
T7

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

+1.5V_DDR

C415

0.01uF

C416

0.01uF

1%

+1.5V_DDR

DDR_AA14

R416

4.99K
1%

R417

4.99K
1%

DDR_VREFA

+1.5V_DDR

DDR23_CLK

DDR23_CLKb

DDR_DQ[16-23]

DDR_DQ[24-31]

R418

DDR23_AA4
DDR23_AA5
DDR23_AA6

R419

56

56

1%

1%

+1.5V_DDR

C419
1000pF

DDR_RESETb

DDR_DM[2]
DDR_DM[3]

DDR_DQ[24]
DDR_DQ[30]
DDR_DQ[29]
DDR_DQ[28]
DDR_DQ[25]
DDR_DQ[26]
DDR_DQ[31]
DDR_DQ[27]

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

DDR_AA0
DDR_AA1
DDR_AA2
DDR_AA3

DDR_AA7
DDR_AA8

DDR_AA9
DDR_AA10
DDR_AA11
DDR_AA12
DDR_AA13

DDR_BAA0
DDR_BAA1
DDR_BAA2

DDR_CKE

R420 10K

DDR_RASb
DDR_CASb

DDR_WEb

DDR_QS2
DDR_QS2b

DDR_QS3b

DDR_DQ[16]
DDR_DQ[17]
DDR_DQ[18]
DDR_DQ[19]
DDR_DQ[20]
DDR_DQ[21]
DDR_DQ[22]
DDR_DQ[23]

NFM18PS105R0J

C433

6.3V

OUTIN

GND

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3

M7

M2
N8
M3

J7
K7
K9

L2
K1
J3
K3
L3

T2

F3
G3

C7
B7

E7
D3

E3
F7
F2
F8
H3
H8
G2
H7

D7
C3
C8
C2
A7
A2
B8
A3

K4B2G1646C

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13

NC_5

BA0
BA1
BA2

CK
CK
CKE

CS
ODT
RAS
CAS
WE

RESET

DQSL
DQSL

DQSU
DQSU

DML
DMU

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

C426
1uF

IC402

DDR_1333_SS

VREFCA

VREFDQ

VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9

VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9

NC_1
NC_2
NC_3
NC_4
NC_6

VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8

VSS_9
VSS_10
VSS_11
VSS_12

VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9

ZQ

+1.5V_DDR

M8

H1

L8

R421 240

B2
D9
G7
K2
K8
N1
N9
R1
R9

A1
A8
C1
C9
D2
E9
F1
H2
H9

J1
J9
L1
L9
T7

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

+1.5V_DDR

R422

4.99K
1%

R423

C435

4.99K

0.01uF

1%

DDR_VREFA

C436

0.01uF

+1.5V_DDR

1%

DDR_AA14

BCM35230

MAIN DDR

IC401-*1

K4B2G1646C-HCK0

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

A13

M7

NC_5

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

L2

CS

K1

ODT

J3

RAS

K3

CAS

L3

WE

T2

RESET

F3

DQSL

G3

DQSL

C7

DQSU

B7

DQSU

E7

DML

D3

DMU

E3

DQL0

F7

DQL1

F2

DQL2

F8

DQL3

H3

DQL4

H8

DQL5

G2

DQL6

H7

DQL7

D7

DQU0

C3

DQU1

C8

DQU2

C2

DQU3

A7

DQU4

A2

DQU5

B8

DQU6

A3

DQU7

DDR_1600_SS

VREFCA

VREFDQ

VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9

VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9

VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8

VSS_9
VSS_10
VSS_11
VSS_12

VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9

ZQ

NC_1
NC_2
NC_3
NC_4
NC_6

DDR_RESETb

DDR_AA13
DDR_AA14

DDR_AA2

DDR_AA11

DDR_AA3
DDR_AA7

DDR_AA9
DDR_AA8
DDR_AA0

DDR_AA1
DDR_BAA0
DDR_BAA2
DDR_BAA1
DDR_AA10
DDR_AA12

DDR_WEb

DDR23_AA6
DDR23_AA4
DDR23_AA5

DDR01_AA6
DDR01_AA4
DDR01_AA5

DDR_CASb
DDR_RASb

M8

H1

L8

B2
D9
G7
K2
K8
N1
N9
R1
R9

A1
A8
C1
C9
D2
E9
F1
H2
H9

J1
J9
L1
L9
T7

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

DDR_CKE

R428
82

R424 56
R425 56

AR401 56

AR402 56

AR403 56

AR404 56

AR405 56

AR406 56

R426 56
R427 56

IC402-*1

K4B2G1646C-HCK0

DDR_1600_SS

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

A13

M7

NC_5

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

L2

CS

K1

ODT

J3

RAS

K3

CAS

L3

WE

T2

RESET

F3

DQSL

G3

DQSL

C7

DQSU

B7

DQSU

E7

DML

D3

DMU

E3

DQL0

F7

DQL1

F2

DQL2

F8

DQL3

H3

DQL4

H8

DQL5

G2

DQL6

H7

DQL7

D7

DQU0

C3

DQU1

C8

DQU2

C2

DQU3

A7

DQU4

A2

DQU5

B8

DQU6

A3

DQU7

+1.5V_DDR

R429
82

C437
100pF

OPT

C441 1uF

M8

VREFCA

H1

VREFDQ

L8

ZQ

B2

VDD_1

D9

VDD_2

G7

VDD_3

K2

VDD_4

K8

VDD_5

N1

VDD_6

N9

VDD_7

R1

VDD_8

R9

VDD_9

A1

VDDQ_1

A8

VDDQ_2

C1

VDDQ_3

C9

VDDQ_4

D2

VDDQ_5

E9

VDDQ_6

F1

VDDQ_7

H2

VDDQ_8

H9

VDDQ_9

J1

NC_1

J9

NC_2

L1

NC_3

L9

NC_4

T7

NC_6

A9

VSS_1

B3

VSS_2

E1

VSS_3

G8

VSS_4

J2

VSS_5

J8

VSS_6

M1

VSS_7

M9

VSS_8

P1

VSS_9

P9

VSS_10

T1

VSS_11

T9

VSS_12

B1

VSSQ_1

B9

VSSQ_2

D1

VSSQ_3

D8

VSSQ_4

E2

VSSQ_5

E8

VSSQ_6

F9

VSSQ_7

G1

VSSQ_8

G9

VSSQ_9

4

R430

4.7K
OPT

C442
100pF

R431

4.7K
OPT

C438

1uF

0.1uF

C404

C406 0.1uF

C450

0.1uF

C408

0.1uF

C439

1uF

C409

0.1uF

0.1uF

C451

0.1uF

C411

C440

1uF

0.1uF

C452

50