LG 19LV2300-ZA Schematic
INPUT
MENU
P
OK
/I
LED LCD TV
SERVICE MANUAL
CAUTION
BEFORE SERVICING THE CHASSIS,
READ THE SAFETY PRECAUTIONS IN THIS MANUAL.
CHASSIS : LD01S
MODEL : 19LV2300 19LV2300-ZA
North/Latin America http://aic.lgservice.com
Europe/Africa http://eic.lgservice.com
Asia/Oceania http://biz.lgservice.com
Internal Use Only
Printed in KoreaP/NO : MFL67002109 (1106-REV00)
LGE Internal Use OnlyCopyright ©2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
- 2 -
CONTENTS
CONTENTS .............................................................................................. 2
PRODUCT SAFETY ................................................................................. 3
SPECIFICATION ....................................................................................... 6
ADJUSTMENT INSTRUCTION ................................................................ 9
BLOCK DIAGRAM...................................................................................15
EXPLODED VIEW .................................................................................. 16
SCHEMATIC CIRCUIT DIAGRAM ..............................................................
LGE Internal Use OnlyCopyright ©2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
- 3 -
SAFETY PRECAUTIONS
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the
Schematic Diagram and Exploded View.
It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent
Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
General Guidance
An isolation Transformer should always be used during the
servicing of a receiver whose chassis is not isolated from the AC
power line. Use a transformer of adequate power rating as this
protects the technician from accidents resulting in personal injury
from electrical shocks.
It will also protect the receiver and it's components from being
damaged by accidental shorts of the circuitry that may be
inadvertently introduced during the service operation.
If any fuse (or Fusible Resistor) in this TV receiver is blown,
replace it with the specified.
When replacing a high wattage resistor (Oxide Metal Film Resistor,
over 1 W), keep the resistor 10 mm away from PCB.
Keep wires away from high voltage or high temperature parts.
Before returning the receiver to the customer,
always perform an AC leakage current check on the exposed
metallic parts of the cabinet, such as antennas, terminals, etc., to
be sure the set is safe to operate without damage of electrical
shock.
Leakage Current Cold Check(Antenna Cold Check)
With the instrument AC plug removed from AC source, connect an
electrical jumper across the two AC plug prongs. Place the AC
switch in the on position, connect one lead of ohm-meter to the AC
plug prongs tied together and touch other ohm-meter lead in turn to
each exposed metallic parts such as antenna terminals, phone
jacks, etc.
If the exposed metallic part has a return path to the chassis, the
measured resistance should be between 1 MΩ and 5.2 MΩ.
When the exposed metal has no return path to the chassis the
reading must be infinite.
An other abnormality exists that must be corrected before the
receiver is returned to the customer.
Leakage Current Hot Check (See below Figure)
Plug the AC cord directly into the AC outlet.
Do not use a line Isolation Transformer during this check.
Connect 1.5 K / 10 watt resistor in parallel with a 0.15 uF capacitor
between a known good earth ground (Water Pipe, Conduit, etc.)
and the exposed metallic parts.
Measure the AC voltage across the resistor using AC voltmeter
with 1000 ohms/volt or more sensitivity.
Reverse plug the AC cord into the AC outlet and repeat AC voltage
measurements for each exposed metallic part. Any voltage
measured must not exceed 0.75 volt RMS which is corresponds to
0.5 mA.
In case any measurement is out of the limits specified, there is
possibility of shock hazard and the set must be checked and
repaired before it is returned to the customer.
Leakage Current Hot Check circuit
1.5 Kohm/10W
To Instrument's
exposed
METALLIC PARTS
Good Earth Ground
such as WATER PIPE,
CONDUIT etc.
AC Volt-meter
When 25A is impressed between Earth and 2nd Ground
for 1 second, Resistance must be less than 0.1
*Base on Adjustment standard
IMPORTANT SAFETY NOTICE
0.15 uF
Ω
LGE Internal Use OnlyCopyright ©2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
- 4 -
CAUTION: Before servicing receivers covered by this service
manual and its supplements and addenda, read and follow the
SAFETY PRECAUTIONS on page 3 of this publication.
NOTE: If unforeseen circumstances create conflict between the
following servicing precautions and any of the safety precautions on
page 3 of this publication, always follow the safety precautions.
Remember: Safety First.
General Servicing Precautions
1. Always unplug the receiver AC power cord from the AC power
source before;
a. Removing or reinstalling any component, circuit board
module or any other receiver assembly.
b. Disconnecting or reconnecting any receiver electrical plug or
other electrical connection.
c. Connecting a test substitute in parallel with an electrolytic
capacitor in the receiver.
CAUTION: A wrong part substitution or incorrect polarity
installation of electrolytic capacitors may result in an
explosion hazard.
2. Test high voltage only by measuring it with an appropriate high
voltage meter or other voltage measuring device (DVM,
FETVOM, etc) equipped with a suitable high voltage probe.
Do not test high voltage by "drawing an arc".
3. Do not spray chemicals on or near this receiver or any of its
assemblies.
4. Unless specified otherwise in this service manual, clean
electrical contacts only by applying the following mixture to the
contacts with a pipe cleaner, cotton-tipped stick or comparable
non-abrasive applicator; 10 % (by volume) Acetone and 90 %
(by volume) isopropyl alcohol (90 % - 99 % strength)
CAUTION: This is a flammable mixture.
Unless specified otherwise in this service manual, lubrication of
contacts in not required.
5. Do not defeat any plug/socket B+ voltage interlocks with which
receivers covered by this service manual might be equipped.
6. Do not apply AC power to this instrument and/or any of its
electrical assemblies unless all solid-state device heat sinks are
correctly installed.
7. Always connect the test receiver ground lead to the receiver
chassis ground before connecting the test receiver positive
lead.
Always remove the test receiver ground lead last.
8. Use with this receiver only the test fixtures specified in this
service manual.
CAUTION: Do not connect the test fixture ground strap to any
heat sink in this receiver.
Electrostatically Sensitive (ES) Devices
Some semiconductor (solid-state) devices can be damaged easily
by static electricity. Such components commonly are called
Electrostatically Sensitive (ES) Devices. Examples of typical ES
devices are integrated circuits and some field-effect transistors and
semiconductor "chip" components. The following techniques
should be used to help reduce the incidence of component
damage caused by static by static electricity.
1. Immediately before handling any semiconductor component or
semiconductor-equipped assembly, drain off any electrostatic
charge on your body by touching a known earth ground.
Alternatively, obtain and wear a commercially available
discharging wrist strap device, which should be removed to
prevent potential shock reasons prior to applying power to the
unit under test.
2. After removing an electrical assembly equipped with ES
devices, place the assembly on a conductive surface such as
aluminum foil, to prevent electrostatic charge buildup or
exposure of the assembly.
3. Use only a grounded-tip soldering iron to solder or unsolder ES
devices.
4. Use only an anti-static type solder removal device. Some solder
removal devices not classified as "anti-static" can generate
electrical charges sufficient to damage ES devices.
5. Do not use freon-propelled chemicals. These can generate
electrical charges sufficient to damage ES devices.
6. Do not remove a replacement ES device from its protective
package until immediately before you are ready to install it.
(Most replacement ES devices are packaged with leads
electrically shorted together by conductive foam, aluminum foil
or comparable conductive material).
7. Immediately before removing the protective material from the
leads of a replacement ES device, touch the protective material
to the chassis or circuit assembly into which the device will be
installed.
CAUTION: Be sure no power is applied to the chassis or circuit,
and observe all other safety precautions.
8. Minimize bodily motions when handling unpackaged
replacement ES devices. (Otherwise harmless motion such as
the brushing together of your clothes fabric or the lifting of your
foot from a carpeted floor can generate static electricity
sufficient to damage an ES device.)
General Soldering Guidelines
1. Use a grounded-tip, low-wattage soldering iron and appropriate
tip size and shape that will maintain tip temperature within the
range or 500
°
F to 600 °F.
2. Use an appropriate gauge of RMA resin-core solder composed
of 60 parts tin/40 parts lead.
3. Keep the soldering iron tip clean and well tinned.
4. Thoroughly clean the surfaces to be soldered. Use a mall wirebristle (0.5 inch, or 1.25 cm) brush with a metal handle.
Do not use freon-propelled spray-on cleaners.
5. Use the following unsoldering technique
a. Allow the soldering iron tip to reach normal temperature.
(500
°F to 600 °F)
b. Heat the component lead until the solder melts.
c. Quickly draw the melted solder with an anti-static, suction-
type solder removal device or with solder braid.
CAUTION: Work quickly to avoid overheating the circuit
board printed foil.
6. Use the following soldering technique.
a. Allow the soldering iron tip to reach a normal temperature
(500
°F to 600 °F)
b. First, hold the soldering iron tip and solder the strand against
the component lead until the solder melts.
c. Quickly move the soldering iron tip to the junction of the
component lead and the printed circuit foil, and hold it there
only until the solder flows onto and around both the
component lead and the foil.
CAUTION: Work quickly to avoid overheating the circuit
board printed foil.
d. Closely inspect the solder area and remove any excess or
splashed solder with a small wire-bristle brush.
SERVICING PRECAUTIONS
LGE Internal Use OnlyCopyright ©2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
- 5 -
IC Remove/Replacement
Some chassis circuit boards have slotted holes (oblong) through
which the IC leads are inserted and then bent flat against the
circuit foil. When holes are the slotted type, the following technique
should be used to remove and replace the IC. When working with
boards using the familiar round hole, use the standard technique
as outlined in paragraphs 5 and 6 above.
Removal
1. Desolder and straighten each IC lead in one operation by gently
prying up on the lead with the soldering iron tip as the solder
melts.
2. Draw away the melted solder with an anti-static suction-type
solder removal device (or with solder braid) before removing the
IC.
Replacement
1. Carefully insert the replacement IC in the circuit board.
2. Carefully bend each IC lead against the circuit foil pad and
solder it.
3. Clean the soldered areas with a small wire-bristle brush.
(It is not necessary to reapply acrylic coating to the areas).
"Small-Signal" Discrete Transistor
Removal/Replacement
1. Remove the defective transistor by clipping its leads as close as
possible to the component body.
2. Bend into a "U" shape the end of each of three leads remaining
on the circuit board.
3. Bend into a "U" shape the replacement transistor leads.
4. Connect the replacement transistor leads to the corresponding
leads extending from the circuit board and crimp the "U" with
long nose pliers to insure metal to metal contact then solder
each connection.
Power Output, Transistor Device
Removal/Replacement
1. Heat and remove all solder from around the transistor leads.
2. Remove the heat sink mounting screw (if so equipped).
3. Carefully remove the transistor from the heat sink of the circuit
board.
4. Insert new transistor in the circuit board.
5. Solder each transistor lead, and clip off excess lead.
6. Replace heat sink.
Diode Removal/Replacement
1. Remove defective diode by clipping its leads as close as
possible to diode body.
2. Bend the two remaining leads perpendicular y to the circuit
board.
3. Observing diode polarity, wrap each lead of the new diode
around the corresponding lead on the circuit board.
4. Securely crimp each connection and solder it.
5. Inspect (on the circuit board copper side) the solder joints of
the two "original" leads. If they are not shiny, reheat them and if
necessary, apply additional solder.
Fuse and Conventional Resistor
Removal/Replacement
1. Clip each fuse or resistor lead at top of the circuit board hollow
stake.
2. Securely crimp the leads of replacement component around
notch at stake top.
3. Solder the connections.
CAUTION: Maintain original spacing between the replaced
component and adjacent components and the circuit board to
prevent excessive component temperatures.
Circuit Board Foil Repair
Excessive heat applied to the copper foil of any printed circuit
board will weaken the adhesive that bonds the foil to the circuit
board causing the foil to separate from or "lift-off" the board. The
following guidelines and procedures should be followed whenever
this condition is encountered.
At IC Connections
To repair a defective copper pattern at IC connections use the
following procedure to install a jumper wire on the copper pattern
side of the circuit board. (Use this technique only on IC
connections).
1. Carefully remove the damaged copper pattern with a sharp
knife. (Remove only as much copper as absolutely necessary).
2. carefully scratch away the solder resist and acrylic coating (if
used) from the end of the remaining copper pattern.
3. Bend a small "U" in one end of a small gauge jumper wire and
carefully crimp it around the IC pin. Solder the IC connection.
4. Route the jumper wire along the path of the out-away copper
pattern and let it overlap the previously scraped end of the good
copper pattern. Solder the overlapped area and clip off any
excess jumper wire.
At Other Connections
Use the following technique to repair the defective copper pattern
at connections other than IC Pins. This technique involves the
installation of a jumper wire on the component side of the circuit
board.
1. Remove the defective copper pattern with a sharp knife.
Remove at least 1/4 inch of copper, to ensure that a hazardous
condition will not exist if the jumper wire opens.
2. Trace along the copper pattern from both sides of the pattern
break and locate the nearest component that is directly
connected to the affected copper pattern.
3. Connect insulated 20-gauge jumper wire from the lead of the
nearest component on one side of the pattern break to the lead
of the nearest component on the other side.
Carefully crimp and solder the connections.
CAUTION: Be sure the insulated jumper wire is dressed so the
it does not touch components or sharp edges.
LGE Internal Use OnlyCopyright ©2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
- 6 -
SPECIFICATION
NOTE : Specifications and others are subject to change without notice for improvement
.
4. Model General Specification
1. Application range
This specification is applied to the LCD/ LED LCD TV used
LD01S chassis.
2. Requirement for Test
Each part is tested as below without special appointment.
1) Temperature: 25 ºC ± 5 ºC(77 ºF ± 9 ºF), CST: 40 ºC ± 5 ºC
2) Relative Humidity : 65 % ± 10 %
3) Power Voltage
: Standard input voltage (AC 100-240 V~, 50 / 60 Hz)
* Standard Voltage of each products is marked by models.
4) Specification and performance of each parts are followed
each drawing and specification by part number in
accordance with BOM.
5) The receiver must be operated for about 5 minutes prior to
the adjustment.
3. Test method
1) Performance: LGE TV test method followed
2) Demanded other specification
- Safety: CE, IEC specification
- EMC:CE, IEC
No. Item Specification Remarks
1 Market EU(PAL Market-36Countries) DTV-T/C & Analog
Germany, Netherlands, Switzerland, Hungary, Austria, Slovenia, Sweden, Denmark,
Finland, Norway, Bulgaria
DTV-T & Analog
UK, France, Spain, Italy, Belgium, Russia, Luxemburg, Greece, Czech, Croatia,Turkey,
Moroco, Ireland, Latvia, Estonia, Lithuania, Poland, Portugal, Romania, Ukraine, Slovakia
Analog Only
Kazakhstan, Albania, Bosnia, Serbia
2 Broadcasting system 1) PAL-BG
2) PAL-DK
3) PAL-I/I’
4) SECAM L/L’
5) DVB-T/C/S (ID TV)
3 Receiving system Analog : Upper Heterodyne
Digital : COFDM, QAM
4 Scart Jack (1EA) PAL, SECAM Scart Jack is Full scart and support RF-OUT(analog & DTV)
5 Video Input RCA(1EA) PAL, SECAM, NTSC 4System : PAL, SECAM, NTSC, PAL60
6 Component Input(1EA) Y/Cb/Cr, Y/Pb/Pr
7 RGB Input RGB-PC Analog(D-SUB 15PIN)
8 HDMI Input (3EA) HDMI1-DTV (DVI) PC(HDMI version 1.3)
HDMI2-DTV Support HDCP
HDMI3-DTV
9 Audio Input (3EA) RGB/DVI Audio, Component, AV L/R Input
10 SDPIF out (1EA) SPDIF out
11 Earphone out (1EA) Antenna, AV1, AV2, AV3, Component,
RGB, HDMI1, HDMI2, HDMI3, HDMI4
12 USB (1EA) For SVC (download)
DivX
13 DVB DVB-T
CI : UK, Finland, Denmark, Norway, Sweden, Russia, Spain, Ireland, Luxemburg, Belgium, Netherland
CI+ : France(Canal+), Italy(DGTVi)
DVB-C CI : Switzerland, Austria, Slovenia, Hungary, Bulgaria
CI+ : Switzerland(UPC,Cablecom), Netherland(Ziggo), Germany(KDG,CWB), Finland(labwise)
DVB-S CI+ : Germany(Astra HD+)
- 7 -
LGE Internal Use OnlyCopyright ©2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
5. Component Video Input (Y, CB/PB, CR/PR)
No.
Specification
Remark
Resolution H-freq(kHz) V-freq(Hz)
1. 720x480 15.73 60.00 SDTV,DVD 480i
2. 720x480 15.63 59.94 SDTV,DVD 480i
3. 720x480 31.47 59.94 480p
4. 720x480 31.50 60.00 480p
5. 720x576 15.625 50.00 SDTV,DVD 625 Line
6. 720x576 31.25 50.00 HDTV 576p
7. 1280x720 45.00 50.00 HDTV 720p
8. 1280x720 44.96 59.94 HDTV 720p
9. 1280x720 45.00 60.00 HDTV 720p
10. 1920x1080 31.25 50.00 HDTV 1080i
11. 1920x1080 33.75 60.00 HDTV 1080i
12. 1920x1080 33.72 59.94 HDTV 1080i
13. 1920x1080 56.250 50 HDTV 1080p
14. 1920x1080 67.5 60 HDTV 1080p
No.
Specification
Proposed Remark
Resolution H-freq(kHz) V-freq(Hz) Pixel Clock(MHz)
1. 720*400 31.468 70.08 28.321 For only DOS mode
2. 640*480 31.469 59.94 25.17 VESA Input 848*480 60 Hz, 852*480 60 Hz
-> 640*480 60 Hz Display
3. 800*600 37.879 60.31 40.00 VESA
4. 1024*768 48.363 60.00 65.00 VESA(XGA)
5. 1280*768 47.78 59.87 79.5 WXGA
6. 1360*768 47.72 59.8 84.75 WXGA FHD Model
7. 1366*768 47.56 59.6 84.75 WXGA WXGA Model
8. 1200*1024 63.901 60.02 100.075 SXGA FHD model
9. 1280*720 45 60 74.25 720p DTV Standard
10. 1920*1080 67.5 60 148.5 WUXGA FHD model
6. RGB (PC)
- 8 -
LGE Internal Use OnlyCopyright ©2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
7. HDMI Input
(1) DTV Mode
No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed Remark
1. 720*400 31.468 70.08 28.321 HDCP
2. 640*480 31.469 59.94 25.17 VESA HDCP
3. 800*600 37.879 60.31 40.00 VESA HDCP
4. 1024*768 48.363 60.00 65.00 VESA(XGA) HDCP
5. 1280*768 47.78 59.87 79.5 WXGA HDCP
6. 1360*768 47.72 59.8 84.75 WXGA HDCP
7. 1280*720 45 60 74.25 HDCP
8. 1280*1024 63.981 60.02 108.875 SXGA HDCP/FHD model
9. 1920*1080 67.5 60 148.5 WUXGA HDCP/FHD model
(2) PC Mode
No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed Remark
1. 720*480 31.469/31.5 59.94/60 27.00/27.03 SDTV 480P
2. 720*576 31.25 50 54 SDTV 576P
3. 1280*720 37.500 50 74.25 HDTV 720P
4. 1280*720 44.96/45 59.94/60 74.17/74.25 HDTV 720P
5. 1920*1080 33.72/33.75 59.94/60 74.17/74.25 HDTV 1080I
6. 1920*1080 28.125 50.00 74.25 HDTV 1080I
7. 1920*1080 26.97/27 23.97/24 74.17/74.25 HDTV 1080P
8. 1920*1080 33.716/33.75 29.976 /30.00 74.25 HDTV 1080P
9. 1920*1080 56.250 50 148.5 HDTV 1080P
10. 1920*1080 67.43/67.5 59.94/60 148.35/148.50 HDTV 1080P
LGE Internal Use OnlyCopyright ©2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
- 9 -
ADJUSTMENT INSTRUCTION
1. Application Range
This specification sheet is applied to all of the LCD/ LED LCD
TV with LD01S chassis.
2. Designation
1) The adjustment is according to the order which is
designated and which must be followed, according to the
plan which can be changed only on agreeing.
2) Power Adjustment: Free Voltage
3) Magnetic Field Condition: Nil.
4) Input signal Unit: Product Specification Standard
5) Reserve after operation: Above 5 Minutes (Heat Run)
Temperature : at 25 ºC ± 5 ºC
Relative humidity : 65 % ± 10 %
Input voltage : 220 V, 60 Hz
6) Adjustment equipments: Color Analyzer(CA-210 or CA-110),
DDC Adjustment Jig equipment, Service remote control.
7) Push The “IN STOP” key - For memory initialization.
3. Main PCB check process
* APC - After Manual-Insult, executing APC
* Boot file Download
1) Execute ISP program “Mstar ISP Utility” and then click
“Config” tab.
2) Set as below, and then click “Auto Detect” and check “OK”
message.
If “Error” is displayed, Check connection between computer,
jig, and set.
3) Click “Read” tab, and then load download file(XXXX.bin) by
clicking “Read”.
4) Click “Connect” tab. If “Can’t” is displayed, check connection
between computer, jig, and set.
5) Click “Auto” tab and set as below.
6) Click “Run”.
7) After downloading, check “OK” message.
* USB DOWNLOAD
1) Put the USB Stick to the USB socket.
2) Automatically detecting update file in USB Stick.
- If your downloaded program version in USB Stick is Low,
it didn’t work. But your downloaded version is High, USB
data is automatically detecting
3) Show the message “Copying files from memory”.
filexxx.bin
(4)
(7) ……….OK
(5)
(6)
(1)
fil exxx.bi n
(2)
(3)
Please Check the Speed :
To use speed between
from 200KHz to 400KHz
Case1 : Software version up
1. After downloading S/W by USB, TV set will reboot
automatically
2. Push “In-stop” key
3. Push “Power on” key
4. Function inspection
5. After function inspection, Push “In-stop” key.
Case2 : Function check at the assembly line
1. When TV set is entering on the assembly line, Push
“In-stop” key at first.
2. Push “Power on” key for turning it on.
-> If you push “Power on” key, TV set will recover
channel information by itself.
3. After function inspection, Push “In-stop” key.
4) Updating is starting.
5) Uploading completed, the TV will restart automatically.
6) If your TV is turned on, check your updated version and
Tool option.(explain the Tool option, next stage)
* If downloading version is more high than your TV have,
TV can lost all channel data. In this case, you have to
channel recover. if all channel data is cleared, you didn’t
have a DTV/ATV test on production line.
* After downloading, have to adjust Tool Option again.
1) Push “IN-START” key in service remote control.
2) Select “Tool Option 1” and push “OK” key.
3) Punch in the number. (Each model has their number)
4) Completed selecting Tool option.
3.1. ADC Process
(1) ADC
- Enter Service Mode by pushing “ADJ” key,
- Enter Internal ADC mode by pushing “
G
” key at “5. ADC
Calibration”.
<Caution> Using ‘power on’ key of the Adjustment remote
control, power on TV.
* ADC Calibration Protocol (RS232)
Adjust Sequence
• aa 00 00 [Enter Adjust Mode]
• xb 00 40 [Component1 Input (480i)]
• ad 00 10 [Adjust 480i Comp1]
• xb 00 60 [RGB Input (1024*768)]
• ad 00 10 [Adjust 1024*768 RGB]
• aa 00 90 End Adjust mode
* Required equipment : Adjustment remote control.
3.2. Function Check
* Check display and sound
- Check Input and Signal items. (cf. work instructions)
1) TV
2) AV (SCART1/SCART2/CVBS)
3) COMPONENT (480i)
4) RGB (PC : 1024 x 768 @ 60 Hz)
5) HDMI
6) PC Audio In
* Display and Sound check is executed by Remote control.
- 10 -
LGE Internal Use OnlyCopyright ©2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
Item CMD1 CMD2 Data0
Adjust ‘Mode In’ A A 0 0 When transfer the ‘Mode In’,
Carry the command.
ADC Adjust A D 1 0 Automatically adjustment
(The use of a internal pattern)
EZ ADJUT
0. Tool Option1
1. Tool Option2
2. Tool Option3
3. Tool Option4
4. Country Group
5. ADC Calibration
6. White Balance
7. Test Pattern
8. EDID D/L
9. Sub B/C
10. V-Com
11. P-Gamma
ADC Calibration
ADC Comp 480i
ADC Comp 1080p
ADC RGB
NG
NG
NG
Reset
Start
4. Total Assembly line process
4.1. Adjustment Preparation
· W/B Equipment condition
CA210
: CCFL/EEFL -> CH9, Test signal: Inner pattern(80IRE)
LED -> CH14, Test signal: Inner pattern(80IRE)
· Above 5 minutes H/run in the inner pattern. (“power on” key
of adjustment remote control)
· Edge LED W/B Table is process of time (Only LGD Module)
CA210: CH14, Test signal : Inner pattern(80IRE)
* Connecting picture of the measuring instrument
(On Automatic control)
Inside Pattern is used when W/B is controlled. Connect to auto
controller or push Adjustment remote control POWER ON ->
Enter the mode of White-Balance, the pattern will come out.
* Auto-control interface and directions
1) Adjust in the place where the influx of light like floodlight
around is blocked. (Illumination is less than 10 lux).
2) Adhere closely the Color Analyzer (CA210) to the module
less than 10 cm distance, keep it with the surface of the
Module and Color Analyzer’s prove vertically.(80° ~ 100°).
3) Aging time
- After aging start, keep the power on (no suspension of
power supply) and heat-run over 5 minutes.
- Using ‘no signal’ or ‘full white pattern’ or the others,
check the back light on.
• Auto adjustment Map(RS-232C)
RS-232C COMMAND
[CMD ID DATA]
Wb 00 00 White Balance Start
Wb 00 ff White Balance End
** Caution **
Color Temperature : COOL, Medium, Warm.
One of R Gain/G Gain/ B Gain should be kept on 0xC0, and
adjust other two lower than C0.
(when R/G/B Gain are all C0, it is the FULL Dynamic Range
of Module)
* Manual W/B process using adjusts Remote control.
• After enter Service Mode by pushing “ADJ” key,
• Enter White Balance by pushing “
G
” key at “6. White
Balance”.
* After you finished all adjustments, Press “In-start” key and
compare Tool option and Area option value with its BOM, if
it is correctly same then unplug the AC cable. If it is not
same, then correct it same with BOM and unplug AC cable.
For correct it to the model’s module from factory Jig model.
* Push the “IN STOP” key after completing the function
inspection. And Mechanical Power Switch must be set
“ON”.
4.2. DDC EDID Write (RGB 128Byte )
• Connect D-sub Signal Cable to D-sub Jack.
• Write EDID Data to EEPROM(24C02) by using DDC2B
protocol.
• Check whether written EDID data is correct or not.
* For Service main Assembly, EDID have to be downloaded to
Insert Process in advance.
4.3. DDC EDID Write (HDMI 256Byte)
• Connect HDMI Signal Cable to HDMI Jack.
• Write EDID Data to EEPROM(24C02) by using DDC2B
protocol.
• Check whether written EDID data is correct or not.
* For Service main Assembly, EDID have to be downloaded to
Insert Process in advance.
- 11 -
LGE Internal Use OnlyCopyright ©2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
Cool 9,300 K X=0.285(±0.002)
Y=0.293(±0.002) <Test Signal>
Medium 8,000 K X=0.295(±0.002) Inner pattern
Y=0.305(±0.002) (204 gray, 80 IRE)
Warm 6,500 K X=0.313(±0.002)
Y=0.329(±0.002)
Full White Pattern
COLOR
ANALYZER
TYPE: CA-210
RS-232C Communication
CA-210
RS-232C COMMAND MIN CENTER MAX
[CMD ID DATA] (DEFAULT)
Cool Mid Warm Cool Mid Warm
R Gain jg Ja jd 00 172 192 192 192
G Gain jh Jb je 00 172 192 192 192
B Gain ji Jc jf 00 192 192 172 192
R Cut 64 64 64 128
G Cut 64 64 64 128
B Cut 64 64 64 128
Aging Time Cool Medium Warm
GP2R (Min.) X Y X Y X Y
269 273 285 293 313 329
1 0-2 279 288 295 308 319 338
2 3-5 278 286 294 306 318 336
3 6-9 277 285 293 305 317 335
4 10-19 276 283 292 303 316 333
5 20-35 274 280 290 300 314 330
6 36-49 272 277 288 297 312 327
7 50-79 271 275 287 295 311 325
8 80-149 270 274 286 294 310 324
9 Over 150 269 273 285 293 309 323
EZ ADJUST
0. Tool Option1
1. Tool Option2
2. Tool Option3
3. Tool Option4
4. Country Group
5. ADC Calibration
6. White Balance
7. Test Pattern
8. EDID D/L
9. Sub B/C
10. V-Com
11. P-Gamma
White Balance
Color Temp.
R-Gain
G-Gain
B-Gain
R-Cut
G-Cut
B-Cut
Test-Pattern.
Reset
Cool
172
172
192
64
64
64
ON
To set
4.4. EDID DATA
1) All Data : HEXA Value
2) Changeable Data :
*: Serial No : Controlled / Data:01
**: Month : Controlled / Data:00
***: Year : Controlled
****: Check sum
- Auto Download
• After enter Service Mode by pushing “ADJ” key,
• Enter EDID D/L mode.
• Enter “START” by pushing “OK” key.
* Caution : Never connect HDMI & D-sub Cable when EDID
download.
* Edid data and Model option download (RS232)
- Manual Download
* Caution
1) Use the proper signal cable for EDID Download.
- Analog EDID : Pin3 exists
- Digital EDID : Pin3 exists
2) Never connect HDMI & D-sub Cable at the same time.
3) Use the proper cables below for EDID Writing.
4) Download HDMI1, HDMI2, separately because HDMI1 is
different from HDMI2.
1) HD RGB EDID data
2) HD HDMI EDID data
* Detail EDID Options are below
ⓐ Product ID
ⓑ Serial No: Controlled on production line.
ⓒ Month, Year: Week : ‘01’ -> ‘01’
Year : ‘2011’ -> ‘15’ fix
ⓓ Model Name(Hex):
ⓔ Checksum: Changeable by total EDID data.
ⓕ Vendor Specific(HDMI)
- 12 -
LGE Internal Use OnlyCopyright ©2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
EZ ADJUT
0. Tool Option1
1. Tool Option2
2. Tool Option3
3. Tool Option4
4. Country Group
5. ADC Calibration
6. White Balance
7. Test Pattern
8. EDID D/L
9. Sub B/C
10. V-Com
11. P-Gamma
EDID D/L
HDMI1
HDMI2
HDMI3
RGB
NG
NG
NG
NG
Reset
Start
EDID D/L
Reset
Start
HDMI1
HDMI2
HDMI3
RGB
OK
OK
OK
OK
Item CMD1 CMD2 Data0
Download A A 0 0 When transfer the ‘Mode In’,
‘Mode In’ Carry the command.
Download A E 00 10 Automatically Download
(The use of a internal pattern)
Item
Manufacturer ID
Version
Revision
Condition
GSM
Digital : 1
Digital : 3
Data(Hex)
1E6D
01
03
D-sub to D-sub DVI-D to HDMI or HDMI to HDMI
For HDMI EDID
For Analog EDID
012 3 4 5 67 8 9 ABCD EF
00 00 FF FF FF FF FF FF 00 1E 6D a b
10 c 01036810 09780AEE91A3544C9926
20 0F 50 54 A1 08 00 81 C0 61 40 45 40 31 40 01 01
30 01 01 01 01 01 01 1B 21 50 A0 51 00 1E 30 48 88
40 35 00 A0 5A 00 00 00 1C 01 1D 00 72 51 D0 1E 20
50 6E 28 55 00 A0 5A 00 00 00 1E 00 00 00 FD 00 3A
60 3E 1F 46 10 00 0A 20 20 20 20 20 20 d
70 d 00 e
80 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
90 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
A0 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
B0 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
C0 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
D0 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
E0 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
F0 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
012 3 4 5 67 8 9 ABCD EF
00 00 FF FF FF FF FF FF 00 1E 6D a b
10 c 01038010 09780AEE91A3544C9926
20 0F 50 54 A1 08 00 81 C0 61 40 45 40 31 40 01 01
30 01 01 01 01 01 01 1B 21 50 A0 51 00 1E 30 48 88
40 35 00 A0 5A 00 00 00 1C 01 1D 00 72 51 D0 1E 20
50 6E 28 55 00 A0 5A 00 00 00 1E 00 00 00 FD 00 3A
60 3E 1F 46 10 00 0A 20 20 20 20 20 20 d
70 d 01 e
80 02 03 20 F1 4E 10 1F 84 13 05 14 03 02 12 20 21
90 22 15 01 26 15 07 50 09 57 07 f
A0 f 8018711C1620582C2500A05A0000
B0 00 9E 01 1D 00 80 51 D0 0C 20 40 80 35 00 A0 5A
C0 00 00 00 1E 8C 0A D0 8A 20 E0 2D 10 10 3E 96 00
D0 A0 5A 00 00 00 18 02 3A 80 18 71 38 2D 40 58 2C
E0 45 00 A0 5A 00 00 00 1E 01 1D 80 D0 72 1C 16 20
F0 10 2C 25 80 A0 5A 00 00 00 9E 00 00 00 00 00 0e
Model Name HEX EDID Table DDC Function
HD Model 0000 00 00 Analog/Digital
MODEL MODEL NAME(HEX)
all 00 00 00 FC 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20
INPUT MODEL NAME(HEX)
HDMI1 65030C001000
HDMI2 65030C002000
HDMI3 65030C003000
4.5. V-COM Adjust(Only LGD(M+S) Module)
- Why need Vcom adjustment?
A The Vcom (Common Voltage) is a Reference Voltage of
Liquid Crystal Driving.
-> Liquid Crystal need for Polarity Change with every frame.
- Adjust sequence
· Press the PIP key of th ADJ remote control.(This PIP key is
hot key to enter the VCOM adjusting mode)
(Or After enter Service Mode by pushing “ADJ” key, then
Enter V-Com Adjust mode by pushing “G” key at “10. VCom”.)
· As pushing the right or the left key on the remote control,
and find the V-COM value which is no or minimized the
Flicker. (If there is no flicker at default value, Press the exit
key and finish the VCOM adjustment.)
· Push the “OK” key to store value. Then the message
“Saving OK” is pop.
· Press the exit key to finish VCOM adjustment.
(Visual Adjust and control the Voltage level)
4.6. Outgoing condition Configuration
When pressing IN-STOP key by Service remote control, Red
LED are blinked alternatively. And then Automatically turn off.
(Must not AC power OFF during blinking)
4.7. Hi-pot Test
Confirm whether is normal or not when between power
board’s ac block and GND is impacted on 1.5 kV(dc) or 2.2
kV(dc) for one second.
5. Model name & Serial number D/L
• Press “Power on” key of service remote control.
(Baud rate : 115200 bps)
• Connect RS232 Signal Cable to RS-232 Jack.
• Write Serial number by use RS-232.
• Must check the serial number at the Diagnostics of SET UP
menu. (Refer to below.)
5.1. Signal TABLE
CMD : A0h
LENGTH : 85~94h (1~16 bytes)
ADH : EEPROM Sub Address high (00~1F)
ADL : EEPROM Sub Address low (00~FF)
Data : Write data
CS : CMD + LENGTH + ADH + ADL + Data_1 +…+ Data_n
Delay : 20ms
5.2. Command Set
* Description
FOS Default write : <7mode data> write
Vtotal, V_Frequency, Sync_Polarity, Htotal, Hstart, Vstart, 0,
Phase
Data write : Model Name and Serial Number write in
EEPROM,.
5.3. Method & notice
A. Serial number D/L is using of scan equipment.
B. Setting of scan equipment operated by Manufacturing
Technology Group.
C. Serial number D/L must be conformed when it is produced
in production line, because serial number D/L is mandatory
by D-book 4.0.
- 13 -
LGE Internal Use OnlyCopyright ©2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
CMD LENGTH ADH ADL DATA_1 . . . Data_n CS DELAY
Row Li ne
Column Li ne
CLC
CST
Pane l
S
Y
S
T
E
M
Gat e Driv e IC
So urce D r iv e I C
Circuit Block
Tim i ng
Cont r o ll er
Po w er
Blo c k
V
COM
Gamma
Ref er ence V oltage
Gamm a Re ference
Volta ge
Data (R,G ,B) & C on tro l signal
Cont rol si gnal
Data (R,G,B ) &
Cont rol si gnal
In t er fa ce
TFT
Po w er I np u t
Power Input
Da ta I n pu t
Da ta I n pu t
V
COM
Liquid
Crys tal
V
COM
No. Adjust mode CMD(hex) LENGTH(hex) Description
1 EEPROM WRITE A0h 84h+n n-bytes Write(n=1~16)
* Manual Download (Model Name and Serial Number)
If the TV set is downloaded by OTA or Service man, Sometimes
model name or serial number is initialized.(Not always)
There is impossible to download by bar code scan, so It need
Manual download.
1) Press the “Instart” key of Adjustment remote control.
2) Go to the menu ‘5.Model Number D/L’ like below photo.
3) Input the Factory model name(ex 42LD450-ZA) or Serial
number like photo.
4) Check the model name Instart menu. -> Factory name
displayed. (ex 42LD450-ZA)
5) Check the Diagnostics. (DTV country only) -> Buyer model
displayed. (ex 42LD450)
6. CI+ Key Download method
(1) Download Procedure
1) Press “Power on” key of a service remote control.
(Baud rate : 115200 bps)
2) Connect RS232-C Signal Cable.
3) Write CI+ Key through RS-232-C.
4) Check whether the key was downloaded or not at ‘In
Start’ menu. (Refer to below.)
=> Check the Download to CI+ Key value in LGset.
1. Check the method of CI+ Key value.
a. Check the method on Instart menu.
b. Check the method of RS232C Command.
1) Into the main assembly mode (RS232 : aa 00 00)
2) Check the key download for transmitted command.
(RS232 : ci 00 10)
3) Result value
- Normally status for download : OKx
- Abnormally status for download : NGx
2. Check the method of CI+ Key value. (RS232)
1) Into the main assembly mode (RS232 : aa 00 00)
2) Check the method of CI+ key by command.
(RS232 : ci 00 20)
3) Result value
i 01 OK 1d1852d21c1ed5dcx
7. Local Dimming Function Check
Step1) Turn on TV.
Step2) Press “P-only” key, entrance to power only mode and
Press “Exit” key.
Step3) Press “Tilt” key, entrance to Local Dimming mode.
Step4) At the Local Dimming mode, module Edge Backlight
moving right to left Back light of module moving.
Step5) Confirm the Local Dimming mode.
Step6) Press “Exit” key.
- 14 -
LGE Internal Use OnlyCopyright ©2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
CMD 1 CMD 2 Data 0
AA00
CMD 1 CMD 2 Data 0
CI10
CMD 1 CMD 2 Data 0
AA00
CMD 1 CMD 2 Data 0
CI20
CI+ key Value
- 15 -
LGE Internal Use OnlyCopyright ©2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
BLOCK DIAGRAM
NAND
Flash (8 Gb)
Audio
AMP
PCMCIA
Tun er _CVBS
USB
COM P1
A/V1
SCART
RS-232 C
PC-RGB
PC-AUDI O
SPDI F
SYSTEM
DDR3 X 16 X 2
(2Gb)
51P
HDMI 1
HDMI 2
HDMI 3
H/ P
SYSTEM EEPROM X 1
(1Mb)
TUNER
(T/ C)
41P
SPI
Flash (2 Mb )
SYSTEM
DDR3 X 16 X 1
(1Gb)
Tun er _SI F
SCL/ SDA
CI_TS_DATA[7:0]/CLK/Valid/Sync
CI _DATA[7: 0]
CI _ AD DR [ 1 4: 0]
FE_TS_DATA[0]/CLK/Valid/Sync
USB_DM/ DP
HP_OUT
DSUB_RGB/ HVsync
DDC_SDA/UART_T X
PC_ Au d io I N
SPDI F_ OUT
Debug _TX/RX
SC_ CVBS/ RGB/ L R_ I N
SC_ VI D EO/ L R_ OUT
AV_CVBS/LR_I N
COMP_ YPbPr / LR_I N
HDMI _TMDS/HPD/ CEC
HDMI _TMDS/HPD/ CEC
HDMI _TMDS/HPD/ CEC
I2S_I/F
SCL/ SDA
30P
Side
Rear
DATA
Vid eo
Audio
DATA
Vid eo
Audio
Su b Mi c om
(NEC)
HDCP EEPROM X 1
(8Kb)
For FRC
SPI
Flash (8 Mb )
SCL/ SDA
SCL/ SDA
LGE101 (S7R)
LGE107 (S7+URSA)
- 16 -
LGE Internal Use OnlyCopyright LG Electronics. Inc. All rights reserved.
Only for training and service purposes
300
200
810
540
400
900
800
521
A4
LV1
120
500
511
510
A5
A2
A21
A6
A10
EXPLODED VIEW
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These
parts are identified by in the Schematic Diagram and EXPLODED VIEW.
It is essential that these special safety parts should be replaced with the same components as
recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
IMPORTANT SAFETY NOTICE
IC102
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only
NC_1
NC_2
NC_3
NC_4
NC_5
NC_6
RB
R
E
NC_7
NC_8
NC_9
CL
AL
W
WP
IC102-*2
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
NAND01GW3B2CN6E
NAND_FLASH_1G_NUMONYX
EAN60762401
NC_29
48
NC_28
47
NC_27
46
NC_26
45
I/O7
44
I/O6
43
I/O5
42
I/O4
41
NC_25
40
NC_24
39
NC_23
38
VCC_2
37
VSS_2
36
NC_22
35
NC_21
34
NC_20
33
I/O3
32
I/O2
31
I/O1
30
I/O0
29
NC_19
28
NC_18
27
NC_17
26
NC_16
25
NC_29
48
NC_28
47
NC_27
46
NC_26
45
I/O7
44
I/O6
43
I/O5
42
I/O4
41
NC_25
40
NC_24
39
NC_23
38
VDD_2
37
VSS_2
36
NC_22
35
NC_21
34
NC_20
33
I/O3
32
I/O2
31
I/O1
30
I/O0
29
NC_19
28
NC_18
27
NC_17
26
NC_16
25
NC_1
NC_2
NC_3
NC_4
NC_5
NC_6
RY/BY
RE
CE
NC_7
NC_8
VCC_1
VSS_1
NC_9
NC_10
CLE
ALE
WE
WP
NC_11
NC_12
NC_13
NC_14
NC_15
+3.3V_Normal
AR101
C102
10uF
C103
0.1uF
AR102
NAND_FLASH_1G_TOSHIBA
EAN61508001
IC102-*3
TC58NVG0S3ETA0BBBH
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
EEPROM_1MBIT_ATMEL
IC104-*1
AT24C1024BN-SH-T
NC
1
A1
2
A2
3
GND
4
22
22
8
7
6
5
PCM_A[7]
PCM_A[6]
PCM_A[5]
PCM_A[4]
PCM_A[3]
PCM_A[2]
PCM_A[1]
PCM_A[0]
VCC
WP
SCL
SDA
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
PCM_A[0-7]
NC_29
NC_28
NC_27
NC_26
I/O8
I/O7
I/O6
I/O5
NC_25
NC_24
NC_23
VCC_2
VSS_2
NC_22
NC_21
NC_20
I/O4
I/O3
I/O2
I/O1
NC_19
NC_18
NC_17
NC_16
/PF_WP
NC_1
NC_2
NC_3
NC_4
NC_5
NC_6
R/B
RE
CE
NC_7
NC_8
VCC_1
VSS_1
NC_9
NC_10
CLE
ALE
WE
WP
NC_11
NC_12
NC_13
NC_14
NC_15
NAND FLASH MEMORY
/PF_CE0
H : Serial Flash
L : NAND Flash
/PF_CE1
H : 16 bit
L : 8 bit
/F_RB
/PF_OE
/PF_CE0
+3.3V_Normal
OPT
R104
B
3.3K
R102
NAND_FLASH_1G_HYNIX
EAN35669102
IC102-*1
H27U1G8F2BTR-BC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
IC103-*1
CAT24C08WI-GT3-H-RECV(TV)
NC_1
NC_2
VSS
8
1
7
2
A2
6
3
5
4
10K
C
E
VCC
WP
SCL
SDA
/PF_CE1
PF_ALE
/PF_WE
Q101
KRC103S
OPT
+3.3V_Normal
1K
R109 3.9K
R107
C101
OPT
R1081K
0.1uF
VDD_1
VSS_1
R105
1K
OPT
R106
1K
NC_10
NC_11
NC_12
NC_13
NC_14
NC_15
NAND_FLASH_1G_SS
EAN61857001
K9F1G08U0D-SCB0
NC_1
NC_29
48
NC_28
47
NC_27
46
NC_26
45
I/O7
44
I/O6
43
I/O5
42
I/O4
41
NC_25
40
NC_24
39
NC_23
38
VCC_2
37
VSS_2
36
NC_22
35
NC_21
34
NC_20
33
I/O3
32
I/O2
31
I/O1
30
I/O0
29
NC_19
28
NC_18
27
NC_17
26
NC_16
25
NC_2
NC_3
NC_4
NC_5
NC_6
R/B
NC_7
NC_8
VCC_1
VSS_1
NC_9
NC_10
CLE
ALE
NC_11
NC_12
NC_13
NC_14
NC_15
1
2
3
4
5
6
7
RE
8
CE
9
10
11
12
13
14
15
16
17
WE
18
WP
19
20
21
22
23
24
HDCP_EEPROM_ON_SEMI_NEW
C105
0.1uF
+3.3V_Normal
C104
8pF
OPT
C106
8pF
OPT
HDCP EEPROM
HDCP_EEPROM_CATALYST_OLD
R113
4.7K
CAT24WC08W-T
A0
A1
A2
VSS
IC103
1
$0.199
2
3
4
8
7
6
5
VCC
WP
SCL
SDA
R127 4.7K
+3.3V_Normal
R128
R129 22
C107
0.1uF
Addr:10101--
22
I2C_SCL
I2C_SDA
EEPROM
EEPROM_1MBIT_ST
IC104
M24M01-HRMN6TP
NC
1
E1
2
E2
A0’h
3
VSS
4
VCC
8
WP
7
SCL
6
SDA
5
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
R111 22
R112 22
<T3 CHIP Config(AUD_LRCH)>
Boot from SPI flash : 1’b0
Boot from NOR flash : 1’b1
<T3 CHIP Config>
(AUD_SCK, AUD_MASTER_CLK, PWM1, PWM0)
MIPS_no_EJ_NOR8 : 4’h3 (MIPS as host. No EJ PAD. Byte mode NAND flash.)
MIPS_EJ1_NOR8 : 4’h4 (MIPS as host. EJ use PAD1. Byte mode NAND flash.)
MIPS_EJ2_NOR8 : 4’h5 (MIPS as host. EJ use PAD2. Byte mode NAND flash.)
B51_Secure_no scramble : 4’hb (8051 as host. Internal SPI flash secure boot, no scramble)
B51_Sesure_scramble : 4’hc (8051 as host. Internal SPI flash secure boot with scarmble)
AUD_MASTER_CLK R148
56
C112
100pF
50V
R115
R116
R117
1K
OPT
R118
1K
+3.3V_Normal
R123
1K
1K
OPT
OPT
R121
R124
1K
1K
1K
R125
R126
1K
OPT
AUD_LRCH
AUD_SCK
AUD_MASTER_CLK_0
PWM1
PWM0
1K
PCM_D[0-7]
PCM_A[0-14]
+5V_Normal
R132
10K
R133
10K
AR104
/PF_CE0
/PF_CE1
/PF_OE
/PF_WE
PF_ALE
/PF_WP
/F_RB
for SYSTEM/HDCP
EEPROM&URSA3
S7_NEC_TXD
S7_NEC_RXD
I2C_SDA
I2C_SCL
RGB_DDC_SDA
RGB_DDC_SCL
AR103
22
TO SCART1
LVACLKP/LLV6P/BLUE[3]
LVACLKN/LLV6N/BLUE[2]
LVA0P/LLV3P/BLUE[9]
LVA0N/LLV3N/BLUE[8]
LVA1P/LLV4P/BLUE[7]
LVA1N/LLV4N/BLUE[6]
LVA2P/LLV5P/BLUE[5]
LVA2N/LLV5N/BLUE[4]
LVA3P/LLV7P/BLUE[1]
LVA3N/LLV7N/BLUE[0]
LVBCLKP/LLV0P/GREEN[5]
LVBCLKN/LLV0N/GREEN[4]
LVB0P/RLV6P/RED[1]
LVB0N/RLV6N/RED[0]
LVB1P/RLV7P/GREEN[9]
LVB1N/RLV7N/GREEN[8]
LVB2P/RLV8P/GREEN[7]
LVB2N/RLV8N/GREEN[6]
LVB3P/LLV1P/GREEN[3]
LVB3N/LLV1N/GREEN[2]
LVB4P/LLV0P/GREEN[1]
LVB4N/LLV0N/GREEN[0]
TCON3/OE/GOE/GCLK2
TCON1/STV/GSP/VST
TCON21/CS10/VGH_ODD
TCON20/CS9/VGH_EVEN
IC101-*13
TCON15/SCAN_BLK1
TCON18/CS7/GCLK5
TCON19/CS8/GCLK6
TCON11/CS5/HCON
TCON10/CS4/OPT_N
TCON9/CS3/OPT_P
TCON14/SACN_BLK
TCON17/CS6/GCLK4
LVA4P/LLV8P
LVA4N/LLV8N
RLV3P/RED[7]
RLV3N/RED[6]
RLV0P/LVSYNC
RLV0N/LHSYNC
RLV1N/LCK
RLV2P/RED[9]
RLV1P/LDE
RLV2N/RED[8]
RLV4P/RED[5]
RLV4N/RED[4]
RLV5P/RED[3]
RLV5N/RED[2]
TCON16/WPWM
TCON12/DPM
TCON5/TP/SOE
TCON13/LEDON
NC_26
NC_19
NC_30
NC_15
NC_31
NC_29
NC_21
NC_20
NC_11
NC_17
NC_25
NC_24
ACKP/RLV3P/RED[3]
ACKM/RLV3N/RED[2]
A0P/RLV0P/RED[9]
A0M/RLV0N/RED[8]
A1P/RLV1P/RED[7]
A1M/RLV1N/RED[6]
A2P/RLV2P/RED[5]
A2M/RLV2N/RED[4]
A3P/RLV4P/RED[1]
A3M/RLV4N/RED[0]
A4P/RLV5P/GREEN[9]
A4M/RLV5N/GREEN[8]
BCKP/TCON13/GREEN[1]
BCKM/TCON12/GREEN[0]
B0P/RLV6P/GREEN[7]
B0M/RLV6N/GREEN[6]
B1P/RLV7P/GREEN[5]
B1M/RLV7N/GREEN[4]
B2P/RLV8P/GREEN[3]
B2M/RLV8N/GREEN[2]
B3P/TCON11/BLUE[9]
B3M/TCON10/BLUE[8]
B4P/TCON9/BLUE[7]
B4M/TCON8/BLUE[6]
C0P/LLV0P/BLUE[5]
C0M/LLV0N/BLUE[4]
C1P/LLV1P/BLUE[3]
C1M/LLV1N/BLUE[2]
C2P/LLV2P/BLUE[1]
C2M/LLV2N/BLUE[0]
GPIO0/TCON15/HSYNC/VDD_ODD
GPIO1/TCON14/VSYNC/VDD_EVEN
GPIO2/TCON7/LDE/GCLK4
GPIO3/TCON6/LCK/GCLK2
W26
W25
U26
U25
U24
V26
V25
V24
W24
Y26
Y25
Y24
AC26
AC25
AA26
AA25
AA24
AB26
AB25
AB24
AC24
AD26
AD25
AD24
AD23
AE23
AE26
AE25
AF26
AF25
AE24
AF24
AF23
AD22
AE22
AF22
AD19
AE19
AD21
AE21
AF21
AD20
AE20
AF20
AF19
AD18
AE18
AF18
AB22
AB23
AC23
AC22
AB16
AA14
AC15
Y16
AC16
AC14
AA16
AA15
Y10
AA11
AB15
AB14
CCKP/LLV3P
CCKM/LLV3N
C3P/LLV4P
C3M/LLV4N
C4P/LLV5P
C4M/LLV5N
DCKP/TCON5
DCKM/TCON4
D0P/LLV6P
D0M/LLV6N
D1P/LLV7P
D1M/LLV7N
D2P/LLV8P
D2M/LLV8N
D3P/TCON3
D3M/TCON2
D4P/TCON1
D4M/TCON0
FRC_SPI_CZ
FRC_GPIO1
FRC_SPI1_CK
FRC_GPIO8
FRC_SPI_DO
FRC_SPI1_DI
FRC_SPI_CK
FRC_SPI_DI
FRC_I2CS_DA
FRC_I2CS_CK
FRC_PWM0
FRC_PWM1
M_RFModule_RESET
S7M-PLUS_RM
IC101-*14
LGE107RC-RP [S7M+ RM]
AE1
W26
FRC_DDR3_A0/DDR2_NC
AF16
W25
FRC_DDR3_A1/DDR2_A6
AF1
U26
FRC_DDR3_A2/DDR2_A7
AE3
U25
FRC_DDR3_A3/DDR2_A1
AD14
U24
FRC_DDR3_A4/DDR2_CASZ
AD3
V26
FRC_DDR3_A5/DDR2_A10
AF15
V25
FRC_DDR3_A6/DDR2_A0
AF2
V24
FRC_DDR3_A7/DDR2_A5
AE15
W24
FRC_DDR3_A8/DDR2_A2
AD2
Y26
FRC_DDR3_A9/DDR2_A9
AD16
Y25
FRC_DDR3_A10/DDR2_A11
AD15
Y24
FRC_DDR3_A11/DDR2_A4
AE16
FRC_DDR3_A12/DDR2_A8
AC26
AC25
AA26
AF3
AA25
FRC_DDR3_BA0/DDR2_BA2
AF14
AA24
FRC_DDR3_BA1/DDR2_ODT
AD1
AB26
FRC_DDR3_BA2/DDR2_A12
AB25
AD13
AB24
FRC_DDR3_MCLK/DDR2_MCLK
AE14
AC24
FRC_DDR3_CKE/DDR2_RASZ
AE13
AD26
FRC_DDR3_MCLKZ/DDR2_MCLKZ
AD25
AD24
AE4
FRC_DDR3_ODT/DDR2_BA1
AD5
FRC_DDR3_RASZ/DDR2_WEZ
AF4
AD23
FRC_DDR3_CASZ/DDR2_CKE
AD4
AE23
FRC_DDR3_WEZ/DDR2_BA0
AE26
AE2
AE25
FRC_DDR3_RESETB/DDR2_A3
AF26
AF25
AF8
AE24
FRC_DDR3_DQSL/DDR2_DQS0
AD9
AF24
FRC_DDR3_DQSLB/DDR2_DQSB0
AF23
AE9
AD22
FRC_DDR3_DQSU/DDR2_DQS1
AF9
AE22
FRC_DDR3_DQSUB/DDR2_DQSB1
AF22
AE11
FRC_DDR3_DML/DDR2_DQ7
AF6
FRC_DDR3_DMU/DDR2_DQ11
AD19
AE6
AE19
FRC_DDR3_DQL0/DDR2_DQ6
AF11
AD21
FRC_DDR3_DQL1/DDR2_DQ0
AD6
AE21
FRC_DDR3_DQL2/DDR2_DQ1
AD12
AF21
FRC_DDR3_DQL3/DDR2_DQ2
AE5
AD20
FRC_DDR3_DQL4/DDR2_DQ4
AF12
AE20
FRC_DDR3_DQL5/DDR2_NC
AF5
AF20
FRC_DDR3_DQL6/DDR2_DQ3
AE12
AF19
FRC_DDR3_DQL7/DDR2_DQ5
AD18
AE10
AE18
FRC_DDR3_DQU0/DDR2_DQ8
AF7
AF18
FRC_DDR3_DQU1/DDR2_DQ14
AD11
FRC_DDR3_DQU2/DDR2_DQ13
AD7
FRC_DDR3_DQU3/DDR2_DQ12
AD10
AB22
FRC_DDR3_DQU4/DDR2_DQ15
AE7
AB23
FRC_DDR3_DQU5/DDR2_DQ9
AF10
AC23
FRC_DDR3_DQU6/DDR2_DQ10
AD8
AC22
FRC_DDR3_DQU7/DDR2_DQM1
AB16
AA14
AC15
Y16
AC16
AE8
AC14
FRC_DDR3_NC/DDR2_DQM0
Y11
AA16
FRC_VSYNC_LIKE
Y19
AA15
FRC_TESTPIN
Y10
AA11
AB15
AB14
AE1
AF16
AF1
AE3
AD14
AD3
AF15
AF2
AE15
AD2
AD16
AD15
AE16
AF3
AF14
AD1
AD13
AE14
AE13
AE4
AD5
AF4
AD4
AE2
AF8
AD9
AE9
AF9
AE11
AF6
AE6
AF11
AD6
AD12
AE5
AF12
AF5
AE12
AE10
AF7
AD11
AD7
AD10
AE7
AF10
AD8
AE8
Y11
Y19
ACKP/RLV3P/RED[3]
ACKM/RLV3N/RED[2]
A0P/RLV0P/RED[9]
A0M/RLV0N/RED[8]
A1P/RLV1P/RED[7]
A1M/RLV1N/RED[6]
A2P/RLV2P/RED[5]
A2M/RLV2N/RED[4]
A3P/RLV4P/RED[1]
A3M/RLV4N/RED[0]
A4P/RLV5P/GREEN[9]
A4M/RLV5N/GREEN[8]
BCKP/TCON13/GREEN[1]
BCKM/TCON12/GREEN[0]
B0P/RLV6P/GREEN[7]
B0M/RLV6N/GREEN[6]
B1P/RLV7P/GREEN[5]
B1M/RLV7N/GREEN[4]
B2P/RLV8P/GREEN[3]
B2M/RLV8N/GREEN[2]
B3P/TCON11/BLUE[9]
B3M/TCON10/BLUE[8]
B4P/TCON9/BLUE[7]
B4M/TCON8/BLUE[6]
C0P/LLV0P/BLUE[5]
C0M/LLV0N/BLUE[4]
C1P/LLV1P/BLUE[3]
C1M/LLV1N/BLUE[2]
C2P/LLV2P/BLUE[1]
C2M/LLV2N/BLUE[0]
GPIO0/TCON15/HSYNC/VDD_ODD
GPIO1/TCON14/VSYNC/VDD_EVEN
GPIO2/TCON7/LDE/GCLK4
GPIO3/TCON6/LCK/GCLK2
S7MR_BASIC
LGE107C-R-1 [S7MR BASIC]
FRC_DDR3_A0/DDR2_NC
FRC_DDR3_A1/DDR2_A6
FRC_DDR3_A2/DDR2_A7
FRC_DDR3_A3/DDR2_A1
FRC_DDR3_A4/DDR2_CASZ
FRC_DDR3_A5/DDR2_A10
FRC_DDR3_A6/DDR2_A0
FRC_DDR3_A7/DDR2_A5
FRC_DDR3_A8/DDR2_A2
FRC_DDR3_A9/DDR2_A9
FRC_DDR3_A10/DDR2_A11
FRC_DDR3_A11/DDR2_A4
FRC_DDR3_A12/DDR2_A8
FRC_DDR3_BA0/DDR2_BA2
FRC_DDR3_BA1/DDR2_ODT
FRC_DDR3_BA2/DDR2_A12
FRC_DDR3_MCLK/DDR2_MCLK
FRC_DDR3_CKE/DDR2_RASZ
FRC_DDR3_MCLKZ/DDR2_MCLKZ
FRC_DDR3_ODT/DDR2_BA1
FRC_DDR3_RASZ/DDR2_WEZ
FRC_DDR3_CASZ/DDR2_CKE
FRC_DDR3_WEZ/DDR2_BA0
FRC_DDR3_RESETB/DDR2_A3
FRC_DDR3_DQSL/DDR2_DQS0
FRC_DDR3_DQSLB/DDR2_DQSB0
FRC_DDR3_DQSU/DDR2_DQS1
FRC_DDR3_DQSUB/DDR2_DQSB1
FRC_DDR3_DML/DDR2_DQ7
FRC_DDR3_DMU/DDR2_DQ11
FRC_DDR3_DQL0/DDR2_DQ6
FRC_DDR3_DQL1/DDR2_DQ0
FRC_DDR3_DQL2/DDR2_DQ1
FRC_DDR3_DQL3/DDR2_DQ2
FRC_DDR3_DQL4/DDR2_DQ4
FRC_DDR3_DQL5/DDR2_NC
FRC_DDR3_DQL6/DDR2_DQ3
FRC_DDR3_DQL7/DDR2_DQ5
FRC_DDR3_DQU0/DDR2_DQ8
FRC_DDR3_DQU1/DDR2_DQ14
FRC_DDR3_DQU2/DDR2_DQ13
FRC_DDR3_DQU3/DDR2_DQ12
FRC_DDR3_DQU4/DDR2_DQ15
FRC_DDR3_DQU5/DDR2_DQ9
FRC_DDR3_DQU6/DDR2_DQ10
FRC_DDR3_DQU7/DDR2_DQM1
FRC_DDR3_NC/DDR2_DQM0
FRC_REXT
FRC_TESTPIN
CCKP/LLV3P
CCKM/LLV3N
C3P/LLV4P
C3M/LLV4N
C4P/LLV5P
C4M/LLV5N
DCKP/TCON5
DCKM/TCON4
D0P/LLV6P
D0M/LLV6N
D1P/LLV7P
D1M/LLV7N
D2P/LLV8P
D2M/LLV8N
D3P/TCON3
D3M/TCON2
D4P/TCON1
D4M/TCON0
FRC_SPI_CZ
FRC_GPIO1
FRC_SPI1_CK
FRC_GPIO8
FRC_SPI_DO
FRC_SPI1_DI
FRC_SPI_CK
FRC_SPI_DI
FRC_I2CS_DA
FRC_I2CS_CK
FRC_PWM0
FRC_PWM1
3D SG
S7R S7MR
S7R_BASIC
IC101-*1
LGE101C-R-1 [S7R BASIC]
AE1
NC_48
LVACLKP/LLV6P/BLUE[3]
AF16
NC_78
LVACLKN/LLV6N/BLUE[2]
AF1
NC_64
LVA0P/LLV3P/BLUE[9]
AE3
NC_50
LVA0N/LLV3N/BLUE[8]
AD14
NC_45
LVA1P/LLV4P/BLUE[7]
AD3
NC_34
LVA1N/LLV4N/BLUE[6]
AF15
NC_77
LVA2P/LLV5P/BLUE[5]
AF2
NC_65
LVA2N/LLV5N/BLUE[4]
AE15
NC_62
LVA3P/LLV7P/BLUE[1]
AD2
NC_33
LVA3N/LLV7N/BLUE[0]
AD16
NC_47
AD15
NC_46
AE16
NC_63
LVBCLKP/LLV0P/GREEN[5]
LVBCLKN/LLV0N/GREEN[4]
LVB0P/RLV6P/RED[1]
AF3
NC_66
LVB0N/RLV6N/RED[0]
AF14
NC_76
LVB1P/RLV7P/GREEN[9]
AD1
NC_32
LVB1N/RLV7N/GREEN[8]
LVB2P/RLV8P/GREEN[7]
AD13
NC_44
LVB2N/RLV8N/GREEN[6]
AE14
NC_61
LVB3P/LLV1P/GREEN[3]
AE13
NC_60
LVB3N/LLV1N/GREEN[2]
LVB4P/LLV0P/GREEN[1]
LVB4N/LLV0N/GREEN[0]
AE4
NC_51
AD5
NC_36
AF4
NC_67
AD4
NC_35
AE2
NC_49
AF8
NC_71
AD9
NC_40
AE9
NC_56
AF9
NC_72
AE11
NC_58
AF6
NC_69
TCON3/OE/GOE/GCLK2
AE6
NC_53
TCON15/SCAN_BLK1
AF11
NC_74
TCON18/CS7/GCLK5
AD6
NC_37
TCON19/CS8/GCLK6
AD12
NC_43
TCON11/CS5/HCON
AE5
NC_52
TCON10/CS4/OPT_N
AF12
NC_75
TCON9/CS3/OPT_P
AF5
NC_68
AE12
NC_59
TCON1/STV/GSP/VST
AE10
NC_57
AF7
NC_70
TCON14/SACN_BLK
AD11
NC_42
AD7
NC_38
AD10
NC_41
TCON21/CS10/VGH_ODD
AE7
NC_54
TCON20/CS9/VGH_EVEN
AF10
NC_73
AD8
NC_39
TCON17/CS6/GCLK4
AE8
NC_55
Y11
NC_12
Y19
GND_105
I2C_SCL
I2C_SDA
S7R_MS10
IC101-*2
LGE101C-R [S7R MS10]
AE1
W26
NC_48
LVACLKP/LLV6P/BLUE[3]
AF16
W25
NC_78
LVACLKN/LLV6N/BLUE[2]
AF1
U26
NC_64
LVA0P/LLV3P/BLUE[9]
AE3
U25
NC_50
LVA0N/LLV3N/BLUE[8]
AD14
U24
NC_45
LVA1P/LLV4P/BLUE[7]
AD3
V26
NC_34
LVA1N/LLV4N/BLUE[6]
AF15
V25
NC_77
LVA2P/LLV5P/BLUE[5]
AF2
V24
NC_65
LVA2N/LLV5N/BLUE[4]
AE15
W24
NC_62
LVA3P/LLV7P/BLUE[1]
AD2
Y26
NC_33
LVA3N/LLV7N/BLUE[0]
AD16
Y25
NC_47
LVA4P/LLV8P
AD15
Y24
NC_46
LVA4N/LLV8N
AE16
NC_63
AC26
AC25
AA26
AA25
AA24
AB26
AB25
AB24
AC24
AD26
AD25
AD24
AD23
RLV3P/RED[7]
AE23
RLV3N/RED[6]
AE26
RLV0P/LVSYNC
AE25
RLV0N/LHSYNC
AF26
RLV1N/LCK
AF25
RLV2P/RED[9]
AE24
RLV1P/LDE
AF24
RLV2N/RED[8]
AF23
RLV4P/RED[5]
AD22
RLV4N/RED[4]
AE22
RLV5P/RED[3]
AF22
RLV5N/RED[2]
AD19
AE19
AD21
AE21
AF21
AD20
AE20
AF20
TCON16/WPWM
AF19
TCON12/DPM
AD18
AE18
TCON5/TP/SOE
AF18
AB22
AB23
AC23
TCON13/LEDON
AC22
AB16
NC_26
AA14
NC_19
AC15
NC_30
Y16
NC_15
AC16
NC_31
AC14
NC_29
AA16
NC_21
AA15
NC_20
Y10
NC_11
AA11
NC_17
AB15
NC_25
AB14
NC_24
LVBCLKP/LLV0P/GREEN[5]
LVBCLKN/LLV0N/GREEN[4]
LVB0P/RLV6P/RED[1]
AF3
NC_66
LVB0N/RLV6N/RED[0]
AF14
NC_76
LVB1P/RLV7P/GREEN[9]
AD1
NC_32
LVB1N/RLV7N/GREEN[8]
LVB2P/RLV8P/GREEN[7]
AD13
NC_44
LVB2N/RLV8N/GREEN[6]
AE14
NC_61
LVB3P/LLV1P/GREEN[3]
AE13
NC_60
LVB3N/LLV1N/GREEN[2]
LVB4P/LLV0P/GREEN[1]
LVB4N/LLV0N/GREEN[0]
AE4
NC_51
AD5
NC_36
AF4
NC_67
AD4
NC_35
AE2
NC_49
AF8
NC_71
AD9
NC_40
AE9
NC_56
AF9
NC_72
AE11
NC_58
AF6
NC_69
TCON3/OE/GOE/GCLK2
AE6
NC_53
AF11
NC_74
AD6
NC_37
AD12
NC_43
AE5
NC_52
AF12
NC_75
AF5
NC_68
AE12
NC_59
AE10
NC_57
AF7
NC_70
AD11
NC_42
AD7
NC_38
AD10
NC_41
TCON21/CS10/VGH_ODD
AE7
NC_54
TCON20/CS9/VGH_EVEN
AF10
NC_73
AD8
NC_39
AE8
NC_55
Y11
NC_12
Y19
GND_105
S7R_DivX
LGE101DC-R-1 [S7R DIVX]
AE1
W26
NC_48
AF16
W25
NC_78
AF1
U26
NC_64
AE3
U25
NC_50
AD14
U24
NC_45
AD3
V26
NC_34
AF15
V25
NC_77
AF2
V24
NC_65
AE15
W24
NC_62
AD2
Y26
NC_33
AD16
Y25
NC_47
LVA4P/LLV8P
AD15
Y24
NC_46
LVA4N/LLV8N
AE16
NC_63
AC26
AC25
AA26
AF3
AA25
NC_66
AF14
AA24
NC_76
AD1
AB26
NC_32
AB25
AD13
AB24
NC_44
AE14
AC24
NC_61
AE13
AD26
NC_60
AD25
AD24
AE4
NC_51
AD5
NC_36
AF4
AD23
NC_67
RLV3P/RED[7]
AD4
AE23
NC_35
RLV3N/RED[6]
AE26
RLV0P/LVSYNC
AE2
AE25
NC_49
RLV0N/LHSYNC
AF26
RLV1N/LCK
AF25
RLV2P/RED[9]
AF8
AE24
NC_71
RLV1P/LDE
AD9
AF24
NC_40
RLV2N/RED[8]
AF23
RLV4P/RED[5]
AE9
AD22
NC_56
RLV4N/RED[4]
AF9
AE22
NC_72
RLV5P/RED[3]
AF22
RLV5N/RED[2]
AE11
NC_58
AF6
NC_69
AD19
AE6
AE19
NC_53
TCON15/SCAN_BLK1
AF11
AD21
NC_74
TCON18/CS7/GCLK5
AD6
AE21
NC_37
TCON19/CS8/GCLK6
AD12
AF21
NC_43
TCON11/CS5/HCON
AE5
AD20
NC_52
TCON10/CS4/OPT_N
AF12
AE20
NC_75
TCON9/CS3/OPT_P
AF5
AF20
NC_68
TCON16/WPWM
AE12
AF19
NC_59
TCON12/DPM
AD18
TCON1/STV/GSP/VST
AE10
AE18
NC_57
TCON5/TP/SOE
AF7
AF18
NC_70
TCON14/SACN_BLK
AD11
NC_42
AD7
NC_38
AD10
AB22
NC_41
AE7
AB23
NC_54
AF10
AC23
NC_73
TCON13/LEDON
AD8
AC22
NC_39
TCON17/CS6/GCLK4
AB16
NC_26
AA14
NC_19
AC15
NC_30
Y16
NC_15
AC16
NC_31
AE8
AC14
NC_55
NC_29
Y11
AA16
NC_12
NC_21
Y19
AA15
GND_105
NC_20
Y10
NC_11
AA11
NC_17
AB15
NC_25
AB14
NC_24
S7MR-PLUS
S7M-PLUS_BASIC
AE1
AF16
AF1
AE3
AD14
AD3
AF15
AF2
AE15
AD2
AD16
AD15
AE16
AF3
AF14
AD1
AD13
AE14
AE13
AE4
AD5
AF4
AD4
AE2
AF8
AD9
AE9
AF9
AE11
AF6
AE6
AF11
AD6
AD12
AE5
AF12
AF5
AE12
AE10
AF7
AD11
AD7
AD10
AE7
AF10
AD8
AE8
Y11
Y19
IC101-*3
LGE107C-RP-1 [S7M+ BASIC]
FRC_DDR3_A0/DDR2_NC
FRC_DDR3_A1/DDR2_A6
FRC_DDR3_A2/DDR2_A7
FRC_DDR3_A3/DDR2_A1
FRC_DDR3_A4/DDR2_CASZ
FRC_DDR3_A5/DDR2_A10
FRC_DDR3_A6/DDR2_A0
FRC_DDR3_A7/DDR2_A5
FRC_DDR3_A8/DDR2_A2
FRC_DDR3_A9/DDR2_A9
FRC_DDR3_A10/DDR2_A11
FRC_DDR3_A11/DDR2_A4
FRC_DDR3_A12/DDR2_A8
FRC_DDR3_BA0/DDR2_BA2
FRC_DDR3_BA1/DDR2_ODT
FRC_DDR3_BA2/DDR2_A12
FRC_DDR3_MCLK/DDR2_MCLK
FRC_DDR3_CKE/DDR2_RASZ
FRC_DDR3_MCLKZ/DDR2_MCLKZ
FRC_DDR3_ODT/DDR2_BA1
FRC_DDR3_RASZ/DDR2_WEZ
FRC_DDR3_CASZ/DDR2_CKE
FRC_DDR3_WEZ/DDR2_BA0
FRC_DDR3_RESETB/DDR2_A3
FRC_DDR3_DQSL/DDR2_DQS0
FRC_DDR3_DQSLB/DDR2_DQSB0
FRC_DDR3_DQSU/DDR2_DQS1
FRC_DDR3_DQSUB/DDR2_DQSB1
FRC_DDR3_DML/DDR2_DQ7
FRC_DDR3_DMU/DDR2_DQ11
FRC_DDR3_DQL0/DDR2_DQ6
FRC_DDR3_DQL1/DDR2_DQ0
FRC_DDR3_DQL2/DDR2_DQ1
FRC_DDR3_DQL3/DDR2_DQ2
FRC_DDR3_DQL4/DDR2_DQ4
FRC_DDR3_DQL5/DDR2_NC
FRC_DDR3_DQL6/DDR2_DQ3
FRC_DDR3_DQL7/DDR2_DQ5
FRC_DDR3_DQU0/DDR2_DQ8
FRC_DDR3_DQU1/DDR2_DQ14
FRC_DDR3_DQU2/DDR2_DQ13
FRC_DDR3_DQU3/DDR2_DQ12
FRC_DDR3_DQU4/DDR2_DQ15
FRC_DDR3_DQU5/DDR2_DQ9
FRC_DDR3_DQU6/DDR2_DQ10
FRC_DDR3_DQU7/DDR2_DQM1
FRC_DDR3_NC/DDR2_DQM0
FRC_VSYNC_LIKE
FRC_TESTPIN
LVACLKP/LLV6P/BLUE[3]
LVACLKN/LLV6N/BLUE[2]
LVA0P/LLV3P/BLUE[9]
LVA0N/LLV3N/BLUE[8]
LVA1P/LLV4P/BLUE[7]
LVA1N/LLV4N/BLUE[6]
LVA2P/LLV5P/BLUE[5]
LVA2N/LLV5N/BLUE[4]
LVA3P/LLV7P/BLUE[1]
LVA3N/LLV7N/BLUE[0]
LVBCLKP/LLV0P/GREEN[5]
LVBCLKN/LLV0N/GREEN[4]
LVB0P/RLV6P/RED[1]
LVB0N/RLV6N/RED[0]
LVB1P/RLV7P/GREEN[9]
LVB1N/RLV7N/GREEN[8]
LVB2P/RLV8P/GREEN[7]
LVB2N/RLV8N/GREEN[6]
LVB3P/LLV1P/GREEN[3]
LVB3N/LLV1N/GREEN[2]
LVB4P/LLV0P/GREEN[1]
LVB4N/LLV0N/GREEN[0]
TCON3/OE/GOE/GCLK2
TCON21/CS10/VGH_ODD
TCON20/CS9/VGH_EVEN
IC101-*11
LVA4P/LLV8P
LVA4N/LLV8N
RLV3P/RED[7]
RLV3N/RED[6]
RLV0P/LVSYNC
RLV0N/LHSYNC
RLV1N/LCK
RLV2P/RED[9]
RLV1P/LDE
RLV2N/RED[8]
RLV4P/RED[5]
RLV4N/RED[4]
RLV5P/RED[3]
RLV5N/RED[2]
TCON15/SCAN_BLK1
TCON18/CS7/GCLK5
TCON19/CS8/GCLK6
TCON11/CS5/HCON
TCON10/CS4/OPT_N
TCON9/CS3/OPT_P
TCON16/WPWM
TCON12/DPM
TCON1/STV/GSP/VST
TCON5/TP/SOE
TCON14/SACN_BLK
TCON13/LEDON
TCON17/CS6/GCLK4
GPIO0/TCON15/HSYNC/VDD_ODD
GPIO1/TCON14/VSYNC/VDD_EVEN
GPIO2/TCON7/LDE/GCLK4
GPIO3/TCON6/LCK/GCLK2
NC_26
NC_19
NC_30
NC_15
NC_31
NC_29
NC_21
NC_20
NC_11
NC_17
NC_25
NC_24
ACKP/RLV3P/RED[3]
ACKM/RLV3N/RED[2]
A0P/RLV0P/RED[9]
A0M/RLV0N/RED[8]
A1P/RLV1P/RED[7]
A1M/RLV1N/RED[6]
A2P/RLV2P/RED[5]
A2M/RLV2N/RED[4]
A3P/RLV4P/RED[1]
A3M/RLV4N/RED[0]
A4P/RLV5P/GREEN[9]
A4M/RLV5N/GREEN[8]
BCKP/TCON13/GREEN[1]
BCKM/TCON12/GREEN[0]
B0P/RLV6P/GREEN[7]
B0M/RLV6N/GREEN[6]
B1P/RLV7P/GREEN[5]
B1M/RLV7N/GREEN[4]
B2P/RLV8P/GREEN[3]
B2M/RLV8N/GREEN[2]
B3P/TCON11/BLUE[9]
B3M/TCON10/BLUE[8]
B4P/TCON9/BLUE[7]
B4M/TCON8/BLUE[6]
C0P/LLV0P/BLUE[5]
C0M/LLV0N/BLUE[4]
C1P/LLV1P/BLUE[3]
C1M/LLV1N/BLUE[2]
C2P/LLV2P/BLUE[1]
C2M/LLV2N/BLUE[0]
W26
W25
U26
U25
U24
V26
V25
V24
W24
Y26
Y25
Y24
AC26
AC25
AA26
AA25
AA24
AB26
AB25
AB24
AC24
AD26
AD25
AD24
AD23
AE23
AE26
AE25
AF26
AF25
AE24
AF24
AF23
AD22
AE22
AF22
AD19
AE19
AD21
AE21
AF21
AD20
AE20
AF20
AF19
AD18
AE18
AF18
AB22
AB23
AC23
AC22
AB16
AA14
AC15
Y16
AC16
AC14
AA16
AA15
Y10
AA11
AB15
AB14
CCKP/LLV3P
CCKM/LLV3N
C3P/LLV4P
C3M/LLV4N
C4P/LLV5P
C4M/LLV5N
DCKP/TCON5
DCKM/TCON4
D0P/LLV6P
D0M/LLV6N
D1P/LLV7P
D1M/LLV7N
D2P/LLV8P
D2M/LLV8N
D3P/TCON3
D3M/TCON2
D4P/TCON1
D4M/TCON0
FRC_SPI_CZ
FRC_GPIO1
FRC_SPI1_CK
FRC_GPIO8
FRC_SPI_DO
FRC_SPI1_DI
FRC_SPI_CK
FRC_SPI_DI
FRC_I2CS_DA
FRC_I2CS_CK
FRC_PWM0
FRC_PWM1
S7R_DivX_MS10
LGE101DC-R [S7R DIVX/MS10]
AE1
NC_48
AF16
NC_78
AF1
NC_64
AE3
NC_50
AD14
NC_45
AD3
NC_34
AF15
NC_77
AF2
NC_65
AE15
NC_62
AD2
NC_33
AD16
NC_47
AD15
NC_46
AE16
NC_63
AF3
NC_66
AF14
NC_76
AD1
NC_32
AD13
NC_44
AE14
NC_61
AE13
NC_60
AE4
NC_51
AD5
NC_36
AF4
NC_67
AD4
NC_35
AE2
NC_49
AF8
NC_71
AD9
NC_40
AE9
NC_56
AF9
NC_72
AE11
NC_58
AF6
NC_69
AE6
NC_53
AF11
NC_74
AD6
NC_37
AD12
NC_43
AE5
NC_52
AF12
NC_75
AF5
NC_68
AE12
NC_59
AE10
NC_57
AF7
NC_70
AD11
NC_42
AD7
NC_38
AD10
NC_41
AE7
NC_54
AF10
NC_73
AD8
NC_39
AE8
NC_55
Y11
NC_12
Y19
GND_105
S7M-PLUS_MS10
AE1
W26
FRC_DDR3_A0/DDR2_NC
AF16
W25
FRC_DDR3_A1/DDR2_A6
AF1
U26
FRC_DDR3_A2/DDR2_A7
AE3
U25
FRC_DDR3_A3/DDR2_A1
AD14
U24
FRC_DDR3_A4/DDR2_CASZ
AD3
V26
FRC_DDR3_A5/DDR2_A10
AF15
V25
FRC_DDR3_A6/DDR2_A0
AF2
V24
FRC_DDR3_A7/DDR2_A5
AE15
W24
FRC_DDR3_A8/DDR2_A2
AD2
Y26
FRC_DDR3_A9/DDR2_A9
AD16
Y25
FRC_DDR3_A10/DDR2_A11
AD15
Y24
FRC_DDR3_A11/DDR2_A4
AE16
FRC_DDR3_A12/DDR2_A8
AC26
AC25
AA26
AF3
AA25
FRC_DDR3_BA0/DDR2_BA2
AF14
AA24
FRC_DDR3_BA1/DDR2_ODT
AD1
AB26
FRC_DDR3_BA2/DDR2_A12
AB25
AD13
AB24
FRC_DDR3_MCLK/DDR2_MCLK
AE14
AC24
FRC_DDR3_CKE/DDR2_RASZ
AE13
AD26
FRC_DDR3_MCLKZ/DDR2_MCLKZ
AD25
AD24
AE4
FRC_DDR3_ODT/DDR2_BA1
AD5
FRC_DDR3_RASZ/DDR2_WEZ
AF4
AD23
FRC_DDR3_CASZ/DDR2_CKE
AD4
AE23
FRC_DDR3_WEZ/DDR2_BA0
AE26
AE2
AE25
FRC_DDR3_RESETB/DDR2_A3
AF26
AF25
AF8
AE24
FRC_DDR3_DQSL/DDR2_DQS0
AD9
AF24
FRC_DDR3_DQSLB/DDR2_DQSB0
AF23
AE9
AD22
FRC_DDR3_DQSU/DDR2_DQS1
AF9
AE22
FRC_DDR3_DQSUB/DDR2_DQSB1
AF22
AE11
FRC_DDR3_DML/DDR2_DQ7
AF6
FRC_DDR3_DMU/DDR2_DQ11
AD19
AE6
AE19
FRC_DDR3_DQL0/DDR2_DQ6
AF11
AD21
FRC_DDR3_DQL1/DDR2_DQ0
AD6
AE21
FRC_DDR3_DQL2/DDR2_DQ1
AD12
AF21
FRC_DDR3_DQL3/DDR2_DQ2
AE5
AD20
FRC_DDR3_DQL4/DDR2_DQ4
AF12
AE20
FRC_DDR3_DQL5/DDR2_NC
AF5
AF20
FRC_DDR3_DQL6/DDR2_DQ3
AE12
AF19
FRC_DDR3_DQL7/DDR2_DQ5
AD18
AE10
AE18
FRC_DDR3_DQU0/DDR2_DQ8
AF7
AF18
FRC_DDR3_DQU1/DDR2_DQ14
AD11
FRC_DDR3_DQU2/DDR2_DQ13
AD7
FRC_DDR3_DQU3/DDR2_DQ12
AD10
AB22
FRC_DDR3_DQU4/DDR2_DQ15
AE7
AB23
FRC_DDR3_DQU5/DDR2_DQ9
AF10
AC23
FRC_DDR3_DQU6/DDR2_DQ10
AD8
AC22
FRC_DDR3_DQU7/DDR2_DQM1
AB16
AA14
AC15
Y16
AC16
AE8
AC14
FRC_DDR3_NC/DDR2_DQM0
Y11
AA16
FRC_VSYNC_LIKE
Y19
AA15
FRC_TESTPIN
Y10
AA11
AB15
AB14
IC101-*4
LVACLKP/LLV6P/BLUE[3]
LVACLKN/LLV6N/BLUE[2]
LVA0P/LLV3P/BLUE[9]
LVA0N/LLV3N/BLUE[8]
LVA1P/LLV4P/BLUE[7]
LVA1N/LLV4N/BLUE[6]
LVA2P/LLV5P/BLUE[5]
LVA2N/LLV5N/BLUE[4]
LVA3P/LLV7P/BLUE[1]
LVA3N/LLV7N/BLUE[0]
LVBCLKP/LLV0P/GREEN[5]
LVBCLKN/LLV0N/GREEN[4]
LVB0P/RLV6P/RED[1]
LVB0N/RLV6N/RED[0]
LVB1P/RLV7P/GREEN[9]
LVB1N/RLV7N/GREEN[8]
LVB2P/RLV8P/GREEN[7]
LVB2N/RLV8N/GREEN[6]
LVB3P/LLV1P/GREEN[3]
LVB3N/LLV1N/GREEN[2]
LVB4P/LLV0P/GREEN[1]
LVB4N/LLV0N/GREEN[0]
TCON3/OE/GOE/GCLK2
TCON21/CS10/VGH_ODD
TCON20/CS9/VGH_EVEN
IC101-*12
LGE107C-RP [S7M+ MS10]
LVA4P/LLV8P
LVA4N/LLV8N
RLV3P/RED[7]
RLV3N/RED[6]
RLV0P/LVSYNC
RLV0N/LHSYNC
RLV1N/LCK
RLV2P/RED[9]
RLV1P/LDE
RLV2N/RED[8]
RLV4P/RED[5]
RLV4N/RED[4]
RLV5P/RED[3]
RLV5N/RED[2]
TCON15/SCAN_BLK1
TCON18/CS7/GCLK5
TCON19/CS8/GCLK6
TCON11/CS5/HCON
TCON10/CS4/OPT_N
TCON9/CS3/OPT_P
TCON16/WPWM
TCON12/DPM
TCON1/STV/GSP/VST
TCON5/TP/SOE
TCON14/SACN_BLK
TCON13/LEDON
TCON17/CS6/GCLK4
BCKP/TCON13/GREEN[1]
BCKM/TCON12/GREEN[0]
GPIO0/TCON15/HSYNC/VDD_ODD
GPIO1/TCON14/VSYNC/VDD_EVEN
GPIO2/TCON7/LDE/GCLK4
GPIO3/TCON6/LCK/GCLK2
NC_26
NC_19
NC_30
NC_15
NC_31
NC_29
NC_21
NC_20
NC_11
NC_17
NC_25
NC_24
ACKP/RLV3P/RED[3]
ACKM/RLV3N/RED[2]
A0P/RLV0P/RED[9]
A0M/RLV0N/RED[8]
A1P/RLV1P/RED[7]
A1M/RLV1N/RED[6]
A2P/RLV2P/RED[5]
A2M/RLV2N/RED[4]
A3P/RLV4P/RED[1]
A3M/RLV4N/RED[0]
A4P/RLV5P/GREEN[9]
A4M/RLV5N/GREEN[8]
B0P/RLV6P/GREEN[7]
B0M/RLV6N/GREEN[6]
B1P/RLV7P/GREEN[5]
B1M/RLV7N/GREEN[4]
B2P/RLV8P/GREEN[3]
B2M/RLV8N/GREEN[2]
B3P/TCON11/BLUE[9]
B3M/TCON10/BLUE[8]
B4P/TCON9/BLUE[7]
B4M/TCON8/BLUE[6]
C0P/LLV0P/BLUE[5]
C0M/LLV0N/BLUE[4]
C1P/LLV1P/BLUE[3]
C1M/LLV1N/BLUE[2]
C2P/LLV2P/BLUE[1]
C2M/LLV2N/BLUE[0]
W26
W25
U26
U25
U24
V26
V25
V24
W24
Y26
Y25
Y24
AC26
AC25
AA26
AA25
AA24
AB26
AB25
AB24
AC24
AD26
AD25
AD24
AD23
AE23
AE26
AE25
AF26
AF25
AE24
AF24
AF23
AD22
AE22
AF22
AD19
AE19
AD21
AE21
AF21
AD20
AE20
AF20
AF19
AD18
AE18
AF18
AB22
AB23
AC23
AC22
AB16
AA14
AC15
Y16
AC16
AC14
AA16
AA15
Y10
AA11
AB15
AB14
CCKP/LLV3P
CCKM/LLV3N
C3P/LLV4P
C3M/LLV4N
C4P/LLV5P
C4M/LLV5N
DCKP/TCON5
DCKM/TCON4
D0P/LLV6P
D0M/LLV6N
D1P/LLV7P
D1M/LLV7N
D2P/LLV8P
D2M/LLV8N
D3P/TCON3
D3M/TCON2
D4P/TCON1
D4M/TCON0
FRC_SPI_CZ
FRC_GPIO1
FRC_SPI1_CK
FRC_GPIO8
FRC_SPI_DO
FRC_SPI1_DI
FRC_SPI_CK
FRC_SPI_DI
FRC_I2CS_DA
FRC_I2CS_CK
FRC_PWM0
FRC_PWM1
AE1
NC_48
AF16
NC_78
AF1
NC_64
AE3
NC_50
AD14
NC_45
AD3
NC_34
AF15
NC_77
AF2
NC_65
AE15
NC_62
AD2
NC_33
AD16
NC_47
AD15
NC_46
AE16
NC_63
AF3
NC_66
AF14
NC_76
AD1
NC_32
AD13
NC_44
AE14
NC_61
AE13
NC_60
AE4
NC_51
AD5
NC_36
AF4
NC_67
AD4
NC_35
AE2
NC_49
AF8
NC_71
AD9
NC_40
AE9
NC_56
AF9
NC_72
AE11
NC_58
AF6
NC_69
AE6
NC_53
AF11
NC_74
AD6
NC_37
AD12
NC_43
AE5
NC_52
AF12
NC_75
AF5
NC_68
AE12
NC_59
AE10
NC_57
AF7
NC_70
AD11
NC_42
AD7
NC_38
AD10
NC_41
AE7
NC_54
AF10
NC_73
AD8
NC_39
AE8
NC_55
Y11
NC_12
Y19
GND_105
S7M-PLUS_DivX
W26
W25
U26
U25
U24
V26
V25
V24
W24
Y26
Y25
Y24
AC26
AC25
AA26
AA25
AA24
AB26
AB25
AB24
AC24
AD26
AD25
AD24
AD23
AE23
AE26
AE25
AF26
AF25
AE24
AF24
AF23
AD22
AE22
AF22
AD19
AE19
AD21
AE21
AF21
AD20
AE20
AF20
AF19
AD18
AE18
AF18
AB22
AB23
AC23
AC22
AB16
AA14
AC15
Y16
AC16
AC14
AA16
AA15
Y10
AA11
AB15
AB14
S7R_RM
IC101-*5
LGE101RC-R [S7R RM]
LGE107DC-RP-1 [S7M+ DIVX]
AE1
FRC_DDR3_A0/DDR2_NC
AF16
FRC_DDR3_A1/DDR2_A6
AF1
FRC_DDR3_A2/DDR2_A7
AE3
FRC_DDR3_A3/DDR2_A1
AD14
FRC_DDR3_A4/DDR2_CASZ
AD3
FRC_DDR3_A5/DDR2_A10
AF15
FRC_DDR3_A6/DDR2_A0
AF2
FRC_DDR3_A7/DDR2_A5
AE15
FRC_DDR3_A8/DDR2_A2
AD2
FRC_DDR3_A9/DDR2_A9
AD16
FRC_DDR3_A10/DDR2_A11
AD15
FRC_DDR3_A11/DDR2_A4
AE16
FRC_DDR3_A12/DDR2_A8
AF3
FRC_DDR3_BA0/DDR2_BA2
AF14
FRC_DDR3_BA1/DDR2_ODT
AD1
FRC_DDR3_BA2/DDR2_A12
AD13
FRC_DDR3_MCLK/DDR2_MCLK
AE14
FRC_DDR3_CKE/DDR2_RASZ
AE13
FRC_DDR3_MCLKZ/DDR2_MCLKZ
AE4
FRC_DDR3_ODT/DDR2_BA1
AD5
FRC_DDR3_RASZ/DDR2_WEZ
AF4
FRC_DDR3_CASZ/DDR2_CKE
AD4
FRC_DDR3_WEZ/DDR2_BA0
AE2
FRC_DDR3_RESETB/DDR2_A3
AF8
FRC_DDR3_DQSL/DDR2_DQS0
AD9
FRC_DDR3_DQSLB/DDR2_DQSB0
AE9
FRC_DDR3_DQSU/DDR2_DQS1
AF9
FRC_DDR3_DQSUB/DDR2_DQSB1
AE11
FRC_DDR3_DML/DDR2_DQ7
AF6
FRC_DDR3_DMU/DDR2_DQ11
AE6
FRC_DDR3_DQL0/DDR2_DQ6
AF11
FRC_DDR3_DQL1/DDR2_DQ0
AD6
FRC_DDR3_DQL2/DDR2_DQ1
AD12
FRC_DDR3_DQL3/DDR2_DQ2
AE5
FRC_DDR3_DQL4/DDR2_DQ4
AF12
FRC_DDR3_DQL5/DDR2_NC
AF5
FRC_DDR3_DQL6/DDR2_DQ3
AE12
FRC_DDR3_DQL7/DDR2_DQ5
AE10
FRC_DDR3_DQU0/DDR2_DQ8
AF7
FRC_DDR3_DQU1/DDR2_DQ14
AD11
FRC_DDR3_DQU2/DDR2_DQ13
AD7
FRC_DDR3_DQU3/DDR2_DQ12
AD10
FRC_DDR3_DQU4/DDR2_DQ15
AE7
FRC_DDR3_DQU5/DDR2_DQ9
AF10
FRC_DDR3_DQU6/DDR2_DQ10
AD8
FRC_DDR3_DQU7/DDR2_DQM1
AE8
FRC_DDR3_NC/DDR2_DQM0
Y11
FRC_VSYNC_LIKE
Y19
FRC_TESTPIN
/PCM_REG
/PCM_OE
/PCM_WE
/PCM_IORD
/PCM_IOWR
/PCM_CE
/PCM_IRQA
/PCM_CD
/PCM_WAIT
PCM_RST
22
IC101-*6
GPIO1/TCON14/VSYNC/VDD_EVEN
W26
W25
U26
U25
U24
V26
V25
V24
W24
Y26
Y25
Y24
AC26
AC25
AA26
AA25
AA24
AB26
AB25
AB24
AC24
AD26
AD25
AD24
AD23
AE23
AE26
AE25
AF26
AF25
AE24
AF24
AF23
AD22
AE22
AF22
AD19
AE19
AD21
AE21
AF21
AD20
AE20
AF20
AF19
AD18
AE18
AF18
AB22
AB23
AC23
AC22
AB16
AA14
AC15
Y16
AC16
AC14
AA16
AA15
Y10
AA11
AB15
AB14
DSUB_DET
MODEL_OPT_3
PCM_5V_CTL
/RST-PHY
ACKP/RLV3P/RED[3]
ACKM/RLV3N/RED[2]
A0P/RLV0P/RED[9]
A0M/RLV0N/RED[8]
A1P/RLV1P/RED[7]
A1M/RLV1N/RED[6]
A2P/RLV2P/RED[5]
A2M/RLV2N/RED[4]
A3P/RLV4P/RED[1]
A3M/RLV4N/RED[0]
A4P/RLV5P/GREEN[9]
A4M/RLV5N/GREEN[8]
BCKP/TCON13/GREEN[1]
BCKM/TCON12/GREEN[0]
B0P/RLV6P/GREEN[7]
B0M/RLV6N/GREEN[6]
B1P/RLV7P/GREEN[5]
B1M/RLV7N/GREEN[4]
B2P/RLV8P/GREEN[3]
B2M/RLV8N/GREEN[2]
B3P/TCON11/BLUE[9]
B3M/TCON10/BLUE[8]
B4P/TCON9/BLUE[7]
B4M/TCON8/BLUE[6]
CCKP/LLV3P
CCKM/LLV3N
C0P/LLV0P/BLUE[5]
C0M/LLV0N/BLUE[4]
C1P/LLV1P/BLUE[3]
C1M/LLV1N/BLUE[2]
C2P/LLV2P/BLUE[1]
C2M/LLV2N/BLUE[0]
C3P/LLV4P
C3M/LLV4N
C4P/LLV5P
C4M/LLV5N
DCKP/TCON5
DCKM/TCON4
D0P/LLV6P
D0M/LLV6N
D1P/LLV7P
D1M/LLV7N
D2P/LLV8P
D2M/LLV8N
D3P/TCON3
D3M/TCON2
D4P/TCON1
D4M/TCON0
GPIO0/TCON15/HSYNC/VDD_ODD
GPIO2/TCON7/LDE/GCLK4
GPIO3/TCON6/LCK/GCLK2
FRC_GPIO0/UART_RX
FRC_GPIO1
FRC_GPIO3
FRC_GPIO8
FRC_GPIO9/UART_TX
FRC_GPIO10
FRC_I2CM_DA
FRC_I2CM_CK
FRC_I2CS_DA
FRC_I2CS_CK
FRC_PWM0
FRC_PWM1
R134 22
R135 22
R136 22
R137 22
R138 22
R139 22
PWM0
PWM1
PWM2
SC_RE2
SC_RE1
AE1
W26
FRC_DDR3_A0/DDR2_NC
AF16
W25
FRC_DDR3_A1/DDR2_A6
AF1
U26
FRC_DDR3_A2/DDR2_A7
AE3
U25
FRC_DDR3_A3/DDR2_A1
AD14
U24
FRC_DDR3_A4/DDR2_CASZ
AD3
V26
FRC_DDR3_A5/DDR2_A10
AF15
V25
FRC_DDR3_A6/DDR2_A0
AF2
V24
FRC_DDR3_A7/DDR2_A5
AE15
W24
FRC_DDR3_A8/DDR2_A2
AD2
Y26
FRC_DDR3_A9/DDR2_A9
AD16
Y25
FRC_DDR3_A10/DDR2_A11
AD15
Y24
FRC_DDR3_A11/DDR2_A4
AE16
FRC_DDR3_A12/DDR2_A8
AC26
AC25
AA26
AF3
AA25
FRC_DDR3_BA0/DDR2_BA2
AF14
AA24
FRC_DDR3_BA1/DDR2_ODT
AD1
AB26
FRC_DDR3_BA2/DDR2_A12
AB25
AD13
AB24
FRC_DDR3_MCLK/DDR2_MCLK
AE14
AC24
FRC_DDR3_CKE/DDR2_RASZ
AE13
AD26
FRC_DDR3_MCLKZ/DDR2_MCLKZ
AD25
AD24
AE4
FRC_DDR3_ODT/DDR2_BA1
AD5
FRC_DDR3_RASZ/DDR2_WEZ
AF4
AD23
FRC_DDR3_CASZ/DDR2_CKE
AD4
AE23
FRC_DDR3_WEZ/DDR2_BA0
AE26
AE2
AE25
FRC_DDR3_RESETB/DDR2_A3
AF26
AF25
AF8
AE24
FRC_DDR3_DQSL/DDR2_DQS0
AD9
AF24
FRC_DDR3_DQSLB/DDR2_DQSB0
AF23
AE9
AD22
FRC_DDR3_DQSU/DDR2_DQS1
AF9
AE22
FRC_DDR3_DQSUB/DDR2_DQSB1
AF22
AE11
FRC_DDR3_DML/DDR2_DQ7
AF6
FRC_DDR3_DMU/DDR2_DQ11
AD19
AE6
AE19
FRC_DDR3_DQL0/DDR2_DQ6
AF11
AD21
FRC_DDR3_DQL1/DDR2_DQ0
AD6
AE21
FRC_DDR3_DQL2/DDR2_DQ1
AD12
AF21
FRC_DDR3_DQL3/DDR2_DQ2
AE5
AD20
FRC_DDR3_DQL4/DDR2_DQ4
AF12
AE20
FRC_DDR3_DQL5/DDR2_NC
AF5
AF20
FRC_DDR3_DQL6/DDR2_DQ3
AE12
AF19
FRC_DDR3_DQL7/DDR2_DQ5
AD18
AE10
AE18
FRC_DDR3_DQU0/DDR2_DQ8
AF7
AF18
FRC_DDR3_DQU1/DDR2_DQ14
AD11
FRC_DDR3_DQU2/DDR2_DQ13
AD7
FRC_DDR3_DQU3/DDR2_DQ12
AD10
AB22
FRC_DDR3_DQU4/DDR2_DQ15
AE7
AB23
FRC_DDR3_DQU5/DDR2_DQ9
AF10
AC23
FRC_DDR3_DQU6/DDR2_DQ10
AD8
AC22
FRC_DDR3_DQU7/DDR2_DQM1
AB16
AA14
AC15
Y16
AC16
AE8
AC14
FRC_DDR3_NC/DDR2_DQM0
Y11
AA16
FRC_REXT
Y19
AA15
FRC_TESTPIN
Y10
AA11
AB15
AB14
C108
0.1uF
OPT
S7MR_MS10
IC101-*7
LGE107C-R [S7MR MS10]
PCM_D[0]
PCM_D[1]
PCM_D[2]
PCM_D[3]
PCM_D[4]
PCM_D[5]
PCM_D[6]
PCM_D[7]
PCM_A[0]
PCM_A[1]
PCM_A[2]
PCM_A[3]
PCM_A[4]
PCM_A[5]
PCM_A[6]
PCM_A[7]
PCM_A[8]
PCM_A[9]
PCM_A[10]
PCM_A[11]
PCM_A[12]
PCM_A[13]
PCM_A[14]
C109
ACKP/RLV3P/RED[3]
ACKM/RLV3N/RED[2]
A0P/RLV0P/RED[9]
A0M/RLV0N/RED[8]
A1P/RLV1P/RED[7]
A1M/RLV1N/RED[6]
A2P/RLV2P/RED[5]
A2M/RLV2N/RED[4]
A3P/RLV4P/RED[1]
A3M/RLV4N/RED[0]
A4P/RLV5P/GREEN[9]
A4M/RLV5N/GREEN[8]
BCKP/TCON13/GREEN[1]
BCKM/TCON12/GREEN[0]
B0P/RLV6P/GREEN[7]
B0M/RLV6N/GREEN[6]
B1P/RLV7P/GREEN[5]
B1M/RLV7N/GREEN[4]
B2P/RLV8P/GREEN[3]
B2M/RLV8N/GREEN[2]
B3P/TCON11/BLUE[9]
B3M/TCON10/BLUE[8]
B4P/TCON9/BLUE[7]
B4M/TCON8/BLUE[6]
CCKP/LLV3P
CCKM/LLV3N
C0P/LLV0P/BLUE[5]
C0M/LLV0N/BLUE[4]
C1P/LLV1P/BLUE[3]
C1M/LLV1N/BLUE[2]
C2P/LLV2P/BLUE[1]
C2M/LLV2N/BLUE[0]
C3P/LLV4P
C3M/LLV4N
C4P/LLV5P
C4M/LLV5N
DCKP/TCON5
DCKM/TCON4
D0P/LLV6P
D0M/LLV6N
D1P/LLV7P
D1M/LLV7N
D2P/LLV8P
D2M/LLV8N
D3P/TCON3
D3M/TCON2
D4P/TCON1
D4M/TCON0
GPIO0/TCON15/HSYNC/VDD_ODD
GPIO1/TCON14/VSYNC/VDD_EVEN
GPIO2/TCON7/LDE/GCLK4
GPIO3/TCON6/LCK/GCLK2
FRC_GPIO0/UART_RX
FRC_GPIO1
FRC_GPIO3
FRC_GPIO8
FRC_GPIO9/UART_TX
FRC_GPIO10
FRC_I2CM_DA
FRC_I2CM_CK
FRC_I2CS_DA
FRC_I2CS_CK
FRC_PWM0
FRC_PWM1
0.1uF
W26
W25
U26
U25
U24
V26
V25
V24
W24
Y26
Y25
Y24
AC26
AC25
AA26
AA25
AA24
AB26
AB25
AB24
AC24
AD26
AD25
AD24
AD23
AE23
AE26
AE25
AF26
AF25
AE24
AF24
AF23
AD22
AE22
AF22
AD19
AE19
AD21
AE21
AF21
AD20
AE20
AF20
AF19
AD18
AE18
AF18
AB22
AB23
AC23
AC22
AB16
AA14
AC15
Y16
AC16
AC14
AA16
AA15
Y10
AA11
AB15
AB14
I2C
S7M-PLUS_DivX_MS10
LGE107DC-RP [S7M+ DIVX/MS10]
U22
PCM_D0
T21
PCM_D1
T22
PCM_D2
AB18
PCM_D3
AC18
PCM_D4
AC19
PCM_D5
AC20
PCM_D6
AC21
PCM_D7
U21
PCM_A0
V21
PCM_A1
Y22
PCM_A2
AA22
PCM_A3
R22
PCM_A4
R21
PCM_A5
T23
PCM_A6
T24
PCM_A7
AA23
PCM_A8
Y20
PCM_A9
AB17
PCM_A10
AA21
PCM_A11
U23
PCM_A12
Y23
PCM_A13
W23
PCM_A14
W22
PCM_REG_N
AA17
PCM_OE_N
V22
PCM_WE_N
W21
PCM_IORD_N
Y21
PCM_IOWR_N
AA20
PCM_CE_N
V23
PCM_IRQA_N
P23
PCM_CD_N
R23
PCM_WAIT_N
P22
PCM_RESET
AC17
PCM_PF_CE0Z
AB20
PCM_PF_CE1Z
AA18
PCM_PF_OEZ
AB21
PCM_PF_WEZ
AB19
PCM_PF_ALE
AD17
PCM_PF_AD[15]
AA19
PCM_PF_RBZ
M23
UART_TX2/GPIO65
N23
UART_RX2/GPIO64
M22
DDCR_DA/GPIO71
N22
DDCR_CK/GPIO72
A5
DDCA_DA/UART0_TX
B5
DDCA_CK/UART0_RX
K23
PWM0/GPIO66
K22
PWM1/GPIO67
G23
PWM2/GPIO68
G22
PWM3/GPIO69
G21
PWM4/GPIO70
C6
SAR0/GPIO31
B6
SAR1/GPIO32
C8
SAR2/GPIO33
C7
SAR3/GPIO34
A6
SAR4/GPIO35
ACKP/RLV3P/RED[3]
ACKM/RLV3N/RED[2]
A0P/RLV0P/RED[9]
A0M/RLV0N/RED[8]
A1P/RLV1P/RED[7]
A1M/RLV1N/RED[6]
A2P/RLV2P/RED[5]
A2M/RLV2N/RED[4]
A3P/RLV4P/RED[1]
A3M/RLV4N/RED[0]
A4P/RLV5P/GREEN[9]
A4M/RLV5N/GREEN[8]
BCKP/TCON13/GREEN[1]
BCKM/TCON12/GREEN[0]
B0P/RLV6P/GREEN[7]
B0M/RLV6N/GREEN[6]
B1P/RLV7P/GREEN[5]
B1M/RLV7N/GREEN[4]
B2P/RLV8P/GREEN[3]
B2M/RLV8N/GREEN[2]
B3P/TCON11/BLUE[9]
B3M/TCON10/BLUE[8]
B4P/TCON9/BLUE[7]
B4M/TCON8/BLUE[6]
C0P/LLV0P/BLUE[5]
C0M/LLV0N/BLUE[4]
C1P/LLV1P/BLUE[3]
C1M/LLV1N/BLUE[2]
C2P/LLV2P/BLUE[1]
C2M/LLV2N/BLUE[0]
GPIO0/TCON15/HSYNC/VDD_ODD
GPIO1/TCON14/VSYNC/VDD_EVEN
GPIO2/TCON7/LDE/GCLK4
GPIO3/TCON6/LCK/GCLK2
FRC_GPIO0/UART_RX
FRC_GPIO9/UART_TX
W26
W25
U26
U25
U24
V26
V25
V24
W24
Y26
Y25
Y24
AC26
AC25
AA26
AA25
AA24
AB26
AB25
AB24
AC24
AD26
AD25
AD24
AD23
CCKP/LLV3P
AE23
CCKM/LLV3N
AE26
AE25
AF26
AF25
AE24
AF24
AF23
C3P/LLV4P
AD22
C3M/LLV4N
AE22
C4P/LLV5P
AF22
C4M/LLV5N
AD19
DCKP/TCON5
AE19
DCKM/TCON4
AD21
D0P/LLV6P
AE21
D0M/LLV6N
AF21
D1P/LLV7P
AD20
D1M/LLV7N
AE20
D2P/LLV8P
AF20
D2M/LLV8N
AF19
D3P/TCON3
AD18
D3M/TCON2
AE18
D4P/TCON1
AF18
D4M/TCON0
AB22
AB23
AC23
AC22
AB16
AA14
FRC_GPIO1
AC15
FRC_GPIO3
Y16
FRC_GPIO8
AC16
AC14
FRC_GPIO10
AA16
FRC_I2CM_DA
AA15
FRC_I2CM_CK
Y10
FRC_I2CS_DA
AA11
FRC_I2CS_CK
AB15
FRC_PWM0
AB14
FRC_PWM1
+3.3V_Normal
R142
3.3K
S7MR_DivX_MS10
LGE107DC-R [S7MR DIVX/MS10]
AE1
FRC_DDR3_A0/DDR2_NC
AF16
FRC_DDR3_A1/DDR2_A6
AF1
FRC_DDR3_A2/DDR2_A7
AE3
FRC_DDR3_A3/DDR2_A1
AD14
FRC_DDR3_A4/DDR2_CASZ
AD3
FRC_DDR3_A5/DDR2_A10
AF15
FRC_DDR3_A6/DDR2_A0
AF2
FRC_DDR3_A7/DDR2_A5
AE15
FRC_DDR3_A8/DDR2_A2
AD2
FRC_DDR3_A9/DDR2_A9
AD16
FRC_DDR3_A10/DDR2_A11
AD15
FRC_DDR3_A11/DDR2_A4
AE16
FRC_DDR3_A12/DDR2_A8
AF3
FRC_DDR3_BA0/DDR2_BA2
AF14
FRC_DDR3_BA1/DDR2_ODT
AD1
FRC_DDR3_BA2/DDR2_A12
AD13
FRC_DDR3_MCLK/DDR2_MCLK
AE14
FRC_DDR3_CKE/DDR2_RASZ
AE13
FRC_DDR3_MCLKZ/DDR2_MCLKZ
AE4
FRC_DDR3_ODT/DDR2_BA1
AD5
FRC_DDR3_RASZ/DDR2_WEZ
AF4
FRC_DDR3_CASZ/DDR2_CKE
AD4
FRC_DDR3_WEZ/DDR2_BA0
AE2
FRC_DDR3_RESETB/DDR2_A3
AF8
FRC_DDR3_DQSL/DDR2_DQS0
AD9
FRC_DDR3_DQSLB/DDR2_DQSB0
AE9
FRC_DDR3_DQSU/DDR2_DQS1
AF9
FRC_DDR3_DQSUB/DDR2_DQSB1
AE11
FRC_DDR3_DML/DDR2_DQ7
AF6
FRC_DDR3_DMU/DDR2_DQ11
AE6
FRC_DDR3_DQL0/DDR2_DQ6
AF11
FRC_DDR3_DQL1/DDR2_DQ0
AD6
FRC_DDR3_DQL2/DDR2_DQ1
AD12
FRC_DDR3_DQL3/DDR2_DQ2
AE5
FRC_DDR3_DQL4/DDR2_DQ4
AF12
FRC_DDR3_DQL5/DDR2_NC
AF5
FRC_DDR3_DQL6/DDR2_DQ3
AE12
FRC_DDR3_DQL7/DDR2_DQ5
AE10
FRC_DDR3_DQU0/DDR2_DQ8
AF7
FRC_DDR3_DQU1/DDR2_DQ14
AD11
FRC_DDR3_DQU2/DDR2_DQ13
AD7
FRC_DDR3_DQU3/DDR2_DQ12
AD10
FRC_DDR3_DQU4/DDR2_DQ15
AE7
FRC_DDR3_DQU5/DDR2_DQ9
AF10
FRC_DDR3_DQU6/DDR2_DQ10
AD8
FRC_DDR3_DQU7/DDR2_DQM1
AE8
FRC_DDR3_NC/DDR2_DQM0
Y11
FRC_REXT
Y19
FRC_TESTPIN
R144
2.2K
R143
3.3K
IC101-*9
S7MR_DivX
LGE107DC-R-1 [S7MR DIVX]
AE1
FRC_DDR3_A0/DDR2_NC
AF16
FRC_DDR3_A1/DDR2_A6
AF1
FRC_DDR3_A2/DDR2_A7
AE3
FRC_DDR3_A3/DDR2_A1
AD14
FRC_DDR3_A4/DDR2_CASZ
AD3
FRC_DDR3_A5/DDR2_A10
AF15
FRC_DDR3_A6/DDR2_A0
AF2
FRC_DDR3_A7/DDR2_A5
AE15
FRC_DDR3_A8/DDR2_A2
AD2
FRC_DDR3_A9/DDR2_A9
AD16
FRC_DDR3_A10/DDR2_A11
AD15
FRC_DDR3_A11/DDR2_A4
AE16
FRC_DDR3_A12/DDR2_A8
AF3
FRC_DDR3_BA0/DDR2_BA2
AF14
FRC_DDR3_BA1/DDR2_ODT
AD1
FRC_DDR3_BA2/DDR2_A12
AD13
FRC_DDR3_MCLK/DDR2_MCLK
AE14
FRC_DDR3_CKE/DDR2_RASZ
AE13
FRC_DDR3_MCLKZ/DDR2_MCLKZ
AE4
FRC_DDR3_ODT/DDR2_BA1
AD5
FRC_DDR3_RASZ/DDR2_WEZ
AF4
FRC_DDR3_CASZ/DDR2_CKE
AD4
FRC_DDR3_WEZ/DDR2_BA0
AE2
FRC_DDR3_RESETB/DDR2_A3
AF8
FRC_DDR3_DQSL/DDR2_DQS0
AD9
FRC_DDR3_DQSLB/DDR2_DQSB0
AE9
FRC_DDR3_DQSU/DDR2_DQS1
AF9
FRC_DDR3_DQSUB/DDR2_DQSB1
AE11
FRC_DDR3_DML/DDR2_DQ7
AF6
FRC_DDR3_DMU/DDR2_DQ11
AE6
FRC_DDR3_DQL0/DDR2_DQ6
AF11
FRC_DDR3_DQL1/DDR2_DQ0
AD6
FRC_DDR3_DQL2/DDR2_DQ1
AD12
FRC_DDR3_DQL3/DDR2_DQ2
AE5
FRC_DDR3_DQL4/DDR2_DQ4
AF12
FRC_DDR3_DQL5/DDR2_NC
AF5
FRC_DDR3_DQL6/DDR2_DQ3
AE12
FRC_DDR3_DQL7/DDR2_DQ5
AE10
FRC_DDR3_DQU0/DDR2_DQ8
AF7
FRC_DDR3_DQU1/DDR2_DQ14
AD11
FRC_DDR3_DQU2/DDR2_DQ13
AD7
FRC_DDR3_DQU3/DDR2_DQ12
AD10
FRC_DDR3_DQU4/DDR2_DQ15
AE7
FRC_DDR3_DQU5/DDR2_DQ9
AF10
FRC_DDR3_DQU6/DDR2_DQ10
AD8
FRC_DDR3_DQU7/DDR2_DQM1
AE8
FRC_DDR3_NC/DDR2_DQM0
Y11
FRC_REXT
Y19
FRC_TESTPIN
R1401KR141
IC101-*8
1K
IC101
GPIO143/TCON0
GPIO145/TCON2
GPIO147/TCON4
GPIO149/TCON6
GPIO151/TCON8
GPIO36/UART3_RX
GPIO37/UART3_TX
GPIO50/UART1_RX
GPIO51/UART1_TX
GPIO6/PM0/INT0
GPIO7/PM1/PM_UART_TX
GPIO8/PM2
GPIO9/PM3
GPIO11/PM5/PM_UART_RX/INT1
PM_SPI_WP2/GPIO14/PM8/INT2
GPIO10/PM4
PM_SPI_CS1/GPIO12/PM6
PM_SPI_WP1/GPIO13/PM7
GPIO15/PM9
PM_SPI_CS2/GPIO16/PM10
GPIO17/PM11/INT3
GPIO18/PM12/INT4
PM_SPI_CK/GPIO1
GPIO0/PM_SPI_CZ
PM_SPI_DI/GPIO2
PM_SPI_DO/GPIO3
MPIF_CS_N
MPIF_BUSY
S7MR_RM
IC101-*10
LGE107RC-R [S7MR RM]
AE1
W26
FRC_DDR3_A0/DDR2_NC
ACKP/RLV3P/RED[3]
AF16
W25
FRC_DDR3_A1/DDR2_A6
ACKM/RLV3N/RED[2]
AF1
U26
FRC_DDR3_A2/DDR2_A7
A0P/RLV0P/RED[9]
AE3
U25
FRC_DDR3_A3/DDR2_A1
A0M/RLV0N/RED[8]
AD14
U24
FRC_DDR3_A4/DDR2_CASZ
A1P/RLV1P/RED[7]
AD3
V26
FRC_DDR3_A5/DDR2_A10
A1M/RLV1N/RED[6]
AF15
V25
FRC_DDR3_A6/DDR2_A0
A2P/RLV2P/RED[5]
AF2
V24
FRC_DDR3_A7/DDR2_A5
A2M/RLV2N/RED[4]
AE15
W24
FRC_DDR3_A8/DDR2_A2
A3P/RLV4P/RED[1]
AD2
Y26
FRC_DDR3_A9/DDR2_A9
A3M/RLV4N/RED[0]
AD16
Y25
FRC_DDR3_A10/DDR2_A11
A4P/RLV5P/GREEN[9]
AD15
Y24
FRC_DDR3_A11/DDR2_A4
A4M/RLV5N/GREEN[8]
AE16
FRC_DDR3_A12/DDR2_A8
AC26
BCKP/TCON13/GREEN[1]
AC25
BCKM/TCON12/GREEN[0]
AA26
B0P/RLV6P/GREEN[7]
AF3
AA25
FRC_DDR3_BA0/DDR2_BA2
B0M/RLV6N/GREEN[6]
AF14
AA24
FRC_DDR3_BA1/DDR2_ODT
B1P/RLV7P/GREEN[5]
AD1
AB26
FRC_DDR3_BA2/DDR2_A12
B1M/RLV7N/GREEN[4]
AB25
B2P/RLV8P/GREEN[3]
AD13
AB24
FRC_DDR3_MCLK/DDR2_MCLK
B2M/RLV8N/GREEN[2]
AE14
AC24
FRC_DDR3_CKE/DDR2_RASZ
B3P/TCON11/BLUE[9]
AE13
AD26
FRC_DDR3_MCLKZ/DDR2_MCLKZ
B3M/TCON10/BLUE[8]
AD25
B4P/TCON9/BLUE[7]
AD24
B4M/TCON8/BLUE[6]
AE4
FRC_DDR3_ODT/DDR2_BA1
AD5
FRC_DDR3_RASZ/DDR2_WEZ
AF4
AD23
FRC_DDR3_CASZ/DDR2_CKE
CCKP/LLV3P
AD4
AE23
FRC_DDR3_WEZ/DDR2_BA0
CCKM/LLV3N
AE26
C0P/LLV0P/BLUE[5]
AE2
AE25
FRC_DDR3_RESETB/DDR2_A3
C0M/LLV0N/BLUE[4]
AF26
C1P/LLV1P/BLUE[3]
AF25
C1M/LLV1N/BLUE[2]
AF8
AE24
FRC_DDR3_DQSL/DDR2_DQS0
C2P/LLV2P/BLUE[1]
AD9
AF24
FRC_DDR3_DQSLB/DDR2_DQSB0
C2M/LLV2N/BLUE[0]
AF23
C3P/LLV4P
AE9
AD22
FRC_DDR3_DQSU/DDR2_DQS1
C3M/LLV4N
AF9
AE22
FRC_DDR3_DQSUB/DDR2_DQSB1
C4P/LLV5P
AF22
C4M/LLV5N
AE11
FRC_DDR3_DML/DDR2_DQ7
AF6
FRC_DDR3_DMU/DDR2_DQ11
AD19
DCKP/TCON5
AE6
AE19
FRC_DDR3_DQL0/DDR2_DQ6
DCKM/TCON4
AF11
AD21
FRC_DDR3_DQL1/DDR2_DQ0
D0P/LLV6P
AD6
AE21
FRC_DDR3_DQL2/DDR2_DQ1
D0M/LLV6N
AD12
AF21
FRC_DDR3_DQL3/DDR2_DQ2
D1P/LLV7P
AE5
AD20
FRC_DDR3_DQL4/DDR2_DQ4
D1M/LLV7N
AF12
AE20
FRC_DDR3_DQL5/DDR2_NC
D2P/LLV8P
AF5
AF20
FRC_DDR3_DQL6/DDR2_DQ3
D2M/LLV8N
AE12
AF19
FRC_DDR3_DQL7/DDR2_DQ5
D3P/TCON3
AD18
D3M/TCON2
AE10
AE18
FRC_DDR3_DQU0/DDR2_DQ8
D4P/TCON1
AF7
AF18
FRC_DDR3_DQU1/DDR2_DQ14
D4M/TCON0
AD11
FRC_DDR3_DQU2/DDR2_DQ13
AD7
FRC_DDR3_DQU3/DDR2_DQ12
AD10
AB22
GPIO2/TCON7/LDE/GCLK4
GPIO3/TCON6/LCK/GCLK2
FRC_GPIO0/UART_RX
FRC_GPIO9/UART_TX
2.2K
FRC_DDR3_DQU4/DDR2_DQ15
AE7
AB23
FRC_DDR3_DQU5/DDR2_DQ9
AF10
AC23
FRC_DDR3_DQU6/DDR2_DQ10
AD8
AC22
FRC_DDR3_DQU7/DDR2_DQM1
AB16
AA14
FRC_GPIO1
AC15
FRC_GPIO3
Y16
FRC_GPIO8
AC16
AE8
AC14
FRC_DDR3_NC/DDR2_DQM0
FRC_GPIO10
Y11
AA16
FRC_REXT
FRC_I2CM_DA
Y19
AA15
FRC_TESTPIN
FRC_I2CM_CK
Y10
FRC_I2CS_DA
AA11
FRC_I2CS_CK
AB15
FRC_PWM0
AB14
FRC_PWM1
AMP_SDA
AMP_SCL
GPIO0/TCON15/HSYNC/VDD_ODD
GPIO1/TCON14/VSYNC/VDD_EVEN
R145
I2C_SCL
NEC_SDA
NEC_SCL
GP3_Saturn7M Ver. 0.1
N21
M21
L22
L21
P21
K21
L23
K20
GPIO38
L20
GPIO39
M20
GPIO40
G20
GPIO41
G19
GPIO42
F20
F19
E7
D7
E11
G9
F9
C5
E8
E9
F7
F6
D8
G12
F10
D9
D11
E10
D10
AA9
TS0_CLK
AA5
TS0_VLD
AA10
TS0_SYNC
TS0_D0
TS0_D1
TS0_D2
TS0_D3
TS0_D4
TS0_D5
TS0_D6
TS0_D7
TS1_CLK
TS1_VLD
TS1_SYNC
TS1_D0
TS1_D1
TS1_D2
TS1_D3
TS1_D4
TS1_D5
TS1_D6
TS1_D7
MPIF_CLK
MPIF_D0
MPIF_D1
MPIF_D2
MPIF_D3
ACKP/RLV3P/RED[3]
ACKM/RLV3N/RED[2]
A0P/RLV0P/RED[9]
A0M/RLV0N/RED[8]
A1P/RLV1P/RED[7]
A1M/RLV1N/RED[6]
A2P/RLV2P/RED[5]
A2M/RLV2N/RED[4]
A3P/RLV4P/RED[1]
A3M/RLV4N/RED[0]
A4P/RLV5P/GREEN[9]
A4M/RLV5N/GREEN[8]
BCKP/TCON13/GREEN[1]
BCKM/TCON12/GREEN[0]
B0P/RLV6P/GREEN[7]
B0M/RLV6N/GREEN[6]
B1P/RLV7P/GREEN[5]
B1M/RLV7N/GREEN[4]
B2P/RLV8P/GREEN[3]
B2M/RLV8N/GREEN[2]
B3P/TCON11/BLUE[9]
B3M/TCON10/BLUE[8]
B4P/TCON9/BLUE[7]
B4M/TCON8/BLUE[6]
C0P/LLV0P/BLUE[5]
C0M/LLV0N/BLUE[4]
C1P/LLV1P/BLUE[3]
C1M/LLV1N/BLUE[2]
C2P/LLV2P/BLUE[1]
C2M/LLV2N/BLUE[0]
GPIO0/TCON15/HSYNC/VDD_ODD
GPIO1/TCON14/VSYNC/VDD_EVEN
GPIO2/TCON7/LDE/GCLK4
GPIO3/TCON6/LCK/GCLK2
FRC_GPIO0/UART_RX
FRC_GPIO9/UART_TX
CCKP/LLV3P
CCKM/LLV3N
C3P/LLV4P
C3M/LLV4N
C4P/LLV5P
C4M/LLV5N
DCKP/TCON5
DCKM/TCON4
D0P/LLV6P
D0M/LLV6N
D1P/LLV7P
D1M/LLV7N
D2P/LLV8P
D2M/LLV8N
D3P/TCON3
D3M/TCON2
D4P/TCON1
D4M/TCON0
FRC_GPIO1
FRC_GPIO3
FRC_GPIO8
FRC_GPIO10
FRC_I2CM_DA
FRC_I2CM_CK
FRC_I2CS_DA
FRC_I2CS_CK
AB5
AC4
Y6
AA6
W6
AA7
Y9
AA8
AC5
AC6
AB6
AC10
AB10
AC9
AB9
AC8
AB8
AC7
AB7
D12
D14
E14
E12
F12
D13
E13
W26
W25
U26
U25
U24
V26
V25
V24
W24
Y26
Y25
Y24
AC26
AC25
AA26
AA25
AA24
AB26
AB25
AB24
AC24
AD26
AD25
AD24
AD23
AE23
AE26
AE25
AF26
AF25
AE24
AF24
AF23
AD22
AE22
AF22
AD19
AE19
AD21
AE21
AF21
AD20
AE20
AF20
AF19
AD18
AE18
AF18
AB22
AB23
AC23
AC22
AB16
AA14
AC15
Y16
AC16
AC14
AA16
AA15
Y10
AA11
AB15
FRC_PWM0
AB14
FRC_PWM1
CI_TS_DATA[0]
CI_TS_DATA[1]
CI_TS_DATA[2]
CI_TS_DATA[3]
CI_TS_DATA[4]
CI_TS_DATA[5]
CI_TS_DATA[6]
CI_TS_DATA[7]
FE_TS_DATA[0]
FE_TS_DATA[1]
FE_TS_DATA[2]
FE_TS_DATA[3]
FE_TS_DATA[4]
FE_TS_DATA[5]
FE_TS_DATA[6]
FE_TS_DATA[7]
Delete /PIF_SPI_CS
I2C_SDA
FLASH/EEPROM/GPIO
R14633
R14733
R15133
R160
1K
DIMMING
A_DIM
PWM_DIM
SCAN_BLK2
SCAN_BLK1/OPC_OUT
5V_DET_HDMI_1
5V_DET_HDMI_2
5V_DET_HDMI_4
SIDEAV_DET
FRC_RESET
SC1/COMP1_DET
ERROR_OUT
MODEL_OPT_0
USB1_OCD
USB1_CTL
HP_DET
CONTROL_ATTEN
MODEL_OPT_6
MODEL_OPT_1
/FLASH_WP
MODEL_OPT_2
TUNER_RESET
DEMOD_RESET
AV_CVBS_DET
SPI_SCK
/SPI_CS
SPI_SDI
SPI_SDO
CI_TS_CLK
CI_TS_VAL
CI_TS_SYNC
CI_TS_DATA[0-7]
FE_TS_CLK
FE_TS_VAL_ERR
FE_TS_SYNC
FE_TS_DATA[0-7]
FRC_SCL
FRC_SDA
M_REMOTE_RX
M_REMOTE_TX
ET_RXER
DC_MREMOTE
for SERIAL FLASH
from CI SLOT
Internal demod out
/External demod in
R156
R157
R155
0
C111
2.2uF
R158
R159
DD_MREMOTE
URSA_DEBUG
P3904
12505WS-03A00
1
2
3
4
10K
100
OPT
LD650 Scan
100
OPT
100
OPT
1
PWM0
PWM2
FRC_PWM1
FRC_PWM0
3D SG
3D SG
3D SG
3D SG
LNA2_CTL
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only
RF_SWITCH_CTL
3D_GPIO_1
3D_GPIO_2
OPT
R201 100
BOOSTER_OPT
R202
RF_SW_OPT
R203
R204 100
OPT
R210 100
OPT
R213
3D_SG
R216
3D_SG
CK+_HDMI1
CK-_HDMI1
D0+_HDMI1
D0-_HDMI1
D1+_HDMI1
D1-_HDMI1
D2+_HDMI1
D2-_HDMI1
DDC_SDA_1
DDC_SCL_1
HPD1
CK+_HDMI2
CK-_HDMI2
D0+_HDMI2
D0-_HDMI2
D1+_HDMI2
D1-_HDMI2
D2+_HDMI2
D2-_HDMI2
DDC_SDA_2
DDC_SCL_2
HPD2
CK+_HDMI4
HDMI
CK-_HDMI4
D0+_HDMI4
D0-_HDMI4
D1+_HDMI4
D1-_HDMI4
D2+_HDMI4
D2-_HDMI4
DDC_SDA_4
DDC_SCL_4
HPD4
CEC_REMOTE_S7
DSUB_HSYNC
DSUB_VSYNC
DSUB_R+
DSUB_G+
DSUB
DSUB_B+
SCART1_RGB/COMP1
SC1_ID
SC1_FB
SC1_R+/COMP1_Pr+
SC1_G+/COMP1_Y+
SC1_B+/COMP1_Pb+
SC1_SOG_IN
COMP2_Pr+
COMP2_Y+
COMP2
COMP2_Pb+
TU_CVBS
SC1_CVBS_IN
AV_CVBS_IN
SIDEAV_CVBS_IN
AV_CVBS_IN2
CVBS In/OUT
DTV/MNT_VOUT
AV_CVBS_IN2
OPT
OPT
100
100
0
0
OPT
R214 1K
R215 1K
R294 1K
R295 1K
100/120Hz LVDS
OPT
R293 1K
R297 1K
50/60Hz LVDS
R4026
Delete CHB_CVBS_IN
+3.3V_Normal
FHD
R206 1K
HD
R207 1K
10K
R4023
C203
1000pF
OPT
TP211
PHM_ON
DVB_T2
R211 1K
R208 1K
PHM_OFF
NON_DVB_T2
R212 1K
R209 1K
R4024
R4025
10K
Close to MSTAR
MODEL OPTION
R226 1K
FRC_H/W_OPT
NO_FRC
R227 1K
22
22
R228 33
R229 68
R230 33
R231 68
R232 33
R233 68
R253 33
R254 68
R255
R256
R257 33
R258 68
R236 0
NON_EU
R237 33
R238 68
R239
R240
R241 33
R242 68
R244 33
R245 33
R246 33
R4016 33
R248 33
R249 33
R250 33
R251 33
R252 68
C204 0.047uF
C205 0.047uF
C206 0.047uF
C207 0.047uF
C208 0.047uF
C209 0.047uF
C210 1000pF
C211 0.047uF
C212 0.047uF
C213
33
C214
68
C215
C216
C217 1000pF
C218 0.047uF
C219 0.047uF
33
C220 0.047uF
68
C221 0.047uF
C222 0.047uF
C223 0.047uF
C224 1000pF
C248
C225 0.047uF
C226 0.047uF
C227 0.047uF
C4057 0.047uF
C229 0.047uF
C230 0.047uF
C231 0.047uF
C232 0.047uF
TP210
C233 0.047uF
MODEL_OPT_0IF_AGC_SEL
MODEL_OPT_1
MODEL_OPT_2
MODEL_OPT_3
MODEL_OPT_4
MODEL_OPT_5
MODEL_OPT_6
0.047uF
0.047uF
0.047uF
0.047uF
0.047uF
PIN NAME
MODEL_OPT_0
MODEL_OPT_4
MODEL_OPT_1
MODEL_OPT_2
MODEL_OPT_3
MODEL_OPT_5
MODEL_OPT_6
LGE107DC-RP [S7M+ DIVX/MS10]
F1
A_RXCP
F2
A_RXCN
G2
A_RX0P
G3
A_RX0N
H3
A_RX1P
G1
A_RX1N
H1
A_RX2P
H2
A_RX2N
F5
DDCDA_DA/GPIO24
F4
DDCDA_CK/GPIO23
E6
HOTPLUGA/GPIO19
D3
B_RXCP
C1
B_RXCN
D1
B_RX0P
D2
B_RX0N
E2
B_RX1P
E3
B_RX1N
F3
B_RX2P
E1
B_RX2N
D4
DDCDB_DA/GPIO26
E4
DDCDB_CK/GPIO25
D5
HOTPLUGB/GPIO20
AA2
C_RXCP
AA1
C_RXCN
AB1
C_RX0P
AA3
C_RX0N
AB3
C_RX1P
AB2
C_RX1N
AC2
C_RX2P
AC1
C_RX2N
AB4
DDCDC_DA/GPIO28
AA4
DDCDC_CK/GPIO27
AC3
HOTPLUGC/GPIO21
A2
D_RXCP
A3
D_RXCN
B3
D_RX0P
A1
D_RX0N
B1
D_RX1P
B2
D_RX1N
C2
D_RX2P
C3
D_RX2N
B4
DDCDD_DA/GPIO30
C4
DDCDD_CK/GPIO29
E5
HOTPLUGD/GPIO22
D6
CEC/GPIO5
G5
HSYNC0
G6
VSYNC0
K1
RIN0P
L3
RIN0M
K3
GIN0P
K2
GIN0M
J3
BIN0P
J2
BIN0M
J1
SOGIN0
G4
HSYNC1
H6
VSYNC1
K5
RIN1P
K4
RIN1M
J4
GIN1P
K6
GIN1M
H4
BIN1P
J6
BIN1M
J5
SOGIN1
H5
HSYNC2
N3
RIN2P
N2
RIN2M
M2
GIN2P
M1
GIN2M
L2
BIN2P
L1
BIN2M
M3
SOGIN2
N4
CVBS0P
N6
CVBS1P
L4
CVBS2P
L5
CVBS3P
L6
CVBS4P
M4
CVBS5P
M5
CVBS6P
K7
CVBS7P
M6
CVBS_OUT1
M7
CVBS_OUT2
N5
VCOM0
MODEL OPTION
PIN NO.
G19
E18
C5
F7
B6
D18
F9
S7M-PLUS_DivX_MS10
IC101
SPDIF_IN/GPIO177
SPDIF_OUT/GPIO178
I2S_IN_BCK/GPIO175
I2S_IN_SD/GPIO176
I2S_IN_WS/GPIO174
I2S_OUT_BCK/GPIO181
I2S_OUT_MCK/GPIO179
I2S_OUT_SD/GPIO182
I2S_OUT_SD1/GPIO183
I2S_OUT_SD2/GPIO184
I2S_OUT_SD3/GPIO185
I2S_OUT_WS/GPIO180
LOW
NO FRC
50/60Hz LVDS
PHM_OFF
NON_DVB_T2
HD
Ready
LCD
SSIF/SIFP
SSIF/SIFM
RF_TAGC
TGPIO0/UPGAIN
TGPIO1/DNGAIN
TGPIO2/I2C_CLK
TGPIO3/I2C_SDA
XTALIN
XTALOUT
LINE_IN_0L
LINE_IN_0R
LINE_IN_1L
LINE_IN_1R
LINE_IN_2L
LINE_IN_2R
LINE_IN_3L
LINE_IN_3R
LINE_IN_4L
LINE_IN_4R
LINE_IN_5L
LINE_IN_5R
LINE_OUT_0L
LINE_OUT_2L
LINE_OUT_3L
LINE_OUT_0R
LINE_OUT_2R
LINE_OUT_3R
MIC_DET_IN
HP_OUT_1L
HP_OUT_1R
ET_RXD0
ET_TXD0
ET_RXD1
ET_TXD1
ET_REFCLK
ET_TX_EN
ET_MDC
ET_MDIO
ET_CRS
AVLINK
TESTPIN
U3_RESET
VIFP
VIFM
IFAGC
DM_P0
DP_P0
DM_P1
DP_P1
MICCM
MICIN
AUCOM
IRINT
RESET
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
HIGH
FRC_HW_OPT
100/120Hz LVDS
PHM_ON
DVB_T2
FHD
default
OLED
W2
W1
V2
IP
V1
IM
Y2
Y1
U3
QP
V3
QM
Y5
Y4
U1
U2
R3
T3
T2
T1
G14
G13
B7
A7
AF17
AE17
F14
F13
F15
D20
E20
D19
F18
E18
D18
E19
N1
P3
P1
P2
P4
P5
R6
T6
U5
V5
U6
V6
U4
W3
W4
V4
Y3
W5
R4
T5
R5
T4
P7
VRM
R7
VAG
P6
VRP
R1
R2
E21
E22
D21
F21
E23
D22
F22
D23
F23
F8
G8
K8
A4
Y17
NO_FRC : LOW LOW
U3_INTERNAL : HIGH LOW
U5_EXTERNALBOOT :HIGH HIGH
reserved for FRC : LOW HIGH
--> This option is only applied in EU.
In case of NON_EU, default value set LOW.
-->In case of GP2, This port was used for GIP/NON_GIP
--> MODEL_OPT_5, MODEL_OPT_6
: Only 3D_SG GPIO OUTPUT CONTROL
TP201
TP202
TP203
TP204
TP205
FULL_NIM
R291 22
FULL_NIM
R292 22
1M
R287
R296 100
COMP2_DET
NEC_SCL
C236 2.2uF
C237
2.2uF
C238 2.2uF
C239
2.2uF
C4059 2.2uF
C4060
2.2uF
C242
2.2uF
C243 2.2uF
C244 2.2uF
C245 2.2uF
C246
2.2uF
2.2uF
2.2uF
TP206
TP207
TP208
TP209
5.6uH
22
OPT
2.2uF
OPT
C249
4.7uF
HEAD_PHONE
HEAD_PHONE
ET_RXD0
ET_TXD0
ET_RXD1
ET_TXD1
ET_REF_CLK
ET_TX_EN
ET_MDC
ET_MDIO
ET_CRS
OPT
R298 100
FRC
R205
10K
C253
1uF
+3.3V_Normal
C256
0.1uF
C247
OPT
C234
C235
OPT
CM2012F5R6KT
L203
L205 5.6uH
CM2012F5R6KT
FRC
R4018
10K
R4017
OPT
OPT_0
OPT_4
Close to MSTAR
R288 100
R289 100
C250 0.1uF
C251 0.1uF
ANALOG SIF
Close to MSTAR
+3.3V_Normal
AMP_SCL
AMP_SDA
C261 27pF
X201
24MHz
C262 27pF
NEC_SDA
MODEL_OPT_4
MODEL_OPT_5
C263
10uF
IR
FRC_RESET
R4002 47
R4003 47
L227
BLM18PG121SN1D
C4064
0.1uF
TU/DEMOD_I2C
BLM18SG121TN1D
HEAD_PHONE
10K
R4006
C257 0.1uF
C258 0.1uF
DEMOD_SCL
DEMOD_SDA
TU_SCL
TU_SDA
SC1/COMP1_L_IN
SC1/COMP1_R_IN
AV_L_IN
AV_R_IN
SIDEAV_L_IN
SIDEAV_R_IN
COMP2_L_IN
COMP2_R_IN
PC_L_IN
PC_R_IN
L202
C268
4.7uF
RSDS Power OPT
L213
+2.5V_Normal
OPT
C264
R4019
1K
BLM18PG121SN1D
L214
BLM18PG121SN1D
VDD33
IF_P_MSTAR
IF_N_MSTAR
1000pF
Close to MSTAR
R4020
10K
C4065
0.022uF
16V
LED_DRIVER_D/L_SDA
SPDIF_OUT
B/T USB
SIDE_USB_DM
SIDE_USB_DP
SIDE USB
AUDIO IN
HEAD_PHONE
C272
4.7uF
SOC_RESET
VDD_RSDS:88mA
VDD_RSDS
OPT
FRC
C4005
0.1uF
DTV_IF
TU_SIF
AUD_SCK
AUD_MASTER_CLK_0
AUD_LRCH
LED_DRIVER_D/L_SCL
AUD_LRCK
SCART1_Lout
SCART1_Rout
H/P OUT
HP_LOUT
HP_ROUT
IF_AGC_MAIN
I2S_I/F
+1.26V_VDDC
AUDIO OUT
10uFC276
10uFC275
10uFC228
+3.3V_Normal
L204
BLM18PG121SN1D
0.1uF
C4044 0.1uF
C4043
AVDD_MEMPLL:24mA
VDD33
L206
BLM18PG121SN1D
+3.3V_Normal
L207
BLM18PG121SN1D
Normal 2.5V
+2.5V_Normal
+2.5V_Normal
+1.5V_DDR
+1.5V_FRC_DDR
RSDS Power OPT
+1.26V_VDDC
L228
BLM18SG700TN1D
L226
BLM18SG700TN1D
C280 0.1uF
C277 0.1uF
VDD33
10uFC284
OPT
FRC_LPLL:13mA
FRC_LPLL
OPT
VDD33_DVI:163mA
VDD33_DVI
C287
10uF
L211
BLM18PG121SN1D
L212
BLM18PG121SN1D
AU25:10mA
L209
BLM18PG121SN1D
OPT
C281
C278
10uF
FRC
L210
BLM18PG121SN1D
FRC
FRC
10uF
C279
C282
MIU1VDDC
C4063 10uF
OPT
OPT
C292 0.1uF
C283 0.1uF
C299 0.1uF
Normal Power 3.3V
VDD33_T/VDDP/U3_VD33_2:47mA
10uFC4001
10uFC293
OPT
OPT
C4007 0.1uF
VDD33
L215
BLM18PG121SN1D
C286 0.1uF
C4016 0.1uF
C294
0.1uF
C4008
C4002
0.1uF
OPT
AVDD2P5
C289 10uF
C295 0.1uF
AU25
C296 0.1uF
DDR3 1.5V
AVDD_DDR0:55mA
10uF
AVDD_DDR_FRC:55mA
10uF
C4056 0.1uF
C290
FRC
C291
OPT
C4046
0.1uF
0.1uF
0.1uF
C297
0.1uF
OPT
AVDD_DDR_FRC
OPT
0.1uF
C298
MIU0VDDC
C4066 10uF
AVDD_DDR0
C4003
OPT
C4004
VDDC 1.26V
OPT
C4011 0.1uF
C4006 0.1uF
C4013 0.1uF
OPT
C4020 0.1uF
C4014 0.1uF
C4012 0.1uF
AU33
C4015
0.1uF
OPT
FRC_MPLL:4mA
AVDD_DMPLL
L217
BLM18PG121SN1D
C288
0.1uF
AVDD2P5/ADC2P5:162mA
+2.5V_Normal
0.1uF
C4009
FRC
0.1uF
C4010
C4062 0.1uF
0.1uF
C4017
0.1uF
AVDD_DMPLL/AVDD_NODIE:7.362mA
AVDD2P5
L219
BLM18PG121SN1D
AVDD25_PGA:13mA
AVDD_DDR0
C4018
0.1uF
10uF
C4042
0.1uF
OPT
AVDD_DDR0
R40141K1/16W
FRC
R40151K1/16W
0.1uF
0.1uF
C240
+1.26V_VDDC
OPT
C4019 0.1uF
C4024 0.1uF
C4025 0.1uF
+2.5V_Normal
C4023 0.1uF
FRC_VDD33_DDR:50mA
VDD33
AVDD2P5
C4026 0.1uF
AVDD25_PGA
C4027 0.1uF
AVDD_DDR1:55mA
C4022
C4028
0.1uF
10uF
OPT
1%
1%
C241
0.1uF
FRC
L225
BLM18SG700TN1D
FRC
C4061 10uF
C4031 0.1uF
FRC_AVDD:60mAAU33:31mA
L221
BLM18PG121SN1D
FRC
FRC_VDD33_DDR
FRC
L222
BLM18PG121SN1D
AVDD_DDR0
C4032
0.1uF
C4036
OPT
MVREF
FRCVDDC
C4058 0.1uF
VDDC : 2026mA
S7M-PLUS_DivX_MS10
IC101
VDDC_1
VDDC_2
VDDC_3
VDDC_4
VDDC_5
VDDC_6
VDDC_7
VDDC_8
VDDC_9
VDDC_10
VDDC_11
A_DVDD
B_DVDD
FRC_VDDC_0
FRC_VDDC_1
FRC_VDDC_2
FRC_VDDC_3
FRC_VDDC_4
FRC_VDDC_5
FRC_VDDC_6
FRC_VDDC_7
FRC_VDDC_8
U3_DVDD_DDR
AVDD1P2
DVDD_NODIE
AVDD2P5_ADC_1
AVDD2P5_ADC_2
AVDD25_REF
AVDD_AU25
PVDD_1
PVDD_2
AVDD25_PGA
AVDD_NODIE
AVDD_DVI_1
AVDD_DVI_2
AVDD3P3_CVBS
AVDD_DMPLL
AVDD_AU33
AVDD_EAR33
AVDD33_T
VDDP_1
VDDP_2
VDDP_3
FRC_VD33_2_1
FRC_VD33_2_2
FRC_AVDD_RSDS_1
FRC_AVDD_RSDS_2
FRC_AVDD_RSDS_3
FRC_AVDD
FRC_AVDD_LPLL
FRC_AVDD_MPLL
FRC_VDD33_DDR
AVDD_MEMPLL
FRC_AVDD_MEMPLL
AVDD_DDR0_D_1
AVDD_DDR0_D_2
AVDD_DDR0_D_3
AVDD_DDR0_D_4
AVDD_DDR0_C
AVDD_DDR1_D_1
AVDD_DDR1_D_2
AVDD_DDR1_D_3
AVDD_DDR1_D_4
AVDD_DDR1_C
FRC_AVDD_DDR_D_1
FRC_AVDD_DDR_D_2
FRC_AVDD_DDR_D_3
FRC_AVDD_DDR_D_4
FRC_AVDD_DDR_C
MVREF
NC_1
NC_2
GND_1
GND_2
GND_3
GND_4
GND_5
GND_6
GND_7
GND_8
GND_9
GND_10
GND_11
GND_12
GND_13
GND_14
GND_15
GND_16
GND_17
GND_18
GND_19
GND_20
GND_21
GND_22
GND_23
GND_24
GND_25
GND_26
GND_27
GND_28
GND_29
GND_30
GND_31
GND_32
GND_33
GND_34
GND_35
GND_36
GND_37
GND_38
GND_39
GND_40
GND_41
GND_42
GND_43
GND_44
GND_45
GND_46
GND_47
GND_48
GND_49
GND_50
GND_51
GND_52
GND_53
GND_54
GND_55
GND_56
GND_57
GND_58
GND_59
GND_60
GND_61
GND_62
GND_63
GND_64
GND_65
GND_66
GND_67
GND_68
GND_69
GND_70
GND_71
GND_72
GND_73
GND_74
GND_75
GND_76
GND_77
GND_78
GND_79
GND_80
GND_81
GND_82
GND_83
GND_84
GND_85
GND_86
GND_87
GND_88
GND_89
GND_90
GND_91
GND_92
GND_93
GND_94
GND_95
GND_96
GND_97
GND_98
GND_99
GND_100
GND_101
GND_102
GND_103
GND_104
GND_105
GND_106
GND_107
GND_108
GND_109
GND_110
GND_FU
PGA_VCOM
FRC_AVDD
FRC
C4038
0.1uF
FRC
0.1uF
C4040 0.1uF
C4041 0.1uF
VDD33
MIU0VDDC
MIU1VDDC
FRCVDDC
FRC_AVDD
FRC_LPLL
LGE107DC-RP [S7M+ DIVX/MS10]
+1.26V_VDDC
H11
H12
H13
H14
H15
J12
J13
J14
J15
J16
L18
H16
K19
L19
M18
M19
N18
N19
N20
P18
P19
P20
Y12
AB11
AB12
AC11
AC12
AA12
J11
L7
H7
J7
J8
L8
W15
Y15
U8
M8
N9
P9
N8
P8
T7
U7
T9
R8
R9
T8
V20
W20
U19
U20
V19
W19
U18
T20
Y14
R19
W14
D15
D16
E15
E16
E17
F16
F17
G16
G17
H17
G15
Y7
Y8
C4045 1uF
AVDD2P5
AU25
AVDD2P5
AVDD2P5
AVDD25_PGA
AVDD_DMPLL
VDD33_DVI
AVDD_DMPLL
AU33
VDD33
VDD_RSDS
FRC_VDD33_DDR
AVDD_DDR0
C285 0.1uF
AVDD_DDR0
AVDD_DDR_FRC
MVREF
GP2R
MAIN2, HW OPT 2
+1.26V_VDDC
G18
H9
H10
H18
H19
J10
J17
J18
J19
K9
K10
K11
K12
K13
K14
K15
K16
K17
K18
L9
L10
L11
L12
L13
L14
L15
L16
L17
M9
M10
M11
M12
M13
M14
M15
M16
M17
N10
N11
N12
N13
N14
N15
N16
N17
P10
P11
P12
P13
P14
P15
P16
P17
R10
R11
R12
R13
R14
R15
R16
R17
R18
T10
T11
T12
T13
T14
T15
T16
T17
T18
T19
U10
U11
U12
U13
U14
U15
U16
U17
V7
V8
V9
V10
V11
V12
V13
V14
V15
V16
V17
V18
W7
W8
W9
W10
W11
W12
W13
W16
W17
W18
Y13
Y18
AA13
AB13
AC13
D17
H23
AF13
J9
L223
BLM18SG121TN1D
U9
20101023
MICOM_DEBUG_WAFER
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only
12505WS-12A00
+3.5V_ST
EEPROM for Micom
IC1001
M24C16-WMN6T
NC/E0
1
NC/E1
47K
R10 01
TP1001
2
NC/E2
3
VSS
4
EEPROM_NEC_16KBIT_STM
P1001
13
1
2
3
4
5
6
7
8
9
10
11
12
+3.5V_ST
+3.5V_ST
MICOM_DEBUG
R1002 10K
R1006
OPT
R1072
OPT
R1073
OPT
R1005
VCC
8
WC
7
SCL
6
SDA
5
OPT
MICOM_DEBUG
R10 76 22
MICOM_DEBUG
R10 78 22
MICOM_DEBUG
R10 10 22
MICOM_DEBUG
R10 81 22
MICOM_DEBUG
R10 13 22
10K
10K
10K
10K
TP1002
R1080
22
TP1003
R1008
22
for Debugger
MICOM_RESET
NEC_ISP_Tx
NEC_ISP_Rx
OCD1A
OCD1B
FLMD0
NEC CONFIGURATION
NEC_ISP_Tx
NEC_ISP_Rx
OCD1A
OCD1B
+3.5V_ST
C1002
R1014 2.7K
R1015 2.7K
0.1uF
NEC_EEPROM_SCL
NEC_EEPROM_SDA
IC1001-*1
AT24C16BN-SH-B
NC_1
1
NC_2
2
NC_3
3
GND
4
EEPROM_NEC_16KBIT_ATMEL
8
7
6
5
+3.5V_ST
VCC
WP
SCL
SDA
OPT
R1084
10K
NEC_SCL
NEC_SDA
NEC_EEPROM_SCL
NEC_EEPROM_SDA
CEC_REMOTE_NEC
POWER_ON/OFF2_1
AMP_MUTE
AMP_RESET
(MODEL_OPT_0)
SOC_RESET
INV_CTL
PANEL_CTL
(MODEL_OPT_1)
OCD1B
R1020 0
22
R1018
22
R1019
P33/TI51/TO51/INTP4
R1065 22
R1066 22
R1023 22
R1063 22
P32/INTP3/OCD1B
+3.5V_ST
C1003
0.1uF
P60/SCL0
P61/SDA0
P62/EXSCL0
P63
P75
P74
P73/KR3
P72/KR2
P71/KR1
P70/KR0
R1030 10K
R1091 10K
GND
C1006 0.1uF
P121/X1/OCD0A
REGC
VSS
VDD
45
46
47
48
1
2
3
4
5
IC1002
6
7
8
9
10
11
12
13
14
15
16
P30/INTP1
P17/TI50/TO50
P31/INTP2/OCD1A
P16/TOH1/INTP5
CRYSTAL_KDS
X1002-*1
FLMD0
15pF
C1007
X1002
32.768KHz
CRYSTAL_EPSON
R1034
4.7M
CRYSTAL_KDS
P123/XT1
FLMD0
P122/X2/EXCLK/OCD0B
42
43
44
32.768KHz
S/T_SCL
S/T_SDA
C1008 15pF
MICOM_RESET
22
NEW_SUB
R10 60 22
R1043
R1039 22
P41
P40
RESET
P124/XT2/EXCLKS
38
39
40
41
uPD78F0514
NEC_MICOM
17
18
19
20
21
22
23
AVREF
P15/TOH0
P14/RXD6
P13/TXD6
P12/SO10
P11/SL10/RXD0
P10/SCK10/TXD0
22
22
+3.5V_ST
NEW_SUB
R4034
4.7K
NEW_SUB
R4035
4.7K
+3.5V_ST
47K
NEW_SUB
R1046
TP1601
C1010
0.1uF
TOP SIDE for reset.
TP1602
R1047 20K
1/16W
1%
R1089
20K
1/16W
P120/INTP0/EXLVI
37
36
35
34
33
32
31
30
29
28
27
26
25
1%
P140/PCL/INTP6
P00/TI000
P01/TI010/TO00
P130
P20/ANI0
ANI1/P21
ANI2/P22
ANI3/P23
ANI4/P24
ANI5/P25
ANI6/P26
ANI7/P27
24
+3.5V_ST
AVSS
C1009 1uF
+3.5V_ST
R1048 22
R1049 22
OPT
R1050 10K
R1090 22
OPT
R1055 22
R1056 22
R10 57 22
R1054 22
R1052 10K
19-22_LAMP
C
Q1001
B
2SC3052
E
EDID_WP
RL_ON
SCART1_MUTE
CEC_ON/OFF
(MODEL_OPT_3)
MODEL1_OPT_2
POWER_ON/OFF1
OLP
SIDE_HP_MUTE
KEY2
KEY1
GP2
R1079 10K
GP3
R1074 10K
+3.5V_ST
TOUCH_KEY
R1075 10K
TACT_KEY
R1011 10K
B/L_LED
R1009 10K
R1071 10K
PWM_BUZZ/IIC_LED
PWM_LED
B/L_LAMP
R1012 10K
R1004 10K
MODEL_OPT_0
MODEL_OPT_1
MODEL1_OPT_2
MODEL_OPT_3
MICOM MODEL OPTION
AMP_RESET
PANEL_CTL
CEC_ON/OFF
2011Y,GP2R, 101125 Update
PIN NAME
MODEL_OPT_0
MODEL_OPT_1
MODEL_OPT_2
MODEL_OPT_3
PWM_BUZZ/IIC_LED :Using IIC for LED Breathing & PWM Buzz
PWM_LED : Using PWM Signal for LED Lighting
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
MODEL OPTION
PIN NO.
8
11
30
31
HIGH
B/L_LED
PWM_BUZZ/IIC_LED
TOUCH_KEY
GP2
LOW
B/L_LAMP
PWM_LED
TACT_KEY
GP3
MODEL_OPT_0
LOW
LOW
LOW : LED
HIGH : LAMP
MODEL_OPT_1
LOW
LOW
HIGH
HIGH
Low
MODEL_OPT_2
LOW
LOW
HIGH
LOW
HIGH
MODEL_OPT_3
LOW
HIGH
LOW
LOW
LOW
Description
LK330/LK430 for KR/US
10Y EYE-Q Sensor
KEY & PWM LED & No Buzz & No LED Blink
LK330/LK430/LK530
KEY & PWM LED & No Buzz & No LED Blink
LV25/LV35/LV45/LW45/LV55/LK45/LK55
S/T & IIC LED & NO BUZZ & LED Blink
IIC LED(09Y IIC Protocol) & No BUZZ
S/T & IIC LED & No Buzz & LED Blink
TBD
TBD
R10 41
R10 37
22
22
R10 68
R10 69
IR
OCD1A
POWER_DET
LED_R/BUZZ
LED_B/LG_LOGO
NEC_ISP_Tx
NEC_ISP_Rx
S7_NEC_RXD
S7_NEC_TXD
POWER_ON/OFF2_2
MODEL OPTION
PIN NAME
MODEL_OPT_0
MODEL_OPT_1
MODEL_OPT_2
MODEL_OPT_3
PWM_BUZZ/IIC_LED : For model that use LED Lighting used IIC
PWM_LED : For model that use LED Lighting used PWM Signal
PIN NO.
8
11
30
31
PWM_BUZZ/IIC_LED
R1083 10K
B/L_LED
TOUCH_KEY
GPIO_LED
OPT
2010Y,GP2
LOW
B/L_LAMP
PWM_LED
TACT_KEY
NON_GPIO_LED
MODEL_OPT_0
HIGH
HIGH
HIGH
MODEL_OPT_1
LOW
LOW
LOW
LOW
HIGH
HIGH
GP2R
MICOM Rev.4
LOW
HIGH
HIGH
LOW
LOW
MODEL_OPT_3
LOW
PWM LED & No Buzz & No LED Blink
LOW
LOW
LOW
HIGH
19/22/26LE5300/5300
IIC LED & PWM IIC BUZZ
32/37/42/47/55LE5300
IIC LED & PWM BUZZ
IIC LED(09Y IIC Protocol) & No BUZZ
LD350/450/550HIGH
LD420
LE7300
GPIO LED & NO BUZZ
MODEL_OPT_2
LOW
20101125
5
USB_JACK_LV3400
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only
JK1450-*1
1234
USB DOWN STREAM
3AU04S-345-ZC-H-LG
5
USB_DIODES
R1458
2K
1/8W
1%
USB_JACK
JK1450
USB DOW N S TREA M
3AU 04S- 305 -ZC- (LG)
1234
5
SIGN6409
L1451-*1
CIS21J121
L1451
MLB-201209-0120P-N2
120-ohm
R1459
2K
C1451
1/8W
1%
22uF
16V
D1451
RCLAMP0502BA
OPT
OUT_2
OUT_1
NC
FLG
EAN61849601
IC1450
AP2191DSG
8
$0.077
7
6
5
R1451 47
GND
1
IN_1
2
IN_2
3
EN
4
SIDE_USB_DM
SIDE_USB_DP
R1454
10K
C1452
10uF
10V
USB1_OCD
C1453
0.1uF
+5V_USB
+3.3V_Normal
R1455
4.7K
OPT
USB1_CTL
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
20101023GP2R
USB_OCP_DIODE 7
HDMI_1
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only
SHIELD
HDMI_1
EAG59023302
20
JK802
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
5V_HDMI_1
CK+
D0-
D0_GND
D0+
D1-
D1_GND
D1+
D2-
D2_GND
D2+
R896
1K
R804
1.8K
OPT
D802
5V_DET_HDMI_1
3.3K
R802
C802
0.1uF
16V
R824
HDMI EEPROM
5V_HDMI_1
+5V_Normal
A1CA2
ENKMC2838-T112
R874
10K
R884
2.7K
5V_HDMI_2
10K
R873
R885
2.7K
D821
R888
2.7K
+5V_Normal
A2
A1
ENKMC2838-T112
D822
C
R889
2.7K
EDID_WP
DDC_SCL_1
DDC_SDA_1
EDID_WP
DDC_SCL_2
DDC_SDA_2
HDMI_1_RENESAS
IC801-*1
R1EX24002ASAS0A
C
Q802
2SC3052
0
R830
B
10K
E
HPD1
DDC_SDA_1
DDC_SCL_1
HDMI_CEC
CK-_HDMI1
CK+_HDMI1
D0-_HDMI1
D0+_HDMI1
D1-_HDMI1
D1+_HDMI1
D2-_HDMI1
D2+_HDMI1
A0
1
A1
2
A2
3
VSS
4
HDMI_2_RENESAS
IC802-*1
R1EX24002ASAS0A
A0
1
A1
2
A2
3
VSS
4
VCC
8
WP
7
SCL
6
SDA
5
VCC
8
WP
7
SCL
6
SDA
5
HDMI_1_ATMEL
AT24C02BN-SH-T
A0
1
A1
2
A2
3
GND
4
AT24C02BN-SH-T
A0
1
A1
2
A2
3
GND
4
IC801
$0.055
HDMI_2_ATMEL
IC802
$0.055
VCC
8
WP
7
SCL
6
SDA
5
VCC
8
WP
7
SCL
6
SDA
5
R876 22
R875 22
JP810
R878 22
R877 22
C806
0.1uF
0.1uF
C807
HDMI_2
SHIELD
20
HDMI_2
EAG59023302
JK801
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
CK+
D0-
D0_GND
D0+
D1-
D1_GND
D1+
D2-
D2_GND
D2+
5V_HDMI_2
R895
1K
R803
1.8K
5V_DET_HDMI_2
C
R828
Q801
2SC3052
C801
0.1uF
16V
R801
3.3K
R815 0
OPT
D801
10K
B
E
HPD2
DDC_SDA_2
DDC_SCL_2
HDMI_CEC
CK-_HDMI2
CK+_HDMI2
D0-_HDMI2
D0+_HDMI2
D1-_HDMI2
D1+_HDMI2
D2-_HDMI2
D2+_HDMI2
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
SIDE_HDMI
BODY_SHIELD
20
19
18
17
16
15
14
13
12
11
10
EAG62611201
9
HDMI_SIDE
8
7
6
5
4
3
2
1
JK803
CK+
D0-
D0_GND
D0+
D1-
D1_GND
D1+
D2-
D2_GND
D2+
5V_HDMI_4
R897
1K
R837
1.8K
+5V_Normal
C809
0.1uF
+3.3V_Normal
R856
10K
C805
0.1uF
16V
GND
GND
5V_HDMI_4
R871
R887
2.7K
R893
10K
C810
0.1uF
16V
10K
R891
2.7K
+3.5V_ST
A1CA2
ENKMC2838-T112
D824
R857
68K
OPT
CEC_ON/OFF
R853
68K
EDID_WP
DDC_SCL_4
DDC_SDA_4
CEC_REMOTE_S7
CEC_REMOTE_NEC
5V_DET_HDMI_4
C
Q803
2SC3052
C803
0.1uF
16V
3.3K
JP806
JP805
R841
0
R835
OPT
D811
R862
B
10K
E
HPD4
DDC_SDA_4
DDC_SCL_4
HDMI_CEC
CK-_HDMI4
CK+_HDMI4
D0-_HDMI4
D0+_HDMI4
D1-_HDMI4
D1+_HDMI4
D2-_HDMI4
D2+_HDMI4
HDMI_SIDE_RENESAS
IC804-*1
R1EX24002ASAS0A
A0
1
A1
2
A2
3
VSS
4
VCC
8
WP
7
SCL
6
SDA
5
For CEC
HDMI_CEC
OPT
D803
AVRL161A1R1NT
GND
OPT
D826
AVRL161A1R1NT
GND
HDMI_SIDE_ATMEL
AT24C02BN-SH-T
A0
1
A1
2
A2
3
GND
4
D804
D825
IC804
$0.055
VCC
8
WP
7
JP812
SCL
6
5
R881 22
SDA
R882 22
68K
R854
R855
0
OPT
SBD
Q806
G
BSS83
68K
R892
R883
0
OPT
SBD
Q805
G
BSS83
20101023 GP2R
HDMI 8
RGB/SPDIF/PC/HP
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only
New Item Development
EARPHONE BLOCK
HP_LOUT
002:V7
HP_ROUT
002:V7
C1118
10uF
16V
C1119
10uF
16V
C1115
1000pF
50V
OPT
C1116
1000pF
50V
OPT
R1125
1K
R1128
1K
Q1101
MMBT3904-(F)
Q1102
MMBT3904-(F)
C
B
E
C
B
E
MMBT3904-(F)
B
MMBT3904-(F)
B
E
Q1104
C
E
Q1103
C
HP_DET
+3.3V_Normal
R1130
10K
R1155
1K
HEAD_PHONE
JK3301
KJA-PH-0-0177
5GND
4L
3DETECT
1R
C
Q1105
ISA1530AC1
E
B
R1129
3.3K
+3.5V_ST
C
E
B
Q1106
2SC3052
SIDE_HP_MUTE
PC AUDIO
JK1102
PEJ027-01
E_SPRING
3
T_TERMINAL1
6A
B_TERMINAL1
7A
R_SPRING
4
T_SPRING
5
B_TERMINAL2
7B
T_TERMINAL2
6B
D1101
AMOTECH
5.6V
OPT
D1102
AMOTECH
5.6V
OPT
C1107
100pF
50V
C1108
100pF
50V
R1102
470K
R1103
470K
R1107
15K
R1108
15K
R1110
10K
R1111
10K
PC_R_IN
PC_L_IN
002:S12
002:S12
SPDIF OPTIC JACK
5.15 Mstar Circuit Application
SPDIF_OUT
002:T18
+3.3V_Normal
C1131
0.1uF
16V
VINPUT
C1121
100pF
50V
D1116
5.6V
OPT
+5V_Normal
EDID_WP
RGB_DDC_SCL
RGB_DDC_SDA
+3.3V_Normal
R1146
10K
D1117
5.6V
OPT
R1147
1K
DSUB_DET
RGB PC
GND
Fiber Optic
1
VCC
2
JK1103
JST1223-001
3
4
FIX_POLE
RGB_EEMPROM_RENESAS
R1EX24002ASAS0A
A0
A1
A2
VSS
DSUB_VSYNC
DSUB_HSYNC
DSUB_B+
DSUB_G+
DSUB_R+
IC1105-*1
1
2
3
4
VCC
8
WP
7
SCL
6
SDA
5
R1133
75
R1135
75
R1137
75
RGB_EEMPROM_ATMEL
A0
A1
A2
GND
C1122
68pF
50V
OPT
IC1105
AT24C02BN-SH-T
1
2
3
4
R1139
D1109
30V
D1110
30V
D1111
30V
D1112
30V
C1127
18pF
2.2K
50V
C1126
68pF
50V
OPT
VCC
8
WP
7
SCL
6
SDA
5
C1128
18pF
50V
D1113
30V
D1115
ENKMC2838-T112
A1
C
A2
R1140
2.2K
R1141
22
D1114
5.6V
OPT
R1142
10K
C1129
0.1uF
16V
R1143
22
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
RED2GREEN3BLUE4GND_15DDC_GND
RED_GND7GREEN_GND8BLUE_GND9NC10SYNC_GND
GND_212DDC_DATA13H_SYNC14V_SYNC15DDC_CLOCK
JK1104
SPG09-DB-010
11
6
1
SHILED
16
RGB/SPDIF/HP 9
20101023GP2R
RS232C
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only
0.33uF
C1101
C1102
0.1uF
C1103
0.1uF
C1104
0.1uF
C1105
0.1uF
DOUT2
RIN2
C1+
C1-
C2+
C2-
V+
V-
IC1101
MAX3232CDR
1
2
3
4
5
6
7
8
EAN41348201
10
5
9
4
R1123
100
S7_NEC_RXD
S7_NEC_TXD
R1124
100
+3.5V_ST
D1107
CDS3C30GTH
30V
OPT
C1106
0.1uF
VCC
16
GND
15
DOUT1
14
RIN1
13
ROUT1
12
DIN1
11
DIN2
10
ROUT2
9
D1108
CDS3C30GTH
30V
OPT
JP1121
JP1122
8
7
6
SPG09-DB-009
JK1101
3
2
1
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
20101023GP2R
RS232C_9PIN 10
VCC_1.5V_DDR
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only
R1201
1K 1%
R1202
1K 1%
C1201
0.1uF
A-MVREFDQ
1000pF
C1202
VCC_1.5V_DDR
R1204
1K 1%
R1205
1K 1%
C1203
0.1uF
C1204
1000pF
A-MVREFCA
VCC_1.5V_DDR
C1205
10uF
DDR3 1.5V By CAP - Place these Caps near Memory
C1206
0.1uF
C1207
0.1uF
C1208
0.1uF
C1210
0.1uF
C1211
0.1uF
C1212
0.1uF
C1213
Close to DDR Power Pin
CLose to Saturn7M IC
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
M7
NC_5
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
L2
CS
K1
ODT
J3
RAS
K3
CAS
L3
WE
T2
RESET
F3
DQSL
G3
DQSL
C7
DQSU
B7
DQSU
E7
DML
D3
DMU
E3
DQL0
F7
DQL1
F2
DQL2
F8
DQL3
H3
DQL4
H8
DQL5
G2
DQL6
H7
DQL7
D7
DQU0
C3
DQU1
C8
DQU2
C2
DQU3
A7
DQU4
A2
DQU5
B8
DQU6
A3
DQU7
A-MA0
A-MA1
A-MA2
A-MA3
A-MA4
A-MA5
A-MA6
A-MA7
A-MA8
A-MA9
A-MA10
A-MA11
A-MA12
A-MA13
A-MBA0
A-MBA1
A-MBA2
A-MCKE
A-MODT
A-MRASB
A-MCASB
A-MWEB
A-MRESETB
A-MDQSL
A-MDQSLB
A-MDQSU
A-MDQSUB
A-MDML
A-MDMU
A-MDQL0
A-MDQL1
A-MDQL2
A-MDQL3
A-MDQL4
A-MDQL5
A-MDQL6
A-MDQL7
A-MDQU0
A-MDQU1
A-MDQU2
A-MDQU3
A-MDQU4
A-MDQU5
A-MDQU6
A-MDQU7
1%
R1235
56
1%
R1236
56
VCC_1.5V_DDR
R1231
10K
C1209
0.01uF
25V
A-MCK
A-MCKB
A-MA11
A-MA1
A-MA8
A-MA6
A-MBA0
A-MA3
A-MA5
A-MA7
A-MA4
A-MA12
A-MBA1
A-MA10
A-MRESETB
A-MBA2
A-MA13
A-MA9
A-MCK
A-MCKB
A-MRASB
A-MCASB
A-MODT
A-MWEB
A-MDQSL
A-MDQSLB
A-MDQSU
A-MDQSUB
A-MDQL1
A-MDQL3
A-MDML
A-MDQU2
A-MCKE
A-MDQL7
A-MDQL5
A-MDQL0
A-MDQL2
A-MDQL6
A-MDQL4
A-MDQU7
A-MDQU3
A-MDQU5
A-MDMU
A-MDQU6
A-MDQU0
A-MDQU4
A-MDQU1
A-MCKE
A-MA0
A-MA2
R1213
1%
56
R1214
1%
56
AR1208
56
AR1203
56
AR1204
56
AR1201
56
R1206
22
R1207
22
AR1202
56
R1208
22
R1209
22
R1211
22
R1212
22
AR1209
22
AR1210
22
AR1205
22
AR1206
22
AR1207
22
R1210
22
R1233 10K
A-TMA0
A-TMA2
A-TMA11
A-TMA1
A-TMA8
A-TMA6
A-TMBA0
A-TMA3
A-TMA5
A-TMA7
A-TMA4
A-TMA12
A-TMBA1
A-TMA10
A-TMRESETB
A-TMBA2
A-TMA13
A-TMA9
A-TMCK
A-TMCKB
A-TMRASB
A-TMCASB
A-TMODT
A-TMWEB
A-TMDQSL
A-TMDQSLB
A-TMDQSU
A-TMDQSUB
A-TMDQL1
A-TMDQL3
A-TMDML
A-TMDQU2
A-TMCKE
A-TMDQL7
A-TMDQL5
A-TMDQL0
A-TMDQL2
A-TMDQL6
A-TMDQL4
A-TMDQU7
A-TMDQU3
A-TMDQU5
A-TMDMU
A-TMDQU6
A-TMDQU0
A-TMDQU4
A-TMDQU1
A-TMRESETB
A-MVREFCA
A-MVREFDQ
VCC_1.5V_DDR
R1203
240
1%
CLose to DDR3
H5TQ1G63DFR-H9C
M8
VREFCA
H1
VREFDQ
L8
ZQ
B2
VDD_1
D9
VDD_2
G7
VDD_3
K2
VDD_4
K8
VDD_5
N1
VDD_6
N9
VDD_7
R1
VDD_8
R9
VDD_9
A1
VDDQ_1
A8
VDDQ_2
C1
VDDQ_3
C9
VDDQ_4
D2
VDDQ_5
E9
VDDQ_6
F1
VDDQ_7
H2
VDDQ_8
H9
VDDQ_9
J1
NC_1
J9
NC_2
L1
NC_3
L9
NC_4
T7
NC_6
A9
VSS_1
B3
VSS_2
E1
VSS_3
G8
VSS_4
J2
VSS_5
J8
VSS_6
M1
VSS_7
M9
VSS_8
P1
VSS_9
P9
VSS_10
T1
VSS_11
T9
VSS_12
B1
VSSQ_1
B9
VSSQ_2
D1
VSSQ_3
D8
VSSQ_4
E2
VSSQ_5
E8
VSSQ_6
F9
VSSQ_7
G1
VSSQ_8
G9
VSSQ_9
EAN61828901
IC1201
DDR_1333_HYNIX
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
0.1uF
C1214
A-TMA0
A-TMA1
A-TMA2
A-TMA3
A-TMA4
A-TMA5
A-TMA6
A-TMA7
A-TMA8
A-TMA9
A-TMA10
A-TMA11
A-TMA12
A-TMA13
A-TMBA0
A-TMBA1
A-TMBA2
A-TMCK
A-TMCKB
A-TMCKE
A-TMODT
A-TMRASB
A-TMCASB
A-TMWEB
A-TMDQSL
A-TMDQSLB
A-TMDQSU
A-TMDQSUB
A-TMDML
A-TMDMU
A-TMDQL0
A-TMDQL1
A-TMDQL2
A-TMDQL3
A-TMDQL4
A-TMDQL5
A-TMDQL6
A-TMDQL7
A-TMDQU0
A-TMDQU1
A-TMDQU2
A-TMDQU3
A-TMDQU4
A-TMDQU5
A-TMDQU6
A-TMDQU7
0.1uF
C1215
C1216
0.1uF
0.1uF
0.1uF
0.1uF
C1217
C1218
C1219
0.1uF
C1220
+1.5V_DDR
L1201
S7M-PLUS_DivX_MS10
LGE107DC-RP [S7M+ DIVX/MS10]
B8
A_DDR3_A0/DDR2_A13
B9
A_DDR3_A1/DDR2_A8
A8
A_DDR3_A2/DDR2_A9
C21
A_DDR3_A3/DDR2_A1
B10
A_DDR3_A4/DDR2_A2
A22
A_DDR3_A5/DDR2_A10
A10
A_DDR3_A6/DDR2_A4
B22
A_DDR3_A7/DDR2_A3
C9
A_DDR3_A8/DDR2_A6
C23
A_DDR3_A9/DDR2_A12
B11
A_DDR3_A10/DDR2_RASZ
A9
A_DDR3_A11/DDR2_A11
C10
A_DDR3_A12/DDR2_A0
B23
A_DDR3_A13/DDR2_A7
B21
A_DDR3_BA0/DDR2_BA2
A11
A_DDR3_BA1/DDR2_CASZ
A23
A_DDR3_BA2/DDR2_A5
A12
A_DDR3_MCLK/DDR2_MCLK
C11
A_DDR3_MCLKZ/DDR2_MCLKZ
B12
A_DDR3_CKE/DDR2_DQ5
C20
A_DDR3_ODT/DDR2_ODT
A20
A_DDR3_RASZ/DDR2_WEZ
B20
A_DDR3_CASZ/DDR2_BA1
A21
A_DDR3_WEZ/DDR2_BA0
C22
A_DDR3_RESETB
C16
A_DDR3_DQSL/DDR2_DQS0
B16
A_DDR3_DQSLB/DDR2_DQSB0
A16
A_DDR3_DQSU/DDR2_DQSB1
C15
A_DDR3_DQSUB/DDR2_DQS1
A14
A_DDR3_DML//DDR2_DQ13
B18
A_DDR3_DMU/DDR2_DQ6
C18
A_DDR3_DQL0/DDR2_DQ3
B13
A_DDR3_DQL1/DDR2_DQ7
A19
A_DDR3_DQL2/DDR2_DQ1
C13
A_DDR3_DQL3/DDR2_DQ10
C19
A_DDR3_DQL4/DDR2_DQ4
A13
A_DDR3_DQL5/DDR2_DQ0
B19
A_DDR3_DQL6/DDR2_CKE
C12
A_DDR3_DQL7/DDR2_DQ2
A15
A_DDR3_DQU0/DDR2_DQ15
A17
A_DDR3_DQU1/DDR2_DQ9
B14
A_DDR3_DQU2/DDR2_DQ8
C17
A_DDR3_DQU3/DDR2_DQ11
B15
A_DDR3_DQU4/DDR2_DQM1
A18
A_DDR3_DQU5/DDR2_DQ12
C14
A_DDR3_DQU6/DDR2_DQM0
B17
A_DDR3_DQU7/DDR2_DQ14
0.1uF
0.1uF
0.1uF
C1221
C1222
C1225
10uF
10V
IC101
B_DDR3_MCLK/DDR2_MCLK
B_DDR3_MCLKZ/DDR2_MCLKZ
B_DDR3_DQSL/DDR2_DQS0
B_DDR3_DQSLB/DDR2_DQSB0
B_DDR3_DQSU/DDR2_DQSB1
B_DDR3_DQSUB/DDR2_DQS1
B_DDR3_DQL3/DDR2_DQ10
B_DDR3_DQU0/DDR2_DQ15
B_DDR3_DQU3/DDR2_DQ11
B_DDR3_DQU4/DDR2_DQM1
B_DDR3_DQU5/DDR2_DQ12
B_DDR3_DQU6/DDR2_DQM0
B_DDR3_DQU7/DDR2_DQ14
0.1uF
0.1uF
C1223
C1224
VCC_1.5V_DDR
C1226
0.1uF
16V
B_DDR3_A0/DDR2_A13
B_DDR3_A1/DDR2_A8
B_DDR3_A2/DDR2_A9
B_DDR3_A3/DDR2_A1
B_DDR3_A4/DDR2_A2
B_DDR3_A5/DDR2_A10
B_DDR3_A6/DDR2_A4
B_DDR3_A7/DDR2_A3
B_DDR3_A8/DDR2_A6
B_DDR3_A9/DDR2_A12
B_DDR3_A10/DDR2_RASZ
B_DDR3_A11/DDR2_A11
B_DDR3_A12/DDR2_A0
B_DDR3_A13/DDR2_A7
B_DDR3_BA0/DDR2_BA2
B_DDR3_BA1/DDR2_CASZ
B_DDR3_BA2/DDR2_A5
B_DDR3_CKE/DDR2_DQ5
B_DDR3_ODT/DDR2_ODT
B_DDR3_RASZ/DDR2_WEZ
B_DDR3_CASZ/DDR2_BA1
B_DDR3_WEZ/DDR2_BA0
B_DDR3_RESETB
B_DDR3_DML/DDR2_DQ13
B_DDR3_DMU/DDR2_DQ6
B_DDR3_DQL0/DDR2_DQ3
B_DDR3_DQL1/DDR2_DQ7
B_DDR3_DQL2/DDR2_DQ1
B_DDR3_DQL4/DDR2_DQ4
B_DDR3_DQL5/DDR2_DQ0
B_DDR3_DQL6/DDR2_CKE
B_DDR3_DQL7/DDR2_DQ2
B_DDR3_DQU1/DDR2_DQ9
B_DDR3_DQU2/DDR2_DQ8
0.1uF
DDR3 1.5V By CAP - Place these Caps near Memory
C1227
0.1uF
C1228
0.1uF
C1229
0.1uF
C1230
0.1uF
C1231
0.1uF
C1232
0.1uF
C1233
0.1uF
C1234
0.1uF
C1235
0.1uF
C1236
0.1uF
C1237
0.1uF
C1238
0.1uF
C1239
0.1uF
C1241
0.1uF
C1242
0.1uF
C1243
0.1uF
C1244
0.1uF
VCC_1.5V_DDR
C1245
10uF
C1246
B-MVREFCA
1000pF
VCC_1.5V_DDR
0.1uF
C1247
C1248
R1224
1K 1%
B-MVREFDQ
R1225
1K 1%
1000pF
VCC_1.5V_DDR
0.1uF
C1249
C1250
R1227
1K 1%
R1228
1K 1%
Close to DDR Power Pin
CLose to Saturn7M IC
B-TMA0
B-TMA2
B-TMA11
B-TMA1
B-TMA8
B-TMA6
B-TMBA0
B-TMA3
B-TMA5
B-TMA7
A25
B24
A24
P25
C24
P26
B26
R24
B25
T26
D24
A26
C25
T25
P24
C26
R26
D26
D25
E24
N25
M26
N24
N26
R25
J25
J24
H26
H25
F26
L24
L25
F24
L26
F25
M25
E26
M24
E25
G26
J26
G24
K25
H24
K26
G25
K24
B-TMA0
B-TMA1
B-TMA2
B-TMA3
B-TMA4
B-TMA5
B-TMA6
B-TMA7
B-TMA8
B-TMA9
B-TMA10
B-TMA11
B-TMA12
B-TMA13
B-TMBA0
B-TMBA1
B-TMBA2
B-TMCK
B-TMCKB
B-TMCKE
B-TMODT
B-TMRASB
B-TMCASB
B-TMWEB
B-TMRESETB
B-TMDQSL
B-TMDQSLB
B-TMDQSU
B-TMDQSUB
B-TMDML
B-TMDMU
B-TMDQL0
B-TMDQL1
B-TMDQL2
B-TMDQL3
B-TMDQL4
B-TMDQL5
B-TMDQL6
B-TMDQL7
B-TMDQU0
B-TMDQU1
B-TMDQU2
B-TMDQU3
B-TMDQU4
B-TMDQU5
B-TMDQU6
B-TMDQU7
B-TMA4
B-TMA12
B-TMBA1
B-TMA10
B-TMRESETB
B-TMBA2
B-TMA13
B-TMA9
B-TMCK
B-TMCKB
B-TMRASB
B-TMCASB
B-TMODT
B-TMWEB
B-TMDQSL
B-TMDQSLB
B-TMDQSU
B-TMDQSUB
B-TMDQL1
B-TMDQL3
B-TMDML
B-TMDQU2
B-TMCKE
B-TMDQL7
B-TMDQL5
B-TMDQL0
B-TMDQL2
B-TMDQL6
B-TMDQL4
B-TMDQU7
B-TMDQU3
B-TMDQU5
B-TMDMU
B-TMDQU6
B-TMDQU0
B-TMDQU4
B-TMDQU1
R1215
56
R1216
56
AR1211
56
AR1214
AR1215
AR1219
R1222
R1223
AR1220
R1219
22
R1220
22
R1217
22
R1218
22
AR1212
22
AR1213
22
AR1216
AR1217
AR1218
R1221
22
B-MA0
1%
B-MA2
1%
B-MA11
B-MA1
B-MA8
B-MA6
B-MBA0
B-MA3
B-MA5
B-MA7
56
B-MA4
B-MA12
B-MBA1
B-MA10
56
B-MRESETB
B-MBA2
B-MA13
B-MA9
B-MCK
B-MCKB
B-MRASB
B-MCASB
B-MODT
B-MWEB
B-MDQSL
B-MCK
B-MCKB
VCC_1.5V_DDR
C1240
0.01uF
25V
1%
1%
R1232
10K
56
22
22
56
B-MDQSLB
B-MDQSU
B-MDQSUB
B-MDQL1
B-MDQL3
B-MDML
B-MDQU2
B-MCKE
B-MDQL7
B-MDQL5
B-MDQL0
B-MDQL2
B-MDQL6
B-MDQL4
22
B-MDQU7
B-MDQU3
B-MDQU5
B-MDMU
22
B-MDQU6
B-MDQU0
B-MDQU4
22
B-MDQU1
R123410K
B-MCKE
56
R1237
56
R1238
B-MRASB
B-MCASB
B-MRESETB
B-MDQSL
B-MDQSLB
B-MDQSU
B-MDQSUB
B-MDQL0
B-MDQL1
B-MDQL2
B-MDQL3
B-MDQL4
B-MDQL5
B-MDQL6
B-MDQL7
B-MDQU0
B-MDQU1
B-MDQU2
B-MDQU3
B-MDQU4
B-MDQU5
B-MDQU6
B-MDQU7
B-MODT
B-MWEB
B-MDML
B-MDMU
B-MA0
B-MA1
B-MA2
B-MA3
B-MA4
B-MA5
B-MA6
B-MA7
B-MA8
B-MA9
B-MA10
B-MA11
B-MA12
B-MA13
B-MBA0
B-MBA1
B-MBA2
B-MCKE
DDR_DVB_T2_2G
IC1201-*3
K4B2G1646C
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
M7
NC_5
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
L2
CS
K1
ODT
J3
RAS
K3
CAS
L3
WE
T2
RESET
F3
DQSL
G3
DQSL
C7
DQSU
B7
DQSU
E7
DML
D3
DMU
E3
DQL0
F7
DQL1
F2
DQL2
F8
DQL3
H3
DQL4
H8
DQL5
G2
DQL6
H7
DQL7
D7
DQU0
C3
DQU1
C8
DQU2
C2
DQU3
A7
DQU4
A2
DQU5
B8
DQU6
A3
DQU7
EAN61828901
IC1202
H5TQ1G63DFR-H9C
DDR_1333_HYNIX
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
M7
NC_5
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
L2
CS
K1
ODT
J3
RAS
K3
CAS
L3
WE
T2
RESET
F3
DQSL
G3
DQSL
C7
DQSU
B7
DQSU
E7
DML
D3
DMU
E3
DQL0
F7
DQL1
F2
DQL2
F8
DQL3
H3
DQL4
H8
DQL5
G2
DQL6
H7
DQL7
D7
DQU0
C3
DQU1
C8
DQU2
C2
DQU3
A7
DQU4
A2
DQU5
B8
DQU6
A3
DQU7
M8
VREFCA
H1
VREFDQ
L8
ZQ
B2
VDD_1
D9
VDD_2
G7
VDD_3
K2
VDD_4
K8
VDD_5
N1
VDD_6
N9
VDD_7
R1
VDD_8
R9
VDD_9
A1
VDDQ_1
A8
VDDQ_2
C1
VDDQ_3
C9
VDDQ_4
D2
VDDQ_5
E9
VDDQ_6
F1
VDDQ_7
H2
VDDQ_8
H9
VDDQ_9
J1
NC_1
J9
NC_2
L1
NC_3
L9
NC_4
T7
NC_6
A9
VSS_1
B3
VSS_2
E1
VSS_3
G8
VSS_4
J2
VSS_5
J8
VSS_6
M1
VSS_7
M9
VSS_8
P1
VSS_9
P9
VSS_10
T1
VSS_11
T9
VSS_12
B1
VSSQ_1
B9
VSSQ_2
D1
VSSQ_3
D8
VSSQ_4
E2
VSSQ_5
E8
VSSQ_6
F9
VSSQ_7
G1
VSSQ_8
G9
VSSQ_9
VREFCA
VREFDQ
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9
DDR_DVB_T2_2G
IC1202-*3
K4B2G1646C
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
M7
NC_5
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
L2
CS
K1
ODT
J3
RAS
K3
CAS
L3
WE
T2
RESET
F3
DQSL
G3
DQSL
C7
DQSU
B7
DQSU
E7
DML
D3
DMU
E3
DQL0
F7
DQL1
F2
DQL2
F8
DQL3
H3
DQL4
H8
DQL5
G2
DQL6
H7
DQL7
D7
DQU0
C3
DQU1
C8
DQU2
C2
DQU3
A7
DQU4
A2
DQU5
B8
DQU6
A3
DQU7
NC_1
NC_2
NC_3
NC_4
NC_6
M8
B-MVREFCA
H1
B-MVREFDQ
R1226
L8
ZQ
M8
VREFCA
H1
VREFDQ
L8
ZQ
B2
VDD_1
D9
VDD_2
G7
VDD_3
K2
VDD_4
K8
VDD_5
N1
VDD_6
N9
VDD_7
R1
VDD_8
R9
VDD_9
A1
VDDQ_1
A8
VDDQ_2
C1
VDDQ_3
C9
VDDQ_4
D2
VDDQ_5
E9
VDDQ_6
F1
VDDQ_7
H2
VDDQ_8
H9
VDDQ_9
J1
NC_1
J9
NC_2
L1
NC_3
L9
NC_4
T7
NC_6
A9
VSS_1
B3
VSS_2
E1
VSS_3
G8
VSS_4
J2
VSS_5
J8
VSS_6
M1
VSS_7
M9
VSS_8
P1
VSS_9
P9
VSS_10
T1
VSS_11
T9
VSS_12
B1
VSSQ_1
B9
VSSQ_2
D1
VSSQ_3
D8
VSSQ_4
E2
VSSQ_5
E8
VSSQ_6
F9
VSSQ_7
G1
VSSQ_8
G9
VSSQ_9
240
1%
B2
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
J1
J9
L1
L9
T7
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
VCC_1.5V_DDR
GP2R
DDR_256
CLose to DDR3
IC1201-*1
K4B1G1646G-BCH9
DDR_1333_SS_NEW
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
M7
NC_5
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
L2
CS
K1
ODT
J3
RAS
K3
CAS
L3
WE
T2
RESET
F3
DQSL
G3
DQSL
C7
DQSU
B7
DQSU
E7
DML
D3
DMU
E3
DQL0
F7
DQL1
F2
DQL2
F8
DQL3
H3
DQL4
H8
DQL5
G2
DQL6
H7
DQL7
D7
DQU0
C3
DQU1
C8
DQU2
C2
DQU3
A7
DQU4
A2
DQU5
B8
DQU6
A3
DQU7
IC1201-*2
NT5CB64M16DP-CF
DDR_1333_NANYA_NEW
N3
EAN61857201A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12
T3
NC_6
M7
NC_5
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
L2
CS
K1
ODT
J3
RAS
K3
CAS
L3
WE
T2
RESET
F3
DQSL
G3
DQSL
C7
DQSU
B7
DQSU
E7
DML
D3
DMU
E3
DQL0
F7
DQL1
F2
DQL2
F8
DQL3
H3
DQL4
H8
DQL5
G2
DQL6
H7
DQL7
D7
DQU0
C3
DQU1
C8
DQU2
C2
DQU3
A7
DQU4
A2
DQU5
B8
DQU6
A3
DQU7
VREFCA
VREFDQ
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9
VREFCA
VREFDQ
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9
VSS_10
VSS_11
VSS_12
VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9
NC_1
NC_2
NC_3
NC_4
NC_6
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
IC1202-*1
K4B1G1646G-BCH9
DDR_1333_SS_NEW
N3
M8
A0
P7
A1
P3
A2
N2
H1
A3
P8
A4
P2
A5
R8
L8
B2
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
J1
J9
L1
L9
T7
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
M8
H1
L8
B2
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
J1
J9
L1
L9
T7
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
M7
NC_5
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
L2
CS
K1
ODT
J3
RAS
K3
CAS
L3
WE
T2
RESET
F3
DQSL
G3
DQSL
C7
DQSU
B7
DQSU
E7
DML
D3
DMU
E3
DQL0
F7
DQL1
F2
DQL2
F8
DQL3
H3
DQL4
H8
DQL5
G2
DQL6
H7
DQL7
D7
DQU0
C3
DQU1
C8
DQU2
C2
DQU3
A7
DQU4
A2
DQU5
B8
DQU6
A3
DQU7
IC1202-*2
NT5CB64M16DP-CF
DDR_1333_NANYA_NEW
N3
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12
T3
NC_6
M7
NC_5
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
L2
CS
K1
ODT
J3
RAS
K3
CAS
L3
WE
T2
RESET
F3
DQSL
G3
DQSL
C7
DQSU
B7
DQSU
E7
DML
D3
DMU
E3
DQL0
F7
DQL1
F2
DQL2
F8
DQL3
H3
DQL4
H8
DQL5
G2
DQL6
H7
DQL7
D7
DQU0
C3
DQU1
C8
DQU2
C2
DQU3
A7
DQU4
A2
DQU5
B8
DQU6
A3
DQU7
EAN61857201A0
ZQ
ZQ
NC_1
NC_2
NC_3
NC_4
NC_7
VREFCA
VREFDQ
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9
VREFCA
VREFDQ
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9
VSS_10
VSS_11
VSS_12
VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9
NC_1
NC_2
NC_3
NC_4
NC_6
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
M8
H1
L8
ZQ
B2
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
J1
J9
L1
L9
T7
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
M8
H1
L8
ZQ
B2
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
J1
NC_1
J9
NC_2
L1
NC_3
L9
NC_4
T7
NC_7
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
20101023
12
/FLASH_WP
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only
R1401
OPT
+3.3V_Normal
B
0
R1403
10K
C
Q1401
KRC103S
E
/SPI_CS
SPI_SDO
OPT
+3.3V_Normal
R1404
4.7K
S_FLASH_MAIN_MACRONIX
IC1401
MX25L8006EM2I-12G
CS#
1
SO/SIO1
2
WP#
3
GND
4
S_FLASH_MAIN_WINBOND
IC1401-*1
W25Q80BVSSIG
CS
1
DO[IO1]
2
%WP[IO2]
3
GND
4
8
7
6
5
8
7
6
5
VCC
HOLD#
SCLK
SI/SIO0
VCC
HOLD[IO3]
CLK
DI[IO0]
+3.3V_Normal
R1405
33
C1401
0.1uF
SPI_SCK
SPI_SDI
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
GP2R
SFLASH_1MB
20101023
13
+3.3V_Normal
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only
C434
0.1uF
16V
IC404
AP1117E18G-13
IN
Vd=1.4V
3
2
OUT
1
ADJ/GND
R474
+1.8V_AMP
1
C446
C421
0.1uF
10uF
16V
10V
120 mA
+24V
AUD_LRCH
AUD_LRCK
AUD_SCK
AMP_SDA
AMP_SCL
+1.8V_AMP
L501
BLM18PG121SN1D
OPT
C501
10uF
10V
AMP_RESET
AUD_MASTER_CLK
+1.8V_AMP
L502
BLM18PG121SN1D
C502
0.1uF
16V
OPT
C503
10uF
10V
R503 100
R504 100
R505 100
R506 33
R507 33
C506
1000pF
50V
C504
100pF
0.1uF
50V
C505
16V
C509
0.1uF
C508
1000pF
50V
R508
3.3K
C507
18pF
50V
+3.3V_Normal
L504
BLM18PG121SN1D
TP502
C433
10uF
10V
C510
18pF
50V
OPT
C546
22pF
50V
OPT
C51 2
1uF 25 V
OPT
C511
10uF
10V
C544
22pF
50V
OPT
22000pF
BST1A
VDR1A
/RESET
DGND_1
GND_IO
CLK_I
VDD_IO
DGND_PLL
AGND_PLL
AVDD_PLL
DVDD_PLL
+1.8V_AMP
C545
22pF
50V
OPT
C514
50V
GND
C513
0.1uF
16V
D501
C527
0.1uF
50V
R517
1N4148W
100V
OPT
D502
1N4148W
100V
OPT
D503
1N4148W
100V
OPT
D504
1N4148W
100V
OPT
C528
10uF
35V
10K
OPT
R535
3.3
OPT
C525
22000pF
50V
R515
10K
Q501
2SC3052
C526
0.1uF
50V
POWER_DET
+3.5V_ST
C
E
C547
0.01uF
50V
+24V
B
C519
0.1uF
50V
C518
22000pF
50V
C520
1uF
25V
VDR1B44BST1B45PGND1B_1
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
PGND2B_1
C521
10uF
35V
NC
VDR2A
BST2A
PGND2A_2
PGND2A_1
OUT2A_2
OUT2A_1
PVDD2A_2
PVDD2A_1
PVDD2B_2
PVDD2B_1
OUT2B_2
OUT2B_1
PGND2B_2
R514 100
C52 2
R513
0
OPT
1uF25V
C524
22000pF
50V
C515
0.1uF
50V
PGND1B_2
OUT1B_1
OUT1B_2
PVDD1B_1
PVDD1B_2
PVDD1A_1
PVDD1A_2
OUT1A_1
OUT1A_2
PGND1A_1
PGND1A_2
EP_PAD
46
47
48
49
50
51
52
53
54
55
56
1
THERMAL
2
57
3
AD
4
5
6
IC501
7
8
EAN60969603
9
10
LF
11
NTP-7100
12
13
14
15
16
17
18
22
25
26
WCK19BCK20SDA21SCL
DVDD
DGND_2
SDATA
VDR2B27BST2B
/FAULT
MONITOR023MONITOR124MONITOR2
C51 7
1uF
25V
C516
1000pF
50V
R519
12
C529
390pF
50V
C530
390pF
50V
R520
12
R521
12
C531
390pF
50V
C532
390pF
50V
R522
12
AMP_MUTE
R526
R524
R525
R523
12
12
12
12
L506
10.0uH
NRS6045T100MMGK
10.0uH
L507
NRS6045T100MMGK
NRS6045T100MMGK
L508
10.0uH
L509
10.0uH
NRS6045T100MMGK
C534
0.47uF
50V
C535
0.47uF
50V
C536
0.1uF
50V
C537
0.1uF
50V
C538
0.1uF
50V
C539
0.1uF
50V
SPK_L+
SPK_L-
SPK_R+
SPK_R-
R527
4.7K
R528
4.7K
R529
4.7K
R530
4.7K
SPK_L+
SPEAKER_L
SPK_L-
SPK_R+
SPEAKER_R
SPK_R-
WAFER-ANGLE
4
3
2
1
P501
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
GP2R
AMP_NTP
20101023
16
Rear AV
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only
JK1604
PPJ233-01
FIX-TER
PPJ-230-01
JK1601
COMPONENT1
REAR_AV
11
5C
4C
3C
4B
3A
4A
5A
10
9
8
7
6
5
4
13
[RD]E-LUG
[RD]O-SPRING
[RD]CONTACT
[WH]C-LUG
[YL]CONTACT
[YL]O-SPRING
[YL]E-LUG
[GN]GND
[GN]G
[GN]C_DET
[BL]B
[RD]R
[WH]L_IN
[RD]R_IN
[RD]MONO
L-MONO
0
R4223
COMPONENT1
EU_OPT
PSC008-01
JK1602
Full Scart/ Comp1
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
AV_DET
COM_GND
SYNC_IN
SYNC_OUT
SYNC_GND2
SYNC_GND1
RGB_IO
R_OUT
RGB_GND
R_GND
D2B_OUT
G_OUT
D2B_IN
G_GND
ID
B_OUT
AUDIO_L_IN
B_GND
AUDIO_GND
AUDIO_L_OUT
AUDIO_R_IN
AUDIO_R_OUT
REAR_AV
R4221
0
EU_OPT
D1619
30V
R1654
75
REAR_AV
REAR_AV
D1626
5.6V
C1643
47pF
50V
REAR_AV
D1625
5.6V
REAR_AV
R1672
470K
REAR_AV
D1624
5.6V
OPT
R1671
470K
REAR_AV
D1602
30V
OPT
D1603
30V
OPT
D1604
30V
D1605
30V
D1606
30V
D1607
5.6V
NON_EU
D1609
5.6V
NON_EU
D1608
5.6V
OPT
D1601
5.6V
OPT
C1648
220pF
50V
OPT
+3.3V_Normal
C1646
0.1uF
16V
REAR_AV
L1609
120-ohm
REAR_AV
L1610
120-ohm
REAR_AV
D1610
30V
OPT
R1660
10K
REAR_AV
R1604
75
R1605
R1607
470K
R1608
75
75
R1606
470K
R1666
1K
REAR_AV
C1663
330pF
50V
REAR_AV
C1662
330pF
50V
REAR_AV
AV_CVBS_IN
REAR_AV
R1685
10K
R1689
REAR_AV
R1684
10K
D1611
5.6V
OPT
EU_OPT
R1609
75
12K
REAR_AV
R1688
12K
REAR_AV
AV_CVBS_DET
AV_R_IN
AV_L_IN
EU_OPT
C1604
47pF
50V
SC1_R+/COMP1_Pr+
SC1_G+/COMP1_Y+
SC1_B+/COMP1_Pb+
120-ohm
L1603
120-ohm
EU_OPT
L1601
BLM18PG121SN1D
EU_OPT
L1602
BLM18PG121SN1D
+3.3V_Normal
R1613
10K
C1607
0.1uF
16V
C1608
220pF
50V
OPT
L1604
R1614
1K
EU_OPT
R4210
0
C1611
330pF
50V
C1612
330pF
50V
EU_OPT
C1609
1000pF
50V
EU_OPT
C1610
1000pF
50V
SC1_CVBS_IN
EU_OPT
R1616
75
OPT
D1618
30V
R1617
10K
R1618
10K
SC1_SOG_IN
SC1/COMP1_DET
ISA1530AC1
EU_OPT
R1628
75
EU_OPT
R1627
22
EU_OPT
R1623
15K
COMPONENT2
6A
5A
4A
7B
5B
7C
5C
5D
4E
5E
6E
PPJ234-01
JK1603
REAR_COMP2
EU_OPT
E
Q1601
EU_OPT
C1620
100uF
16V
OPT
30V
D1716
EU_OPT
R1629
3.9K
R1630
12K
R1631
12K
EU_OPT
C1618
4700pF
EU_OPT
C1619
4700pF
B
C
EU_OPT
R4211
390
EU_OPT
R1635
390
Rf
Gain=1+Rf/Rg
SC1_FB
SC1_ID
SC1/COMP1_L_IN
SC1/COMP1_R_IN
[GN]E-LUG
[GN]O-SPRING
[GN]CONTACT
[BL]E-LUG-S
[BL]O-SPRING
[RD]E-LUG-S
[RD]O-SPRING_1
[WH]O-SPRING
[RD]CONTACT
[RD]O-SPRING_2
[RD]E-LUG
EU_OPT
R1640
470
EU_OPT
Q1602
2SC3052
C
B
E
EU_OPT
Rg
R1639
180
REC_8
DTV/MNT_L_OUT
DTV/MNT_R_OUT
EU_OPT
R1641
47K
EU_OPT
R1642
15K
D1614 30V
EU_OPT
C1621
47uF
16V
+3.3V_Normal
OPT
D1612
30V
D1615
30V
IN CASE OF SMALL= 15V
EU_OPT
L1606
EU_OPT
C1623
0.1uF
50V
R1612
10K
D1616
5.6V
D1617
5.6V
D1613
5.6V
+12V/+15V
EU_OPT
C1625
0.1uF
50V
DTV/MNT_VOUT
R1625
470K
R1626
470K
R1615
1K
R1619
75
R16 20
75
R16 21
75
[SCART AUDIO MUTE]
DTV/MNT_L_OUT
DTV/MNT_R_OUT
EU_OPT
Q1607
2SC3052
EU_OPT
Q1608
2SC3052
C1616
1000pF
50V
C1617
1000pF
50V
EU_OPT
R1648
2K
EU_OPT
R1650
2K
R1633
10K
R1632
10K
COMP2_DET
COMP2_Y+
COMP2_Pb+
COMP2_Pr+
R1636
12K
OPT
R1634
12K
OPT
COMP2_L_IN
COMP2_R_IN
CLOSE TO MSTAR
C1664
0.01uF
R4219 100
R4216 100
SCART1_MUTE
C1665
0.01uF
EU_OPT
RT1P141C-T112
Q1610
3
1
2
EU_OPT
C1636
0.1uF
+12V/+15V
EU_OPT
R1652
10K
C1642
0.1uF
50V
EU_OPT
SCART1_Lout
SCART1_Rout
+3.5V_ST
ETHERNET FOR DVB_T2
TP1610
TP1611
TP1612
TP1613
TP1614
TP1615
TP1616
TP1617
TP1618
TP1619
TP1620
DTV/MNT_L_OUT
R4218
22K
R4217
22K
DTV/MNT_R_OUT
EU_OPT
[SCART PIN 8]
OPT
R1675
2K
SC_RE1
SC_RE2
OPT
R1676
560
OPT
R1678
680
EU_OPT
C1644
10uF
16V
C1645
10uF
16V
OPT
R1677
10K
OPT
R1681
1K
EU_OPT
R1655
2.2K
R1680
1K
EU_OPT
R1656
2.2K
OPT
R1662
470K
R1687
10K
OPT
EU_OPT
R1657
5.6K
EU_OPT
R1658
5.6K
OPT
B
OPT
R1661
470K
C
Q1611
2SC3052
E
OPT
ET_RXD0
ET_TXD0
ET_RXD1
ET_TXD1
ET_REF_CLK
ET_TX_EN
ET_MDC
ET_MDIO
ET_CRS
ET_RXER
/RST-PHY
EU_OPT
R1664
33K
EU_OPT
C1654
33pF
EU_OPT
R1665
33K
C1655
33pF
EU_OPT
EU_OPT
+12V/+15V
IN CASE OF SMALL= 15V
OPT
R1695
12K
C
B
Q1613
E
2SC3052
OPT
EU_OPT
R1667
10K
R1668
10K
OPT
INV_IN1
NON_INV_IN1
NON_INV_IN2
INV_IN2
AS324MTR-E1
OUT1
IN1-
IN1+
VCC
IN2+
IN2-
OUT2
R4207
51K
OUT1
OUT2
1
2
3
4
5
6
7
B
VCC
EU_OPT_BCD
IC1601
C
E
IC1601-*1
1
EU_OPT_AUK
2
3
4
5
6
7
OPT
Q1615
2SC3052
SN324
14
13
12
11
10
9
8
REC_8
OUT4
IN4-
IN4+
GND
IN3+
IN3-
OUT3
14
13
12
11
10
9
8
OUT4
INV_IN4
NON_INV_IN4
GND
NON_INV_IN3
INV_IN3
OUT3
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
GP2R
REAR_JACK
20101023
17
CI Region
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only
* Option name of this page : CI_SLOT
(because of Hong Kong)
CI SLOT
+3.3V_Normal
0.1uF
C1901
OPT
/CI_CD1
CI_TS_DATA[4]
CI_TS_DATA[5]
CI_TS_DATA[6]
CI_TS_DATA[7]
CI_IORD
CI_IOWR
CI_MDI[0]
CI_MDI[1]
CI_MDI[2]
CI_MDI[3]
CI_MDI[4]
CI_MDI[5]
CI_MDI[6]
CI_MDI[7]
PCM_RST
/PCM_WAIT
REG
CI_TS_CLK
CI_TS_VAL
CI_TS_SYNC
CI_TS_DATA[0]
CI_TS_DATA[1]
CI_TS_DATA[2]
CI_TS_DATA[3]
CI_MISTRT
CI_MIVAL_ERR
CI_MCLKI
L1901
BLM18PG121SN1D
/CI_CD2
+3.3V_CI
0.1uF
R1901
C1902
AR1901
R1902
47
AR1902
AR1903
+5V_Normal
33
47
33
33
+5V_Normal
10K
R1903
C1903
0.1uF
16V
R1908 100
R1905
10K
0.1uF
C1905
GND
R1906
10K
R1907
100
R1909 0
GND
R1904
10K C1904
0.1uF
16V
CI DETECT
/CI_CD2
/CI_CD1
CI POWER ENABLE CONTROL
+5V_Normal
C1907
PCM_5V_CTL
+5V_CI_ON
C1906
10uF
10V
R1910
OPT
0.1uF
16V
OPT
0
CI_SLOT_OR_GATE_NXP
1B 5 VCC
3GND2A4
74LVC1G32GW
EAG41860102
CI_SLOT_JACK_LV3400
P1901
P1902
10067972-000LF
10067972-050LF
CI_SLOT_JACK
35
35
36
36
37
37
38
38
39
39
40
40
41
41
42
42
43
43
44
44
45
45
46
46
47
47
48
48
49
49
50
50
51
51
52
52
53
53
54
54
55
55
56
56
57
57
58
58
59
59
65
65
66
66
67
67
68
68
2
GND
IC1901
Y
R1912
10K
OPT
R1913
10K
CI_DATA[0-7]
CI_DATA[0-7]
1
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
21
22
22
23
23
24
24
25
25
2660
2660
2761
2761
2862
2862
2963
2963
3064
3064
31
31
32
32
33
33
34
34
G1G2
G1G2
1
69
+3.3V_CI
B
R1924
10K
R1916
16V
0.1 uF
C19 08
OPT
GND
R1915
47
R1914
22K
R1922
2.2K
C
Q1901
2SC3052
E
0
OPT
GND
+3.3V_CI
Q1902
RSR025P03
S
C1911
4.7uF
16V
R1919
10K
R1917
R1918
D
G
R1920
C1909
0.1uF
47
CI_DATA[3]
CI_DATA[4]
CI_DATA[5]
CI_DATA[6]
CI_DATA[7]
47
100
GND
CI_DATA[0]
CI_DATA[1]
CI_DATA[2]
CI_DET
L1902
BLM18PG121SN1D
C1910
0.1uF
16V
/PCM_CD
CI_DATA[0-7]
+5V_CI_ON
R1923
10K
OPT
R1921
10K
CI_ADDR[10]
CI_ADDR[11]
CI_ADDR[9]
CI_ADDR[8]
CI_ADDR[13]
CI_ADDR[14]
CI_ADDR[12]
CI_ADDR[7]
CI_ADDR[6]
CI_ADDR[5]
CI_ADDR[4]
CI_ADDR[3]
CI_ADDR[2]
CI_ADDR[1]
CI_ADDR[0]
C1912
0.1uF
16V
OPT
/PCM_CE
CI_OE
CI_WE
CI_ADDR[0-14]
/PCM_IRQA
CI HOST I/F
CI_ADDR[7]
CI_ADDR[6]
CI_ADDR[5]
CI_ADDR[4]
CI TS INPUT
AR1905
CI_DATA[0]
CI_DATA[1]
CI_DATA[2]
CI_DATA[3]
CI_DATA[4]
CI_DATA[5]
CI_DATA[6]
CI_DATA[7]
REG
33
AR1906
33
AR1904
33
IC1902
1OE
1
TOSHIBA
1A1
2
0ITO742440D
2Y4
3
1A2
4
2Y3
5
1A3
6
2Y2
1A4
2Y1
GND
TC74LCX244FT
7
8
9
10
AR1907
33
AR1908
33
AR1912
33
AR1913
33
AR1909
33
CI_MDI[7]
CI_MDI[6]
CI_MDI[5]
CI_MDI[4]
CI_MDI[3]
CI_MDI[2]
CI_MDI[1]
CI_MDI[0]
CI_MISTRT
CI_MIVAL_ERR
CI_MCLKI
CI_DET
PCM_A[0]
PCM_A[1] PCM_A[7]
PCM_A[2]
PCM_A[3]
CI_DATA[0-7]
CI_DATA[0-7]
CI_ADDR[8]
CI_ADDR[9]
CI_ADDR[10]
CI_ADDR[11]
CI_ADDR[12]
CI_ADDR[13]
CI_ADDR[14]
CI_OE
CI_WE
CI_IORD
CI_IOWR
FE_TS_DATA[7]
FE_TS_DATA[6]
FE_TS_DATA[5]
FE_TS_DATA[4]
FE_TS_DATA[3]
FE_TS_DATA[2]
FE_TS_DATA[1]
FE_TS_DATA[0]
FE_TS_SYNC
FE_TS_VAL_ERR
FE_TS_CLK
+3.3V_CI
VCC
20
2OE
19
1Y1
18
2A4
17
1Y2
16
2A3
15
1Y3
14
2A2
13
1Y4
12
2A1
11
C1913
0.1uF
16V
PCM_D[0]
PCM_D[1]
PCM_D[2]
PCM_D[3]
PCM_D[4]
PCM_D[5]
PCM_D[6]
PCM_D[7]
PCM_A[8]
PCM_A[9]
PCM_A[10]
PCM_A[11]
PCM_A[12]
PCM_A[13]
PCM_A[14]
/PCM_REG
/PCM_OE
/PCM_WE
/PCM_IORD
/PCM_IOWR
@netLa
FE_TS_DATA[0-7]
CI_ADDR[0]
CI_ADDR[1]
PCM_A[6]
CI_ADDR[2]
PCM_A[5]
CI_ADDR[3]
PCM_A[4]
PCM_D[0-7]
PCM_D[0-7]
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
GP2R
PCMCI
20101023
20
SMD GASKET
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only
GAS2
GAS1
6.5T_GAS
6.5T_GAS
MDS62110206
5.5T_GAS
7.5T_GAS
GAS1-*1
5.5T_GAS
MDS62110204
GAS1-*2
7.5T_GAS
MDS62110205
MDS62110206
GAS2-*1
MDS62110204
7.5T_GAS
GAS2-*2
MDS62110205
6.5T_GAS
5.5T_GAS
MDS62110204
MDS62110205
GAS3
MDS62110206
5.5T_GAS
GAS3-*1
MDS62110204
GAS3-*2
7.5T_GAS
MDS62110205
6.5T_GAS
MDS62110206
GAS4-*1
GAS4-*2
GAS4
5.5T_GAS
MDS62110204
7.5T_GAS
MDS62110205
6.5T_GAS
MDS62110206
GAS5-*1
GAS5-*2
GAS5
5.5T_GAS
7.5T_GAS
6.5T_GAS
MDS62110206
GAS6-*1
MDS62110204
GAS6-*2
MDS62110205
GAS6
5.5T_GAS
MDS62110204
7.5T_GAS
MDS62110205
6.5T_GAS
MDS62110206
GAS7-*1
GAS7-*2
GAS7
GAS1-*3
9.5T_GAS
MDS61887710
GAS1-*4
12.5T_GAS
MDS61887708
GAS1-*5
8.5T_GAS
MDS62110209
GAS2-*3
9.5T_GAS
MDS61887710
12.5T_GAS
MDS61887708
8.5T_GAS
MDS62110209
GAS2-*4
GAS2-*5
9.5T_GAS
MDS61887710
12.5T_GAS
MDS61887708
8.5T_GAS
MDS62110209
GAS3-*3
GAS3-*4
GAS3-*5
9.5T_GAS
MDS61887710
12.5T_GAS
MDS61887708
8.5T_GAS
MDS62110209
GAS4-*3
GAS4-*4
GAS4-*5
9.5T_GAS
MDS61887710
12.5T_GAS
MDS61887708
8.5T_GAS
MDS62110209
GAS5-*3
GAS5-*4
GAS5-*5
9.5T_GAS
MDS61887710
12.5T_GAS
MDS61887708
8.5T_GAS
MDS62110209
GAS6-*3
GAS6-*4
GAS6-*5
9.5T_GAS
MDS61887710
12.5T_GAS
MDS61887708
8.5T_GAS
MDS62110209
GAS7-*3
GAS7-*4
GAS7-*5
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
GP2R
SMD_GAS
20101023
20
GP2R_GLOBAL_TUNER_BLOCK for Small Model
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only
RF_SWITCH_CTL
Pull-up can’t be applied
because of MODEL_OPT_2
close to TUNER
OPT
R3762
0
CN_2INPUT_H_LG3911
31
SHIELD
TU3701
TDFR-C036D
close to TUNER
RF_S/W_CNTL
1
BST_CNTL
2
+B1[+5V]
3
NC[RF_AGC]
4
NC_1
5
SCLT
6
SDAT
7
NC_2
8
SIF
9
NC_3
10
VIDEO
11
GND
12
+B2[1.2V]
13
+B3[3.3V]
14
RESET
15
NC_4
16
SCL
17
SDA
ERR
SYNC
VALID
MCL
D0
D1
D2
D3
D4
D5
D6
D7
R3701 100
FULL_NIM
18
19
20
21
22
23
24
25
26
27
28
29
30
R3705 0
C3701
0.1uF
16V
R3707 0
C3706
0.1uF
16V
C3702
0.1uF 16V
C3737
100pF
50V
FULL_NIM
R3702 100
close to IF line
RF_SW_OPT
OPT
close to TUNER
+1.2V/+1.8V_TU
FULL_NIM
C3738
C3705
0.1uF
16V
100uF
16V
+5V_TU
C3703
100pF
50V
close to the tuner pin, add,09029
DVB_1INPUT_H_LGIT
TUNER MULTI-OPTION
RF_S/W_CTL
1
BST_CTL
2
+B1[5V]
3
NC_1[RF_AGC]
4
NC_2
5
SCLT
6
SDAT
7
NC_3
8
SIF
9
NC_4
10
VIDEO
11
GND
12
+B2[1.2V]
13
+B3[3.3V]
14
NTSC_2INPUT_H_LGIT
RESET
15
IF/AGC
16
DIF_1[N]
17
DIF_2[P]
18
19
SHIELD
TU3702-*2
TDTR-T036F
TU3702-*1
TDVJ-H101F
ANT_PWR[OPT]
1
BST_CNTL
2
+B
3
NC[RF_AGC]
4
AS
5
SCL
6
SDA
7
NC(IF_TP)
8
SIF
9
NC
10
VIDEO
11
GND
12
1.2V
13
3.3V
14
RESET
15
IF_AGC_CNTL
16
DIF_1
17
DIF_2
18
19
GP3_ATSC_1INPUT_H_LGIT
SHIELD
19
SHIELD
TU3702
TDTJ-S001D
ANT_PWR[OPT]
1
BST_CNTL
2
+B
3
NC[RF_AGC]
4
AS
5
SCL
6
SDA
7
NC[IF_TP]
8
SIF
9
NC
10
VIDEO
11
GND
12
1.2V
13
3.3V
14
RESET
15
IF_AGC_CNTL
16
DIF_1
17
DIF_2
18
TU3702-*3
UDA55AL
NC_1
1
NC_2
2
+B[+5V]
3
NC[RF_AGC]
4
AS
5
SCL
6
SDA
7
NC(IF_TP)
8
SIF
9
NC_3
10
VIDEO
11
GND
12
+1.2V
13
+3.3V
14
RESET
15
IF_AGC_CNTL
16
DIF_1
17
DIF_2
18
GP3_ATSC_1INPUT_H_SANYO
19
SHIELD
TU3702-*4
TDTJ-S101D
ANT_PWR
1
NC_1
2
+B1[5V]
3
RF_AGC
4
MOPLL_AS
5
SCL
6
SDA
7
NC_2
8
SIF
9
NC_3
10
VIDEO
11
GND
12
+B2[1.2V]
13
+B3[3.3V]
14
GP2R_AU_1INPUT_H_LGIT
RESET
15
IF_AGC
16
DIF_1[N]
17
DIF_2[P]
18
19
SHIELD
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
C3704
0.1uF
16V
CN
C3739
10uF
6.3V
CONTROL_ATTEN
C3707
100pF
50V
HALF_NIM
R3760 0
R3761 0
HALF_NIM
Close to the tuner
C3728
0.1uF
16V
OPT
2SC3052
+3.3V_TU
C3708
0.1uF
16V
FULL_NIM_CHINA
FULL_NIM_CHINA
FULL_NIM_BR
C3731
10uF
10V
OPT
C
Q3704
B
OPT
E
R3724
FULL_NIM
R3730
FULL_NIM
R3731
FULL_NIM
R3725
R3727
FULL_NIM
R3728
FULL_NIM
R3729
FULL_NIM
R3726
FULL_NIM
R3721
FULL_NIM
R3722
FULL_NIM
R3723
Close to the CI Slot
R3706
GPIO must be added.
OPTION : RF AGC
R3754
10K
OPT
FE_AGC_SPEED_CTL
IF_AGC_SEL
+3.3V_TU
R3733
R3732
100K
100
C3710
0.1uF
16V
IF_N_MSTAR
IF_P_MSTAR
1. should be guarded by ground
2. No via on both of them
3. Signal Width >= 12mils
Signal to Signal Width = 12mils
Ground Width >= 24mils
0
0
0
0
0
0
0
0
0
0
0
0
FE_TS_SYNC
FE_TS_VAL_ERR
FE_TS_CLK
TU_I2C_NON_FILTER
TU_I2C_NON_FILTER
TUNER_RESET
R3704
HALF_NIM
FE_TS_DATA[0]
FE_TS_DATA[1]
FE_TS_DATA[2]
FE_TS_DATA[3]
FE_TS_DATA[4]
FE_TS_DATA[5]
FE_TS_DATA[6]
FE_TS_DATA[7]
TU_IIC_NON_ATSC_SANYO
R3740-*1
1K
TU_IIC_ATSC_SANYO
33
R3735
TU_I2C_NON_FILTER
33
R3736
TU_I2C_NON_FILTER
C3713
C3711
18pF
18pF
50V
50V
TU_I2C_FILTER
C3711-*1
20pF
50V
TU_I2C_FILTER
TU_I2C_FILTER
R3735-*1
MLG1005SR27JT
0
IF_AGC_MAIN
should be guarded by ground
FE_TS_DATA[0-7]
FULL_NIM_BR
TU3701-*2
TDFR-B036F
RF_S/W_CNTL
1
BST_CNTL
2
+B1[5V]
3
NC_1[RF_AGC]
4
NC_2
5
SCLT
6
SDAT
7
NC_3
8
SIF
9
NC_4
10
VIDEO
11
GND
12
+B2[1.2V]
13
+B3[3.3V]
14
RESET
15
NC_5
16
SCL
17
SDA
18
ERR
19
SYNC
20
VALID
21
MCL
22
D0
23
D1
24
D2
25
D3
26
D4
27
D5
28
D6
29
D7
30
31
SHIELD
+5V_TU
C3709
0.01uF
25V
BOOSTER_OPT
+3.3V_TU
R3740
1.2K
C3742
C3743
20pF
20pF
50V
50V
TU_I2C_FILTER
C3713-*1
20pF
50V
TU_I2C_FILTER
TU_I2C_FILTER
R3736-*1
MLG1005SR27JT
C3712
22pF
50V
FULL_NIM
L3701
BLM18PG121SN1D
BOOSTER_OPT
R3734
0
Q3701
ISA1530AC1
E
B
C
BOOSTER_OPT
TU_IIC_ATSC_SANYO
R3741
1.2K
FULL_NIM
C3714
22pF
50V
FULL_NIM
BOOSTER_OPT
BOOSTER_OPT
R3737
2.2K
Q3702
2SC3052
TU_IIC_NON_ATSC_SANYO
R3741-*1
1K
TU_SCL
TU_SDA
+3.3V_TU
R3742
R3744
4.7K
4.7K
FULL_NIM
CN_2INPUT_H_ALTO
TU3701-*4
TDFR-C236D
RF_S/W_CNTL
1
BST_CNTL
2
+B1[+5V]
3
NC[RF_AGC]
4
NC_1
5
SCLT
6
SDAT
7
NC_2
8
SIF
9
NC_3
10
VIDEO
11
GND
12
+B2[1.2V]
13
+B3[3.3V]
14
RESET
15
NC_4
16
SCL
17
SDA
18
ERR
19
SYNC
20
VALID
21
MCL
22
D0
23
D1
24
D2
25
D3
26
D4
27
D5
28
D6
29
D7
30
31
SHIELD
BOOSTER_OPT
R3743
10K
C
E
BOOSTER_OPT
BOOSTER : CHINA OPT
BOOSTER_OPT
R3745
10K
B
R3749 0
FE_BOOSTER_CTL
LNA2_CTL
The pull-up/down of LNA2_CTL
is depended on MODLE_OPT_1.
GPIO must be added for FE_BOOSTER_CTL
+5V_TU
R3751
R3752
220
220
E
B
R3750
OPT
1K
Q3703
ISA1530AC1
C
DEMOD_SCL
DEMOD_SDA
+3.3V_TU
HALF_NIM_1.2V_DIODES
Please, check Multi Item! 10/12
L3704
200mA
R3771 10K
R3770 10K
FULL_NIM_SEMTEK
R3769 10K
FULL_NIM_BCD
C3717
0.1uF
16V
+5V_Normal
FULL_NIM_BCD
TU_CVBS
INPUT
IC3703-*1
AP1117EG-13
OUTIN
ADJ/GND
AP2132MP-2.5TRG1
FULL_NIM_BCD
+5V_TU
C3719
22uF
10V
PG
EN
VIN
VCTRL
NC_1
EN
VIN
NC_2
Size change,0929
L3702
MLB-201209-0120P-N2
C3724
0.1uF
16V
GP2R
TUNER_SMALL
+5V_TU
R3755
470
IC3703
3
OUTPUT
B
ADJ/GND
1
2
HALF_NIM
R3768
1.2K
R3753
4.7K
HALF_NIM_1.2V_BCD
AZ1117BH-ADJTRE1
IC3701
1
2
3
4
IC3701-*1
SC4215ISTRT
1
FULL_NIM_SEMTEK
2
3
4
FULL_NIM_BCD
9
THERMAL
8
7
6
5
8
7
6
5
+5V_General
C3722
C3726
22uF
0.1uF
16V
16V
location movement,0929
R3758
82
E
ISA1530AC1
Q3705
C
DEMOD_RESET
This was being applied to the only china demod,
so this has to be deleted in both main and ISDB sheet.
R2
HALF_NIM
R3767
10
TU_SIF
+1.2V/+1.8V_TU
R1
HALF_NIM
R3766
1
1/10W
[EP]
GND
ADJ
VOUT
NC
HALF_NIM
FULL_NIM_BCD
R3748-*1
10K
FULL_NIM_SEMTEK
R3748
5.1K
R1
R3747
9.1K
FULL_NIM
1005
R2
C3740
0.1uF
16V
add,0929
C3729
0.1uF
16V
FULL_NIM
C3741
10uF
10V
HALF_NIM
+1.2V/+1.8V_TU
Vo=0.8*(1+R1/R2)
GND
ADJ
VO
NC_3
+3.3V_TU
60mA
Size change,0929
L3703
MLB-201209-0120P-N2
C3725
C3723
0.1uF
22uF
16V
10V
20101023
25
C3715
22uF
10V
Add,0929
R3703
380mA
R3764
0
1/10W
FULL_NIM
C3730
10uF
10V
FULL_NIM
+3.3V_Normal
C3727
150
OPT
0.1uF
16V
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