Lenovo ThinkPad 13 S2 boardview
Vinafix.com
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Intel Skylake-U Platform UMA Block Diagram (Windows)
A A
DDR4 SO-DIMM X2
1866-2133 MT/s
USB3.0 (5Gb/s)
USB2.0 (480Mb/s)
eDP Conn(30pin)
eDP 2 Lanes
USB3.0 (5Gb/s)
12MHz
USBHUB
(RTS5412)
USB 3.0 Port X2
FHD support
USB2.0 (480Mb/s)
HDMI Conn
Redriver
PS8407A
M.2 2280 SSD
B B
HP/Mic Audio
Combo Jack
AUDIO CODEC
Speaker L/R
HDMI (1.65Gb/s)
SATA Gen3 (6Gb/s)
HDA
Intel
Skylake-U SoC
15W
BGA 1356
Size : 42x24(mm)
USB2.0 (480Mb/s)
USB2.0 (480Mb/s)
PCIE Gen2 (5Gb/s)
USB3.0 (5Gb/s)
AOU5 Charger
TPS2546RTER
Card Reader
RTS5176E
NGFF Slot
WLAN+BT
Module
ALC3245
USB 3.0 Port
4-in-1(SD/SDHC/SDXC/MMC) CONN
M.2 2230
Type C connector
Array DMic
DP 4 Lanes
USB2.0 (480Mb/s)
HD Camera
C C
Finger print Sensor
USB2.0 (480Mb/s)
USB3.0 (5Gb/s)
USB2.0 (480Mb/s)
DP SW
(PS8338B)
Lenovo
Onelink+
Connector
(Cable
Docking)
SPI Flash(16MB)
SPI
W25Q128FVSIQ
TPM 1.2
ST33HTPM2E32AAB9
K/B
D D
Thermal Sensor
( 1local +2 remote)
W83773G
SCAN MATRIX
SMBus
WRST#
LPC
CPU PTC Circuit
Place near CPU
1
2
3
24MHz
EC(ITE)
IT8886
BatteryCharger
SMBus
32.768KHz
PS/2
T/P
Synaptics
4
PCIE Gen2 (5Gb/s)
5
10/100/1G Ethernet
Intel I219-LM
(Intel I219-V)
6
For vPRO
Non vPRO
25MHz
MDI
PROJECT : PS8
PROJECT : PS8
PROJECT : PS8
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Document Number
Document Number
Document Number
Custom
Custom
Custom
01 -- Bell Block Diagram
01 -- Bell Block Diagram
01 -- Bell Block Diagram
Sheet
Sheet
Date:
Date:
7
Date:
Sheet
8
RevSize
RevSize
RevSize
of
of
of
1 57Monday, November 09, 2015
1 57Monday, November 09, 2015
1 57Monday, November 09, 2015
1A
1A
1A
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IN_D2#20
IN_D220
D D
HDMI
DOCK DP
+VCCIO
C C
eDP_COMPIO and ICOMPO signals should be shorted near
balls and routed with typical impedance <25 mohms
IN_D1#20
IN_D120
IN_D0#20
IN_D020
IN_CLK#20
IN_CLK20
DOCK_DDI2_TXN034
DOCK_DDI2_TXP034
DOCK_DDI2_TXN134
DOCK_DDI2_TXP134
DOCK_DDI2_TXN234
DOCK_DDI2_TXP234
DOCK_DDI2_TXN334
DOCK_DDI2_TXP334
SDVO_CLK20
SDVO_DATA20
EC-DV-06
R242 24.9/F_4
+3V
TP47
4
IN_D2#
IN_D2
IN_D1#
IN_D1
IN_D0#
IN_D0
IN_CLK#
IN_CLK
DOCK_DDI2_TXN0
DOCK_DDI2_TXP0
DOCK_DDI2_TXN1
DOCK_DDI2_TXP1
DOCK_DDI2_TXN2
DOCK_DDI2_TXP2
DOCK_DDI2_TXN3
DOCK_DDI2_TXP3
R721 2.2K_4
EDP_RCOMP
U28A
E55
DDI1_TXN[0]
F55
DDI1_TXP[0]
E58
DDI1_TXN[1]
F58
DDI1_TXP[1]
F53
DDI1_TXN[2]
G53
DDI1_TXP[2]
F56
DDI1_TXN[3]
G56
DDI1_TXP[3]
C50
DDI2_TXN[0]
D50
DDI2_TXP[0]
C52
DDI2_TXN[1]
D52
DDI2_TXP[1]
A50
DDI2_TXN[2]
B50
DDI2_TXP[2]
D51
DDI2_TXN[3]
C51
DDI2_TXP[3]
L13
GPP_E18/DDPB_CTRLCLK
L12
GPP_E19/DDPB_CTRLDATA
N7
GPP_E20/DDPC_CTRLCLK
N8
GPP_E21/DDPC_CTRLDATA
N11
GPP_E22/DDPD_CTRLCLK
N12
GPP_E23/DDPD_CTRLDATA
E52
EDP_RCOMP
SKL_ULT
REV = 1
SKL_ULT
DDI
DISPLAY SIDEBANDS
3
?
Need apply PN
EDP
GPP_E13/DDPB_HPD0
GPP_E14/DDPC_HPD1
GPP_E15/DDPD_HPD2
GPP_E16/DDPE_HPD3
EDP_TXN[0]
EDP_TXP[0]
EDP_TXN[1]
EDP_TXP[1]
EDP_TXN[2]
EDP_TXP[2]
EDP_TXN[3]
EDP_TXP[3]
EDP_AUXN
EDP_AUXP
EDP_DISP_UTIL
DDI1_AUXN
DDI1_AUXP
DDI2_AUXN
DDI2_AUXP
DDI3_AUXN
DDI3_AUXP
GPP_E17/EDP_HPD
EDP_BKLTEN
EDP_BKLTCTL
EDP_VDDEN
?1 OF 20
C47
INT_EDP_TXN0
C46
INT_EDP_TXP0
D46
INT_EDP_TXN1
C45
INT_EDP_TXP1
A45
B45
A47
B47
E45
INT_EDP_AUXN
F45
INT_EDP_AUXP
B52
G50
F50
E48
DOCK_DDI2_AUXN
F48
DOCK_DDI2_AUXP
G46
F46
L9
PCH_HDMI_HPD
L7
PCH_DOCK_DP_HPD
L6
N9
L10
EDP_HPD
R12
PCH_LVDS_BLON
R11
PCH_DPST_PWM
U13
PCH_LCDVCC_EN
2
INT_EDP_TXN0 19
INT_EDP_TXP0 19
INT_EDP_TXN1 19
INT_EDP_TXP1 19
INT_EDP_AUXN 19
INT_EDP_AUXP 19
DOCK_DDI2_AUXN 34
DOCK_DDI2_AUXP 34
PCH_HDMI_HPD 20
PCH_DOCK_DP_HPD 34
EDP_HPD 19
PCH_LVDS_BLON 19
PCH_DPST_PWM 19
PCH_LCDVCC_EN 19
1
+3V4,10,11,12,13,15,16,17,18,19,20,21,22,24,27,29,30,31,34,35,36,38,40,42,48
+VCCIO4,6,16,48,51
+VCCSTPLL4,5,6,9,42,48,51
Reserve EDP_HPD opposites circuit!
+3V
R424
EDP_HPD
*10K_4
R418
100K_4
02
PM_THRMTRIP#
Processor pull-up (CPU)
?
4 OF 20
Need apply PN
JTAG
PROC_TCK
PROC_TDI
PROC_TDO
PROC_TMS
PROC_TRST#
PCH_JTAG_TCK
PCH_JTAG_TDI
PCH_JTAG_TDO
PCH_JTAG_TMS
PCH_TRST#
JTAGX
PDC
3
B61
D60
A61
C60
B59
B56
D59
A56
C59
C61
A59
XDP_TCK0
XDP_TDI_CPU
XDP_TDO_CPU
XDP_TMS_CPU
XDP_TRST#_CPU
JTAG_TCK_PCH
JTAG_TDI_PCH
JTAG_TDO_PCH
JTAG_TMS_PCH
XDP_TRST#_CPU
JTAGX_PCH
XDP_TCK0 16
XDP_TDI_CPU 16
XDP_TDO_CPU 16
XDP_TMS_CPU 16
XDP_TRST#_CPU 2,16
JTAG_TCK_PCH 16
JTAG_TDI_PCH 16
JTAG_TDO_PCH 16
JTAG_TMS_PCH 16
XDP_TRST#_CPU 2,16
JTAGX_PCH 16
2
TP37
EC_PECI29
H_PROCHOT#29,42
B B
+VCCIO
A A
R505 0_4
5
R511 499/F_4
PM_THRMTRIP#29
XDP_BPM016
XDP_BPM116
TP48
R89 49.9/F_4
R79 49.9/F_4
R241 49.9/F_4
R237 49.9/F_4
R510 *51_4
R508 51_4
R494 51_4
R507 51_4
R493 51_4
Close to Chipset
CATERR#
EC_PECI
PROCHOT#
PM_THRMTRIP#
PROC_POPIRCOMP
PCH_OPI_RCOMP
EDRAM_OPIO_RCOMP
EOPIO_RCOMP
JTAGX_PCH
JTAG_TMS_PCH
JTAG_TDI_PCH
JTAG_TDO_PCH
JTAG_TCK_PCH
4
D63
CATERR#
A54
PECI
C65
PROCHOT#
C63
THERMTRIP#
A65
SKTOCC#
C55
BPM#[0]
D55
BPM#[1]
B54
BPM#[2]
C56
BPM#[3]
A6
GPP_E3/CPU_GP0
A7
GPP_E7/CPU_GP1
BA5
GPP_B3/CPU_GP2
AY5
GPP_B4/CPU_GP3
AT16
PROC_POPIRCOMP
AU16
PCH_OPIRCOMP
H66
OPCE_RCOMP
H65
OPC_RCOMP
U28D
SKL_ULT
REV = 1
CPU MISC
SKL_ULT
TO BE REPLACED WITH 1K OHMS FOR SKL .
470 OHM IS FOR I/P
PLACE NEAR CPU
XDP_TMS_CPU
XDP_TDI_CPU
XDP_TDO_CPU
H_PROCHOT#
XDP_TCK0
XDP_TRST#_CPU
Date:
Date:
Date:
R487 1K_4
R509 *51_4
R496
R486 *51_4
R516 1K_4
R485 51_4
R495 51_4
PROJECT : PS8
PROJECT : PS8
PROJECT : PS8
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Document Number
Document Number
Document Number
Custom
Custom
Custom
+VCCSTPLL
+VCCIO
*51_4
+VCCSTPLL
02 -- SKYLAKE 1/20(eDP/DDI)
02 -- SKYLAKE 1/20(eDP/DDI)
02 -- SKYLAKE 1/20(eDP/DDI)
Sheet
Sheet
Sheet
1
2 57Monday, November 09, 2015
2 57Monday, November 09, 2015
2 57Monday, November 09, 2015
RevSize
RevSize
RevSize
1A
1A
1A
of
of
of
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3
2
1
M_A_DQSN[7:0]17
M_A_DQSP[7:0]17
M_A_DQ[63:0]17
SkyLake ULT Processor (DDR4)
D D
M_B_DQSN[7:0]18
M_B_DQSP[7:0]18
M_B_DQ[63:0]18
+1.2V_SUS6,17,18,46,51
03
Need apply PN
?
U28B
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
C C
B B
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
AL71
DDR0_DQ[0]
AL68
DDR0_DQ[1]
AN68
DDR0_DQ[2]
AN69
DDR0_DQ[3]
AL70
DDR0_DQ[4]
AL69
DDR0_DQ[5]
AN70
DDR0_DQ[6]
AN71
DDR0_DQ[7]
AR70
DDR0_DQ[8]
AR68
DDR0_DQ[9]
AU71
DDR0_DQ[10]
AU68
DDR0_DQ[11]
AR71
DDR0_DQ[12]
AR69
DDR0_DQ[13]
AU70
DDR0_DQ[14]
AU69
DDR0_DQ[15]
AF65
DDR1_DQ[0]/DDR0_DQ[16]
AF64
DDR1_DQ[1]/DDR0_DQ[17]
AK65
DDR1_DQ[2]/DDR0_DQ[18]
AK64
DDR1_DQ[3]/DDR0_DQ[19]
AF66
DDR1_DQ[4]/DDR0_DQ[20]
AF67
DDR1_DQ[5]/DDR0_DQ[21]
AK67
DDR1_DQ[6]/DDR0_DQ[22]
AK66
DDR1_DQ[7]/DDR0_DQ[23]
AF70
DDR1_DQ[8]/DDR0_DQ[24]
AF68
DDR1_DQ[9]/DDR0_DQ[25]
AH71
DDR1_DQ[10]/DDR0_DQ[26]
AH68
DDR1_DQ[11]/DDR0_DQ[27]
AF71
DDR1_DQ[12]/DDR0_DQ[28]
AF69
DDR1_DQ[13]/DDR0_DQ[29]
AH70
DDR1_DQ[14]/DDR0_DQ[30]
AH69
DDR1_DQ[15]/DDR0_DQ[31]
BB65
DDR0_DQ[16]/DDR0_DQ[32]
AW65
DDR0_DQ[17]/DDR0_DQ[33]
AW63
DDR0_DQ[18]/DDR0_DQ[34]
AY63
DDR0_DQ[19]/DDR0_DQ[35]
BA65
DDR0_DQ[20]/DDR0_DQ[36]
AY65
DDR0_DQ[21]/DDR0_DQ[37]
BA63
DDR0_DQ[22]/DDR0_DQ[38]
BB63
DDR0_DQ[23]/DDR0_DQ[39]
BA61
DDR0_DQ[24]/DDR0_DQ[40]
AW61
DDR0_DQ[25]/DDR0_DQ[41]
BB59
DDR0_DQ[26]/DDR0_DQ[42]
AW59
DDR0_DQ[27]/DDR0_DQ[43]
BB61
DDR0_DQ[28]/DDR0_DQ[44]
AY61
DDR0_DQ[29]/DDR0_DQ[45]
BA59
DDR0_DQ[30]/DDR0_DQ[46]
AY59
DDR0_DQ[31]/DDR0_DQ[47]
AT66
DDR1_DQ[16]/DDR0_DQ[48]
AU66
DDR1_DQ[17]/DDR0_DQ[49]
AP65
DDR1_DQ[18]/DDR0_DQ[50]
AN65
DDR1_DQ[19]/DDR0_DQ[51]
AN66
DDR1_DQ[20]/DDR0_DQ[52]
AP66
DDR1_DQ[21]/DDR0_DQ[53]
AT65
DDR1_DQ[22]/DDR0_DQ[54]
AU65
DDR1_DQ[23]/DDR0_DQ[55]
AT61
DDR1_DQ[24]/DDR0_DQ[56]
AU61
DDR1_DQ[25]/DDR0_DQ[57]
AP60
DDR1_DQ[26]/DDR0_DQ[58]
AN60
DDR1_DQ[27]/DDR0_DQ[59]
AN61
DDR1_DQ[28]/DDR0_DQ[60]
AP61
DDR1_DQ[29]/DDR0_DQ[61]
AT60
DDR1_DQ[30]/DDR0_DQ[62]
AU60
DDR1_DQ[31]/DDR0_DQ[63]
SKL_ULT
REV = 1
SKL_ULT
DDR0_MA[5]/DDR0_CAA[0]/DDR0_MA[5]
DDR0_MA[9]/DDR0_CAA[1]/DDR0_MA[9]
DDR0_MA[6]/DDR0_CAA[2]/DDR0_MA[6]
DDR0_MA[8]/DDR0_CAA[3]/DDR0_MA[8]
DDR0_MA[7]/DDR0_CAA[4]/DDR0_MA[7]
DDR0_BA[2]/DDR0_CAA[5]/DDR0_BG[0]
DDR0_MA[12]/DDR0_CAA[6]/DDR0_MA[12]
DDR0_MA[11]/DDR0_CAA[7]/DDR0_MA[11]
DDR0_MA[15]/DDR0_CAA[8]/DDR0_ACT#
DDR0_MA[14]/DDR0_CAA[9]/DDR0_BG[1]
DDR0_MA[13]/DDR0_CAB[0]/DDR0_MA[13]
DDR0_CAS#/DDR0_CAB[1]/DDR0_MA[15]
DDR0_WE#/DDR0_CAB[2]/DDR0_MA[14]
DDR0_RAS#/DDR0_CAB[3]/DDR0_MA[16]
DDR0_BA[0]/DDR0_CAB[4]/DDR0_BA[0]
DDR0_MA[2]/DDR0_CAB[5]/DDR0_MA[2]
DDR0_BA[1]/DDR0_CAB[6]/DDR0_BA[1]
DDR0_MA[10]/DDR0_CAB[7]/DDR0_MA[10]
DDR0_MA[1]/DDR0_CAB[8]/DDR0_MA[1]
DDR0_MA[0]/DDR0_CAB[9]/DDR0_MA[0]
DDR1_DQSN[0]/DDR0_DQSN[2]
DDR1_DQSP[0]/DDR0_DQSP[2]
DDR1_DQSN[1]/DDR0_DQSN[3]
DDR1_DQSP[1]/DDR0_DQSP[3]
DDR0_DQSN[2]/DDR0_DQSN[4]
DDR0_DQSP[2]/DDR0_DQSP[4]
DDR0_DQSN[3]/DDR0_DQSN[5]
DDR0_DQSP[3]/DDR0_DQSP[5]
DDR1_DQSN[2]/DDR0_DQSN[6]
DDR1_DQSP[2]/DDR0_DQSP[6]
DDR1_DQSN[3]/DDR0_DQSN[7]
DDR1_DQSP[3]/DDR0_DQSP[7]
NIL-DDR CH A
2 OF 20
DDR0_CKN[0]
DDR0_CKP[0]
DDR0_CKN[1]
DDR0_CKP[1]
DDR0_CKE[0]
DDR0_CKE[1]
DDR0_CKE[2]
DDR0_CKE[3]
DDR0_CS#[0]
DDR0_CS#[1]
DDR0_ODT[0]
DDR0_ODT[1]
DDR0_MA[3]
DDR0_MA[4]
DDR0_DQSN[0]
DDR0_DQSP[0]
DDR0_DQSN[1]
DDR0_DQSP[1]
DDR0_ALERT#
DDR0_PAR
DDR_VREF_CA
DDR0_VREF_DQ
DDR1_VREF_DQ
DDR_VTT_CNTL
AU53
AT53
AU55
AT55
BA56
BB56
AW56
AY56
AU45
AU43
AT45
AT43
BA51
BB54
BA52
AY52
AW52
AY55
AW54
BA54
BA55
AY54
AU46
AU48
AT46
AU50
AU52
AY51
AT48
AT50
BB50
AY50
BA50
BB52
AM70
M_A_DQSN0
AM69
M_A_DQSP0
AT69
M_A_DQSN1
AT70
M_A_DQSP1
AH66
M_A_DQSN2
AH65
M_A_DQSP2
AG69
M_A_DQSN3
AG70
M_A_DQSP3
BA64
M_A_DQSN4
AY64
M_A_DQSP4
AY60
M_A_DQSN5
BA60
M_A_DQSP5
AR66
M_A_DQSN6
AR65
M_A_DQSP6
AR61
M_A_DQSN7
AR60
M_A_DQSP7
AW50
M_A_ALERT#
AT52
M_A_PARITY M_B_ALERT#
AY67
AY68
BA67
AW67
M_A_CLKN0 17
M_A_CLKP0 17
M_A_CLKN1 17
M_A_CLKP1 17
M_A_CKE0 17
M_A_CKE1 17
M_A_CS#0 17
M_A_CS#1 17
M_A_ODT0_CPU 17
M_A_ODT1_CPU 17
M_A_A5 17
M_A_A9 17
M_A_A6 17
M_A_A8 17
M_A_A7 17
M_A_BG#0 17
M_A_A12 17
M_A_A11 17
M_A_ACT# 17
M_A_BG#1 17
M_A_A13 17
M_A_CAS# 17
M_A_WE# 17
M_A_RAS# 17
M_A_BA#0 17
M_A_A2 17
M_A_BA#1 17
M_A_A10 17
M_A_A1 17
M_A_A0 17
M_A_A3 17
M_A_A4 17
M_A_ALERT# 17
M_A_PARITY 17
SM_VREF_CA 17
TP10
SM_VREF_DQ1 18
DDR_PG_CTRL 17
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
U28C
AY39
DDR0_DQ[32]/DDR1_DQ[0]
AW39
DDR0_DQ[33]/DDR1_DQ[1]
AY37
DDR0_DQ[34]/DDR1_DQ[2]
AW37
DDR0_DQ[35]/DDR1_DQ[3]
BB39
DDR0_DQ[36]/DDR1_DQ[4]
BA39
DDR0_DQ[37]/DDR1_DQ[5]
BA37
DDR0_DQ[38]/DDR1_DQ[6]
BB37
DDR0_DQ[39]/DDR1_DQ[7]
AY35
DDR0_DQ[40]/DDR1_DQ[8]
AW35
DDR0_DQ[41]/DDR1_DQ[9]
AY33
DDR0_DQ[42]/DDR1_DQ[10]
AW33
DDR0_DQ[43]/DDR1_DQ[11]
BB35
DDR0_DQ[44]/DDR1_DQ[12]
BA35
DDR0_DQ[45]/DDR1_DQ[13]
BA33
DDR0_DQ[46]/DDR1_DQ[14]
BB33
DDR0_DQ[47]/DDR1_DQ[15]
AU40
DDR1_DQ[32]/DDR1_DQ[16]
AT40
DDR1_DQ[33]/DDR1_DQ[17]
AT37
DDR1_DQ[34]/DDR1_DQ[18]
AU37
DDR1_DQ[35]/DDR1_DQ[19]
AR40
DDR1_DQ[36]/DDR1_DQ[20]
AP40
DDR1_DQ[37]/DDR1_DQ[21]
AP37
DDR1_DQ[38]/DDR1_DQ[22]
AR37
DDR1_DQ[39]/DDR1_DQ[23]
AT33
DDR1_DQ[40]/DDR1_DQ[24]
AU33
DDR1_DQ[41]/DDR1_DQ[25]
AU30
DDR1_DQ[42]/DDR1_DQ[26]
AT30
DDR1_DQ[43]/DDR1_DQ[27]
AR33
DDR1_DQ[44]/DDR1_DQ[28]
AP33
DDR1_DQ[45]/DDR1_DQ[29]
AR30
DDR1_DQ[46]/DDR1_DQ[30]
AP30
DDR1_DQ[47]/DDR1_DQ[31]
AY31
DDR0_DQ[48]/DDR1_DQ[32]
AW31
DDR0_DQ[49]/DDR1_DQ[33]
AY29
DDR0_DQ[50]/DDR1_DQ[34]
AW29
DDR0_DQ[51]/DDR1_DQ[35]
BB31
DDR0_DQ[52]/DDR1_DQ[36]
BA31
DDR0_DQ[53]/DDR1_DQ[37]
BA29
DDR0_DQ[54]/DDR1_DQ[38]
BB29
DDR0_DQ[55]/DDR1_DQ[39]
AY27
DDR0_DQ[56]/DDR1_DQ[40]
AW27
DDR0_DQ[57]/DDR1_DQ[41]
AY25
DDR0_DQ[58]/DDR1_DQ[42]
AW25
DDR0_DQ[59]/DDR1_DQ[43]
BB27
DDR0_DQ[60]/DDR1_DQ[44]
BA27
DDR0_DQ[61]/DDR1_DQ[45]
BA25
DDR0_DQ[62]/DDR1_DQ[46]
BB25
DDR0_DQ[63]/DDR1_DQ[47]
AU27
DDR1_DQ[48]
AT27
DDR1_DQ[49]
AT25
DDR1_DQ[50]
AU25
DDR1_DQ[51]
AP27
DDR1_DQ[52]
AN27
DDR1_DQ[53]
AN25
DDR1_DQ[54]
AP25
DDR1_DQ[55]
AT22
DDR1_DQ[56]
AU22
DDR1_DQ[57]
AU21
DDR1_DQ[58]
AT21
DDR1_DQ[59]
AN22
DDR1_DQ[60]
AP22
DDR1_DQ[61]
AP21
DDR1_DQ[62]
AN21
DDR1_DQ[63]
SKL_ULT
REV = 1
?
SKL_ULT
Need apply PN
DDR1_MA[5]/DDR1_CAA[0]/DDR1_MA[5]
DDR1_MA[9]/DDR1_CAA[1]/DDR1_MA[9]
DDR1_MA[6]/DDR1_CAA[2]/DDR1_MA[6]
DDR1_MA[8]/DDR1_CAA[3]/DDR1_MA[8]
DDR1_MA[7]/DDR1_CAA[4]/DDR1_MA[7]
DDR1_BA[2]/DDR1_CAA[5]/DDR1_BG[0]
DDR1_MA[12]/DDR1_CAA[6]/DDR1_MA[12]
DDR1_MA[11]/DDR1_CAA[7]/DDR1_MA[11]
DDR1_MA[15]/DDR1_CAA[8]/DDR1_ACT#
DDR1_MA[14]/DDR1_CAA[9]/DDR1_BG[1]
DDR1_MA[13]/DDR1_CAB[0]/DDR1_MA[13]
DDR1_CAS#/DDR1_CAB[1]/DDR1_MA[15]
DDR1_WE#/DDR1_CAB[2]/DDR1_MA[14]
DDR1_RAS#/DDR1_CAB[3]/DDR1_MA[16]
DDR1_BA[0]/DDR1_CAB[4]/DDR1_BA[0]
DDR1_MA[2]/DDR1_CAB[5]/DDR1_MA[2]
DDR1_BA[1]/DDR1_CAB[6]/DDR1_BA[1]
DDR1_MA[10]/DDR1_CAB[7]/DDR1_MA[10]
DDR1_MA[1]/DDR1_CAB[8]/DDR1_MA[1]
DDR1_MA[0]/DDR1_CAB[9]/DDR1_MA[0]
DDR0_DQSN[4]/DDR1_DQSN[0]
DDR0_DQSP[4]/DDR1_DQSP[0]
DDR0_DQSN[5]/DDR1_DQSN[1]
DDR0_DQSP[5]/DDR1_DQSP[1]
DDR1_DQSN[4]/DDR1_DQSN[2]
DDR1_DQSP[4]/DDR1_DQSP[2]
DDR1_DQSN[5]/DDR1_DQSN[3]
DDR1_DQSP[5]/DDR1_DQSP[3]
DDR0_DQSN[6]/DDR1_DQSN[4]
DDR0_DQSP[6]/DDR1_DQSP[4]
DDR0_DQSN[7]/DDR1_DQSN[5]
DDR0_DQSP[7]/DDR1_DQSP[5]
DRAM_RESET#
DDR_RCOMP[0]
DDR_RCOMP[1]
NIL-DDR CH B
3 OF 20
DDR_RCOMP[2]
PDC
DDR1_CKN[0]
DDR1_CKN[1]
DDR1_CKP[0]
DDR1_CKP[1]
DDR1_CKE[0]
DDR1_CKE[1]
DDR1_CKE[2]
DDR1_CKE[3]
DDR1_CS#[0]
DDR1_CS#[1]
DDR1_ODT[0]
DDR1_ODT[1]
DDR1_MA[3]
DDR1_MA[4]
DDR1_DQSN[6]
DDR1_DQSP[6]
DDR1_DQSN[7]
DDR1_DQSP[7]
DDR1_ALERT#
DDR1_PAR
AN45
AN46
AP45
AP46
AN56
AP55
AN55
AP53
BB42
AY42
BA42
AW42
AY48
AP50
BA48
BB48
AP48
AP52
AN50
AN48
AN53
AN52
BA43
AY43
AY44
AW44
BB44
AY47
BA44
AW46
AY46
BA46
BB46
BA47
BA38
AY38
AY34
BA34
AT38
AR38
AT32
AR32
BA30
AY30
AY26
BA26
AR25
AR27
AR22
AR21
AN43
AP43
AT13
AR18
AT18
AU18
M_B_DQSN0
M_B_DQSP0
M_B_DQSN1
M_B_DQSP1
M_B_DQSN2
M_B_DQSP2
M_B_DQSN3
M_B_DQSP3
M_B_DQSN4
M_B_DQSP4
M_B_DQSN5
M_B_DQSP5
M_B_DQSN6
M_B_DQSP6
M_B_DQSN7
M_B_DQSP7
M_B_PARITY
SM_DRAMRST#
SM_RCOMP_0
SM_RCOMP_1
SM_RCOMP_2
M_B_CLKN0 18
M_B_CLKN1 18
M_B_CLKP0 18
M_B_CLKP1 18
M_B_CKE0 18
M_B_CKE1 18
M_B_CS#0 18
M_B_CS#1 18
M_B_ODT0_CPU 18
M_B_ODT1_CPU 18
M_B_A5 18
M_B_A9 18
M_B_A6 18
M_B_A8 18
M_B_A7 18
M_B_BG#0 18
M_B_A12 18
M_B_A11 18
M_B_ACT# 18
M_B_BG#1 18
M_B_A13 18
M_B_CAS# 18
M_B_WE# 18
M_B_RAS# 18
M_B_BA#0 18
M_B_A2 18
M_B_BA#1 18
M_B_A10 18
M_B_A1 18
M_B_A0 18
M_B_A3 18
M_B_A4 18
M_B_ALERT# 18
M_B_PARITY 18
R162 121/F_4
R165 80.6/F_4
R164 100/F_4
+1.2V_SUS
R166
470_4
DDR3_DRAMRST# 17,18
A A
PROJECT : PS8
PROJECT : PS8
PROJECT : PS8
Quanta Computer Inc.
Quanta Computer Inc.
5
4
Quanta Computer Inc.
Document Number
Document Number
Document Number
Custom
Custom
Custom
03 -- SKYLAKE 3/20(DDR3-A I/F)
03 -- SKYLAKE 3/20(DDR3-A I/F)
03 -- SKYLAKE 3/20(DDR3-A I/F)
Sheet
Sheet
Date:
Date:
3
2
Date:
Sheet
1
RevSize
RevSize
RevSize
1A
1A
3 57Monday, November 09, 2015
3 57Monday, November 09, 2015
3 57Monday, November 09, 2015
1A
of
of
of
Vinafix.com
5
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D D
PLTRST#
SYS_RESET#16
RSMRST#16,29
EC_PWROK22,29,30
PCIE_WAKE#25
LANWAKE#23
LAN_DIS#23
EC-SIT-14
C C
TOUCH_EN19
R447 *10K_4
C469 *0.1U/16V_4
R129*0_4
SYS_RESET#
RSMRST#
PROCPWRGD
H_VCCST_PWRGD
SYS_PWROK
EC_PWROK
DSWROK_EC_R
SUSWARN#
SUSACK#
PCIE_WAKE#
LANWAKE#
LAN_DIS#
RSMRST#
SYS_RESET#
EC7
*220P/50V_4
4
EC9
*220P/50V_4
U28K
SYSTEM POWER MANAGEMENT
AN10
GPP_B13/PLTRST#
B5
SYS_RESET#
AY17
RSMRST#
A68
PROCPWRGD
B65
VCCST_PWRGD
B6
SYS_PWROK
BA20
PCH_PWROK
BB20
DSW_PW ROK
AR13
GPP_A13/SUSW ARN#/SUSPW RDNACK
AP11
GPP_A15/SUSACK#
BB15
WAKE#
AM15
GPD2/LAN_WAKE#
AW17
GPD11/LANPHYPC
AT15
GPD7/RSVD
SKL_ULT
REV = 1
SKL_ULT
?
11 OF 20
3
Need apply PN
GPP_B12/SLP_S0#
GPD4/SLP_S3#
GPD5/SLP_S4#
GPD10/SLP_S5#
GPD9/SLP_WLAN#
GPD6/SLP_A#
GPD3/PWRBTN#
GPD1/ACPRESENT
GPD0/BATLOW #
GPP_A11/PME#
GPP_B11/EXT_PW R_GATE#
INTRUDER#
GPP_B2/VRALERT#
SLP_SUS#
SLP_LAN#
2
+3V_DEEP_SUS10,11,14,15,16,17
+VCCSTPLL2,5,6,9,42,48,51
+3V_RTC_213,15
1
+3VS510,12,15,16,19,21,23,25,28,31,32,36,38,41,47,48,49,51
+3V2,10,11,12,13,15,16,17,18,19,20,21,22,24,27,29,30,31,34,35,36,38,40,42,48
+5VS519,26,27,28,32,33,35,37,38,41,42,45,46,47,48,49,51
+VCCIO2,6,16,48,51
04
PCH Pull-high/low(CLG)
AT11
PCH_SLP_S0_N
AP15
BA16
AY16
AN15
AW15
BB17
AN16
BA15
DNBSWON#
AY15
AC_PRESENT_EC
AU13
PM_BATLOW_N_EC
AU11
AP16
INTRUDER#_R
AM10
EXT_PWR_GATE#
AM11
?
R163 1M_4
PCH_SLP_S0_N 16
SUSB# 16,29
SUSC# 16,29
SLP_S5# 16
SLP_LAN# 23
SLP_WLAN# 25
SLP_A# 16,29
DNBSWON# 16,29
AC_PRESENT_EC 29
PM_BATLOW_N_EC 29
+3V_RTC_2
EC-SIT-14
SUSWARN#
SUSACK#
PM_BATLOW_N_EC
PCIE_WAKE#
AC_PRESENT_EC
LANWAKE#
SYS_RESET#
RSMRST#
DSWROK_EC_R
TOUCH_EN
+3V_DEEP_SUS
R114 *10K_4
R128 *10K_4
R144 10K_4
R70 1K_4
R84 10K_4
R124 10K_4
R475 10K_4
R80 10K_4
R91 *100K/F_4
R815 100K/F_4
EC-DV-07
+3VS5
+3V
EXT_PWR_GATE#
RSMRST# DSWROK_EC_R
B B
PLTRST#21,23,24,25,29,30
PLTRST#(CLG)
SYS_PWROK29
A A
R100 *0_4_S
R482 0_4
R224
100K/F_4
PLTRST#
EC18
*220P/50V_4
EC_PWROKSYS_PWROK
R476
100K/F_4
Close to CPU side
H_VCCST_PWRGD trace 0.3" - 1.5"
+VCCIO
HWPG16,21,29,46,49
D24 DB2J40600L
21
+VCCSTPLL
R517
1K_4
H_VCCST_PWRGD_R
C495
*10P/50V_4
R512
*1K_4
R491 60.4_4
H_VCCST_PWRGD
+VCCIO +3VS5+5VS5
R514
15K_4
R500
100K_4
2
1 3
+1.0V_PWRGD_G1
C497
0.1U/16V_4
R60 *20K/F_4
R520
100K_4
+1.0V_PWRGD_G2
Q34
PMBT3904
+3VS5
R522
10K_4
Q36
DMN601K-7
HWPG
R525
100K_4
3
2
1
System PWR_OK(CLG)
PROJECT : PS8
PROJECT : PS8
PROJECT : PS8
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Document Number
Document Number
Document Number
Date:
Date:
5
4
3
2
Date:
04 -- SKYPAKE 5/20(Power Manger)
04 -- SKYPAKE 5/20(Power Manger)
04 -- SKYPAKE 5/20(Power Manger)
Sheet
Sheet
Sheet
1
RevSize
RevSize
RevSize
1ACustom
1ACustom
4 57Monday, November 09, 2015
4 57Monday, November 09, 2015
4 57Monday, November 09, 2015
1ACustom
of
of
of
Vinafix.com
5
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C489
C263
C197
10U/6.3V_4
C219
22U/6.3V_6
C255
22U/6.3V_6
C276
10U/6.3V_4
C493
22U/6.3V_6
22U/6.3V_6
10U/6.3V_4
10U/6.3V_4
C233
22U/6.3V_6
22U/6.3V_6
D D
C C
C247
C198
10U/6.3V_4
C508
22U/6.3V_6
C369
22U/6.3V_6
C196
10U/6.3V_4
C483
22U/6.3V_6
Close CPU
+VCC_CORE
C498
47U/6.3V_8
+VCC_CORE
C280
10U/6.3V_4
C519
47U/6.3V_8
C344
10U/6.3V_4
C516
47U/6.3V_8 R489
47U/6.3V_8
C353
10U/6.3V_4
10U/6.3V_4
C509
C290
C515
47U/6.3V_8
C466
10U/6.3V_4
C213
22U/6.3V_6
10U/6.3V_4
C269
22U/6.3V_6
C504
47U/6.3V_8
C358
10U/6.3V_4
4
SKL_ULT
C232
22U/6.3V_6
C341
10U/6.3V_4
C506
47U/6.3V_8
C467
10U/6.3V_4
22U/6.3V_6
Under CPU
C505
47U/6.3V_8
C481
10U/6.3V_4
+VCC_CORE +VCC_CORE
C364
AK33
AK35
AK37
AK38
AK40
AL33
AL37
AL40
AM32
AM33
AM35
AM37
AM38
AK32
AB62
AC63
AE63
AE62
AG62
AL63
AJ62
A30
A34
A39
A44
G30
K32
P62
V62
H63
G61
+VCC_CORE
U28L
CPU POWER 1 OF 4
VCC_A30
VCC_A34
33A
VCC_A39
VCC_A44
VCC_AK33
VCC_AK35
VCC_AK37
VCC_AK38
VCC_AK40
VCC_AL33
VCC_AL37
VCC_AL40
VCC_AM32
VCC_AM33
VCC_AM35
VCC_AM37
VCC_AM38
VCC_G30
RSVD_K32
RSVD_AK32
VCCOPC_AB62
VCCOPC_P62
VCCOPC_V62
VCC_OPC_1P8_H63
VCC_OPC_1P8_G61
VCCOPC_SENSE
VSSOPC_SENSE
VCCEOPIO
VCCEOPIO
VCCEOPIO_SENSE
VSSEOPIO_SENSE
SKL_ULT
REV = 1
RF RESERVE
3
?
Need apply PN
12 OF 20
C9707 *1U/6.3V_4
C9708 *22U/6.3V_6
C9709 *1U/6.3V_4
C9710 *22U/6.3V_6
VCC_G32
VCC_G33
VCC_G35
VCC_G37
VCC_G38
VCC_G40
VCC_G42
VCC_J30
VCC_J33
VCC_J37
VCC_J40
VCC_K33
VCC_K35
VCC_K37
VCC_K38
VCC_K40
VCC_K42
VCC_K43
VCC_SENSE
VSS_SENSE
VIDALERT#
VIDSCK
VIDSOUT
VCCSTG_G20
PDC
G32
G33
G35
G37
C465
G38
1U/6.3V_4
G40
G42
J30
J33
J37
J40
K33
C349
K35
1U/6.3V_4
K37
K38
K40
K42
K43
E32
E33
B63
A63
D64
G20
?
Layout note: need routing together and ALERT need between CLK and DATA.
CLOSE TO CPU
PLACE THE PU RESISTORS
C239
1U/6.3V_4
C266
1U/6.3V_4
H_CPU_SVIDALRT#
VR_SVID_CLK_R
H_CPU_SVIDDAT
H_CPU_SVIDALRT#
C360
1U/6.3V_4
C259
1U/6.3V_4
2
C218
1U/6.3V_4
C249
1U/6.3V_4
R243 100/F_4
R244 100/F_4
R474 220/F_4
C480
1U/6.3V_4
C203
1U/6.3V_4
C195
1U/6.3V_4
C207
1U/6.3V_4
+VCCSTPLL
56.2/F_4
C490
*0.1U/16V_4
Under CPU
C226
1U/6.3V_4
C279
1U/6.3V_4C293
+VCC_CORE43
+VCCSTG6
+VCCSTPLL2,4,6,9,42,48,51
C296
1U/6.3V_4C277
+VCC_CORE
VCC_SENSE 42
VSS_SENSE 42
+VCCSTG
SVID ALERT
VR_SVID_ALERT# 42
1
05
100- ±1%
pull-up to VCC
near processor.
B B
PLACE THE PU RESISTORS
CLOSE TO VR
PULL UP IS IN THE VR MODULE
VR_SVID_CLK_R
CLOSE TO CPU
PLACE THE PU RESISTORS
H_CPU_SVIDDAT
A A
5
4
3
R488 0_4
2
+VCCSTPLL
R504
*54.9/F_4
+VCCSTPLL
R477
100/F_4
R472 0_4
Date:
Date:
Date:
SVID CLK
VR_SVID_CLK 42
SVID DATA
VR_SVID_DATA 42
PROJECT : PS8
PROJECT : PS8
PROJECT : PS8
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Document Number
Document Number
Document Number
Custom
Custom
Custom
05 -- SKYPAKE 6/20 (POWER-1)
05 -- SKYPAKE 6/20 (POWER-1)
05 -- SKYPAKE 6/20 (POWER-1)
Sheet
Sheet
Sheet
1
RevSize
RevSize
RevSize
1A
1A
1A
of
of
of
5 57Monday, November 09, 2015
5 57Monday, November 09, 2015
5 57Monday, November 09, 2015
Vinafix.com
5
www.laptoprepairsecrets.com
D D
Under CPU
C201
C167
10U/6.3V_4
10U/6.3V_4
Close CPU
C133
10U/6.3V_4
10U/6.3V_4
C C
+VCCSTPLL
+VCCIO
C134
C114
10U/6.3V_4
EC-SIT-09
R784 *0_4
R513 0_4
R161 *0_4_S
R479 *0_6_S
C146
10U/6.3V_4
+VCCSTG
+VCCPLL_OC+1.2V_SUS
+VCCPLL+VCCSTPLL
+1.2V_SUS
C200
1U/6.3V_4
C113
1U/6.3V_4
C199
1U/6.3V_4
Close CPU Under CPU
C193
C173
*1U/6.3V_4
10U/6.3V_4
4
C136
1U/6.3V_4
+VCCSTPLL
+VCCSTG
+VCCPLL_OC
+VCCPLL
AU23
AU28
AU35
AU42
BB23
BB32
BB41
BB47
BB51
AM40
AL23
A18
A22
K20
K21
SKL_ULT
U28N
CPU POWER 3 OF 4
VDDQ_AU23
VDDQ_AU28
VDDQ_AU35
VDDQ_AU42
VDDQ_BB23
VDDQ_BB32
VDDQ_BB41
VDDQ_BB47
VDDQ_BB51
VDDQC
0.12A
VCCST
VCCSTG_A22
VCCPLL_OC
VCCPLL_K20
VCCPLL_K21
SKL_ULT
REV = 1
Need apply PN
?
2A
0.04A
0.12A
14 OF 20
VCCIO
3.1A
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCSA
4.5A
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCIO_SENSE
VSSIO_SENSE
VSSSA_SENSE
VCCSA_SENSE
AK28
AK30
AL30
AL42
AM28
AM30
AM42
AK23
AK25
G23
G25
G27
G28
J22
J23
J27
K23
K25
K27
K28
K30
AM23
AM22
H21
H20
3
C248
1U/6.3V_4
+VCCSA
C503
1U/6.3V_4
VCCIO_VCCSENSE
VCCIO_VSSSENSE
Under CPU
C204
1U/6.3V_4
C302
1U/6.3V_4
C283
10U/6.3V_4
C257
C216
1U/6.3V_4
1U/6.3V_4
C301
C514
1U/6.3V_4
1U/6.3V_4
C510
C230
10U/6.3V_4
10U/6.3V_4
VSSSA_SENSE 42
VCCSA_SENSE 42
C272
10U/6.3V_4
C513
1U/6.3V_4
C209
10U/6.3V_4
C264
10U/6.3V_4
C501
1U/6.3V_4
C502
10U/6.3V_4
VCCIO_VCCSENSE
VCCIO_VSSSENSE
2
C191
1U/6.3V_4
C223
1U/6.3V_4
C500
10U/6.3V_4
R199 *100/F_4
R196 *100/F_4
Close CPU
C225
1U/6.3V_4
Under CPU
C289
10U/6.3V_4
Close CPU
C205
1U/6.3V_4
C282
10U/6.3V_4
+VCCIO
+VCCIO
C238
1U/6.3V_4
C242
10U/6.3V_4
EC-SIT-32
+VCCIO2,4,16,48,51
+VCCSA42,45
+1.2V_SUS3,17,18,46,51
+VCCSTPLL2,4,5,9,42,48,51
+VCCSTG5
C511
10U/6.3V_4
C499
10U/6.3V_4
1
C512
10U/6.3V_4
C288
10U/6.3V_4
06
Close CPUUnder CPU
+VCCSTG +VCCPLL_OC +VCCPLL+VCCSTPLL
B B
C494
1U/6.3V_4
C190
1U/6.3V_4
C477
1U/6.3V_4
C274
1U/6.3V_4
Close A18 Ball
+VCCSTPLL
C464
*1U/6.3V_4
A A
5
C492
*22U/6.3V_6
+1.2V_SUS
C117
10U/6.3V_4
C123
10U/6.3V_4
4
C132
10U/6.3V_4
C130
10U/6.3V_4
C119
10U/6.3V_4
Close to CPU
C120
10U/6.3V_4
C192
1U/6.3V_4
C135
1U/6.3V_4
3
C206
1U/6.3V_4
C150
1U/6.3V_4
PROJECT : PS8
PROJECT : PS8
PROJECT : PS8
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Document Number
Document Number
Document Number
Custom
Custom
Custom
06 -- SKYPAKE 7/20 (POWER-2)
06 -- SKYPAKE 7/20 (POWER-2)
06 -- SKYPAKE 7/20 (POWER-2)
Sheet
Sheet
Date:
Date:
2
Date:
Sheet
1
RevSize
RevSize
RevSize
1A
1A
1A
of
of
of
6 57Monday, November 09, 2015
6 57Monday, November 09, 2015
6 57Monday, November 09, 2015
Vinafix.com
5
www.laptoprepairsecrets.com
4
3
2
1
+VCCGT 42,44
?
SKL_ULT
31A
PDC
13 OF 20
Need apply PN
VCCGTX_AK42
VCCGTX_AK43
VCCGTX_AK45
VCCGTX_AK46
VCCGTX_AK48
VCCGTX_AK50
VCCGTX_AK52
VCCGTX_AK53
VCCGTX_AK55
VCCGTX_AK56
VCCGTX_AK58
VCCGTX_AK60
VCCGTX_AK70
VCCGTX_AL43
VCCGTX_AL46
VCCGTX_AL50
VCCGTX_AL53
VCCGTX_AL56
VCCGTX_AL60
VCCGTX_AM48
VCCGTX_AM50
VCCGTX_AM52
VCCGTX_AM53
VCCGTX_AM56
VCCGTX_AM58
VCCGTX_AU58
VCCGTX_AU63
VCCGTX_BB57
VCCGTX_BB66
VCCGTX_SENSE
VSSGTX_SENSE
AA63
AA64
AA66
AA67
AA69
AA70
AA71
AC64
AC65
AC66
AC67
AC68
AC69
AC70
AC71
M62
N63
N64
N66
N67
N69
A48
A53
A58
A62
A66
J43
J45
J46
J48
J50
J52
J53
J55
J56
J58
J60
K48
K50
K52
K53
K55
K56
K58
K60
L62
L63
L64
L65
L66
L67
L68
L69
L70
L71
J70
J69
U28M
CPU POWER 2 OF 4
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT_SENSE
VSSGT_SENSE
SKL_ULT
REV = 1
+VCCGT
C214
1U/6.3V_4
C217
1U/6.3V_4
C265
10U/6.3V_4
C215
10U/6.3V_4
C294
1U/6.3V_4
C211
1U/6.3V_4
D D
C C
B B
C287
10U/6.3V_4
C254
10U/6.3V_4
C258
1U/6.3V_4
C281
1U/6.3V_4
C212
10U/6.3V_4
C297
10U/6.3V_4
C305
1U/6.3V_4
C284
1U/6.3V_4
VCCGT_SENSE42
VSSGT_SENSE42
C234
10U/6.3V_4
C286
10U/6.3V_4
C295
1U/6.3V_4
C260
1U/6.3V_4
C243
10U/6.3V_4
C241
10U/6.3V_4
C235
1U/6.3V_4
C285
1U/6.3V_4
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
N70
N71
R63
R64
R65
R66
R67
R68
R69
R70
R71
T62
U65
U68
U71
W63
W64
W65
W66
W67
W68
W69
W70
W71
Y62
AK42
AK43
AK45
AK46
AK48
AK50
AK52
AK53
AK55
AK56
AK58
AK60
AK70
AL43
AL46
AL50
AL53
AL56
AL60
AM48
AM50
AM52
AM53
AM56
AM58
AU58
AU63
BB57
BB66
AK62
AL61
+VCCGT
Close CPUUnder CPU
C458
47U/6.3V_8
C208
22U/6.3V_6
C245
22U/6.3V_6
C449
47U/6.3V_8
C188
22U/6.3V_6
C250
22U/6.3V_6
C448
47U/6.3V_8
C222
22U/6.3V_6
C236
22U/6.3V_6
C447
47U/6.3V_8
C220
22U/6.3V_6
C187
22U/6.3V_6
C457
47U/6.3V_8
C221
22U/6.3V_6
C231
22U/6.3V_6
C456
47U/6.3V_8
C251
22U/6.3V_6
C186
22U/6.3V_6
07
A A
PROJECT : PS8
PROJECT : PS8
PROJECT : PS8
Quanta Computer Inc.
Quanta Computer Inc.
5
4
Quanta Computer Inc.
Document Number
Document Number
Document Number
Custom
Custom
Custom
07 -- SKYPAKE 8/20 (POWER-3)
07 -- SKYPAKE 8/20 (POWER-3)
07 -- SKYPAKE 8/20 (POWER-3)
Sheet
Sheet
Date:
Date:
3
2
Date:
Sheet
1
RevSize
RevSize
RevSize
1A
1A
1A
of
of
of
7 57Monday, November 09, 2015
7 57Monday, November 09, 2015
7 57Monday, November 09, 2015
Vinafix.com
5
www.laptoprepairsecrets.com
4
3
2
1
08
D D
U28R
SKL_ULT
F8
VSS
G10
VSS
G22
VSS
G43
VSS
G45
VSS
G48
VSS
G5
VSS
G52
VSS
C C
B B
G55
VSS
G58
VSS
G6
VSS
G60
VSS
G63
VSS
G66
VSS
H15
VSS
H18
VSS
H71
VSS
J11
VSS
J13
VSS
J25
VSS
J28
VSS
J32
VSS
J35
VSS
J38
VSS
J42
VSS
J8
VSS
K16
VSS
K18
VSS
K22
VSS
K61
VSS
K63
VSS
K64
VSS
K65
VSS
K66
VSS
K67
VSS
K68
VSS
K70
VSS
K71
VSS
L11
VSS
L16
VSS
L17
VSS
SKL_ULT
REV = 1
GND 3 OF 3
Need apply PN
?
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
18 OF 20
L18
L2
L20
L4
L8
N10
N13
N19
N21
N6
N65
N68
P17
P19
P20
P21
R13
R6
T15
T17
T18
T2
T21
T4
U10
U63
U64
U66
U67
U69
U70
V16
V17
V18
W13
W6
W9
Y17
Y19
Y20
Y21
?
AA65
AA68
AB15
AB16
AB18
AB21
AD13
AD16
AD19
AD20
AD21
AD62
AE64
AE65
AE66
AE67
AE68
AE69
AF10
AF15
AF17
AF63
AG16
AG17
AG18
AG19
AG20
AG21
AG71
AH13
AH63
AH64
AH67
AJ15
AJ18
AJ20
AK11
AK16
AK18
AK21
AK22
AK27
AK63
AK68
AK69
AL28
AL32
AL35
AL38
AL45
AL48
AL52
AL55
AL58
AL64
AD8
AF1
AF2
AF4
AH6
AK8
U28P
A5
VSS
A67
VSS
A70
VSS
AA2
VSS
AA4
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AB8
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AJ4
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AL2
VSS
VSS
VSS
VSS
VSS
AL4
VSS
VSS
VSS
VSS
VSS
VSS
VSS
SKL_ULT
REV = 1
SKL_ULT
GND 1 OF 3
Need apply PN
?
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
16 OF 20
AL65
AL66
AM13
AM21
AM25
AM27
AM43
AM45
AM46
AM55
AM60
AM61
AM68
AM71
AM8
AN20
AN23
AN28
AN30
AN32
AN33
AN35
AN37
AN38
AN40
AN42
AN58
AN63
AP10
AP18
AP20
AP23
AP28
AP32
AP35
AP38
AP42
AP58
AP63
AP68
AP70
AR11
AR15
AR16
AR20
AR23
AR28
AR35
AR42
AR43
AR45
AR46
AR48
AR5
AR50
AR52
AR53
AR55
AR58
AR63
AR8
AT2
AT20
AT23
AT28
AT35
AT4
AT42
AT56
AT58
?
AT63
AT68
AT71
AU10
AU15
AU20
AU32
AU38
AV68
AV69
AV70
AV71
AW10
AW12
AW14
AW16
AW18
AW21
AW23
AW26
AW28
AW30
AW32
AW34
AW36
AW38
AW41
AW43
AW45
AW47
AW49
AW51
AW53
AW55
AW57
AW6
AW60
AW62
AW64
AW66
AW8
AY66
BA10
BA14
BA18
BA23
BA28
BA32
BA36
BA45
U28Q
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AV1
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
B10
VSS
B14
VSS
B18
VSS
B22
VSS
B30
VSS
B34
VSS
B39
VSS
B44
VSS
B48
VSS
B53
VSS
B58
VSS
B62
VSS
B66
VSS
B71
VSS
BA1
VSS
VSS
VSS
VSS
BA2
VSS
VSS
VSS
VSS
VSS
F68
VSS
VSS
SKL_ULT
REV = 1
SKL_ULT
GND 2 OF 3
Need apply PN
?
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
PDC
17 OF 20
BA49
BA53
BA57
BA6
BA62
BA66
BA71
BB18
BB26
BB30
BB34
BB38
BB43
BB55
BB6
BB60
BB64
BB67
BB70
C1
C25
C5
D10
D11
D14
D18
D22
D25
D26
D30
D34
D39
D44
D45
D47
D48
D53
D58
D6
D62
D66
D69
E11
E15
E18
E21
E46
E50
E53
E56
E6
E65
E71
F1
F13
F2
F22
F23
F27
F28
F32
F33
F35
F37
F38
F4
F40
F42
BA41
?
A A
PROJECT : PS8
PROJECT : PS8
PROJECT : PS8
Quanta Computer Inc.
Quanta Computer Inc.
5
4
Quanta Computer Inc.
Document Number
Document Number
Document Number
Custom
Custom
Custom
8 -- SKYPAKE 9/20 (GND-1)
8 -- SKYPAKE 9/20 (GND-1)
8 -- SKYPAKE 9/20 (GND-1)
Sheet
Sheet
Date:
Date:
3
2
Date:
Sheet
1
RevSize
RevSize
RevSize
1A
1A
1A
of
of
of
8 57Monday, November 09, 2015
8 57Monday, November 09, 2015
8 57Monday, November 09, 2015
Vinafix.com
5
www.laptoprepairsecrets.com
ITP_PMODE16
CFG016
CFG116
CFG216
CFG316
CFG416
CFG516
CFG616
CFG716
CFG816
CFG916
CFG1016
CFG1116
CFG1216
CFG1316
CFG1416
CFG1516
CFG1616
CFG1716
CFG1816
CFG1916
+1.0V_DEEP_SUS
R236 49.9/F_4
R333 *1K_4
D D
C C
EC-SIT-08
B B
4
CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
CFG18
CFG19
CFG_RCOMP
R781*0_4
AL25
AL27
BA70
BA68
E68
B67
D65
D67
E70
C68
D68
C67
F71
G69
F70
G68
H70
G71
H69
G70
E63
F63
E66
F66
E60
E8
AY2
AY1
D1
D3
K46
K45
C71
B70
F60
A52
J71
J68
F65
G65
F61
E61
U28S
CFG[0]
CFG[1]
CFG[2]
CFG[3]
CFG[4]
CFG[5]
CFG[6]
CFG[7]
CFG[8]
CFG[9]
CFG[10]
CFG[11]
CFG[12]
CFG[13]
CFG[14]
CFG[15]
CFG[16]
CFG[17]
CFG[18]
CFG[19]
CFG_RCOMP
ITP_PMODE
RSVD_AY2
RSVD_AY1
RSVD_D1
RSVD_D3
RSVD_K46
RSVD_K45
RSVD_AL25
RSVD_AL27
RSVD_C71
RSVD_B70
RSVD_F60
RSVD_A52
RSVD_TP_BA70
RSVD_TP_BA68
RSVD_J71
RSVD_J68
VSS_F65
VSS_G65
RSVD_F61
RSVD_E61
SKL_ULT
REV = 1
SKL_ULT
RESERVED SIGNALS-1
PDC
?
19 OF 20
3
Need apply PN
RSVD_TP_BB68
RSVD_TP_BB69
RSVD_TP_AK13
RSVD_TP_AK12
RSVD_BB2
RSVD_BA3
RSVD_D5
RSVD_D4
RSVD_B2
RSVD_C2
RSVD_B3
RSVD_A3
RSVD_AW1
RSVD_E1
RSVD_E2
RSVD_BA4
RSVD_BB4
RSVD_A4
RSVD_C4
RSVD_A69
RSVD_B69
RSVD_AY3
RSVD_D71
RSVD_C70
RSVD_C54
RSVD_D54
VSS_AY71
RSVD_TP_AW71
RSVD_TP_AW70
PROC_SELECT#
TP5
TP6
TP4
TP1
TP2
ZVM#
MSM#
2
+1.0V_DEEP_SUS13,15,16,47,48,51
+VCCSTPLL2,4,5,6,42,48,51
+1.8V_DEEP_SUS15,49,51
BB68
BB69
AK13
AK12
BB2
BA3
AU5
AT5
D5
D4
B2
C2
B3
A3
AW1
E1
E2
BA4
BB4
A4
C4
BB5
A69
B69
AY3
D71
C70
C54
D54
AY4
BB3
AY71
AR56
AW71
AW70
AP56
C64
?
R405 0_4
R406 0_4
R490 *100K_4
Cannonlake-U use, SKL-U
un-install.
+1.8V_DEEP_SUS
R427 *0_6
C460
Close to CPU
Placement are required for future platform
compatibility purpose only.
+VCCSTPLL
*1U/6.3V_4
AW69
AW68
AU56
AW48
C7
U12
U11
H11
U28T
RSVD_AW69
RSVD_AW68
RSVD_AU56
RSVD_AW48
RSVD_C7
RSVD_U12
RSVD_U11
RSVD_H11
SKL_ULT
REV = 1
SKL_ULT
?
SPARE
20 OF 20
Need apply PN
RSVD_F6
RSVD_E3
RSVD_C11
RSVD_B11
RSVD_A11
RSVD_D12
RSVD_C12
RSVD_F52
1
09
F6
E3
C11
B11
A11
D12
C12
F52
?
Processor Strapping
CFG3
(Physcial Debug Enable)
DFX Privacy
CFG4
(DP Presence Strap)
A A
5
The CFG signals have a default value of '1' if not terminated on the board.
1 0
Disable: Enable: Set DFX Enable in DFX interface MSR
Disable; No physical DP attached to eDP
4
Enable; An ext DP device is connected to eDP
3
CFG3
CFG4
Circuit
R440 *1K_4
R439 1K_4
PROJECT : PS8
PROJECT : PS8
PROJECT : PS8
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Document Number
Document Number
Document Number
Custom
Custom
Custom
9 -- SKYPAKE 12/20 (RSV-1)
9 -- SKYPAKE 12/20 (RSV-1)
9 -- SKYPAKE 12/20 (RSV-1)
Sheet
Sheet
Date:
Date:
2
Date:
Sheet
1
RevSize
RevSize
RevSize
1A
1A
1A
of
of
of
9 57Monday, November 09, 2015
9 57Monday, November 09, 2015
9 57Monday, November 09, 2015
Vinafix.com
5
www.laptoprepairsecrets.com
PCH_SPI1_CLK21
PCH_SPI1_SO21
D D
C C
PCH_SPI1_SI21
PCH_SPI_CS2#_TPM21
SIO_EXT_SMI#29
CL_CLK25
CL_DATA25
CL_RST#25
EC_RCIN#29
EC_IRQ_SERIRQ29
4
PCH_SPI1_CLK
PCH_SPI1_SO
PCH_SPI1_SI
PCH_SPI_IO2
PCH_SPI_IO3
PCH_SPI_CS0#
PCH_SPI_CS2#_TPM
SIO_EXT_SMI#
PCI_SERR#
AW3
AW2
AW13
AY11
AV2
AV3
AU4
AU3
AU2
AU1
M2
M3
J4
V1
V2
M1
G3
G2
G1
U28E
SPI - FLASH
SPI0_CLK
SPI0_MISO
SPI0_MOSI
SPI0_IO2
SPI0_IO3
SPI0_CS0#
SPI0_CS1#
SPI0_CS2#
SPI - TOUCH
GPP_D1/SPI1_CLK
GPP_D2/SPI1_MISO
GPP_D3/SPI1_MOSI
GPP_D21/SPI1_IO2
GPP_D22/SPI1_IO3
GPP_D0/SPI1_CS#
C LINK
CL_CLK
CL_DATA
CL_RST#
GPP_A0/RCIN#
GPP_A6/SERIRQ
SKL_ULT
REV = 1
SKL_ULT
LPC
3
?
Need apply PN
SMBUS, SMLINK
GPP_B23/SML1ALERT#/PCHHOT#
GPP_A14/SUS_STAT#/ESPI_RESET#
GPP_A9/CLKOUT_LPC0/ESPI_CLK
PDC
5 OF 20
GPP_C0/SMBCLK
GPP_C1/SMBDATA
GPP_C2/SMBALERT#
GPP_C3/SML0CLK
GPP_C4/SML0DATA
GPP_C5/SML0ALERT#
GPP_C6/SML1CLK
GPP_C7/SML1DATA
GPP_A1/LAD0/ESPI_IO0
GPP_A2/LAD1/ESPI_IO1
GPP_A3/LAD2/ESPI_IO2
GPP_A4/LAD3/ESPI_IO3
GPP_A5/LFRAME#/ESPI_CS#
GPP_A10/CLKOUT_LPC1
GPP_A8/CLKRUN#
2
+3V_DEEP_SUS4,11,14,15,16,17
R7
SMB_PCH_CLK
R8
SMB_PCH_DAT
R10
SML0ALERT#
R9
SMB_ME0_CLK
W2
SMB_ME0_DAT
W1
SML1ALERT#
W3
SMB_ME1_CLK
V3
SMB_ME1_DAT
AM7
GPP_B23
AY13
BA13
BB13
AY12
BA12
BA11
AW9
CLK_PCI_EC_R
AY9
CLK_PCI_LPC_R
AW11
CLKRUN#
?
R99 22/F_4
R152 22/F_4
SML0ALERT# 11
SMB_ME0_CLK 23
SMB_ME0_DAT 23
SML1ALERT# 11
TP19
LPC_LAD0 25,29
LPC_LAD1 25,29
LPC_LAD2 25,29
LPC_LAD3 25,29
LPC_LFRAME# 25,29
EC_LPCCLK 29
DEBUG_LCLKOUT 25
CLKRUN# 29
Intel LAN : SMBUS 0xC8
+3V2,4,11,12,13,15,16,17,18,19,20,21,22,24,27,29,30,31,34,35,36,38,40,42,48
+3VS54,12,15,16,19,21,23,25,28,31,32,36,38,41,47,48,49,51
EMI(near PCH)
DEBUG_LCLKOUT
EC_LPCCLK
EC8
*18P/50V_4
1
10
EC10
*18P/50V_4
GPIO Pull UP
EC_IRQ_SERIRQ
CLKRUN#
SIO_EXT_SMI#
EC_RCIN#
PCI_SERR#
B B
R74 10K_4 R463 2.2K_4
R75 8.2K/F_4
R432 10K_4
R76 10K_4
R435 10K_4
+3V +3V_DEEP_SUS
SMB_PCH_CLK
SMB_PCH_DAT
SMB_ME1_CLK
SMB_ME1_DAT
SMB_ME0_CLK
SMB_ME0_DAT
R458 2.2K_4
R423 1K_4
R426 1K_4
R206 499/F_4
R417 499/F_4
SMBus/Pull-up(CLG)
+3V_DEEP_SUS
MBCLK_THRM26,29,30
MBDATA_THRM26,29,30
R287 4.7K_4
+3V
SMB_RUN_DAT16,17,18,21,31
A A
SMB_RUN_CLK16,17,18,21,31
5
+3V
R279 4.7K_4
Q26
5
2
6
*2N7002DW
Q27
4 3
1
SSM6N48FU
43
SMB_ME1_CLK
1
SMB_ME1_DAT
+3V
5
SMB_PCH_DAT
2
6
SMB_PCH_CLK
4
CPU heat pipe local thermal sensor
DDR thermal sensor
EC
Touch Pad
XDP
DDR3-L
PCH SPI ROM(CLG)
Need place to TOP
EC-DV-12
+3VS5
Vender P/N
EON
Socket
3
R723 *10K_4
C194 1U/10V_4
Size
TP15
TP9
TP12
TP13
TP11
TP14
PCH_SPI_CS0#_R
PCH_SPI1_CLK_R
PCH_SPI1_SI_R
PCH_SPI1_SO_R
BIOS_WP#
HOLD#
PCH_SPI_CS0# PCH_SPI_CS0#_R
PCH_SPI1_CLK
PCH_SPI1_SO
+3VSPI
PCH_SPI_IO2
R192 0_4
R193 33.2/F_4
R182 33.2/F_4
R184 33.2/F_4
R177 1K/F_4
R174 33.2/F_4
PCH_SPI1_CLK_R
PCH_SPI1_SI_RPCH_SPI1_SI
PCH_SPI1_SO_R
C185
22P/50V_4
R1/R2/R3/R4/R5/R7 close to U15 pin
AKE3DZNKQ00(EN25QH128AHIP)16MB
AKE3DZN0N01 (W25Q128FVSIQ)Winbond 16MB
DFHS08FS023
2
PCH_SPI_CS0#_R 29
PCH_SPI1_CLK_R 29
PCH_SPI1_SI_R 29
PCH_SPI1_SO_R 29
U25
1
CE#
VDD
6
SCK
5
SI
2
SO
HOLD#
3
WP#
VSS
W25Q128FVSIQ
AKE3DZN0Z03
Document Number
Document Number
Document Number
Custom
Custom
Custom
Date:
Date:
Date:
R188 0_4
+3VS5
8
+3VSPI
7
HOLD#
4
PCH_SPI_IO3BIOS_WP#
10 -- SKYPAKE 14/20(SPI/LPC/SMBUS)
10 -- SKYPAKE 14/20(SPI/LPC/SMBUS)
10 -- SKYPAKE 14/20(SPI/LPC/SMBUS)
R198 1K/F_4
R195 33.2/F_4
PROJECT : PS8
PROJECT : PS8
PROJECT : PS8
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Sheet
Sheet
Sheet
1
C189
0.1U/16V_4
RevSize
RevSize
RevSize
1A
1A
1A
of
of
of
10 57Monday, November 09, 2015
10 57Monday, November 09, 2015
10 57Monday, November 09, 2015
Vinafix.com
5
www.laptoprepairsecrets.com
4
3
2
+3V_DEEP_SUS4,10,14,15,16,17
1
+3V2,4,10,12,13,15,16,17,18,19,20,21,22,24,27,29,30,31,34,35,36,38,40,42,48
11
D D
Functional Strap Definitions
DESIGN NOTE:
WEAK PULL UP RESISTOR PRESENT ON THIS NET
ACZ_SPKR14,22
C C
B B
GSPI1_MOSI14
ACZ_SPKR
GSPI1_MOSI
R404
*20K/F_4
TOP SWAP OVERRIDE
HIGH - TOP SWAP ENABLE
LOW-DISABLED
HIGH: LPC SELECTED FOR SYSTEM FLASH
WEAK INTERNAL PD
+3V_DEEP_SUS
R451
1K_4
R430
*20K/F_4
No Boot:
The signal has a weak internal pull-down.
0 = Disable Intel ME Crypto Transport Layer Security
(TLS) cipher suite (no confidentiality).
1 = Enable Intel ME Crypto Transport Layer Security
(TLS) cipher suite (with confidentiality). Must be
pulled up to support Intel AMT with TLS and Intel
SBA (Small Business Advantage) with TLS.
ACZ_SDOUT14
EN_OVERRIDE29
GPP_B1814SML0ALERT#10
SML1ALERT#10
R150 1K_4
ACZ_SDOUT
ACZ_SDOUT
GPP_B18SML0ALERT#
SML1ALERT#
+3V_DEEP_SUS
R149
*4.7K_4
+3V
R140
*4.7K_4
+3V_DEEP_SUS
R139
10K_4
R421
*10K_4
No Boot:
The signal has a weak internal pull-down.
0 = Enable security measures defined in the Flash
Descriptor.
1 = Disable Flash Descriptor Security (override). This
strap should only be asserted high using external
pull-up in manufacturing/debug environments ONLY.
This function is useful when running ITP/XDP.
No Boot:
The signal has a weak internal pull-down.
0 = Disable No Reboot mode.
1 = Enable No Reboot mode
(PCH will disable the TCO
Timer system reboot feature).
This function is useful when running ITP/XDP.
R175
*20K/F_4
No Boot:
The signal has a weak internal pull-down.
This field determines the destination of accesses to the
BIOS memory range. Also controllable using Boot BIOS
Destination bit (Chipset Configuration Registers: Offset
3410h:Bit 10). This strap is used in conjunction with Boot
BIOS Destination Selection 0 strap.
Bit 10 Boot BIOS Destination
0 SPI
1 LPC
A A
5
4
3
R422
20K/F_4
No Boot:
The signal has a weak internal pull-down.
0 = LPC Is selected for EC.
1 = eSPI Is selected for EC.
Date:
Date:
2
Date:
PROJECT : PS8
PROJECT : PS8
PROJECT : PS8
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Document Number
Document Number
Document Number
Custom
Custom
Custom
11 -- SKYPAKE 15/20(HDA)
11 -- SKYPAKE 15/20(HDA)
11 -- SKYPAKE 15/20(HDA)
Sheet
Sheet
Sheet
1
RevSize
RevSize
RevSize
1A
1A
1A
of
of
of
11 57Monday, November 09, 2015
11 57Monday, November 09, 2015
11 57Monday, November 09, 2015
Vinafix.com
5
www.laptoprepairsecrets.com
H13
G13
B17
BB11
A17
G11
F11
D16
C16
H16
G16
D17
C17
G15
F15
B19
A19
F16
E16
C19
D19
G18
F18
D20
C20
F20
E20
B21
A21
G21
F21
D21
C21
E22
E23
B23
A23
F25
E25
D23
C23
F5
E5
D56
D61
E28
E27
D24
C24
E30
F30
A25
B25
D D
PCIE_RXN4_WLAN25
WLAN
C C
LAN
B B
PCIE_RXP4_WLAN25
PCIE_TXN4_WLAN25
PCIE_TXP4_WLAN25
PCIE_RXN5_SSD24
PCIE_RXP5_SSD24
PCIE_TXN5_SSD24
PCIE_TXP5_SSD24
PCIE_RXN6_SSD24
PCIE_RXP6_SSD24
PCIE_TXN6_SSD24
PCIE_TXP6_SSD24
PCIE_RXN7_SSD24
PCIE_RXP7_SSD24
PCIE_TXN7_SSD24
PCIE_TXP7_SSD24
SATA_RXN124
SATA_RXP124
SATA_TXN124
SATA_TXP124
PCIE_RXN9_LAN23
PCIE_RXP9_LAN23
PCIE_TXN9_LAN23
PCIE_TXP9_LAN23
XDP_PRDY#_CPU16
XDP_PREQ#_CPU16
C470 0.22U/25V/X7R_4
C473 0.22U/25V/X7R_4
C472 0.22U/25V/X7R_4
+3V
C485 0.1U/16V_4
C484 0.1U/16V_4
C475 0.22U/25V/X7R_4
C474 0.22U/25V/X7R_4
EC-SIT-13
C488 0.1U/16V_4
C487 0.1U/16V_4
R464 100/F_4
R143 10K_4
PCIE_TXN4_WLAN_C
PCIE_TXP4_WLAN_C
PCIE_TXN5_SSD_C
PCIE_TXP5_SSD_C
PCIE_TXN6_SSD_C
PCIE_TXP6_SSD_C
PCIE_TXN7_SSD_C
PCIE_TXP7_SSD_C
PCIE_TXN9_LAN_C
PCIE_TXP9_LAN_C
PCIE_RCOMPN
PCIE_RCOMPP
PIRQA#
PCI-E Port Mapping Table
PCI-E Port
Port1
Port2
Port3
Port4
Port5
Port6
A A
Port7
Port8
Port9
Port10
5
Function
Un-used
Un-used
Un-used
WLAN
PCIESSD (Reseve)
PCIESSD (Reseve)
PCIESSD (Reseve)
HDD
LAN
Un-used
CLK RQ Port
Port0
Port1
Port2
Port3
Port4
Port5
4
U28H
PCIE/USB3/SATA
PCIE1_RXN/USB3_5_RXN
PCIE1_RXP/USB3_5_RXP
PCIE1_TXN/USB3_5_TXN
PCIE1_TXP/USB3_5_TXP
PCIE2_RXN/USB3_6_RXN
PCIE2_RXP/USB3_6_RXP
PCIE2_TXN/USB3_6_TXN
PCIE2_TXP/USB3_6_TXP
PCIE3_RXN
PCIE3_RXP
PCIE3_TXN
PCIE3_TXP
PCIE4_RXN
PCIE4_RXP
PCIE4_TXN
PCIE4_TXP
PCIE5_RXN
PCIE5_RXP
PCIE5_TXN
PCIE5_TXP
PCIE6_RXN
PCIE6_RXP
PCIE6_TXN
PCIE6_TXP
PCIE7_RXN/SATA0_RXN
PCIE7_RXP/SATA0_RXP
PCIE7_TXN/SATA0_TXN
PCIE7_TXP/SATA0_TXP
PCIE8_RXN/SATA1A_RXN
PCIE8_RXP/SATA1A_RXP
PCIE8_TXN/SATA1A_TXN
PCIE8_TXP/SATA1A_TXP
PCIE9_RXN
PCIE9_RXP
PCIE9_TXN
PCIE9_TXP
PCIE10_RXN
PCIE10_RXP
PCIE10_TXN
PCIE10_TXP
PCIE_RCOMPN
PCIE_RCOMPP
PROC_PRDY#
PROC_PREQ#
GPP_A7/PIRQA#
PCIE11_RXN/SATA1B_RXN
PCIE11_RXP/SATA1B_RXP
PCIE11_TXN/SATA1B_TXN
PCIE11_TXP/SATA1B_TXP
PCIE12_RXN/SATA2_RXN
PCIE12_RXP/SATA2_RXP
PCIE12_TXN/SATA2_TXN
PCIE12_TXP/SATA2_TXP
SKL_ULT
REV = 1
Function
Un-used
Un-used
WLAN
LAN
SSD(Reserve)
Un-used
4
SKL_ULT
?
PDC
SSIC / USB3
USB2
GPP_E0/SATAXPCIE0/SATAGP0
GPP_E1/SATAXPCIE1/SATAGP1
GPP_E2/SATAXPCIE2/SATAGP2
8 OF 20
3
Need apply PN
USB3_1_RXN
USB3_1_RXP
USB3_1_TXN
USB3_1_TXP
USB3_2_RXN/SSIC_1_RXN
USB3_2_RXP/SSIC_1_RXP
USB3_2_TXN/SSIC_1_TXN
USB3_2_TXP/SSIC_1_TXP
USB3_3_RXN/SSIC_2_RXN
USB3_3_RXP/SSIC_2_RXP
USB3_3_TXN/SSIC_2_TXN
USB3_3_TXP/SSIC_2_TXP
USB3_4_RXN
USB3_4_RXP
USB3_4_TXN
USB3_4_TXP
USB2N_1
USB2P_1
USB2N_2
USB2P_2
USB2N_3
USB2P_3
USB2N_4
USB2P_4
USB2N_5
USB2P_5
USB2N_6
USB2P_6
USB2N_7
USB2P_7
USB2N_8
USB2P_8
USB2N_9
USB2P_9
USB2N_10
USB2P_10
USB2_COMP
USB2_ID
USB2_VBUSSENSE
GPP_E9/USB2_OC0#
GPP_E10/USB2_OC1#
GPP_E11/USB2_OC2#
GPP_E12/USB2_OC3#
GPP_E4/DEVSLP0
GPP_E5/DEVSLP1
GPP_E6/DEVSLP2
GPP_E8/SATALED#
?
H8
G8
C13
D13
J6
H6
B13
A13
J10
H10
B15
A15
E10
F10
C15
D15
AB9
AB10
AD6
AD7
AH3
AJ3
AD9
AD10
AJ1
AJ2
AF6
AF7
AH1
AH2
AF8
AF9
AG1
AG2
AH7
AH8
AB6
AG3
AG4
A9
C9
D9
B9
J1
J2
J3
H2
H3
G4
H1
USB30_RX1-_DOCK
USB30_RX1+_DOCK
USB30_TX1-_DOCK
USB30_TX1+_DOCK
USB30_RX2-_AOU
USB30_RX2+_AOU
USB30_TX2-_AOU
USB30_TX2+_AOU
USB30_RX3-
USB30_RX3+
USB30_TX3-_L
USB30_TX3+_L
C9685 0.1U/16V_4
C9686 0.1U/16V_4
USB30_RX4-
USB30_RX4+
USB30_TX4-
USB30_TX4+
USBP1-
USBP1+
USBP2-
USBP2+
USBP3-
USBP3+
USBP5-
USBP5+
USBP6-
USBP6+
USBP7-
USBP7+
USBP9-
USBP9+
PLACE 'R48' WITHIN 500 MILS
FROM USB2_COMP PIN WITH
TRACE IMPEDANCE LESS THAN 0.5 OHMS
USB2_COMP
TYPE_OC1#
USB_OC1#
USB_OC2#
USB_OC3#
WLAN_OFF#
DEVSLP1
SSD_PEDET#
TPM_INT#
SATA_LED#_R
USB3.0 Port Mapping Table
USB3.0 Function
PORT-1
PORT-2
PORT-3
PORT-4
Onelink+
AOU5
USB HUB
USB TYPE-C
3
USB30_TX3USB30_TX3+
R208 113/F_4
R183 0_4
2
USB30_RX1-_DOCK 33
USB30_RX1+_DOCK 33
USB30_TX1-_DOCK 33
USB30_TX1+_DOCK 33
USB30_RX2-_AOU 28
USB30_RX2+_AOU 28
USB30_TX2-_AOU 28
USB30_TX2+_AOU 28
USB30_RX3- 26
USB30_RX3+ 26
USB30_TX3- 26
USB30_TX3+ 26
USB30_RX4- 36
USB30_RX4+ 36
USB30_TX4- 36
USB30_TX4+ 36
USBP1- 28
USBP1+ 28
USBP2- 26
USBP2+ 26
USBP3- 19
USBP3+ 19
USBP8- 38
USBP8+ 38
USBP5- 37
USBP5+ 37
USBP6- 33
USBP6+ 33
USBP7- 25
USBP7+ 25
USBP9- 19
USBP9+ 19
USB_OC2# 28
WLAN_OFF# 25
DEVSLP1 24
SSD_PEDET# 24
TPM_INT# 21
USB TYPE-C
EC-DV-03
2
Onelink+
AOU5
USB HUB
EC-DV-03
USB TYPE-C
AOU5
USB HUB
Camera
EC-DV-03
SATA_LED#_R
DEVSLP1
SSD_PEDET#
FP
EC-DV-03
Onelink+
TYPE_OC1#
USB_OC1#
USB_OC2#
USB_OC3#
WLAN_OFF#
BTHDD
Touch Panel
USB2.0 Port Mapping Table
USB2.0 Function
PORT-1
PORT-2
PORT-3
PORT-4
PORT-5
PORT-6
PORT-7
PORT-8
PORT-9
PORT-10
AOU5
USB HUB
Camera
Cardreader
TYPE C
Onelink+
BT
FP
Touch Panel
NC
Date:
Date:
Date:
PROJECT : PS8
PROJECT : PS8
PROJECT : PS8
Document Number
Document Number
Document Number
Custom
Custom
Custom
12 -- SKYPAKE 16/20 (PCIE/USB)
12 -- SKYPAKE 16/20 (PCIE/USB)
12 -- SKYPAKE 16/20 (PCIE/USB)
1
+3V2,4,10,11,13,15,16,17,18,19,20,21,22,24,27,29,30,31,34,35,36,38,40,42,48
+3VS54,10,15,16,19,21,23,25,28,31,32,36,38,41,47,48,49,51
12
+3V
R442 10K_4C471 0.22U/25V/X7R_4
R441 *10K_4
R176 10K_4
+3VS5
R466 10K_4
R468 10K_4
R326 10K_4
R467 10K_4
R448 10K_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
of
of
Sheet
Sheet
Sheet
1
of
12 57Monday, November 09, 2015
12 57Monday, November 09, 2015
12 57Monday, November 09, 2015
RevSize
RevSize
RevSize
1A
1A
1A
Vinafix.com
5
www.laptoprepairsecrets.com
D D
WLAN
LAN
SSD
CLK_PCIE_WLANN25
CLK_PCIE_WLANP25
PCIE_CLKREQ_WLAN#25
CLK_PCIE_LANN23
CLK_PCIE_LANP23
PCIE_CLKREQ_LAN#23
CLK_PCIE_SSDN24
CLK_PCIE_SSDP24
PCIE_CLKREQ_SSD#24
CLK_REQ/Strap Pin(CLG)
C C
+3V
R10310K_4
R10510K_4
R7810K_4
R9210K_4
R10610K_4
R10910K_4
4
PCIE_CLKREQ0#
PCIE_CLKREQ1#
CLK_PCIE_WLANN
CLK_PCIE_WLANP
PCIE_CLKREQ_WLAN#
CLK_PCIE_LANN
CLK_PCIE_LANP
PCIE_CLKREQ_LAN#
CLK_PCIE_SSDN
CLK_PCIE_SSDP
PCIE_CLKREQ_SSD#
PCIE_CLKREQ5#
PCIE_CLKREQ_SSD#
PCIE_CLKREQ_WLAN#
PCIE_CLKREQ_LAN#
PCIE_CLKREQ1#
PCIE_CLKREQ5#
PCIE_CLKREQ0#
U28J
D42
CLKOUT_PCIE_N0
C42
CLKOUT_PCIE_P0
AR10
GPP_B5/SRCCLKREQ0#
B42
CLKOUT_PCIE_N1
A42
CLKOUT_PCIE_P1
AT7
GPP_B6/SRCCLKREQ1#
D41
CLKOUT_PCIE_N2
C41
CLKOUT_PCIE_P2
AT8
GPP_B7/SRCCLKREQ2#
D40
CLKOUT_PCIE_N3
C40
CLKOUT_PCIE_P3
AT10
GPP_B8/SRCCLKREQ3#
B40
CLKOUT_PCIE_N4
A40
CLKOUT_PCIE_P4
AU8
GPP_B9/SRCCLKREQ4#
E40
CLKOUT_PCIE_N5
E38
CLKOUT_PCIE_P5
AU7
GPP_B10/SRCCLKREQ5#
SKL_ULT
REV = 1
A36
B36
C38
D38
C36
D36
A38
B38
C31
D31
C33
D33
A31
B31
A33
B33
A29
B29
C28
D28
A27
B27
C27
D27
U28I
CSI-2
CSI2_DN0
CSI2_DP0
CSI2_DN1
CSI2_DP1
CSI2_DN2
CSI2_DP2
CSI2_DN3
CSI2_DP3
CSI2_DN4
CSI2_DP4
CSI2_DN5
CSI2_DP5
CSI2_DN6
CSI2_DP6
CSI2_DN7
CSI2_DP7
CSI2_DN8
CSI2_DP8
CSI2_DN9
CSI2_DP9
CSI2_DN10
CSI2_DP10
CSI2_DN11
CSI2_DP11
SKL_ULT
REV = 1
SKL_ULT
CLOCK SIGNALS
SKL_ULT
?
10 OF 20
?
PDC
9 OF 20
3
Need apply PN
CLKOUT_ITPXDP_N
CLKOUT_ITPXDP_P
GPD8/SUSCLK
XTAL24_IN
XTAL24_OUT
XCLK_BIASREF
SRTCRST#
TBT
Need apply PN
CSI2_CLKN0
CSI2_CLKP0
CSI2_CLKN1
CSI2_CLKP1
CSI2_CLKN2
CSI2_CLKP2
CSI2_CLKN3
CSI2_CLKP3
CSI2_COMP
GPP_D4/FLASHTRIG
EMMC
GPP_F13/EMMC_DATA0
GPP_F14/EMMC_DATA1
GPP_F15/EMMC_DATA2
GPP_F16/EMMC_DATA3
GPP_F17/EMMC_DATA4
GPP_F18/EMMC_DATA5
GPP_F19/EMMC_DATA6
GPP_F20/EMMC_DATA7
GPP_F21/EMMC_RCLK
GPP_F22/EMMC_CLK
GPP_F12/EMMC_CMD
EMMC_RCOMP
?
RTCX1
RTCX2
RTCRST#
2
+3V_RTC_24,15
+3V2,4,10,11,12,15,16,17,18,19,20,21,22,24,27,29,30,31,34,35,36,38,40,42,48
+1.0V_DEEP_SUS9,15,16,47,48,51
+3VPCU19,22,25,32,33,38,40,41,52
RP1 install for XDP
RP1
2
F43
CK_XDP_N_R
E43
CK_XDP_P_R
BA17
PCH_SUSCLK
E37
XTAL24_IN
E35
XTAL24_OUT
E42
XCLK_BIASREF
AM18
RTC_X1
AM20
RTC_X2
AN18
SRTC_RST#
AM16
RTC_RST#
?
C37
D37
C32
D32
C29
D29
B26
A26
E13
B7
AP2
AP1
AP3
AN3
AN1
AN2
AM4
AM1
AM2
AM3
AP4
AT1
GPP_D4
EMMC_RCOMP
R324 100/F_4
1
4
3
*0_4P2R_4
R480 2.7K/F_4
R465 *60.4/F_4
R410 200/F_4
CK_XDP_N 16
CK_XDP_P 16
TP34
+1.0V_DEEP_SUS
Co-lay 60ohm 1% to GND
for Cannonlake use
RTC_RST# 16
TP36
1
13
B B
RTC Circuitry(RTC)
RTC Clock 32.768KHz
EC-SIT-31
C441 10P/50V_4
C445 10P/50V_4
A A
32.768KHz
Y1
5
RTC_X1
12
R399
10M_4
RTC_X2
+3V_RTC_0
R111 45.3K_4
R81 1K_4
CN6
2
1
3 4
CONN_RTC
RTC Power trace width 20mils.
+3V_RTC_2+3VPCU
R94
1.5K_4
2 1
D7 DB2J40600L
+3V_RTC_1 EC_RTC_RST
4
2 1
D4 DB2J40600L
C116
1U/6.3V_4
R52
20K/F_4
R48
20K/F_4
RTC_RST#
C110
1U/6.3V_4
SRTC_RST#
C109
1U/6.3V_4
RTC_RST#
EC6
RCLAMP0521PATCT
3
2
Q1
DMN601K-7
1
3
RTC_RST#
R55
10K_4
EC_RTC_RST 29
2
External Crystal and Green Clock
EC-SIT-31
C479 10P/50V_4
1
XTAL24_IN
XTAL24_OUT
Date:
Date:
Date:
2
R462
24MHZ +-30PPM
1M_4
Y3
4
3
C478 10P/50V_4
PROJECT : PS8
PROJECT : PS8
PROJECT : PS8
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Document Number
Document Number
Document Number
Custom
Custom
Custom
13 -- SKYPAKE 17/20 (CLK)
13 -- SKYPAKE 17/20 (CLK)
13 -- SKYPAKE 17/20 (CLK)
Sheet
Sheet
Sheet
1
RevSize
RevSize
RevSize
1A
1A
1A
of
of
of
13 57Monday, November 09, 2015
13 57Monday, November 09, 2015
13 57Monday, November 09, 2015
Vinafix.com
5
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CR_EN31
D D
EC-SIT-30
+3V_DEEP_SUS
BT_RADIO_DIS#
R42910K_4
PCH_TEMPALERT#
R42510K_4
SIO_EXT_SCI#
R41510K_4
UART2_TXD
R41649.9K_4
UART2_RXD
R41449.9K_4
C C
+3V_DEEP_SUS
BOARD_ID0
R29110K_4
BOARD_ID1
R194*10K_4
BOARD_ID2
R197*10K_4
BOARD_ID3
R29410K_4
BOARD_ID4
R293*10K_4
BOARD_ID5
R292*10K_4
R830
100K/F_4
R273*10K_4
R18710K_4
R20010K_4
R281*10K_4
R28010K_4
R27410K_4
Touch SKU Non-Touch
BOARD_ID0
B B
Model
TBD
TBD
SIT
FVT
SDV-1
SDV
1
1
0
0
0
BOARD_ID5
0
0 0
1
1
10
BOARD_ID2BOARD_ID3 BOARD_ID4
0
1
1
0
10
BOARD_ID1
01 1
0
0
0
0
0
0
0
0
0
0
0
4
3
2
+3V_DEEP_SUS4,10,11,15,16,17
+3V2,4,10,11,12,13,15,16,17,18,19,20,21,22,24,27,29,30,31,34,35,36,38,40,42,48
1
14
Skylake (GPIO)
?
REV = 1
SKL_ULT
GPP_D13/ISH_UART0_RXD/SML0BDATA/I2C4B_SDA
GPP_D14/ISH_UART0_TXD/SML0BCLK/I2C4B_SCL
6 OF 20
SKL_ULT
?
7 OF 20
U28F
LPSS ISH
CR_EN
GPP_B1811
GSPI1_MOSI11
LCD_BK_OFF19
CCD_EN19
TOUCH_PANEL_EN19
UART2_RXD27
UART2_TXD27
SIO_EXT_SCI#29
ACZ_SDOUT11
ACZ_SDIN022
ACZ_SPKR11,22
GPP_B18
GSPI1_MOSI
UART2_RXD
UART2_TXD
SIO_EXT_SCI#
ACZ_SYNC
ACZ_BCLK
ACZ_SDOUT
ACZ_SDIN0
ACZ_RST#
ACZ_SPKR
AN8
GPP_B15/GSPI0_CS#
AP7
GPP_B16/GSPI0_CLK
AP8
GPP_B17/GSPI0_MISO
AR7
GPP_B18/GSPI0_MOSI
AM5
GPP_B19/GSPI1_CS#
AN7
GPP_B20/GSPI1_CLK
AP5
GPP_B21/GSPI1_MISO
AN5
GPP_B22/GSPI1_MOSI
AB1
GPP_C8/UART0_RXD
AB2
GPP_C9/UART0_TXD
W4
GPP_C10/UART0_RTS#
AB3
GPP_C11/UART0_CTS#
AD1
GPP_C20/UART2_RXD
AD2
GPP_C21/UART2_TXD
AD3
GPP_C22/UART2_RTS#
AD4
GPP_C23/UART2_CTS#
U7
GPP_C16/I2C0_SDA
U6
GPP_C17/I2C0_SCL
U8
GPP_C18/I2C1_SDA
U9
GPP_C19/I2C1_SCL
AH9
GPP_F4/I2C2_SDA
AH10
GPP_F5/I2C2_SCL
AH11
GPP_F6/I2C3_SDA
AH12
GPP_F7/I2C3_SCL
AF11
GPP_F8/I2C4_SDA
AF12
GPP_F9/I2C4_SCL
SKL_ULT
REV = 1
AW22
AW20
U28G
BA22
HDA_SYNC/I2S0_SFRM
AY22
HDA_BLK/I2S0_SCLK
BB22
HDA_SDO/I2S0_TXD
BA21
HDA_SDI0/I2S0_RXD
AY21
HDA_SDI1/I2S1_RXD
HDA_RST#/I2S1_SCLK
J5
GPP_D23/I2S_MCLK
AY20
I2S1_SFRM
I2S1_TXD
AK7
GPP_F1/I2S2_SFRM
AK6
GPP_F0/I2S2_SCLK
AK9
GPP_F2/I2S2_TXD
AK10
GPP_F3/I2S2_RXD
H5
GPP_D19/DMIC_CLK0
D7
GPP_D20/DMIC_DATA0
D8
GPP_D17/DMIC_CLK1
C8
GPP_D18/DMIC_DATA1
AW5
GPP_B14/SPKR
SKL_ULT
AUDIO
Need apply PN
GPP_D9
GPP_D10
GPP_D11
GPP_D12
GPP_D5/ISH_I2C0_SDA
GPP_D6/ISH_I2C0_SCL
GPP_D7/ISH_I2C1_SDA
GPP_D8/ISH_I2C1_SCL
GPP_F10/I2C5_SDA/ISH_I2C2_SDA
GPP_F11/I2C5_SCL/ISH_I2C2_SCL
GPP_D16/ISH_UART0_CTS#/SML0BALERT#
GPP_D15/ISH_UART0_RTS#
GPP_C12/UART1_RXD/ISH_UART1_RXD
GPP_C13/UART1_TXD/ISH_UART1_TXD
GPP_C14/UART1_RTS#/ISH_UART1_RTS#
GPP_C15/UART1_CTS#/ISH_UART1_CTS#
GPP_A18/ISH_GP0
GPP_A19/ISH_GP1
GPP_A20/ISH_GP2
GPP_A21/ISH_GP3
GPP_A22/ISH_GP4
GPP_A23/ISH_GP5
GPP_A12/BM_BUSY#/ISH_GP6
Need apply PN
SDIO/SDXC
GPP_G0/SD_CMD
GPP_G1/SD_DATA0
GPP_G2/SD_DATA1
GPP_G3/SD_DATA2
GPP_G4/SD_DATA3
GPP_G5/SD_CD#
GPP_G6/SD_CLK
GPP_A17/SD_PW R_EN#/ISH_GP7
GPP_G7/SD_W P
GPP_A16/SD_1P8_SEL
SD_RCOMP
GPP_F23
?
?
AB11
AB13
AB12
W12
W11
W10
W8
W7
BA9
BB9
AB7
AF13
P2
P3
P4
P1
M4
N3
N1
N2
AD11
AD12
U1
U2
U3
U4
AC1
AC2
AC3
AB4
AY8
BA8
BB7
BA7
AY7
AW7
AP13
PCH_TEMPALERT#
ACZ_SYNC
ACZ_SYNC
ACZ_RST#
ACZ_SDOUT
ACZ_BCLK
BOARD_ID0
BOARD_ID1
BOARD_ID2
BOARD_ID3
BOARD_ID4
BOARD_ID5
GPP_A16
R93*1K_4
R7733_4
R11533_4
R15133_4
R11633_4
R204 200/F_4
LED_MIC_MUTE 32
LED_SPK_MUTE 32
LED_ESC_KEY 32
BT_RADIO_DIS# 25
+3V_DEEP_SUS
ACZ_SYNC_AUDIO 22
ACZ_RST#_AUDIO 22
ACZ_SDOUT_AUDIO 22
BIT_CLK_AUDIO 22
C142
*10P/50V_4
EC-FVT-04
CAP_LOCK_LED 32
GPP_A16 27
BU
A A
ID3~5 for stage control
5
0000
0
PROJECT : PS8
PROJECT : PS8
PROJECT : PS8
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Document Number
Document Number
Document Number
Custom
Custom
Custom
14 -- SKYPAKE 19/20 (GPIO)
14 -- SKYPAKE 19/20 (GPIO)
Date:
Date:
4
3
2
Date:
14 -- SKYPAKE 19/20 (GPIO)
Sheet
Sheet
Sheet
1
RevSize
RevSize
RevSize
1A
1A
1A
of
of
of
14 57Monday, November 09, 2015
14 57Monday, November 09, 2015
14 57Monday, November 09, 2015
Vinafix.com
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D D
C227 1U/6.3V_4
+1.0V_DEEP_SUS
PCH Internal VRM
+VCCDSW_1.0V
+1.0V_DEEP_SUS
+1.0V_DEEP_SUS
+1.0V_DEEP_SUS
C C
EC-SIT-25
B B
+1.0V_DEEP_SUS
+1.0V_DEEP_SUS
+3VS5
+V3.3DX_1.5DX_ADO
+3V_DEEP_SUS
+1.0V_DEEP_SUS
+3V_DEEP_SUS
+1.0V_DEEP_SUS
+1.0V_DEEP_SUS
C820 and C690 close to cpu less then 100 mils
R157 *0_4_S
L21 120/2000MA_6
C262 1U/6.3V_4
C446 1U/6.3V_4
R434 *0_6_S
C253 1U/6.3V_4
C373 1U/6.3V_4
C491 47U/6.3V_8
R335 *0_6_S
C371 1U/6.3V_4
R334 *0_6_S
R207 *0_6_S
C210 1U/6.3V_4
C170 0.1U/16V_4
C9752 0.1P/50V_4
R202 *0_6_S
R201 *0_6_S
C267 1U/6.3V_4
R90 *0_6_S
R428 *0_6_S
R330 *0_6_S
C271 1U/6.3V_4
4
+VCCPRIM
+VCCMPHYAON_1P0
+VCCAMPHYPLL_1P0
+VCCAPLL_1.0V
+VCCPRIM
+V3.3DX_1.5DX_ADO_R
+VCCSPI
+VCCSRAM_1.0V
+VCCPRIM_3.3V
+VCCPRIM_1.0V
+VCCAPLLEBB
U28O
AB19
VCCPRIM_1P0
AB20
VCCPRIM_1P0
P18
VCCPRIM_1P0
AF18
VCCPRIM_CORE
AF19
VCCPRIM_CORE
V20
VCCPRIM_CORE
V21
VCCPRIM_CORE
AL1
DCPDSW_1P0
K17
VCCMPHYAON_1P0
L1
VCCMPHYAON_1P0
N15
VCCMPHYGT_1P0_N15
N16
VCCMPHYGT_1P0_N16
N17
VCCMPHYGT_1P0_N17
P15
VCCMPHYGT_1P0_P15
P16
VCCMPHYGT_1P0_P16
K15
VCCAMPHYPLL_1P0
L15
VCCAMPHYPLL_1P0
V15
VCCAPLL_1P0
AB17
VCCPRIM_1P0_AB17
Y18
VCCPRIM_1P0_Y18
AD17
VCCDSW_3P3_AD17
AD18
VCCDSW_3P3_AD18
AJ17
VCCDSW_3P3_AJ17
AJ19
VCCHDA
AJ16
VCCSPI
AF20
VCCSRAM_1P0
AF21
VCCSRAM_1P0
T19
VCCSRAM_1P0
T20
VCCSRAM_1P0
AJ21
VCCPRIM_3P3_AJ21
AK20
VCCPRIM_1P0_AK20
N18
VCCAPLLEBB
SKL_ULT
REV = 1
SKL_ULT
CPU POWER 4 OF 4
2.899A
2.57A
1.714A
0.03A
0.09A
?
Need apply PN
15 OF 20
3
VCCPGPPA
VCCPGPPB
VCCPGPPC
VCCPGPPD
VCCPGPPE
VCCPGPPF
VCCPGPPG
VCCPRIM_3P3_V19
VCCPRIM_1P0_T1
VCCATS_1P8
VCCRTCPRIM_3P3
VCCRTC_AK19
VCCRTC_BB14
DCPRTC
VCCCLK1
VCCCLK2
VCCCLK3
VCCCLK4
VCCCLK5
VCCCLK6
GPP_B0/CORE_VID0
GPP_B1/CORE_VID1
2
+3V_DEEP_SUS4,10,11,14,16,17
+1.0V_DEEP_SUS9,13,16,47,48,51
+1.8V_DEEP_SUS9,49,51
AK15
AG15
Y16
Y15
T16
AF16
AD15
V19
T1
AA1
AK17
AK19
BB14
BB10
A14
K19
L21
N20
L19
A10
AN11
AN13
?
+VCCPGPPA
+VCCPGPPB
+VCCPGPPC
+VCCPGPPD
+VCCPGPPE
+VCCPGPPF
+VCCPGPPG
+VCCPRIM_1.0V_T1
+VCCATS_1.8V
+VCCRTCPRIM_3.3V
+VCCRTC
DCPRTC
+VCCCLK1
+VCCCLK2
+VCCCLK3
+VCCCLK4
+VCCCLK5
+VCCCLK6
CORE_VID0
CORE_VID1
C453 1U/6.3V_4
R222 *0_6_S
R407 *0_6_S
R390 *0_6_S
R158 *0_4_S
C164 0.1U/16V_4
R470 *0_6_S
R348 *0_6_S
R341 *0_6_S
R331 *0_6_S
R337 *0_6_S
R478 *0_6_S
C476 1U/6.3V_4
+3V_DEEP_SUS
+1.0V_DEEP_SUS
+1.8V_DEEP_SUS
+3V_DEEP_SUS
+3V_RTC_2
+1.0V_DEEP_SUS
TP17
TP16
20mils
+VCCRTCPRIM_3.3V+VCCATS_1.8V +VCCRTC
+VCCPGPPA
+VCCPGPPB
+VCCPGPPC
+VCCPGPPD
+VCCPGPPE
+VCCPGPPG
+VCCPGPPF
R385 *0_6_S
R393 *0_6_S
R216 *0_6_S
R211 *0_6_S
R218 *0_6_S
R205 *0_6_S
R173 *0_6_S
1
+3VS54,10,12,16,19,21,23,25,28,31,32,36,38,41,47,48,49,51
+3V_RTC_24,13
+3V2,4,10,11,12,13,16,17,18,19,20,21,22,24,27,29,30,31,34,35,36,38,40,42,48
15
+3V_DEEP_SUS
+1.8V_DEEP_SUS
+V3.3DX_1.5DX_ADO +1.0V_DEEP_SUS
R155 *0_4_S
A A
5
+3V
C372
*1U/6.3V_4
R308 *0_6_S
C375
*22U/6.3V_6
4
R126 *0_6_S
3
+3V_DEEP_SUS+3VS5
C452
1U/6.3V_4
+VCCPGPPB +VCCPGPPC +VCCPGPPE
C431
*1U/6.3V_4
2
C172
0.1U/16V_4
C244
*1U/6.3V_4
C165
1U/6.3V_4
1U/6.3V_4
1U/6.3V_4
Date:
Date:
Date:
C418
C256
C425
0.1U/16V_4
PROJECT : PS8
PROJECT : PS8
PROJECT : PS8
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Document Number
Document Number
Document Number
Custom
Custom
Custom
15 -- SKYPAKE 20/20(PCH POWER)
15 -- SKYPAKE 20/20(PCH POWER)
15 -- SKYPAKE 20/20(PCH POWER)
Sheet
Sheet
Sheet
1
RevSize
RevSize
RevSize
1A
1A
1A
of
of
of
15 57Monday, November 09, 2015
15 57Monday, November 09, 2015
15 57Monday, November 09, 2015
Vinafix.com
5
www.laptoprepairsecrets.com
4
3
2
+3V2,4,10,11,12,13,15,17,18,19,20,21,22,24,27,29,30,31,34,35,36,38,40,42,48
+3V_DEEP_SUS4,10,11,14,15,17
+1.0V_DEEP_SUS9,13,15,47,48,51
+VCCIO2,4,6,48,51
+3VS54,10,12,15,19,21,23,25,28,31,32,36,38,41,47,48,49,51
1
16
EC-FVT-01
D D
C C
CFG39
XDP_PREQ#_CPU12
XDP_PRDY#_CPU12
CFG09
CFG19
CFG29
TP21
XDP_BPM02
XDP_BPM12
CFG49
CFG59
CFG69
CFG79
RSMRST#4,29 CK_XDP_P 13
SMB_RUN_DAT10,17,18,21,31
SMB_RUN_CLK10,17,18,21,31
XDP_TCK02
R232 1K_4
CFG0 PWR_DEBUG
R219 0_4
R233 0_4
R235 0_4
+3V
R2091K_4
CFG3
R2031K_4
HOCK3
SMB_RUN_DAT_XDP
SMB_RUN_CLK_XDP XDP_TRST#
XDP_TCK1
XDP_TCK0
R227*1K_4
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
HOCK3
SYS_RESET#
C270
*0.1U/16V_4
CN3
1
XDP_PRESENT#
2
PROC_PREQ#
3
OBSFN_A1
4
GND2
5
OBSDATA_A0
6
OBSDATA_A1
7
GND4
8
OBSDATA_A2
9
OBSDATA_A3
GND6
OBSFN_B0
OBSFN_B1
GND8
OBSDATA_B0
OBSDATA_B1
GND10
OBSDATA_B2
OBSDATA_B3
GND12
HOOK0
HOOK1
VCC_OBS_AB
HOOK2
HOOK3
GND14
XDP_SDA
XDP_SCL
XDP_TCK1
XDP_TCK0
GND16
*Samtec BSH-030-01
OBSDATA_C0
OBSDATA_C1
CPU XDP
R225 *1K_4
OBSDATA_C2
OBSDATA_C3
OBSDATA_D0
OBSDATA_D1
OBSDATA_D2
OBSDATA_D3
ITPCLK/HOOK4
ITPCLK#/HOOK5
VCC_OBS_CD
HOOK6/RESET#
HOOK7/DBR#
XDP_TRSTn
GND(XDP_PRESENT#)
GND1
OBSFN_C0
OBSFN_C1
GND3
GND5
GND7
OBSFN_D0
OBSFN_D1
GND9
GND11
GND13
GND15
XDP_TDO
XDP_TDI
XDP_TMS
+3V_DEEP_SUS
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
XDP_TDO
XDP_TDI
XDP_TMS
CFG17 9
CFG16 9
CFG8 9
CFG9 9
CFG10 9
CFG11 9
CFG19 9
CFG18 9
CFG12 9
CFG13 9
CFG14 9
CFG15 9
CK_XDP_N 13DNBSWON#4,29
+1.0V_DEEP_SUS+1.0V_DEEP_SUS
ITP_PMODE 9
SYS_RESET# 4,16
TP23
+VCCIO
R220
150/F_4
R221
*10K_4
PWR_DEBUG
+1.0V_DEEP_SUS
C229
0.1U/16V_4
C228
0.1U/16V_4
B B
A A
APS
CN1
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
*50501-0180N-001
+3VS5+3V_DEEP_SUS
SUSB# 4,29
SLP_S5# 4
SUSC# 4,29
SLP_A# 4,29
DNBSWON#
R71 *0_4_S
5
RTC_RST# 13
SYS_RESET# 4,16
PCH_SLP_S0_N 4
4
+3V
HWPG4,21,29,46,49
R450 *0_4_S
XDP_TDO
XDP_TDI
XDP_TMS
XDP_TRST#
C463 *0.1U/16V_4
U30
14
VCC
2
1A
1
1OE
5
2A
4
2OE
9
3A
10
3OE
12
4A
13
4OE
*SN74CBTLV3126RGYR
+VCCIO
R449 51_4
Sheet
Sheet
Sheet
XDP_TDO
XDP_TCK0
XDP_TMS
XDP_TDI
XDP_TDO
XDP_TDI
XDP_TCK0
XDP_TCK1
1
RevSize
RevSize
RevSize
1A
1A
1A
of
of
of
16 57Monday, November 09, 2015
16 57Monday, November 09, 2015
16 57Monday, November 09, 2015
3
1B
6
2B
8
3B
11
4B
15
DPAD
7
GND
3
XDP_TDO_CPU 2
XDP_TDI_CPU 2
XDP_TMS_CPU 2
XDP_TRST#_CPU 2
JTAGX_PCH2
JTAG_TMS_PCH2
JTAG_TDI_PCH2
JTAG_TDO_PCH2
JTAG_TCK_PCH2
Document Number
Document Number
Document Number
Date:
Date:
2
Date:
R246 *0_4
R443 *0_4
R245 *0_4
PROJECT : PS8
PROJECT : PS8
PROJECT : PS8
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
16 -- HSW XDP & APS
16 -- HSW XDP & APS
16 -- HSW XDP & APS
Vinafix.com
5
www.laptoprepairsecrets.com
M_A_A[13:0]3
D D
M_A_WE#3
M_A_CAS#3
M_A_RAS#3
TP1
TP3
M_A_ACT#3
M_A_PARITY3
M_A_ALERT#3
DDR3_DRAMRST#3,18
EC-FVT-02
+1.2V_SUS
5
4
M_A_ODT0_CPU3
M_A_ODT1_CPU3
SMB_RUN_CLK10,16,18,21,31
SMB_RUN_DAT10,16,18,21,31
12
M_A_BA#03
M_A_BA#13
M_A_BG#03
M_A_BG#13
M_A_CS#03
M_A_CS#13
M_A_CKE03
M_A_CKE13
M_A_CLKP03
M_A_CLKN03
M_A_CLKP13
M_A_CLKN13
+1.2V_SUS
C28
0.1U/16V_4
+1.2V_SUS
+1.2V_SUS
+3V_DEEP_SUS
R130
10K/F_4
R112
2M_4
+3V
R3
R7
R23
*10K_4
C C
B B
CHA_SA0 CHA_SA1 CHA_SA2
R35
10K_4
*10K_4
R12
10K_4
*10K_4
R19
10K_4
DDR4 SODIMM ODT GENERATION
U3
1.2V Level
DDR_PG_CTRL3
A A
R728 *0_4_S
NC1VCC
2
A
GND3Y
74AUP1G07GW
(to power on VTT)
4
C18 *0.1U/16V_4
R18 240_4
R20 240_4
R36 240_4
R30 240_4
R27 240_4
R22 240_4
R41 240_4
R21 240_4
R24 240_4
DDR_PG 46,51
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_EVENT#
M_A_EVENT#
CHA_SA0
CHA_SA1
CHA_SA2
M_A_CB0
M_A_CB1
M_A_CB2
M_A_CB3
M_A_CB4
M_A_CB5
M_A_CB6
M_A_CB7
3
R159
1K/F_4
VREF_CA_DIMM0
R26
1K/F_4
M_A_DQ[63:0] 3
M_A_DQSP8
M_A_DQSN8
M_A_DQSP[7:0] 3
M_A_DQSN[7:0] 3
R38
240_4
R37
240_4
+1.2V_SUS
+1.2V_SUS
+1.2V_SUS
2250mA
+1.2V_SUS
EC1 3.3P/50V/C0G_4
C24 1U/6.3V_4
C42 1U/6.3V_4
C26 1U/6.3V_4
C55 1U/6.3V_4
C32 10U/6.3V_4
C48 10U/6.3V_4
C27 10U/6.3V_4
C36 10U/6.3V_4
C35 100P/50V_4
C49 10U/6.3V_4
C59 100P/50V_4
C30 10U/6.3V_4
C47 10U/6.3V_4
C44 1U/6.3V_4
C34 1U/6.3V_4
C50 1U/6.3V_4
C43 1U/6.3V_4
CON2A
144
A0
133
A1
132
A2
131
A3
128
A4
126
A5
127
A6
122
A7
125
A8
121
A9
146
A10/AP
120
A11
119
A12
158
A13
151
A14/WE#
156
A15/CAS#
152
A16/RAS#
162
S2#/C0
165
S3#/C1
114
ACT#
143
PARITY
116
ALERT#
134
EVENT#
108
RESET#
150
BA0
145
BA1
115
BG0
113
BG1
149
S0#
157
S1#
109
CKE0
110
137
139
138
140
155
161
253
254
256
260
166
101
105
100
104
178
199
220
241
DDR4 SODIMM 260 PIN
CKE1
CK0
CK0#
CK1
CK1#
ODT0
ODT1
SCL
SDA
SA0
SA1
SA2
92
CB0
91
CB1
CB2
CB3
88
CB4
87
CB5
CB6
CB7
12
DM0
33
DM1
54
DM2
75
DM3
DM4
DM5
DM6
DM7
96
DM8
8
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
(260P)
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7
DQS#8
M_A_DQ1
7
M_A_DQ4
20
M_A_DQ3
21
M_A_DQ2
4
M_A_DQ5
3
M_A_DQ0
16
M_A_DQ6
17
M_A_DQ7
28
M_A_DQ9
29
M_A_DQ13
41
M_A_DQ15
42
M_A_DQ10
24
M_A_DQ12
25
M_A_DQ8
38
M_A_DQ14
37
M_A_DQ11
50
M_A_DQ16
49
M_A_DQ21
62
M_A_DQ22
63
M_A_DQ23
46
M_A_DQ17
45
M_A_DQ20
58
M_A_DQ18
59
M_A_DQ19
70
M_A_DQ24
71
M_A_DQ29
83
M_A_DQ31
84
M_A_DQ26
66
M_A_DQ25
67
M_A_DQ28
79
M_A_DQ30
80
M_A_DQ27
174
M_A_DQ33
173
M_A_DQ37
187
M_A_DQ34
186
M_A_DQ39
170
M_A_DQ36
169
M_A_DQ32
183
M_A_DQ35
182
M_A_DQ38
195
M_A_DQ44
194
M_A_DQ45
207
M_A_DQ43
208
M_A_DQ46
191
M_A_DQ41
190
M_A_DQ40
203
M_A_DQ42
204
M_A_DQ47
216
M_A_DQ48
215
M_A_DQ52
228
M_A_DQ55
229
M_A_DQ54
211
M_A_DQ51
212
M_A_DQ53
224
M_A_DQ50
225
M_A_DQ49
237
M_A_DQ61
236
M_A_DQ57
249
M_A_DQ63
250
M_A_DQ59
232
M_A_DQ56
233
M_A_DQ60
245
M_A_DQ58
246
M_A_DQ62
13
M_A_DQSP0
34
M_A_DQSP1
55
M_A_DQSP2
76
M_A_DQSP3
179
M_A_DQSP4
200
M_A_DQSP5
221
M_A_DQSP6
242
M_A_DQSP7
97
M_A_DQSP8
11
M_A_DQSN0
32
M_A_DQSN1
53
M_A_DQSN2
74
M_A_DQSN3
177
M_A_DQSN4
198
M_A_DQSN5
219
M_A_DQSN6
240
M_A_DQSN7
95
M_A_DQSN8
VREF CA DIMM0 Solution
R14
*0_4_S
R15 2/F_4
C19
0.022U/16V/X7R_4
R13
24.9/F_4
+1.2V_SUS
SM_VREF_CA3
1 2
2
111
112
117
118
123
124
129
130
135
136
141
142
147
148
153
154
159
160
163
103
107
167
171
175
181
185
189
193
197
201
205
209
213
217
223
227
231
235
239
243
247
251
CON2B
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
VDD19
1
VSS1
5
VSS2
9
VSS3
15
VSS4
19
VSS5
23
VSS6
27
VSS7
31
VSS8
35
VSS9
39
VSS10
43
VSS11
47
VSS12
51
VSS13
57
VSS14
61
VSS15
65
VSS16
69
VSS17
73
VSS18
77
VSS19
81
VSS20
85
VSS21
89
93
99
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
DDR4 SODIMM 260 PIN
VDDSPD
VREF_CA
(260P)
VPP1
VPP2
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
255
257
259
258
VTT
164
2
6
10
14
18
22
26
30
36
40
44
48
52
56
60
64
68
72
78
82
86
90
94
98
102
106
168
172
176
180
184
188
192
196
202
206
210
214
218
222
226
230
234
238
244
248
252
261
GND
262
GND
Place these Caps near So-Dimm0.
+0.6V_DDR_VTT
EC3 3.3P/50V/C0G_4
C37 10U/6.3V_4
C39 10U/6.3V_4
C40 1U/6.3V_4 C65 1U/6.3V_4
C38 1U/6.3V_4
C22 1U/6.3V_4
VREF_CA_DIMM0
C20 0.047U/10V_4
C21 0.1U/16V_4
C14 2.2U/6.3V_4
VREF_CA_DIMM0
+3V_DEEP_SUS4,10,11,14,15,16
+0.6V_DDR_VTT18,46,51
+3V
+2.5V_SUS
+0.6V_DDR_VTT
+2.5V_SUS
+3V
1
+1.2V_SUS3,6,18,46,51
+3V2,4,10,11,12,13,15,16,18,19,20,21,22,24,27,29,30,31,34,35,36,38,40,42,48
+2.5V_SUS18,46,51
0.5A
600mA
C66 1U/6.3V_4EC2 1U/6.3V_4
C67 10U/6.3V_4
C64 10U/6.3V_4
EC4 3.3P/50V/C0G_4
C45 0.1U/16V_4
C46 2.2U/6.3V_4
17
5
4
PROJECT : PS8
PROJECT : PS8
PROJECT : PS8
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Document Number
Document Number
Document Number
DDR4 DIMM0
DDR4 DIMM0
Monday, November 09, 2015 17 57
Monday, November 09, 2015 17 57
Monday, November 09, 2015 17 57
Date:
Date:
3
2
Date:
DDR4 DIMM0
Sheet
Sheet
Sheet
1
RevSize
RevSize
RevSize
1A
1A
1A
of
of
of
Vinafix.com
5
www.laptoprepairsecrets.com
M_B_A[13:0]3
D D
M_B_WE#3
M_B_CAS#3
M_B_RAS#3
TP2
TP4
M_B_ACT#3
M_B_PARITY3
+3V
R28
*10K_4
CHB_SA0 CHB_SA1 CHB_SA2
R40
10K_4
C C
B B
R2
10K_4
R16
*10K_4
R29
*10K_4
R39
10K_4
M_B_ALERT#3
DDR3_DRAMRST#3,17
EC-FVT-02
M_B_BA#03
M_B_BA#13
M_B_BG#03
M_B_BG#13
M_B_CS#03
M_B_CS#13
M_B_CKE03
M_B_CKE13
M_B_CLKP03
M_B_CLKN03
M_B_CLKP13
M_B_CLKN13
M_B_ODT0_CPU3
M_B_ODT1_CPU3
SMB_RUN_CLK10,16,17,21,31
SMB_RUN_DAT10,16,17,21,31
+1.2V_SUS
+1.2V_SUS
+1.2V_SUS
C1 *0.1U/16V_4
R8 240_4
R10 240_4
R32 240_4
R34 240_4
R42 240_4
R11 240_4
R33 240_4
R6 240_4
R9 240_4
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_EVENT#
M_B_EVENT#
CHB_SA0
CHB_SA1
CHB_SA2
M_B_CB0
M_B_CB1
M_B_CB2
M_B_CB3
M_B_CB4
M_B_CB5
M_B_CB6
M_B_CB7
VREF CA DIMM1 Solution
SM_VREF_DQ13
R1
*0_4_S
R4 2/F_4
C13
0.022U/16V/X7R_4
A A
5
1 2
R25
24.9/F_4
+1.2V_SUS
4
144
133
132
131
128
126
127
122
125
121
146
120
119
158
151
156
152
162
165
114
143
116
134
108
150
145
115
113
149
157
109
110
137
139
138
140
155
161
253
254
256
260
166
92
91
101
105
88
87
100
104
12
33
54
75
178
199
220
241
96
R17
1K/F_4
VREF_CA_DIMM1
R5
1K/F_4
4
CON1A
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14/WE#
A15/CAS#
A16/RAS#
S2#/C0
S3#/C1
ACT#
PARITY
ALERT#
EVENT#
RESET#
BA0
BA1
BG0
BG1
S0#
S1#
CKE0
CKE1
CK0
CK0#
CK1
CK1#
ODT0
ODT1
SCL
SDA
SA0
SA1
SA2
CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DM8
3
8
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
(260P)
DDR4 SODIMM 260 PIN
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7
DQS#8
M_B_DQ0
7
M_B_DQ4
20
M_B_DQ7
21
M_B_DQ3
4
M_B_DQ1
3
M_B_DQ5
16
M_B_DQ2
17
M_B_DQ6
28
M_B_DQ10
29
M_B_DQ15
41
M_B_DQ9
42
M_B_DQ12
24
M_B_DQ11
25
M_B_DQ14
38
M_B_DQ8
37
M_B_DQ13
50
M_B_DQ17
49
M_B_DQ20
62
M_B_DQ18
63
M_B_DQ19
46
M_B_DQ21
45
M_B_DQ16
58
M_B_DQ23
59
M_B_DQ22
70
M_B_DQ25
71
M_B_DQ29
83
M_B_DQ31
84
M_B_DQ27
66
M_B_DQ28
67
M_B_DQ24
79
M_B_DQ30
80
M_B_DQ26
174
M_B_DQ33
173
M_B_DQ34
187
M_B_DQ38
186
M_B_DQ35
170
M_B_DQ32
169
M_B_DQ39
183
M_B_DQ37
182
M_B_DQ36
195
M_B_DQ44
194
M_B_DQ40
207
M_B_DQ46
208
M_B_DQ42
191
M_B_DQ45
190
M_B_DQ41
203
M_B_DQ47
204
M_B_DQ43
216
M_B_DQ52
215
M_B_DQ49
228
M_B_DQ50
229
M_B_DQ54
211
M_B_DQ48
212
M_B_DQ53
224
M_B_DQ51
225
M_B_DQ55
237
M_B_DQ60
236
M_B_DQ56
249
M_B_DQ59
250
M_B_DQ63
232
M_B_DQ57
233
M_B_DQ61
245
M_B_DQ58
246
M_B_DQ62
13
M_B_DQSP0
34
M_B_DQSP1
55
M_B_DQSP2
76
M_B_DQSP3
179
M_B_DQSP4
200
M_B_DQSP5
221
M_B_DQSP6
242
M_B_DQSP7
97
M_B_DQSP8
11
M_B_DQSN0
32
M_B_DQSN1
53
M_B_DQSN2
74
M_B_DQSN3
177
M_B_DQSN4
198
M_B_DQSN5
219
M_B_DQSN6
240
M_B_DQSN7
95
M_B_DQSN8
M_B_DQ[63:0] 3
M_B_DQSP[7:0] 3
M_B_DQSN[7:0] 3
+1.2V_SUS
3
R43
240_4
M_B_DQSP8
R31
240_4
M_B_DQSN8
EC5 3.3P/50V/C0G_4
C23 1U/6.3V_4
C29 1U/6.3V_4
C33 1U/6.3V_4
C17 1U/6.3V_4
C60 10U/6.3V_4
C62 10U/6.3V_4
C56 10U/6.3V_4
C54 10U/6.3V_4
C41 *10U/6.3V_4
C61 10U/6.3V_4
C31 *10U/6.3V_4
C51 10U/6.3V_4
C25 1U/6.3V_4
C15 1U/6.3V_4
C16 1U/6.3V_4
C53 1U/6.3V_4
2250mA
+1.2V_SUS
+1.2V_SUS
+1.2V_SUS
Place these Caps near So-Dimm1
+0.6V_DDR_VTT
VREF_CA_DIMM1
2
CON1B
111
VDD1
112
VDD2
117
VDD3
118
VDD4
123
VDD5
124
VDD6
129
VDD7
130
VDD8
135
VDD9
136
VDD10
141
VDD11
142
VDD12
147
VDD13
148
VDD14
153
VDD15
154
VDD16
159
VDD17
160
VDD18
163
VDD19
1
VSS1
5
VSS2
9
VSS3
15
VSS4
19
VSS5
23
VSS6
27
VSS7
31
VSS8
35
VSS9
39
VSS10
43
VSS11
47
VSS12
51
VSS13
57
VSS14
61
VSS15
65
VSS16
69
VSS17
73
VSS18
77
VSS19
81
VSS20
85
VSS21
89
VSS22
93
VSS23
99
VSS24
103
VSS25
107
VSS26
167
VSS27
171
VSS28
175
VSS29
181
VSS30
185
VSS31
189
VSS32
193
VSS33
197
VSS34
201
VSS35
205
VSS36
209
VSS37
213
VSS38
217
VSS39
223
VSS40
227
VSS41
231
VSS42
235
VSS43
239
VSS44
243
VSS45
247
VSS46
251
VSS47
C6 3.3P/50V/C0G_4
C12 10U/6.3V_4
C7 10U/6.3V_4
C8 1U/6.3V_4
C9 1U/6.3V_4
C10 1U/6.3V_4
C11 1U/6.3V_4
C3 0.047U/10V_4
C5 0.1U/16V_4
C4 2.2U/6.3V_4
2
1
+1.2V_SUS3,6,17,46,51
+3V2,4,10,11,12,13,15,16,17,19,20,21,22,24,27,29,30,31,34,35,36,38,40,42,48
+2.5V_SUS17,46,51
+0.6V_DDR_VTT17,46,51
255
VDDSPD
257
VPP1
259
VPP2
258
VTT
164
2
6
10
14
18
22
26
30
36
40
44
48
52
56
60
64
68
72
78
82
86
90
94
98
102
106
168
172
176
180
184
188
192
196
202
206
210
214
218
222
226
230
234
238
244
248
252
261
262
VREF_CA_DIMM1
+2.5V_SUS
VREF_CA
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
(260P)
DDR4 SODIMM 260 PIN
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
GND
GND
C70 1U/6.3V_4
C68 1U/6.3V_4
C63 10U/6.3V_4
C69 10U/6.3V_4
+3V
EC11 3.3P/50V/C0G_4C52 10U/6.3V_4
C159 0.1U/16V_4
C88 2.2U/6.3V_4
+3V
0.5A
+2.5V_SUS
+0.6V_DDR_VTT
600mA
PROJECT : PS8
PROJECT : PS8
PROJECT : PS8
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Document Number
Document Number
Document Number
DDR4 DIMM1
DDR4 DIMM1
Monday, November 09, 2015 18 57
Monday, November 09, 2015 18 57
Monday, November 09, 2015 18 57
Date:
Date:
Date:
DDR4 DIMM1
18
RevSize
RevSize
RevSize
1A
1A
1A
of
of
Sheet
Sheet
Sheet
1
of
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