Kontron CP3-BP8-M-RIO User Manual

Page 1
CPCI
Backplane
Manual
PRODUCT DOCUMENTATION
PD05
CP3-BP8-M-RIO
Reference ID: 24229 PD05
Revision: 01
The product described in this manual is in compliance with all applied CE standards.
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PD05: CP3-BP8-M-RIO CPCI Backplane

Revision History

CPCI Backplane Manual:
Manual/Product Title:
Reference ID: 24229 PD05
Product Documentation: CP3-BP8-M-RIO
Rev.
Index
01 Initial Issue Mar. 01, 2002
Brief Description of Changes Date of Issue

Imprint

Copyright © 2002 PEP Modular Computers GmbH. All rights reserved. This manual may not be copied, photocopied, reproduced, translated or converted to any electronic or machine­readable form in whole or in part without prior written approval of PEP Modular Computers GmbH.
DISCLAIMER:
PEP Modular Computers GmbH rejects any liability for the correctness and completeness of this manual as well as its suitability for any partic­ular purpose.
This manual was realized by: TPD/Engineering, PEP Modular Computers GmbH.
Page 2 © 2002 PEP Modular Computers GmbH RID 24229 PD05, Rev. 01
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CPCI Backplane PD05: CP3-BP8-M-RIO

1. Introduction

The specific product description provided with this product documentation is part of the PEP’s CPCI Backplane manual. For further information, in particular regarding general details as well as safety and warranty statements, refer to the CPCI Backplane Manual, ID 24229.

2. CP3-BP8-M-RIO DIN Type M RIO Backplane

The main features of the 3U, 8-slot, DIN type M backplane CP3-BP8-M-RIO, which is designed for rear I/O applications, are described in the following table:
Table 1: Distinctive Features of Backplane CP3-BP8-M-RIO
Feature Specification
Form Factor
Size
Number of Slots
Bus Resolution Bus Frequency
Rear I/O Connectivity
Hot-Swap Capability
Power Supply Connector
Redundant Power Supply
Flexible Grounding Option
Fan Connector
MSD Connector
Power LED Connector
PS-ON Connector
Reset Function Connector
3U
197.12*128.7 mm 8 32 bits: slots 1 to 8 33MHz: slots 1 to 8 P2 on slots 1 to 8 Yes DIN type M — Yes Yes Yes Yes Yes Yes
RID 24229 PD05, Rev. 01 © 2002 PEP Modular Computers GmbH Page 3
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PD05: CP3-BP8-M-RIO CPCI Backplane

3. Board Layout

Figure 1: CP3-BP8-M-RIO Board Layout (Front)
8
7
56
Figure 2: CP3-BP8-M-RIO Board Layout (Reverse)
3.3V*GND* 3.3V* VIO* +5V* +5V*
4
3
2
GND*
GND*GND*GND*+12V*-12V*GND*
1
JP1
J2P
+5V
+3.3V
JP4
1
Page 4 © 2002 PEP Modular Computers GmbH RID 24229 PD05, Rev. 01
2
Components marked with an asterisk (*) are optionally ava ilable.
3
4
5 6
7
8
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CPCI Backplane PD05: CP3-BP8-M-RIO

4. Signalling Environment

4.1 V(I/O) Setting

The backplane provides a block of three high-current terminals (designated as V(I/O)) for con­necting V(I/O) to either the +5V or +3.3V power supply . V(I/O) mu st be connected either to the +5V or the +3.3V input power . It is the responsibility of the system integrator to ensure that the required signalling voltage is implemented and that the backplane P1 connector coding corre­sponds to the implemented signalling voltage.
Warning!
Using both 3.3V and 5V boards within the same system may result in damage to your equipment. Please note that the presence of only one 5V board determines a 5V signalling environ ment. The default setting is 5V.

4.2 P1 Connector Coding for V(I/O)

The CompactPCI Specification foresees coding of the P1 connector to correspond to the sig­nalling environment of the PCI bus. For this reason, only boards with universal or the corre­sponding coding can be physically inserted into the backplane. PEP’s factory default setting for V(I/O) is +5V and male, 1567 code, brilliant blue coding keys are used.
Warning!
Using boards with an inadequate signalling voltage may result in dam­age to your equipment. Therefore, when changing the signalling envi­ronment from 5V to 3.3V or vice versa, it is mandatory that proper coding keys are used (refer to chapter 3 of the CPCI Backplane Man­ual, ID 24229, for details).
RID 24229 PD05, Rev. 01 © 2002 PEP Modular Computers GmbH Page 5
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PD05: CP3-BP8-M-RIO CPCI Backplane

5. Interfaces

5.1 Line Connector

The power supply to the backplane is connected by means of the 3-pole Mate-N-Lok connec­tor marked ”LINE1” on the reverse side of the backplane.
Figure 3: Orientation and Pinouts of CP3-BP8-M-RIO Connector LINE1
Table 2: Pinout s of CP3-BP8-M-RIO Connector LINE1
1 2 3
1N or -DC 2L or +DC 3PE
Legend: This connector is available optionally.

5.2 Power Supply Connector

Pin Function
Figure 4: Orientation and Pinouts of CP3-BP8-M-RIO DIN type M Power Supply Connector
The input voltages to the power supply unit and the V1 ... V4 output voltages from the power supply unit to the back­plane are connected via a 32-position, DIN type M, female power supply con­nector.
Warning!
System integrators must ensure that only power supplies which comply with the pinout as provided in Table 3 are used with this connector!
Pins B2, B5, B28, and B31 do not comply with the CompactPCI Power Interface Specification.
Page 6 © 2002 PEP Modular Computers GmbH RID 24229 PD05, Rev. 01
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CPCI Backplane PD05: CP3-BP8-M-RIO
Table 3: DIN Type M Connector Pinout
Pin Function Pin Function Pin Function
C.13
C.14
C.15
C.16
C.17
C.18
C.19
C.20
EN#
DEG#
INT
+3.3VL
+3.3VL
+3.3VL
+12VL
-12VL
B.2
B.5
B.8
B.11
B.13
B.14
B.15
B.16
B.17
B.18
B.19
B.20
L or +DC
N or -DC
N/C
PE
+3.3VL
+3.3VL
+3.3VL
+3.3VL
+3.3VL
+3.3VL
+12VL
-12VL
A.13
A.14
A.15
A.16
A.17
A.18
A.19
A.20
INT
INH#
INT
OVF
+5VF
+3.3VL
+12VL
-12VL
B.22
B.25
B.28
B.31
L1 = live connection, N = neutral, PE = earth protection; INT = internally connected; N/C = not connected.
+5VL
OVL
No Pin Loaded
No Pin Loaded
Warning!
To ensure correct 5V operation of your equipment it is necessary to connect 5VL to 5VF and 0VL to 0VF.
The maximum voltage compensation is 0.25V per line.
RID 24229 PD05, Rev. 01 © 2002 PEP Modular Computers GmbH Page 7
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PD05: CP3-BP8-M-RIO CPCI Backplane

5.3 Fan Connector

The backplane is equipped with the lockable Molex male connector JP4 for the connection of fans to the 12V power supply of the bus.
Figure 5: Orientation and Pinouts of CP3-BP8-M-RIO Connector JP4
Table 4:Pinouts of CP3-BP8-M-RIO Connector JP4
Pin Function
2 1
1GND 2 +12V

5.4 MSD Connectors

Two 4-pole Molex male conne ctors are eq uipped on the backp lane for the con nection of mass storage devices (drives) to the +5V/+12V
Figure 6: Orientation and Pinouts of CP3-BP8-M-RIO MSD Connectors
power supply of the bus.
Table 5: Pinouts of CP3-BP8-M­RIO MSD Connector
1 2 3 41 2 3 4
Pin Function
1 +12V 2GND
Legend: These connectors are available optionally.
3GND 4+5V
Page 8 © 2002 PEP Modular Computers GmbH RID 24229 PD05, Rev. 01
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CPCI Backplane PD05: CP3-BP8-M-RIO

5.5 Auxiliary Signal Connectors

The connection of the auxiliary signals is accomplished by means of the two 5-pole Molex male connectors JP1 and JP2 as well as the 10-pole LPV male connector JP3. The LPV con­nector JP3 provides the same signals as JP1 and JP2 taken together.
Figure 7: Orientation and Pinouts of CP3-BP8-M-RIO Connectors JP1 and JP2
Table 6:Pinouts of CP3-BP8-M-RIO
5 4 3 2 1
JP1 JP2
5 4 3 2 1
View from reverse side
Connectors JP1 and JP2
Pin Function
1EN# 2GND
JP1
JP2
3 INH# 4GND 5N/C 1GND 2+5V 3FAL# 4DEG# 5PRST#
Figure 8: Orientation and Pinouts of CP3-BP8-M-RIO Connector JP3
Table 7: Pinouts of CP3-BP8-M-RIO Connector JP3
Pin Function
1 3 5 7 9
10
2
1GND
4 6 8
2EN# 3GND 4INH# 5DEG# 6FAL# 7GND 8PRST# 9GND 10 +5V
RID 24229 PD05, Rev. 01 © 2002 PEP Modular Computers GmbH Page 9
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PD05: CP3-BP8-M-RIO CPCI Backplane
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