Kontron COMe-cPV2 User Manual

Page 1
®-PVC
-
microETXexpress
omputer-on
Module (COM)
Version 1.4
Page 2
» Table of Contents «
1 User Information ................................ 1
1.1About This Document .................................................. 1
1.2Copyright Notice ..................................................... 1
1.3Trademarks ........................................................... 1
1.4Standards ............................................................ 1
1.5Warranty ............................................................. 2
1.6Technical Support .................................................... 2
2 Introduction .................................... 3
2.1The microETXexpress®-PV COM .......................................... 3
2.2Naming Clarifications ................................................ 3
2.3Understanding the COM Functionality .................................. 4
2.4COM Express® Documentation ........................................... 5
2.5COM Express® COM Benefits ............................................ 5
3 Specifications .................................. 7
3.1Functional Specification ............................................. 7
3.2Functional Block Diagram ............................................. 9
3.3Mechanical Specifications ........................................... 10
3.4Electrical Specifications ........................................... 12
3.4.1Supply Voltage ..................................................... 12
3.4.2Power consumption Current (Windows XP SP3) ......................... 12
3.5Environmental Specifications ........................................ 13
3.5.1Temperature ........................................................ 13
3.6MTBF ................................................................ 14
4 COM Connectors ................................. 15
4.1Pin-Outs ............................................................ 16
4.1.1Connectors X1A and X1B: microETXexpress® Interface ................. 16
4.1.2Connector J1 – Fan ................................................. 35
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4.1.3Connectors J2 and J3 – SODIMM DDR2 Memory Sockets .................. 35
4.1.4Connector J4 - XDP ................................................. 35
4.1.5Connector J5 –JTAG ................................................. 36
4.1.6SSD Mezzanine Connector ............................................ 36
4.1.7PCI Express Interface .............................................. 37
4.1.8USB Interface ...................................................... 37
4.1.9SATA Interface ..................................................... 38
4.1.10 Audio Interface ................................................ 39
4.1.11 Serial IRQ ..................................................... 39
4.1.12 Graphics Interface ............................................. 39
4.1.13 Ethernet Interface ............................................. 40
4.1.14 SPI Bus Interface .............................................. 40
4.1.15 LPC Bus Interface .............................................. 40
4.1.16 Power Control Interface ........................................ 43
4.1.17 Miscellaneous Circuits ......................................... 46
5 Special Features ............................... 48
5.1Hyper-Threading ..................................................... 48
5.2Enhanced SpeedStep™ Technology ...................................... 48
5.3Onboard Hardware Monitor ............................................ 48
5.4Watchdog ............................................................ 49
5.5JIDA non volatile and CMOS setting. ................................. 49
5.6General Purpose Input and Output (GPIO) ............................. 50
5.7Fast I2C ............................................................ 50
5.8ACPI Suspend Modes and Resume Events ................................ 50
6 Design Considerations .......................... 52
6.1Thermal Management .................................................. 52
6.2Heat Spreader Dimensions ............................................ 52
6.3Onboard Fan Connector ............................................... 52
6.3.1Fan Connector Electrical Characteristics ........................... 54
7 System Resources ............................... 55
7.1Interrupt Request (IRQ) Lines ....................................... 55
7.2Memory Area ......................................................... 58
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7.3I/O Address Map ..................................................... 58
7.4Peripheral Component Interconnect (PCI) Devices ..................... 59
7.5System Management Bus (SMBus) ....................................... 61
7.6K-Station / JIDA32 Resources ........................................ 61
8 BIOS Operation ................................. 63
8.1Determining the BIOS Version ........................................ 63
8.2Setup Guide ......................................................... 63
8.2.1Start AMIBIOS®8 Setup Utility ...................................... 63
8.3BIOS Setup .......................................................... 66
8.3.1Main Menu .......................................................... 66
8.3.2Module Info ........................................................ 67
8.3.3Advanced Settings Menu ............................................. 69
8.3.4PCIPnP Settings .................................................... 96
8.3.5Boot Settings ...................................................... 99
8.3.6Security Settings ................................................. 105
8.3.7Chipset Settings .................................................. 106
8.3.8Exit Options ...................................................... 113
8.4Appendix A: JIDA Standard .......................................... 114
8.5JIDA Information ................................................... 114
9 Appendix B: Architecture Information .......... 115
9.1Buses .............................................................. 115
9.1.1ISA, Standard PS/2 – Connectors ................................... 115
9.1.2PCI/104 ........................................................... 115
9.2General PC Architecture ............................................ 115
9.3Ports .............................................................. 116
9.3.1RS-232 Serial ..................................................... 116
9.3.2Serial ATA ........................................................ 116
9.3.3USB ............................................................... 116
9.4Programming ........................................................ 117
10Appendix C: Document Revision History ......... 118
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Kontron microETXexpress-PV User’s Guide
1 User Information
1.1 About This Document
This document provides information about products from Kontron and/or its subsidiaries. No warranty of suitability, purpose, or fitness is implied. While every attempt has been made to ensure that the information in this document is accurate, the information contained within is supplied “as-is” and is subject to change without notice.
For the circuits, descriptions and tables indicated, Kontron assumes no responsibility as far as patents or other rights of third parties are concerned.
1.2 Copyright Notice
Copyright © 2003-2011 Kontron
All rights reserved. No part of this document may be reproduced, transmitted, transcribed, stored in a retrieval system, or translated into any language or computer language, in any form or by any means (electronic, mechanical, photocopying, recording, or otherwise), without the express written permission of Kontron.
1.3 Trademarks
DIMM-PC®, PISA®, ETX®, ETXexpress®, microETXexpress®, X-board®, DIMM-IO® and DIMM-BUS® are trademarks or registered trademarks of Kontron. Kontron is a trademark or registered trademark of Kontron AG.
The following components used on this board are trademarked as follows:
» IBM, XT, AT, PS/2 and Personal System/2 are trademarks of International
Business Machines Corporation.
» Microsoft is a registered trademark of Microsoft Corporation. » Intel is a registered trademark of Intel Corporation. » COM Express is a registered trademark of PICMG. » All other products and trademarks mentioned in this manual are trademarks
of their respective owners and indicated with an “*”.
1.4 Standards
Kontron is certified to ISO 9000 standards.
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Kontron microETXexpress-PV User’s Guide
1.5 Warranty
This Kontron product is warranted against defects in material and workmanship for the warranty period from the date of shipment. During the warranty period, Kontron will at its discretion decide to repair or replace defective products.
Within the warranty period, the repair of products is free of charge as long as warranty conditions are observed.
The warranty does not apply to defects resulting from improper or inadequate maintenance or handling by the buyer, unauthorized modification or misuse, operation outside of the product’s environmental specifications or improper installation or maintenance.
Kontron will not be responsible for any defects or damages to other products not supplied by Kontron that are caused by a faulty Kontron product.
1.6 Technical Support
Technicians and engineers from Kontron and/or its subsidiaries are available for technical support. We are committed to making our product easy to use and will help you use our products in your systems.
Please consult our website at http://www.kontron.com/support for the latest product documentation, utilities, drivers and support contacts. Consult our customer section for the latest BIOS downloads, Product Change Notifications and additional tools and software. You can also always contact your board supplier for technical support.
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Kontron microETXexpress-PV User’s Guide
2 Introduction
2.1 The microETXexpress®-PV COM
The Kontron microETXexpress®-PV Computer-on-Module (COM) extends the COM
Express® specification to include a small module form factor (95 x 95 mm)
with the commonly used COM Express® Type 2 connector for use on ultra-low
power embedded devices. The microETXexpress®-PV COM design enables the
development of energy-saving devices based on the second generation 1.66 GHz
Intel® Atom™ processor D510, D410, and N450 technology and the Intel® I/O
Controller Hub 82801HBM (ICH8M) with the secure development path of an
established, future-proof industry standard, the COM Express® Type 2 form
factor.
The Kontron microETXexpress®-PV module processor has an integrated memory
controller for up to 2 GB DDR2 RAM (2x 1GB configuration). The graphics core
has a maximum resolution of 1400x1050 VGA and 18-bit single channel LVDS for
WXGA (1366x768). With five PCI Express lanes for flexible configurations as
well as PCI, I
multi-interface, ultra-low power carrier board designs. These special
features make this 95 x 95 mm Computer-on-Module a key solution for
applications like infotainment, digital signage, POS/POI, medical technology,
2
C, SPI, and LPC bus, the microETXexpress®-PV COM is ideal for
and automation that require both mobile and compact stationary low power
devices.
All modules in the Kontron microETXexpress® family are compatible with the
COM Express® standard (Pin-out Type 2) and thus ensure easy
interchangeability as well as design scalability and future migration paths.
The microETXexpress®-PV COM is a complete PC with standard interfaces such as
USB, Gigabit Ethernet, SATA II, and PATA as well as additional options like
high-definition audio (HDA) and an LVDS flat panel interface.
2.2 Naming Clarifications
The COM Express® standard defines a Computer-On-Module, or COM, with all the
components necessary for a bootable host computer, packaged as a super-
component. The interfaces provide a smooth transition path from legacy
parallel interfaces such as IDE or parallel ATA (PATA) to Low Voltage
Differential Signaling (LVDS) interfaces including the PCI bus, PCI Express*,
and Serial ATA (SATA).
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Kontron microETXexpress-PV User’s Guide
» ETXexpress® modules are Kontron COM Express® modules in the basic form
factor (125mm x 95mm)
» microETXexpress® modules are Kontron COM Express® modules in the compact
form factor (95mm x 95mm)
» nanoETXexpress® modules are Kontron COM Express® compatible modules in an
ultra-small form factor that follow pin-out type 1(55mm x 84mm)
NOTE: The Kontron microETXexpress®-PV module takes advantage of new
features introduced in the PICMG COM COM.0R2.0 COM Express® Specification.
2.3 Understanding the COM Functionality
All Kontron microETXexpress® and ETXexpress® modules contain two connectors (X1A and X1B), each with two rows. The primary connector rows are Row A and Row B. The secondary connector rows are Row C and Row D. The primary connector (Row A and Row B) features the following legacy-free functionality:
» Analog VGA graphics » Gigabit Ethernet LAN » Serial ATA (SATA) » Intel® High Definition Audio (HDA) » 8xUSB 2.0 » 4.75V to 18.0V VCC » LPC (Low Pin Count) Bus » Five x1 PCI Express lanes » GPIO » LVDS 18-bit, single channel » SMBus » Watchdog timer (WDT)
2
» I
C
» SPI Bus
The secondary connector (Row C and Row D) supports the following buses and I/O:
» IDE and parallel ATA (PATA) » PCI
NOTE: For a full description of the COM Express Type 2 pin-out, refer to the PICMG website or PICMG documentation.
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Kontron microETXexpress-PV User’s Guide
2.4 COM Express® Documentation
This product manual serves as one of three principal references for this COM
Express® module design. It documents the specifications and features of the
microETXexpress®-PV COM. The other two references, which are available from
your Kontron support representative or from PICMG, include:
» The COM Express® Specification, R2.0, which defines the COM Express® module
form factor, pin-out, and signals. This document can be obtained by filling out the order form on the PIGMG website at http://www.picmg.com .
» The PICMG COM Express® Design Guide, which serves as a general guide for
baseboard design, with a focus on maximum flexibility to accommodate a wide range of COM Express® modules. This guide is on the PICMG website at
http://www.picmg.com .
2.5 COM Express® COM Benefits
Compact form factor (95 x 95 mm) Computer-on-Module Express (COM Express) modules are very compact, highly integrated computers that use the Type 2 COM Express® connector pin-out. All microETXexpress® modules feature a standardized form factor and a standardized connector layout for a specified set of signals, as defined in the PICMG COM Express® specification. This standardization lets designers create a single-system baseboard that can accept present and future microETXexpress® modules.
Kontron microETXexpress® modules include common personal computer (PC) peripheral functions such as:
» Graphics » USB ports » Ethernet » Audio » IDE, PATA, and SATA hard disk drive formats
Baseboard designers can optimize exactly how each of these functions is implemented physically for the intended application by placing connectors precisely where they are needed on a baseboard that is designed for an optimal fit in the system packaging.
A peripheral PCI bus can be implemented directly on the baseboard rather than on mechanically unwieldy expansion cards. The ability to build a system on a single baseboard using the computer as one plug-in super-component simplifies packaging, eliminates cabling, and significantly reduces system-level total cost of ownership.
A single baseboard design can use a range of COM Express modules. This flexibility enables product differentiation at various price/performance
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Kontron microETXexpress-PV User’s Guide
points, and the design of future-proof systems with a built-in upgrade path. The modularity of a COM Express solution also ensures against obsolescence as computer technology evolves. A properly designed COM Express baseboard can work with several successive generations of COM Express modules.
A COM Express baseboard design has many of the advantages of a custom, computer-board design, but delivers better obsolescence protection, greatly reduced engineering effort, and faster time to market.
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Kontron microETXexpress-PV User’s Guide
3 Specifications
3.1 Functional Specification
Processor: Intel® Atom™ Technology
» CPU: Intel® Atom™ N450 single core, 5.5W TDP
Intel® Atom™ D410 single core, 10.5W TDP Intel® Atom™ D510 dual core, 15W TDP All with integrated DRAM and graphics
» Cores: Up to 2 cores » Bus Speed: Up to 2 x 1.66 GHz » Cache: L1 cache 24KB write-back data/32KB instruction
L2 cache up to 2x512 KB, 8-way
» Memory: Up to 2GB (single channel) DDR2 S0DIMM (667 MHz only)
2x 1GB configuration only
» Video Controller: Integrated, Intel® GMA 3150 (200 MHz for N450 or 400
MHz for D410/D510) with DirectX*9-compliant Pixel Shader
2.0 Intel® Clear Video Technology: MPEG2 Hardware Acceleration ProcAmp Intel® Dynamic Video Memory Technology 4.0
» Graphics: Analog VGA, with max resolution 1400x1050 at 60 Hz for the
N450 or 2048x1536 at 60 Hz for the D410/D510. 18-bit single channel LVDS with resolution 1366x768
» Features: Hyper-Threading Technology (HTT)
Execute Disable Bit BIOS-enabled enhanced Intel® SpeedStep Technology (modules with the N450 CPU only) CPU Sleep States:
D510/D410: C0/C1 N450: C0/C1(E)/C2(E)/C4(E)
» Instruction Set: IA 32-bit and Intel® 64 architecture » Package: 22mm x 22mm » Thermal Spec: Operation: 0° to 70°C
Storage: -10° to 85°
Chipset: Intel® I/O Controller Hub 82801HBM (ICH8M)
» USB: 8xUSB 2.0 » Audio: Intel® High Definition Audio (24 bit / 96 kHz) controller
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» PCI Express: Five PCIe x1 lanes or configurable (via BIOS modification)
to an x4 , x2 or x1 interface
» TDP: 2.3W
Package: 31mmx31mm
Integrated Graphics: Intel® Graphics Media Accelerator 3150 (Intel® GMA 3150)
» Features: Intel® Dynamic Video Memory Technology 4.0
DirectX* 9 compliant Pixel Shader 2.0 Integrated single LVDS channel resolution up to 1280x800 or 1366x768 (for flat panels) Analog RGB display output resolution up to 1400x1050 @ 60Hz for the Intel® Atom™ N450 or D410 processors and 2048 x 1536@ 60 Hz for the Intel® Atom™ D510 processor Intel® Clear Video Technology
-- MPEG2 Hardware Acceleration
-- ProcAmp
Display Interfaces
» VGA: The maximum resolution supported is 2048 x 1536 @ 60Hz
(Intel® Atom D510 processor)
» Flat Panel: Single Channel LVDS 18bit
resolution up to 1366 x 768 (WXGA)
Storage
» SATA: 3xSATA ports supporting up to 1.5 Gbps (SATA150) and 3.0
Gbps (SATA300) transfer rate
» PATA (IDE): 1x Parallel ATA (PATA) supports ATA transfer mode up to
Ultra DMA 5 at 100MB/s.
Onboard Devices:
» Ethernet: Intel® 82567LM 10/100/1000 Mbit Gigabit Ethernet Controller
The 82567LM is only a PHY; the MAC is in the ICH. It is connected to the GLCI and LCI interfaces of the ICH8M.
» Ethernet Features: WakeOnLAN, PXE Lanboot, » TPM: AT97SC3204 TPM from Atmel » Watchdog Timer: BIOS enables and configures watchdog in the CPLD.
Watchdog has the option to generate NMI after the delay has expired.
» PCI: The PCI 32-bit 33 MHz interface from the ICH (rev. 2.3
compliant) is connected to the COM Express connector.
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Kontron microETXexpress-PV User’s Guide
» Power Management: BIOS enables ACPI power management revision 3.0 for
supported OS. BIOS enables SpeedStep Technology for the Atom N450 processor. The Atom D510 and D410 processors do not support SpeedStep technology.
Additional Interfaces:
» LPC bus: Yes, to COM Express A-B connector » SMBus: Yes, to COM Express A-B connector
2
» I
C: Yes, fast I2C (from Intel® ICH8M)
» GPIO: 4x GPI and 4x GPO » SPI Yes, to COM Express A-B connector » JIDA: Yes, JIDA EEPROM
JIDA BIOS support JILI BIOS support AMI AMIBIOS8 Core BIOS
» K-Station: Yes » Bootlogo: Yes » MARS: Supported for smart battery management » HWM: Temperature monitoring for CPU and board temperature
(external ON Semiconductor ADT7476 hardware monitor)
» Passive Cooling: Passive and Critical Trip Point » ACPI: ACPI 3.0 » S-States: S0, S3, S4, S5 » Input Voltage: Single supply support with wide range power supply input,
4.75V – 18V The 5.0V supply is the standby power rail.
3.2 Functional Block Diagram
Figure 1 is t he microETXexpress®-PV COM block diagram
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Kontron microETXexpress-PV User’s Guide
Figure 1: microETXexpress®-PV COM Block Diagram
3.3 Mechanical Specifications
Module Dimensions
» 95 mm x 95 mm ±0.2 mm (3.47 in. x 3.47 in)
Height on Top
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Kontron microETXexpress-PV User’s Guide
» Approximately 9.20 mm maximum (without the PCB)
» Height varies depending on whether the optional cooling solution (either a
passive heat sink or a heat spreader plate) is installed
Height on Bottom
» Approximately 3.5 mm maximum (without the PCB)
Figure 2 is the microETXexpress®-PV COM mechanical drawing
Figure 2: microETXexpress®-PV COM Mechanical Drawing
All dimensions are shown in millimeters. The COM Express® specification says that these holes should be ± 0.25mm [±0.010"], unless otherwise noted. The tolerances for placement of the COM Express connector with respect to the peg holes (dimensions [16.50, 6.00]) should be ± 0.10mm [±0.004"]. The 2x 220-pin connectors are mounted on the back of the PCB and not viewable in Figure 2. The mounting holes shown in the drawing use 6mm diameter pads and 2.7mm plated holes for use with 2.5mm hardware. The pads are tied to the PCB ground plane. Gray circles represent the mechanical mounting holes. Black circles represent the mounting holes required by the PICMG COM Express® standard.
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P
P
P
3.4 Electrical Specifications
3.4.1 Supply Voltage
» 4.75V to +18V on the VCC_12V pins and 4.75V to 5.25V on the VCC_5V_SBY.
Power Supply Rise time specifications
» The input voltages shall raise from 10% of nominal to within the
regulation ranges within 0.1ms to 20ms.
» There shall be a smooth and continuous ramp with each DC input voltage from
10% to 90% of its final set-point, as required in the ATX specification.
» The maximum ramp up rate shall be 1V/ms maximum in order to prevent any
excessive inrush current that could damage the module.
3.4.2 Power consumption Current (Windows XP SP3)
The testing performed to capture the supply current data used tested modules mounted on a Kontron evaluation board with a mouse and keyboard connected. The power consumption tests were executed in Windows XP (with SP3) using a tool to stress the CPU and memory at 100 % load. The power measurement values were captured after 15 minutes of full load. All boards were equipped with a two (2) 1024-MB DDR2 SDRAM. The modules were tested using the maximum CPU frequency. For more detailed information, refer to the “Power Consumption” diagrams on the EMD Customer section of the Kontron website.
Table 1: Atom D510 - 36007-0000-16-2
Windows Desktop (idle) Maximum power configuration S3 with Wake-on-LAN disabled S5 with Wake-on-LAN disabled
ower Consumption in
[W]
10.8
21.16
0.440
0.255
Table 2: Atom D410 - 36007-0000-16-1
Windows Desktop (idle) Maximum power configuration S3 with Wake-on-LAN disabled S5 with Wake-on-LAN disabled
ower Consumption in
[W]
9.7
16.56
0.440
0.255
Table 3: Atom N450 - 36007-0000-16-0
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ower Consumption in
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Kontron microETXexpress-PV User’s Guide
[
W]
Windows Desktop (idle) Maximum power configuration S3 with Wake-on-LAN disabled S5 with Wake-on-LAN disabled
NOTE: It is difficult to test for all possible applications on the
market. There may be an application that draws more power from the CPU than the values measured in the table above. Take this into consideration if you are at the limit of the thermal specification, in which case you should consider improving your thermal solution.
7.5
15.20
0.440
0.255
3.5 Environmental Specifications
3.5.1 Temperature
Operating: (with Kontron heat spreader plate assembly):
» Ambient temperature: 0 to 70°C » Maximum heat spreader-plate temperature: 0 to 70°C* » Non-operating: -10°C to +85°C
NOTES: *1) The maximum operating temperature with the heat spreader
plate installed is the maximum measurable temperature on any spot on the heat spreader surface. You must maintain the temperature according to the specification above.
2) All parts used have industrial operating temperature (-40°C to 85°C).
Operating (without Kontron heat spreader plate assembly):
» Maximum operating temperature: 0-60°C » Non operating: -10°C to +85°C
NOTE: **The maximum operating temperature is the maximum measurable
temperature on any spot on the module surface. You must maintain the temperature according to the specification above.
Humidity
» Operating: 5% to 95% (non-condensing)at 40°C » Non operating: 5% to 95% (non-condensing) at 40°C
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3.6 MTBF
218,015 hours
Kontron microETXexpress-PV User’s Guide
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Kontron microETXexpress-PV User’s Guide
4 COM Connectors
The pin-outs for microETXexpress® interface connectors X1A (primary connector, rows A and B) and X1B (secondary connector, rows C and D) are documented for convenient reference. See the PICMG COM Express® Specification on the PICMG website and COM Express® Design Guide on the Kontron website for detailed, design-level information.
Figure 3: COM Interface Connector Locations
15
Table 4: General Signal Description
Type Description
I/O-3,3 Bi-directional 3,3 V IO-Signal
I/O-5T Bi-dir. 3,3V I/O (5V Tolerance)
I/O-5 Bi-directional 5V I/O-Signal
I-3,3 3,3V Input
I/OD Bi-directional Input/Output Open Drain
I-5T 3,3V Input (5V Tolerance)
OA Output Analog
OD Output Open Drain
O-1,8 1,8V Output
O-3,3 3,3V Output
O-5 5V Output
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Kontron microETXexpress-PV User’s Guide
T
T
Type Description
DP-I/O Differential Pair Input/Output
DP-I Differential Pair Input
DP-O
PU
PD
PWR
nc
Differential Pair Output Pull-Up Resistor Pull-Down Resistor Power Connection Not connected, Signal not available
NOTE: To protect external power lines of peripheral devices, make sure
that the wires have the right diameter to withstand the maximum available current and the enclosure of the peripheral device fulfils the fire-protection requirements in IEC/EN60950
4.1 Pin-Outs
4.1.1 Connectors X1A and X1B: microETXexpress® Interface
Table 5: Connector X1A - Row A
Pin Signal Description
A1 GND(Fixed) Power Ground PWR - ­A2 GBE0_MDI3- Ethernet I/O
Data-
A3 GBE0_MDI3+ Ethernet I/O
Data+
A4 GBE0_LINK100# Ethernet Speed
LED 100Mbps
A5 GBE0_LINK1000# Ethernet Speed
LED 1000Mbps
A6 GBE0_MDI2- Ethernet I/O
Data-
A7 GBE0_MDI2+ Ethernet I/O
Data-
A8 GBE0_LINK# LAN Link LED OD –
A9 GBE0_MDI1- Ethernet I/O
Data-
A10 GBE0_MDI1+ Ethernet I/O
Data­A11 GND (Fixed) Power Ground PWR - ­A12 GBE0_MDI0- Ethernet I/O
Data­A13 GBE0_MDI0+ Ethernet I/O
Data­A14 GBE0_CTREF LAN Reference
Voltage
ype
DP-I/O
OD-
3.3/3.3 SUS OD-3.3/3.3 SUS
DP-I/O
3.3/3.3 SUS
DP-I/O
DP-I/O
O-1.9/1.9 SUS
erminati
on
- -
- -
- On at 100 Mbps
- On at 1000
- -
- -
- -
- -
- -
- -
- -
- -
Comment
Mbps
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T
T
Pin Signal Description
A15 SUS_S3# Indicates Suspend
to RAM state A16 SATA0_TX+ SATA 0 Transmit
Data+ A17 SATA0_TX- SATA 0 Transmit
Data­A18 SUS_S4# Indicates Suspend
to Disk state A19 SATA0_RX+ SATA 0 Receive
Data+ A20 SATA0_RX- SATA 0 Receive
Data­A21 GND (Fixed) Power Ground PWR ­A22 SATA2_TX+ SATA 2 Transmit
Data+ A23 SATA2_TX- SATA 2 Transmit
Data­A24 SUS_S5# Indicates Soft
Off state A25 SATA2_RX+ SATA 2 Receive
Data+ A26 SATA2_RX- SATA 2 Receive
Data­A27 BATLOW# Indicates low
external battery
A28 (S)ATA_ACT# SATA Activity
Indicator A29 AC/HDA_SYNC HD Audio Sync O-3.3 - ­A30 AC/HDA_RST# HD Audio Reset O-3.3 - ­A31 GND(Fixed) Power Ground PWR - ­A32 AC/HDA_BITCLK HD Audio Clock O-3.3 - ­A33 AC/HDA_SDOUT HD Audio Data O-3.3 - ­A34 BIOS_DIS0# Disable Module
BIOS. Enables
boot from a BIOS
on Baseboard A35 THRMTRIP# CPU thermal
shutdown
indicator A36 USB6- USB Data- Port #6 A37 USB6+ USB Data+ Port #6 -
A38 USB_6_7_OC# USB Over current
Pair 6/7 I-3.3/ 3.3
ype
O-3.3 SUS
DP-O
O-3.3 SUS
DP-I
DP-O
O-3.3 SUS
DP-I
I-3.3/3.3 SUS
O-3.3
I-3.3/3.3 SUS
O-3.3
DP-I/O
SUS
erminati
on
- -
- -
- -
- -
- -
-
- -
- -
- -
- -
- -
PU 3.3V SUS in CPLD (5K to 25K ohms
- -
PU 3.3V SUS of
51.1K ohms
- Pin state is
- Connected to
PU 3.3V SUS of 10K ohms
Comment
-
-
not valid in Suspend Power
USB port #8 on the ICH8M. Connected to over current pin 8/9 of ICH8M.
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T
T
Pin Signal Description
A39 USB4- USB Data- Port #4
A40 USB4+ USB Data+ Port #4 -
A41 GND (Fixed) Power Ground PWR - ­A42 USB2- USB Data- Port
#2­A43 USB2+ USB Data+ Port
#2+ A44 USB_2_3_OC# USB Overcurrent
Pair 2/3 I-3.3/ 3.3
A45 USB0- USB Data- Port
#0­A46 USB0+ USB Data+ Port
#0+ A47 VCC_RTC RTC Power Supply
+3V A48 EXCD0_PERST# PCIe Express Card
0 Reset O-3.3
A49 EXCD0_CPPE# PCIe Express Card
0 Request I-3.3
A50 LPC_SERIRQ LPC Serial
Interrupt Request A51 GND (Fixed) Power Ground PWR - ­A52 PCIE_TX5+ PCIe 5 Transmit
Data+ A53 PCIE_TX5- PCIe 5 Transmit
Data­A54 GPI0 General Purpose
Input0 A55 PCIE_TX4+ PCIe 4 Transmit
Data+
A56 PCIE_TX4- PCIe 4 Transmit
Data-
A57 GND(Fixed) Power Ground PWR - ­A58 PCIE_TX3+ PCIe 3 Transmit
Data+
A59 PCIE_TX3- PCIe 3 Transmit
Data-
A60 GND (Fixed) Power Ground PWR - ­A61 PCIE_TX2+ PCIe 2 Transmit
Data+
A62 PCIE_TX2- PCIe 2 Transmit - -
ype
DP-I/O
DP-I/O
SUS
DP-I/O
PWR
IO-3.3
Not connected Not connected
I-3.3
DP-O
DP-O
DP-O
erminati
on
- Connected to
- Connected to
-
PU 3.3 SUS of 10K ohms
- Connected to
-
- -
- Connected to
PU 3.3 of 10K ohms
PU 3.3 of
8.2K ohms
nc nc
nc nc
PU 3.3 of 10K ohms
- -
- -
- -
- -
- -
Comment
USB port #6 on the ICH8M.
USB port #2 on the ICH8M.
Connected to over current pin 2/3 of ICH8M.
USB port #6 on the ICH8M.
GPIO1 on the ICH8M. Connected to GPIO8 on the ICH8M.
-
Connected to CPLD
18
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Kontron microETXexpress-PV User’s Guide
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Pin Signal Description
Data-
A63 GPI1 General Purpose
Input 1 A64 PCIE_TX1+ PCIe 1 Transmit
Data+
A65 PCIE_TX1- PCIe 1 Transmit
Data-
A66 GND (Fixed) Power Ground PWR - ­A67 GPI2 General Purpose
Input 2 A68 PCIE_TX0+ PCIe 0 Transmit
Data+ A69 PCIE_TX0- PCIe 0 Transmit
Data­A70 GND (Fixed) Power Ground PWR - ­A71 LVDS_A0+ LVDS Display
Channel A
(positive) A72 LVDS_A0- LVDS Display
Channel A
(negative) A73 LVDS_A1+ LVDS Display
Channel A
(positive) A74 LVDS_A1- LVDS Display
Channel A
(negative) A75 LVDS_A2+ LVDS Display
Channel A
(positive) A76 LVDS_A2- LVDS Display
Channel A
(negative) A77 LVDS_VDD_EN LVDS Display
Panel Power
Control A78 LVDS_A3+ LVDS Display
Channel A
(positive) A79 LVDS_A3- LVDS Display
Channel A
(negative) A80 GND (Fixed) Power Ground PWR - ­A81 LVDS_A_CK+ LVDS Display
Channel A Clock+ A82 LVDS_A_CK- LVDS Display
Channel A Clock­A83 LVDS_I2C_CK LVDS Display I2C I/OD-3.3 PU 3.3 of
ype
I-3.3
DP-O
I-3.3
DP-O
DP-O
DP-O
DP-O
O-3.3
Not connected
Not connected
DP-O
erminati
on
PU 3.3 of 10K ohms
- -
- -
PU 3.3 of 10K ohms
- -
- -
- -
- -
- -
- -
- -
- -
PD 4.75K -
nc nc
nc nc
- -
- -
Comment
Connected to CPLD
Connected to CPLD
19
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Kontron microETXexpress-PV User’s Guide
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Pin Signal Description
Clock 10K ohms A84 LVDS_I2C_DAT LVDS Display I2C
Data A85 GPI3 General Purpose
Input 3 A86 KBD_RST# Keyboard Reset
A87 KBD_A20GATE A20 gate
A88 PCIE0_CK_REF+ PCIe Clock
(positive) A89 PCIE0_CK_REF- PCIe Clock
(negative) A90 GND (Fixed) Power Ground PWR - ­A91 SPI_POWER SPI Power PWR; 3.3
A92 SPI_MISO SPI Data In
A93 GPO0 General Purpose
Output 0 A94 SPI_CLK SPI Clock O – 3.3 SUS A95 SPI_MOSI SPI Data Out A96 GND (FIXED) Power Ground PWR - ­A97 TYPE10# Not connected for
Type 2 Rev 2.0
modules A98 RSVD Reserved
A99 RSVD Reserved
A100 GND (Fixed) Power Ground
ype
I/OD-3.3
I-3.3
I-3.3
I-3.3
DP-O
SUS
I – 3.3 SUS
O - 3.3
nc
nc
nc
PWR
erminati
on
PU 3.3 of 10K ohms PU 3.3 of 10K ohms PU 3.3 of 10K ohms PU 3.3 of 10K ohms
- -
- -
- -
PU 3.3 of 15K to 35K ohms Connected to
- -
- Rev C PCB is
Rev C PCB is
- -
Comment
Connected to CPLD 5V tolerant input
-
CPLD
at +12V
at +12V
A101 RSVD Reserved
A102 RSVD Reserved
A103 RSVD Reserved
A104 VCC_12V 12V VCC
A105 VCC_12V 12V VCC
A106 VCC_12V 12V VCC
A107 VCC_12V 12V VCC
A108 VCC_12V 12V VCC
nc
nc
nc
PWR
PWR
PWR
PWR
PWR
- -
- -
- -
- -
- -
- -
- -
- -
20
Page 25
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Pin Signal Description
A109 VCC_12V 12V VCC
Kontron microETXexpress-PV User’s Guide
ype
PWR
erminati
on
- -
Comment
A110 GND (Fixed) Power Ground
PWR
- -
Table 6: Connector X1A - Row B
Pin Signal Description
B1 GND (Fixed) Power Ground PWR - ­B2 GBE0_ACT# Ethernet Activity
LED B3 LPC_FRAME# LPC Frame
Indicator B4 LPC_AD0 LPC Address /
Data Bus B5 LPC_AD1 LPC Address /
Data Bus B6 LPC_AD2 LPC Address /
Data Bus B7 LPC_AD3 LPC Address /
Data Bus B8 LPC_DRQ0# LPC DMA request
B9 LPC_DRQ1# LPC DMA request
B10 LPC_CLK LPC Clock O-3.3 - ­B11 GND (Fixed) Power Ground PWR - ­B12 PWRBTN# Power Button
Input I – 3.3 SUS
B13 SMB_CLK SMBus Clock
B14 SMB_DAT SMBus Data
B15 SMB_ALERT# SMBus Interrupt
B16 SATA1_TX+ SATA 1 Transmit
Data+
B17 SATA1_TX- SATA 1 Transmit
Data-
B18 SUS_STAT# Indicates
imminent suspend
ype
O-
3.3/3.3SUS
O-3.3
I/O-3.3
I/O-3.3
I/O-3.3
I/O-3.3
I-3.3
I-3.3
I/O-3.3 SUS
I/O-3.3 SUS
I/O-3.3 SUS
DP-O
O-3.3 SUS
erminati
on
- -
- -
- -
- -
- -
- -
PU 3.3 of
-20K in the ICH8M PU 3.3 of
-20K in the ICH8M
Weak pullup in the CPLD PU 3.3 SUS of
2.2K PU 3.3 SUS of
2.2K PU 3.3 SUS of 10K
- -
- -
- -
Comment
-
-
-
-
-
-
21
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Kontron microETXexpress-PV User’s Guide
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Pin Signal Description
operation; used
to notify LPC
devices. B19 SATA1_RX+ SATA 1 Receive
Data+
B20 SATA1_RX- SATA 1 Receive
Data-
B21 GND (Fixed) Power Ground PWR - ­B22 SATA3_TX+ SATA 3 Transmit
Data+ B23 SATA3_TX- SATA 3 Transmit
Data- B24 PWR_OK Power OK from
power supply B25 SATA3_RX+ SATA 3 Receive
Data+ B26 SATA3_RX- SATA 3 Receive
Data­B27 WDT Indicator for
Watchdog Timeout B28 AC/HDA_SDIN2 Audio CODEC
Serial Data In 2 I - 3.3 SUS
B29 AC/HDA_SDIN1 Audio CODEC
Serial Data In 1 I - 3.3 SUS
B30 AC/HDA_SDIN0 Audio CODEC
Serial Data In 0 I - 3.3 SUS
B31 GND (Fixed) Power Ground PWR - ­B32 SPKR Speaker Interface O -3 .3 - ­B33 I2C_CK I2C Clock
B34 I2C_DAT I2C Data
B35 THRM# Over Temperature
Indicator B36 USB7- USB Data- Port #7
B37 USB7+ USB Data+ Port #7 -
B38 USB_4_5_OC# USB Over current
Pair 4/5 I-3.3 SUS
B39 USB5- USB Data- Port #5
B40 USB5+ USB Data+ Port #5 -
ype
DP-I
Not connected Not connected I – 3.3 SUS/5 SUS Not connected Not connected
O - 3.3
I/O - 3.3 SUS
I/O - 3.3 SUS
I - 3.3
DP-I/O
DP-I/O
erminati
on
- -
- -
nc nc
nc nc
Vih = 1.7V
nc nc
nc nc
- -
PD of 20K in the ICH8M PD of 20K in the ICH8M PD of 20K in the ICH8M
PU 3.3 SUS of
2.2K PU 3.3 SUS of
2.2K PU 3.3 of 10K
- Hooked to USB
PU 3.3 SUS of 10K
- Hooked to USB
Comment
-
-
-
-
-
-
port #9 on the ICH8M. Hooked to over current pin 6/7 of ICH8M.
port #7 on the ICH8M.
22
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Pin Signal Description
B41 GND (Fixed) Power Ground PWR - ­B42 USB3- USB Data- Port #3
B43 USB3+ USB Data+ Port #3 -
B44 USB_0_1_OC# USB Over current
Pair 0/1 I-3.3 SUS
B45 USB1- USB Data- Port #1
B46 USB1+ USB Data+ Port #1 -
B47 EXCD1_PERST# PCIe Express Card
1 Reset O-3.3
B48 EXCD1_CPPE# PCIe Express Card
1 Request I-3.3
B49 SYS_RESET# Reset button
input I-3.3
B50 CB_RESET# Carrier Board
Reset B51 GND (Fixed) Power Ground PWR - ­B52 PCIE_RX5+ PCIe 5 Receive
Data+ B53 PCIE_RX5- PCIe 5 Receive
Data- B54 GPO1 General Purpose
Output 1 B55 PCIE_RX4+ PCIe 4 Receive
Data+
B56 PCIE_RX4- PCIe 4 Receive
Data-
B57 GPO2 General Purpose
Output 2 B58 PCIE_RX3+ PCIe 3 Receive
Data+
B59 PCIE_RX3- PCIe 3 Receive
Data-
B60 GND (Fixed) Power Ground PWR - ­B61 PCIE_RX2+ PCIe 2 Receive
Data+
B62 PCIE_RX2- PCIe 2 Receive
Data-
B63 GPO3 General Purpose
Output 3 B64 PCIE_RX1+ PCIe 1 Receive
ype
DP-I/O
DP-I/O
O-3.3 SUS
Not connected Not connected
O-3.3
DP-I
O-3.3
DP-I
DP-I
O-3.3
DP-I
erminati
on
- Hooked to USB
PU 3.3 SUS of 10K
- Hooked to USB
- Connected to
PU 3.3 of 10K
PU 3.3 SUS of 10K
- -
nc nc
nc nc
- Connected to
- -
- -
- Connected to
- -
- -
-
-
Connected to
- -
Comment
port #3 on the ICH8M. Hooked to over current pin 0/1 of ICH8M.
port #1 on the ICH8M.
ICH8M pin GPIO6. Connected to ICH8M pin GPIO12.
-
CPLD
CPLD
CPLD
23
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Pin Signal Description
Data+
B65 PCIE_RX1- PCIe 1 Receive
Data-
B66 WAKE0# PCI Express Wake
Event I-3.3 SUS
B67 WAKE1# General Purpose
Wake Event I-3.3 SUS
B68 PCIE_RX0+ PCIe 0 Receive
Data+ B69 PCIE_RX0- PCIe 0 Receive
Data­B70 GND (Fixed) Power Ground PWR - ­B71 LVDS_B0+ LVDS Display
Channel B0
(Positive) B72 LVDS_B0- LVDS Display
Channel B0
(Negative) B73 LVDS_B1+ LVDS Display
Channel B1
(Positive) B74 LVDS_B1- LVDS Display
Channel B1
(Negative) B75 LVDS_B2+ LVDS Display
Channel B
2(Positive) B76 LVDS_B2- LVDS Display
Channel B2
(Negative) B77 LVDS_B3+ LVDS Display
Channel B3
(Positive) B78 LVDS_B3- LVDS Display
Channel B
3(Negative) B79 LVDS_BKLT_EN LVDS Display
Backlight Enable B80 GND (Fixed) Power Ground PWR - ­B81 LVDS_B_CK+ LVDS Display
Channel B Clock+ B82 LVDS_B_CK- LVDS Display
Channel B Clock­B83 LVDS_BKLT_CTRL LVDS Display
Backlight
Brightness
ype
DP-I
Not connected
Not connected
Not connected
Not connected
Not connected
Not connected
Not connected
Not connected
O-3.3
Not connected Not connected
O-3.3
erminati
on
- -
PU 3.3 SUS of 10K PU 3.3 SUS of 10K
- -
- -
nc nc
nc nc
nc nc
nc nc
nc nc
nc nc
nc nc
nc nc
PD 4.75K. -
nc nc
nc nc
- -
Comment
Connected to ICH8M pin WAKE
Connected to ICH8M pin RI#
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Pin Signal Description
B84 VCC_5V_SBY +5V Standby PWR - ­B85 VCC_5V_SBY +5V Standby PWR - ­B86 VCC_5V_SBY +5V Standby PWR - ­B87 VCC_5V_SBY +5V Standby PWR - ­B88 BIOS_DIS1# BIOS Disable
B89 VGA_RED Analog video O - Analog - ­B90 GND (Fixed) Power Ground PWR - ­B91 VGA_GRN Analog video O - Analog - ­B92 VGA_BLU Analog video O - Analog - ­B93 VGA_HSYNC Horizontal Sync O - 3.3 - ­B94 VGA_VSYNC Vertical Sync O - 3.3 - ­B95 VGA_I2C_CK DDC Clock
B96 VGA_I2C_DAT DDC Data
B97 SPI_CS# Carrier board SPI
chip select B98 RSVD Reserved - - ­B99 RSVD Reserved - - ­B100 GND (Fixed) Power Ground PWR - ­B101 RSVD Reserved - - ­B102 RSVD Reserved - - ­B103 RSVD Reserved - - ­B104 VCC_12V 12V VCC PWR - ­B105 VCC_12V 12V VCC PWR - ­B106 VCC_12V 12V VCC PWR - ­B107 VCC_12V 12V VCC PWR - ­B108 VCC_12V 12V VCC PWR - ­B109 VCC_12V 12V VCC PWR - ­B110 GND (Fixed) Power Ground PWR
ype
I – 3.3 SUS
I/0 - 3.3
I/O – 3.3
O – 3.3 SUS
erminati
on
PU 3.3V SUS of
51.1K ohms
PU 3.3V of 4.75K PU 3.3V of 4.75K
-
Comment
-
-
-
NOTE: The termination resistors in this table are already mounted on the
ETXexpress® board. Refer to the PICMG COM Express® Design Guide for information about additional termination resistors.
Table 7: Connector X1B - Row C
Pin Signal Description
C1 GND (Fixed) Power Ground PWR - ­C2 IDE_D7 IDE Data Bus 7 I/O – 3.3 - 5V tolerant
C3 IDE_D6 IDE Data Bus 6 I/O – 3.3 - 5V tolerant
C4 IDE_D3 IDE Data Bus 3 I/O – 3.3 - 5V tolerant
25
ype
erminati
on
Comment
input
input
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Pin Signal Description
C5 IDE_D15 IDE Data Bus 15 I/O – 3.3 - 5V tolerant
C6 IDE_D8 IDE Data Bus 8 I/O – 3.3 - 5V tolerant
C7 IDE_D9 IDE Data Bus 9 I/O – 3.3 - 5V tolerant
C8 IDE_D2 IDE Data Bus 2 I/O – 3.3 - 5V tolerant
C9 IDE_D13 IDE Data Bus 13 I/O – 3.3 - 5V tolerant
C10 IDE_D1 IDE Data Bus1 I/O – 3.3 - 5V tolerant
C11 GND (Fixed) Power Ground PWR - ­C12 IDE_D14 IDE Data Bus 14 I/O – 3.3 - 5V tolerant
C13 IDE_IORDY IDE I/O Ready I – 3.3V PU 3.3 of
C14 IDE_IOR# IDE I/O Ready O – 3.3V C15 PCI_PME# PCI Power
Management Event C16 PCI_GNT2# PCI Bus Grant 2 O-3.3 - ­C17 PCI_REQ2# PCI Bus Request 2 I – 3.3 PU 3.3 of
C18 PCI_GNT1# PCI Bus Grant 1 O-3.3 - ­C19 PCI_REQ1# PCI Bus Request 1 I – 3.3 PU 3.3 of
C20 PCI_GNT0# PCI Bus Grant 0 O-3.3 - ­C21 GND (Fixed) Power Ground PWR - ­C22 PCI_REQ0# PCI Bus Request 0 I – 3.3 PU 3.3 of
C23 PCI_RST# PCI Bus Reset O – 3.3 SUS 5V tolerant
C24 PCI_AD0 PCI Address and
Data Bus line C25 PCI_AD2 PCI Address and
Data Bus line C26 PCI_AD4 PCI Address and
Data Bus line C27 PCI_AD6 PCI Address and
Data Bus line
C28 PCI_AD8 PCI Address and
Data Bus line
C29 PCI_AD10 PCI Address and
Data Bus line
C30 PCI_AD12 PCI Address and
Data Bus line
ype
I – 3.3 SUS 5V tolerant
I/O – 3.3 - 5V tolerant
I/O – 3.3 - 5V tolerant
I/O – 3.3 - 5V tolerant
I/O – 3.3 - 5V tolerant
I/O – 3.3 - 5V tolerant
I/O – 3.3 - 5V tolerant
I/O – 3.3 - 5V tolerant
erminati
on
4.75K
8.2K
8.2K
8.2K
Comment
input
input
input
input
input
input
input
input 5V tolerant input
input
5V tolerant input
5V tolerant input
5V tolerant input
input
input
input -
input -
input
input
input
input
26
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Pin Signal Description
C31 GND (Fixed) Power Ground PWR - ­C32 PCI_AD14 PCI Address and
Data Bus line
C33 PCI_C/BE1# PCI Bus Command
and Byte Enable1
C34 PCI_PERR# PCI Bus Parity
Error
C35 PCI_LOCK# PCI Bus Lock I/O – 3.3 PU 3.3 of
C36 PCI_DEVSEL# PCI Bus Device
Select
C37 PCI_IRDY# PCI Bus Initiator
Ready
C38 PCI_C/BE2# PCI Bus Command
and Byte enable 2
C39 PCI_AD17 PCI Address and
Data Bus line
C40 PCI_AD19 PCI Address and
Data Bus line
C41 GND (Fixed) Power Ground PWR - ­C42 PCI_AD21 PCI Address and
Data Bus line
C43 PCI_AD23 PCI Address and
Data Bus line
C44 PCI_C/BE3# PCI Bus Command
and Byte enables
3 C45 PCI_AD25 PCI Address and
Data Bus line
C46 PCI_AD27 PCI Address and
Data Bus line
C47 PCI_AD29 PCI Address and
Data Bus line
C48 PCI_AD31 PCI Address and
Data Bus line
C49 PCI_IRQA# PCI Bus Interrupt
Request A
C50 PCI_IRQB# PCI Bus Interrupt
Request B C51 GND (Fixed) Power Ground PWR - ­C52 PEG_RX0+ PCIe Graphics Not nc nc
ype
I/O – 3.3 5V tolerant
I/O – 3.3 5V tolerant
I/O – 3.3 PU 3.3 of
I/O – 3.3 PU 3.3 of
I/O – 3.3 PU 3.3 of
I/O – 3.3 - 5V tolerant
I/O – 3.3 - 5V tolerant
I/O – 3.3 - 5V tolerant
I/O – 3.3 - 5V tolerant
I/O – 3.3 - 5V tolerant
I/O – 3.3 - 5V tolerant
I/O – 3.3 - 5V tolerant
I/O – 3.3 - 5V tolerant
I/O – 3.3 - 5V tolerant
I/O – 3.3 - 5V tolerant
I – 3.3 PU 3.3 of
I – 3.3 PU 3.3 of
erminati
on
8.2K
8.2K
8.2K
8.2K
8.2K
8.2K
Comment
input
input
5V tolerant
input
5V tolerant
input
5V tolerant
input
5V tolerant
input
input
input
input
input
input
input
input
input
input
input
5V tolerant
input
5V tolerant input
27
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Pin Signal Description
Receive+ (0) connected C53 PEG_RX0- PCIe Graphics
Receive- (0) C54 TYPE0# Not connected for
Type 2 module C55 PEG_RX1+ PCIe Graphics
Receive+ (1) C56 PEG_RX1- PCIe Graphics
Receive- (1) C57 TYPE1# Not connected for
Type 2 module C58 PEG_RX2+ PCIe Graphics
Receive+ (2) C59 PEG_RX2- PCIe Graphics
Receive- (2) C60 GND (Fixed) Power Ground PWR - ­C61 PEG_RX3+ PCIe Graphics
Receive+ (3) C62 PEG_RX3- PCIe Graphics
Receive- (3) C63 RSVD Reserved Not
C64 RSVD Reserved Not
C65 PEG_RX4+ PCIe Graphics
Receive+ (4)
C66 PEG_RX4- PCIe Graphics
Receive- (4) C67 RSVD Reserved Not
C68 PEG_RX5+ PCIe Graphics
Receive+ (5)
C69 PEG_RX5- PCIe Graphics
Receive- (5) C70 GND (Fixed) Power Ground PWR - ­C71 PEG_RX6+ PCIe Graphics
Receive+ (6)
C72 PEG_RX6- PCIe Graphics
Receive- (6) C73 SDVO_DATA SDVO Controller
Data C74 PEG_RX7+ PCIe Graphics
Receive+ (7)
C75 PEG_RX7- PCIe Graphics
Receive- (7)
C76 GND (Fixed) Power Ground PWR - -
ype
Not connected Not connected Not connected Not connected Not connected Not connected Not connected
Not connected Not connected
connected
connected Not connected
Not connected
connected Not connected
Not connected
Not connected
Not connected Not connected Not connected
Not connected
erminati
on
nc nc
nc nc
nc nc
nc nc
nc nc
nc nc
nc nc
nc nc
nc nc
nc nc
nc nc
nc nc
nc nc
nc nc
nc nc
nc nc
nc nc
nc nc
nc nc
nc nc
nc nc
Comment
28
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Pin Signal Description
C77 RSVD Reserved Not
C78 PEG_RX8+ PCIe Graphics
Receive+ (8)
C79 PEG_RX8- PCIe Graphics
Receive- (8)
C80 GND (Fixed) Power Ground PWR - ­C81 PEG_RX9+ PCIe Graphics
Receive+ (9)
C82 PEG_RX9- PCIe Graphics
Receive- (9)
C83 RSVD Reserved Not
C84 GND Power Ground PWR - ­C85 PEG_RX10+ PCIe Graphics
Receive+ (10)
C86 PEG_RX10- PCIe Graphics
Receive- (10)
C87 GND Power Ground PWR - ­C88 PEG_RX11+ PCIe Graphics
Receive+ (11)
C89 PEG_RX11- PCIe Graphics
Receive- (11)
C90 GND (Fixed) Power Ground PWR - ­C91 PEG_RX12+ PCIe Graphics
Receive+ (12)
C92 PEG_RX12- PCIe Graphics
Receive- (12)
C93 GND Power Ground PWR - ­C94 PEG_RX13+ PCIe Graphics
Receive+ (13)
C95 PEG_RX13- PCIe Graphics
Receive- (13)
C96 GND Power Ground PWR - ­C97 RSVD Reserved Not
C98 PEG_RX14+ PCIe Graphics
Receive+ (14)
C99 PEG_RX14- PCIe Graphics
Receive- (14)
C100 GND (Fixed) Power Ground PWR - ­C101 PEG_RX15+ PCIe Graphics Not nc nc
ype
connected Not connected
Not connected
Not connected
Not connected
connected
Not connected
Not connected
Not connected
Not connected
Not connected
Not connected
Not connected
Not connected
connected Not connected
Not connected
erminati
on
nc nc
nc nc
nc nc
nc nc
nc nc
nc nc
nc nc
nc nc
nc nc
nc nc
nc nc
nc nc
nc nc
nc nc
nc nc
nc nc
nc nc
Comment
29
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Pin Signal Description
Receive+ (15) connected
C102 PEG_RX15- PCIe Graphics
Receive- (15)
C103 GND Power Ground PWR - ­C104 VCC_12V 12V VCC PWR - ­C105 VCC_12V 12V VCC PWR - ­C106 VCC_12V 12V VCC PWR - ­C107 VCC_12V 12V VCC PWR - ­C108 VCC_12V 12V VCC PWR - ­C109 VCC_12V 12V VCC PWR - ­C110 GND (Fixed) Power Ground PWR - -
ype
Not connected
erminati
on
nc nc
Comment
NOTE: The termination resistors in this table are already mounted on the
ETXexpress® board. Refer to the PICMG COM Express® Design Guide for information about additional termination resistors.
Table 8: Connector X1B - Row D
Pin Signal Description
D1 GND (Fixed) Power Ground PWR - ­D2 IDE_D5 IDE Data Bus 5 I/O - 5V tolerant
D3 IDE_D10 IDE Data Bus 10 I/O - 5V tolerant
D4 IDE_D11 IDE Data Bus 11 I/O - 5V tolerant
D5 IDE_D12 IDE Data Bus 12 I/O - 5V tolerant
D6 IDE_D4 IDE Data Bus 4 I/O - 5V tolerant
D7 IDE_D0 IDE Data Bus 0 I/O - 5V tolerant
D8 IDE_REQ IDE Data Bus I/O - 5V tolerant
D9 IDE_IOW# IDE I/O Write O - 3.3 - ­D10 IDE_ACK# IDE DMA
Acknowledge D11 GND (Fixed) Power Ground PWR - ­D12 IDE_IRQ IDE Interrupt
Request D13 IDE_A0 IDE Address Bus 0 O - 3.3 - ­D14 IDE_A1 IDE Address Bus 1 O - 3.3 - -
ype
O - 3.3 - -
I - 3.3 PU 3.3 of
erminati
on
8.2K
Comment
input
input
input
input
input
input
input
5V tolerant input
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T
T
Pin Signal Description
D15 IDE_A2 IDE Address Bus 2 O - 3.3 - ­D16 IDE_CS1# IDE Chip Select
Channel 1 D17 IDE_CS3# IDE Chip Select
Channel 3 D18 IDE_RESET# IDE Hard Drive
Reset D19 PCI_GNT3# PCI Bus Grant 3 O - 3.3 ­D20 PCI_REQ3# PCI Bus Request 3 I -3 .3 PU 3.3 of
D21 GND (Fixed) Power Ground PWR - ­D22 PCI_AD1 PCI Address and
Data Bus line
D23 PCI_AD3 PCI Address and
Data Bus line
D24 PCI_AD5 PCI Address and
Data Bus line
D25 PCI_AD7 PCI Address and
Data Bus line
D26 PCI_C/BE0# PCI Command and
Byte Enable 0
D27 PCI_AD9 PCI Address and
Data Bus line
D28 PCI_AD11 PCI Address and
Data Bus line
D29 PCI_AD13 PCI Address and
Data Bus line
D30 PCI_AD15 PCI Address and
Data Bus line D31 GND (Fixed) Power Ground PWR - ­D32 PCI_PAR PCI Bus Parity I/O - 3.3 - 5V tolerant
D33 PCI_SERR# PCI Bus System
Error D34 PCI_STOP# PCI Bus Stop I/O - 3.3 PU 3.3 of
D35 PCI_TRDY# PCI Bus Target
Ready D36 PCI_FRAME# PCI Bus Cycle
Frame D37 PCI_AD16 PCI Address and
Data Bus line
D38 PCI_AD18 PCI Address and
Data Bus line
ype
O - 3.3 - -
O - 3.3 - -
O - 3.3 - -
I/O - 3.3 - 5V tolerant
I/O - 3.3 - 5V tolerant
I/O - 3.3 - 5V tolerant
I/O - 3.3 - 5V tolerant
I/O - 3.3 - 5V tolerant
I/O - 3.3 - 5V tolerant
I/O-3.3 - 5V tolerant
I/O-3.3 - 5V tolerant
I/O-3.3 - 5V tolerant
I/OD - 3.3 PU 3.3 of
I/O - 3.3 PU 3.3 of
I/O - 3.3 PU 3.3 of
I/O - 3.3 - 5V tolerant
I/O - 3.3 - 5V tolerant
erminati
on
8.2K
8.2K
8.2K
8.2K
8.2K
Comment
5V tolerant input
input
input
input
input
input
input
input
input
input
input 5V tolerant input 5V tolerant input 5V tolerant input 5V tolerant input
input
input
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T
T
Pin Signal Description
D39 PCI_AD20 PCI Address and
Data Bus line
D40 PCI_AD22 PCI Address and
Data Bus line
D41 GND (Fixed) Power Ground PWR - ­D42 PCI_AD24 PCI Address and
Data Bus line
D43 PCI_AD26 PCI Address and
Data Bus line
D44 PCI_AD28 PCI Address and
Data Bus line
D45 PCI_AD30 PCI Address and
Data Bus line
D46 PCI_IRQC# PCI Bus Interrupt
Request C
D47 PCI_IRQD# PCI Bus Interrupt
Request D
D48 PCI_CLKRUN# PCI Clock Run I - 3.3 PU 3.3 of
D49 PCI_M66EN PCI_M66EN Not
D50 PCI_CLK PCI Clock O-3.3 - ­D51 GND (Fixed) Power Ground PWR - ­D52 PEG_TX0+ PCIe Graphics
Transmit+ (0) D53 PEG_TX0- PCIe Graphics
Transmit- (0) D54 PEG_LANE_RV# PCIe Graphics
Lane Reversal D55 PEG_TX1+ PCIe Graphics
Transmit+ (1) D56 PEG_TX1- PCIe Graphics
Transmit- (1) D57 TYPE2# Note connected
for Type 2
modules D58 PEG_TX2+ PCIe Graphics
Transmit+ (2) D59 PEG_TX2- PCIe Graphics
Transmit- (2) D60 GND (fixed) Power Ground PWR - ­D61 PEG_TX3+ PCIe Graphics
Transmit+ (3)
ype
I/O - 3.3 - 5V tolerant
I/O - 3.3 - 5V tolerant
I/O - 3.3 - 5V tolerant
I/O -3 .3 - 5V tolerant
I/O - 3.3 - 5V tolerant
I/O - 3.3 - 5V tolerant
I - 3.3 PU 3.3 of
I - 3.3 PU 3.3 of
connected
Not connected Not connected Not connected Not connected Not connected Not connected
Not connected Not connected
Not connected
erminati
on
8.2K
8.2K
8.2K
nc nc
nc nc
nc nc
nc nc
nc nc
nc nc
nc nc
nc nc
nc nc
nc nc
Comment
input
input
input
input
input
input
5V tolerant
input
5V tolerant
input
Not 5V tolerant
per the COM.0
spec
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T
T
Pin Signal Description
D62 PEG_TX3- PCIe Graphics
Transmit- (3) D63 RSVD Reserved Not
D64 RSVD Reserved Not
D65 PEG_TX4+ PCIe Graphics
Transmit+ (4) D66 PEG_TX4- PCIe Graphics
Transmit- (4) D67 GND Power Ground PWR - ­D68 PEG_TX5+ PCIe Graphics
Transmit+ (5) D69 PEG_TX5- PCIe Graphics
Transmit- (5) D70 GND (Fixed) Power Ground PWR - ­D71 PEG_TX6+ PCIe Graphics
Transmit+ (6) D72 PEG_TX6- PCIe Graphics
Transmit- (6) D73 SDVO_CLK SDVO Clock Not
D74 PEG_TX7+ PCIe Graphics
Transmit+ (7) D75 PEG_TX7- PCIe Graphics
Transmit- (7) D76 GND Power Ground PWR - ­D77 IDE_CBLID IDE Cable Type
Identification
D78 PEG_TX8+ PCIe Graphics
Transmit+ (8) D79 PEG_TX8- PCIe Graphics
Transmit- (8) D80 GND (Fixed) Power Ground PWR - ­D81 PEG_TX9+ PCIe Graphics
Transmit+ (9) D82 PEG_TX9- PCIe Graphics
Transmit- (9) D83 RSVD Reserved Not
D84 GND Power Ground PWR - ­D85 PEG_TX10+ PCIe Graphics
Transmit+ (10) D86 PEG_TX10- PCIe Graphics
Transmit- (10) D87 GND Power Ground PWR - -
ype
Not connected
connected
connected Not connected Not connected
Not connected Not connected
Not connected Not connected
connected Not connected Not connected
I – 3.3 PD of 10K Not 5V tolerant
Not connected Not connected
Not connected Not connected
connected
Not connected Not connected
erminati
on
nc nc
nc nc
nc nc
nc nc
nc nc
nc nc
nc nc
nc nc
nc nc
nc nc
nc nc
nc nc
nc nc
nc nc
nc nc
nc nc
nc nc
nc nc
nc nc
Comment
per the COM.0 spec. Connected to ICH8M pin GPIO38.
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T
T
Pin Signal Description
D88 PEG_TX11+ PCIe Graphics
Transmit+ (11) D89 PEG_TX11- PCIe Graphics
Transmit- (11) D90 GND (Fixed) Power Ground PWR - ­D91 PEG_TX12+ PCIe Graphics
Transmit+ (12) D92 PEG_TX12- PCIe Graphics
Transmit- (12) D93 GND Power Ground PWR - ­D94 PEG_TX13+ PCIe Graphics
Transmit+ (13) D95 PEG_TX13- PCIe Graphics
Transmit- (13) D96 GND Power Ground PWR - ­D97 PEG_ENABLE# PEG Enable Not
D98 PEG_TX14+ PCIe Graphics
Transmit+ (14) D99 PEG_TX14- PCIe Graphics
Transmit- (14) D100 GND (Fixed) Power Ground PWR - ­D101 PEG_TX15+ PCIe Graphics
Transmit+ (15) D102 PEG_TX15- PCIe Graphics
Transmit- (15) D103 GND Power Ground PWR - ­D104 VCC_12V 12V VCC PWR - ­D105 VCC_12V 12V VCC PWR - ­D106 VCC_12V 12V VCC PWR - ­D107 VCC_12V 12V VCC PWR - ­D108 VCC_12V 12V VCC PWR - ­D109 VCC_12V 12V VCC PWR - ­D110 GND (Fixed) Power Ground PWR - -
ype
Not connected Not connected
Not connected Not connected
Not connected Not connected
connected Not connected Not connected
Not connected Not connected
erminati
on
nc nc
nc nc
nc nc
nc nc
nc nc
nc nc
nc nc
nc nc
nc nc
nc nc
nc nc
Comment
NOTE: The termination resistors in this table are already mounted on the
ETXexpress® board. Refer to the PICMG COM Express® Design Guide for information about additional termination resistors.
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N
J1 - CPLD Debug
Kontron microETXexpress-PV User’s Guide
Figure 4: Onboard Connectors
4.1.2 Connector J1 – Fan
J1 is the 4-pin connector for a fan. J1 can be configured in the BIOS setup. See Section 6.3, “Onboard Fan Connector” for more detailed information.
Although the module is functional without active cooling, it is advised that
a minimal airflow be maintained within the system to ensure components do not overheat.
Table 9: J1 Fan Connector Pin-Out
Pin
1 FAN_TACH 2 FAN_V_IN 3 FAN_GND 4 V_5V
ame
4.1.3 Connectors J2 and J3 – SODIMM DDR2 Memory Sockets
This design supports up to 2 GBytes (single channel) of DDR2 memory with two
200-pin sockets.
4.1.4 Connector J4 - XDP
The eXtended Debug Port (XDP) connector is a 24-pin connector used for
debugging the board.
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N
T
N
NOTE: This connector is for development debug purposes only. The XDP
connector pin-out is under NDA.
4.1.5 Connector J5 –JTAG
This is the Intel® ICH8M debug connector.
WARNING: The debug port is for internal use only. Do not connect any devices.
Table 10: J5 JTAG Connector Pin-Out
Pin
1 V_3V3_S5 ­2 CPLD_TDI PU to 3.3V SUS of 1K. 3 CPLD_TCK PD to 1K. 4 CPLD_TMS PU to 3.3V SUS of 1K. 5 CPLD_TDO PU to 3.3V SUS of 1K. 6 GND ­7 KILL_POWER_UP# PU 5K to 25K in the
8 GND -
ame
ermination
CPLD.
4.1.6 SSD Mezzanine Connector
The optional onboard SSD module interface uses SATA to connect to port 2 the Intel® ICH8M.
Table 11: J6 SSD Connector Pin-Out
Pin
1 GND 2 GND 3 GND 4 SATA_RX+ 5 V_3V3 6 SATA_RX­7 V_3V3 8 GND 9 V_3V3 10 SATA_TX+ 11 NC 12 SATA_TX­13 RESET 14 GND
ame
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C
2
C
3
C
4.1.7 PCI Express Interface
The PCI Express* x1 lane is a fast connection interface for many different system devices, such as network controllers, I/O controllers or express card devices. The implementation of this subsystem complies with the ETXexpress® COM Express Specification. Refer to the PICMG COM Express® Design Guide for additional implementation information.
The microETXexpress
®
-PV COM supports up to 5 PCI Express x1 lanes. See Table
12 for detailed configuration information.
Table 12: PCI Express Configurations
PCIExpress Ports
Port 0
Port 1
Port 2
Port 3
Port 4
Config. 1
x4 Port x2 Port x2 Port x1 Port
x1 Port x1 Port x1 Port x1 Port
onfig.
x2 Port x1 Port x1 Port
onfig.
x1 Port x1 Port
onfig. 4
x1 Port
4.1.8 USB Interface
The USB interface has five UHCI (USB 1.1) controllers and two EHCI (USB 2.0) controllers. Not all of the UHCI controllers are used. Table 13 shows how eight USB ports are used for USB configuration in the microETXexpress®-PV module.
Table 13: USB Configuration
COMexpress™ Port
USB0 USB0 Either USB 1.1 (UHCI1) or USB
USB1 USB1 Either USB 1.1 (UHCI1) or USB
USB2 USB2 Either USB 1.1 (UHCI2) or USB
USB3 USB3 Either USB 1.1 (UHCI2) or USB
USB4 USB6 Either USB 1.1 (UHCI4) or USB
USB5 USB7 Either USB 1.1 (UHCI4) or USB
USB6 USB8 Either USB 1.1 (UHCI5) or USB
USB7 USB9 Either USB 1.1 (UHCI5) or USB
ICH8MPortDescription
2.0 (EHC1)
2.0 (EHC1)
2.0 (EHC1)
2.0 (EHC1)
2.0 (EHC2)
2.0 (EHC2)
2.0 (EHC2)
2.0 (EHC2)
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Figure 5 shows the internal USB mapping from the Intel® ICH8M.
Figure 5: USB Mapping
NOTE: Additional USB connections can be added using external USB hubs.
Configuration
The USB controllers are PCI bus devices. The BIOS allocates the required system resources during configuration of the PCI bus.
4.1.9 SATA Interface
NOTE: If you are installing your operating system on a SATA hard drive
in AHCI mode, you might need to install the driver when prompted. To obtain this driver, go to the Kontron microETXexpress®-PV COM download page at http://emdcustomersection.kontron.com/.
Configuration
The SATA controller is part of the ICH8M.
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4.1.10 Audio Interface
The Intel® ICH8M supports Intel® High Definition Audio (HDA). This HD audio configuration supports up to four audio streams (with up to 16 channels each), 32-bit sample depth, and sample rates up to 192 KHz.
With this configuration you can implement hardware CODECs on your baseboard for 7.1/5.1 audio systems and SDIF output. The pins for the HD audio are defined in Section 4.1, Pin-Outs.
WARNING: This feature is only supported with baseboards that have an HD audio
CODEC.
Configuration
The audio controller is in the Intel® ICH8M. The BIOS allocates the required system resources during configuration.
4.1.11 Serial IRQ
The serial IRQ pin offers a standardized interface to link interrupt request lines to a single wire.
Configuration
The serial IRQ machine is in “Continuous Mode”.
4.1.12 Graphics Interface
The microETXexpress®-PV uses the Intel® Graphics Media Accelerator 3150
(Intel® GMA 3150) with a 400 MHz GPU clock for the D410/D510 Atom processors
and 200MHz for the N450 Atom processor. This controller, which is integrated
in the Intel® Atom processor, delivers advanced 3D video capabilities. The
graphics engine supports multiple display types (LVDS, VGA, DVI-I, HDTV, and
CRT), and resolutions up to 2048x1536 VGA mode for the modules with the D510
and D410 processors. Module with the N450 CPU support resolution of
1400x1050.
The GMA uses the processor RAM for graphics memory. The pre-allocated memory is defined through BIOS settings.
VGA
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The analog VGA graphics core, with a maximum resolution of 1400x1050 (Modules with the N450 CPU), is integrated in the processor. Modules with the D410 and D510 CPU support 2048x1536 resolution.
LVDS Flat Panel Interface (JILI)
The Intel® Atom processor has integrated 18-bit single channel LVDS for WXGA. The user interface for flat panels is the JUMPtec* Intelligent LVDS Interface (JILI). The implementation of this subsystem complies with the COM Express® specification. For additional implementation information, refer to the PICMG COM Express® Design Guide on the PIGMG website.
4.1.13 Ethernet Interface
The Ethernet interface on the microETXexpress®-PV COM is the Intel® 82567LM 10/100/1000 Mbit Gigabit Ethernet PHY. The GbE PHY is connected to the GLCI/LCI of the ICH8M. The controller supports a 10/100/1000 Base-T interface and it auto-negotiates the use of 10 Mbit/sec, 100 Mbit/sec or 1Gbit/sec connections.
The interface supports functions such as WOL (WakeOnLAN) and PXE (Preboot eXecution Environment) boot.
For cable lengths and terminations on your baseboard, refer to the PICMG COM Express® Design Guide on the PICMG website.
Configuration
The Ethernet controller is a PCI Express bus device. The BIOS allocates the required system resources during the configuration of the PCIe device.
4.1.14 SPI Bus Interface
The Serial Peripheral Interface (SPI) signals are connected to the Intel®
ICH8M hub with pins that were previously reserved on the COM Express®
connector. The SPI interface can be used to connect one carrier board
devices, including external BIOS flash memory. The implementation of this
subsystem complies with the COM Express® specification. For additional implementation information, refer to the PICMG COM Express® Design Guide on
the PICMG website
4.1.15 LPC Bus Interface
The Low Pin Count (LPC) interface signals are connected to the Intel® ICH8M. The LPC low-speed interface can be used for peripheral circuits. For example,
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Kontron microETXexpress-PV User’s Guide
it can be used as an external super I/O controller to combine legacy-device support into a single IC. The implementation of this subsystem complies with the COM Express® specification. For additional implementation information, refer to the PICMG COM Express® Design Guide on the PICMG website.
The LPC bus does not support DMA (Direct Memory Access) and therefore imposes limitations for ISA bus and standard I/Os (SIOs) like floppy or LPT interface implementations.
WARNING: Connecting more than one device to the LPC bus requires using a
clock buffer. Because of the power management of the LPC bus, you must use great care with clock buffers that require synchronization as they could prevent the board from booting up.
Figure 6: Standard Clock Buffer
NOTE: When using a standard clock buffer on the baseboard, be aware that the
generated delay must be considered for the length matching of the layout.
Clock Buffer Reference Schematic
The schematic in Figure 7 shows an implementation example for the clock buffer.
Figure 7: LPC Clock Buffer
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D
Table 14: LPC Addresses
Address (HEX) Device
0000 - 00FF IBM PC compatible devices (IRQ-Controller,
Keyboard, RTC, etc.)
002E-002F Optional: Super I/O W83627
01F0 - 01F7 Fixed Disk 03C0 - 03CF VGA/EGA compatible registers 03F6 Fixed Disk 0400 - 041F SMBus 0500 – 053F GPIO ICH 04D0 - 04D1 IRQ Configuration 0800 - 087F Power Management 0A00 – 0A2F CPLD I/O 0A20 - 0A2F SIO HWM (if present) 0CF8 - 0CFF PCI Configuration C400 – C41F PCI USB Controller * C480 – C49F PCI USB Controller *
C000 – C007 PCI VGA Controller * EF00 - EF1F PCI USB Controller* FFA0 – FFAF PCI IDE Controller *
* = not fixed, configured by the BIOS automatically and may be
different in other system configurations.
Table 15: Device Addresses
Address (HEX)
00000000 ­0009FFFF 000A0000 ­000BFFFF
42
evice
DOS- (Real mode-) memory
Display memory
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Kontron microETXexpress-PV User’s Guide
000C0000 ­000CBFFF 000CC000 ­000DFFFF 000E0000 ­000EFFFF 000F0000 ­000FFFFF 00100000 ­7FFFFFFF 80000000 ­FFF00000 CFDDC000 ­CFFFFFFF D0000000 ­DFFFFFFF FEC00000 ­FEC00040 FED00000 ­FED003FF FED10000 ­dynamic FED40000 ­FED4BFFF F0000000 ­F0003FFF FFC00000 ­FFF00000 FFF00000 ­FFFFFFFF FFF80000 ­FFFFFFFF
VGA BIOS
Other Option ROM
System BIOS extended space
System BIOS base segment
System Memory
PCI Memory, other extensions
PCI LAN Controller
PCI VGA Controller / Audio Controller / USB Controller APIC Configuration
Event Timer
Audio Controller
LPC Configuration
RCRB (Root Complex)
Reserved
Firmware Hub
Mapping space for BIOS ROM
For further details, please refer to the processor and I/O controller hub information on the Intel website at http://www.intel.com.
4.1.16 Power Control Interface
Power Good (PWR_OK)
The microETXexpress®-PV COM provides an external input for a power-good signal (pin B24). The implementation of this subsystem complies with the COM Express® Specification. PWR_OK must be high-level (> 1.7V) to power on the module in normal ATX mode.
Power Button (PWRBTN#)
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The power button (pin B12) is available through the module connector as defined in the pin-out list. To start the module using the power button the PWRBTN# signal must be at least 50ms (50ms t < 4sec) at low-level power.
To force a power-off the module, press and hold the power button for at least four seconds. Depending on the OS in use, only one press of the Power button initiate the clean power down of the module.
Reset Button (SYS_RESET#)
The reset button (pin B49) is available through the module connector as defined in the pin-out list. The module stays in reset as long as SYS_RESET# is grounded.
WARNING: Please note that in order to fulfill the COM Express requirements, pressing the reset button will cause a complete power cycle.
Power Supply
The microETXexpress®-PV COM has a wide range of power input, from 4.75V to 18V DC. The supply voltage is applied through 24 pins (VCC) on the module connectors. In ATX mode with 5V standby voltage, the VCC input must be higher than the standby voltage.
In general, single supply mode means that the module is able to function with a single supply (no standby voltage is necessary). All other functions attributed to the ATX mode remain functional.
ATX Mode / Single Supply Mode
ATX Mode:
When an ATX power supply is connected, PWR_OK is set to low-level and VCC is off. Pressing the power button enables the ATX PSU setting PWR_OK to high­level and powers on VCC. The ATX PSU is controlled by the PS_ON# signal, which is generated by SUS_S3# via inversion.
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PS_
PWR_
-
N
Table 16: ATX Mode
State PWRBTN# PWR_OK V5_StdBy
S3 x x 5V x 0V S5 high low 5V high 0V S5 -> S0 PWRBTN Event low -> high 5V high -> low 0 V-> VCC S0 high high 5V low VCC
ON# VCC
Single Supply (Battery) Mode:
To enable the single supply mode the BIOS setup must be changed. The “Battery Mode” must be enabled from the Boot menu. Setting “Power Scheme” option to “Battery Mode” in the BIOS will enable the following features:
» The PWR_OK# state is ignored and the input voltage monitoring will be
enabled
An internal voltage monitor will let the board start (after a power button event or self-power up) when the input voltage is above 4.75V. The voltage monitor accomplishes this by controlling, via the CPLD, the BATLOW# signal of the ICH8M. When BATLOW# is asserted the ICH8M will defer the platform to leave the power states S3 – Suspend to RAM, S4 – Suspend to disk or S5 – Soft off. Once BATLOW# goes inactive the ICH8M will let the platform transition to S0.
» Onboard debug LED will be disabled
The onboard debug LED will be turned off to reduce the power consumption, especially when not in S0.
Table 17: Single Supply Mode
State PWRBTN#
S3 x x 5V VCC 3
S3 -> S0 PWRBTN
Event
S5 x x 5V VCC 3
S5 -> S0 PWRBTN
Event
NOTES: 1) Columns marked “x” are not relevant for the specified power
state.
2) All ground pins have to be tied to the ground plane of the carrier board.
3) In suspend either V5_StdBy AND/OR VCC can be powered.
OK V5_StdBy VCC (4.75
18V)
x x VCC
x x VCC
ote
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4.1.17 Miscellaneous Circuits
Speaker
The implementation of this subsystem complies with the COM Express® Specification. For additional implementation information, refer to the PICMG COM Express® Design Guide.
Battery
The implementation of this subsystem complies with the COM Express® specification. For additional implementation information, refer to the PICMG COM Express® Design Guide on the PICMG website.
In compliance with the EN60950 standard, there are at least two current­limiting devices (resistor and diode) between the battery and the consuming component.
NOTE: A diode and resistor protection is already present on the module.
I2C Bus
The I²C bus is implemented using bit banging. The speed for this bus is always 100kHz. No multi-master support is available.
See the Chapter 8, “BIOS Operation” for supported I
2
C features.
SMBus
System Management Bus (SMB) signals are connected to the SMBus controller, which is located on the Intel® ICH8M. The SMBus is a 2-wire bi-directional bus (clock and serial data) used for system management tasks such as reading parameters from a memory card or reading temperatures and voltages of system components.
The SMBus uses the same signaling scheme as the I
2
C bus.
PCI Bus
The processor provides a standard PCI 3.0 32-bit/33 MHz interface. The implementation of this subsystem complies with the COM Express® Specification. For additional implementation information, refer to the PICMG COM Express® Design Guide.
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Kontron microETXexpress-PV User’s Guide
WARNING: The following signal is not 5V tolerant as required by the COM
Express 2.0 specification:
- Pin D48 - PCI_CLKRUN#
IDE Port
The IDE host adapter on the Intel® ICH8M supports PATA/UDMA-33/66/100 operation. The implementation of this subsystem complies with the COM Express® Specification. For additional implementation information, refer to the PICMG COM Express® Design Guide on the PICMG website.
WARNING: The following signal is not 5V tolerant as required by the COM
Express 2.0 specification:
- Pin D77 - IDE_CBLID
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5 Special Features
5.1 Hyper-Threading
Hyper-threading (officially termed Hyper-Threading Technology or HTT) is an Intel-proprietary technology used to improve parallelization of computations performed on PCs. Hyper-threading works by duplicating certain sections of the processor—those that store the architectural state -- but not duplicating the main execution resources. A hyper-threading equipped processor can appear to be two "logical" processors to the host operating system, thus allowing the operating system to schedule two threads or processes simultaneously. Hyper Threading Technology support always depends on the operating system.
5.2 Enhanced SpeedStep™ Technology
The Intel® N450 Atom processor supports the Intel® Enhanced SpeedStep™ technology, which automatically switches the processor between maximum performance mode and battery-optimized mode, depending on the needs of the application being run. Modules with either the D510 or D410 CPU do not support Enhanced Intel SpeedStep Technology. SpeedStep technology lets you optimize the system performance to match application requirements. When powered by a battery or running in idle mode, the processor drops to lower frequencies (by changing the CPU ratios) and voltage to conserving battery life while maintaining a high level of performance. The frequency is set back to high automatically, allowing you to customize performance.
NOTE: To use Enhanced SpeedStep™ technology, you need an operating system
that supports it.
Disabling SpeedStep in the BIOS enables manual control of CPU performance. You can set the CPU performance state in the BIOS setup or use third-party software to control CPU performance states.
5.3 Onboard Hardware Monitor
The microETXexpress®-PV COM has an onboard hardware monitor. The following
table lists the different sensors implemented.
Table 18: Sensors
Sensor name
CPU Temp 1 CPU 1 junction
CPU Temp 2 CPU 2 junction
48
Measurements
temperature.
temperature.
otes
-
Only available on the modules with D510 CPU.
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Kontron microETXexpress-PV User’s Guide
System Temp FAN 0 Onboard fan connector
Voltage 0 CPU core voltage Voltage 1 Module main (12V) input
Voltage 2 Module 5V standby input
Voltage 3 RTC battery voltage
Internal HWM IC temperature.
tach input.
voltage
voltage
Provides the module’s PCB temperature
-
-
A voltage divider is present on this pin in order to be able to read the full range of input voltage. The reading must be multiplied by 2 to have the real value when using third party software.
-
To read this sensor properly when using third party software, the HWM GPIO 1 must be enabled. This feature prevents unnecessary drainage of the RTC battery.
5.4 Watchdog
This feature is implemented through the LPC on the CPLD and offers a dual-
stage watchdog. It first generates an NMI and, after 1mS, a reset is
generated. The application software should strobe the WDTimer to prevent a
timeout. The WDTrigger resets and restarts the system after a timeout to
provide a way to recover from program crashes or lockups.
The Watchdog can be triggered through
» K-Station » Direct programming (i.e., writing data into one register of the CPLD)
For information about programming this feature, see the JIDA32/K-Station driver packet in the Kontron Customer section or contact your local sales support representative to get an application note about low level programming.
5.5 JIDA Non-Volatile and CMOS Settings
The microETXexpress® -PV module allows saving the CMOS settings externally. If the RTC battery fails to keep CMOS voltage at a certain level, the external EEPROM restores the previous settings. If the CMOS is lost, all previous settings are restored and an error message is displayed on the POST screen: “CMOS Date/Time Not Set”.
From there, users have two choices: “Press F1 to Run SETUP” or “Press F2 to load default values and continue”. If the choice is to keep all previous settings, then Press “F1” and enter the new date and new hour. Press F10 to save and exit. Your previous settings are set correctly and the time and
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F
COME
date are set accordingly. Pressing F2 sets the date to the BIOS build date and the hour is set to 00:00:00. The default values are reloaded and the system will boot on the default bootable device.
5.6 General Purpose Input and Output (GPIO)
The microETXexpress®-PV COM provides eight GPIOs (always enabled)that can be accessed through the module connector described in the pin-out lists, in Section 4.1. The GPIO viewer can be enabled in the BIOS setup.
NOTE: GPIO cannot drive applications faster than 2 msec. Data transfer
rates up to 1 kHz maximum are recommended.
Table 19: GPIO COM Express Pin-Outs
Bit of GPIO Port0
0 GPI0 A54 1 GPI1 A63 2 GPI2 A67 3 GPI3 A85 4 GPO0 A93 5 GPO1 B54 6 GPO2 B57 7 GPO3 B63
unction
xpress Pin
5.7 I2C
The microETXexpress®-PV COM integrates uses an I2C bus provided via the Intel® ICH8M chipset. For the External I²C Speed it will always be 100kHz. No multi-master support is available.
5.8 ACPI Suspend Modes and Resume Events
The microETXexpress®-PV COM supports the following suspend modes:
» S0 (Full on) » S3 (Suspend to RAM) » S4 (Suspend to Disk) » S5 /WOL(power off, WOL enabled) » S5 (power off, WOL disabled)
Events that Resume the System from S3
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» USB keyboard (1) » USB mouse (1) » Power button » WakeOnLan (2)
Events that Resume the System from S4/S5
» Power button » WakeOnLan
NOTES: 1) The OS must support wake-up via USB devices and the baseboard
must power the USB port with Standby-Voltage
2) WakeOnLan must be enabled in the driver options
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6 Design Considerations
6.1 Thermal Management
A heat spreader plate assembly is available from Kontron Embedded Modules for the microETXexpress®-PV COM. The heat spreader plate on top of this assembly is NOT a heat sink. It works as a COM Express®-standard thermal interface to be used with a heat sink or other cooling device.
External cooling must be provided to maintain the heat spreader plate at proper operating temperatures. Under worst-case conditions, the cooling mechanism must maintain an ambient air and heat spreader plate temperature of 60° C or less.
The aluminum slugs and thermal pads on the underside of the heat spreader assembly implement thermal interfaces between the heat spreader plate and the major heat-generating components on the microETXexpress®-PV. About 80 percent of the power dissipated within the module is conducted to the heat spreader plate and can be removed by the cooling solution.
Kontron also has defined a passive heat sink that can be used in place of the heat spreader plate to provide additional cooling. You can use many thermal­management solutions with the heat spreader plates, including active and passive approaches. The optimum cooling solution varies, depending on the COM Express® application and environmental conditions. Drawings for both the heat spreader plate and the passive heat sink are available on request. Also, see the PICMG COM Express® Design Guide on the PICMG website for further information about thermal management.
6.2 Heat Spreader Dimensions
Documentation for the microETXexpress®-PV COM heat spreader and cooling solutions is provided at http://emdcustomersection.kontron.com.
6.3 Onboard Fan Connector
This section describes how to connect an optional fan to the connector located directly on the microETXexpress®-PV COM. With certain BIOS-settings it is possible to control the fan depending on the active trip point temperature. The fan switches on/off depending on the adjusted Active Trip Point temperature. This feature requires an ACPI-compliant OS to function properly. The fan PWM control is done on the GND pin rather than the positive side. Please do not use pin 3 as a ground connection. See schematic below for more details.
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Figure 8: Fan Connector (J1) Location and Pin-Out
The onboard fan connector (J1) is on the right top side of the PCB.
Table 20: Fan Connector (J1) Pin-Out
Pin
1 Fan Tachometer 2 Power (12V) 3 Fan GND
4 Power (5V)
escription
(PWM controlled)
Connector J1 specifications and Kontron part numbers for the components are:
» Part number: (Molex) 53261-0471
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» Mates with: (Molex) 51021-0400 » Crimp terminals: (Molex) 50079-80000 (26-28 AWG)
6.3.1 Fan Connector Electrical Characteristics
The fan connector has two supply pins. One of the supply pins outputs a regulated +5V with a maximum current of 350mA. The second supply pin is connected directly from the VCC_12V supply from the COM Express connector .The maximum current supported on that output is 125mA @ 60°C ambient because it is current limited by a resettable fuse. The voltage is not limited to +12V on this pin.
WARNING: Be aware of the wide range input voltage and acceptable fan voltage
when connecting a fan to ht VCC_12V (Pin 2) output.
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C
7 System Resources
7.1 Interrupt Request (IRQ) Lines
Table 21: 8259 PIC Mode
IRQ # Used For Available
0 Timer0 No 1 Keyboard No 2 Cascade No 3 External SIO -
COM2
4 External SIO -
COM1
5 PCI for PCI Dynamic (BIOS
6 External SIO Yes (No) Note (1) 7 External SIO -
LPT1
8 RTC No 9 ACPI No Note (2) 10 PCI for PCI Dynamic (BIOS
11 PCI for PCI Dynamic (BIOS
12 PS/2 Mouse Yes (No) Note (1) 13 FPU No 14 Primary IDE No 15 Secondary IDE No
Yes (No) Note (1)
Yes (No) Note (1)
Yes (No) Note (1)
omment
default)
default)
default)
NOTES: 1) If the “Used For” device is disabled in setup, the interrupt
is available for other devices.
2) Not available if ACPI is used
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Table 22: APIC Mode
IRQ # Used For Availab
le
0 Timer0 No - 1 Keyboard No - 2 Cascade No - 3 External SIO -
COM2
4 External SIO -
COM1
5 PCI for PCI Dynamic (BIOS
6 External SIO Yes
7 External SIO -
LPT1
8 RTC No - 9 ACPI No Note (2) 10 PCI for PCI Dynamic (BIOS
11 PCI for PCI Dynamic (BIOS
12 PS/2 Mouse Yes
13 FPU No - 14 Primary IDE No Note (1) 15 PCI for PCI Dynamic (BIOS
16 PIRQ [A] No PCI IRQ line 1 +
17 PIRQ [B] No PCI IRQ line 2 +
18 PIRQ [C] No PCI IRQ line 3 + USB
19 PIRQ [D] No PCI IRQ line 4 +
20 PIRQ [E] No -
21 PIRQ [F] No HD Audio
22 PIRQ [G] No -
23 PIRQ [H] No USB EHCI 2836, USB
Yes (No) Yes (No)
(No) Yes (No)
(No)
omment
Note (1)
Note (1)
default) Note (1)
Note (1)
default)
default) Note (1)
default)
PCIe- Switch + + SATA Bridge + USB client (if enabled) (3)
UHCI 2832
PCIe- Switch + USB UHCI 2831
UHCI 2830
NOTES: 1) If the “Used For” device is disabled in setup, the interrupt
is available for other devices.
2) Not available if ACPI is used
3) ACPI OS decides on the particular IRQ usage
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C
7.2 Memory Area
The first 640 KBytes of DRAM are used as main memory. With DOS, you can address 1 MByte of memory directly. Memory area above 1 MByte (high memory, extended memory) is accessed under DOS via special drivers such as HIMEM.SYS and EMM386.EXE, which are part of the operating system. See the operating system documentation or special textbooks for information about HIMEM.SYS and EMM386.EXE.
Other operating systems (Linux or Windows versions) allow you to address the full memory area directly.
Upper Memory Used for Available
A0000h – BFFFFh VGA Memory No Mainly used by graphic
C0000h – CFFFFh VGA BIOS No Used by onboard VGA ROM D0000h – DFFFFh Yes Free for shadow RAM in standard
E0000h – FFFFFh System BIOS No Fixed
omment
controller
configurations.
7.3 I/O Address Map
The I/O-port addresses of the microETXexpress®-PV COM are functionally identical to those of a standard PC/AT system. All addresses not mentioned in Table 1 should be available. We recommend that you do not use I/O addresses below 0100h for additional hardware for compatibility reasons, even if available.
Table 23: I/O Address Assignments
I/O Address Used for Availa
ble
0000 – 000F Direct memory access
controller
0010 – 001F System Resources No Fixed 0020 - 0021 Interrupt Controller 1 No Fixed 0022 – 003F System Resources No Fixed 002E - 002F WB83627 No Fixed if WB83627HG
0040 - 0043 Timer, Counter No Fixed 0044-005F System Resources No Fixed 0060-0060 System Resources No Fixed 0061 - 0061 System Speaker No Fixed 0062 – 006F System Resources No Fixed 0070 - 007F RTC and CMOS Registers No Fixed 0080 BIOS Postcode No Fixed 0081 - 008F DMA Page Register No Fixed
No Fixed
omment
is in system
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I/O Address Used for Availa
ble
0090 – 009F System Resources No Fixed 00A0 - 00BF Interrupt Controller 2 No Fixed 00C0 - 00DF DMA Controller 2 No Fixed 00E0 - 00EF System Resources No Fixed 00F0 - 00FF Math Coprocessor No Fixed 0170 – 0177 0376 01F0 - 01F7 03F6 0290-0295 ADT7476 HWM No SMBus driven 03B0 - 03DF VGA No Fixed 03F8 – 03FF Serial port 1 No Available if
0400 - 041F SMBus No Fixed 04D0 - 04D1 PIC Extension No Fixed 0500 – 053F GPIO No Fixed 0A20 – 0A2F SIO Hardware Monitor No Fixed if SIO is in
0A05 – 0A06 ADT7476
0A80 – 0A81 CPLD No CPLD use 0A00h to
0D00 - FFFF PCI Bus No Fixed C000 – C007 VGA No Fixed C400 – C41F Standard PCI to USB No Dynamic C480 – C49F USB Host Controller 2832 No Dynamic C800 – C81F USB Host Controller 2831 No Dynamic C880 – C89F USB Host Controller 2830 No Dynamic D000 - DFFF PCIe Root Port 1 No Dynamic (BIOS
E000 - EFFF PCIe Root Port 2 No Dynamic (BIOS
0CF8 - 0CFF PCI Configuration No Fixed FF90 - FFAF SATA Controller No Dynamic (BIOS
Fixed Disk No Available if IDE
Fixed Disk No Available if IDE
No The HW monitor uses
Hardware Monitor
omment
port 1 is disabled
port 1 is disabled
WB83627HG is disabled.
system
the SMBus to access registers (address is 0x5C)
0A1Fh
default value)
default value)
default address)
7.4 Peripheral Component Interconnect (PCI) Devices
All devices follow the Peripheral Component Interconnect 2.3 (PCI 2.3) and the PCI Express Base 1.0a specifications. The BIOS and OS control memory and I/O resources. Please see the PCI 2.3 specification for details.
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C
C
J
J
Table 24: PCI Device IRQs
PCI Device
Host Bridge / Memory Controller Graphics / Video Controller UHCI controller INTA Integrated in
HD Audio Controller INTA Integrated in
PCI Express Port 0 INTA Integrated in
PCI Express Port 2 INTB Integrated in
PCI Express Port 3 INTC Integrated in
PCI Express Port 4 INTD Integrated in
PCI Express Port 5 INTA Integrated in
UHCI USB Controller 1 B Integrated in
UHCI USB Controller 2 C Integrated in
UHCI USB Controller 3 D Integrated in
EHCI USB Controller 0 INTA
CI IRQInterfac
e
None Integrated in
INTA Integrated in
omment
processor
processor
chipset
chipset
chipset
chipset
chipset
chipset
chipset
chipset
chipset
chipset
UHCI controller 0 INTA
ISA Bridge / LPC Controller IDE Controller None Integrated in
Network Controller INTA PCI
SATA INTA PCI
None Integrated in
chipset
chipset
Integrated in
Express
chipset. Integrated in
Express
chipset.
Table 25: External I2C Bus #1
I2C Address
A0h JIDA-
A2h JIDA-
Used For Availab
le
No EEPROM for CMOS
EEPROM
No EEPROM for CMOS
EEPROM
omment
Data
Data
IDA Bus
Nr.
1
1
Table 26: JILI I2C Bus
I2C Address Used For AvailableComment
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IDA Bus Nr.
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A0h JILI-EEPROM No EEPROM for
JILI Data
7.5 System Management Bus (SMBus)
Table 27: SMBus Address Assignments
4
Address Device
12h SMART_CHARGER Not to be used with any SMBus device
14h SMART_SELECTOR Not to be used with any SMBus device
16h SMART_BATTERY Not to be used with any SMBus device
5Ch ON Semiconductor ADT7476
HWM
A0h SPD EEPROM on DDR2 Do not use under any circumstances 1
A2h SPD EEPROM on DDR2 Do not use under any circumstances 1
D2h Clock Gen
CK610/ICS9DB403
otes JIDA Bus
except a charger
except a selector
except a battery
Do not use under any circumstances 1
Do not use under any circumstances 1
7.6 K-Station / JIDA32 Resources
Nr.
1
1
1
Table 28: I2C
Bus Function
I2C 0 Internal / JIDA I2C #1
I2C 1 SMBus
I2C 2 Internal / JIDA I2C #2 (for
slow devices)
I2C 3 JILI I2C
Table 29: Storage
Device Function
EEPROM 0 JIDA EEPROM Area 1 with 32 Bytes (free
to use)
Table 30: GPIO
Port Function
IO-Port 0 GPIO Port, Bit 0-3: Input, Bit 4-7:
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Output
Table 31: Hardware Monitor
Sensor Function
Temp 0 CPU Core 1 Temperature. TEMP 0
Internal temperature TEMP2 CPU Core 2 Temperature TEMP1
Temp 1 Module temperature (internal IC
temperature of onboard ADT7476 HWM)
FAN 0 Module CPU fan sensor (measured with
ADT7476 HWM)
Voltage 0 ON Semiconductor ADT7476 Voltage Sensor
0: VCC RTC
Voltage 1 ON Semiconductor ADT7476 Voltage Sensor
1: VCore
Voltage 2 ON Semiconductor ADT7476 Voltage Sensor
2: Vcc +5Vin (Voltage 3) +VBat (Voltage 4)
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8 BIOS Operation
8.1 Determining the BIOS Version
The microETXexpress®-PV COM has AMIBIOS®8 installed on the onboard 16Mbit SPI. To determine the AMI® BIOS version, press the Pause key on your keyboard immediately, as soon as you see the following text display in the upper left corner of your screen
» AMIBIOS © 1985-2009, American Megatrends, Inc. » BIOS Date: 06/16/08 10:52:49 Ver: 08.00.16 » Kontron® BIOS Version < UPV1R016 > (This revision number “R016” will
change as the BIOS is improved)
» © Copyright 2002-201008 Kontron
8.2 Setup Guide
The AMIBIOS Setup Utility changes system behavior by modifying the BIOS configuration. The setup program uses a number of menus to make changes and turn features on or off.
NOTE: Selecting incorrect values may cause system boot failure. Load setup
default values to recover by pressing <F9>.
8.2.1 Start AMIBIOS®8 Setup Utility
To start the AMIBIOS® setup utility, press <DEL> when the following string appears during boot-up:
Press <DEL> to enter Setup
The Info menu then appears.
The Setup screen has several sections:
Setup Screen Location
Menu Bar Top Lists and selects all top
Legend Bar Right side bottom Lists setup navigation
Item Specific Help Window Right side top Help for selected item. Menu Window Left center Selection fields for
unction
level menus.
keys.
current menu.
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Menu Bar
The menu bar at the top of the window lists different menus. Use the arrow key or the arrow key to make a selection.
Legend Bar
Use the keys listed on the bottom of the legend bar to make your selections or exit the current menu. The table below describes the legend keys and their alternates.
Key
<F1> or <Alt-H> General Help window. <Esc> Exit menu.
or Arrow key or Arrow key
<Home> or <End> Move cursor to top or bottom of current
<PgUp> or <PgDn> Move cursor to next or previous page. <F9> Load the default configuration values for
<F10> Save and exit. <Enter> Execute command or select submenu. <Alt-R> Refresh screen.
unction
Select a menu.
Select fields in current menu.
window.
this menu.
Selecting an Item
Use the or key to move the cursor to the field you want. Then use the + and – keys to select a value for that field. The Save Value commands in the Exit menu save the values displayed in all the menus.
Displaying Submenus
Use the arrow key or the arrow key to move the cursor to the submenu you want and then press <Enter>. A pointer () marks all submenus.
Item Specific Help Window
The Help window on the right side of each menu displays the Help text for the selected item. It updates as you move the cursor through each field.
General Help Window
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Pressing <F1> or <Alt-F1> on a menu brings up the General Help window that describes the legend keys and their alternates. Press <Esc> to exit the General Help window.
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8.3 BIOS Setup
NOTE: Default settings are in bold
8.3.1 Main Menu
Feature Option
System Time System Date
[hh:mm:ss] <Tab>, <Shift-Tab>, or <Enter>
[mm-dd­yyyy]
escription
selects field <Tab>, <Shift-Tab>, or <Enter> selects field
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System Overview
Kontron microETXexpress-PV User’s Guide
Feature Option
Module Info
8.3.2 Module Info
escription
N/A Select sub-menu.
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Feature Option
Module Info N/A Select sub-menu Board Name N/A Displays the board name
Board Class N/A Displays the class of the board Serial Number Manufacturin g Date Hardware Revision Boot Counter N/A Displays complete boot count of
Processor type Size N/A Displays amount of memory
Module Component Steppings
N/A Displays serial number of the
N/A Date of production of the board
N/A Displays revision programmed of
N/A Displays information about the
N/A Select sub-menu
escription
programmed
board
the board
the board
CPU (Brand name, Speed and count
available to the OS
Module Component Stepping
Feature OptionDescription
FPGA Revision Board Id N/A Displays id of the board (HW strap) PCB N/A Displays PCB version of the board
N/A Displays the FPGA version
programmed on the board
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Revision (HW strap) BOM Revision
N/A Displays BOM version of the board
(HW strap)
8.3.3 Advanced Settings Menu
Kontron microETXexpress-PV User’s Guide
Feature
CPU Configuration IDE Configuration N/A Select sub-menu SuperIO Configuration
ACPI Configuration N/A Select sub-menu ASF Configuration N/A Select sub-menu Hardware Health Configuration MARS Interface Configuration Watchdog Configuration GPIO Configuration N/A Select sub-menu MPS Configuration N/A Select sub-menu PCI Express Configuration Remote Access N/A Select sub-menu
pti
on
/A
N/A Select sub-menu (only if SIO
N/A Select sub-menu
N/A Select sub-menu
N/A Select sub-menu
N/A Select sub-menu
escription
Select sub-menu
is present or enabled on carrier board).
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Configuration Trusted Computing N/A Select sub-menu USB Configuration N/A Select sub-menu AHCI Configuration N/A Select sub-menu
CPU Settings Configuration
Kontron microETXexpress-PV User’s Guide
Feature Option
Manufacturer N/A Displays information about the CPU
Frequency N/A Displays CPU Speed FSB Speed N/A Displays Front Side Bus speed
Cache L1 N/A Displays level 1 amount of cache
Cache L2 N/A Displays level 2 amount of cache
Ratio Actual Value Max CPUID Value Limit
Execute­Disable Bit Capability
N/A Displays CPU ratio for the CPU Speed
Disable
Enabled
Enabled
Disabled
escription
manufacturer
information
memory
memory
Enable this for legacy operating systems that do not support CPUID function > When enabled, allows the processor to prevent application code access to certain memory areas (requires OS that supports this) When disabled, there are no restrictions to application code
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d
d
d
d
Feature Option
Hyper Threading Technology
Intel® SpeedStep™tech
Intel® C-State tech
Enhanced C­States
ACPI T State Enabled
On-Demand TCC Enabled
Duty Cycle in % 12.5
Enable
Disabled
Enable
Disabled
Enable
Disabled
Enable
Disabled
Disabled
Disabled
25
37.5
50
62.5 75
87.5
escription
memory area access by the processor Enables or disables Intel® Hyper Threading Technology, which allows one additional logical CPU for each physical CPU When enabled, cpu speed can be controlled by OS (only supported on the N450 CPU) Intel CPU state for power saving (Dx10 CPUs support C0-C1 only; the N450 CPU supports C0-C4) Deeper C-state for CPU (only enabled when option “Intel® C­State tech” is enabled)
Enables or disables the ACPI T State
power management features (Not used
with the microETXexpress-PV)
Enables throttling at all time. This
is for testing purpose only.
WARNING: Never leave this option
enabled. The board lifetime will be
seriously impacted.
Percentage of the throttling forced for the CPU.
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IDE Configuration
Kontron microETXexpress-PV User’s Guide
Feature Option
ATA/IDE Configuration
Legacy IDE Channels
Configure SATA as
Primary IDE Master
Primary IDE Slave
Secondary
IDE Master
Disabled
Compatible
Enhanced
SATA only
SATA primary/PATA secondary
PATA only
IDE
AHCI
Submenu
Not Detected
Submenu
Not Detected
Submenu
Not Detected
escription
With AHCI, advanced SATA features such as Native Command Queuing and hot plug are supported Compatible enables legacy disk usage (Windows XP with no AHCI drivers) Configures IDE channel use
Menu appears only if ATA/IDE configuration is set to “Enhanced”. While entering setup, BIOS auto detects the presence of IDE devices. This displays the status of auto-detection of IDE devices While entering setup, BIOS auto detects the presence of IDE devices. This displays the status of auto-detection of IDE devices While entering setup, BIOS auto detects the presence of IDE devices. This displays
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d
Feature Option
Secondary
IDE Slave
Third IDE Master
Third IDE Slave
Fourth IDE Master
Fourth IDE Slave
Hard Disk Write Protect
IDE Detect Time Out (Sec) 0 5
ATA(PI) 80Pin Cable Detection
Submenu
Not Detected
Submenu
Not Detected
Submenu
Not Detected
Submenu
Not Detected
Submenu
Not Detected
Disable
Enabled
10 15 20 25 30
35 Host & Device
Host Device
escription
the status of auto-detection of IDE devices While entering setup, BIOS auto detects the presence of IDE devices. This displays the status of auto-detection of IDE devices While entering setup, BIOS auto detects the presence of IDE devices. This displays the status of auto-detection of IDE devices While entering setup, BIOS auto detects the presence of IDE devices. This displays the status of auto-detection of IDE devices While entering setup, BIOS auto detects the presence of IDE devices. This displays the status of auto-detection of IDE devices While entering setup, BIOS auto detects the presence of IDE devices. This displays the status of auto-detection of IDE devices Disable/Enable device write protection. (This is effective only when the device is accessed through the BIOS) Selects the maximum time- out value for detecting ATA/ATAPI device(s)
Mechanism selection of the 80-pin ATA cable detection
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Primary IDE Master
Primary IDE Slave
Feature Option
Device Depends on
disk presence
escription
Displays the device type (hard disk).
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Feature Option
Vendor N/A Displays the vendor string of
Size N/A Displays the size of the disk. LBA Mode N/A Displays if LBA mode is
Block Mode N/A Displays block mode size PIO Mode N/A Displays PIO mode speed Async DMA N/A Displays Async mode speed Ultra DMA N/A Displays Ultra DMA mode S.M.A.R.T. N/A Displays if SMART is supported Type Not
Installed
Auto
CD/DVD ARMD
32Bit Data Transfer
Enable
Disabled
escription
the disk.
supported by the disk.
Selects the type of IDE devices connected to the system
Enables or disables the 32-bit Data Transfer features
Super I/O Configuration
Feature Option
Serial Port1 Address
Serial Port2 Address
Disabled
3F8/IRQ4
3E8/IRQ4 2E8/IRQ3 Disabled
2F8/IRQ3
escription
Selects the serial port 1 base address and interrupt
Selects the serial port 2 base address and interrupt
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Feature Option
3E8/IRQ4
2E8/IRQ3
Serial Port2 Mode
IR I/O Pin Select
IR Duplex Mode Full
SPP
IrDA
ASK IR
SINB/SOUTB
IRRX/IRTX
Duplex
Half
Duplex
escription
Serial Port2 mode selection (depends on the carrier board support. Normally only SPP is present on the carrier) Allows BIOS to select receive or transmit pin for Serial Port2 (IR Mode). This only shows if “Serial Port2 Mode” is set to “IrDA” or “ASK IR”. Allows BIOS to select full or half duplex for Serial Port2 (IR Mode) This only shows if “Serial Port2 Mode” is set to “IrDA” or “ASK IR”.
ACPI Configuration
Feature
General ACPI Configuration
Advanced ACPI
ption
Submenu Allows configuration of
Submenu Allows configuration of
escription
the general ACPI features
the advanced ACPI features
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Configuration
Chipset ACPI Configuration
Submenu Allows configuration of
the ACPI features supported by the chipset
General ACPI Configuration
Feature Option
Suspend Mode S1
(POS) S3 (STR)
Auto
Repost Video on S3 Resume
o
Yes
escription
Allows for adjustment of the suspend mode settings managed under ACPI power management features
Determines whether to invoke VGA BIOS post on S3/STR resume
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Advanced ACPI Configuration
Feature Option
ACPI Version Features
ACPI APIC Support
AMI OEMB Table Disabled
Headless Mode
ACPI 1.0 ACPI 2.0
ACPI 3.0
Disabled
Enabled
Enabled
Disable
Enabled
escription
Version 1.0 only supports RSDP pointers to 32-bit Fixed System Description Tables Version 2.0 enables RSDP pointers to 64-bit Fixed System Description Tables Version 3.0 improves processor, PCI Express, and SATA support Include ACPI APIC table pointer to RSDT pointer list. APIC supports more IRQs and faster interrupt handling Includes the AMI OEMB table pointer. The OEMB table is used to fill in POST data in AML code during ACPI OS operations. This option should only be disabled if ACPI 1.0 is used Indicates support for headless operation, which means without keyboard, mouse and/or monitor. The
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OS must support the headless mode
Chipset ACPI Configuration
Feature
APIC ACPI SCI IRQ Enabled
USB Device Wakeup From S3/S4
High Performance Event Timer
HPET Memory Address
ption
Disabled
Enabled Disabled
nabled
Disabled
ED00000h
FED01000h FED02000h FED03000h
escription
IRQ9 if APIC is not used for SCI IRQ20 is only available for SCI if APIC is enabled Enable/Disable USB Device Wakeup From S3/S4 Enables or Disables the High Performance Event Timer feature Allows for adjustment of the HPET memory address
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ASF Configuration
Kontron microETXexpress-PV User’s Guide
Feature
ASF Support
ption
nable
Disabled
escription
Enable or disable support for Alert Standard Format
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Hardware Health Configuration
Kontron microETXexpress-PV User’s Guide
Feature Option Description
H/W Health Function
PWM 1 Mode Setting
PWM 1 Ramp Rate
Min PWM 1 Duty Cycle
Enabled
Disabled
Auto Fan Mode
Fan Always On Full
Fan Disabled Mode Fan Manually Mode
37.5 secs
18.8 secs
12.5 secs
7.5 secs
4.7 secs
3.1 secs
1.6 secs
0.8 secs
Range = 0 ­255
Default = 130
Enables Hardware Health Monitoring Device on module
Allows for adjusting fan controls
Allows for adjusting the PWM Ramp Rate feature (Does not appear if “PWM1 mode Setting” is set to “Fan Disable Mode”)
Allows for adjusting the Minimum PWM Duty Cycle Available only if “PWM1 Mode Setting” is set to “Auto Fan Mode”. (See
http://www.onsemi.com/pub_link/Collateral/ADT7476­D.PDF for more details)
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Feature Option Description
Absolute Temperature 1 Set Low Temperature 1 Limit
Temperature 1 Range
PWM 1 Control Duty Cycle
Range = 0 – 127
Default = 075
Range = 0 – 127
Default = 065
2 °C
2.5 °C
3.33 °C 4 °C 5 °C
6.67 °C 8°C
10 °C
13.33 °C 16 °C 20 °C
26.67 °C 32 °C 40 °C
53.33 °C 80 ° Range = 0 – 255
Default = 200
Allows the absolute temperature to be set
Allows the low temperature limit to be set
Allows the temperature range of the slope to be set
Manually set the PWM of the fan to the selected value
Kontron microETXexpress-PV User’s Guide
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MARS Configuration
Kontron microETXexpress-PV User’s Guide
Feature Option
MARS
System Type N/A Power Source N/A Battery 1 Submenu Battery 2 Submenu
Disabled
Auto SMB Charger SMB Manager
escription
If carrier board support and the MARS system are present, set this option to “Auto”. This option detects and enables the Mobile Application platform for Rechargeable Systems
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Battery 1 (if present)
Kontron microETXexpress-PV User’s Guide
Feature Option
Battery 1 N/A Indicates battery present State N/A Displays the state of the
Manufacturer N/A Displays manufacturer name Serial Number N/A Displays the battery serial
Device Name N/A Displays manufacturer’s
Chemistry N/A Displays chemistry
Current Charge N/A Shows current charge
Cycle Count N/A Shows current charge cycle
Date Of Manufacture Charge time N/A Displays estimated time for
Discharge Time N/A Displays how much time
Temperature N/A Displays the internal
Device Capacity Last Full N/A Displays last fully charged
N/A Displays build date of the
N/A Displays device initial
escription
battery (charging, discharged)
number
name for the battery
information
capacity
of the battery
battery
charging to be complete
before the battery becomes empty
temperature of the battery
capacity
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Feature Option
Capacity capacity
Battery 2 (if present)
Kontron microETXexpress-PV User’s Guide
escription
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Watchdog Configuration
Kontron microETXexpress-PV User’s Guide
Feature Option
FPGA Watchdog Timer
FPGA Watchdog Timer after POST
Watchdog Duration in Sec
Enabled Disabled
Enabled Disabled
Range = 1 ­4194
escription
When enabled, the watchdog is set with a value of 10 minutes during POST To enable this option, you must have a driver that disables or triggers the watchdog to prevent NMI generation and a reset to occur Duration of the timeout prior to reset
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GPIO Configuration
Kontron microETXexpress-PV User’s Guide
Feature
Enable GPIO Control
GPI 0 Input Level High
GPI 1 Input Level High
GPI 2 Input Level High
GPI 3 Input Level High
Enable Interrupt on #A Interrupt on GPI
Invert GPI Signal #A
Enable Interrupt on #B Interrupt on GPI
ption
Enabled
Disabled
Low
Low
Low
Low Enabled
Disabled
PI 0
GPI 1 GPI 2 GPI 3
OW
High
Enabled
Disabled
PI 0
GPI 1 GPI 2
escription
Enables or disables the GPIO monitor and settings (NOTE: this does not disable control of the GPIO in JIDA32) Displays the current status of GPI 0 Displays the current status of GPI 1 Displays the current status of GPI 2 Displays the current status of GPI 3 Enables or disables the interrupt on channel A Selects the GPI that will generate interrupt PIRQF or IRQ21 in APIC mode
Allows selection of GPI state that will generate an interrupt.
Enables or disables the interrupt on channel B Selects the GPI that will generate interrupt PIRQF or IRQ21 in APIC mode.
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Feature
Invert GPI Signal #B
MPS Configuration
ption
GPI 3
OW
High
Kontron microETXexpress-PV User’s Guide
escription
Allows selection of GPI state that will generate an interrupt.
Feature
MPS revision
ption
.4
1.1
escription
Configures the multiprocessor specification (MPS) revision level. (Some operating systems will require revision 1.1 for compatibility reasons.)
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PCI Express Configuration
Kontron microETXexpress-PV User’s Guide
Feature Option
Relaxed Ordering
Maximum Payload Size
Extended Tag Field
No Snoop
Maximum Read Request Size
Auto Enabled
Disabled
Auto
128 bytes 256 bytes 512 bytes 1024 bytes 2048 bytes 4096 bytes
Auto
Enabled Disabled
Auto
Enabled Disabled
Auto
128 bytes
escription
Applicable and set with AtomicOp Requests, where it affects the ordering of both the requests and their associated completions Sets maximum TLP payload size for the function As a receiver, the function must handle TLPs as large as the set value. As a transmitter, the function must not generate TLPs exceeding the set value. Enables function to use an 8-bit tag field as a requester If the bit is clear, the function is restricted to a 5-bit tag field. Applicable and set with AtomicOp Requests, but atomicity must be guaranteed regardless of the No Snoop attribute value Sets the maximum Read Request size for the
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Feature Option
256 bytes 512 bytes 1024 bytes 2048 bytes 4096 bytes
Active State Power Management Maximum Read Request Size
Active State Power­Management Extended Synch
PCI express mode of Port 0-3
Disabled Enabled
Auto
Enabled Disabled Enabled
Disabled
Auto
Disabled Enabled
Port 0 (x1)
P0(X2), P2­3(X1) P0(X2), P2(X2) Port 0 (X4)
escription
function as a requester The function must not generate Read Requests with size exceeding the set value. Enables or disables PCI Express L0 and L1 link power states Configures Maximum Read Request Size
Enables or disables PCI Express L0 and L1 link power states If enabled, forces the transmission of additional ordered sets when exiting the L0s state and when in the Recovery state This mode provides external devices (e.g., logic analyzers) monitoring the link time to achieve bit and symbol lock before the link enters the L0 state and resumes communication Allows configuration of PCIexpress ports 0 to 3 to different configurations.
WARNING: Settings other than
Port 0-3 (X1) cause an additional reset during the board power up sequence.
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Remote Access Configuration
Kontron microETXexpress-PV User’s Guide
Feature
Remote Access
Serial port number Base Address, IRQ N/A Displays the hardware
Serial Port Mode
Flow Control
Redirection After BIOS POST
Terminal Type
VT-UTF8 Combo Key Support
Sredir Memory
ption
isable
Enabled
OM1
COM2
15200 8,n,
1
57600 8,n,1 38400 8,n,1 19200 8,n,1 09600 8,n,1
one
Hardware Software Disabled Boot loader
Always
ANSI
VT100 VT-UTF8
nable
o Delay
escription
Selects Remote Access type Allows the adjustment of serial port numbering
address of the COM port. Configures serial port speed
Configures flow control for console redirection
Selects how the serial redirection done by the BIOS will operate after the POST Allows setting the terminal type
Adds escape sequences for F1 to F12 and most other control keys on a keyboard
Allows adding delay
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Feature
Display Delay Delay 1 Sec
Trusted Computing
ption
Delay 2 Sec Delay 4 Sec
Kontron microETXexpress-PV User’s Guide
escription
during POST for display of memory information
Feature
TCG/TPM Support
Execute TPM Command Clearing the TPM TPM Enable/Disable Status TPM Owner Status
ption
ES
on’t change
ress Enter nabl
nOwne
escription
Enables or disables TPS TCG (TPM 1.1/1.2) support in BIOS (Required for drivers or other programs to use the TPM chip) Sets Execute TPM Command Sets Clearing the TPM Enables or disables TPM Status
Sets TPM Owner Status
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USB Configuration
Kontron microETXexpress-PV User’s Guide
Feature Option Description
USB Devices Enabled: 2 Keyboards, 3 Mice Legacy USB Support
Port 64/60 Emulation
USB 2.0 Controller Mode
BIOS EHCI Hand­Off
USB Mass Storage Device Configuration
/A
Disabled
Enabled
Auto
Disabled
Enabled
FullSpeed
HiSpeed
Disabled
Enabled
/A
Display only Identifies what USB devices are enabled
Enables support for legacy USB. AUTO option disables legacy support if no USB devices are connected Must be enabled for complete USB keyboard legacy support where OS is not USB-aware Configures the USB 2.0 controller in HiSpeed (480 Mbps) or FullSpeed (12 Mbps) Workaround for an OS without EHCI hand-off support The EHCI ownership change should be claimed by the EHCI driver Submenu -- allows the USB Mass Storage device to be configured
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USB Mass Storage Device Configuration
Feature
USB Mass Storage Reset Delay
Device #1
Emulation Type
ption
0 Sec
/A
Auto
Floppy Forced FDD Hard Disk CD-ROM
escription
Number of seconds POST waits for the USB mass storage device after the Start Unit command Display only Displays the 1st USB mass storage device description If Auto, USB devices less than 530MB are emulated as Floppy and remaining as hard drive Forced FDD option can be used to force an HDD formatted drive to boot as FDD (eg. ZIP drive)
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AHCI Configuration
Kontron microETXexpress-PV User’s Guide
Feature
ACHI Port0 ACHI Port1 ACHI Port2
ption
/A /A /A
escription
Selects sub-menu Selects sub-menu Selects sub-menu
AHCI Port2
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N
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Feature Option
Device Vendor Size SATA Speed
NCQ SATA Port2
S.M.A.R.T.
/A /A /A /A
/A
Auto
Not Installed
Enable
Disabled
escription
Shows device type. Shows HDD name and brand Shows HDD size Shows SATA Speed supported (1.5 or 3Gbps) Shows if device support NCQ With "Not Installed" the controller disables the device. Enables the BIOS to read the status of the disk prior to boot and display the information during POST
8.3.4 PCIPnP Settings
Feature Option
Clear NVRAM
o
Yes
escription
BIOS stores information about PCI devices scanned and boot devices in NVRAM. Its content may no longer be valid and this may result in unexpected behaviors (this sometimes happens when there are many changes with devices connected to the system).
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