JVC HR-XVC27UA, HR-XVC27UM, HR-XVC29UJ Schematics

SCHEMATIC DIAGRAMS
HR-XVC27UA,HR-XVC27UM,
HR-XVC29UJ
CD-ROM No.SML200409
(UM, UJ model)
(UA model)
HR-XVC27UA, HR-XVC27UM, HR-XVC29UJ [D3PV0]
For disassembling and assembling of MECHANISM ASSEMBLY, refer to the SERVICE MANUAL No.86700 (MECHANISM ASSEMBLY). Regarding service information other than these sections, refer to the service manual No. YD008 (HR-XVC27US). Also, be sure to note important safety precautions provided in the service manual.
COPYRIGHT © 2004 Victor Company of Japan, Limited.
No.YD023SCH
2004/8
CHARTS AND DIAGRAMS

MAIN(VIDEO/N.AUDIO) SCHEMATIC DIAGRAM

5
LP_SHORT[H]
SP_SHORT[H]
VIDEO_ENV
D.FF
A.MUTE[H]
I2C_DATA_A/V
I2C_CLK_A/V
TO SYSCON SHEET 2
C63
C64
0.01
TO FMA/DEMOD
Fsc
GND
NA_REC
NA_PB
4
TO SYSCON
SHEET 2
SW12V
SW5V
TO FMA/DEMOD
FMA_CH1
FMA_COM
FMA_CH2
TO DRUM
GND
CN1
B10
D1
L10
3
TO SYSCON
SHEET 2
2
TO SYSCON
SHEET 2
CTL[+]
CTL[-]
CN2001
CN2002
N.REC[H]
N.REC_ST[H]
C2051
T2051
C2055 10
C2053
R2054
C2054
Q2051
R2056
12k
R2055
R2053
10k
330p
C2052
0.01
R21
2.2k
2.2k
R22
L2001
10
µ
R2057
R2059
47k
Q2052
47k
Q2054
Q8
Q9
Q10
R2058
R2060
Q7
Q2053
18k
18k
Q2055
Q2003
Q2002
C61
C78
0.1
C60
Q2001
R2018
4.7k
R2019
4.7k
C2004C2003
C57
C58
C59
R2021
33k
C2005
4.7
R2014
390k
R2015
270
C2006
C2007
0.0068
22
C2008
C2010
R2017
C2011
22k
C2012
C2009 R2016
0.001 33k
C55C56
0.1
TP111
R2022
10k
D2001
R37 10k
C62
R2013
12k
4.7
680p
4.7
4.7
IC1
R2024
10k
R2007
12k
12k
R2010
R2023 10k
TP106
1
C2002
C2001
C49
4.7
X1
4.7
R1
6.2k
C4 10
C1
150p
R2
C5
0.1
1.5k
C48
C47
0.022
0.47
R11
4.7k
L1
C6
0.1 0.1
C2
R3
8.2k
C45
C46
0.033
C44
X2
C7
C11 1
C41
C43
3.3
2.2
R12 1k
C8 1
C9
2.2
C12
1
C38
C36
C39
1
C37 4p
µ
L7
12
C40
C35
0.01
C17
0.1
C15
0.1
D5
C14 C10 1
C13 1
C34
0.1
0.01
C33
10
C19
R6
0.1
B1
R38
C26
10
C24
0.1
C22
0.1
Q2
R7
L6
10
µ
L5
C31 47
C30
0.1
C77
0.01
C27
C25
3.3
C20
0.1
L3
2Fsc
C.SYNC/V.REF
V.PULSE
S_DET
SB_GAIN
V_TO_OSD
GND
F_V
L_1_V
TU_VIDEO
DVD_V_IN
TO SYSCON SHEET 2
TO TERMINAL SHEET 4
TO TUNER TO TERMINAL SHEET 4
1
UJ
GND
p10661001a_rev1
SHEET 1
A
BCD EFG
2-1 2-2

MAIN(SYSCON) SCHEMATIC DIAGRAM

TO
FMA/DEMOD
A.ENV/ND[L]
A.FF
A.MUTE[H]
H.REC_ST[H]
I2C_DATA_A/V
LED
I2C_CLK_A/V
JUST_CLK/SW2
5
VIDEO/N.AUDIO
4
3
SHEET 1
CAPSTAN MDA
C.SYNC/V.REF
A.MUTE[H]
N.REC_ST[H]
V.PULSE
S_DET
CTL[+]
CTL[-]
SB_GAIN
TO
SP_SHORT[H]
LP_SHORT[H]
DVD[H]
V_TO_OSD
VIDEO_ENV
N.REC[H]
SW12V
CN3001
TO
ROTARY ENCODER
JS3001
D.FF
2Fsc
SW5V
I2C_DATA_A/V
I2C_CLK_A/V
0.047
R4017
R4004
C3033
1k
R4001
4.7k
1k
560
R4009
GND
C3071 33
C3056
R3253
R3252
C4001
C4002
C4031
µ
1
L4001
!
CP3002
CP4002
!
R3206 R3207
R3205 180
TO
D3001
Q3001 Q3002
R3217
1Ok
C3046
18k
C3045
C3008
0.01
R3215R3216
R3214
10k
10k10k
R3208R3210
R3211 R3209
120120
18k 18k
PC3001PC3002
0.01
C4005
180p
TP4001
Q4001
C4010
0.022
R212
B202
470
R211 100
Q202
L202
µ
10
C209
47
L203
C213 10p
R207
R3240
R3242
C3047
C3048
R4007
1K
C4003
L201
C201
15
22p
C210
0.01
C203
1000p
300
R205
R210
0
Q201
B201
0.01
0.01
C4017C4018
Q4002Q4003
C4004 22
R4005
5.6k
R201
µ
470
R202
C202
4.7 10k
R203
L204
C205
4.7 C207
4.7
680p
L205
C206
C211
C208
B3003
C4015 220p
R4003
560
C4006 47
1
C4008
C4009
10K
D201
C204
680p
C212
0.01
R204
R206
470K
470K
R4013
0.1
C4011
2.2k
R4012
4.7k
R3033
0.22
R4015
D4002
4.7k
R3034
C4012
22k
R4010
C4016
4.7k
R36
IC3001
100p
C4014
4.7k
R3101
2.2k
R3256
1k
R3099
1k
R3098
1k
R3043
0
R3096
1k
R3045
1k
R3046
1k
R3047
330
R3048
330
R3049
330
R3050
0
R3089
1k1k1k
R3051
R3052
R3053
1k
R3054
1.8k
R3085
B3004
TL3908
C3050
TL3906
R3077
R3069
R3065
R3064
R3063
R3062
R3061
R3058
IC3002
TL3904
R3080
TL3905
R3229
1M
TL3903
100
X3002
X3001
0.1
1k
1k
270
1k
1k
330
330
4.7K
C3037
C3025
C3041
C3024
3.3k
R3236
3.3k
R3223
R3246
3.3k
R3235
3.3k
R3224
10k
C3055
C3036
47k
R3234
33k
R3244
R3248
4.7k
C3053
C3054C3052
0.002210
1k
R3082
12p
B3001
0.047
B3903
D3008
Q3901
Q3902
B3901
47
C3030
B3902
R3074
C3031
10k
TL3901
TL3902
CN3901
18p
30p
18p
12p
3.3k
R3243
R3202
R3201
COMPU_IO
V_FROM_OSD
DVD[H]
A.MUTE2[L]
INT/PRG
S1OUT
SW12V
SW5V
SW3.3V
INT/PROG
AL5.8V
GND
P/EJ
39k
10k
CN3102
TO VIDEO/N.AUDIO SHEET 1
TO TERMINAL SHEET 4
R3225
2
0.047
C3022
C3021
D3005
IC3003
D3004
R3212
470k
D3002
26V
AL12V
P.CTL[H]
GND
TO SW.REG
SHEET 3
SW12V
SW3.3V
AL5.8V
SW5V
48V
BT2
10k
S3001
C3011
R3213 330k
R3222 10k
R3220
100k
D3003
R3218
Q3005
C3012
47
C3013
4.7k
R3219
4.7k
Q3004
C3016
C3014
47
C3072
0.047
1
Q3007
K_B.DATA_TO_SYS
K_B.DATA_FR_SYS
K_B.CLK
RESET_IN
REQ[L]
AL5V
LED2
ILLUMI_LED
CONV.CTL[H]
JUST_CLK/SW2
I2C_CLK
I2C_DATA
TU_V_MUTE[H]
BT2
AFC/BS_ANT
TO DISPLAY CN7003
TO SUB CPU
TO TUNER
p10660001a_rev0
SHEET 2
A
BCDEFG
2-3 2-4
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