This guide provides an overview and description of the Physical Interface Cards (PICs)
supported by the Juniper Networks M20 Internet router. The PICs are described
alphabetically. Table 1 on page 3 lists the PICs supported by the M20 Internet router
by PIC family.
PICs provide the physical connection to various network media types. The PICs are
mounted on Flexible PIC Concentrators (FPCs), which are inserted into a slot in a
router. A PIC typically occupies a single slot on an FPC. PICs receive incoming packets
from the network and transmit outgoing packets to the network. During this process,
each PIC performs framing and high-speed signaling for its media type. Before
transmitting outgoing data packets, the PICs encapsulate the packets received from
the FPCs. Each PIC is equipped with a media-specific ASIC that performs control
functions tailored to the PIC's media type. For complete information about installing
PICs and transceivers, see the PIC and Transceiver Installation Instructions located at
http://www.juniper.net/techpubs/.
Blank PICs resemble other PICs, but do not provide any physical connection or
activity. When a slot is not occupied by a PIC, you must insert a blank PIC to fill the
empty slot and ensure proper cooling of the system.
The M20 router supports the Type 1 FPCs listed in “FPCs Supported” on page 5.
Table 3 on page 6 provides a PIC/FPC compatibility matrix for the current PICs
supported by the M20 router.
For a complete list of end-of-life FPCs and end-of-life Enhanced FPCs for M-series
and T-series routing platforms, see the M-series and T-series Routing PlatformsEnd-of-Life FPC Guide located at http://www.juniper.net/techpubs/.
2■
Table 1: PICs Supported in the M20 Internet Router
ATM2 IQ
Channelized
Channelized IQ
First JUNOS
SupportPortsPIC Family and Type
PIC
Slots RequiredFPC Support
Page
131 slotType 16.14ATM2 DS3 IQ
151 slotType 16.14ATM2 E3 IQ
171 slotType 15.52ATM2 OC3/STM1 IQ
201 slotType 15.51ATM2 OC12/STM4 IQ
281 slotType 14.01Channelized OC12
221 slotType 15.64Channelized DS3 IQ
241 slotType 15.610Channelized E1 IQ
261 slotType 17.11Channelized OC3 IQ
301 slotType 15.61Channelized OC12 IQ
321 slotType 15.71Channelized STM1 IQ
341 slotType 17.410Channelized T1 IQ
DS3, E1, and T1
E3 IQ
Ethernet
Ethernet IQ
SFP
Ethernet IQ2
361 slotType 13.14DS3
381 slotType 14.14E1
661 slotType 14.14T1
401 slotType 16.14E3 IQ
461 slotType 14.14Fast Ethernet
461 slotType 15.28Fast Ethernet
461 slotType 15.112Fast Ethernet
491 slotType 16.31Gigabit Ethernet with SFP
511 slotType 16.01Gigabit Ethernet IQ with
■3
M20 Internet Router PIC Guide
Table 1: PICs Supported in the M20 Internet Router (continued)
SFP
Services
2 Services
Serial
SONET/SDH
OC48c/STM16 with SFP
First JUNOS
SupportPortsPIC Family and Type
PIC
Slots RequiredFPC Support
Page
531 slotType 17.6R34Gigabit Ethernet IQ2 with
81 slotType 16.40Adaptive Services II
101 slotType 17.50Adaptive Services II Layer
441 slotType 15.20ES
561 slotType 15.60Link Services
671 slotType 13.30Tunnel Services
421 slotType 15.62EIA-530
571 slotType 13.14SONET/SDH OC3c/STM1
601 slotType 13.11SONET/SDH OC12c/STM4
63Entire FPC slotType 16.11SONET/SDH
4■
FPCs Supported
FPCs Supported
The M20 router supports the Type 1 FPCs listed in Table 2 on page 5. Inserting a combination of PICs with an aggregate
higher than the maximum throughput per FPC is supported, but constitutes oversubscription of the FPC.
Table 2: FPCs Supported by the M20 Router
FPC Model NumberFPC Name
Maximum Number of
PICs Supported per
FPC
Maximum
Throughput per FPC
First JUNOS
Release
7.23.2 Gbps4M20-FPC1-EPEnhanced Plus FPC1
FPCs Supported■5
M20 Internet Router PIC Guide
PIC/FPC Compatibility
Table 3 on page 6 provides a PIC/FPC compatibility matrix for the current PICs supported by the M20 router. The table lists
the first JUNOS release in which the FPC supports the PIC. For example, JUNOS 7.2 is the first release in which the M20-FPC1-EP
supports the ATM2 OC3/STM1 IQ, 2-port PIC.
Table 3: M20 PIC/FPC Compatibility
M20-FPC1-EPNumber of PortsPIC Type
ATM2 IQ PICs
7.24ATM2 DS3 IQ
7.24ATM2 E3 IQ
7.22ATM2 OC3/STM1 IQ
Channelized PICs
Channelized IQ PICs
T1, DS3, E1, E3 PICs
E3 IQ PIC
7.21ATM2 OC12/STM4 IQ
7.21ChOC12
7.24ChDS3 IQ
7.210ChE1 IQ
7.21ChOC3 IQ
7.21ChOC12 IQ
7.21ChSTM1 IQ
7.210ChT1 IQ
7.24DS3
7.24E1
7.24T1
7.24E3 IQ
6■PIC/FPC Compatibility
Ethernet PICs
7.24Fast Ethernet
7.28Fast Ethernet
7.212Fast Ethernet
Table 3: M20 PIC/FPC Compatibility (continued)
Ethernet IQ PICs
Ethernet IQ2 PICs
Services PICs
PIC/FPC Compatibility
M20-FPC1-EPNumber of PortsPIC Type
7.21Gigabit Ethernet, SFP
7.21Gigabit Ethernet IQ, SFP
7.6R34Gigabit Ethernet IQ2, SFP
7.20Adaptive Services II
Layer 2 Services
SONET/SDH PICs
0Adaptive Services II (AS)
7.5
7.20ES
7.20Link Services
7.20Tunnel Services
7.24OC3c/STM1
7.21OC12c/STM4
7.21OC48c/STM16, SFP
PIC/FPC Compatibility■7
M20 Internet Router PIC Guide
Adaptive Services II PIC
JUNOS 6.4 and laterSoftware release
■
Description
Hardware features
Software features
LEDs
Supports tunnel services. This feature is included with the PIC and does not require an
■
individual license.
Individual licenses must be purchased for additional services.
■
Power requirement: 0.4 A @ 48 V (19 W)
■
Support for up to 2000 service sets
■
Active monitoring on up to 1 million flows
■
Support for MTUs up to 9192 bytes for Gigabit Ethernet and SONET interfaces
■
Depending on your JUNOS release and individual licenses, software features for this PIC can
include the features listed in Table 4 on page 8. For more information about the software
features available for services PICs, see the JUNOS Services Interfaces Configuration Guide.
Status LED, one tricolor:
Off—PIC is offline and it is safe to remove it from the chassis.
■
Green—PIC is operating normally.
■
Amber—PIC is initializing.
■
Red—PIC has an error or failure and no further harm can be done by removing it from
■
the chassis.
Application LED, one bicolor:
Off—Service is not running.
■
Green—Service is running under acceptable load.
■
Amber—Service is overloaded.
■
Table 4: Adaptive Services PICs Software Features
8■Adaptive Services II PIC
Software Feature
Adaptive Services II
PIC
Adaptive Services
II Layer 2 Services
PIC
––GRE Key
––GRE dont-fragment
Table 4: Adaptive Services PICs Software Features (continued)
Adaptive Services II PIC
SYN attacks, ICMP and UDP floods, and ping of
death attacks
addresses
5 and version 8 records
records, based on RFC 3954 (IP v4 templates
only)
–6.4Stateful firewall with packet inspection: detects
–6.4Network Address Translation (NAT) for IP
–6.4Port Address Translation (PAT) for port numbers
–6.4IP Security (IPSec) encryption
–7.0Active flow monitoring exports cflowd version
–8.3Active flow monitoring exports version 9
––Passive flow monitoring
––Passive flow collection
–8.1Flow-tap
––Dynamic flow capture
–8.3Real-time performance monitoring
IP-IP unicast tunneling
■
GRE unicast tunneling—Supports GRE
■
fragmentation
Protocol Independent Multicast (PIM) sparse
■
mode unicast tunneling
Compressed Real-Time Transport Protocol
■
(CRTP)
Multilink Frame Relay (MLFR)
■
Multilink Point-to-Point Protocol (MLPP)
■
7.57.3Link services
7.56.4Tunnel services:
–6.4Virtual tunnel interface for Layer 3 VPNs
––Layer 2 Tunneling Protocol (L2TP)
7.57.3Voice services:
–6.4Encapsulations:
Adaptive Services II PIC■9
M20 Internet Router PIC Guide
Adaptive Services II Layer 2 Services PIC
Description
Hardware features
Software features
LEDs
JUNOS 7.5 and laterSoftware release
■
Supports Layer 2 Service package only. Tunnel services are included with the PIC. Other
■
services require an individual license.
Power requirement: 0.4 A @ 48 V (19 W)
■
Support for up to 2000 service sets
■
Support for MTUs up to 9192 bytes for Gigabit Ethernet and SONET interfaces
■
Depending on your JUNOS release and individual licenses, software features for this PIC can
include the features listed in Table 5 on page 11. For more information about the software
features available for services PICs, see the JUNOS Services Interfaces Configuration Guide.
Status LED, one tricolor:
Off—PIC is offline and it is safe to remove it from the chassis.
■
Green—PIC is operating normally.
■
Amber—PIC is initializing.
■
Red—PIC has an error or failure and no further harm can be done by removing it from
■
the chassis.
Application LED, one bicolor:
Off—Service is not running.
■
Green—Service is running under acceptable load.
■
Amber—Service is overloaded.
■
10■Adaptive Services II Layer 2 Services PIC
Table 5: Adaptive Services PiCs Software Features
Adaptive Services II Layer 2 Services PIC
Software Feature
SYN attacks, ICMP and UDP floods, and ping of
death attacks
addresses
5 and version 8 records
records, based on RFC 3954 (IP v4 templates
only)
Adaptive Services II
PIC
Adaptive Services
II Layer 2 Services
PIC
––GRE Key
––GRE dont-fragment
–6.4Stateful firewall with packet inspection: detects
–6.4Network Address Translation (NAT) for IP
–6.4Port Address Translation (PAT) for port numbers
–6.4IP Security (IPSec) encryption
–7.0Active flow monitoring exports cflowd version
–8.3Active flow monitoring exports version 9
––Passive flow monitoring
––Passive flow collection
IP-IP unicast tunneling
■
GRE unicast tunneling—Supports GRE
■
fragmentation
Protocol Independent Multicast (PIM) sparse
■
mode unicast tunneling
Compressed Real-Time Transport Protocol
■
(CRTP)
–8.1Flow-tap
––Dynamic flow capture
–8.3Real-time performance monitoring
7.57.3Link services
7.56.4Tunnel services:
–6.4Virtual tunnel interface for Layer 3 VPNs
––Layer 2 Tunneling Protocol (L2TP)
7.57.3Voice services:
Adaptive Services II Layer 2 Services PIC■11
M20 Internet Router PIC Guide
Table 5: Adaptive Services PiCs Software Features (continued)
Multilink Frame Relay (MLFR)
■
Multilink Point-to-Point Protocol (MLPP)
■
–6.4Encapsulations:
12■Adaptive Services II Layer 2 Services PIC
ATM2 DS3 IQ PIC
ATM2 DS3 IQ PIC
JUNOS 6.1 and laterSoftware release
■
Description
Hardware features
Software features
Four DS3 ports
■
Power requirement: 0.41 A @ 48 V (20.0 W)
■
Intelligent queuing (IQ) PICs support fine-grained queuing per logical interface.
■
ATM standards compliant
■
16-MB SDRAM memory for ATM segmentation and reassembly (SAR)
■
ATM switch ID
■
Configurable framing options:
■
C-bit with ATM direct mapping
■
C-bit with Physical Layer Convergence Protocol (PLCP) framing (default)
■
M23 ATM direct mapping
■
M23 with PLCP framing
■
Internal and loop timing
■
Per-virtual circuit (VC) and per-virtual path (VP) traffic shaping
■
Unspecified bit rate (UBR) traffic shaping
■
Fine-grained variable bit rate (VBR) traffic shaping
■
Circuit cross-connect (CCC)
■
ATM Inverse Address Resolution Protocol (ARP), which enables routers to automatically
■
learn the IP address of the router on the far end of an ATM permanent virtual circuit
(PVC)
Simple Network Management Protocol (SNMP):
■
Management Information Base (MIB) 2 (RFC 1213)
■
ATM MIB (RFC 1695)
■
SONET MIB
■
AAL5 encapsulations:
■
ATM-VC-MUX
■
ATM-NLPID
■
ATM-Cisco-LLPID
■
ATM-SNAP
■
ATM-CCC-VC-MUX
■
ATM2 DS3 IQ PIC■13
M20 Internet Router PIC Guide
Cables and connectors
LEDs
Alarms, errors, and
events
10 ft (3.05 m) posilock SMB to BNC (provided)
■
Four pairs of Rx and Tx coaxial cables
■
One tricolor per port:
Off—Not enabled
■
Green—Online with no alarms or failures
■
Amber—Online with alarms for remote failures
■
Red—Active with a local alarm; router has detected a failure
■
Alarm indication signal (AIS)
■
Far-end block error (FEBE)
■
Frame error
■
Idle code
■
Idle received
■
Local and remote loopback
■
Loss of signal (LOS)
■
Out of frame (OOF)
■
Path parity error
■
Yellow alarm
■
14■ATM2 DS3 IQ PIC
ATM2 E3 IQ PIC
ATM2 E3 IQ PIC
JUNOS 6.1 and laterSoftware release
■
Description
Hardware features
Software features
Four E3 ports
■
Power requirement: 0.41 A @ 48 V (20 W)
■
Intelligent queuing (IQ) PICs support fine-grained queuing per logical interface
■
ATM standards compliant
■
16-MB SDRAM memory for ATM segmentation and reassembly (SAR)
■
ATM switch ID
■
Configurable framing options:
■
G.751 direct mapping
■
G.751 with PLCP encapsulation (default)
■
G.832 ATM direct mapping
■
Internal and loop timing
■
Per-virtual circuit (VC) and per-virtual path (VP) traffic shaping
■
Unspecified bit rate (UBR) traffic shaping
■
Fine-grained variable bit rate (VBR) traffic shaping
■
Circuit cross-connect (CCC)
■
ATM Inverse Address Resolution Protocol (ARP), which enables routers to automatically
■
learn the IP address of the router on the far end of an ATM permanent virtual circuit
(PVC)
Simple Network Management Protocol (SNMP):
■
Management Information Base (MIB) 2 (RFC 1213)
■
ATM MIB (RFC 1695)
■
SONET MIB
■
AAL5 encapsulations:
■
ATM-VC-MUX
■
ATM-NLPID
■
ATM-Cisco-LLPID
■
ATM-SNAP
■
ATM-CCC-VC-MUX
■
Cables and connectors
10 ft (3.05 m) posilock SMB to BNC (provided)
■
Four pairs of Rx and Tx coaxial cables
■
ATM2 E3 IQ PIC■15
M20 Internet Router PIC Guide
LEDs
Alarms, errors, and
events
One tricolor per port:
Off—Not enabled
■
Green—Online with no alarms or failures
■
Amber—Online with alarms for remote failures
■
Red—Active with a local alarm; router has detected a failure
■
Alarm indication signal (AIS)
■
Frame error
■
Line code violation
■
Local and remote loopback
■
Loss of signal (LOS)
■
Out of frame (OOF)
■
Yellow alarm
■
16■ATM2 E3 IQ PIC
ATM2 OC3/STM1 IQ PIC
JUNOS 5.5 and laterSoftware release
■
ATM2 OC3/STM1 IQ PIC
Description
Hardware features
Two OC3 ports
■
Power requirement: 0.41 A @ 48 V (20 W)
■
Intelligent queuing (IQ) PICs support fine-grained queuing per logical interface
■
Conforms to ANSI T1.105-1991 and T1E1.2/93-020R1
■
ATM and SONET/SDH standards compliant
■
Alarm and event counting and detection
■
Compatible with well-known ATM switches
■
ATM switch ID, which displays the switch IP address and local interface name of the
■
adjacent Fore ATM switches
Single 3010 SAR for segmentation and reassembly into 53 byte ATM cells
■
High-performance parsing of SONET/SDH frames
■
ASIC-based packet segmentation and reassembly (SAR) management and output port
■
queuing
64 MB SDRAM memory for ATM SAR
■
Packet buffering, Layer 2 parsing
■
ATM2 OC3/STM1 IQ PIC■17
M20 Internet Router PIC Guide
Software features
Cables and connectors
LEDs
Circuit cross-connect (CCC) for leveraging ATM access networks
■
User-configurable virtual circuit (VC) and virtual path (VP) support
■
Support for idle cell or unassigned cell transmission