A Guide for Technically Qualified Assemblers of Intel
Subassemblies/Products
Order Number: A97020-002
®
Identified
Disclaimer
Information in this document is provided in c onnection with Intel
otherwise, to any intellectual property rights is granted by this document. Except as provided in Intel’s Terms and Conditions
of Sale for such products, I nt el as sumes no liability whatsoever, and Intel disclaims any express or implied warranty, relating
to sale and/or use of Intel products including liability or warranties relating to fitness for a particular purpose, merchantab ility,
or infringement of any patent, copyright or other intellect ual property right. Intel products are not designed, intended or
authorized for use in any medical , life saving, or life su staining applications or for any other application in which the failure of
the Intel product could c reate a situation where personal injury or death may occur. Intel m ay make changes to
specifications and product descriptions at any t i me, without notice.
Intel and Xeon are trademarks or registered trademarks of Intel Corporation or its subsidiaries in the United States and other
countries.
†
Other names and brands may be c l ai med as the property of others.
The Intel® Server Board SE7501BR2 offers a “flat” design, with the processors and memory
subsystems residing on the board. The server board supports dual-processor operation with the
®
E7501 chipset and the Intel® Xeon™ processors with 512KB L2 Cache in the Flip-chip-
Intel
micro Pin Grid Array2 (FC-mPGA2) or in the Interposer micro Pin Grid Array (INT-mPGA)
package. The board contains embedded devices for video, network, and IDE, and it provides basic
monitoring hardware and interrupt control for dual-processors and PC/AT compatible operation.
Table 1. Server Board Features
Feature Description
Processor Dual 533 or 400 FSB Intel® Xeon™ processors with 512KB L2 Cache
Chipset Intel chipset:
• Supports 533 MHz Front Side Bus (FSB), backwards compatible with 400 MHz
• Intel® E7501 Chipset Memory Controller Hub (MCH) (North Bridge)
• Intel® 82801CA I/O Controller Hub3 (ICH3) (South Bridge)
• Two serial ports: One a-synch 9-pin RS-232C, one via 10-pin internal
connector
Two Ethernet controllers via RJ45 connectors: one Intel Fast Ethernet 82550PM,
one Intel Gigabit 82540EM
Five USB ports: three stacked USB connectors in I/O rear panel, two via 10-pin
internal header
Power • SSI-EEB 3.0 compliant
• Power/Sleep Switch with LED Indicator
• Wake on LAN
• Wake on Ring (WOR)
Security • BIOS password
• Keyboard password protection
• Floppy write-protect
Form Factor • SSI-EEB 3.0 compliant form factor
Server Management1
IPMI 1.5 compliant
Intel® Baseboard Management Controller (BMC)
Intel® Server Management (ISM) software Version 5.5, including support for:
• Hardware health monitoring through system sensors
• Proactive, alert notification through email, LAN and paging devices
• Remote access and diagnostics
• System Event Log manager
• Sensor Data Records manager
• Field Replaceable Unit manager
• Remote Sensor Access manager
• BIOS Console redirection
• Remote Configuration/Setup
• Serial over LAN
• Command Line Interface over LAN
• Server Configuration Wizard (SCW)
• Intel® SMaRT Tool Integration
• Online Rolling BIOS & Firmware Upgrade
• Command Line Interface over LAN
• ID LED Server Management Support
1
For additional information refer to the Intel® Server Management ver 5.5 Installation & User’s Guide
available on the ISM CD.
10 Intel Server Board SE7501BR2 Product Guide
Server Board Connector and Component Locations
JJ
KK
A
B
C
D
E
F
G
H
I
J
K
L
M
N
O
P
Q
R
OM15026
BB
FF
EE
DD
CC
AA
HH
II
V
T
U
S
GG
Z
Y
X
W
A Primary Processor (CPU1) N System Fan 3 AA System Fan 1
B Secondary Processor (CPU2) O Front Panel Connector BB System Fan 2
C CPU Po wer P Jumper Block CC ID L ED
D System Fan 6 Q Battery DD NIC 1 (10/100)
E System Fan 5 R LVD SCSI Connector EE NIC 2 (1 gigabit)
F Floppy Disk Drive Connector S HDD LED Connector FF System I/O Connectors
G IPMB Connector T Chassis Intrusion GG DIMM Sockets
H HSBP B U EMP in Use HH Aux Power
I HSBP A V Serial B II Main Power
J USB Connector W 32/33 PCI, Slots 5 & 6 JJ CPU1 Fan Connector
K Primary IDE (ATA 100) X ICMB KK CPU2 Fan Connector
L System Fan 4 Y 64/100 PCI-X, Slots 3 & 4
2
M Secondary IDE (ATA 100) Z 64/100 PCI-X, Slots 1 & 2
Figure 1. Server Board Connector and Component Locations
2
M-ROMB support provided via Slot4
Description 11
Back Panel Connectors
A
Aux. Pwr
Main Power
USB
B
DIMM Memory Connect
DIMM Memory Connect
DIMM Memory Connect
DIMM Memory Connect
C
A. USB 1, 2, 3
B. Keyboard / Mouse
C. Serial A
D. Video
E. Parallel
F. NIC2 (Gigabit)
G. NIC1 (10/100 Mb)
DEFG
OM14663
Figure 2. Back Panel Connectors
Intel® Chipset
The Intel® Server Board SE7501BR2 includes the Intel E7501 chipset (MCH, ICH3, P64H2), which
provides an integrated I/O bridge and memory controller, and a flexible I/O subsystem core (PCI).
E7501 MCH
The E7501 MCH North Bridge (MCH) integrates three main functions:
• An integrated high performance main memory subsystem
• An HI 2.0 bus interface that provides a high-performance data flow path to the P64H2
(I/O Bridge)
• An HI 1.5 bus that provides an interface to the ICH3-S (South Bridge)
Other features provided by the MCH include the following:
• Full support of registered ECC on the memory bus
• Full support of Intel® x4 Single Device Data Correction on the memory interface with x4
DIMMs
• Twelve deep in-order queue
• Full support of registered DDR266 ECC DIMMs
• Support for up to 8 GB of DDR memory
• Memory scrubbing
12 Intel Server Board SE7501BR2 Product Guide
P64H2 I/O Hub
The primary role of the P64H2 is to provide an integrated I/O bridge to the 64-bit PCI-X segments.
This subsystem supports two independent 64-bit PCI-X segments, each with two 64-bit/100MHz
PCI-X slots. The Adaptec AIC-7901 embedded controller is enabled via one of the PCI-X
segments of the P64H2.
ICH3 I/O Controller Hub
The primary role of the ICH3 is to provide the gateway to all PC-compatible I/O devices and
features. The SE7501BR2 uses the following ICH3 features:
• 32-bit/33 MHz PCI bus interface
• Low Pin Count (LPC) bus interface
• IDE interface, with Ultra DMA 100 capability
• Universal Serial Bus (USB) interface
• PC-compatible timer/counter and DMA controllers
• APIC and 8259 interrupt controller
• Power management
• General purpose I/O
• System RTC
Super I/O
The National Semiconductor† PC87417 Super I/O Plug-and-Play Compatible with
ACPI-Compliant Controller/Extender is used on the SE7501BR2 server board. This device
provides the system with:
• Two serial ports
• One parallel port
• Floppy disk controller (FDC)
• PS/2
• Wake event control
Serial Ports
One DB9 connector is provided on the back panel for the Serial A port. The Serial A port is
compatible with 16550A and 16450 modes. This port can be set to one of four different
COM ports, each of which can be enabled separately. When enabled, each port can be programmed
to generate edge- or level-sensitive interrupts. When disabled, the serial port interrupts are
available for add-in cards.
A DH10 10-pin serial header is available on the baseboard for an optional Serial B port. The
Serial B port can be used as an Emergency Management Port.
Parallel Port
The SE7501BR2 baseboard provides a 25-pin parallel port back panel connector. The Super I/O
provides an IEEE 1284-compliant 25-pin bi-directional parallel port. BIOS programming of the
Super I/O registers enables the parallel port and determines the port address and interrupt. When
disabled, the interrupt is available to add-in cards.
†
-compatible keyboard and mouse controller
Description 13
Floppy Disk Connector
The floppy disk connector on the server board provides the interface to the floppy disk drive from
the floppy disk controller.
Keyboard and Mouse Connectors
The separate keyboard and mouse connectors, found on the back panel of the server board, are
PS/2-compatible. The keyboard and mouse connectors are interchangeable.
Processor(s)
The Intel® Server Board SE7501BR2 accommodates one or two Intel Xeon processors with 512KB
L2 Cache via two SKT604 604-pin zero-insertion force (ZIF) sockets. The processors interface
with the system bus at 533 MHz, backwards compatible with 400 MHz. When only one processor
is installed, it should be in the socket labeled CPU1 and the other socket must be empty.
The Intel Xeon processor interface is dual-processor (DP)-ready. The processor subsystem
includes a single VR (Voltage Regulator) to support both processors. Interrupt generation and
notification for the processors is done by the Advanced Programmable Interrupt Controllers
(APICs) in the ICH3 and P64H2. When two processors are installed, both processors must be of
identical revision, core voltage, and bus/core speeds.
Boxed Processor Fan Heat Sink
Complete thermal solution including a processor wind tunnel (PWT), fan, and heatsink is supplied
with each boxed Intel Xeon processor.
NOTE
✏
Do not install the Processor Wind Tunnel when using the Intel® Server Chassis
SC5200 with hot swap redundant power. To install the heat sink you must use
the Retention Mechanisms supplied with the SC5200 chassis. For this chassis,
see the installation instructions beginning on page 47.
Otherwise, install the processor wind tunnels according to the instructions
provided in this document or in the SE7501BR2 Quick Start User’s Guide. These
instructions are different than those included with the boxed processor. For
proper processor cooling, the fan inlet air temperature should be below 45 °C.
CAUTION
Clearance is required at each end of the fan heat sink to ensure unimpeded
airflow for proper cooling. Restricting the airflow through the processor heat
sink can cause overheating and subsequent failure of the processor.
14 Intel Server Board SE7501BR2 Product Guide
Memory
The Intel® Server Board SE7501BR2 contains four 184-pin DIMM sockets and provides support
for up to 8 GB of DDR266 memory. The memory subsystem provides dual memory bus
architecture; the memory on the board is partitioned into two banks of DDR DIMMs. D I MMs must
be installed in pairs, providing a 144-bit wide data path via two separate memory buses.
The server board supports up to four ECC DDR DIMMs that are compliant with the JEDEC
DDR266 specification. A wide range of DIMM sizes are supported, including:
• 128 MB
• 256 MB
• 512 MB
• 1 GB
• 2 GB
The minimum supported memory configuration is 256 MB, using two 128 MB DIMMs. The
maximum configurable memory size is 8 GB using four 2 GB DIMMs.
NOTE
✏
DIMMs must be installed in pairs and must be populated by bank starting
with DIMM 1A and 1B (contiguous sockets). Although the SE7501BR2
server board architecture allows the user to mix various sizes of DIMMs
between banks, DIMMs must be identical within the banks. For a list of
tested memory, see:
The SE7501BR2 server board provides three PCI bus segments:
• Segment C with two PCI-X 64-bit / 100 MHz slots (Slot 1 and 2)
• Segment B with two PCI-X 64-bit / 100 MHz slots (Slot 3 and 4)
• Segment A with two PCI 32-bit / 33 MHz slots (Slot 5 and 6)
The following table outlines the capabilities of each 64-bit bus segment. The least capable card
installed on that bus determines the bus mode/speed. In other words, the bus will run at the speed
of the slowest installed card.
Table 2. 64-bit PCI Segment Configuration
# of slots populated per segment Segment B (mode, speed) Segment C (mode, speed)
• Burst transfers up to a peak of 1000 Megabytes per second (MB/s)
• 8-, 16-, 32-, or 64- bit data transfers
• Plug-and-Play ready
• Parity enabled
NOTES
Speed on the PCI-X will be prog rammed by the BI O S according to loading on the
segment. When a segm ent is config ured with a sing le PCI-X 64/133 card the bus
will work at 133 MHz; with two PC I -X 64/133 cards the bus will work at 100
MHz.
If you install a slower card into one of the PCI- X 64/100 connectors, the bus speed
for both connectors will be lowered to the speed of the slowest adapter.
The 64-bit/100 MHz PCI-X segment includes the following embedded device and connectors:
• Two 3.3 V keyed full-length, full height PCI expansion slots that can support PCI-X add in
cards running at 100 MHz (PCI-X Slots 3 and 4). These slots are backward compatible to 64bit/66 MHz, 64-bit/33 MHz and universal keyed 32-bit/33 MHz PCI cards.
• Integrated Adaptec AIC-7901 U320 Single Channel SCSI Controller
The PCI-X features include:
• Bus speed up to 100 MHz
• 3.3 V signaling environment
• Burst transfers up to a peak of 800 Megabytes per second (MB/s)
• 8-, 16-, 32-, or 64-bit data transfers
• Plug-and-Play ready
• Parity enabled
NOTE
If you install a slower card into one of the PCI- X 64/100 connectors, the bus speed
for both connectors will be lowered to the speed of the slowest adapter.
✏
16 Intel Server Board SE7501BR2 Product Guide
Modular RAID on Motherboard
The SE7501BR2 server board supports M-ROMB or Zero Channel RAID (ZCR) that allows the
on-board SCSI controller to be “hidden” from the system and used by the RAID processor on the
add-in card. This support is provided via hardware and BIOS support on PCI-X Slot 4. This PCI
segment may operate as PCI 64-bit/66 MHz with some ROMB RAID controllers.
Segment A: 32-bit/33 MHz PCI Subsystem
The 32-bit / 33 MHz PCI segment includes the following embedded devices and connectors:
• Two 5 V keyed full-length, full height PCI expansion slots (PCI Slots 5 and 6)
• Integrated Intel 10/100 Fast Ethernet Controller (Intel
• Integrated ATI Rage XL video controller with 8 MB of on-board SDRAM
32-bit/33 MHz PCI features include:
• Bus speed up to 33 MHz
• 5 V signaling environment
• Burst transfers up to a peak of 132 MB/s
• 8-, 16-, or 32-bit data transfers
• Plug-and-Play ready
• Parity enabled
82550PM)
Video Controller
The Intel® Server Board SE7501BR2 includes an ATI Rage XL video controller, 8 MB video
SDRAM, and support circuitry for an embedded SVGA video subsystem.
The SVGA subsystem supports a variety of modes: up to 1600 X 1200 resolution for CRT
displays, up to 1024 x 768 resolution for TFT displays, and up to 16.7 million colors with a refresh
rate of up to 100Hz. The SE7501BR2 server board provides a standard 15-pin VGA connector, and
external video blanking logic for server management console redirection support.
Description 17
Network Interface Controllers (NICs)
The Intel® Server Board SE7501BR2 includes one 10/100Base-TX network connection, based on
the Intel 82550PM Fast Ethernet Controller (NIC1)
connection, based on Intel 82540EM Gigabit Ethernet Controller (NIC2). Facing the rear of the
system, the gigabit controller is on the left, next to the video connector.
You can disable the embedded NICs in BIOS Setup Utility. When disabled, the controller(s) are
not visible to the operating system.
NOTE
✏
To ensure EMC (Electromagnetic Compatibility) product regulation
compliance, the system must be used with a shielded LAN cable.
5
, and one 10/100/1000Base-TX network
Supported Network Features
The SE7501BR2 supports the following features of the 82550PM and 82540EM controllers:
• Glueless 32-bit PCI Bus Master Interface (Direct Drive of Bus), compatible with PCI Bus
Specification, revision 2.1 / 2.2
• Chained memory structure, with improved dynamic transmit chaining for enhanced
performance
• Programmable transmit threshold for improved bus utilization
• Early receive interrupt for concurrent processing of receive data
• On-chip counters for network management
• Autodetect and autoswitching for 10 or 100 MB/s network speeds (82550 only)
• Support for 10 Mb/s, 100 Mb/s, and 1000 Mb/s networks, full or half duplex-capable, with
back-to-back transmit at 100 MB/s
• Integrated physical interface to TX magnetics
• The magnetics component terminates the 100Base-TX connector interface. A flash device
stores the network ID
• Support for Wake on LAN (WOL)
• Advanced Networking Service Features (Teaming, Load balancing)
5
NIC1 is the designated Intel Server Management NIC.
18 Intel Server Board SE7501BR2 Product Guide
NIC Connector and Status LEDs
The Intel® Server Board SE7501BR2 supports two RJ45 connectors, one for the 10/100-Megabit
Fast Ethernet controller (NIC1), and the other for the Gigabit Ethernet controller (NIC2).
NIC1 drives two LEDs on its RJ45 connector. These LEDs indicate link/activity on the LAN and
the speed of operation. This connector is on the right side when looking at the I/O area at the back
of the board. The green LED to the right of the connector indicates a network connection is in
place when it is on and transmit/receive activity when it is blinking. The green LED to the left of
the connector indicates 10 Mbps operation when it is off and100 Mbps operation when it is lit and.
See the following table for an overview.
Table 3. 10/100 Megabit LEDs (NIC1)
LED Color LED State NIC1 State
Green (left)
Green (right)
Off 10-Mbps
On 100-Mbps
On On
Blinking Transmit / Receive activity
NIC2 drives two LEDs located on its RJ45 connector; this connector is on left side when looking at
the I/O area in the back of the board. The green LED to the right of the connector indicates a
network connection is in place when it is on, and transmit/receive activity when it is blinking. The
bi-color LED to the left of the connector indicates 10-Mbps when it is off, 100-Mbps operation
when it is green, and 1000-Mbps operation when it is yellow. See the following table for an
overview.
Table 4. Gigabit LEDs (NIC2)
LED Color LED State NIC2 State
Off 10-Mbps
Green/Yellow (left)
Green (right)
Green 100-Mbps
Yellow 1000-Mbps
On On
Blinking Transmit / Receive activity
Description 19
ACPI
By using Advanced Configuration and Power Interface (ACPI), an ACPI-aware operating system
can place the system into a state in which the hard drives spin-down, the system fans stop, and all
processing is halted. In this state the power supply is still on and the processors still dissipate some
power, so the power supply fan and processor fans are still running.
NOTE
✏
ACPI requires an operating system that supports this feature.
The server board supports sleep states S0, S1, S4, and S5. When the server board is operating in
ACPI mode, the operating system retains control of the system and the OS policy determines the
entry methods and wake-up sources for each sleep state – sleep entry and wake-up event
capabilities are provided by the hardware but are enabled by the operating system.
• S0: Normal running state.
• S1: DC Power remains on. The operating system saves the context and enters a low-power
state. The system can wake from the S1 state using a PS/2 keyboard, mouse, or USB device,
by pressing the power button press, or from a wakeup event.
• S4: Hibernate or Save to Disk. The memory and machine state are saved to disk. Pressing the
power button or another wakeup event restores the system state from the disk and resumes
normal operation. This assumes that no hardware changes were made to the system while it
was off.
• S5: Soft off. Only the RTC section of the chip set is running in this state.
CAUTION
The system is off only when the AC power is disconnected.
Wakeup Events
The SE7501BR2 system supports several wakeup events.
Wake on LAN
Wake on LAN allows system power to be activated through the network. If the system is in the S1
or S4 state, it can be turned on remotely by sending a specific packet to the remote system. The
system contains a configuration option that allows the on-board NICs to be enabled to wake the
system from a S4 or S5 sleep state, even if the operating system disabled Wake on LAN when it
powered down the system. This provides an option for users who want to use standard, but
non-secure, Wake on LAN capability for operations such as after-hours maintenance. Server
management features provide a secure system power-up, plus the ability to provide BIOS boot
option.
20 Intel Server Board SE7501BR2 Product Guide
Wake on Ring
Wake on Ring allows system power to be activated through the serial ports when this option is
enabled in Setup. If the system is in the S1 or S4 state, it can be turned on remotely by the Ring
Indicate RI signals from the serial ports.
NOTE
✏
Wake on Ring is disabled in Serial B if this port is enabled as a server
management port.
Wake on RTC Alarm
Wake on RTC alarm allows system power to be activated through a real-time clock alarm when this
option is enabled in Setup. If the system is in the S1 or S4 state, it can be turned on by an RTC
trigger event.
System Management
Intel integrates system management features into the hardware and provides additional features
through Intel
is provided below. For instructions on using the features described, refer to the Configuration
Software and Utilities chapter, beginning on page 77.
®
Server Management (ISM) software version 5.5. A brief description of the features
Baseboard Management Controller
Intel server boards incorporate a baseboard management controller (BMC), which is a dedicated
microcontroller for system management activities. The BMC performs the following functions:
• Monitors system components and sensors, including processors, memory, fans, power supplies,
temperature sensors, and chassis intrusion sensors.
• Manages nonvolatile storage for the system event log (SEL), sensor data records (SDRs), and
baseboard field-replaceable unit (FRU) inventory.
• Interfaces with the emergency management port (EMP) and LAN1 port to send alerts and
interact with remote management systems.
• Provides the main front panel control functions (power on/off, reset, and so on).
Description 21
Field Replaceable Units and Sensor Data Records
Field replaceable units (FRUs) are major modules in the chassis that contain active electronic
circuitry. FRUs can store information-such as board serial number, part number, name, and asset
tag-that can be read using the System Setup Utility. The BMC stores FRU information for the
baseboard in a nonvolatile storage component on the board.
The BMC uses Sensor Data Records (SDRs) to identify the sensors in the system for monitoring.
SDRs provide a list of the sensors, their characteristics, location, type, and type-specific
information, such as default threshold values, factors for converting a sensor reading into the
appropriate units (mV, rpm, degrees Celsius), and information on the types of events that a sensor
can generate. The BMC stores SDR information in a nonvolatile storage component on the
baseboard.
You can use the FRU/SDR Load Utility to initialize or update the FRU and SDR information.
®
server boards are shipped from the factory with some sensors disabled because the actual
Intel
configuration of the chassis is only determined when the user completes the system configuration.
For example, chassis-specific FRU information, such as chassis part number, must be configured
when the system is configured. For these reasons, it is important to run the FRU/SDR Load Utility
as part of the system setup process. You should also run the FRU/SDR Load Utility whenever you
change the number of fans, processors, or power supplies in the server.
System Event Log
The BMC manages a system event log (SEL), where it records significant or critical system events.
These events include temperatures and voltages out of range, fan failures, and other sensor-related
events. The BIOS, software, and other devices can also log events by sending messages to the
BMC. The SEL is stored in nonvolatile storage.
You can view the current contents of the SEL by using the System Setup Utility.
Platform Event Management
Events can trigger alerts and other actions by the BMC. The server is configured with the
following set of standard events:
• Temperature sensor out of range
• Voltage sensor out of range
• Fan failure
• Chassis intrusion
• Power supply failure
• Memory error
• POST error
• Processor fault resilient booting (FRB) failure
• Fatal nonmaskable interrupt (NMI) from a source other than the front panel switch
• Watchdog timer reset, power down, or power cycle
• System restart (reboot)
22 Intel Server Board SE7501BR2 Product Guide
Alerts can take either of these forms:
• Platform Event Pages – the BMC dials a paging service and sends a predefined paging string.
To use platform event paging (PEP), you must attach an external modem to the emergency
management port (Serial B). Use the Server Configuration Wizard to configure the pager and
emergency management port information.
• BMC LAN alerts – the BMC sends an alert to a predefined destination on the LAN.
You can configure PEP and BMC LAN alerts by using the Server Configuration Wizard or the
System Setup Utility.
Emergency Management Port
The emergency management port (EMP) refers to the use of the Serial B port, with either an
external modem or direct serial connection, for remote management. The BMC controls the port
and interfaces with remote access software, such as the Direct Platform Control or the Client
System Setup Utility applications in Intel Server Management.
You can configure the EMP by using the Server Configuration Wizard or the System Setup Utility.
EMP and Serial Over LAN
The Serial B port 10-pin header on the board can be configured in several different ways: as a
standard serial port, as an Emergency Management Port, or for serial output redirection over a
LAN. You can configure these settings using either the System Setup Utility or the Server
Configuration Wizard.
✏✏
NOTES
SC5200 Server Chassis considerations: If you have configured the Serial
B port for use as an emergency management port and set it to be “always
available”, the Serial B port will be accessible only by remote server
management software. The operating system will never be able to access the
port.
If you have configured the Serial B port for Serial Over LAN, the port’s
functionality will be impacted only when there is an active Serial Over LAN
session from a remote console. At all other times either the operating system
or the EMP will control the port, depending on your configuration.
Description 23
Intel® Server Management
Intel Server Management (ISM) version 5.5 is a system management package that is included on
the ISM CD. ISM applications interact with the integrated hardware system management features
of the server to allow you to monitor and manage a server. Version 5.5 provides integrated in-band
(operating system up) and out-of-band (operating system down) remote management, event alerting
and logging, including e-mail notification, and proactive fault management. Some of the features
provided are:
†
• The ability to connect to the server from a Windows
over a modem, or over a direct serial connection to the server, permitting you to manage the
server from a remote location.
• Real-time monitoring and alerting for server hardware sensors.
• Emergency management when the server is off (but still connected to AC power) lets you
verify the state of the server, diagnose hardware problems, and power on/off or reset the server.
• The ability to run the Client System Setup Utility to change the configuration of the managed
server.
ISM can use an optional service partition on the managed server. The service partition is a special
disk partition on the system drive that contains a ROM-DOS
utilities, including the System Setup Utility, FRU/SDR Load Utility, and other diagnostics
packages you might choose to install. The server can be booted to the service partition, either
locally or remotely, to provide access to the utilities.
-based client workstation over a LAN
†
operating system and DOS-based
The service partition must be installed before the operating system is installed. Instructions for
creating a service partition are available on the Quick Start Users guide.
For more information on Intel Server Management and the individual ISM applications, see the
Intel Server Management Installation and User’s Guide on the ISM CD.
24 Intel Server Board SE7501BR2 Product Guide
Security
The SE7501BR2 BIOS provides a number of security features. This section describes the security
features and their operation.
Table 5. Security Operation Summary
Mode
Secure
Mode
Secure
Boot
Password
on boot
Fixed disk
boot
sector
Entry Method/
Event
Keyboard
inactivity timer or
runtime
activation of hot
key
Power On/Reset User
Power On/Reset User
Power On/Reset Set feature
Entry
Criteria
User
password
enabled in
Setup
password
and Secure
Boot
enabled in
Setup
password
set and
password on
boot enabled
to Write
Protect in
Setup
Behavior
On-board video goes
blank if selected in
Setup.
Floppy writes are
disabled if selected in
Setup.
Except for the
password, no mouse or
keyboard input is
accepted.
Keyboard LEDs flash
Front panel buttons are
disabled, except for
NMI.
User is prompted for
password if booting from
drive A.
System enters Secure
Mode just before
scanning option ROMs.
See above for other
Secure Mode behavior.
System halts for User
Password before
scanning option ROMs.
The system is not in
secure mode.
Except for the
password, no mouse or
keyboard input is
accepted.
Write protects the
master record of the IDE
hard drives if the system
boots from a floppy. The
BIOS will also
write-protect the boot
sector of the C: drive if it
is an IDE drive.
Exit Criteria After Exit
User or
administrator
password
followed by
[Enter]
User or
administrator
password
followed by
[Enter]
User or
administrator
password
followed by
[Enter]
Set feature
to Normal in
Setup
Video is
restored.
Floppy writes
are enabled.
Keyboard and
mouse inputs
are accepted.
Front panel
buttons are
enabled.
See above for
Secure Mode
behavior.
Power and
Reset
switches are
enabled.
PS/2 keyboard
and mouse
inputs are
accepted.
The system
boots
normally.
Boot
sequence is
determined by
setup options.
Hard drive will
behave
normally.
Description 25
Secure Mode
Secure mode refers to a system state where many of the external inputs and outputs are disabled to
prevent tampering. These include PS/2 ports, floppy and on-board video. When secure mode is in
effect, you must enter a password before the system will accept any keyboard or mouse input,
except for the password entry. When secure mode is in effect, you cannot turn off the system
power or reset the server from the front panel switches.
Secure mode has no effect on functions enabled via remote server management or power control
via the watchdog timer.
Taking the system out of secure mode does not change the state of system power. In other words, if
you press and release the power button while secure mode is in effect, the system will not be
powered down when secure mode is later removed. However, if the front panel power button
remains depressed while secure mode is removed, the server will be powered off.
Secure mode is configured through the BIOS setup options or through the System Setup Utility.
Hot Key Activation
A hot key combination allows the user to activate secure mode immediately instead of waiting for
the configured inactivity time-out to expire. The hot key combination is configured through Setup.
Either Ctrl-Alt-L or Ctrl-Alt-Z can be configured as valid hot keys.
NOTE
✏
Hot keys work only with PS/2 keyboards.
Secure Boot Mode (Unattended Start)
The Secure Boot mode allows the system to boot and run the operating system without requiring
the user password, even if the user password is set. However, until the user password is entered,
mouse and keyboard input is not accepted (except for password entry). If Secure Boot is enabled,
secure mode is enabled shortly before boot. To prevent unauthorized tampering with any option
ROM based setup utilities, enable the “Option ROM Menu Mask” setting in the security menu.
Using Secure Boot
When secure mode is in effect:
• You can boot the server and the operating system will run, but you must enter the user
password to use the keyboard or mouse.
• You cannot turn off system power or reset the server from the front panel switches.
Secure mode has no effect on functions enabled via the Server Manager Module or power control
via the real time clock.
26 Intel Server Board SE7501BR2 Product Guide
Password Protection
The BIOS uses passwords to prevent unauthorized tampering with the system.
Entering the user password permits the modification of the time, date, language, user password, and
password on boot setup fields. When a user password is configured, the server can be booted into
secure mode. See the Secure Boot Mode (Unattended Start) section above. Other setup fields can
be modified only if the administrator password is entered.
If a wrong password is entered three times in a row, the BIOS stops validating passwords and the
BIOS security engine returns a failure for any further password validation attempt. If the user
enters three wrong passwords in a row during the boot sequence (i.e., when entering Setup), the
system is placed into a halt state. This feature makes is difficult to break the password by the “trial
and error” method. When entering a password, the backspace key is accepted as a character of the
password. Pressing the backspace key to replace a mistyped character will result in a wrong
password.
If the user or administrator password is lost or forgotten, the password clear jumper can be used to
clear both passwords. See Chapter 5 under “Clearing the Passwords with the Password Clear
Jumper.”
If only the administrator password is set, you:
• Must enter the administrator password to enter BIOS Setup.
• Must enter the administrator password to boot the server if Password on Boot is enabled in the
BIOS Setup.
• Must enter the administrator password to exit secure mode.
If both passwords are set, you:
• May enter the user password to enter BIOS Setup. However, you will not be able to change
many of the options.
• Must enter the administrator password if you want to enter BIOS Setup and have access to all
of the options.
• May enter either password to boot the server if Password on Boot is enabled in the BIOS Setup.
• May enter either password to exit secure mode.
Setting Passwords
Each password can be independently set or cleared in the BIOS setup utility or in the System Setup
Utility. The passwords can be up to seven characters long and can contain only alphanumeric
characters (a-z, 0-9). Numbers from the NumLock pad are recognized as different characters than
the numbers in the top row of a standard PS/2 keyboard. The passwords are not case-sensitive.
When set, a password can be cleared by changing it to a null string.
Description 27
Intrusion Switc h Monit or ing
To help prevent unauthorized entry or use of the server, the Intel Server Management software
monitors the chassis intrusion switch if one is installed in the chassis. Opening an access cover will
transmit an alarm signal to the server board, where BMC firmware and server management
software process the signal. The system can be configured through ISM to respond to an intrusion
a number of ways, including powering down or locking the keyboard.
Floppy Write Protection
When selected in Setup, the option for floppy write protection prevents writes to the floppy disk
while the system is in secure mode. Floppy write protection is in effect only while the system is in
secure mode. When not in secure mode, write protection is disabled and the floppy diskette drive
operates normally.
Fixed Disk Boot Sector Write Protect
The fixed disk write-protect switch is set to “Write Protect” to prevent writes to the fixed IDE disk
boot sector. This feature works only with IDE drives and only the boot sector is write protected.
Power Switch Mask
The power switch mask enables and disables the power button feature. If it set to masked, the
system power cannot be turned off with the power button after booting the operating system.
Termination is also disabled. Termination is a feature that terminates system power when the
power switch is held down for more than four seconds.
28 Intel Server Board SE7501BR2 Product Guide
2 Server Board Inst allations and Upgrades
Tools and Supplies Needed
• Phillips† (cross head) screwdriver (#1 bit and #2 bit)
• Needle nosed pliers
• A ruler
• Pen or pencil
• Antistatic wrist strap and conductive foam pad (recommended)
Before You Begin
Emissions Disclaimer
To ensure EMC compliance with your local regional rules and regulations, the final configuration
of your end system product may require additional EMC compliance testing. For more information
please contact your local Intel Representative.
See “Regulatory and Integration Information” on page 121 for product Safety and EMC regulatory
compliance information. This is an FCC Class A device. Integration of it into a Class B chassis
does not result in a Class B device.
Safety Cautions
These warnings and cautions apply throughout this chapter. Only a technically qualified person
should configure the server board.
CAUTIONS
System power on/off: The power button DOES NOT turn off the system
AC power. To remove power from system, you must unplug the AC power
cord from the wall outlet. Make sure the AC power cord is unplugged before
you open the chassis, add, or remove any components.
Hazardous conditions, devices & cables: Hazardous electrical
conditions may be present on power, telephone, and communication cables.
Turn off the server and disconnect the power cord, telecommunications
systems, networks, and modems attached to the server before opening it.
Otherwise, personal injury or equipment damage can result.
Risk of burn: If the server has been running, any installed processor and
heat sink on the processor will be hot. To avoid the possibility of a burn, be
careful when removing or installing server board components that are located
near processors.
29
Electrostatic discharge (ESD) & ESD protection: ESD can damage
disk drives, boards, and other parts. We recommend that you perform all
procedures in this chapter only at an ESD workstation. If one is not
available, provide some ESD protection by wearing an antistatic wrist strap
attached to chassis groundany unpainted metal surfaceon your server
when handling parts.
ESD and handling boards: Always handle boards carefully. They can
be extremely sensitive to ESD. Hold boards only by their edges. After
removing a board from its protective wrapper or from the server, place the
board component side up on a grounded, static free surface. Use a
conductive foam pad if available but not the board wrapper. Do not slide
board over any surface.
Installing or removing jumpers: A jumper is a small plastic encased
conductor that slips over two jumper pins. Some jumpers have a small tab on
top that you can grip with your fingertips or with a pair of fine needle nosed
pliers. If your jumpers do not have such a tab, take care when using needle
nosed pliers to remove or install a jumper; grip the narrow sides of the
jumper with the pliers, never the wide sides. Gripping the wide sides can
damage the contacts inside the jumper, causing intermittent problems with
the function controlled by that jumper. Take care to grip with, but not
squeeze, the pliers or other tool you use to remove a jumper, or you may
bend or break the stake pins on the board.
Safety and Regulatory Compliance
See “Regulatory and Integration Information” on page 121 for product Safety and EMC regulatory
compliance information.
Intended uses: This product was evaluated for use in servers that will be installed in offices,
computer rooms, and similar locations. Other uses require further evaluation.
EMC testing: Before computer integration, make sure that the chassis, power supply, and other
modules have passed EMC testing using a server board with a microprocessor from the same
family (or higher) and operating at the same (or higher) speed as the microprocessor used on this
server board.
Server board diagram label provided: Place the label inside the chassis in an easy-to-see location,
preferably oriented similarly to the server board.
30 Intel Server Board SE7501BR2 Product Guide
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