Intel S875WP1LX, S875WP1-E Specification
Intel® Server Board
S875WP1-E
Technical Product Specification
Intel order number C40538-003
Revision 4.0
November 2003
Enterprise Platforms and Services Marketing
Revision History S875WP1-E TPS
Revision History
Date Revision
May 2003 1.0 Initial Release.
June 2003 2.0 Updated mechanical drawing and I/O shield drawing.
June 2003 3.0
November
2003
Number
Added correct calculated MTBF numbers and additional notes about ATX12V
power supply support.
4.0 Additional notes regarding Serial ATA controller for S875WP1LX sku
Modifications
This product specification applies to the Intel® Server Board S875WP1-E with BIOS identifier
WP87510A.86B.
Changes to this specification will be published in the Intel Server Board S875WP1-E
Specification Update before being incorporated into a revision of this document.
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ii
S875WP1-E TPS Disclaimers
Disclaimers
Information in this document is provided in connection with Intel® products. No license, express
or implied, by estoppel or otherwise, to any intellectual property righ ts is granted by this
document. Except as provided in Intel's Terms and Conditions of Sale for such products, Intel
assumes no liability whatsoever, and Intel disclaims any express or implied warranty, relating to
sale and/or use of Intel products including liability or warranties relating to fitness for a particular
purpose, merchantability, or infringement of any patent, copyright or oth er intellectual property
right. Intel products are not intended for use in medical, li fe saving, or life sustaining
applications. Intel may make changes to specifications and product descriptions at any time,
without notice.
The S875WP1-E may contain design defects or errors known as errata which ma y cause the
product to deviate from published specifications.
Current characterized errata are available on
request.
Intel, Pentium, Itanium, and Xeon are trademarks or registered trademarks of Inte l Corporation.
*Other brands and names may be claimed as the property of others.
Copyright © Intel Corporation 2003.
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Table of Contents S875WP1-E TPS
Table of Contents
1. Introduction ..........................................................................................................................6
2. Server Board Overview........................................................................................................6
2.1 S875WP1-E Feature Set................................................................................................. 6
3. Functional Architecture.......................................................................... .............................6
3.1 Processor and Memory Subsystem.................................................................................6
3.1.1 Processor Support .....................................................................................................6
3.1.2 Memory Subsystem ............................ .......................................... .... .........................6
3.1.3 Memory Configurations..............................................................................................6
3.2 Intel 875P Chipset ...........................................................................................................6
3.2.1 AGP............................................................................................................................6
3.2.2 USB ............................................................................................................................6
3.2.3 IDE Interfaces ............................................................................................................6
3.2.4 Real-Time Clock, CMOS SRAM, and Battery............................................................6
3.2.5 Intel 82802AC 8 Megabit Firmware Hub (FWH) ........................................................6
3.3 Serial ATA (SATA) Support............................................................ .................................6
3.3.1 SATA Interfaces......................................................................................................... 6
3.3.2 SATA RAID with ICH5-R Controller...........................................................................6
3.3.3 SATA RAID with Promise Technology* PDC20319....................................................6
3.4 I/O Controller ...................................................................................................................6
3.4.1 Serial Ports.................................................................................................................6
3.4.2 Parallel Port................................................................................................................6
3.4.3 Diskette Drive Controller............................................................................................6
3.4.4 Keyboard and Mouse Interface..................................................................................6
3.5 Hardware Management Subsystem.................................................................................6
3.5.1 Hardware Monitoring and Fan Control ASIC..............................................................6
3.5.2 Fan Monitoring............................................... ... .........................................................6
3.5.3 Chassis Intrusion and Detection ................................................................................6
3.6 Power Management....................................................... ..................................................6
3.6.1 Advanced Configuration and Power Interface (ACPI) ................................................6
3.6.2 Hardware Support......................................................................................................6
3.6.3 Standby Power (+5 V) Indicator LED.........................................................................6
3.7 Clock Generation and Distribution...................................................................................6
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3.8 PCI I/O Subsystem..........................................................................................................6
3.8.1 32-bit, 33-MHz PCI Subsystem..................................................................................6
3.8.2 Video Controller .........................................................................................................6
3.9 Network Interface Controller (NIC) Subsystem................................................................6
3.9.1 RJ-45 LAN Connectors with Integrated LEDs............................................................6
4. Maps and Interrupts.............................................................................................................6
4.1 Memory Map....................................................................................................................6
4.2 I/O Map............................................................................................................................6
4.3 DMA Channels.................................................................................................................6
4.4 PCI Configuration Space Map.........................................................................................6
4.5 Interrupts..........................................................................................................................6
4.6 PCI Interrupt Routing Map...............................................................................................6
5. Connectors and Jumper Blocks.........................................................................................6
5.1 Power Connectors............................................................. ............................................. .6
5.2 PCI Bus Connectors........................................................................................................6
5.3 AGP Connector................................................................................................................6
5.4 Front Panel Connector.....................................................................................................6
5.5 VGA Connector................................................................................................................6
5.6 NIC /USB Connector............................................................. ...........................................6
5.7 SATA/SATA RAID Connectors........................................................................................6
5.8 ICH5-R IDE Connectors ............................................................................................. .....6
5.9 Front Panel USB Header.................................................................................................6
5.10 Floppy Connector.........................................................................................................6
5.11 Serial Port Connector...................................................................................................6
5.12 Keyboard and Mouse Connector..................................................................................6
5.13 Miscellaneous Headers................................................................................. ...............6
5.13.1 Fan Headers............................................................................................................. 6
5.14 System Recovery and Update Jumper.........................................................................6
5.15 Clear CMOS Jumper....................................................................................................6
6. BIOS Features....................................................... ................................................................6
6.1 BIOS Flash Memory Organization...................................................................................6
6.2 Resource Configuration...................................................................................................6
6.2.1 PCI Autoconfiguration................................................................................................6
6.2.2 PCI IDE Support.........................................................................................................6
6.3 System Management BIOS (SMBIOS)................................................................ ............6
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6.4 Legacy USB Support.......................................................................................................6
6.5 BIOS Updates..................................................................................................................6
6.5.1 Language Support......................................................................................................6
6.5.2 Custom Splash Screen ..............................................................................................6
6.6 Recovering BIOS Data ....................................................................................................6
6.7 Boot Options...................................................................... ... ...........................................6
6.7.1 CD-ROM and Network Boot .......................................................................................6
6.7.2 Booting Without Attached Devices.............................................................................6
6.8 Fast Booting Systems with Intel® Rapid BIOS Boot .......................................................6
6.8.1 Intel Rapid BIOS Boot.......................................................................... ......................6
6.9 BIOS Security Features...................................................................................................6
7. BIOS Setup Program............................................................................................................6
7.1.1 Maintenance Menu.....................................................................................................6
7.1.2 Main Menu ................................................................................ .................................6
7.1.3 Advanced Menu.........................................................................................................6
7.1.4 Security Menu............................................................................................................6
7.1.5 Power Menu.......................................................................................................... .... .6
7.1.6 Boot Menu.................................... ..............................................................................6
7.1.7 Exit Menu...................................................................................................................6
8. Error Reporting and Handling............................................... ..............................................6
8.1 Error Sources and Types.................................................................................................6
8.1.1 PCI Bus Errors...........................................................................................................6
8.1.2 Processor Bus Errors.................................................................................................6
8.1.3 Single-Bit ECC Error Throttling Prevention................................................................ 6
8.1.4 Memory Bus Errors....................................................................................................6
8.2 BIOS Error Messages, POST Codes, and BIOS Beep Codes ........................................6
8.2.1 BIOS Error Messages................................................................................................6
8.2.2 Port 80h POST Codes ...............................................................................................6
8.3 Bus Initialization Checkpoints..........................................................................................6
9. General Specifications....................................................... ..................................................6
9.1 Absolute Maximum Ratings.............................................................................................6
9.2 S875WP1-E Power Budget .............................................................................................6
9.3 Product Regulatory Compliance......................................................................................6
9.3.1 Product Safety Compliance........................................................................................6
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9.3.2 Product EMC Compliance..........................................................................................6
9.3.3 Product Regulatory Compliance Markings.................................................................6
9.4 Electromagnetic Compatibility Notices ............................................................................6
9.4.1 FCC (USA).................................................................................................................6
9.4.2 INDUSTRY CANADA (ICES-003)..............................................................................6
9.4.3 Europe (CE Declaration of Conformity)......................................................................6
9.4.4 Taiwan Declaration of Conformity..............................................................................6
9.4.5 Korean RRL Compliance ...........................................................................................6
9.4.6 Australia / New Zealand.............................................................................................6
9.5 Replacing the Back-Up Battery........................................................................................6
9.6 Calculated Mean Time Between Failures (MTBF) ...........................................................6
9.7 Mechanical Specifications ...............................................................................................6
Glossary......................................................................................................................................VI
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List of Figures S875WP1-E TPS
List of Figures
Figure 1. Intel Server Board S875WP1-E Diagram ...................................................................... 6
Figure 2. Examples of Dual Channel Configuration with Dynamic Mode..................................... .6
Figure 3. Example of Dual Channel Configuration without Dynamic Mode..................................6
Figure 4. Examples of Single Channel Configuration with Dynamic Mode...................................6
Figure 5. Examples of Single Channel Configuration without Dynamic Mode..............................6
Figure 6. Intel 875P Chipset Block Diagram.................................................................................6
Figure 7. USB Port Configuration .................................................................................................6
Figure 8. Location of the Standby Power Indicator LED (CR7J1)................................................ .6
Figure 9. LAN Connector LED Locations......................................................................................6
Figure 10. S875WP1-E Server Board Mechanical Drawing .........................................................6
Figure 11. Intel Server Board S875WP1-E I/O Shield Drawing....................................................6
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S875WP1-E TPS List of Tables
List of Tables
Table 1. Processor Support Matrix ...............................................................................................6
Table 2. Supported Memory Configurations................................................................................. 6
Table 3. Supported System Bus Frequency and Memory Speed Combinations..........................6
Table 4. Characteristics of Dual/Single Channel Configuration with/without Dynamic Mode.......6
Table 5. Effects of Pressing the Power Switch.............................................................................6
Table 6. Power States and Targeted System Power....................................................................6
Table 7. Wake-up Devices and Events.........................................................................................6
Table 8. Fan Connector Function/Operation.................................................................................6
Table 9. PCI Bus Characteristics..................................................................................................6
Table 10. PCI Bus Configuration IDs............................................................................................6
Table 11. Video Modes.................................................................................................................6
Table 12. 10/100 Ethernet LAN Connector LEDs.........................................................................6
Table 13. 10/100/1000 LAN Connector LED States.....................................................................6
Table 14. System Memory Map....................................................................................................6
Table 15. I/O Map...................................................................................................... ...................6
Table 16. DMA Channels..............................................................................................................6
Table 17. PCI Configuration Space Map ......................................................................................6
Table 18. Interrupts.......................................................................................................................6
Table 19. PCI Interrupt Routing Map............................................................................................6
Table 20. Power Connector Pin-out (J2J2)...................................................................................6
Table 21. 12V CPU Power Connector (J4C1) ..............................................................................6
Table 22. Auxiliary Power Connector (J4J1).................................................................................6
Table 23. PCI Bus Connectors .....................................................................................................6
Table 24. AGP Connector.............................................................................................................6
Table 25. High-Density Front Panel 34-Pin Header Pin Out (J7J1)..............................................6
Table 26. VGA Connector Pin-out (J3A1).....................................................................................6
Table 27. Magjack3 Connector (dual USB + RJ45, Gbe) Pin Out (JA4A1)..................................6
Table 28. Magjack3 Connector (dual USB + RJ45, 10/100) Pin Out (JA5A1)..............................6
Table 29. SATA 7-pin Connectors Pin Out (J9E1, J9F1, J9G1, J9H1, J9H2, J9J2).....................6
Table 30. ICH5-R IDE 40-pin Connector Pin Out (J5J1, J6J1).....................................................6
Table 31. Front Panel USB Connector Pin-out (J7E1) .................................................................6
Table 32. 34-pin Floppy Connector Pin Out (J3J1)............................................................... ... .....6
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List of Tables S875WP1-E TPS
Table 33. 9-pin Serial A Port Pin Out (J2A1) ................................................................................6
Table 34. 10-pin Header Serial B Port Pin Out (J6J4).................................................................. 6
Table 35. Keyboard /Mouse PS/2 Connector Pin Out (J1A1).......................................................6
Table 36. Three-Pin Fan Headers Pin-Out................................................................................... 6
Table 37. BIOS Setup Configuration Jumper Settings (J8J2).......................................................6
Table 38. Clear CMOS Jumper Settings (J8G1)...........................................................................6
Table 39. Supervisor and User Password Functions....................................................................6
Table 40. BIOS Setup Program Menu Bar....................................................................................6
Table 41. BIOS Setup Program Function Keys ............................................................................6
Table 42. Maintenance Menu ........................................... ... .........................................................6
Table 43. Main Menu....................................................................................................................6
Table 44. Advanced Menu............................................................................................................6
Table 45. PCI Configuration Submenu.........................................................................................6
Table 46. Boot Configuration Submenu........................................................................................6
Table 47. Peripheral Configuration Submenu ...............................................................................6
Table 48. Drive Configuration Submenu.......................................................................................6
Table 49. Primary/Secondary Master/Slave Submenus...............................................................6
Table 50. Floppy Configuration Submenu ....................................................................................6
Table 51. Event Log Configuration Submenu...............................................................................6
Table 52. Video Configuration Submenu......................................................................................6
Table 53. USB Configuration Submenu ........................................................................................6
Table 54. Chipset Configuration Submenu...................................................................................6
Table 55. Fan Control Configuration Submenu ............................................................................6
Table 56. Hardware Monitoring Submenu....................................................................................6
Table 57. Remote Access Configuration Submenu......................................................................6
Table 58. Security Menu...............................................................................................................6
Table 59. Power Menu..................................................................................................................6
Table 60. ACPI Submenu.............................................................................................................6
Table 61. Boot Menu.....................................................................................................................6
Table 62. Boot Device Priority Submenu......................................................................................6
Table 63. Hard Disk Drives Submenu...........................................................................................6
Table 64. Removable Devices Submenu......................................................................................6
Table 65. ATAPI CDROM Drives Submenu..................................................................................6
Table 66. Exit Menu......................................................................................................................6
Table 67. BIOS Error Messages...................................................................................................6
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S875WP1-E TPS List of Tables
Table 68. Uncompressed INIT Code Checkpoints........................................................................6
Table 69 Boot Block Recovery Code Checkpoints.......................................................................6
Table 70. Runtime Code Uncompressed in F000 Shadow RAM..................................................6
Table 71. BIOS Beep Codes.........................................................................................................6
Table 72. Bus Initialization Checkpoints.......................................................................................6
Table 73. Upper Nibble High Byte Functions................................................................................6
Table 74. Lower Nibble High Byte Functions................................................................................6
Table 75. Absolute Maximum Ratings..........................................................................................6
Table 76. S875WP1-E Power Budget...........................................................................................6
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List of Tables S875WP1-E TPS
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S875WP1-E Introduction
1. Introduction
The S875WP1-E Technical Product Specification (TPS) provides a high-level technical
description for the Intel
®
Server Board S875WP1-E. It details the architecture and feature set for
all functional sub-systems that make up the server board.
This TPS covers both versions of the Intel Server Board S875WP1-E, which includes pro du c t
codes: S875WP1 and S875WP1LX. When appropriate, the specific product code is used to
relay information that pertains only to a specific version of the Intel Server Board S875WP1-E.
This document is divided into the following mai n cate gories:
Chapter 2: Server Board Overview
Chapter 3: Functional Architecture
Chapter 4: Technical Reference
Chapter 5: Connectors and Jumper Blocks
Chapter 6: Overview of BIOS Features
Chapter 7: BIOS Setup Program
Chapter 8: Error Reporting and Handling
Chapter 9: General Specifications
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Server Board Overview S875WP1-E
2. Server Board Overview
2.1 S875WP1-E Feature Set
The Intel Server Board S875WP1-E provides the following feature set:
®
• Support for an Intel
socket.
• 400/533/800 MHz System Bus
• Intel
®
875P chipset
− Intel
− Intel
− Intel
®
82875P Memory Controller Hub (MCH)
®
82801ER I/O Controller Hub (ICH5-R)
®
82802AC 8 Megabit Firmware Hub (FWH)
• Support for single-sided or double-sided dual inline memory module (DIMM) double-data
rate (DDR) memory providing up to 4 GB of system memory with four 184-pin DIMM
sockets.
− PC3200 (400 MHz): to run 400 MHz memory at full speed requires an Intel Pentium 4
processor with 800 MHz system bus frequency.
− PC2700 (333 MHz): to run 333 MHz memory at full speed requires an Intel Pentium 4
processor with 533 MHz system bus frequency.
Note: PC2700 (333 MHZ) memory will run at 320 MHz frequency when using an Intel
Pentium 4 processor with 800 MHz system bus frequency.
− PC2100 (266 MHZ): PC2100 (266 MHZ) memory may only be used with an Intel
Pentium 4 processor with 400 MHz or 533 MHz system bus frequency only.
• One AGP bus with AGP connector, supporting 1.5 V and 0.8V AGP cards at 4X and 8X.
• One independent PCI bus (32-bit, 33 MHz, 5 V) with three PCI connec tors and two
embedded devices:
− Integrated 2D/3D graphics controller: ATI Rage* XL Video Controller with 8 MB of
SDRAM
− Optional 4-port Serial ATA (SATA) controller (on S875WP1LX): Promise Technology*
PDC20319
Pentium® 4 processor with hyper-threading technology in a µPGA478
• LPC (Low Pin Count) bus segment with one embedded device: SMSC LPC47M172 LPC
Bus I/O controller controller chip providing all PC-compatible I/O (floppy, serial, keyboard,
mouse)
• Four external USB 2.0 ports on the back panel with an additional internal header, which
provides support for an additional two USB ports for front panel support (six total possible
USB 2.0 ports)
• One serial port and one serial port header
• One parallel port
• Two IDE interfaces with UDMA 33, ATA-66/100 support
• Support for up to four system fans and one processor fan
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S875WP1-E Server Board Overview
• Server System Infrastructure (SSI)-compliant connectors for SSI interface support: front
panel, power connector
• Hardware Monitor Subsystem:
− Voltage sense to detect out of range power supply voltages
− Thermal sense to detect out of range thermal values
− Four fan sense inputs used to monitor fan activity
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Server Board Overview S875WP1-E
The figure below shows the functional blocks of the server board and the plug-in modules that it
supports.
A BC D E FG
CC
BB
AA
Z
Y
X
W
V
U
A. System Fan 4 Header
B. +12V CPU Power Connector
C. Processor Socket
D. CPU Fan
E. DIMM Sockets
F. Main Power Connector
G. Floppy Drive Connector
H. Auxiliary Power Connector
I. Primary IDE Connector
J. Secondary IDE Connector
K. Serial B Header
L. System Fan 1 Header
M. System Fan 2 Header
N. Front Panel Connector
O. BIOS Configuration Jumper (J8J2)
P. SCSI LED Header
Q. Hot Swap Backplane Header
H
I
J
K
L
M
N
O
P
S
QRT
TP00182
R. Battery
S. SATA-A1 through SATA-A4 Connector
(S875WP1LX only, slots numbered from left to
right)
T. Chassis Intrusion Header
U. PCI 32/33 Slots 1 – 3
(slots numbered from top to bottom)
V. System Fan 3 Header
W. Front Panel USB Header
X. Clear CMOS Jumper J8G1
Y. SATA-B1 and SATA-B2 Connectors
(slots numbered from left to right)
Z. AGP Connector
AA. NIC2 (10/100 Mb), USB
BB. NIC1 (1 Gb), USB
CC. Back Panel I/O Ports
Figure 1. Intel Server Board S875WP1-E Diagram
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S875WP1-E TPS Functional Architecture
3. Functional Architecture
This chapter provides a high-level description of the functionality distributed between the
architectural blocks of the Intel Server Board S875WP1-E.
3.1 Processor and Memory Subsystem
The Intel 82875P Memory Controller Hub (MCH) is one component of the Inte l 875P chipset.
The MCH is a centralized controller for the system bus, the memory bus, the AGP bus, and the
accelerated hub architecture interface.
3.1.1 Processor Support
The Intel Server Board S875WP1-E supports a single Pentium 4 processo r (in a µPGA478
socket) with a system bus of 400 /533 /800 MHz. The server board supports the processors
listed in Table 1.
Table 1. Processor Support Matrix
Pentium® 4 processor with
Hyperthreading (HT) Technology
Pentium 4 processor with
Hyperthreading Technology
Pentium 4 processor 2.0, 2.26, 2.4, 2.53, 2.6, 2.66, and 2.8
Type Designation System Bus L2 Cache Size
2.40, 2.60, 2.80, and 3.0 GHz 800 MHz 512 KB
3.06 GHz 533 MHz 512 KB
400 / 533 MHz 512 KB
GHz
CAUTION
Use only the processors listed above. Use of unsupported processors can dama ge the board,
the processor, and the power supply. See the Intel® Server Boar d S875WP1-E Specification
Update or go to http://support.intel.com/support/motherboards/server/S875WP1-E/
for the
current list of supported processors for this board.
NOTE
Use only ATX12V or EPS12V compliant power supplies with the server board S875WP1-E.
ATX12V and EPS12V power supplies have an additional powe r lead that provides required
supplemental power for the Intel Pentium 4 processor. The board will not boot if you do not
connect the 20-pin (or 24-pin) and 4-pin (or 8-pin) leads of ATX12V or EPS12V power supplies
to the corresponding connectors.
Do not use a standard ATX power supply. The board will not boot with a standard ATX power
supply.
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Functional Architecture S875WP1-E TPS
3.1.1.1 Reset Configuration Logic
The BIOS determines the processor stepp in g, cache size, and other processor information
through the CPUID instruction. The requirement is for the processor to run at a fixed speed. The
processor cannot be programmed to operate at a lower or highe r speed.
On the S875WP1-E platform, the BIOS is responsible for configuring the processor speed. The
BIOS uses CMOS settings to determine which speed to program into the speed setting device.
The processor information is read at every system power-on.
3.1.2 Memory Subsystem
The server board S875WP1-E provides four DIMM slots and supports a maximum memory
capacity of 4 GB. The DIMM organization is x72, which includes eight ECC check bits. ECC from
the DIMMs are passed through to the processor’s system bus. Memory scrubbing, single-bit
error correction and multiple-bit error detection is supported. Memory ca n be implemented with
either single-sided (one row) or double-sided (two row) DIMMs.
Table 2. Supported Memory Configurations
DIMM Capacity Configuration DDR SDRAM
Density
64 MB SS 64 Mbit 8 M x 8/empty 8
64 MB SS 128 Mbit 8 M x 16/empty 4
128 MB DS 64 Mbit 8 M x 8/8 M x 8 16
128 MB SS 128 Mbit 16 M x 8/empty 8
128 MB SS 256 Mbit 16 M x 16/empty 4
256 MB DS 128 Mbit 16 M x 8/16 M x 8 16
256 MB SS 256 Mbit 32 M x 8/empty 8
256 MB SS 512 Mbit 32 M x 16/empty 4
512 MB DS 256 Mbit 32 M x 8/32 M x 8 16
512 MB SS 512 Mbit 64 M x 8/empty 8
1024 MB DS 512 Mbit 64 M x 8/64 M x 8 16
Note: In the second column, “DS” refers to double-sided memory modules (containing two rows of DDR
SDRAM) and “SS” refers to single-sided memory modules (cont aining one row of DDR SDRAM).
DDR SDRAM
Organization
Front-side/Back-side
Number of DDR
SDRAM Devices
DIMM and memory configurations must adhere to the following:
• 2.5 V (only) 184-pin DDR SDRAM DIMMs with gold-plated contacts
• Unbuffered, single-sided or double-sided DIMMs with the following restriction:
• Double-sided DIMMS with x16 organization are no t supported.
• Maximum total system memory: 4 GB
• Minimum total system memory: 128 MB
• ECC and non-ECC DIMMs supported
• Serial Presence Detect
• PC3200 (400 MHZ), PC2700 (333 MHZ), and PC2100 (266 MHZ) SDRAM DIMMs
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S875WP1-E TPS Functional Architecture
Table 3 lists the supported system bus frequency and memory speed combinations.
Table 3. Supported System Bus Frequency and Memory Speed Combinations
To use this type of DIMM… The processor's system bus frequency must be…
PC3200 (400 MHZ) 800 MHz
PC2700 (333 MHZ) 800 or 533 MHz (Note)
PC2100 (266 MHZ) 800, 533, or 400 MHz
Note: When using PC2700 (333 MHZ) memory with an 800 MHz system bus frequency processor, the memory
channel will be set to 320 MHz.
Only DIMMs tested and qualified by Intel or a designated memo ry test vendor will be supported
on the Intel Server Board S875WP1-E. A list of qualified DIMMs will be made available through
http://support.intel.com/support/motherboards/server/S875WP1-E/
. Note that all DIMMs are
supported by design, but only fully qualified DIMMs will be supported.
NOTES
• Remove the AGP video card while installing or upg rading memory to avoid interference
with the memory retention mechanism.
• To be fully compliant with all applicable DDR SDRAM memory specifications, the board
should be populated with DIMMs that support the Serial Presence Detect (SPD) data
structure. This allows the BIOS to read the SPD data and program the chipset to
accurately configure memory settings for optimum performance. If non-SPD memory is
installed, the BIOS will attempt to correctly configure the memory settings, but
performance and reliability may be impacted or the DIMMs may not function under the
determined frequency.
• For ECC functionality, all installed DIMMs must be ECC. If both ECC and non-ECC
DIMMs are used, ECC will be disabled and will not function.
• Only low profile DIMMs can be supported in a 1U server chassis.
3.1.3 Memory Configurations
The Intel 82875P MCH component provides two features fo r enhancing memory throughput:
• Dual Channel memory interface. The board has two memory channels, each with two
DIMM sockets.
• Dynamic Addressing Mode. Dynamic mode minimizes overhead by reducing memory
accesses.
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Functional Architecture S875WP1-E TPS
Table 4 summarizes the characteristics of dual and single channel configuratio ns with and
without the use of Dynamic Mode.
Table 4. Characteristics of Dual/Single Channel Configuration with/without Dynamic Mode
Throughput
Level
Highest Dual Channel with Dynamic Mode All DIMMs matched
Dual Channel without Dynamic Mode DIMMs matched from Channel A to Channel B
Single Channel with Dynamic Mode Single DIMM or DIMMs matched with a channel
Lowest Single Channel without Dynamic Mode DIMMs not matched
Configuration Characteristics
(Example configurations are shown in Figure 2)
DIMMs not matched within channels
(Example configuration is shown in Figure 3)
(Example configurations are shown in Figure 4)
(Example configurations are shown in Figure 5)
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S875WP1-E TPS Functional Architecture
Dual Channel Configuration with Dynamic Mode
(All DIMMs matched)
Channel A - DIMM 0 Channel B - DIMM 0
Example
1
Channel A - DIMM 1
Channel A - DIMM 0 Channel B - DIMM 0
Intel
82875P
MCH
Channel B - DIMM 1
Example
2
Channel A - DIMM 1
Intel
82875P
MCH
Channel B - DIMM 1
Figure 2. Examples of Dual Channel Configuration with Dynamic Mode
OM15978
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Functional Architecture S875WP1-E TPS
Dual Channel Configuration without Dynamic Mode
- DIMMs not matched within channel
- DIMMs match Channel A to Channel B
Channel A - DIMM 0 Channel B - DIMM 0
Channel A - DIMM 1 Channel B - DIMM 1
Intel
82875P
MCH
OM15979
Figure 3. Example of Dual Channel Configuration without Dynamic Mode
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S875WP1-E TPS Functional Architecture
Single Channel Configuration with Dynamic Mode
(Single DIMM or DIMMs matched within Channel)
Channel A - DIMM 0 Channel B - DIMM 0
Example
1
Channel A - DIMM 1
Channel A - DIMM 0 Channel B - DIMM 0
Intel
82875P
MCH
Channel B - DIMM 1
Example
2
Channel A - DIMM 1
Intel
82875P
MCH
Channel B - DIMM 1
Figure 4. Examples of Single Channel Configuration with Dynamic Mode
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Functional Architecture S875WP1-E TPS
Single Channel Configuration without Dynamic Mode
(DIMMs not matched)
Channel A - DIMM 0 Channel B - DIMM 0
Example
1
Channel A - DIMM 1
Channel A - DIMM 0 Channel B - DIMM 0
Intel
82875P
MCH
Channel B - DIMM 1
Example
2
Channel A - DIMM 1
Intel
82875P
MCH
Channel B - DIMM 1
OM15981
Figure 5. Examples of Single Channel Configuration without Dynamic Mode
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A
A
A
A
3.2 Intel 875P Chipset
The Intel 875P chipset consists of the following devices:
• Intel 82875P Memory Controller Hub (MCH) with Accelerated Hub Architecture (AHA)
bus
• Intel 82801ER I/O Controller Hub (ICH5-R) with AHA bus
• Intel 82802AC (8 Mbit) Firmware Hub (FWH)
The MCH is a centralized controller for the system bus, the memory bus, the AGP bus, and the
Accelerated Hub Architecture interface. The ICH5-R is a centralized controller for the Server
Board S875WP1-E’s I/O paths. The FWH provides the nonvolatile sto rage of the BIOS. The
component combination provi d es the chipset interfaces as shown in Figure 6.
System Bus
82875P
Memory Controller
Hub (MCH)
Dual-Channel
GP
Interface
DDR SDRAM
875P Chipset
Bus
UDMA 33
TA-66/100
HA
Bus
I/O Controller Hub
SATA
SMBus
Ports
82801ER
(ICH5-R)
PCI
Bus
Network
USB
82802AC
8 Mbit Firmware
Hub (FWH)
LPC Bus
C Link
OM15967
Figure 6. Intel 875P Chipset Block Diagram
For information about Refer to
The Intel 875P chipset http://developer.intel.com
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3.2.1 AGP
The AGP connector supports the following:
• 4x, 8x AGP 3.0 add-in cards with 0.8 V I/O
• 1x, 4x AGP 2.0 add-in cards with 1.5 V I/O
AGP is a high-performance interface for graphics-intensive applications, such as 3D
applications. While based on the PCI Local Bus Specification, Rev. 2.2, AGP is independent of
the PCI bus and is intended for exclusive use with graphical display devices. AGP overcomes
certain limitations of the PCI bus related to handling large amounts of graphics data with the
following features:
• Pipelined memory read and write operations that hide memory access la tency
• Demultiplexing of address and data on the bus for nearly 100 percent efficiency
NOTES
• AGP 2x operation is not supported.
• Install memory in the DIMM sockets prior to installing the AGP video card to avoid
interference with the memory retention mechanism.
• The AGP connector is keyed for Universal 0.8 V AGP 3.0 cards or 1.5 V AGP 2.0 cards
only. Do not attempt to install a legacy 3.3 V AGP card. The AGP connector is not
mechanically compatible with legacy 3.3 V AGP cards.
For information about Refer to
The AGP connector Section 5.3
3.2.2 USB
The Intel Server Board S875WP1-E supports up to six USB 2.0 ports, supports Universal Host
Controller Interface (UHCI) and En hanced Host Controller Interface (EHCI), and uses UHCIand EHCI-compatible drivers.
The ICH5-R provides the USB controller for all ports, as shown in Figure 7. The port
arrangement is as follows:
• Two ports are implemented with stacked back panel connectors, above NIC1
• Two ports are implemented with stacked back panel connectors, above NIC2
• Two ports are routed to the front panel USB header
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I/O Controller Hub
82801ER
(ICH5-R)
USB
USB
USB ports [2]
USB ports [2]
USB
USB ports [2]
Back panel USB connectors
above NIC1
Back panel USB connectors
above NIC2
Front panel USB header
Providing up to 2 USB ports
OM16101
Figure 7. USB Port Configuration
NOTES
• Computer systems that have an unshielded cable atta ched to a USB port may not meet
FCC Class B requirements, even if no device is attached to the cable. Use shielded
cable that meets the requirements for full-speed devices.
• Native USB 2.0 support has been tested with Windows* 2000 and Windows XP drivers
and is not currently supported by any other operating system. See the Intel server board
support website at http://support.intel.com/support/motherboards/server/s875wp1-e for
possible driver updates for other operating systems.
For information about Refer to
The location of the USB connectors on the back panel Figure 1
The location of the front panel USB connector Figure 1
The signal names of the front panel USB header Section 5.9
Legacy USB support Section 6.4
Wake from USB Section 3.6
3.2.3 IDE Interfaces
The ICH5-R IDE controller has two independent bus-mastering IDE interfaces that can be
independently enabled. The IDE interfaces support the follo wing modes:
• Programmed I/O (PIO): processor controls data transfer.
• 8237-style DMA: DMA offloads the processor, supporting transfer rates of up to 16 MB/se c .
• Ultra DMA: DMA protocol on IDE bus supporting host and target throttling and transfer rates
of up to 33 MB/sec.
• ATA-66: DMA protocol on IDE bus supporting host and target throttli ng and transfer
rates of up to 66 MB/sec. The ATA-66 protocol is similar to Ultra DMA and is device
driver compatible.
• ATA-100: DMA protocol on IDE bus allows host and target throttling. The ICH5-R ATA-
100 logic can achieve read transfer rates up to 100 MB/sec and write transfer rates up to
88 MB/sec.
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Functional Architecture S875WP1-E TPS
NOTE
ATA-66 and ATA-100 are faster timings and require a specialized 40-pin, 80-wire cable to
reduce reflections, noise, and inductive coupling.
The IDE interfaces also support ATAPI devices (such as CD-ROM drives) and ATA devices
using the transfer modes. The BIOS supports Logical Block Addressing (LBA) and Extended
Cylinder Head Sector (ECHS) translation modes. The drive reports the tran sfer rate and
translation mode to the BIOS.
The Server Board S875WP1-E supports Laser Servo (LS-120) diskette technol ogy through the
IDE interfaces. The BIOS supports booting from an LS-120 drive.
NOTE
The BIOS will always recognize an LS-120 drive as an ATAPI floppy drive. To ensure correct
operation, do not configure the drive as a hard disk drive.
For information about Refer to
The location of the IDE connectors Figure 1
The signal names of the IDE connectors Table 30
BIOS Setup program’s Boot Configuration menu Section 7.1.3.2
Drive Configuration Submenu Section 7.1.3.4
3.2.3.1 SCSI Hard Drive Activity LED Connec t or
The SCSI hard drive activity LED connector is a 1 x 2-pin connector that allows an add-in
SCSI controller to use the same LED as the on-board IDE controller. For proper ope ration, this
connector should be wired to the LED output of the add-in SCSI controller. Th e LED indicates
when data is being read from, or written to, both the add-in SCSI controller an d the IDE
controller.
For information about Refer to
The location of the SCSI hard drive activity LED connector Figure 1
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3.2.4 Real-Time Clock, CMOS SRAM, and Batt ery
The real-time clock provides a time-of-day clock and a multi-century calen dar with alarm
features. The real-time clock supports 256 bytes of battery-backed CMOS SRAM in two banks
that are reserved for BIOS use.
A coin-cell battery (CR2032) powers the real-time clock and CMOS memory. When the
computer is not plugged into a wall socket, the battery has an estimated life of three yea rs.
When the computer is plugged in, the standby current from the power supply extends the life of
the battery. The clock is accurate to ± 13 minutes/year at 25 ºC with 3.3 VSB applied.
The time, date, and CMOS values can be specified in the BIOS Setup program. The CMOS
values can be returned to their defaults by using the BIOS Setup program.
NOTE
If the battery and AC power fail, custom defaults, if previously saved, will be loaded into CMOS
RAM at power-on.
3.2.5 Intel 82802AC 8 Megabit Firmw are Hub (FWH)
The FWH provides the following:
• System BIOS program
• Logic that enables protection for storing and updating of platform information
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Functional Architecture S875WP1-E TPS
3.3 Serial ATA (SATA) Support
3.3.1 SATA Interfaces
The Serial ATA controller provided by the ICH5-R offers two independent SATA ports with a
theoretical maximum transfer rate of 150MB/s per port. One device can be installed on each
port for a maximum of two SATA devices when using ICH5-R. Server board with order code of
S875WP1 includes only two SATA ports through the ICH5-R. Server board with order code
S875WP1LX includes an additional four SATA ports using an onbo ard Promise* Serial ATA
controller, for a maximum of six SATA drives. A point-to- point interface is used for host to device
connections, unlike IDE which supports a master/slave configuration an d two devices per
channel.
For compatibility, the underlying SATA functionality is transparent to the operating system. The
SATA controller can operate in both legacy and native modes. In legacy mode, standard IDE I/O
and IRQ resources are assigned (IRQ 14 and 15). In native mode, standard PCI resource
steering is used. Native mode is the preferred mode for configurations using the Win do ws XP
and Windows 2000 operating systems.
Key features include:
• Two SATA ports
• Maximum throughput of 150MB/s
• Smaller cable
NOTE
• Many SATA drives use new low-voltage power connectors and require adaptors or
power supplies equipped with low-voltage power connectors. For more information, see:
http://www.serialata.org/
• ATA and SATA add-in controllers may experience resource conflicts IRQ 14 and 15.
Refer to the tested hardware and operating system list at (URL). In some instances,
onboard SATA controller may need to be disable to use those add-in controllers.
3.3.2 SATA RAID with ICH5-R Controller
Support for RAID (Redundant Array of Independent Disks) on the two SATA ports from the
ICH5-R controller is planned for a future date. See
http://support.intel.com/support/motherboards/server/S875WP1-E/
information.
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