Intel S5000XVNSATA, S5000XVNSATAR, S5000XVN Specification

Intel® Workstation Board S5000XVN
Technical Product Specification
Intel order number: D66403-006
Revision 1.5
August 2010
Intel® Workstation Board S5000XVN TPS Revision History
Revision History
Date Revision Number Modifications
August 2006 1.0 First production S5000XVN Technical Product Specification.
March 2007 1.1 Updated Table 1, Figure 1, and Section 3.1.2.
Added Section 3.6.6.
Updated Section 6.1 and 6.2.
Updated Table 33, Appendix A and Table 44.
Added Section 8.2.
June 2007 1.2 Updated to reflect new processor support and new product codes whereever
applicable.
April 2009 1.3 Updated Section 6.3 BIOS Select Jumper.
Updated the Front Panel SSI Standard 24-pin Connector Pin-out (J1E4) table.
Updated Table 1 and Table 8.
Removed ‘dual-core’ from the processor definition.
April 2010 1.4 Removed section 9.3.7 CNCA (CCC-China).
August 2010 1.5 Added Table 6 for quad rank memory and corrected the title of Table 16.
Disclaimers
Information in this document is provided in connection with Intel® products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Intel's Terms and Conditions of Sale for such products, Intel assumes no liability whatsoever, and Intel disclaims any express or implied warranty, relating to sale and/or use of Intel products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right. Intel products are not intended for use in medical, life saving, or life sustaining applications. Intel may make changes to specifications and product descriptions at any time, without notice.
Designers must not rely on the absence or characteristics of any features or instructions marked "reserved" or "undefined." Intel reserves these for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them.
The Intel product to deviate from published specifications. Current characterized errata are available on request.
Intel Corporation server baseboards contain a number of high-density VLSI and power delivery components that need adequate airflow to cool. Intel’s own chassis are designed and tested to meet the intended thermal requirements of these components when the fully integrated system is used together. It is the responsibility of the system integrator that chooses not to use Intel developed server building blocks to consult vendor datasheets and operating parameters to determine the amount of air flow required for their specific application and environmental conditions. Intel Corporation cannot be held responsible if components fail or the server board does not operate correctly when used outside any of their published operating or non-operating limits.
Intel, Pentium, Itanium, and Xeon are trademarks or registered trademarks of Intel Corporation.
®
Workstation Board S5000XVN may contain design defects or errors known as errata which may cause the
*Other brands and names may be claimed as the property of others.
Copyright © Intel Corporation 2010.
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Intel® Workstation Board S5000XVN TPS Table of Contents
Table of Contents
1. Introduction ..........................................................................................................................1
1.1 Chapter Outline........................................................................................................ 1
1.2 Server Board Use Disclaimer .................................................................................. 1
2. Overview ...............................................................................................................................2
2.1 Workstation Board Feature Set ...............................................................................2
2.2 Workstation Board Layout .......................................................................................3
2.2.1 Workstation Board Connector and Component Layout ........................................... 4
2.2.2 Workstation Board Mechanical Drawings................................................................ 6
2.2.3 Workstation Board ATX I/O Layout........................................................................ 12
3. Functional Architecture.....................................................................................................13
3.1 Intel® 5000X Memory Controller Hub (MCH) ......................................................... 14
3.1.1 System Bus Interface............................................................................................. 14
3.1.2 Processor Support.................................................................................................14
3.1.3 Memory Subsystem............................................................................................... 16
3.1.4 Snoop Filter ........................................................................................................... 24
3.2 Enterprise South Bridge (ESB2-E) ........................................................................ 24
3.2.1 PCI Subsystem...................................................................................................... 24
3.2.2 Serial ATA Support................................................................................................ 26
3.2.3 Parallel ATA (PATA) Support ................................................................................ 27
3.2.4 USB 2.0 Support.................................................................................................... 27
3.3 Audio Codec .......................................................................................................... 28
3.4 SAS Controller ....................................................................................................... 29
3.4.1 SAS RAID Support ................................................................................................ 29
3.4.2 SAS/SATA Connector Sharing .............................................................................. 29
3.5 Network Interface Controller (NIC) ........................................................................ 29
3.5.1 Intel® I/O Acceleration Technolgy (Intel® I/OAT).................................................... 30
3.5.2 MAC Address Definition......................................................................................... 30
3.6 Super I/O ...............................................................................................................31
3.6.1 Serial Ports ............................................................................................................ 31
3.6.2 Floppy Disk Controller ........................................................................................... 31
3.6.3 Keyboard and Mouse Support............................................................................... 31
3.6.4 Wake-up Control.................................................................................................... 31
3.6.5 System Health Support.......................................................................................... 32
3.6.6 Trusted Platform Module (TPM) ............................................................................32
4. Platform Management........................................................................................................33
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Table of Contents Intel® Workstation Board S5000XVN TPS
5. Connector/Header Locations and Pin-outs......................................................................35
5.1 Board Connector Information................................................................................. 35
5.2 Power Connectors ................................................................................................. 36
5.3 System Management Headers ..............................................................................37
5.3.1 LCP/AUX IPMB Header......................................................................................... 37
5.3.2 IPMB Header ......................................................................................................... 38
5.3.3 HSBP Header ........................................................................................................ 38
5.3.4 SGPIO Header....................................................................................................... 38
5.3.5 SES I2C..................................................................................................................38
5.3.6 HDD Activity LED Header...................................................................................... 38
5.4 Front Panel Connector........................................................................................... 39
5.5 I/O Connectors....................................................................................................... 39
5.5.1 NIC Connectors ..................................................................................................... 39
5.5.2 IDE Connector ....................................................................................................... 40
5.5.3 SATA/SAS Connectors.......................................................................................... 41
5.5.4 Serial Port Connectors...........................................................................................41
5.5.5 Keyboard and Mouse Connector........................................................................... 42
5.5.6 USB Connector...................................................................................................... 42
5.5.7 CD-IN Header........................................................................................................ 43
5.5.8 Audio Connectors .................................................................................................. 43
5.6 Fan Headers .......................................................................................................... 44
6. Jumper Blocks....................................................................................................................46
6.1 CMOS Clear and Password Reset Usage Procedure ...........................................47
6.2 BMC Force Update Procedure .............................................................................. 47
6.3 BIOS Select Jumper .............................................................................................. 48
7. Intel® Light Guided Diagnostics........................................................................................49
7.1 5 Volt Standby LED ...............................................................................................49
7.2 Fan Fault LEDs......................................................................................................50
7.3 System ID LED and System Status LED ...............................................................51
7.3.1 System Status LED – BMC Initialization................................................................ 53
7.4 DIMM Fault LEDs .................................................................................................. 53
7.5 Processor Fault LEDs............................................................................................54
7.6 Post Code Diagnostic LEDs ..................................................................................54
8. Design and Environmental Specifications.......................................................................56
8.1 Intel® Workstation Board S5000XVN Design Specifications.................................. 56
8.2 Board-level MTBF.................................................................................................. 57
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8.3 Workstation Board Power Requirements............................................................... 57
8.3.1 Processor Power Support...................................................................................... 59
8.4 Power Supply Output Requirements ..................................................................... 59
8.4.1 Grounding..............................................................................................................60
8.4.2 Standby Outputs.................................................................................................... 60
8.4.3 Remote Sense....................................................................................................... 60
8.4.4 Voltage Regulation ................................................................................................ 60
8.4.5 Dynamic Loading................................................................................................... 61
8.4.6 Capacitive Loading ................................................................................................ 61
8.4.7 Ripple/Noise .......................................................................................................... 62
8.4.8 Timing Requirements............................................................................................. 63
8.4.9 Residual Voltage Immunity in Standby Mode........................................................ 65
9. Regulatory and Certification Information.........................................................................66
9.1 Product Regulatory Compliance ............................................................................ 66
9.1.1 Product Safety Compliance ................................................................................... 66
9.1.2 Product EMC Compliance – Class A Compliance................................................. 66
9.1.3 Certifications/Registrations/Declarations...............................................................67
9.2 Product Regulatory Compliance Markings ............................................................ 67
9.3 Electromagnetic Compatibility Notices ..................................................................68
9.3.1 FCC Verification Statement (USA) ........................................................................68
9.3.2 ICES-003 (Canada) ............................................................................................... 68
9.3.3 Europe (CE Declaration of Conformity) .................................................................69
9.3.4 VCCI (Japan)......................................................................................................... 69
9.3.5 BSMI (Taiwan)....................................................................................................... 69
9.3.6 RRL (Korea)...........................................................................................................69
9.4 Restriction of Hazardous Substances (RoHS) Compliance................................... 70
Appendix A: Integration and Usage Tips................................................................................71
Appendix B: BMC Sensor Tables............................................................................................72
Appendix C: POST Code Diagnostic LED Decoder...............................................................87
Appendix D: POST Code Errors ..............................................................................................91
Appendix E: Supported Intel® Server Chassis.......................................................................94
Glossary.....................................................................................................................................95
Reference Documents..............................................................................................................98
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List of Figures Intel® Workstation Board S5000XVN TPS
List of Figures
Figure 1. Workstation Board Photograph...................................................................................... 3
Figure 2. Major Board Components.............................................................................................. 5
Figure 3. Mounting Hole Positions ................................................................................................ 6
Figure 4. Component Positions..................................................................................................... 7
Figure 5. Restricted Areas on Side 1 ............................................................................................8
Figure 6. Restricted Areas on Side 2 ............................................................................................9
Figure 7. Restricted Areas on Side 2, “Detail B” ......................................................................... 10
Figure 8. CPU and Memory Duct Keepout ................................................................................. 11
Figure 9. ATX I/O Layout ............................................................................................................ 12
Figure 10. Functional Block Diagram..........................................................................................13
Figure 11. CEK Processor Mounting ..........................................................................................16
Figure 12. Memory Layout .......................................................................................................... 17
Figure 13. Minimum 2-DIMM Memory Configuration .................................................................. 21
Figure 14. Recommended Four DIMM Configuration ................................................................. 22
Figure 15. Single Branch Mode Sparing DIMM Configuration .................................................... 23
Figure 16. Audio Subsystem Block Diagram ..............................................................................28
Figure 17. Rear I/O Panel Audio Connector ............................................................................... 29
Figure 18. SMBUS Block Diagram.............................................................................................. 34
Figure 19. Jumper Blocks (J1C3, J1D1, J1D2, and J1E32) .......................................................46
Figure 20. 5 Volt Standby Status LED Location.......................................................................... 49
Figure 21. Fan Fault LED Locations ........................................................................................... 50
Figure 22. System ID LED and System Status LED Locations................................................... 51
Figure 23. DIMM Fault LED Locations........................................................................................ 53
Figure 24. Processor Fault LED Locations ................................................................................. 54
Figure 25. POST Code Diagnostic LED Location ....................................................................... 55
Figure 26. Power Distribution Block Diagram ............................................................................. 58
Figure 27. Output Voltage Timing ............................................................................................... 64
Figure 28. Turn On/Off Timing (Power Supply Signals).............................................................. 65
Figure 29. Diagnostic LED Placement Diagram .........................................................................87
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Intel® Workstation Board S5000XVN TPS List of Tables
List of Tables
Table 1. Workstation Board Features ........................................................................................... 2
Table 2. Processor Support Matrix .............................................................................................14
Table 3. I2C Addresses for Memory Module SMB ......................................................................17
Table 4. Maximum Eight-DIMM System Memory Configruation – x8 Single Rank ..................... 18
Table 5. Maximum Eight-DIMM System Memory Configuration – x4 Dual Rank........................ 18
Table 6. Maximum Eight-DIMM System Memory Configuration – x2 Quad Rank ...................... 18
Table 7. DIMM Population Rules ................................................................................................ 20
Table 8. PCI Bus Segment Characteristics................................................................................. 25
Table 9. NIC2 Status LED........................................................................................................... 30
Table 10. Serial B Header Pin-out .............................................................................................. 31
Table 11. Board Connector Matrix .............................................................................................. 35
Table 12. Power Connector Pin-out (J9B5) ................................................................................ 36
Table 13. 12-V Power Connector Pin-out (J3J2) ........................................................................ 37
Table 14. Power Supply Signal Connector Pin-out (J9D1) ......................................................... 37
Table 15. P12V4 Power Connector Pin-out (J5A2) ....................................................................37
Table 16. LCP/AUX IPMB Header Pin-out (J2J1)....................................................................... 37
Table 17. IPMB Header Pin-out (J4J1) ....................................................................................... 38
Table 18. HSBP Header Pin-out (J1J7, J1J2) ............................................................................38
Table 19. SGPIO Header Pin-out (J2H1, J1J5) .......................................................................... 38
Table 20. SES I2C Header Pin-out (J1J3)...................................................................................38
Table 21. HDD Activity LED Header Pin-out (J2J3).................................................................... 38
Table 22. Front Panel SSI Standard 24-pin Connector Pin-out (J1E4) ......................................39
Table 23. RJ-45 10/100/1000 NIC Connector Pin-out (JA6A1, JA6A2)...................................... 39
Table 24. IDE 40-pin Connector Pin-out (J2J2) .......................................................................... 40
Table 25. SATA/SAS Connector Pin-out (J1J1, J1H2, J1H1, J1G2, J1G1, J1F2) ..................... 41
Table 26. External DB9 Serial A Port Pin-out (J7A1).................................................................. 41
Table 27. Internal 9-pin Serial B Header Pin-out (J1B1)............................................................. 42
Table 28. Stacked PS/2 Keyboard and Mouse Port Pin-out (J9A1) ........................................... 42
Table 29. External USB Connector Pin-out (JA6A1, JA6A2)...................................................... 43
Table 30. Internal USB Connector Pin-out (J3J1)....................................................................... 43
Table 31. CD-IN Header Pin-out (J4A1) ..................................................................................... 43
Table 32. SSI 4-pin Fan Header Pin-out (J9J1, J5J1, J9B3, and J9B4).....................................44
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List of Tables Intel® Workstation Board S5000XVN TPS
Table 33. SSI 6-pin Fan Header Pin-out (J3H1, J3H2, J3H3, and J3H4)................................... 44
Table 34. Server Board Jumpers (J1C3, J1D1, J1D2, and J1E3) .............................................. 46
Table 35. System Status LED.....................................................................................................52
Table 36. Workstation Board Design Specifications ................................................................... 56
Table 37. Intel® Xeon® Processor Dual Processor TDP Guidelines ........................................... 59
Table 38. 550 W Load Ratings ...................................................................................................59
Table 39. Voltage Regulation Limits ........................................................................................... 61
Table 40. Transient Load Requirements..................................................................................... 61
Table 41. Capacitive Loading Conditions ...................................................................................62
Table 42. Ripple and Noise......................................................................................................... 63
Table 43. Output Voltage Timing ................................................................................................ 63
Table 44. Turn On/Off Timing ..................................................................................................... 64
Table 45. BMC Sensors..............................................................................................................74
Table 46. POST Progress Code LED Example ..........................................................................87
Table 47. Diagnostic LED POST Code Decoder ........................................................................ 88
Table 48. POST Error Messages and Handling.......................................................................... 91
Table 49. POST Error Beep Codes ............................................................................................93
Table 50. BMC Beep Codes ....................................................................................................... 93
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Intel® Workstation Board S5000XVN TPS Introduction

1. Introduction

This Technical Product Specification (TPS) provides board-specific information about the features, functionality, and high-level architecture of the Intel
See the Intel
®
S5000 Server Board Family Datasheet for details about board subsystems,
®
Workstation Board S5000XVN.
including the chipset, BIOS, and server management. In addition, design level information for specific subsystems can be obtained by ordering the
External Product Specifications (EPS) for a given subsystem. EPS documents are not publicly available and must be ordered through your local Intel representative.
The Intel which may cause the product to deviate from published specifications. Refer to the Intel
®
Workstation Board S5000XVN may contain design defects or errors known as errata
®
Server
Board S5000XVN Specification Update for published errata.

1.1 Chapter Outline

This document is divided into the following chapters
Chapter 1 – Introduction Chapter 2 – Workstation Board Overview Chapter 3 – Functional Architecture Chapter 4 – Platform Management Chapter 5 – Connector and Header Location and Pin-out Chapter 6 – Configuration Jumpers Chapter 7 – Light-Guided Diagnostics Chapter 8 – Power and Environmental specifications Chapter 9 – Regulatory and Certification Information Appendix A – Integration and Usage Tips Appendix B – BMC Sensor Tables Appendix C – POST Code Diagnostic LED Decoder Appendix D – POST Code Errors Appendix E – Supported Intel Glossary Reference Documents
®
Server Chassis

1.2 Server Board Use Disclaimer

Intel Corporation server boards support add-in peripherals and contain a number of high-density VLSI and power delivery components that need adequate airflow to cool. Intel ensures through its own chassis development and testing that when Intel server building blocks are used together, the fully integrated system will meet the intended thermal requirements of these components. It is the responsibility of the system integrator who chooses not to use Intel­developed server building blocks to consult vendor datasheets and operating parameters to determine the amount of air flow required for their specific application and environmental conditions. Intel Corporation cannot be held responsible if components fail or the server board does not operate correctly when used outside any of their published operating or non-operating limits.
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Overview Intel® Workstation Board S5000XVN TPS

2. Overview

The Intel® Workstation Board S5000XVN is a monolithic printed circuit board (PCB) with features that support the pedestal workstation market.

2.1 Workstation Board Feature Set

Table 1. Workstation Board Features
Feature Description
Processors Socket J (771-pin LGA sockets) supporting one or two Intel® Xeon® processors 5000
sequence, with system bus speeds of 667 MHz, 1066 MHz, and 1333 MHz.
Memory Eight DIMM sockets supporting fully buffered DIMM technology (FBDIMM) memory.
240-pin DDR2-533 and DDR2-677 FBDIMMs can be used.
Chipset Intel® 5000X Memory Controller Hub
Intel
Onboard Connectors/Headers
Add-in PCI, PCI-X*, and PCI Express* Cards
Audio Realtec* ALC260 2-channel high-definition audio codec with universal audio
Hard Drive Support for six SATA-2 hard drives
LAN Two 10/100/1000 Intel® 82563EB PHYs supporting Intel® I/O Acceleration Technology
External connections:
Stacked PS/2* ports for keyboard and mouse
DB9 serial port A connector
Two RJ-45/2xUSB connectors for 10/100/1000 Mb and USB 2.0 support
One USB 2x5 pin header, which supports two USB ports
One USB port Type A connector
One DH10 serial port B header
Six SATA-2 connectors with integrated RAID 0, 1, and 10 support
Software RAID 5 support through an optional SATA RAID KEY
Two SATA-2 connectors and four SATA-2/SAS connectors with integrated RAID 0,
Software RAID 5 support through an optional SAS RAID KEY (order codes
Stacked audio connectors (audio in, audio out, microphone)
One ATA100 40-pin connector
SSI-compliant front panel header
SSI-compliant 24-pin main power connector, supporting the ATX-12 V standard on
One full-length/full-height PCI-X 64-bit slot with up to 100 MHz support
One full-length/full-height PCI-X 64-bit slot with up to 133-MHz support when only
One full-length/full-height PCI Express* x4 (x4 throughput) - (x8 (x8 throughput)
One half-length/full-height PCI Express* x4 (x4 Throughput) slot
One full-length/full-height PCI Express* x16 (x16 throughput) slot
architecture (24-bit, 2-channel DAC, two stereo 20-bit ADCs)
Support for four SAS hard drives (order codes S5000XVNSASR and BB5000XVNSASR only)
®
ESB2-E I/O Controller
(order codes S5000XVNSATAR & BB5000XVNSATAR only)
1, and 10 support (order codes S5000XVNSASR & BB5000XVNSASR only)
S5000XVNSASR and BB5000XVNSASR only)
the first 20 pins
one PCI-X slot is populated
with order codes S5000XVNSATAR & BB5000XVNSATAR only) slot
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Feature Description
Fans Support for
Two processor fans
Four front hot-swap fans
Two rear system fans
Server Management Support for Intel® System Management Software

2.2 Workstation Board Layout

Figure 1. Workstation Board Photograph
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Overview Intel® Workstation Board S5000XVN TPS

2.2.1 Workstation Board Connector and Component Layout

The following figure shows the board layout of the workstation board. Each connector and major component is identified by a letter. A component descriptions table follows the figure.
G
A B
DC
E
H
F
I
J
RR
QQ
K
L
M
PP
N
OO
NN
MM
O
LL
KK
JJ
II
P
Q
HH
GG
FF
R
S
EE
T
YXW
V
U
AF000499
2
SES I
C (order code
S5000XVNSASR only)
code S5000XVNSASR only)
order code S5000XVNSASR only)
order code S5000XVNSASR only)
DD ZBB
AACC
A. PCI-X* 64-bit, 100-MHz full­length/full-height slot 1
B. PCI-X 64-bit, 133-/100-MHz full­length/full-height slot 2
C. PCI Express* x4 (S5000XVNSASR) or x8 (S5000XVNSATAR) full-length/full­height slot 3 (x8 connector)
D. PCI Express* x4 half-length/full­height slot 4 (x8 connector)
E. CMOS battery T. System fan 4 header II. SATA 2 or SAS 0 (SAS 0 on order
F. PCI Express x16 full-length/full­height slot 6 (x16 connector)
G. CD-ROM line-in connector V. IPMB connector KK. SATA 4 or SAS 2 (SAS 2 on
P. Processor 1 socket EE. Enclosure management SAS
Q. Processor 2 socket FF. Hot-swap backplane A header
R. Processor 2 fan header GG. SATA 0
S. Processor 1 fan header HH. SATA 1
U. System fan 3 header JJ. SATA 3 or SAS 1 (SAS 1 on
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H. P12V4 connector W. System fan 2 header LL. SATA 5 or SAS 3 (SAS 3 on
order code S5000XVNSASR only)
I. Back panel I/O ports X. System fan 1 header MM. USB port
J. Diagnostic and Identify LEDs Y. Processor power connector NN. Front control panel header
K. System fan 6 header Z. USB header OO. SATA software RAID 5 key
connector
L. System fan 5 header AA. IDE connector PP. SAS software RAID 5 key
connector (order code S5000XVNSASR only)
M. Main power connector BB. Enclosure management SATA
SGPIO header
N. Auxilliary power signal connector CC. Hot-swap backplane B header RR. Chassis intrusion header
O. DIMM sockets DD. Enclosure management SAS
SGPIO header (order code S5000XVNSASR only)
QQ. Serial B/emergency management port header
Figure 2. Major Board Components
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2.2.2 Workstation Board Mechanical Drawings

Figure 3. Mounting Hole Positions
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Figure 4. Component Positions
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304.80
12.000[]
20.32
0.800[]
TYP
60.100
2.3661[]
IMM3 COMPONENT HEIGHT 3.6 MM
72.800
2.8661[]
HEATSINK DISSASEMBLY AREA, .275" [8.26mm] MAX COMPONENT HEIGHT RESTRICTION, 4 PLACES
Ø
10.160
0.4000[] GROUND PAD BOTH SIDES NO COMPONENT 8 PLCS
.433" [14mm] MAX COMPONENT HEIGHT RESTRICTION
SOCKET AREA, NO COMPONENT PLACEMENT ALLOWED, 2 PLACES
93.98
3.700[]
326.57
12.857[] TYP
330.20
13.000[]
18.72
0.737[]
311.66
12.270[] TYP
322.40
12.693[] TYP
TYP
301.50
11.870[] TYP
11.20
0.441[]
116.000
4.5669[]
5.33
0.210[] TYP
7.92
0.312[] TYP
16.05
0.632[] TYP
60.96
2.400[]
3
.118" [3.81mm] MAX COMPONENT HEIGHT RESTRICTION, 2 PLACES
HEATSINK AREA. .325" [8.26mm] MAX COMPONENT HEIGHT RESTRICTIO, 2 PLACES
MAX HEIGHT OF COMPONENTS AND MATING COMPONENTS SHALL NOT EXCEED 15.24mm [.600"]
Figure 5. Restricted Areas on Side 1
22.86
6.35
0.250[]
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0.3000[]
20.320
0.8000[] 11 PLCS
5.08
0.200[] TYP
R TYP14.730
0.5799[]
.100 [2.54<<] MAX COMPONENT HEIGHT IN THESE ZONES
96.52
3.800[]
12.07
0.475[]
TYP7.620
57.15
2.250[]
LIMITED COMPONENT HEIGHT .058" MAXIMUM 13 PLACES
3
R
25.40
1.000[]
TYP
20.320
0.8000[]
2X 8.000
0.3150[]
NO COMPONENTS ALLOWED TRACES OKAY IN THIS REGION
2X 3.120
0.1228[]
78.74
3.100[]
2X 0.350
0.0138[]
Ø
GROUND PAD
10.160
0.4000[] NO COMPONENT 1 PLACE
2
66.554
2.6202[]
177.80
7.000[]
SEE DETAIL B
7.62
0.300[]
12.70
0.500[]
5.08
0.200[]
CEK HEATSINK SPRING PLATE ZONE NO COMPONENT PLACEMENT OR THROUGH HOLE LEADS ALLOWED
NO COMPONENTS THIS ZONE 16 PLCS
17.78
0.700[]
5.08
0.200[]
Figure 6. Restricted Areas on Side 2
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3X 4.00
3X 10.13
0.399[]
5.00
0.197[]
0.157[]
5.00
0.197[]
Figure 7. Restricted Areas on Side 2, “Detail B”
3X 3.00
CHASSIS ID PADS
0.118[]
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10.160 [0.4000]
0.000 [0.0000]
320.040 [12.6000]
16.510 [0.6500]
0.000 [0.0000]
14.0mm COMPONENT HEIGHT LIMIT DEFINED BY DUCT DETAIL
SUPPORT AREA, NO COMPONENT ALLOWED
145.600 [5.7323]
154.685 [6.0900]
15.0mm COMPONENT HEIGHT LIMIT DEFINED BY DUCT DETAIL
235.085 [9.2553]
9.0 mm COMPONENT HEIGHT LIMIT DEFINED BY DUCT DETAIL
27.0 mm COMPONENT HEIGHT LIMIT DEFINED BY DUCT DETAIL
13.0 mm COMPONENT HEIGHT LIMIT DEFINED BY DUCT DETAIL
317.580 [12.5032]
14.0mm COMPONENT HEIGHT LIMIT DEFINED BY DUCT DETAIL
26.635 [1.0486]
73.482 [2.8930]
97.846 [3.8522]
118.351
[4.6595]
111.351 [4.3839]
143.732 [5.6588]
282.585 [11.1254]
188.152 [7.4076]
193.152 [7.6044]
SUPPORT AREA, NO COMPONENT ALLOWED
194.152
[7.6438]
187.152
[7.3682]
288.290 [11.3500]
273.091 [10.7516]
26.578 [1.0464]
43.302 [1.7048]
143.136 [5.6353]
168.123 [6.6190]
178.578 [7.0306]
16.5mm COMPONENT HEIGHT LIMIT DEFINE BY DUCT DETAIL
1.25mm COMPONENT HEIGHT LIMIT DEFINE BY DUCT DETAIL
NO COMPONENT ALLOWED
107.920 [4.2488]
117.851 [4.6398]
101.402 [3.9922]
112.851 [4.4430]
Figure 8. CPU and Memory Duct Keepout
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Overview Intel® Workstation Board S5000XVN TPS

2.2.3 Workstation Board ATX I/O Layout

The following drawing shows the layout of the rear I/O components for the workstation board:
E
BA
C D
F
I G
H
AF001037
A. PS/2 mouse F. Audio out
B. Serial A port G. Microphone
C. NIC 1 (1 Gb) H. ID LED
D. NIC 2 I. Keyboard port
E. Audio in
Figure 9. ATX I/O Layout
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Intel® Workstation Board S5000XVN TPS Functional Architecture

3. Functional Architecture

The architecture and design of the Intel® Workstation Board S5000XVN is based on the Intel® S5000X chipset. This chipset is designed for systems that use the Intel
®
Xeon® processor with
system bus speeds of 667 MHz, 1066 MHz, and 1333 MHz.
The chipset contains two main components: the Memory Controller Hub (MCH) for the host bridge and the I/O controller hub for the I/O subsystem. The chipset uses the Enterprise South Bridge (ESB2-E) for the I/O controller hub. This chapter provides a high-level description of the functionality associated with each chipset component and the architectural blocks that make up the server board.
For more information about the functional architecture blocks, see the Intel
®
S5000 Server
Board Family Datasheet.
Figure 10. Functional Block Diagram
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Functional Architecture Intel® Workstation Board S5000XVN TPS
3.1 Intel
®
5000X Memory Controller Hub (MCH)
The Memory Controller Hub (MCH) is a single 1432-pin FCBGA package, which includes the following core platform functions:
System Bus Interface for the processor subsystem
Memory Controller
PCI-Express Ports including the Enterprise South Bridge Interface (ESI)
FBD Thermal Management
SMBUS Interface
This section provides a high-level overview of some of these core functions as they pertain to
this workstation board. You can obtain additional information from the Intel S5000 Server Board Family Datasheet and the Intel 5000 Series Chipset Memory Controller Hub Datasheet.

3.1.1 System Bus Interface

The MCH is configured for symmetric multi-processing across two independent front side bus (FSB) interfaces that connect to the Intel uses a 64-bit wide 667, 1066, or 1333 MHz data bus. The 1333-MHz data bus is capable of transferring data at up to 10.66 GB/s. The MCH supports a 36-bit wide address bus, capable of addressing up to 64 GB of memory. The MCH is the priority agent for both front side bus interfaces, and is optimized for one processor on each bus.
®
Xeon® processors. Each front side bus on the MCH

3.1.2 Processor Support

The workstation board supports one or two Intel® Xeon® processors 5000 sequence with system bus speeds of 667 MHz, 1066 MHz, and1333 MHz, and core frequencies starting at 2.66 GHz. This workstation board does not support previous generations of the Intel
Note: Only Intel
®
Xeon® processors 5000 Sequence that support system bus speeds of 667 MHz, 1066 MHz, and 1333 MHz are supported on this workstation board. For a list of supported processors, refer to the following table.
Table 2. Processor Support Matrix
Processor Family System Bus Speed Core Frequency Cache Watts Support
Intel® Xeon® Processor 533 MHz All No
Intel® Xeon® Processor 800 MHz All No
Intel® Xeon® Processor 5030 667 MHz 2.66 2 MB 95 Yes
Intel® Xeon® Processor 5050 667 MHz 3.0 GHz 2 MB 95 Yes
Intel® Xeon® Processor 5060 1066 MHz 3.2 GHz 2 MB 130 Yes
Intel® Xeon® Processor 5063 1066 MHz 3.2 GHz 2 MB 95 Yes
Intel® Xeon® Processor 5080 1066 MHz 3.73 GHz 2 MB 130 Yes
Intel® Xeon® Processor 5110 1066 MHz 1.60 GHz 4 MB 65 Yes
Intel® Xeon® Processor 5120 1066 MHz 1.86 GHz 4 MB 65 Yes
Intel® Xeon® Processor 5130 1333 MHz 2.00 GHz 4 MB 65 Yes
Intel® Xeon® Processor 5140 1333 MHz 2.33 GHz 4 MB 65 Yes
®
Xeon® processor.
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Processor Family System Bus Speed Core Frequency Cache Watts Support
Intel® Xeon® Processor 5148 1333 MHz 2.33 GHz 4 MB 40 Yes
Intel® Xeon® Processor 5150 1333 MHz 2.66 GHz 4 MB 65 Yes
Intel® Xeon® Processor 5160 1333 MHz 3.00 GHz 4 MB 80 Yes
Intel® Xeon® Processor E5310 1333 MHz 1.6 GHz 8 MB 80 Yes
Intel® Xeon® Processor E5320 1333 MHz 1.86 GHz 8 MB 80 Yes
Intel® Xeon® Processor E5335 1333 MHz 2.00 GHz 8 MB 80 Yes
Intel® Xeon® Processor E5345 1333 MHz 2.33 GHz 8 MB 80 Yes
Intel® Xeon® Processor X5355 1333 MHz 2.66 GHz 8 MB 120 Yes
3.1.2.1 Processor Population Rules
When two processors are installed, both must be of identical revision, core voltage, and bus/core speed. When only one processor is installed, it must be in the socket labeled CPU1. The other socket must be empty.
The board is designed to provide up to 130 A of current per processor. This board does not support processors with higher current requirements.
No terminator is required in the second processor socket when using a single processor configuration.
3.1.2.2 Common Enabling Kit (CEK) Design Support
The workstation board complies with Intel’s Common Enabling Kit (CEK) processor mounting and heatsink retention solution. The workstation board ships with a CEK spring snapped onto the underside of the workstation board beneath each processor socket. The heatsink attaches to the CEK over the top of the processor and the thermal interface material (TIM). Refer to the following figure for the stacking order of the chassis, CEK spring, workstation board, TIM, and heatsink.
The CEK spring is removable, which allows for the use of non-Intel heatsink retention solutions.
Note: The processor heatsink and CEK spring shown in the following diagram are for reference
purposes only. The actual processor heatsink and CEK solutions compatible with this generation server board may be of a different design.
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Functional Architecture Intel® Workstation Board S5000XVN TPS
Figure 11. CEK Processor Mounting

3.1.3 Memory Subsystem

The MCH supports four fully buffered DIMM (FBD) memory channels. FBD memory uses a narrow, high–speed, frame-oriented interface referred to as a channel. The four FBD channels are organized into two branches of two channels per branch. Each branch is supported by a separate memory controller. The two channels on each branch operate in lock-step to increase FBD bandwidth. The four channels are routed to eight DIMM sockets and are capable of supporting registered DDR2-533 and DDR2-667 FBDIMM memory (stacked or unstacked). Peak theoretical memory data bandwidth is 6.4GB/s with DDR2-533 and 8.0GB/s with DDR2-
667.
On the Intel Branch 0 consists of channels A and B, and Branch 1 consists of channels C and D. FBD memory channels are organized into two branches for support of RAID 1 (mirroring).
®
Workstation Board S5000XVN, a pair of channels becomes a branch where
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Channel B
Channel A
Channel C
Channel D
MCH
DIMM A1
DIMM A2
DIMM B1
DIMM B2
DIMM C1
DIMM C2
DIMM D1
Branch 0
DIMM D2
Branch 1
TP02299
Figure 12. Memory Layout
To boot the system, the system BIOS on the workstation board uses a dedicated I2C bus to retrieve DIMM information needed to program the MCH memory registers. The following table provides the I
2
C addresses for each DIMM socket.
Table 3. I2C Addresses for Memory Module SMB
Device Address
DIMM A1 0xA0
DIMM A2 0xA2
DIMM B1 0xA0
DIMM B2 0xA2
DIMM C1 0xA0
DIMM C2 0xA2
DIMM D1 0xA0
DIMM D2 0xA2
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3.1.3.1 Memory RASUM Features
The MCH supports several memory RASUM (Reliability, Availability, Serviceability, Usability, and Manageability) features. These features include the Intel
®
(Intel
x4 SDDC) for the following:
®
x4 Single Device Data Correction
Memory error detection and correction
Memory scrubbing
Retry on correctable errors
Memory built-in self-test
DIMM sparing
Memory mirroring
®
For more information about these features, refer to the Intel
S5000 Server Board Family
Datasheet.
3.1.3.2 Supported Memory
The workstation board supports up to eight DDR2-533 or DDR2-667 fully-buffered DIMMs (FBD memory). The following tables show the maximum memory configurations supported with the specified memory technology.
Table 4. Maximum Eight-DIMM System Memory Configruation – x8 Single Rank
DRAM Technology
x8 Single Rank
Maximum Capacity
Mirrored Mode
Maximum Capacity
Non-mirrored Mode
256 Mb 1 GB 2 GB
512 Mb 2 GB 4 GB
1024 Mb 4 GB 8 GB
2048 Mb 8 GB 16 GB
Table 5. Maximum Eight-DIMM System Memory Configuration – x4 Dual Rank
DRAM Technology
x4 Dual Rank
256 Mb 4 GB 8 GB
512 Mb 8 GB 16 GB
1024 Mb 16 GB 32 GB
2048 Mb 16 GB 32 GB
Maximum Capacity
Mirrored Mode
Maximum Capacity
Non-mirrored Mode
Table 6. Maximum Eight-DIMM System Memory Configuration – x2 Quad Rank
DRAM Technology
x2 Quad Rank
1024 Mb 16 GB 32 GB
2048 Mb 16 GB 32 GB
Maximum Capacity
Mirrored Mode
Maximum Capacity
Non-mirrored Mode
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Note: This workstation board supports only fully buffered DDR2 DIMMs (FBDIMMs. See the
®
Intel
Workstation Board S5000XVN Tested Memory List for a list of supported memory for this
server board.
3.1.3.3 DIMM Population Rules and Supported DIMM Configurations
DIMM population rules depend on the operating mode of the memory controller, which is determined by the number of DIMMs installed. You must populate DIMMs in pairs. DIMM pairs are populated in the following DIMM socket order:
A1 and B1
C1 and D1
A2 and B2
C2 and D2
DIMMs within a given pair must be identical with respect to size, speed, and organization. However, DIMM capacities can be different between different DIMM pairs. For example, a valid mixed DIMM configuration may have 512 MB FBDIMMs installed in DIMM sockets A1 and B1, and 1 GB FBDIMMs installed in DIMM sockets C1 and D1.
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Functional Architecture Intel® Workstation Board S5000XVN TPS
In the following table, the following codes are used:
VP: Validated configuration and the slot is populated
SP: Supported, but not validated configuration, and the slot is populated
NP: Slot is not populated
Table 7. DIMM Population Rules
Branch 0 Branch 1
Channel A Channel B Channel C Channel D
DIMM_A1 DIMM_A2 DIMM_B1 DIMM B2 DIMM C1 DIMM C2 DIMM D1 DIMM D2
VP NP NP NP NP NP NP NP No No
VP NP VP NP NP NP NP NP No No
SP SP SP SP NP NP NP NP No SP, Yes, Branch 0 only
VP NP VP NP VP NP VP NP VP, Yes No
SP SP SP SP SP NP SP NP No SP, Yes, Branch 0 only
VP VP VP VP VP VP VP VP VP, Yes VP, Yes, Branch 0 and
Notes:
Single channel mode is only tested and supported with a 512 MB x8 FBDIMM installed in DIMM Socket A1.
The supported memory configurations must meet population rules defined above.
For best performance, you should install a minimum of four DIMMs across memory branches.
Although mixed DIMM capacities between channels are supported, Intel
®
does not validate FBDIMMs in mixed DIMM configurations.
Mirroring Possible Sparing Possible
Branch 1
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3.1.3.3.1 Minimum Non-Mirrored Mode Configuration
The workstation board is capable of supporting a minimum of one DIMM installed. However, for system performance reasons, Intel’s recommendation is that at least two DIMMs are installed.
The following diagram shows the recommended minimum DIMM memory configuration. Populated DIMM slots are shown in gray.
MCH
Branch 0
Channel B
Channel A
DIMM A1
DIMM A2
DIMM B1
DIMM B2
DIMM C1
DIMM C2
DIMM D1
DIMM D2
Branch 1
Figure 13. Minimum 2-DIMM Memory Configuration
Channel C
Channel D
TP02300
Note: The workstation board supports single DIMM mode operation. Intel will only validate and
support this configuration with a single 512 MB x8 FBDIMM installed in DIMM socket A1.
3.1.3.4 Non-mirrored Mode Memory Upgrades
The minimum memory upgrade increment is two DIMMs per branch. The DIMMs must cover the same slot position on both channels. DIMMs pairs must be identical with respect to size, speed, and organization. DIMMs that cover adjacent slot positions do not need to be identical.
When adding two DIMMs to the configuration shown in Figure 13 (above), you should populate the DIMMs in DIMM sockets C1 and D1 as shown in the following diagram. Populated DIMM sockets are shown in gray.
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