Intel® E8500/E8501 Chip set North
Bridge (NB) and eXternal Memory
Bridge (XMB)
Thermal/Mechanical Design Guide
May 2006
Document Number 306749-002
INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL® PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY
ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PRO PERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN
INTEL'S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, INTEL ASSUMES NO LIABILITY WHATSOEV ER, AND INTEL DISCLAIMS
ANY EXPRESS OR IMPLIED WARRANTY, RELATING TO SALE AND/OR USE OF INTEL PRODUCTS INCLUDING LIABILITY OR WARRANTIES
RELATING T O FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PA TENT, COPYRIGHT OR OTHER
INTELLECTUAL PROPERTY RIGHT. Intel products are not intended for use in medical, life saving, critical control or safety systems, or in nuclear
facility applications.
Intel may make changes to specifications and product descriptions at any time, without notice.
Designers must not rely on the absence or characteristics of any features or instructions marked “reserved” or “un defined.” Intel reserves these for
future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them.
®
The Intel
may cause the product to deviate from published specifications. Current characterized errata are available on request.
Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order.
Intel, Pentium, Intel Xeon, Intel NetBurst, Intel SpeedStep, Intel Extended Memory 64 Technology and the Intel logo are trademarks or registered
6Intel® E8500/8501 Chipset North Bridge (NB) and eXternal Memory
Bridge (XMB) Thermal/Mechanical Design Guide
1Introduction
As the complexity of computer systems increases, so do the power dissipation requirements. Care
must be taken to ensure that the additional power is properly dissipated. Typical methods to
improve heat dissipation include selective use of ducting, and/or passive heatsinks.
The goals of this document are to:
• Outline the thermal and mechanical operating limits and specifications for the
®
E8500/E8501 chipset North Bridge (NB) component and the Intel® E8500/E8501
• Describe two reference thermal solutions that meet the specification of the E8500/E8501
chipset NB component.
• Describe a reference thermal solution that meets the specification of the E8500/E8501 chipset
XMB component.
Properly designed thermal solutions provide adequate cooling to maintain the E8500/E8501
chipset die temperatures at or below thermal specifications. This is accomplished by providing a
low local-ambient temperature, ensuring adequate local airflow, and minimizi ng the di e to localambient thermal resistance. By maintaining the E8500/E8501 chipset die temperature at or below
the specified limits, a system designer can ensure the proper functionality , performance, and
reliability of the chipset. Operation outside the functional limits can degrade system performance
and may cause permanent changes in the operating characteristics of the component.
The simplest and most cost effective method to improve the inherent system cooling characteristics
is through careful chassis design and placement of fans, vents, and ducts. When additional cooling
is required, component thermal solutions may be implemented in conjunction with system thermal
solutions. The size of the fan or heatsink can be varied to balance size and space constraints with
acoustic noise.
This document addresses thermal design and specifications for the E8500/E8501 chipset NB and
XMB components only. For thermal design information on other chipset components, refer to the
respective component datasheet. For the Intel
®
Intel
6700PXH 64-bit PCI Hub Thermal Design Guidelines. For the ICH5, refer to the
®
Intel
82801EB I/O Controller Hub 5 (ICH5) and Intel® 82801ER I/O Controller Hub 5 R
(ICH5R) Thermal Design Guide.
1.1Design Flow
To develop a reliable, cost-effective thermal solution, several tools have been provided to the
system designer. Figure 1-1 illustrates the design process impl icit to this document and the tools
appropriate for each step.
®
6700PXH 64-bit PCI Hub, refer to the
Intel® E8500 /E8501Chipset North Bridge (NB) and eXternal Memory7
Bridge (XMB) Thermal/Mechanical Design Guide
Introduction
Figure 1-1. Thermal Design Process
1.2Definition of Terms
BGABall grid array. A package type, defined by a resin-fiber substrate, onto which a
die is mounted, bonded and encapsulated in molding compound. The primary
electrical interface is an array of solder balls attached to the substrate opposite
the die and molding compound.
001239
BLTBond line thickness. Final settled thickness of the thermal interface material
after installation of heatsink.
ICH5I/O controller hub. The chipset component that contains the primary PCI
interface, LPC interface, USB, S-ATA, and other legacy functions.
IHSIntegrated Heat Spreader, Integral part of the NB package. It enhances
dissipation of heat generated by the NB die and provides interface surface
between NB die and cooling solution.
IMIIndependent memory Interfaces. Port connecting the NB to the XMB
Intel® 6700PXH
64-bit PCI Hub
The chipset component that performs PCI bridging functions between the PCI
Express* interface and the PCI Bus. It contains two PCI bus interfaces that can
be independently configured to operate in PCI (33 or 66 MHz) or PCI-X*
mode 1 (66, 100 or 133 MHz), for either 32- or 64-bit PCI devices.
T
case_max
Maximum die temperature allowed. This temperature is measured at the
geometric center of the top of the package die.
T
case_min
Minimum die temperature allowed. This temperature is measured at the
geometric center of the top of the package die.
TDPThermal design power. Thermal solutions should be designed to dissipate this
target power level. TDP is not the maximum power that the chipset can
dissipate.
TIMThermal interface material. Thermally conductive material installed between
two surfaces to improve heat transfer and reduce interface contact resistance.
NBIntel
®
E8500/E8501 chipset North Bridge Component. The chipset component
that provides the interconnect to the processors, XMBs and various I/O
components.
8Intel® E8500/E8501 Chipset North Bridge (NB) and eXternal Memory
Bridge (XMB) Thermal/Mechanical Design Guide
XMB Intel® E8500/E8501 chipset eXternal Memory Bridge Component. The chipset
component that bridges the IMI and DDR interfaces.
1.3Reference Documents
The reader of this specification should also be familiar with material and concepts presented in the
following documents:
®
• Intel
• Intel
• Intel
• Intel
• Intel
• Intel
• Intel
• Intel
• Intel
• Intel
• Intel
• Intel
• Dual-Core Intel
• 64-bit Intel
• 64-bit Intel
• 64-bit Intel
• 64-bit Intel
82801EB I/O Controller Hub 5 (ICH5) and Intel® 82801ER I/O Controller Hub 5 R
(ICH5R) Thermal Design Guide
®
82801EB I/O Controller Hub 5 (ICH5) and Intel® 82801ER I/O Controller Hub 5 R
Xeon™ Processor MP with up to 8MB L3 Cache Datasheet
®
Xeon™ Processor MP with up to 8MB L3 Cache Thermal/Mechanical Design
Guidelines
®
Xeon™ Processor MP with 1MB L2 Cache Datasheet
®
Xeon™ Processor MP with 1MB L2 Cache Thermal/Mechanical Design
Guidelines
Introduction
• BGA/OLGA Assembly Development Guide
• Various system thermal design suggestions (http://www.formfactors.org)
Note:Unless otherwise specified, these documents are available through your Intel field sales
representative. Some documents may not be available at this time.
§
Intel® E8500/E8501 Chipset North Bridge (NB) and eXternal Memory9
Bridge (XMB) Thermal/Mechanical Design Guide
Introduction
10Intel® E8500/E8501 Chipset North Bridge (NB) and eXternal Memory
Bridge (XMB) Thermal/Mechanical Design Guide
2Packaging Technology
0.20 –C–
IHS
Substrate
0.435 ± 0.025 mm
See Note 3
Seating Plane
2.44 ± 0.071 mm
See Note 1
Notes:
1. Primary datum -C- and seating plan are defined by the spherical crowns of the solder balls (shown before motherboard attach)
2. All dimensions and tolerances conform to ANSI Y14.5M-1994
3. BGA has a pre-SMT height of 0.5mm and post-SMT height of 0.41-0.46mm
4. Shown before motherboard attach; FCBGA has a convex (dome shaped) orientation before reflow and is expected to have a slightly concave (bowl shaped)
orientation after reflow
0.20
See Note 4
3.79 ± 0.144 mm
4.23 ± 0.146 mm
The E8500/E8501 chipsets consist of four individual components: the NB, the XMB, the
®
6700PXH 64-bit PCI Hub and the I/O controller hub (ICH5R). The E8500/E8501 chipset
Intel
NB component use a 42.5 mm squared, 12-layer flip chip ball grid array (FC-BGA) package (see
Figure 2-1 through Figure 2-3). The E8500/E8501 chipset XM B compo nent uses a 37.5 mm
squared, 10-layer FB-BGA package (see Figure 2-4 through Figure 2-6). For information on the
Intel 6700PXH 64-bit PCI Hub package, refer to the Intel
Thermal/Mechanical Design Guide. For information on the ICH5 package, refer to the
®
Intel
82801EB I/O Controller Hub 5 (ICH5) and Intel® 82801ER I/O Controller Hub 5 R
(ICH5R) Thermal Design Guide.
Figure 2-1. NB Package Dimensions (Top View)
Handling
Exclusion
Area
38.5 mm
®
6700PXH 64-bit PCI Hub
Figure 2-2. NB Package Dimensions (Side View)
NB
TNB
IHS
IHS
42.5 mm
42.5 mm38.5 mm
Intel® E8500/E8501 Chipset North Bridge (NB) and eXternal Memory11
Bridge (XMB) Thermal/Mechanical Design Guide
Packaging Technology
Figure 2-3. NB Package Dimensions (Bottom View)
AV
A
U
AT
A
R
AP
A
N
AM
AL
AK
AJ
A
H
AG
AF
AE
A
A
D
C
AB
AA
Y
W
V
U
T
R
P
N
M
20.202
37X 1.092
L
K
J
H
G
F
E
D
C
B
A
11252321191715139753127293733 3531
37X 1.092
2822262420181614121086423634323038
42.5 + 0.05
A
20.202
42.5 + 0.05
NOTES:
1. All dimensions are in millimeters.
2. All dimensions and tolerances conform to ANSI Y14.5M-1994.
CA0.2
B
12Intel® E8500/E8501 Chipset North Bridge (NB) and eXternal Memory
Bridge (XMB) Thermal/Mechanical Design Guide
Figure 2-4. XMB Package Dimensions (Top View)
Notes:
1. Primary datum -C- and seating plan are defined by the spherical crowns of the solder balls (shown before motherboard attach)
2. All dimensions and tolerances conform to ANSI Y14.5M-1994
3. BGA has a pre-SMT height of 0.5mm and post-SMT height of 0.41-0.46mm
4. Shown before motherboard attach; FCBGA has a convex (dome shaped) orientation befor e reflow and is expected to have a slightly concave
(bowl shaped) orientation after reflow
0.20
–C–
Die
Substrate
0.435 ± 0.025 mm
See Note 3
Seating Plane
2.100 ± 0.121 mm
See Note 1
Decoup
Cap
0.7 mm Max
2.535 ± 0.123 mm
0.84 ± 0.05 mm
0.20
See Note 4
Handling
Exclusion
Area
8.88mm.
14.02mm.
Packaging Tech no lo gy
Die
Keepout
Area
6.65mm.11.73mm.
XMB
Die
23.50mm.
27.50mm.
37.50mm.
Figure 2-5. XMB Package Dimensions (Side View)
37.50mm.27.50mm.23.50mm.
Intel® E8500/E8501 Chipset North Bridge (NB) and eXternal Memory13
Bridge (XMB) Thermal/Mechanical Design Guide
Packaging Technology
5
Figure 2-6. XMB Package Dimensions (Bottom View)
AV
A
U
AT
A
R
AP
A
N
AM
AL
AK
AJ
A
H
AG
AF
AE
A
A
D
C
AB
AA
Y
W
V
U
T
R
P
N
M
20.202
37X 1.092
L
K
J
H
G
F
E
D
C
B
A
37X 1.092
11252321191715139753127293733 3531
2822262420181614121086423634323038
42.5 + 0.0
A
20.202
42.5 + 0.05
CA0.2
2.1Package Mechanical Requirements
The E8500/E8501c chipset NB package has an IHS and the XMB package has an exposed bare die
which is capable of sustaining a maximum static normal load of 15-lbf. The package is NOT
capable of sustaining a dynamic or static compressive load applied to any edge of the bare die.
These mechanical load limits must not be exceeded during heatsink installation, mechanical stress
testing, standard shipping conditions and/or any other use condition.
Notes:
1. The heatsink attach solutions must not include continuous stress onto the chipset package with
the exception of a uniform load to maintain the heatsink-to-package thermal interface.
2. These specifications apply to uniform compressive loading in a direction perpendicular to the
bare die/IHS top surface.
3. These specifications are based on limited testing for design characterization. Loading limits
are for the package only
§
B
14Intel® E8500/E8501 Chipset North Bridge (NB) and eXternal Memory
Bridge (XMB) Thermal/Mechanical Design Guide
3Thermal Specifications
3.1Thermal Design Power (TDP)
Analysis indicates that real applications are unlikely to cause the E8500/E8501 chipset NB/XMB
components to consume maximum power dissipation for sustained time periods. Therefore, in
order to arrive at a more realistic power level for thermal design purposes, Intel characterizes
power consumption based on known platform benchmark applications. The resulting power
consumption is referred to as the Thermal Design Power (TDP). TDP is the target power level that
the thermal solutions should be designed to. TDP is no t th e maxi mu m power that the chipset can
dissipate.
For TDP specifications, see Table 3-1 for the E8500 chipset NB component, Table 3-2 for the
E8501 chipset NB component, Table 3-3 for the E8500 chipset XMB component and Table 3-4 for
the E85001 chipset XMB component FC-BGA packages have poor heat transfer capability into the
board and have minimal thermal capability without a thermal solution. Intel recommends that
system designers plan for one or more heatsinks when using the E8500/E8501 chipsets NB/XMB
components.
3.2Die Case Temperature Specifications
To ensure proper operation and reliability of the E8500/E8501 chipset NB/XMB components, the
die temperatures must be at or between the maximum/minimum operating temperature ranges as
specified in Table 3-1, Table 3-2, Table 3-3 and Table 3-4. System and/or component level thermal
solutions are required to maintain these temperature specifications. Refer to Section 5 for
guidelines on accurately measuring package die temperatures.
Table 3-1. Intel® E8500 Chipset NB Thermal Specifications
ParameterValueNotes
T
case_max
T
case_min
TDP
with 1 XMB attached
TDP
with 2 XMBs attached
TDP
with 3 XMBs attached
TDP
with 4 XMBs attached
NOTE:
1. These specifications are based on silicon characterization, however, they may be updated as further data
becomes available.
104°C
17.9W
19.8W
22.4W
24.5W
5°C
Intel® E8500/E8501 Chipset North Bridge (NB) and eXternal Memory15
Bridge (XMB) Thermal/Mechanical Design Guide
16Intel® E8500/E8501 Chipset North Bridge (NB) and eXternal Memory
Bridge (XMB) Thermal/Mechanical Design Guide
4Thermal Simulation
Intel provides thermal simulation models of the E8500/E8501 chipset NB/XMB component s and
associated user's guides to aid system designers in simulating, analyzing, and optimizing their
thermal solutions in an integrated, system-level environment. The models are for use with the
commercially available Computational Fluid Dynamics (CFD)-based thermal analysis tool
FLOTHERM* (version 3.1 or higher) by Flomerics, Inc. These models are also available in
ICEPAK* format. Contact yo ur Intel field sales representative to order the thermal models and
user's guides.
§
Intel® E8500/E8501 Chipset North Bridge (NB) and eXternal Memory17
Bridge (XMB) Thermal/Mechanical Design Guide
Loading...
+ 37 hidden pages
You need points to download manuals.
1 point = 1 manual.
You can buy points or you can get point for every manual you upload.