Intel E7230 MCH Thermal/mechanical Design Manual
Intel® E7230 Chipset Memory
Controller Hub (MCH)
Thermal/Mechanical Design Guide
July 2005
Document Number: 308335-001
Notice: This document contains information on products in the design phase of development. The information here is subject to change without
notice. Do not finalize a design with this information. Contact your local Intel sales office or your distributor to obtain the latest specification before
placing your product order.
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Designers must not rely on the absence or characteristics of any features or instructions marked “reserved” or “undefined.” Intel reserves these for
future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them.
The Intel® E7230 chipset may contain design defects or errors known as errata, which may cause the product to deviate from published specifications.
Current characterized errata are available upon request.
Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order.
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Copyright © 2005, Intel Corporation. All rights reserved.
* Other brands and names may be claimed as the property of others.
2 Intel® E7230 Chipset Memory Controller Hub (MCH)
Thermal/Mechanical Design Guide
Contents
1 Introduction.........................................................................................................................7
1.1 Definition of Terms ................................................................................................7
1.2 Reference Documents...........................................................................................8
2 Packaging Technology.......................................................................................................9
2.1 Package Mechanical Requirements....................................................................11
3 Thermal Specifications.....................................................................................................13
3.1 Thermal Design Power (TDP) .............................................................................13
3.2 Die Case Temperature........................................................................................13
4 Thermal Simulation ..........................................................................................................15
5 Thermal Metrology ...........................................................................................................17
5.1 Die Temperature Measurements.........................................................................17
5.1.1 Zero Degree Angle Attach Methodology ................................................17
5.2 Power Simulation Software .................................................................................19
6 Reference Thermal Solution.............................................................................................21
6.1 Operating Environment .......................................................................................21
6.2 Heatsink Performance.........................................................................................21
6.3 Mechanical Design Envelope..............................................................................22
6.4 Board-Level Components Keepout Dimensions .................................................23
6.5 Plastic Wave Soldering Heatsink Thermal Solution Assembly............................24
6.5.1 Heatsink Orientation...............................................................................25
6.5.2 Extruded Heatsink Profiles.....................................................................26
6.5.3 Mechanical Interface Material ................................................................26
6.5.4 Thermal Interface Material .....................................................................26
6.5.5 Heatsink Clips ........................................................................................27
6.5.6 Clip Retention Anchors...........................................................................28
6.6 Reliability Guidelines...........................................................................................28
A Thermal Solution Component Suppliers...........................................................................29
A.1 Plastic Wave Soldering Heatsink Thermal Solution ............................................29
B Mechanical Drawings .......................................................................................................31
Intel® E7230 Chipset Memory Controller Hub (MCH)
Thermal/Mechanical Design Guide 3
Figures
2-1 MCH Package Dimensions (Top View).................................................................9
2-2 MCH Package Dimensions (Side View)..............................................................10
2-3 MCH Package Dimensions (Bottom View)..........................................................10
5-1 Thermal Solution Decision Flowchart..................................................................18
5-2 Zero Degree Angle Attach Heatsink Modifications..............................................18
5-3 Zero Degree Angle Attach Methodology (Top View)...........................................18
6-1 Plastic Wave Soldering Heatsink Measured Thermal Performance
versus Approach Velocity....................................................................................22
6-2 Plastic Wave Soldering Heatsink Volumetric Envelope for the Chipset MCH.....23
6-3 Plastic Wave Soldering Heatsink Board Component Keepout ...........................24
6-4 Retention Mechanism Component Keepout Zones ........................................... 25
6-5 Plastic Wave Soldering Heatsink Assembly .......................................................26
6-6 Plastic Wave Soldering Heatsink Extrusion Profile ............................................27
B-1 Plastic Wave Soldering Heatsink Assembly Drawing .........................................32
B-2 Plastic Wave Soldering Heatsink Drawing (1 of 2)..............................................33
B-3 Plastic Wave Soldering Heatsink Drawing (2 of 2)..............................................34
B-4 Plastic Wave Soldering Heatsink Ramp Clip Drawing (1 of 2)............................35
B-5 Plastic Wave Soldering Heatsink Ramp Clip Drawing (2 of 2)............................36
B-6 Plastic Wave Soldering Heatsink Wire Clip Drawing ..........................................37
B-7 Plastic Wave Soldering Heatsink Solder-down Anchor Drawing ........................38
Tables
3-1 Intel® E7230 Chipset MCH Thermal Specifications............................................13
6-1 Chomerics T710 TIM Performance as a Function of Attach Pressure ...............27
6-2 Reliability Guidelines...........................................................................................28
B-1 Mechanical Drawing List .....................................................................................31
4 Intel® E7230 Chipset Memory Controller Hub (MCH)
Thermal/Mechanical Design Guide
Revision History
Revision
Number
001 • Initial Release. June 2005
Description Revision Date
§
Intel® E7230 Chipset Memory Controller Hub (MCH)
Thermal/Mechanical Design Guide 5
6 Intel® E7230 Chipset Memory Controller Hub (MCH)
Thermal/Mechanical Design Guide
1 Introduction
As the complexity of computer systems increases, so do the power dissipation requirements. Care
must be taken to ensure that the additional power is properly dissipated. Typical methods to
improve heat dissipation include selective use of ducting, and/or passive heatsinks.
The goals of this document are to:
• Outline the thermal and mechanical operating limits and specifications for the Intel
chipset memory controller hub (MCH).
• Describe a reference thermal solution that meets the specification of the Intel
MCH.
Properly designed thermal solutions provide adequate cooling to maintain the Intel E7230 chipset
MCH die temperatures at or below thermal specifications. This is accomplished by providing a low
local-ambient temperature, ensuring adequate local airflow, and minimizing the die to localambient thermal resistance. By maintaining the Intel E7230 chipset MCH die temperature at or
below the specified limits, a system designer can ensure the proper functionality, performance, and
reliability of the chipset. Operation outside the functional limits can degrade system performance
and may cause permanent changes in the operating characteristics of the component.
The simplest and most cost effective method to improve the inherent system cooling characteristics
is through careful chassis design and placement of fans, vents, and ducts. When additional cooling
is required, component thermal solutions may be implemented in conjunction with system thermal
solutions. The size of the fan or heatsink can be varied to balance size and space constraints with
acoustic noise.
®
E7230
®
E7230 chipset
This document addresses thermal design and specifications for the Intel E7230 chipset MCH
components only. For thermal design information on other chipset components, refer to the
respective component datasheet. For the PXH, refer to the Intel® 6700PXH 64-bit PCI Hub/
6702PXH 64-bit PCI Hub (PXH/PXH-V) Thermal/Mechanical Design Guidelines. For the ICH7,
refer to the Intel® I/O Controller Hub 7 (ICH7) Thermal Design Guidelines.
Note: Unless otherwise specified, the term “MCH” refers to the Intel E7230 chipset MCH.
1.1 Definition of Terms
BGA Ball grid array. A package type, defined by a resin-fiber substrate, onto
which a die is mounted, bonded and encapsulated in molding compound.
The primary electrical interface is an array of solder balls attached to the
substrate opposite the die and molding compound.
BLT Bond line thickness. Final settled thickness of the thermal interface
material after installation of heatsink.
MCH Memory controller hub. The chipset component that contains the
processor interface, the memory interface, the PCI Express* interface
and the DMI interface.
PXH Intel® 6700PXH 64-bit PCI Hub. The chipset component that performs
PCI bridging functions between the PCI Express interface and the PCI
Intel® E7230 Chipset Memory Controller Hub (MCH)
Thermal/Mechanical Design Guide 7
Introduction
bus. It contains two PCI bus interfaces that can be independently
configured to operate in PCI (33 or 66 MHz) or PCI-X* mode 1 (66, 100
or 133 MHz), for either 32- or 64-bit PCI devices.
PXH-V Intel® 6702PXH 64-bit PCI Hub. The chipset component that performs
PCI bridging functions between the PCI Express interface and the PCI
Bus. It contains one PCI bus interface that can be configured to operate
in PCI (33 or 66 MHz) or PCI-X mode 1 (66, 100 or 133 MHz).
T
case_max
Maximum die or IHS temperature allowed. This temperature is
measured at the geometric center of the top of the package die or IHS.
T
case_min
Minimum die or IHS temperature allowed. This temperature is measured
at the geometric center of the top of the package die or IHS.
TDP Thermal design power. Thermal solutions should be designed to
dissipate this target power level. TDP is not the maximum power that the
chipset can dissipate.
1.2 Reference Documents
The reader of this specification should also be familiar with material and concepts presented in the
following documents:
Document Title Document Number / Location
Intel® I/O Controller Hub 7 (ICH7) Thermal Design Guidelines
Intel® I/O Controller Hub 7 (ICH7) Datasheet
Intel® E7320 Chipset Memory Controller Hub(MCH) Datasheet
Intel® Pentium® D Processor 840, 830 and 820 Datasheet
Intel® Pentium® D Processor and Intel® Pentium® Processor Extreme
Edition 840 Thermal and Mechanical Design Guidelines
Intel® Pentium® Processor Extreme Edition and Intel® Pentium® D
Processor Specification Update
BGA/OLGA Assembly Development Guide Contact your Intel Field Sales
Various system thermal design suggestions http://www.formfactors.org
Representative
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8 Intel® E7230 Chipset Memory Controller Hub (MCH)
Thermal/Mechanical Design Guide
2 Packaging Technology
The Intel E7230 chipset consist of three individual components: the MCH, the ICH7 and the Intel
6700PXH 64-bit PCI Hub. The Intel E7230 chipset MCH components use a 34 mm squared,
6-layer flip chip ball grid array (FC-BGA) package (see Figure 2-1, Figure 2-2 and Figure 2-3). For
information on the Intel 6700PXH 64-bit PCI Hub package, refer to the Intel® 6700PXH 64-bit
PCI Hub/6702PXH 64-bit PCI Hub (PXH/PXH-V) Thermal/Mechanical Design Guidelines. For
information on the Intel® I/O Controller Hub (ICH7) package, refer to the Intel® I/O Controller
Hub 7 (ICH7) Thermal Design Guidelines.
Figure 2-1. MCH Package Dimensions (Top View)
Capacitor Area,
Handling Exclusion
Zone
15.34 9.14
Handling Area
NOTE: All Dimensions are in millimeters.
19.38
10.67
MCH
Die
6.17
2.54
34.00
Ø5.20mm
Die
Keepout
Area
2.0
34.00
3.0
Intel® E7230 Chipset Memory Controller Hub (MCH)
Thermal/Mechanical Design Guide 9
Packaging Technology
Figure 2-2. MCH Package Dimensions (Side View)
2.355 ± 0.082 mm
Notes:
1. Primary datum -C- and seating plan are defined by the spherical crowns of the solder balls (shown before motherboard attach)
2. All dimensions and tolerances conform to ANSI Y14.5M-1994
3. BGA has a pre-SMT height of 0.5 mm and post-SMT height of 0.41-0.46 mm
4. Shown before motherboard attach; FCBGA has a convex (dome shaped) orientation before reflow and is expected to have a slightly concave
(bowl shaped) orientation after reflow
1.92 ± 0.078 mm
0.435 ± 0.025 mm
Substrate
See note 3
0.84 ± 0.05 mm
Decoup
Cap
Die
Seating Plane
0.7 mm Max
0.20 See note 4.
0.20 –C–
See note 1.
Figure 2-3. MCH Package Dimensions (Bottom View)
NOTES:
1. All dimensions are in millimeters.
2. All dimensions and tolerances conform to ANSI Y14.5M-1994.
10 Intel® E7230 Chipset Memory Controller Hub (MCH)
Thermal/Mechanical Design Guide
2.1 Package Mechanical Requirements
The Intel E7230 chipset MCH package has an exposed bare die which is capable of sustaining a
maximum static normal load of 10 lbf. The package is NOT capable of sustaining a dynamic or
static compressive load applied to any edge of the bare die. These mechanical load limits must not
be exceeded during heatsink installation, mechanical stress testing, standard shipping conditions
and/or any other use condition.
Notes:
1. The heatsink attach solutions must not include continuous stress onto the chipset package with
the exception of a uniform load to maintain the heatsink-to-package thermal interface.
2. These specifications apply to uniform compressive loading in a direction perpendicular to the
bare die top surface.
3. These specifications are based on limited testing for design characterization. Loading limits
are for the package only.
§
Packaging Technology
Intel® E7230 Chipset Memory Controller Hub (MCH)
Thermal/Mechanical Design Guide 11
Packaging Technology
12 Intel® E7230 Chipset Memory Controller Hub (MCH)
Thermal/Mechanical Design Guide
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