This manual describes the technical aspects of the XB1 COM Express Module, required for installation
and system integration. It is intended for the experienced user only.
This manual has been edited as carefully as possible. We apologize for any potential mistake.
Information provided herein is designated exclusively to the proficient user (system integrator,
engineer). EKF can accept no responsibility for any damage caused by the use of this manual.
COM Express™ (also known as ETXexpress™) is
an open PICMG® standard for Computer-OnModules, comprising of latest technologies such
as PCI Express, Serial ATA, Gigabit Ethernet and
SDVO. While designing the carrier board only
once, users profit from upgrading or scaling
their application by simply changing the CPU
module.
Alternatively equipped with the Intel series of
(LV) Pentium® M and ULV Celeron® M
processors and up to 2GB RAM, the EKF
XB1 is
a versatile COM Express basic form factor
module, designed especially for systems which
require high performance at low power
consumption.
technology and has integrated a powerful dual
screen graphics accelerator. The SDVO and VGA
video interfaces allow for attachment of digital flat
panel displays and analog monitors.
The chipset is based on PCI Express
The XB1 is provided with a Gigabit Ethernet
controller, and eight USB 2.0 ports for high speed
communication. Four Serial ATA channels are
available in addition to the legacy PATA I/F. The dual
slot DIMM socket is suitable to address up to 2GB
interleaved (symmetric) dual channel memory.
Typically, the XB1 will be combined with a custom
specific carrier board. As a basic development tool,
EKF can supply a third party evaluation carrier board.
In addition, EKF offers their design services to create
a turn-key ready customer solution.
The XB1 COM Express module is the perfect choice
for embedded applications that require a low power
standard processor at the centre of their design.
OEMs can significantly improve their flexibility and
reduce their total cost by adopting the open
standards based architecture of COM Express.
The XB1 COM Express Module is designed for use with Pentium® M and Celeron® M processors
manufactured in 90nm technology (Dothan). These include also the Ultra Low-Voltage (ULV)
Celeron® M and the Low-Voltage (LV) Pentium® M processors as listed below. The processors are
housed in a Micro FC-BGA package for direct soldering to the PCB, i.e. the CPU chip cannot be
removed or changed by the user.
The processors supported by the XB1 COM Express Module are running at FSB clock speeds of
400MHz and 533MHz. The internal Pentium M processor speed is achieved by multiplying the host
bus frequency by a variable value. The multiplier is chosen by currently required performance and the
actual core temperature. This technology is called Enhanced Intel SpeedStep®.
Power is applied across the COM Express connectors J-COM (+12V). The processor core voltage is
generated by a switched voltage regulator. The processor signals its required core voltage by 6
dedicated pins according to Intels IMVP-IV voltage regulator specification.
90nm (Dothan) Processors Supported
Processor Speed
min/max
[GHz]
2)
2)
1) 2)
1.0/1.04000.550-10006D8hC-0SL8LW
2)
0.6/1.44002100-10006D6h
0.6/1.84002210-10006D6h
0.8/2.05332270-10006D8hC-0SL869
ULV Celeron M 373
LV Pentium M 738
Pentium M 745
Pentium M 760
1)
This processor does not support SpeedStep® technology, instead it runs at a fixed core speed
2)
Following the Intel Embedded Roadmap, this processor is recommended for long time availability
In order to avoid malfunctioning of the XB1 COM Express Module, take care of appropriate cooling
of the processor and system, e.g. by a cooling fan suitable to the maximum power consumption of
the CPU chip actually in use. Please note, that the processors temperature is steadily measured by a
special controller (LM87), attached to the onboard SMBus® (System Management Bus). A second
temperature sensor internal to the LM87 allows for acquisition of the boards surface temperature.
Beside this the LM87 also monitors most of the supply voltages. A suitable software to display both,
the temperatures as well as the supply voltages, is MBM (Motherboard Monitor), which can be
downloaded from the web. After installation, both temperatures and voltages can be observed
permanently from the Windows taskbar.
The XB1 COM Express Module is equipped with a passive heatsink (heat-spreader). In addition, a
forced airflow through the system enclosure by a suitable fan unit is highly recommended (>15m3/h
or 200LFM around the CPU module). As an exception, the XB1-100 (ULV Celeron M 1GHz) can be
operated with natural convection only. Be sure to thoroughly discuss your actual cooling needs with
EKF. Generally, the faster the CPU speed the higher its power consumption. For higher ambient
temperatures, consider increasing the forced airflow to 400 or 600LFM.
The table showing the supported processors above give also the maximum power consumption (TDP
= Thermal Design Power) of a particular processor. Fortunately, the power consumption is by far
lower when executing typical Windows or Linux tasks. The heat dissipation may increase considerably
when e.g. rendering software such as the Acrobat Distiller is executed.
The Pentium M processors support Intel's Enhanced SpeedStep® technology. This enables dynamic
switching between multiple core voltages and frequencies depending on core temperature and
currently required performance. The processors are able to reduce their core speed and core voltage
in up to 8 steps down to 600MHz. This leads to an obvious reduction of power consumption (max.
7.5W @600MHz) resulting in less heating. This mode of lowering the processor core temperature is
called TM2 (TM=Thermal Monitor). Note, that TM2 is not supported by Celeron M processors.
Another way to reduce power consumption is to modulate the processor clock. This mode (TM1) is
supported also by the Celeron M processors and is achieved by actuating the 'Stop Clock' input of the
CPU. A throttling of 50% e.g. means a duty cycle of 50% on the stop clock input. However, while
saving considerable power consumption, the data throughput of the processor is also reduced. The
processor works at full speed until the core temperature reaches a critical value. Then the processor
is throttled by 50%. As soon as the high temperature situation disappears the throttling will be
disabled and the processors runs at full speed again.
A similar feature is embedded within the Graphics and Memory Controller (GMCH) i915GM. An ondie temperature sensor is used to protect the GMCH from exceeding its maximum junction
temperature (T
=105°C) by reducing the memory bandwidth.
J,max
These features are controllable by BIOS menu entries. By default the BIOS of the XB1 COM Express
Module enables mode TM2 which is the most efficient.
The XB1 COM Express Module is equipped with two sockets for installing 200-pin SO-DIMM modules
(module height = 1.25 inch). Supported are unbuffered DDR2 SO-DIMMs (VCC=1.8V) without ECC
featuring on-die termination (ODT), according the PC2-3200 or PC2-4200 specification. Minimum
memory size is 128MB; maximum memory size is 2GB. Due to the video requirements of the i915GM
chipset (some of the system memory is dedicated to the graphics controller), a minimum of 2x256MB
memory is recommended for the operating systems Windows NT 4.0, Windows 2000 or Windows XP.
The contents of the SPD EEPROM on the SO-DIMMs are read during POST (Power-on Self Test) to
program the memory controller within the chipset.
The i915GM chipset supports symmetric and asymmetric memory organization. The maximum
memory performance can be obtained by using the symmetric mode. To achieve this mode, two
SO-DIMMs of equal capacity must be installed in the memory sockets. In asymmetric mode different
memory modules may be used with the drawback of less bandwidth. A special case of asymmetric
mode is to populate only one memory module (i.e. one socket may be left empty).
LAN Subsystem
The Ethernet LAN subsystem is comprised of the Intel 82573 Gigabit Ethernet controller, which
provides also legacy 10Base-T and 100Base-TX connectivity.
<Single PCI Express lane linkage
<1000Base-Tx (Gigabit Ethernet), 100Base-TX (Fast Ethernet) and 10Base-T (Classic Ethernet)
capability
<Half- or full-duplex operation
<IEEE 802.3u Auto-Negotiation for the fastest available connection
<Jumperless configuration (completely software-configurable)
The NIC (Networking Interface Controller) is connected by a single PCI Express lane to the chipset
southbridge (ICH6). Its MAC address (unique hardware number) is stored in a dedicated EEPROM. The
Intel Ethernet software and drivers for the 82573 is available from Intel's World Wide Web site for
download (link provided on the EKF website).
By specification, the XB1 COM Express Module does not provide any I/O connector. Instead, the
carrier board must provide the RJ45 receptacle with integrated magnetics for copper twisted pair
Ethernet. All MDI (Media Dependent Interface) signals of the Ethernet PHY are routed to the
connector J-COM A-B.
The 82573 controller is connected to the PCI Express lane #3. As an alternate stuffing option, this
lane is available across the J-COM connector instead, for carrier board applications which require 4
PCIe lanes (typically configured as PCIe x 4 link). If this stuffing option had been ordered, no Ethernet
connectivity is provided on the XB1 itself, but may be replicated on the carrier board.
The XB1 COM Express Module provides four serial ATA (SATA) ports, each capable of transferring
150MB/s. Integrated within the ICH6, the SATA controller features different modes to support also
legacy operating systems. The SATA channels are available to the carrier board across the J-COM A-B
connector.
Available for download from Intel are drivers for popular operating systems, e.g. Windows® 2000,
Windows® XP and Linux.
Enhanced IDE Interface (PATA)
The parallel ATA (PATA, also known as IDE) interface is provided for attachment of legacy peripheral
devices such as hard disks, ATA CompactFlash cards and CD-ROM drives. The interface supports:
CUp to two ATA devices
CPIO Mode 3/4, Ultra ATA/33, Ultra ATA/66, Ultra ATA/100
The PATA port is available to the carrier board across the J-COM C-D connector. The IDE controller is
integrated into the ICH6. Ultra ATA IDE drivers can be downloaded from the Intel website.
The graphics subsystem is part of the versatile Intel i915GM Graphics/Memory Controller Hub
(GMCH), and is also known as Intel Graphics Media Accelerator (GMA) 900. As an alternative, PCI
Express based graphics is supported (requires discrete PEG controller present on the carrier board).
The main features of the GMA900 are:
<Dual Serial Digital Video Output (SDVO) - allows for two independent DVI connectors
<RGB output - suitable for a VGA style connector
<TV out (HDTV resolution)
<LVDS wide panel support
For legacy CRT style monitors, the XB1 COM Express Module is provided with RGB signals on the
J-COM A-B connector, suitable for a VGA D-Sub accommodated on the carrier board. Also the TV out
and the LCD panel signals (LVDS port) are routed to the J-COM A-B connector.
The GMCH multiplexes a PCI Express Graphics interface with two Intel SDVO ports. The SDVO ports
can each support a single-channel SDVO device. If both ports are active in single-channel mode, they
can have different display timing and data. Alternatively the SDVO ports can be combined to support
dual channel devices, enabling higher resolutions and refresh rates. On the XB1 COM Express Module,
the SDVO/PEG signals are routed to the connector J-COM C-D. Typically, one or two discrete display
transmitter chips located on the carrier board are used to convert Intels proprietary, PCI express based
SDVO interfaces to the differential DVI signals required for attachment of modern flat panel monitors.
E.g., the SiI1362 (Silicon Image) transmitter uses PanelLink® Digital technology to support displays
ranging from VGA to UXGA resolutions (25 - 165Mpps) in a single link interface. With two DVI
connectors on the carrier board, independent dual screen operation is available (this also applies for
one DVI and one D-Sub connector).
The GMCH supports several video resolutions and refresh rates. A partial list is contained in the table
below. Please note, that flat-panel displays should be operated with their native (maximum) resolution
at 60Hz refresh rate (some models also accept 75Hz). 16-bit high colour mode is recommended.
Partial List of i915GM GMCH Video Modes (analog / digital)
Resolution60Hz70Hz72Hz75Hz85Hz
640x480T / TT / TT / TT / TT / T
800x600T / TT / TT / TT / TT / T
1024x768T / T
1280x1024T / T
1600x1200T / T1)
1)
1)
2)
T / TT / TT / TT / T
T / TT / TT / TT / T
T / -T / -T / -T / -
2048x1536T / -T / -T / -T / -- / -
1)
This video mode is suitable for popular flat-panel displays
2)
In dual screen mode 2 x 1600x1200, 32-bit true colours are not available for both outputs simultaneously
Graphics drivers for the i915GM can be downloaded from the Intel website.
The XB1 COM Express Module has a time-of-day clock and 100-year calendar, integrated into the
ICH6.
A battery on the board keeps the clock current when the computer is turned off. The XB1 uses a
Vanadium-Pentoxide-Lithium rechargeable battery, giving an autonomy of more than 50 days when
fully loaded after 24 hours. The cell is free of memory effects and withstands deep discharging. Under
normal conditions, replacement should be superfluous during lifetime of the board. Custom specific
versions of the XB1 may not provide the accumulator.
In addition, VCC_RTC is also redundantly derived from the carrier board (if supported). The time
keeping autonomy period is then defined by the battery capacity accommodated on the carrier.
Universal Serial Bus (USB)
The XB1 COM Express Module is provided with eight USB ports, all of them are USB 2.0 capable. Four
active-low over-current sensing inputs are available in addition, suitable for attachment of electronic
switches such as the LM3526-L on the carrier board. The USB controllers are integrated into the ICH6.
LPC Super-I/O Interface
In a modern system, legacy ports as PS/2 keyboard/mouse, COM1/2 and LPT have been replaced by
USB and Ethernet connectivity. The 1.4MB floppy disk drive has been swapped against CD/DVD-RW
drives or USB memory sticks. Hence, the XB1 COM Express Module is virtually provided with all
necessary I/O functionality. However, for BIOS and OS software compatibility, the XB1 is additionally
equipped with a simple Super-I/O chip. The Super-I/O controller resides on the local LPC bus (LPC =
Low Pin Count interface standard), which is a serialized ISA bus replacement. For debug only, a
connector P-SIO may be stuffed on the XB1, with KB/MS signals derived from the SIO and also a
rudimentary serial I/F (TTL-level Tx/Rx RTS/CTS).
The SIO provides a rich set of GPIO lines. Four channels are used as GPI0..3, and another 4 channels
as GPO0..3, all routed to the connector J-COM A-B, for use on the carrier board.
Firmware Hub (Flash BIOS)
The BIOS is stored in an 8Mbit Firmware Hub attached to the LPC bus. The firmware hub contains a
nonvolatile memory core based on flash technology, allowing the BIOS to be upgraded. The XB1
firmware hub may be deselected by the carrier board from use as primary BIOS source, by activating
the signal BIOS_DISABLE# on J-COM A-B. This allows a potential secondary firmware hub residing on
the carrier board to be used as alternative BIOS source.
The FWH can be reprogrammed (if suitable) by a DOS based tool. This program and the latest XB1
COM Express Module BIOS are available from the EKF website. Read carefully the enclosed
instructions. If the programming procedure fails e.g. caused by a power interruption, the XB1 COM
Express Module may no more be operable. In this case you would have to send in the board, because
the BIOS is directly soldered to the PCB and cannot be changed by the user.
The XB1 COM Express Module is provided with two supervisor circuits to monitor the supply voltages
1.8V, 3.3V, 5V, and to generate a clean power-on reset signal. The healthy state of the XB1 COM
Express Module immideately after a reset is signalled by the LED PG (Power Good), indicating that all
power voltages are within their specifications and the reset signal has been deasserted.
An important reliability feature is the watchdog function, which is programmable by software. The
behaviour of the watchdog is defined within the PLD, which activates/deactivates the watchdog and
controls its time-out period. The time-out delay is adjustable in the steps 2, 10, 50 and 255 seconds.
After alerting the WD and programming the time-out value, the related software (e.g. application
program) must trigger the watchdog periodically. All watchdog related functions are made available
by calling service requests within the BIOS.
The watchdog is in a passive state after a system reset. There is no need to trigger it at boot time. The
watchdog is activated on the first trigger request. If the duration between two trigger requests
exceeds the programmed period, the watchdog times out and a system reset will be generated. The
watchdog remains in its active state until the next system reset. There is no way to disable it once it
had been put on alert, whwereas it is possible to reprogram its time-out value at any time.
PG (Power Good) LED
The XB1 COM Express Module offers a software programmable LED located. After system reset, this
LED defaults to signal the board healthy respectively power good. By the first setting of the GPO20 of
the ICH6 this LED changes its function and is then controlled only by the level of the GPO20 pin.
Setting this pin to 1 will switch on the LED. The PG LED remains in the programmable state until the
next system reset.
GP (General Purpose) LED
A second, programmable LED can be also observed from the front panel. The status of the GP LED is
controlled by the GPO18 output of the ICH6. Setting this pin to 1 will switch on the LED. As of
current, the GP LED is not dedicated to any particular hardware or firmware function (this may change
in the future).
The procedures in this chapter assume familiarity with the general terminology associated with
industrial electronics and with safety practices and regulatory compliance required for using and
modifying electronic equipment. Disconnectthe system from its power source and from
any telecommunication links, networks ormodems before performing any of the
procedures described in this chapter. Failureto disconnect power, or telecommunication
links before you open the system or performany procedures can result in personal injury
or equipment damage. Some parts of thesystem can continue to operate even though
the power switch is in its off state.
Caution
Electrostatic discharge (ESD) can damage components. Perform the procedures described in this
chapter only at an ESD workstation. If such astation is not available, you can provide
some ESD protection by wearing anantistatic wrist strap and attaching it to a
metal part of the system chassis or boardfront panel. Store the board only in its
original ESD protected packaging. Retain theoriginal packaging (antistatic bag and
antistatic box) in case of returning the board to EKF for rapair.
This procedure should be done only by qualified technical personnel. Disconnect the system from its
power source before doing the procedures described here. Failure to disconnect power, or
telecommunication links before you open the system or perform any procedures can result in personal
injury or equipment damage.
Typically you will perform the following steps:
CSwitch off the system, remove the AC power cord
CAttach your antistatic wrist strap to a metallic part of the system
CRemove the board packaging, be sure to touch the board only at the heat spreader
CInsert module carefully into the complementary J-COM connectors on the carrier board
This procedure should be done only by qualified technical personnel. Disconnect the system from its
power source before doing the procedures described here. Failure to disconnect power, or
telecommunication links before you open the system or perform any procedures can result in personal
injury or equipment damage.
Typically you will perform the following steps:
CSwitch off the system, remove the AC power cord
CAttach your antistatic wrist strap to a metallic part of the system
CIdentify the board, be sure to touch the board only at the front panel
CUnfasten screws
CRemove the module carefully
CStore board in the original packaging, do not touch any components, hold the board at the
heat spreader only
Warning
Do not expose the card to fire. Battery cells and other components could explode
and cause personal injury.
Note: If you decide to replace the memory, observe the precautions in 'Before You Begin'
By default, the XB1 COM Express Module comes fully equipped and tested with two DDR2 SDRAM
memory modules. So normally there should be no need to install the memory modules.
The XB1 COM Express Module requires at least one PC2-3200/4200 (400/533MHz) DDR2 SDRAM SODIMM module. For optimum performance two SO-DIMMs of equal capacity are recommended.
Further it is highly recommended that Serial Presence Detect (SPD) SO-DIMMs be used, since this
allows the chipset to accurately configure the memory settings for optimum performance.
A replacement memory module must match the 200-pin SO-DIMM form factor (known from
Notebook PCs), DDR2, VCC=1.8V, PC2-3200/PC2-4200 (400/533MHz), on-die termination (ODT),
unbuffered, non-ECC style. Suitable modules are available up to 1GB each. The i915GM supports
modules of up to a maximum of 14 address lines (A0...A13). Memory modules organized by more
than14 address lines are not suitable.
Replacement of the Battery
When the XB1 is removed from the carrier board, an optional on-board battery maintains the voltage
to run the time-of-day clock and to keep the values in the CMOS RAM over ~30 days. The battery is
rechargeable und should last during the lifetime of the XB1 COM Express Module. For replacement,
the old battery must be desoldered, and the new one soldered. We suggest that you send back the
board to EKF for battery replacement.
Warning
Danger of explosion if the battery is incorrectly replaced. Replace only with the same or
equivalent type. Do not expose a battery to fire.
The following table shows the on-board PCI devices and their location within the PCI configuration
space. These devices reside mainly within the i915GM chipset.
Bus
Number
0000x80860x2590Host Bridge
0200x80860x2592Internal Graphics Device
0210x80860x2792Int. Graphics Config. Regs.
02700x80860x2668Intel High Definition Audio
02800x80860x2660PCI Express Port 1
02810x80860x2662PCI Express Port 2
02820x80860x2664PCI Express Port 3
02830x80860x2666PCI Express Port 4
02900x80860x2658USB UHCI Controller #1
02910x80860x2659USB UHCI Controller #2
02920x80860x265AUSB UHCI Controller #3
02930x80860x265BUSB UHCI Controller #4
02970x80860x265CUSB 2.0 EHCI Controller
Device
Number
Function
Number
Vendor IDDevice IDDescription
03000x80860x244EPCI-to-PCI Bridge
03020x80860x266EAC'97 Audio Controller
03030x80860x266DAC'97 Modem Controller
03100x80860x2640LPC Bridge
03110x80860x266FIDE Controller
03120x80860x2651SATA Controller
03130x80860x266ASMB Controller
1)
3
1)
2)
This bus number can vary depending on the PCI enumeration schema implemented in BIOS.
The XB1 COM Express Module is available with a 82573L or 82573E/V Ethernet controller.
The XB1 COM Express Module contains a few devices that are attached to the System Management
Bus (SMBus). These are the clock generation chip, the SPD EEPROMs on the SO-DIMM memory
modules, a general purpose serial EEPROM and a supply voltage and CPU temperature controlling
device in particular. Other devices could be connected to the SMB on the carrier board across J-COM
A-B.
AddressDescription
0x58Hardware Monitor/CPU Temperature Sensor (LM87)
0xA0SPD of SODIMM1
0xA2SPD of SODIMM2
0xAEGeneral Purpose EEPROM
0xD2Main Clock Generation (CK-410M)
Hardware Monitor LM87
The XB1 COM Express Module is provided with a LM87 hardware monitor attached to the SMB. This
device is capable to observe board and CPU temperatures as well as several supply voltages generated
on the board with a resolution of 8 bit. The following table shows the mapping of the voltage inputs
of the LM87 to the corresponding supply voltages of the XB1 COM Express Module:
InputSourceResolution
Register
[mV]
AIN1CPU Core Voltage9.80x28
AIN2+1.05V9.80x29
VCCP1+1.5V14.10x21
VCCP2/D2-+1.8V14.10x25
+2.5V/D2++2.5V130x20
+3.3V+3.3V17.20x22
+5V+5V260x23
+12V+12V62.50x24
Besides the continuous measuring of temperatures and voltages the LM87 may compare these values
against programmable upper and lower boundaries. As soon as a measurement violates the allowed
value range, the LM87 may request an interrupt via the GPI[7] of the ICH6.
The jumper J-GP is used to reset the contents of the battery backed CMOS RAM to their default state.
The BIOS uses the CMOS to store configuration values, e.g. the order of boot devices. Using this
jumper is appropriate only, if it is not possible to enter the setup screen of the BIOS. To restore the
CMOS RAM, install a short circuit jumper on JGP and perform a system reset. As long as the jumper
is stuffed, the BIOS will use the default CMOS values after any system reset. To get normal operation
again, the jumper has to be removed.
The jumper J-RTC can be used to reset the battery backed core of the ICH6. This effects some registers
within the ICH6 RTC core that are important before the CPU starts its work after a system reset. Note
that JRTC will neither perform the clearing of the CMOS RAM values nor resets the real time clock.
Normally JRTC is not stuffed on the XB1 COM Express Module. To reset the RTC core, the XB1 COM
Express Module must be removed from the carrier board. It is important to accomplish the RTC reset
while the module has no power applied to it. Short-circuit the JRTC pads for about 1s. After that,
reinstall the module to the carrier and switch on the power.
Some of the internal connectors provide operating voltage (3.3V and 5V) to devices inside the system
chassis, such as internal peripherals. Not all of these connectors are overcurrent protected. Do not use
these internal connectors for powering devices external to the computer chassis. A fault in the load
presented by the external devices could cause damage to the board, the interconnecting cable and
the external devices themselves.
PLD Programming Header ISPCON
This pin header is the programming port for the on-board ispLSI2064 programmable glue logic chip.
The ISPCON is normally not stuffed.
ISPCON
1
1=3.3V 2=Serial Out 3=Serial In 4=ispGAL Enable
5=NC 6=Mode 7=GND 8=Clock
J-COM is the pair of connectors which serves as interface between the XB1 COM Express Module and
the carrier board. The assembly is composed of two double-row, high speed, 0.5mm pitch plugs.
Each row has 110 leads, i.e. J-COM provides 440 contact positions in total. The COM.0 specification
assigns each row a letter A, B and C, D. For Type 1 COM Express modules, rows A and B are sufficient
(single connector, 220 leads). In addition, rows C and D (dual connector, 440 positions) are required
for extended functionality incorporated into Type 2 modules such as the XB1.
This FFC style connector (Molex 52435-2872) can be used to attach an emulator probe to the board.
This is a valuable tool when debugging hardware or tracing software. The connector PITP is situated
at the bottom side of the board.
The connector P-SIO is normally not stuffed. The mature PS/2 and UART ports have been overcome by
USB in most applications. For low level debugging however, these interfaces can be very useful (e.g.
the BIOS can communicate across the serial I/O). Please contact EKF before ordering the XB1 COM
Express Module, if the P_SIO connector is required by the user.
The UART port does not include RS-232 transceivers (TTL level signals only). If necessary, the user must
provide RS-232 or RS-485 transceivers externally.