Integrated Device Technology Inc IDT6168LA15D, IDT6168LA15DB, IDT6168LA15P, IDT6168LA15PB, IDT6168LA15SO Datasheet

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Integrated Device Technology, Inc.
CMOS STATIC RAM 16K (4K x 4-BIT)
IDT6168SA
IDT6168LA
FEATURES:
• High-speed (equal access and cycle time) — Military: 15/20/25/35/45ns (max.) — Commercial: 15/20/25/35ns (max.)
• Low power consumption
• Battery backup operation—2V data retention voltage (IDT6168LA only)
• Available in high-density 20-pin ceramic or plastic DIP, 20­pin SOIC.
• Produced with advanced CMOS high-performance technology
• CMOS process virtually eliminates alpha particle soft-error rates
• Bidirectional data input and output
• Military product compliant to MIL-STD-883, Class B
DESCRIPTION:
The IDT6168 is a 16,384-bit high-speed static RAM orga­nized as 4K x 4. It is fabricated using lDT’s high-performance, high-reliability CMOS technology. This state-of-the-art tech­nology, combined with innovative circuit design techniques,
FUNCTIONAL BLOCK DIAGRAM
A0
provides a cost-effective approach for high-speed memory applications.
Access times as fast 15ns are available. The circuit also
offers a reduced power standby mode. When CS goes HIGH,
the circuit will automatically go to, and remain in, a standby mode as long as CS remains HIGH. This capability provides significant system-level power and cooling savings. The low­power (LA) version also offers a battery backup data retention capability where the circuit typically consumes only 1µW operating off a 2V battery. All inputs and outputs of the IDT6168 are TTL-compatible and operate from a single 5V supply.
The IDT6168 is packaged in either a space saving 20-pin, 300-mil ceramic or plastic DIP, 20-pin SOIC providing high board-level packing densities.
Military grade product is manufactured in compliance with the latest revision of MIL-STD-883, Class B, making it ideally suited to military temperature applications demanding the highest level of performance and reliability.
VCC
GND
ADDRESS DECODER
A11
I/O0
I/O1
I/O2
I/O3
CS
WE
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
INPUT
DATA
CONTROL
16,384-BIT
MEMORY ARRAY
I/O CONTROL
3090 drw 01
MILITARY AND COMMERCIAL TEMPERATURE RANGE MAY 1996
1996 Integrated Device Technology, Inc. 3090/2 For latest information contact IDT's web site at www.idt.com or fax-on-demand at 408-492-8391.
5.3
1
IDT6168SA/LA CMOS STATIC RAM 16K (4K x 4-BIT) MILITARY AND COMMERCIAL TEMPERATURE RANGES
PIN CONFIGURATIONS
A A A A A A A A
CS
GND
1
0
2
1
3
2
4
3
5
4
6
5
7
6
8
7
9 10
P20-1,
D20-1,
&
SO20-2
DIP/SOJ
TOP VIEW
20 19
18 17 16 15 14 13 12 11
V
CC
A
11
A
10
A
9
A
8
I/O I/O I/O I/O
WE
3 2 1 0
3090 drw 02
PIN DESCRIPTIONS
Name Description
A
0–A11 Address Inputs
CS
WE
0-3 Data Input/Output
I/O
CC Power
V
Chip Select Write Enable
GND Ground
3090 tbl 01
CAPACITANCE (TA = +25°C, F = 1.0MHZ)
Symbol Parameter
C
IN Input Capacitance VIN = 0V 7 pF
I/O I/O Capacitance VOUT = 0V 7 pF
C
NOTE: 3090 tbl 02
1. This parameter is determined by device characterization, but is not production tested.
(1)
Conditions Max. Unit
CS
CS
(1)
WE
WE
Output Power
TRUTH TABLE
Mode
Standby H X High-Z Standby
Read L H D Write L L D
NOTE: 3090 tbl 03
1. H = VIH, L = VIL, X = Don't Care
ABSOLUTE MAXIMUM RATINGS
OUT Active
IN Active
(1)
Symbol Rating Com’l. Mil. Unit
V
TERM Terminal Voltage –0.5 to +7.0 –0.5 to +7.0 V
with Respect
to GND
T
A Operating 0 to +70 –55 to +125 °C
Temperature
T
BIAS Temperature –55 to +125 –65 to +135 °C
Under Bias
T
STG Storage –55 to +125 –65 to +150 °C
Temperature
P
T Power Dissipation 1.0 1.0 W
OUT DC Output 50 50 mA
I
Current
NOTE: 3090 tbl 04
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
RECOMMENDED DC OPERATING CONDITIONS
Symbol Parameter Min. Typ. Max. Unit
CC Supply Voltage 4.5 5.0 5.5 V
V
GND Supply Voltage 0 0 0 V
V
IH Input High Voltage 2.2 6.0 V
IL Input Low Voltage –0.5
V
NOTE: 3090 tbl 05
1. VIL (min.) = –3.0V for pulse width less than 20ns, once per cycle.
(1)
0.8 V
RECOMMENDED OPERATING TEMPERATURE AND SUPPLY VOLTAGE
Grade Temperature GND VCC
Military –55°C to +125°C 0V 5V ± 10%
Commercial 0°C to +70°C 0V 5V ± 10%
3090 tbl 06
5.3 2
IDT6168SA/LA CMOS STATIC RAM 16K (4K x 4-BIT) MILITARY AND COMMERCIAL TEMPERATURE RANGES
DC ELECTRICAL CHARACTERISTICS
(1)
(VCC = 5.0V ± 10%, VLC = 0.2V, VHC = VCC - 0.2V)
6168SA15 6168SA20
6168LA20
Symbol Parameter Power Com’l. Mil. Com’l. Mil. Unit
I
CC1 Operating Power Supply Current SA 110 120 90 100 mA
CS
V
IL, Outputs Open,
V
CC = Max., f = 0
I
CC2 Dynamic Operating Current SA 145 165 120 120 mA
CS
V
IL, Outputs Open,
V
CC = Max., f = fMAX
SB Standby Power Supply Current SA 55 60 45 45 mA
I
(2)
(2)
LA 70 80
LA 100 110
(TTL Level)
CS
V
IH, VCC = Max., LA 30 35
Outputs Open, f = f
MAX
(2)
ISB1 Full Standby Power Supply Current SA 20 20 20 20 mA
(CMOS Level)
CS
V
HC, VCC = Max., LA 0.5 5
V
IN VHC or VIN VLC, f = 0
DC ELECTRICAL CHARACTERISTICS (CONTINUED)
(2)
3090 tbl 07
(1)
(VCC = 5.0V ± 10%, VLC = 0.2V, VHC = VCC - 0.2V)
6168SA25 6168SA35 6168SA45 6168LA25 6168LA35 6168LA45
Symbol Parameter Power Com’l. Mil. Com’l. Mil. Com’l. Mil. Unit
CC1 Operating Power Supply Current SA 90 100 90 100 mA
I
CS
V
IL, Outputs Open,
V
CC = Max., f = 0
CC2 Dynamic Operating Current SA 110 120 100 110 mA
I
CS
V
IL, Outputs Open,
V
CC = Max., f = fMAX
I
SB Standby Power Supply Current SA 35 45 30 35 mA
(TTL Level)
CS
V
IH, VCC = Max., LA 25 30 20 25
Outputs Open, f = f
ISB1 Full Standby Power Supply Current SA 3 10 3 10 mA
(CMOS Level)
CS
V
HC, VCC = Max., LA 0.5 0.3 0.5 0.3
V
NOTES: 3090 tbl 08
1. All values are maximum guaranteed values.
MAX = 1/tRC, only address inputs are cycling at fMAX. f = 0 means no address inputs are changing.
2. f
IN VHC or VIN VLC, f = 0
(2)
(2)
(2)
MAX
(2)
LA 70 80 70 80
LA 90 100 80 80
DC ELECTRICAL CHARACTERISTICS VCC = 5.0V ± 10%
IDT6168SA IDT6168LA
Symbol Parameter Test Condition Min. Max. Min. Max. Unit
|I
LI| Input Leakage Current VCC = Max., MIL 10 5 µA
V
IN = GND to VCC COM’L 2 2
LO| Output Leakage Current VCC = Max.,
|I
V
OUT = GND to VCC COM’L 2 2
OL Output LOW Voltage IOL = 10mA, VCC = Min. 0.5 0.5 V
V
OL = 8mA, VCC = Min. 0.4 0.4
I
V
OH Output HIGH Voltage IOH = –4mA, VCC = Min. 2.4 2.4 V
CS
= VIH, MIL 10 5 µA
5.3 3
3090 tbl 09
IDT6168SA/LA CMOS STATIC RAM 16K (4K x 4-BIT) MILITARY AND COMMERCIAL TEMPERATURE RANGES
DATA RETENTION CHARACTERISTICS (LA Version Only)
LC = 0.2V, VHC = VCC – 0.2V
V
IDT6168LA
Symbol Parameter Test Condition Min. Typ.
DR VCC for Data Retention 2.0 V
V
I
CCDR Data Retention Current MIL. 0.5
CS
V
HC 1.0
VIN VHC COM’L. 0.5 or V
LC 1.0
(5)
tCDR
Chip Deselect to Data 0 n s
(1)
(2) (3) (2) (3)
Max. Unit
(2)
100 150
20 30
(3) (2) (3)
µA µA
Retention Time
(5)
t
R
NOTES: 3090 tbl 10
1. TA = +25°C.
CC = 2V
2. at V
CC = 3V
3. at V
RC = Read Cycle Time.
4. t
5. This parameter is guaranteed by device characterization, but is not production tested.
Operation Recovery Time tRC
(2)
——ns
LOW VCC DATA RETENTION WAVEFORM
DATA
RETENTION
VCC
4.5V 4.5V
MODE
DR ≥ 2V
V
tRtCDR
V
CS
IH VIH
AC TEST CONDITIONS
Input Pulse Levels GND to 3.0V Input Rise/Fall Times 5ns Input Timing Reference Levels 1.5V Output Reference Levels 1.5V AC Test Load See Figures 1 and 2
5V
480
OUT
DATA
255
30pF*
3090 drw 04
3090 tbl 11
VDR
DATA
OUT
255
3090 drw 03
5V
480
5pF*
3090 drw 05
Figure 1. AC Test Load
*Includes scope and jig capacitances
5.3 4
Figure 2. AC Test Load
(for t
CHZ, tCLZ, tWHZ and tOW)
IDT6168SA/LA CMOS STATIC RAM 16K (4K x 4-BIT) MILITARY AND COMMERCIAL TEMPERATURE RANGES
AC ELECTRICAL CHARACTERISTICS (CONTINUED) (VCC = 5.0V ± 10%, All Temperature Ranges)
6168SA15 6168SA20/25 6168SA35 6168SA45
6168LA20/25 6168LA35 6168LA45
Symbol Parameter Min. Max. Min. Max. Min. Max. Min. Max. Unit
Read Cycle
RC Read Cycle Time 15 20/25 35 45 ns
t t
AA Address Access Time 15 20/25 35 45 ns ACS Chip Select Access Time 15 20/25 35 45 ns
t
(2)
CLZ
t
(2)
t
CHZ OH Output Hold from Address Change 3 3 3 3 ns
t
(2)
t
PU
(2)
PD
t
NOTES: 3090 tbl 12
1. –55°C to +125°C temperature range only.
2. This parameter is guaranteed with AC Test load (Figure 2) by device characterization, but is not production tested.
Chip Select to Output in Low-Z 3 5 5 5 ns Chip Deselect to Output in High-Z 8 10 15 25 ns
Chip Select to Power-Up Time 0 0 0 0 ns Chip Deselect to Power-Down Time 35 20/25 35 40 ns
(1) (1)
TIMING WAVEFORM OF READ CYCLE NO. 1
ADDRESS
tAA
tOH
DATA
OUT
PREVIOUS DATA VALID DATA VALID
TIMING WAVEFORM OF READ CYCLE NO. 2
CS
t
ACS
(4)
t
CLZ
DATA
OUT
I
CC
V
SUPPLY
CC
CURRENT
I
SB
NOTES:
1.WE is HIGH for Read cycle.
2.CS is LOW for Read cycle.
3. Device is continuously selected, CS is LOW.
3. Address valid prior to or coincident with CS transition LOW.
4. Transition is measured ±200mV from steady state.
HIGH IMPEDANCE
t
PU
(1, 2)
(1, 3)
tRC
3090 drw 06
t
RC
(3)
t
CHZ
DATA
OUT
VALID
t
HIGH IMPEDANCE
PD
3090 drw 07
5.3 5
IDT6168SA/LA CMOS STATIC RAM 16K (4K x 4-BIT) MILITARY AND COMMERCIAL TEMPERATURE RANGES
AC ELECTRICAL CHARACTERISTICS (CONTINUED) (VCC = 5.0V ± 10%, All Temperature Ranges)
6168SA15 6168SA20/25 6168SA35 6168SA45
6168LA20/25 6168LA35 6168LA45
Symbol Parameter Min. Max. Min. Max. Min. Max. Min. Max. Unit
Write Cycle
WC Write Cycle Time 15 20 30 40 ns
t
CW Chip Select to End-of-Write 15 20 30 40 ns
t t
AW Address Valid to End-of-Write 15 20 30 40 ns AS Address Set-up Time 0 0 0 0 ns
t t
WP Write Pulse Width 15 20 30 40 ns WR Write Recovery Time 0 0 0 0 ns
t t
DW DataValid to End-of-Write 9 10 15 20 ns DH Data Hold Time 0 0 0 3 ns
t
(3)
WHZ
t t
OW
NOTES: 3090 tbl 13
1. 0° to +70°C temperature range only.
2. –55°C to +125°C temperature range only.
3. This parameter is guaranteed with the AC Load (Figure 2) by device characterization, but is not production tested.
Write Enable to Output in High-Z 6 7 13 20 ns
(3)
Output Active from End-of-Write 0 0 0 0 ns
(2)
2)
TIMING WAVEFORM OF WRITE CYCLE NO. 1 (
tWC
ADDRESS
tAW
CS
tWP
(4)
DATA
DATA
WE
OUT
t AS
(6)
tWHZ
PREVIOUS DATA VALID
IN
WEWE CONTROLLED TIMING)
(3)
tWR
(6)
tOW
t
DW
DATA VALID
t
DH
(1, 2, 5)
DATA
VALID
(6)
tCHZ
(4)
3090 drw 08
5.3 6
IDT6168SA/LA CMOS STATIC RAM 16K (4K x 4-BIT) MILITARY AND COMMERCIAL TEMPERATURE RANGES
TIMING WAVEFORM OF WRITE CYCLE NO. 2 (
CSCS CONTROLLED TIMING)
t
WC
(1, 2, 5)
ADDRESS
t
AW
CS
(3)
t t
AS
t
CW
t
WR
WE
t
DW
DATA
IN
NOTES:
1.WE or CS must be HIGH during all address transitions.
2. A write occurs during the overlap of a LOW CS and a LOW WE.
3. t
WR is measured from the earlier of
4. During this period, the I/O pins are in the output state and input signals should not be applied.
5. If the CS LOW transition occurs simultaneously with or after the WE LOW transition, the outputs remain in the high impedance state.
6. Transition is measured ±200mV from steady state.
CS
or WE going HIGH to the end of the write cycle.
DATA VALID
t
DH
3090 drw 09
ORDERING INFORMATION
6168IDT
Device
Type
XX
Power
XXX
SpeedXXPackage
X
Process/
Temperature
Range
BlankBCommercial (0°C to +70°C)
°
Military (–55
C to +125°C)
Compliant to MIL-STD-883, Class B
P D SO
300mil Plastic DIP (P20-1) 300mil Ceramic DIP (D20-1) 300mil Small Outline IC, Gull Wing (SO20-2)
15 20 25
Speed in nanoseconds 35 45
SA LA
Military Only
Standard Power Low Power
3090 drw 10
5.3 7
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