Integrated Device Technology Inc IDT54FCT162344ETE, IDT54FCT162344ETEB, IDT54FCT162344ETPA, IDT54FCT162344ETPAB, IDT54FCT162344ETPFB Datasheet

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Integrated Device Technology, Inc.
FAST CMOS ADDRESS/ CLOCK DRIVER
IDT54/74FCT162344AT/CT/ET
FEATURES:
• Ideal for address line driving and clock distribution
• 8 banks with 1:4 fanout and 3-state
• Typical tSK(o) (Output Skew) < 500ps
• Balanced Output Drivers: ±24mA (commercial), ±16mA (military)
• Reduced system switching noise
• ESD > 2000V per MIL-STD-883, Method 3015;
> 200V using machine model (C = 200pF, R = 0)
• Packages include 25 mil pitch SSOP, 19.6 mil pitch TSSOP,
15.7 mil pitch TVSOP and 25 mil pitch Cerpack
• Extended commercial range of -40°C to +85°C
•V
CC = 5V ±10%
• Low input and output leakage 1µA (max.)
FUNCTIONAL BLOCK DIAGRAM
OE1
B11
A1
B14
DESCRIPTION:
The FCT162344AT/CT/ET is a 1:4 address line driver built using advanced dual metal CMOS technology. This high­speed, low power device provides the ability to fanout to memory arrays. Eight banks, each with a fanout of 4, and 3­state control provide efficient address distribution. One or more banks may be used for clock distribution.
The FCT162344AT/CT/ET has balanced output drive with current limiting resistors. This offers low ground bounce, minimal undershoot and controlled output fall times reducing the need for external series terminating resistors.
A large number of power and ground pins and TTL output swings also ensure reduced noise levels. All inputs are designed with hysteresis for improved noise margins.
OE3
B51
A5
B54
A2
OE2
A3
A4
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
B21
A6
B24
OE4
B31
A7
B34
B41
A8
B44
B61
B64
B71
B74
B81
B84
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MILITARY AND COMMERCIAL TEMPERATURE RANGES AUGUST 1996
1996 Integrated Device Technology, Inc. 5.6 DSC-3069/3
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IDT54/74FCT162344AT/CT/ET FAST CMOS ADDRESS LINE DRIVER MILITARY AND COMMERCIAL TEMPERATURE RANGES
PIN CONFIGURATIONS
OE1
B B12
GND
B B14
VCC
A1 B21 B22
GND
B B24
A2
A3 B31 B32
GND
B33 B34
A
VCC
B41 B42
GND
B B
OE2
1
11
2 3 4
13
5 6 7 8 9 10 11
23
12 13 14
SO56-1 SO56-2
15
SO56-3 16 17 18 19 20
4
21 22 23 24 25
43
44
26
27
28
56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29
OE4 B81 B82 GND
83
B B84 VCC A8 B71 B72 GND
73
B B74 A7 A6 B61 B62 GND
63
B B64 A5 VCC B51 B52 GND
53
B B54 OE3
OE1
B B
GND
B B
CC
V
A B B
GND
B B
A
A B B
GND
B B
A
V
CC
B B
GND
B B
OE2
11
12
13
14
1
21
22
23
24
2
3
31
32
33
34
4
41
42
43
44
1 2 3 4
5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28
E56-1
56 55 54 53 52 51 50
49
48 47
46 45 44 43 42 41
40
39 38 37 36
35
34 33 32 31
30 29
OE4 B
81
B
82
GND B
83
B
84
V
CC
A
8
B
71
B
72
GND B
73
B
74
A
7
A
6
B
61
62
B GND
B
63
B
64
A
5
V
CC
B
51
B
52
GND B
53
B
54
OE3
SSOP/
TSSOP/TVSOP
TOP VIEW
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CERPACK TOP VIEW
3069 drw 03
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IDT54/74FCT162344AT/CT/ET FAST CMOS ADDRESS LINE DRIVER MILITARY AND COMMERCIAL TEMPERATURE RANGES
PIN DESCRIPTION
Pin Names Description
OE
x 3–State Output Enable Inputs (Active LOW) Ax Inputs Bxx 3-State Outputs
3069 tbl 01
ABSOLUTE MAXIMUM RATINGS
Symbol Description Max. Unit
(2)
VTERM VTERM
TSTG Storage Temperature –65 to +150 °C IOUT DC Output Current –60 to +120 mA
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RAT­INGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
2. All device terminals except FCT162XXXT Output and I/O terminals.
3. Output and I/O terminals for FCT162XXXT.
Terminal Voltage with Respect to GND
(3)
Terminal Voltage with Respect to GND
(1)
–0.5 to +7.0 V
–0.5 to
CC +0.5
V
3069 lnk 03
V
FUNCTION TABLE
(1)
Inputs Outputs
OE
x Ax Bxx
LLL LHH HXZ
NOTE:
1. H = HIGH Voltage Level X = Don’t Care L = LOW Voltage Level Z = High Impedance
CAPACITANCE
Symbol Parameter
C
IN
Input
(TA = +25°C, f = 1.0MHz)
(1)
Conditions Typ. Max. Unit
VIN = 0V 3.5 6.0
Capacitance
C
OUT
Output
V
OUT
= 0V 3.5 8.0
Capacitance
NOTE:
1. This parameter is measured at characterization but not tested.
3069 tbl 02
pF
pF
3069 lnk 04
5.6 3
IDT54/74FCT162344AT/CT/ET FAST CMOS ADDRESS LINE DRIVER MILITARY AND COMMERCIAL TEMPERATURE RANGES
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified: Commercial: TA = –40°C to +85°C, VCC = 5.0V ± 10%; Military: TA = –55°C to +125°C, VCC = 5.0V ± 10%
Symbol Parameter Test Conditions
(1)
Min. Typ.
VIH Input HIGH Level Guaranteed Logic HIGH Level 2.0 V VIL Input LOW Level Guaranteed Logic LOW Level 0.8 V II H Input HIGH Current (Input pins)
Input HIGH Current (I/O pins)
II L Input LOW Current (Input pins)
Input LOW Current (I/O pins)
(5)
VCC = Max. VI = VCC ±1 µA
(5)
(5)
VI = GND ±1
(5)
±1
±1 IOZH High Impedance Output Current VCC = Max. VO = 2.7V ±1 µA IOZL (3-State Output pins)
(5)
VO = 0.5V ±1 VIK Clamp Diode Voltage VCC = Min., IIN = –18mA 0.7 1.2 V IOS Short Circuit Current VCC = Max., VO = GND
(3)
–80 140 225 mA VH Input Hysteresis 100 mV ICCL
Quiescent Power Supply Current VCC = Max., VIN = GND or VCC 5 500 µA ICCH ICCZ
(2)
Max. Unit
3069 lnk 05
OUTPUT DRIVE CHARACTERISTICS
Symbol Parameter Test Conditions
IODL Output LOW Current VCC = 5V, VIN = VIH or VIL, VOUT = 1.5V IODH Output HIGH Current VCC = 5V, VIN = VIH or V IL, VOH Output HIGH Voltage VCC = Min.
V
IN = VIH or VIL
VOL Output LOW Voltage VCC = Min.
V
IN = VIH or VIL
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at Vcc = 5.0V, +25°C ambient.
3. Not more than one output should be tested at one time. Duration of the test should not exceed one second.
4. Duration of the condition can not exceed one second.
5. The test limit for this parameter is ± 5µA at T
A = –55°C.
(1)
(3)
VOUT = 1.5V
(3)
IOH = –16mA MIL. I
OH = –24mA COM'L.
IOL = 16mA MIL. I
OL = 24mA COM'L.
Min. Typ.
60 115 200 mA
–60 –115 –200 mA
2.4 3.3 V
0.3 0.55 V
(2)
Max. Unit
3069 lnk 06
5.6 4
IDT54/74FCT162344AT/CT/ET FAST CMOS ADDRESS LINE DRIVER MILITARY AND COMMERCIAL TEMPERATURE RANGES
POWER SUPPLY CHARACTERISTICS
Symbol Parameter Test Conditions
ICC Quiescent Power Supply Current
TTL Inputs HIGH
ICCD Dynamic Power Supply
(4)
Current
VCC = Max.
IN = 3.4V
V
(3)
VCC = Max. Outputs Open
OE
x = GND
(1)
IN = VCC
V
IN = GND
V
Min. Typ.
0.5 1.5 mA
170 220 µA/
One Input Bit Toggling Four Output Bits Toggling 50% Duty Cycle
IC Total Power Supply Current
(6)
VCC = Max. Outputs Open
VIN = VCC
IN = GND
V
1.7 2.7 mA
fi = 10MHz 50% Duty Cycle
OE
x = GND
VIN = 3.4V
IN = GND
V
2.0 3.5
One Input Bit Toggling Four Output Bits Toggling
VCC = Max. Outputs Open
VIN = VCC
IN = GND
V
3.4 4.9
fi = 2.5MHz 50% Duty Cycle
OE
x = GND
VIN = 3.4V
IN = GND
V
5.4 10.9
Eight Input Bits Toggling Thirty Two Output Bits Toggling
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
3. Per TTL driven input (V
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of the I
C = IQUIESCENT + IINPUTS + IDYNAMIC
6. I IC = ICC + ICC DHNT + ICCD (fCPNCP/2 + fiNi)
I
CC = Quiescent Current (ICCL, ICCH and ICCZ)
CC = Power Supply Current for a TTL High Input (VIN = 3.4V)
I D
H = Duty Cycle for TTL Inputs High T = Number of TTL Inputs at DH
N ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
CP = Clock Frequency for Register Devices (Zero for Non-Register Devices)
f N
CP = Number of Clock Inputs at fCP
fi = Input Frequency
i = Number of Inputs at fi
N
CC = 5.0V, +25°C ambient.
IN = 3.4V). All other inputs at VCC or GND.
CC formula. These limits are guaranteed but not tested.
(2)
Max. Unit
MHz
(5)
(5)
3069 tbl 07
5.6 5
IDT54/74FCT162344AT/CT/ET FAST CMOS ADDRESS LINE DRIVER MILITARY AND COMMERCIAL TEMPERATURE RANGES
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
FCT162344AT FCT162344CT FCT162344ET
Com'l. Mil. Com'l. Mil. Com'l. Mil.
(1)
Symbol Parameter Condition
tPLH tPHL tPZH tPZL tPHZ tPLZ
Propagation Delay Ax to Bxx Output Enable Time
OE
x to Bx
Output Disable Time
OE
x to Bx
CL = 50pF
R
L = 500
tSK1(o) Skew between outputs of
(2)
Min.
Max. Min.
1.5 4.8 1.5 5.1 1.5 4.3 1.5 4.6 1.5 3.8 ns
1.5 6.2 1.5 6.5 1.5 5.8 1.5 6.5 1.5 5.0 ns
1.5 5.6 1.5 5.9 1.5 5.2 1.5 5.7 1.5 4.6 ns
0.5 0.5 0.35 0.35 0.25 ns same bank and same package (same transition)
tSK2(o) Skew between outputs of all
(3)
0.5 0.5 0.5 0.5 0.5 ns banks of same package (A1 thru A8 tied together)
NOTES:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. This parameter is guaranteed but not production tested.
(3)
(2)
Max. Min.
(2)
Max. Min.
(2)
Max. Min.
(2)
Max. Min.
(2)
Max. Unit
3069 tbl 08
5.6 6
IDT54/74FCT162344AT/CT/ET FAST CMOS ADDRESS LINE DRIVER MILITARY AND COMMERCIAL TEMPERATURE RANGES
TEST CIRCUITS AND WAVEFORMS TEST CIRCUITS FOR ALL OUTPUTS
VCC
500
V OUT
50pF
C L
500
Pulse
Generator
VIN
D.U.T.
R T
7.0V
3069 drw 04
SWITCH POSITION
Open Drain Disable Low
Enable Low
All Other Tests
DEFINITIONS:
C
L= Load capacitance: includes jig and probe capacitance. T = Termination resistance: should be equal to ZOUT of the Pulse
R
Generator.
SET-UP, HOLD AND RELEASE TIMES PULSE WIDTH
DATA
INPUT
TIMING
INPUT
ASYNCHRONOUS CONTROL
PRESET
CLEAR
ETC.
SYNCHRONOUS CONTROL
PRESET
CLOCK ENABLE
CLEAR
ETC.
t
t SU
SU
t
REM
t
t
H
H
3V
1.5V 0V
3V
1.5V 0V
3V
1.5V 0V
3V
1.5V 0V
3069 drw 05
LOW-HIGH-LOW
HIGH-LOW-HIGH
Test Switch
Closed
Open
PULSE
t
W
PULSE
3069 lnk 09
1.5V
1.5V
3069 drw 06
PROPAGATION DELAY ENABLE AND DISABLE TIMES
ENABLE DISABLE
t
PZL
PZH
3.5V
1.5V
1.5V
t
PHZ
SWITCH CLOSED
t
SWITCH OPEN
0V
SAME PHASE
INPUT TRANSITION
OUTPUT
OPPOSITE PHASE
INPUT TRANSITION
t
t
PLH
PLH
t
t
PHL
PHL
3V
1.5V 0V
V
OH
1.5V V
OL
3V
1.5V 0V
3069 drw 07
CONTROL
INPUT
OUTPUT
NORMALLY
LOW
OUTPUT
NORMALLY
HIGH
OUTPUT SKEW - tSKn(o)
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH
2. Pulse Generator for All Pulses: Rate 1.0MHz; t
INPUT
tPLH1
tPHL1
OUTPUT 1
tSK1(o)
tSK1(o)
OUTPUT 2
tPLH2
NOTE:
SK1(o) OUTPUT1 and OUTPUT 2 are in the same bank,
1. For t For t
SK2(o) OUTPUT1 and OUTPUT 2 are in different banks on the
same part.
tSKn(o) = |tPLH2 - tPLH1| or |tPHL2 - tPHL1|
tPHL2
3V
1.5V 0V
OH
V
1.5V V
OL
VOH
1.5V
OL
V
3V
1.5V
t
PLZ
0V
3.5V
0.3V
V
OL
V
0.3V
OH
0V
3069 drw 08
F ≤ 2.5ns; tR 2.5ns
5.6 7
IDT54/74FCT162344AT/CT/ET FAST CMOS ADDRESS LINE DRIVER MILITARY AND COMMERCIAL TEMPERATURE RANGES
ORDERING INFORMATION
IDT XX
Temp. Range
FCT
XXXX
Device Type
X
Package
X
Process
Blank B
PV PA PF E
162344AT 162344CT 162344ET
54 74
Commercial MIL-STD-883, Class B
Shrink Small Outline Package (SO56-1) Thin Shrink Small Outline Package (SO56-2) Thin Very Small Outline Package (SO56-3) CERPACK (E56-1)
Address Line Driver
–55°C to +125°C –40°C to +85°C
3069 drw 09
5.6 8
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