HP 540-DV2, QL6 Schematics
1
2
3
4
5
6
7
8
PCB STACK UP
8L
LAYER 1 : TOP
A A
B B
C C
LAYER 2 : SGND
LAYER 3 : IN1
LAYER 4 : SGND
LAYER 5 : SVCC
LAYER 6 : IN2
LAYER 7 : SGND
LAYER 8 : BOT
SYSTEM CHARGER(ISL6251AHAZ-T)
PAGE 32
SYSTEM POWER ISL6237IRZ-T
PAGE 33
DDR II SMDDR_VTERM
1.8V/1.8VSUS(TPS51116REGR)
VCCP +1.5V AND GMCH
1.05V(RT8204)
VGACORE(1.025V)Oz8118
PAGE 37
PAGE 34
PAGE 36
CPU CORE ISL6266A
PAGE 35
DDRII-SODIMM1
PAGE 10,11
DDRII-SODIMM2
PAGE 10,11
SATA - HDD
PAGE 28
SATA - CD-ROM
PAGE 28
E-SATA
PAGE 31
Keyboard
Touch Pad
PAGE 29
QL6 BLOCK DIAGRAM
PCI-Express
16X
USB2.0
0,1,2
X3
PCI-E
Azalia
CPU THERMAL
SENSOR
PAGE 5
PS8101
PAGE 18
NVIDIA
NB9M-64bit
533p
PAGE 12~16
NBSRCCLK, NBSRCCLK#
PAGE 31
BlueToothUSB2.0 Ports
Analog
Realtek
ALC268
PAGE 24
AUDIO
Amplifier
TPA6017A2
PAGE 25
CLK_CPU_BCLK,CLK_CPU_BCLK#
CLK_MCH_BCLK,CLK_MCH_BCLK#
DREFCLK,DREFCLK#
DREFSSCLK,DREFSSCLK#
89
PAGE 29
Mini PCI-E
Card
(Wireless LAN
/ Robson)
FSB 667/800/1066
DDRII 667/800 MHz
DDRII 667/800 MHz
DMI LINK
SATA0 150MB
SATA1 150MB
SATA5 150MB
32.768KHz
ENE KBC
KB3926 C0
CPU
Penryn
478P (uPGA)/35W
PAGE 3,4
NORTH BRIDGE
Cantiga
PAGE 5~9
32.768KHz
SOUTH BRIDGE
ICH9-M
PAGE 19,20,21,22
LPC
MDC CONN
PAGE 25
SPI
PAGE 22
PAGE 30
27MHz
HDMI CON
PAGE 18
CRT
PAGE 18
Dual Link
LCD CONN
PAGE 17
12MHz
Webcam
PAGE 17
X2 X1 X1
LAN
Realtek
PCIE-LAN
RTL8102E/8111C
PAGE 31 PAGE 26,27
(10/100/GagaLAN)
CR for UMA
RTS5158E
PAGE 23
25MHz
6
Express
Card
(NEW CARD)
RJ45
PAGE 26
14.318MHz
CLOCK GEN
ALPRS355B MLF64PIN
PAGE 2
7,10,11
Mini PCI-E Card x2
Express Card x1
PAGE 28,31
PAGE 28
01
D D
GMT G9931P1U
SPI
FAN
PAGE 29
1
2
3
PAGE 30
4
Audio Jacks microphone
(Phone/ MIC)
PAGE 24PAGE 17
5
Jack to
Speaker
PAGE 25
PROJECT : QL6
Quanta Computer Inc.
Size Document Number Rev
6
NB5
Custom
Date: Sheet
7
Block Diagram
140Tuesday, February 26, 2008
8
2A
of
1
+3V
L33
1 2
HCB1608KF-181T15_6
A A
L49
1 2
HCB1608KF-181T15_6
10U/6.3V_8
L34
1 2
HCB1608KF-181T15_6
10U/6.3V_8
+3V
B B
C C
R240
10K/F_4
1 2
0=overclocking
of CPU and
SRC Allowed
1 = overclocking
of CPU and SRC
not Allowed
+3V
C778
C521
TME
C480
10U/6.3V_8
+3V_CK_CPU
C523
.1U/10V_4
C486
.1U/10V_4
C514
.1U/10V_4
PDAT_SMB21
PCLK_SMB21
2
+3V_CK_MAIN
C476
.1U/10V_4
+3V_CK_MAIN2
C783
.1U/10V_4
12
Q11
2N7002
3
Q12
2N7002
3
CG_XIN
C470
27P/50V_4
C772
.1U/10V_4
C487
.1U/10V_4
+3V
+3V
Y2
1 2
14.318MHZ
2
2
R272
10K/F_4
C496
.1U/10V_4
C524
.1U/10V_4
1
1
C475
.1U/10V_4
C511
.1U/10V_4
R271
10K/F_4
CGDAT_SMB
CGCLK_SMB
CG_XOUT
12
C478
27P/50V_4
3
4
5
6
+3V4,6,9,10,11,12,14,15,17,18,19,20,21,22,24,25,26,28,29,30,31,35,36,38
+1.05V3,4,5,6,8,9,19,22,29,34,35
7
8
02
U14
+3V_CK_MAIN
+3V_CK_CPU
+3V_CK_MAIN2
C495
.1U/10V_4
CK_PWG21
CPU_BSEL1
CGCLK_SMB10,11,28,31
CGDAT_SMB10,11,28,31
CG_XIN
CG_XOUT
R286*100K/F_4
R282 2.2K_4
FSB
23
VDDPLL3
16
VDD48
9
VDDPCI
4
VDDREF
46
VDDSRC
62
VDDCPU
27
VDDPLL3I/O
33
VDDSRCI/O
43
VDDSRCI/O
52
VDDSRCI/O
56
VDDCPU_IO
55
NC
3
X1
2
X2
63
CK_PWRGD/PD#
64
FSLB/TEST_MODE
7
SCLK
6
SDATA
22
GND
26
GND
18
GND48
59
GNDCPU
15
GNDPCI
1
GNDREF
30
GNDSRC
36
GNDSRC
49
GNDSRC
65
EPAD
CK505
27MHz_Nonss/SRCCLK1/SE1
RTM875N-606-VD-GR
CPUCLKT0
CPUCLKC0
CPUCLKT1
CPUCLKC1
CPUT2_ITP/SRCT8
CPUC2_ITP/SRCC8VDD96I/O
DOTT_96/SRCT0
DOTC_96/SRCC0
27Mhz_ss/SRCCLC1/SE2
SRCCLKT2/SATACL
SRCCLKC2/SATACL
SRCCLKT3/CR#_C
SRCCLKC3/CR#_D
SRCCLKT4
SRCCLKC4
PCI_STOP#
CPU_STOP#
SRCCLKT6
SRCCLKC6
SRCCLKT7/CR#_F
SRCCLKC7/CR#_E
SRCCLKT9
SRCCLKC9
SRCCLKT10
SRCCLKC10
SRCCLKT11/CR#_H
SRCCLKC11/CR#_G
PCICLK0/CR#_A
PCICLK1/CR#_B
PCICLK2/TME
PCICLK3
PCICLK4/27_SELECT
PCI_F5/ITP_EN
USB_48MHZ/FSLA
FSLC/TST_SL/REF
61
60
58
57
SRC8SRC8SRC8
54
SRC8#SRC8#SRC8#
5319
SRC0SRC0SRC0SRC0
20
SRC0#SRC0#SRC0#SRC0#
21
SRC1
24
SRC1#
25
28
29
31
32
34
35
45
44
48
47
51
50
37
38
41
42
40
39
R_CLK_NEWCARD_OE#
8
R_CLK_MCH_OE#
10
TME
11
R_PCLK_KBC
12
27M_SEL
13
14
17
5
CLK_CPU_BCLK 3
CLK_CPU_BCLK# 3
CLK_MCH_BCLK 5
CLK_MCH_BCLK# 5
CLK_PCIE_NEW 28
CLK_PCIE_NEW# 28
CLK_PCIE_3GPLL 6
CLK_PCIE_3GPLL# 6
PM_STPPCI# 21
PM_STPCPU# 21
CLK_PCIE_ICH 20
CLK_PCIE_ICH# 20
CLK_PCIE_WLAN 31
CLK_PCIE_WLAN# 31
CLK_PCIE_LAN 26
CLK_PCIE_LAN# 26
CLK_PCIE_SATA 19
CLK_PCIE_SATA# 19
CLK_PCIE_WWAN 31
CLK_PCIE_WWAN# 31
R270 475/F_4
R244 475/F_4
R231 33_4
R260 33_4
R255 33_4
ITP_EN
R281 22_4
R278 22_4
R287 2.2K_4
FSA
R246 10K/F_4
FSC
R273 33_4
FSLC
RP50 *4P2R-S-0
4
3
2
RP61 *4P2R-S-0
RP47 4P2R-S-0
1
4
3
2
1
2
1
4
3
SRC1
SRC1#
DV-2 modify
CPU_BSEL0
CPU_BSEL2
CLK_CPU_ITP 3
CLK_CPU_ITP# 3
DREFCLK 6
DREFCLK# 6
CLK_PCIE_VGA 12
CLK_PCIE_VGA# 12
int
RP51 *4P2R-S-0
2
1
4
3
RP60 4P2R-S-33
4
3
2
1
des
CLK_NEWCARD_OE# 28
CLK_MCH_OE# 6
PCLK_DEBUG 31
PCLK_KBC 30
PCLK_ICH 20
CLK_48M_USB 21
CLK_48M_CR 23
CLK_14M_ICH 21
int
des
DREFSSCLK 6
DREFSSCLK# 6
27M_NONSS 14
27M_SS 14
QFN64CK505
R268
des
10K/F_4
1 2
27M_SEL
R274
int
*10K/F_4
1 2
0=UMA
1 = External VGA
+3V
*10K/F_4
D D
1 2
1 2
R266
ITP_EN
10K/F_4
R261
R_PCLK_KBC
R248
*10K/F_4
1 2
Enable ITP CLK
1
2
27M_SEL
PIN13
0=UMA
1 = External
VGA
PIN20
PIN21
DOT96T
SRCT0 SRCC0 27Mout-NSS 27Mout-SS
CPU Clock select
CPU_BSEL03
R288 *1K/F_4
CPU_BSEL13 MCH_BSEL1 6
+1.05V
CPU_BSEL23 MCH_BSEL2 6
+1.05V
R538 *1K/F_4
R239 *1K/F_4
3
PIN24
SRCT1/LCDT_100DOT96C
PIN25
SRCT1/LCDT_100
DV-2 modify
CPU_BSEL0
CPU_BSEL1
CPU_BSEL2
R289 0_4
R540 0_4
R233 0_4
1K to NB only when
XDP is implement.No
XDP can use 0 ohm
4
ICS ICS9LPRS355BKLF
SLG8SP513VTRSilego
Realtek
RTM875N-606-VD-GR
FSC FSB
MCH_BSEL0 6
1330
0
0
0
00
1
1
1
5
ALPRS355000
AL8SP513000
AL000875000
CLK_MCH_OE#
CLK_NEWCARD_OE#
FSA CPU SRC PCI
1100
10
1
1
1
0
0
033
0
1
0
1
1
133
166
200
266
333
400
RSVD
100
100
100
100
100
100
100
100
33
33
33
33
33
33
NB5
6
7
R235 10K/F_4
R269 10K/F_4
C466 *33P/50V_4
C467 *27P/50V_4
C457 *33P/50V_4
C484 10P/50V_4
C482 10P/50V_4
C463 *33P/50V_4
PCLK_KBC
PCLK_ICH
PCLK_DEBUG
CLK_48M_USB
CLK_48M_CR
CLK_14M_ICH
for EMI
PROJECT : QL6
Quanta Computer Inc.
Size Document Number Rev
Custom
Date: Sheet
Clock Generator
+3V
12
12
240Tuesday, February 26, 2008
8
2A
of
5
4
3
2
+1.05V2,4,5,6,8,9,19,22,29,34,35
1
H_A#[35:3]5
D D
H_ADSTB#05
H_REQ#[4:0]5
H_A#[35:3]
C C
H_ADSTB#15
H_A20M#19
H_FERR#19
H_IGNNE#19
H_STPCLK#19
H_INTR19
H_NMI19
H_SMI#19
B B
+1.05V
R11
*54.9/F_4
R8 *1K/F_4
CLK_CPU_ITP#2
CLK_CPU_ITP2
R10
54.9/F_4
R40
*51/F_4
ITP_TDI
ITP_TMS
ITP_TCK
ITP_TDO
ITP_TRST#
H_CPURST#
ITP_TCK
A A
C82
*100P/50V_4
5
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35
Populate ITP700Flex for bringup
R9
54.9/F_4
ITP_RST#
U18A
J4
A[3]#
L5
ADDR GROUP
0
A[4]#
L4
A[5]#
K5
A[6]#
M3
A[7]#
N2
A[8]#
J1
A[9]#
N3
A[10]#
P5
A[11]#
P2
A[12]#
L2
A[13]#
P4
A[14]#
P1
A[15]#
R1
A[16]#
M1
ADSTB[0]#
K3
REQ[0]#
H2
REQ[1]#
K2
REQ[2]#
J3
REQ[3]#
L1
REQ[4]#
Y2
A[17]#
U5
ADDR GROUP
1
A[18]#
R3
A[19]#
W6
A[20]#
U4
A[21]#
Y5
A[22]#
U1
A[23]#
R4
A[24]#
T5
A[25]#
T3
A[26]#
W2
A[27]#
W5
A[28]#
Y4
A[29]#
U2
A[30]#
V4
A[31]#
W3
A[32]#
AA4
A[33]#
AB2
A[34]#
AA3
A[35]#
V1
ADSTB[1]#
A6
A20M#
A5
FERR#
C4
IGNNE#
D5
STPCLK#
C6
LINT0
B4
LINT1
A3
SMI#
Quard Core Only
F6
TDI_1/RSV
D3
TDO_2/RSV
N5
BMP_1#[0]/RSV
M4
BMP_1#[1]/RSV
B2
BMP_1#[2]/RSV
AE8
BMP_1#[3]/VSS
D8
DCLKPH_1/VSS
F8
ACLKPH_1/VSS
D22
GTLREF_2/RSV
T2
THRMDA_1/RSV
V3
THRMDC_1/RSV
AA8
HFPLL_1/VSS
AC8
SPARE_1[4]/VSS
AA7
BR1#/VCC
Penryn Ball-out Rev 1a
R7 54.9/F_4
R12 54.9/F_4
JITP1
1
TDI
2
TMS
5
TCK
7
TDO
3
TRST#
12
RESET#
11
FBO
8
BCLKN
9
BCLKP
10
GND0
14
GND1
16
GND2
18
GND3
20
GND4
22
GND5
*ITP700Flex
4
ADS#
BNR#
BPRI#
DEFER#
DRDY#
DBSY#
BR0#
CONTROL XDP/ITP SIGNALS
IERR#
INIT#
LOCK#
RESET#
RS[0]#
RS[1]#
RS[2]#
TRDY#
HIT#
HITM#
BPM[0]#
BPM[1]#
BPM[2]#
BPM[3]#
PRDY#
PREQ#
TCK
TDO
TMS
TRST#
DBR#
THERMAL
PROCHOT#
THERMDA
THERMDC
ICH
THERMTRIP#
H CLK
BCLK[0]
BCLK[1]
RSVD[06]
TDI
BPM0#
BPM1#
BPM2#
BPM3#
BPM4#
BPM5#
GND_0
GND_1
VTAP
DBR#
DBA#
H1
E2
G5
H5
F21
E1
F1
D20
B3
H4
C1
F3
F4
G3
G2
G6
E4
AD4
AD3
AD1
AC4
AC2
AC1
AC5
AA6
AB3
AB5
AB6
C20
D21
A24
B25
C7
A22
A21
D2
ITP_TCK
ITP_TRST#
VTT0
VTT1
NC0
NC1
H_IERR#
H_RS#0
H_RS#1
H_RS#2
ITP_BPM#0
ITP_BPM#1
ITP_BPM#2
ITP_BPM#3
ITP_BPM#4
ITP_BPM#5
ITP_TCK
ITP_TDI
ITP_TDO
ITP_TMS
ITP_TRST#
R568 *0_4
DV-2 modify
R39 68_4
CPU_TEST2
CPU_TEST1
27
28
26
SYS_RST#
25
24
ITP_BPM#0
23
ITP_BPM#1
21
ITP_BPM#2
19
ITP_BPM#3
17
ITP_BPM#4
15
ITP_BPM#5
13
4
6
29
30
R41 56.2/F_4
R42 *1K/F_4
R43 *1K/F_4
+1.05V
C9 *.1U/10V_4
C8 *.1U/10V_4
H_ADS# 5
H_BNR# 5
H_BPRI# 5
H_DEFER# 5
H_DRDY# 5
H_DBSY# 5
HBREQ#0 5
+1.05V
H_INIT# 19
H_LOCK# 5
H_CPURST# 5
H_RS#[2:0] 5
H_TRDY# 5
H_HIT# 5
H_HITM# 5
SYS_RST# 21
H_PROCHOT# 35
+1.05V
H_THERMDA 4
H_THERMDC 4
PM_THRMTRIP# 6,19
CLK_CPU_BCLK 2
CLK_CPU_BCLK# 2
+1.05V
R569
*54.9/F_4
DV-2 modify
+1.05V
3
H_DSTBN#05
H_DSTBP#05
H_DINV#05
CPU_BSEL02
CPU_BSEL12
CPU_BSEL22
H_D#[63:0]5
R350
1K/F_4
R349
2K/F_4
H_D#[63:0]
TP4
TP58
TP2
TP59
TP3
H_DSTBN#15
H_DSTBP#15
H_DINV#15
H_GTLREFH_GTLREF
CPU_TEST1
CPU_TEST2
CPU_TEST3
CPU_TEST4
CPU_TEST5
CPU_TEST6
CPU_TEST7
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
U18B
E22
D[0]#
F24
D[1]#
E26
D[2]#
G22
D[3]#
F23
D[4]#
G25
D[5]#
E25
D[6]#
E23
D[7]#
K24
D[8]#
G24
D[9]#
J24
D[10]#
J23
D[11]#
H22
D[12]#
F26
D[13]#
K22
D[14]#
H23
D[15]#
J26
DSTBN[0]#
H26
DSTBP[0]#
H25
DINV[0]#
N22
D[16]#
K25
D[17]#
P26
D[18]#
R23
D[19]#
L23
D[20]#
M24
D[21]#
L22
D[22]#
M23
D[23]#
P25
D[24]#
P23
D[25]#
P22
D[26]#
T24
D[27]#
R24
D[28]#
L25
D[29]#
T25
D[30]#
N25
D[31]#
L26
DSTBN[1]#
M26
DSTBP[1]#
N24
DINV[1]#
AD26
GTLREF
C23
TEST1
D25
TEST2
C24
TEST3
AF26
TEST4
AF1
TEST5
A26
TEST6
C3
TEST7
B22
BSEL[0]
B23
BSEL[1]
C21
BSEL[2]
Penryn Ball-out Rev 1a
DATA GRP 0
DATA GRP 1
MISC
D[32]#
D[33]#
D[34]#
D[35]#
D[36]#
D[37]#
DATA GRP 2
D[38]#
D[39]#
D[40]#
D[41]#
D[42]#
D[43]#
D[44]#
D[45]#
D[46]#
D[47]#
DSTBN[2]#
DSTBP[2]#
DINV[2]#
D[48]#
D[49]#
D[50]#
D[51]#
D[52]#
DATA GRP 3
D[53]#
D[54]#
D[55]#
D[56]#
D[57]#
D[58]#
D[59]#
D[60]#
D[61]#
D[62]#
D[63]#
DSTBN[3]#
DSTBP[3]#
DINV[3]#
COMP[0]
COMP[1]
COMP[2]
COMP[3]
DPRSTP#
DPSLP#
DPWR#
PWRGOOD
SLP#
PSI#
2
Y22
AB24
V24
V26
V23
T22
U25
U23
Y25
W22
Y23
W24
W25
AA23
AA24
AB25
Y26
AA26
U22
AE24
AD24
AA21
AB22
AB21
AC26
AD20
AE22
AF23
AC25
AE21
AD21
AC22
AD23
AF22
AC23
AE25
AF24
AC20
R26
U26
AA1
Y1
E5
B5
D24
D6
D7
AE6
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
COMP0
COMP1
COMP2
COMP3
H_D#[63:0]
H_DSTBN#2 5
H_DSTBP#2 5
H_DINV#2 5
H_D#[63:0]
H_DSTBN#3 5
H_DSTBP#3 5
H_DINV#3 5
R352 27.4/F_4
R351 54.9/F_4
R27 27.4/F_4
R32 54.9/F_4
H_DPRSTP# 6,19,35
H_DPSLP# 19
H_DPWR# 5
H_PWRGD 19
H_CPUSLP# 5
PM_PSI# 35
NB5
DV-2 modify
PROJECT : QL6
Quanta Computer Inc.
Size Document Number Rev
Custom
Date: Sheet
Penryn 1/2
1
03
340Tuesday, February 26, 2008
of
2A
5
+VCORE
C74
C66
C41
22U/6.3V_8
C44
22U/6.3V_8
C69
22U/6.3V_8
C16
22U/6.3V_8
C67
22U/6.3V_8
C13
22U/6.3V_8
C45
22U/6.3V_8
C63
22U/6.3V_8
C51
.1U/10V_4
5
22U/6.3V_8
C62
22U/6.3V_8
C57
22U/6.3V_8
C15
22U/6.3V_8
C70
22U/6.3V_8
C14
22U/6.3V_8
C39
22U/6.3V_8
C59
22U/6.3V_8
C65
.1U/10V_4
D D
C C
+1.05V
C54
.1U/10V_4
B B
A A
22U/6.3V_8
C38
22U/6.3V_8
C61
22U/6.3V_8
C56
22U/6.3V_8
C11
22U/6.3V_8
C46
22U/6.3V_8
C64
22U/6.3V_8
C17
22U/6.3V_8
C48
.1U/10V_4
MBCLK215,30
MBDATA215,30
C42
22U/6.3V_8
C43
22U/6.3V_8
C60
22U/6.3V_8
C18
22U/6.3V_8
C12
22U/6.3V_8
C40
22U/6.3V_8
C75
22U/6.3V_8
C58
22U/6.3V_8
C55
.1U/10V_4
C68
.1U/10V_4
R358
10K/F_4
R359
10K/F_4
MBCLK2
MBDATA2
4
PM_THRM_R#
4
+VCORE +VCORE
+3V
R360
*0_4
LM86VCC
R357
10K/F_4
U19
8
SCLK
7
SDA
6
ALERT#
4
OVERT#
EMC1402-1-ACZL-TR
ADDRESS: 98H
U18C
A7
VCC[001]
A9
VCC[002]
A10
VCC[003]
A12
VCC[004]
A13
VCC[005]
A15
VCC[006]
A17
VCC[007]
A18
VCC[008]
A20
VCC[009]
B7
VCC[010]
B9
VCC[011]
B10
VCC[012]
B12
VCC[013]
B14
VCC[014]
B15
VCC[015]
B17
VCC[016]
B18
VCC[017]
B20
VCC[018]
C9
VCC[019]
C10
VCC[020]
C12
VCC[021]
C13
VCC[022]
C15
VCC[023]
C17
VCC[024]
C18
VCC[025]
D9
VCC[026]
D10
VCC[027]
D12
VCC[028]
D14
VCC[029]
D15
VCC[030]
D17
VCC[031]
D18
VCC[032]
E7
VCC[033]
E9
VCC[034]
E10
VCC[035]
E12
VCC[036]
E13
VCC[037]
E15
VCC[038]
E17
VCC[039]
E18
VCC[040]
E20
VCC[041]
F7
VCC[042]
F9
VCC[043]
F10
VCC[044]
F12
VCC[045]
F14
VCC[046]
F15
VCC[047]
F17
VCC[048]
F18
VCC[049]
F20
VCC[050]
AA9
VCC[052]
AA10
VCC[053]
AA12
VCC[054]
AA13
VCC[055]
AA15
VCC[056]
AA17
VCC[057]
AA18
VCC[058]
AA20
VCC[059]
AB9
VCC[060]
AC10
VCC[061]
AB10
VCC[062]
AB12
VCC[063]
AB14
VCC[064]
AB15
VCC[065]
AB17
VCC[066]
AB18
VCC[067]
Penryn Ball-out Rev 1a
DV-2 modify
25mils
1
VCC
2
DXP
3
DXN
5
GND
R3560_6
VCC[068]
VCC[069]
VCC[070]
VCC[071]
VCC[072]
VCC[073]
VCC[074]
VCC[075]
VCC[076]
VCC[077]
VCC[078]
VCC[079]
VCC[080]
VCC[081]
VCC[082]
VCC[083]
VCC[084]
VCC[085]
VCC[086]
VCC[087]
VCC[088]
VCC[089]
VCC[090]
VCC[091]
VCC[092]
VCC[093]
VCC[094]
VCC[095]
VCC[096]
VCC[097]
VCC[098]
VCC[099]
VCC[100]
VCCP[01]
VCCP[02]
VCCP[03]
VCCP[04]
VCCP[05]
VCCP[06]
VCCP[07]
VCCP[08]
VCCP[09]
VCCP[10]
VCCP[11]
VCCP[12]
VCCP[13]
VCCP[14]
VCCP[15]
VCCP[16]
VCCA[01]
VCCA[02]
VCCSENSE
VSSSENSE
VID[0]
VID[1]
VID[2]
VID[3]
VID[4]
VID[5]
VID[6]
.
C580
.1U/10V_4
C576
100P/50V_4
PM_THRM# 21
AB20
AB7
AC7
AC9
AC12
AC13
AC15
AC17
AC18
AD7
AD9
AD10
AD12
AD14
AD15
AD17
AD18
AE9
AE10
AE12
AE13
AE15
AE17
AE18
AE20
AF9
AF10
AF12
AF14
AF15
AF17
AF18
AF20
G21
V6
J6
K6
M6
J21
K21
M21
N21
N6
R21
R6
T21
T6
V21
W21
B26
C26
AD6
AF5
AE5
AF4
AE3
AF3
AE2
AF7
AE7
3
+1.05V
+
R25
100/F_4
+VCORE
H_THERMDA 3
H_THERMDC 3
3
12
C563
330u_2.5V_7343
SYS_SHDN-1#
C571
.01U/16V_4
CPU_VID0 35
CPU_VID1 35
CPU_VID2 35
CPU_VID3 35
CPU_VID4 35
CPU_VID5 35
CPU_VID6 35
R26
100/F_4
+1.5V
VCCSENSE 35
VSSSENSE 35
R355 *0_4
R354 0_4
Q16
MMBT3904-7-F
2
1 3
C569
10U/6.3V_8
D21
*RB501V-40
2 1
D20
2 1
RB501V-40
R353 10K/F_4
D22
2 1
*RB501V-40
2
SYS_SHDN# 32,33
3920_RST# 30,32
ECPWROK 6,21,30
+3V
VGA_OVT# 15
SYS_SHDN-1# 29
2
+3V2,6,9,10,11,12,14,15,17,18,19,20,21,22,24,25,26,28,29,30,31,35,36,38
+1.05V2,3,5,6,8,9,19,22,29,34,35
+1.5V9,19,20,22,24,25,28,31,34,38
+VCORE35
U18D
A4
A8
A11
A14
A16
A19
A23
AF2
B6
B8
B11
B13
B16
B19
B21
B24
C5
C8
C11
C14
C16
C19
C2
C22
C25
D1
D4
D11
D13
D16
D19
D23
D26
E3
E6
E8
E11
E14
E16
E19
E21
E24
F5
F11
F13
F16
F19
F2
F22
F25
G4
G1
G23
G26
H3
H6
H21
H24
J2
J5
J22
J25
K1
K4
K23
K26
L3
L6
L21
L24
M2
M5
M22
M25
N1
N4
N23
N26
P3 A25
VSS[082]
VSS[001]
VSS[002]
VSS[083]
VSS[003]
VSS[084]
VSS[004]
VSS[085]
VSS[005]
VSS[086]
VSS[006]
VSS[087]
VSS[007]
VSS[088]
VSS[008]
VSS[089]
VSS[009]
VSS[090]
VSS[010]
VSS[091]
VSS[011]
VSS[092]
VSS[012]
VSS[093]
VSS[013]
VSS[094]
VSS[014]
VSS[095]
VSS[015]
VSS[096]
VSS[016]
VSS[097]
VSS[017]
VSS[098]
VSS[018]
VSS[099]
VSS[019]
VSS[100]
VSS[020]
VSS[101]
VSS[021]
VSS[102]
VSS[022]
VSS[103]
VSS[023]
VSS[104]
VSS[024]
VSS[105]
VSS[025]
VSS[106]
VSS[026]
VSS[107]
VSS[027]
VSS[108]
VSS[109]
VSS[029]
VSS[110]
VSS[030]
VSS[031]
VSS[112]
VSS[032]
VSS[113]
VSS[033]
VSS[114]
VSS[034]
VSS[115]
VSS[035]
VSS[116]
VSS[036]
VSS[117]
VSS[037]
VSS[118]
VSS[038]
VSS[119]
VSS[039]
VSS[120]
VSS[040]
VSS[121]
VSS[041]
VSS[122]
VSS[042]
VSS[123]
VSS[043]
VSS[124]
VSS[044]
VSS[125]
VSS[126]
VSS[046]
VSS[127]
VSS[047]
VSS[128]
VSS[048]
VSS[049]
VSS[130]
VSS[050]
VSS[131]
VSS[051]
VSS[132]
VSS[052]
VSS[133]
VSS[053]
VSS[134]
VSS[054]
VSS[135]
VSS[055]
VSS[136]
VSS[056]
VSS[137]
VSS[057]
VSS[138]
VSS[058]
VSS[139]
VSS[059]
VSS[140]
VSS[060]
VSS[141]
VSS[061]
VSS[142]
VSS[062]
VSS[143]
VSS[063]
VSS[144]
VSS[064]
VSS[145]
VSS[065]
VSS[146]
VSS[066]
VSS[148]
VSS[067]
VSS[068]
VSS[149]
VSS[069]
VSS[150]
VSS[070]
VSS[151]
VSS[071]
VSS[152]
VSS[072]
VSS[153]
VSS[073]
VSS[154]
VSS[074]
VSS[155]
VSS[075]
VSS[156]
VSS[076]
VSS[157]
VSS[077]
VSS[158]
VSS[078]
VSS[159]
VSS[079]
VSS[160]
VSS[080]
VSS[161]
VSS[081] VSS[162]
VSS[163]
Penryn Ball-out Rev 1a
NB5
1
P6
P21
P24
R2
R5
R22
R25
T1
T4
T23
T26
U3
U6
U21
U24
V2
V5
V22
V25
W1
W4
W23
W26
Y3
Y6
Y21
Y24
AA2
AA5
AA11
AA14
AA16
AA19
AA22
AA25
AB1
AB4
AB8
AB11
AB13
AB16
AB19
AB23
AB26
AC3
AC6
AC11
AC14
AC16
AC19
AC21
AC24
AD2
AD5
AD8
AD11
AD13
AD16
AD19
AD22
AD25
AE1
AE4
AE11
AE14
AE16
AE19
AE23
AE26
A2
AF6
AF8
AF11
AF13
AF16
AF19
AF21
AF25
.
04
PROJECT : QL6
Quanta Computer Inc.
Size Document Number Rev
Custom
Date: Sheet
Penryn & TH Monitor 2/2
1
440Tuesday, February 26, 2008
of
2A
5
4
3
2
1
U23I
AU48
VSS_1
AR48
VSS_2
AL48
VSS_3
BB47
VSS_4
AW47
VSS_5
AN47
VSS_6
AJ47
VSS_7
AF47
VSS_8
AD47
D D
C C
B B
A A
AB47
BD46
BA46
AY46
AV46
AR46
AM46
BF44
AH44
AD44
AA44
M44
BC43
AV43
AU43
AM43
C43
BG42
AY42
AT42
AN42
AJ42
AE42
N42
BD41
AU41
AM41
AH41
AD41
AA41
U41
M41
G41
BG40
BB40
AV40
AN40
H40
AT39
AM39
AJ39
AE39
N39
BH38
BC38
BA38
AU38
AH38
AD38
AA38
U38
C38
BF37
BB37
AW37
AT37
AN37
AJ37
H37
C37
BG36
BD36
AK15
AU36
Y47
T47
N47
L47
G47
V46
R46
P46
H46
F46
Y44
U44
T44
F44
L42
Y41
T41
B41
E40
L39
B39
Y38
T38
F38
J43
J38
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
VSS_99
CANTIGA_GM
VSS
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
VSS_165
VSS_166
VSS_167
VSS_168
VSS_169
VSS_170
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
VSS_180
VSS_181
VSS_182
VSS_183
VSS_184
VSS_185
VSS_186
VSS_187
VSS_188
VSS_189
VSS_190
VSS_191
VSS_192
VSS_193
VSS_194
VSS_195
VSS_196
VSS_197
VSS_198
VSS_199
AM36
AE36
P36
L36
J36
F36
B36
AH35
AA35
Y35
U35
T35
BF34
AM34
AJ34
AF34
AE34
W34
B34
A34
BG33
BC33
BA33
AV33
AR33
AL33
AH33
AB33
P33
L33
H33
N32
K32
F32
C32
A31
AN29
T29
N29
K29
H29
F29
A29
BG28
BD28
BA28
AV28
AT28
AR28
AJ28
AG28
AE28
AB28
Y28
P28
K28
H28
F28
C28
BF26
AH26
AF26
AB26
AA26
C26
B26
BH25
BD25
BB25
AV25
AR25
AJ25
AC25
Y25
N25
L25
J25
G25
E25
BF24
AD12
AY24
AT24
AJ24
AH24
AF24
AB24
R24
L24
K24
J24
G24
F24
E24
BH23
AG23
Y23
B23
A23
AJ6
BG21
AW21
AU21
AP21
AN21
AH21
AF21
AB21
BC20
BA20
AW20
AT20
AJ20
AG20
BG19
BG17
BC17
AW17
AT17
BA16
AU16
AN16
BG15
AC15
W15
BG14
AA14
BG13
BC13
BA13
AN13
AJ13
AE13
BF12
AV12
AT12
AM12
AA12
BD11
BB11
AY11
AN11
AH11
BG10
AV10
AT10
AJ10
AE10
AA10
M10
BC9
AN9
AM9
AD9
BH8
R21
M21
G21
Y20
N20
K20
F20
C20
A20
A18
R17
M17
H17
C17
N16
K16
G16
E16
A15
C14
N13
G13
E13
A12
Y11
N11
G11
C11
BF9
BB8
AV8
AT8
L12
J21
L13
J12
U23J
G9
B9
CANTIGA_GM
VSS_199
VSS_200
VSS_201
VSS_202
VSS_203
VSS_204
VSS_205
VSS_206
VSS_207
VSS_208
VSS_209
VSS_210
VSS_211
VSS_212
VSS_213
VSS_214
VSS_215
VSS_216
VSS_217
VSS_218
VSS_219
VSS_220
VSS_221
VSS_222
VSS_223
VSS_224
VSS_225
VSS_226
VSS_227
VSS_228
VSS_229
VSS_230
VSS_231
VSS_232
VSS_233
VSS_235
VSS_237
VSS_238
VSS_239
VSS_240
VSS_241
VSS_242
VSS_243
VSS_244
VSS_245
VSS_246
VSS_247
VSS_248
VSS_249
VSS_250
VSS_251
VSS_252
VSS_255
VSS_256
VSS_257
VSS_258
VSS_259
VSS_260
VSS_261
VSS_262
VSS_263
VSS_264
VSS_265
VSS_266
VSS_267
VSS_268
VSS_269
VSS_270
VSS_271
VSS_272
VSS_273
VSS_275
VSS_276
VSS_277
VSS_278
VSS_279
VSS_280
VSS_281
VSS_282
VSS_283
VSS_284
VSS_285
VSS_286
VSS_287
VSS_288
VSS_289
VSS_290
VSS_291
VSS_292
VSS_293
VSS_294
VSS_295
VSS_296
VSS
VSS_NCTF_1
VSS_NCTF_2
VSS_NCTF_3
VSS_NCTF_4
VSS_NCTF_5
VSS_NCTF_6
VSS_NCTF_7
VSS_NCTF_8
VSS_NCTF_9
VSS_NCTF_10
VSS_NCTF_11
VSS_NCTF_12
VSS_NCTF_13
VSS_NCTF_14
VSS NCTF
VSS_NCTF_15
VSS_NCTF_16
VSS_SCB_1
VSS_SCB_2
VSS_SCB_3
VSS_SCB_4
VSS_SCB_5
VSS SCB
NC
VSS_297
VSS_298
VSS_299
VSS_300
VSS_301
VSS_302
VSS_303
VSS_304
VSS_305
VSS_306
VSS_307
VSS_308
VSS_309
VSS_310
VSS_311
VSS_312
VSS_313
VSS_314
VSS_315
VSS_316
VSS_317
VSS_318
VSS_319
VSS_320
VSS_321
VSS_322
VSS_323
VSS_324
VSS_325
VSS_327
VSS_328
VSS_329
VSS_330
VSS_331
VSS_332
VSS_333
VSS_334
VSS_335
VSS_336
VSS_337
VSS_338
VSS_339
VSS_340
VSS_341
VSS_342
VSS_343
VSS_344
VSS_345
VSS_346
VSS_347
VSS_348
VSS_349
VSS_350
VSS_351
VSS_352
VSS_353
VSS_354
NC_26
NC_27
NC_28
NC_29
NC_30
NC_31
NC_32
NC_33
NC_34
NC_35
NC_36
NC_37
NC_38
NC_39
NC_40
NC_41
NC_42
AH8
Y8
L8
E8
B8
AY7
AU7
AN7
AJ7
AE7
AA7
N7
J7
BG6
BD6
AV6
AT6
AM6
M6
C6
BA5
AH5
AD5
Y5
L5
J5
H5
F5
BE4
BC3
AV3
AL3
R3
P3
F3
BA2
AW2
AU2
AR2
AP2
AJ2
AH2
AF2
AE2
AD2
AC2
Y2
M2
K2
AM1
AA1
P1
H1
U24
U28
U25
U29
AF32
AB32
V32
AJ30
AM29
AF29
AB29
U26
U23
AL20
V20
AC19
AL17
AJ17
AA17
U17
BH48
BH1
A48
C1
A3
E1
D2
C3
B4
A5
A6
A43
A44
B45
C46
D47
B47
A46
F48
E48
C48
B48
+1.05V
+1.05V
R361
221/F_4
R362
100/F_4
R79
24.9/F_4
R386
1K/F_4
R383
2K/F_4
05
M11
AD14
AA13
AA11
AD11
AD10
AD13
AE12
AD8
AD3
AD7
AE14
AC1
AC3
AE11
AG2
AD6
N12
P13
N10
Y10
Y12
Y14
AA8
AA9
AE9
AA2
AA3
AF3
AE3
AE8
C12
E11
A11
B11
F2
G8
F8
E6
G2
H6
H2
F6
D4
H3
M9
J1
J2
J6
P2
L2
R2
N9
L6
M5
J3
N2
R1
N5
N6
N8
L7
M3
Y3
Y6
Y7
W2
Y9
C5
E3
U23A
H_D#_0
H_D#_1
H_D#_2
H_D#_3
H_D#_4
H_D#_5
H_D#_6
H_D#_7
H_D#_8
H_D#_9
H_D#_10
H_D#_11
H_D#_12
H_D#_13
H_D#_14
H_D#_15
H_D#_16
H_D#_17
H_D#_18
H_D#_19
H_D#_20
H_D#_21
H_D#_22
H_D#_23
H_D#_24
H_D#_25
H_D#_26
H_D#_27
H_D#_28
H_D#_29
H_D#_30
H_D#_31
H_D#_32
H_D#_33
H_D#_34
H_D#_35
H_D#_36
H_D#_37
H_D#_38
H_D#_39
H_D#_40
H_D#_41
H_D#_42
H_D#_43
H_D#_44
H_D#_45
H_D#_46
H_D#_47
H_D#_48
H_D#_49
H_D#_50
H_D#_51
H_D#_52
H_D#_53
H_D#_54
H_D#_55
H_D#_56
H_D#_57
H_D#_58
H_D#_59
H_D#_60
H_D#_61
H_D#_62
H_D#_63
H_SWING
H_RCOMP
H_CPURST#
H_CPUSLP#
H_AVREF
H_DVREF
CANTIGA_GM
H_A#_3
H_A#_4
H_A#_5
H_A#_6
H_A#_7
H_A#_8
H_A#_9
H_A#_10
H_A#_11
H_A#_12
H_A#_13
H_A#_14
H_A#_15
H_A#_16
H_A#_17
H_A#_18
H_A#_19
H_A#_20
H_A#_21
H_A#_22
H_A#_23
H_A#_24
H_A#_25
H_A#_26
H_A#_27
H_A#_28
H_A#_29
H_A#_30
H_A#_31
H_A#_32
H_A#_33
H_A#_34
H_A#_35
H_ADS#
H_ADSTB#_0
H_ADSTB#_1
H_BNR#
H_BPRI#
H_BREQ#
H_DEFER#
H_DBSY#
HPLL_CLK
HPLL_CLK#
H_DPWR#
H_DRDY#
H_HIT#
H_HITM#
HOST
H_LOCK#
H_TRDY#
H_DINV#_0
H_DINV#_1
H_DINV#_2
H_DINV#_3
H_DSTBN#_0
H_DSTBN#_1
H_DSTBN#_2
H_DSTBN#_3
H_DSTBP#_0
H_DSTBP#_1
H_DSTBP#_2
H_DSTBP#_3
H_REQ#_0
H_REQ#_1
H_REQ#_2
H_REQ#_3
H_REQ#_4
H_RS#_0
H_RS#_1
H_RS#_2
H_D#[63:0]3
H_SWING
C593
.1U/10V_4
H_RCOMP
H_CPURST#3
H_CPUSLP#3 H_RS#[2:0] 3
C598
.1U/10V_4
H_AVREF
H_AVREF
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
H_SWING
H_RCOMP
A14
C15
F16
H13
C18
M16
J13
P16
R16
N17
M13
E17
P17
F17
G20
B19
J16
E20
H16
J20
L17
A17
B17
L16
C21
J17
H20
B18
K17
B20
F21
K21
L20
H12
B16
G17
A9
F11
G12
E9
B10
AH7
AH6
J11
F9
H9
E12
H11
C9
J8
L3
Y13
Y1
L10
M7
AA5
AE6
L9
M8
AA6
AE5
B15
K13
F13
B13
B14
B6
F12
C8
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_RS#0
H_RS#1
H_RS#2
H_A#[35:3] 3
H_ADS# 3
H_ADSTB#0 3
H_ADSTB#1 3
H_BNR# 3
H_BPRI# 3
HBREQ#0 3
H_DEFER# 3
H_DBSY# 3
CLK_MCH_BCLK 2
CLK_MCH_BCLK# 2
H_DPWR# 3
H_DRDY# 3
H_HIT# 3
H_HITM# 3
H_LOCK# 3
H_TRDY# 3
H_DINV#0 3
H_DINV#1 3
H_DINV#2 3
H_DINV#3 3
H_DSTBN#0 3
H_DSTBN#1 3
H_DSTBN#2 3
H_DSTBN#3 3
H_DSTBP#0 3
H_DSTBP#1 3
H_DSTBP#2 3
H_DSTBP#3 3
H_REQ#[4:0] 3
+1.05V2,3,4,6,8,9,19,22,29,34,35
PROJECT : QL6
Quanta Computer Inc.
Size Document Number Rev
Custom
NB5
5
4
3
2
Date: Sheet
Cantiga Host & VSS 1/5
1
540Tuesday, February 26, 2008
2A
of
5
MCH_CFG_5 DMIx2 selection
Low: DMIx2
High: DMIx4 (Default)
MCH_CFG_16 FSB Dynamic ODT
Low: Dynamic ODT disabled
High: Dynamic ODT enabled (Default)
MCH_CFG_9 PCI Express Graphic Lane
Low: Reverse Lane
D D
High: Normal operation(Default)
MCH_CFG_19 DMI Lane Reversal
MCH_CFG_6 iTPM Host Interface
Low: iTPM Host Interface enabled
High: iTPM Host Interface disabled (Default)
MCH_CFG_7 Intel (R) Management Engine Crypto
Low: Intel (R) Management Engine Crypto
TLS cipher suite with no confidentiality
High: Intel (R) Management Engine Crypto
TLS cipher suite with no confidentiality (Default)
MCH_CFG_10 PCIe Lookback Enable
Low: Enabled
High: Disabled (Default)
MCH_CFG_12/13 XOR/ALLZ/CLOCK Un-gating
MCH_CFG_13 MCH_CFG_12
00
1
0
C C
11
MCH_BSEL02
MCH_BSEL12
MCH_BSEL22
R116 *2.2K_4
For iTPM
B B
PM_SYNC#21
H_DPRSTP#3,19,35
PM_EXTTS#010,11
PM_EXTTS#111
DELAY_VR_PWRGOOD21,35
PLT_RST-R#12,20
PM_THRMTRIP#3,19
DPRSLPVR21,35
+3V
R135 10K/F_4
R132 10K/F_4
A A
Configuration
Reserved
XOR Mode enabled
0
All-Z Mode enabled
1
Normal operation (Default)
TP17
TP61
TP18
TP13
TP15
TP10
TP12
TP14
TP8
TP11
TP20
TP19
TP21
R93 100/F_4
PM_EXTTS#1
ACZ_BITCLK_MCH
R421
*33_4
C624
*33P/50V_4
5
TP30
TP26
TP24
TP23
MCH_CFG_3
TP5
MCH_CFG_4
MCH_CFG_5
MCH_CFG_6
MCH_CFG_7
MCH_CFG_8
MCH_CFG_9
MCH_CFG_10
MCH_CFG_11
TP9
MCH_CFG_12
MCH_CFG_13
MCH_CFG_14
TP6
MCH_CFG_15
TP7
MCH_CFG_16
MCH_CFG_17
MCH_CFG_18
MCH_CFG_19
MCH_CFG_20
PM_EXTTS#0
PM_EXTTS#1
RST_IN#_MCH
M36
N36
R33
T33
AH9
AH10
AH12
AH13
K12
T24
B31
B2
M1
AY21
BG23
BF23
BH18
BF18
AL34
AK34
AN35
AM35
T25
R25
P25
P20
P24
C25
N24
M24
E21
C23
C24
N21
P21
T21
R20
M20
L21
H21
P29
R28
T28
R29
B7
N33
P32
AT40
AT11
T20
R32
BG48
BF48
BD48
BC48
BH47
BG47
BE47
BH46
BF46
BG45
BH44
BH43
BH6
BH5
BG4
BH3
BF3
BH2
BG2
BE2
BG1
BF1
BD1
BC1
F1
A47
CANTIGA_GM
U23B
RSVD1
RSVD2
RSVD3
RSVD4
RSVD5
RSVD6
RSVD7
RSVD8
RSVD9
RSVD14
RSVD15
RSVD16
RSVD17
RSVD20
RSVD22
RSVD23
RSVD24
RSVD25
ME_JTAG_TCK
ME_JTAG_TDI
ME_JTAG_TDO
ME_JTAG_TMS
CFG_0
CFG_1
CFG_2
CFG_3
CFG_4
CFG_5
CFG_6
CFG_7
CFG_8
CFG_9
CFG_10
CFG_11
CFG_12
CFG_13
CFG_14
CFG_15
CFG_16
CFG_17
CFG_18
CFG_19
CFG_20
PM_SYNC#
PM_DPRSTP#
PM_EXT_TS#_0
PM_EXT_TS#_1
PWROK
RSTIN#
THERMTRIP#
DPRSLPVR
NC_1
NC_2
NC_3
NC_4
NC_5
NC_6
NC_7
NC_8
NC_9
NC_10
NC_11
NC_12
NC_13
NC_14
NC_15
NC_16
NC_17
NC_18
NC_19
NC_20
NC_21
NC_22
NC_23
NC_24
NC_25
NC_26
CFGRSVD
NC
4
AP24
SA_CK_0
AT21
SA_CK_1
AV24
SB_CK_0
AU20
SB_CK_1
AR24
SA_CK#_0
AR21
SA_CK#_1
AU24
SB_CK#_0
AV20
SB_CK#_1
BC28
SA_CKE_0
AY28
SA_CKE_1
AY36
SB_CKE_0
BB36
SB_CKE_1
BA17
SA_CS#_0
AY16
SA_CS#_1
AV16
SB_CS#_0
AR13
SB_CS#_1
BD17
SA_ODT_0
AY17
SA_ODT_1
BF15
SB_ODT_0
AY13
SB_ODT_1
BG22
SM_RCOMP
BH21
SM_RCOMP#
SM_VREF
SM_PWROK
SM_REXT
PEG_CLK
PEG_CLK#
DMI_RXN_0
DMI_RXN_1
DMI_RXN_2
DMI_RXN_3
DMI_RXP_0
DMI_RXP_1
DMI_RXP_2
DMI_RXP_3
DMI_TXN_0
DMI_TXN_1
DMI_TXN_2
DMI_TXN_3
DMI_TXP_0
DMI_TXP_1
DMI_TXP_2
DMI_TXP_3
GFX_VID_0
GFX_VID_1
GFX_VID_2
GFX_VID_3
GFX_VID_4
GFX_VR_EN
CL_CLK
CL_DATA
CL_PWROK
CL_RST#
CL_VREF
CLKREQ#
ICH_SYNC#
TSATN#
HDA_BCLK
HDA_RST#
HDA_SDI
HDA_SDO
HDA_SYNC
BF28
BH28
AV42
AR36
BF17
BC36
B38
A38
E41
F41
F43
E43
AE41
AE37
AE47
AH39
AE40
AE38
AE48
AH40
AE35
AE43
AE46
AH42
AD35
AE44
AF46
AH43
B33
B32
G33
F33
E33
C34
AH37
AH36
AN36
AJ35
AH34
N28
M28
G36
E36
K36
H36
B12
B28
B30
B29
C29
A28
SM_RCOMP_VOH
SM_RCOMP_VOL
SM_DRAMRST#
DDR CLK/ CONTROL/COMPENSATION
DPLL_REF_CLK
DPLL_REF_CLK#
ME JTAG
DPLL_REF_SSCLK
DPLL_REF_SSCLK#
CLK
DMI
PM
GRAPHICS VID
MEHDA
DDPC_CTRLCLK
DDPC_CTRLDATA
SDVO_CTRLCLK
SDVO_CTRLDATA
MISC
4
M_A_CLK0 10
M_A_CLK1 10
M_B_CLK0 10
M_B_CLK1 10
M_A_CLK0# 10
M_A_CLK1# 10
M_B_CLK0# 10
M_B_CLK1# 10
M_A_CKE0 10,11
M_A_CKE1 10,11
M_B_CKE0 10,11
M_B_CKE1 10,11
M_A_CS#0 10,11
M_A_CS#1 10,11
M_B_CS#0 10,11
M_B_CS#1 10,11
M_A_ODT0 10,11
M_A_ODT1 10,11
M_B_ODT0 10,11
M_B_ODT1 10,11
SM_RCOMP
SM_RCOMP#
SM_RCOMP_VOH
SM_RCOMP_VOL
+0.9VSMVREF_MCH
SW_PWROK_NB
SM_REXT
TP_SM_DRAMRST#
DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3
DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3
DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3
DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3
GFXVR_VID_0
GFXVR_VID_1
GFXVR_VID_2
GFXVR_VID_3
GFXVR_VID_4
GFXVR_EN
DDPC_CTRLCLK
DDPPC_CTRLDATA
MCH_TSATN
ACZ_SDIN3_MCH
R120 80.6/F_4
R113 80.6/F_4
DREFCLK 2
DREFCLK# 2
DREFSSCLK 2
DREFSSCLK# 2
CLK_PCIE_3GPLL 2
CLK_PCIE_3GPLL# 2
CL_CLK0 21
CL_DATA0 21
ECPWROK 4,21,30
CL_RST#0 21
R92 56.2/F_4
R429 *33_4
R144 10K/F_4
R103 499/F_4
TP29
DMI_TXN[3:0] 20
DMI_TXP[3:0] 20
DMI_RXN[3:0] 20
DMI_RXP[3:0] 20
TP63
TP62
TP25
TP28
TP27
TP64
MCH_CLVREF
TP22
TP16
SDVO_CLK 18
SDVO_DATA 18
CLK_MCH_OE# 2
MCH_ICH_SYNC# 21
+1.8VSUS
0.35 V
C354
.1U/10V_4
ACZ_BITCLK_MCH 19
ACZ_RST#_MCH 19
ACZ_SDIN3 19
ACZ_SDOUT_MCH 19
ACZ_SYNC_MCH 19
3
+1.05V
+1.05V
3
HSYNC_COM14,18
VSYNC_COM14,18
R167
1K/F_4
R168
499/F_4
2
+3V2,4,9,10,11,12,14,15,17,18,19,20,21,22,24,25,26,28,29,30,31,35,36,38
+1.8VSUS8,9,10,29,34,37
+1.05V2,3,4,5,8,9,19,22,29,34,35
+1.05V_PEG9
L32
G32
M32
M33
K33
J33
M29
C44
B43
E37
E38
C41
C40
B37
A37
H47
E46
G40
A40
H48
D45
F40
B40
A41
H38
G37
J37
B42
G38
F37
K37
F25
H25
K25
H24
C31
E32
E28
G28
J28
G29
H32
J32
J29
E29
L29
C279
2.2U/6.3V_6
C272
2.2U/6.3V_6
U23C
L_BKLT_CTRL
L_BKLT_EN
L_CTRL_CLK
L_CTRL_DATA
L_DDC_CLK
L_DDC_DATA
L_VDD_EN
LVDS_IBG
LVDS_VBG
LVDS_VREFH
LVDS_VREFL
LVDSA_CLK#
LVDSA_CLK
LVDSB_CLK#
LVDSB_CLK
LVDSA_DATA#_0
LVDSA_DATA#_1
LVDSA_DATA#_2
LVDSA_DATA#_3
LVDSA_DATA_0
LVDSA_DATA_1
LVDSA_DATA_2
LVDSA_DATA_3
LVDSB_DATA#_0
LVDSB_DATA#_1
LVDSB_DATA#_2
LVDSB_DATA#_3
LVDSB_DATA_0
LVDSB_DATA_1
LVDSB_DATA_2
LVDSB_DATA_3
TVA_DAC
TVB_DAC
TVC_DAC
TV_RTN
TV_DCONSEL_0
TV_DCONSEL_1
CRT_BLUE
CRT_GREEN
CRT_RED
CRT_IRTN
CRT_DDC_CLK
CRT_DDC_DATA
CRT_HSYNC
CRT_TVO_IREF
CRT_VSYNC
CANTIGA_GM
+1.8VSUS
R128
1K/F_4
12
R137
3.01K/F_4
R130
1K/F_4
int
DPST_PWM15,17
LVDS_BLON15,17
EDIDCLK14,15,17
EDIDDATA14,15,17
DISP_ON15,17
CRT_B14,18
CRT_G14,18
CRT_R14,18
DDCCLK15,18
DDCDATA15,18
R406 *0_4
R129 *0_4
R131 *10K/F_4
+3V
R143 *10K/F_4
R399 *0_4
R396 *0_4
R405 *0_4
R436 *2.37K/F_4
R110 0_4
R107 0_4
R117 0_4
Disable UMA TV function
R417 *0_4
R416 *0_4
R418 *0_4
R419 *0_4
R124 0_4
R420 *0_4
R122 0_4
SM_RCOMP_VOH
SM_RCOMP_VOLPM_EXTTS#0
DPST_PWM_INT
LVDS_BLON_INT
L_CTRL_CLK
L_CTRL_DATA
EDIDCLK_INT
EDIDDATA_INT
DISP_ON_INT
LVDS_IBG
LVDS_VBG
TP66
LA_CLK#17
LA_CLK17
LB_CLK#17
LB_CLK17
LA_DATAN017
LA_DATAN117
LA_DATAN217
LA_DATAP017
LA_DATAP117
LA_DATAP217
LB_DATAN017
LB_DATAN117
LB_DATAN217
LB_DATAP017
LB_DATAP117
LB_DATAP217
R142 *0_4
R136 *0_4
R133 *33_4 C381 .1U/10V_4
R415 0_4
R126 *33_4
int
TP67
TP65
TP31
TP32
C268
.01U/16V_4
C281
.01U/16V_4
LA_DATAN3
LA_DATAP3
LB_DATAN3
LB_DATAP3
TV_COMP1
TV_Y/G1
TV_C/R1
TV_DCONSEL1
TV_DCONSEL0
CRT_B_1
CRT_G_1
CRT_R_1
DDCCLK_INT
DDCDATA_INT
HSYNC_INT
CRTIREF
VSYNC_INT
HP SVTP TEST
+1.8VSUS
R164
+0.9VSMVREF_MCH
C341
C340
.1U/10V_4
470P/50V_4
*1K/F_4
R165 0_4
*1K/F_4
+0.9VSMVREF 10,37
R161
2
LVDS
TV
VGA
PEG_TX#[15:0]
PEG_TX[15:0]
PEG_RX#[15:0]
PEG_RX[15:0]
PCI-EXPRESS GRAPHICS
PEG_TX0
PEG_TX#0
PEG_TX1
PEG_TX#1
PEG_TX2
PEG_TX#2
PEG_TX3
PEG_TX#3
C416,C423,C440,C431
C419,C418,C430,C424
HDMI_HPD_CON18
PEG_TX#[15:0] 12
PEG_TX[15:0] 12
PEG_RX#[15:0] 12
PEG_RX[15:0] 12
T37
PEG_COMPI
T36
PEG_COMPO
H44
PEG_RX#_0
J46
PEG_RX#_1
L44
PEG_RX#_2
L40
PEG_RX#_3
N41
PEG_RX#_4
P48
PEG_RX#_5
N44
PEG_RX#_6
T43
PEG_RX#_7
U43
PEG_RX#_8
Y43
PEG_RX#_9
Y48
PEG_RX#_10
Y36
PEG_RX#_11
AA43
PEG_RX#_12
AD37
PEG_RX#_13
AC47
PEG_RX#_14
AD39
PEG_RX#_15
H43
PEG_RX_0
J44
PEG_RX_1
L43
PEG_RX_2
L41
PEG_RX_3
N40
PEG_RX_4
P47
PEG_RX_5
N43
PEG_RX_6
T42
PEG_RX_7
U42
PEG_RX_8
Y42
PEG_RX_9
W47
PEG_RX_10
Y37
PEG_RX_11
AA42
PEG_RX_12
AD36
PEG_RX_13
AC48
PEG_RX_14
AD40
PEG_RX_15
J41
PEG_TX#_0
M46
PEG_TX#_1
M47
PEG_TX#_2
M40
PEG_TX#_3
M42
PEG_TX#_4
R48
PEG_TX#_5
N38
PEG_TX#_6
T40
PEG_TX#_7
U37
PEG_TX#_8
U40
PEG_TX#_9
Y40
PEG_TX#_10
AA46
PEG_TX#_11
AA37
PEG_TX#_12
AA40
PEG_TX#_13
AD43
PEG_TX#_14
AC46
PEG_TX#_15
J42
PEG_TX_0
L46
PEG_TX_1
M48
PEG_TX_2
M39
PEG_TX_3
M43
PEG_TX_4
R47
PEG_TX_5
N37
PEG_TX_6
T39
PEG_TX_7
U36
PEG_TX_8
U39
PEG_TX_9
Y39
PEG_TX_10
Y46
PEG_TX_11
AA36
PEG_TX_12
AA39
PEG_TX_13
AD42
PEG_TX_14
AD46
PEG_TX_15
For UMA HDMI Function
RP41 *4P2R-S-0
4
2
RP43 *4P2R-S-0
4
2
RP44 *4P2R-S-0
2
4
RP42 *4P2R-S-0
2
4
Need to install for GM
R151 *20K/F_4
+3V
HPD# Inverting Level Shifting Circuit
Size Document Number Rev
Custom
NB5
Date: Sheet
1
06
+1.05V_PEG
PEG_COMP
R138 49.9/F_4
PEG_RX#0
PEG_RX#1
PEG_RX#2
PEG_RX#3
PEG_RX#4
PEG_RX#5
PEG_RX#6
PEG_RX#7
PEG_RX#8
PEG_RX#9
PEG_RX#10
PEG_RX#11
PEG_RX#12
PEG_RX#13
PEG_RX#14
PEG_RX#15
PEG_RX0
PEG_RX1
PEG_RX2
PEG_RX3
PEG_RX4
PEG_RX5
PEG_RX6
PEG_RX7
PEG_RX8
PEG_RX9
PEG_RX10
PEG_RX11
PEG_RX12
PEG_RX13
PEG_RX14
PEG_RX15
C_PEG_TX#0
C_PEG_TX#1
C_PEG_TX#2
C_PEG_TX#3
C_PEG_TX#4
C_PEG_TX#5
C_PEG_TX#6
C_PEG_TX#7
C_PEG_TX#8
C_PEG_TX#9
C_PEG_TX#10
C_PEG_TX#11
C_PEG_TX#12
C_PEG_TX#13
C_PEG_TX#14
C_PEG_TX#15
C_PEG_TX0
C_PEG_TX1
C_PEG_TX2
C_PEG_TX3
C_PEG_TX4
C_PEG_TX5
C_PEG_TX6
C_PEG_TX7
C_PEG_TX8
C_PEG_TX9
C_PEG_TX10
C_PEG_TX11
C_PEG_TX12
C_PEG_TX13
C_PEG_TX14
C_PEG_TX15
3
1
3
1
1
3
1
3
2
R158
*100K/F_4
PROJECT : QL6
Quanta Computer Inc.
Cantiga DMI/DISP 2/5
int
R160
*0_4
C348 .1U/10V_4
C355 .1U/10V_4
C362 .1U/10V_4
C358 .1U/10V_4
C376 .1U/10V_4
C374 .1U/10V_4
C360 .1U/10V_4
C373 .1U/10V_4
C379 .1U/10V_4
C363 .1U/10V_4
C380 .1U/10V_4
C365 .1U/10V_4
C367 .1U/10V_4
C369 .1U/10V_4
C384 .1U/10V_4
C383 .1U/10V_4
C351 .1U/10V_4
C356 .1U/10V_4R118 0_4
C361 .1U/10V_4
C357 .1U/10V_4
C377 .1U/10V_4
C375 .1U/10V_4
C359 .1U/10V_4
C372 .1U/10V_4
C378 .1U/10V_4
C364 .1U/10V_4
C366 .1U/10V_4
C368 .1U/10V_4
C370 .1U/10V_4
C385 .1U/10V_4
C382 .1U/10V_4
des
HDMI_HPD#
3
Q9
*2N7002
1
1
HDMI_HPD#
PEG_TX#0
PEG_TX#1
PEG_TX#2
PEG_TX#3
PEG_TX#4
PEG_TX#5
PEG_TX#6
PEG_TX#7
PEG_TX#8
PEG_TX#9
PEG_TX#10
PEG_TX#11
PEG_TX#12
PEG_TX#13
PEG_TX#14
PEG_TX#15
PEG_TX0
PEG_TX1
PEG_TX2
PEG_TX3
PEG_TX4
PEG_TX5
PEG_TX6
PEG_TX7
PEG_TX8
PEG_TX9
PEG_TX10
PEG_TX11
PEG_TX12
PEG_TX13
PEG_TX14
PEG_TX15
IN_D2 18
IN_D2# 18
IN_D1 18
IN_D1# 18
IN_D0 18
IN_D0# 18
IN_CLK 18
IN_CLK# 18
Level: 0.9V
R150
*7.5K/F_4
640Tuesday, February 26, 2008
of
2A
5
4
3
2
1
07
D D
M_A_DQ[63:0]10
C C
B B
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
AJ38
AJ41
AN38
AM38
AJ36
AJ40
AM44
AM42
AN43
AN44
AU40
AT38
AN41
AN39
AU44
AU42
AV39
AY44
BA40
BD43
AV41
AY43
BB41
BC40
AY37
BD38
AV37
AT36
AY38
BB38
AV36
AW36
BD13
AU11
BC11
BA12
AU13
AV13
BD12
BC12
AU10
BA11
AN10
AM11
AM5
AN12
AM13
AJ11
AJ12
BB9
BA9
AV9
BD9
AY8
BA6
AV5
AV7
AT9
AN8
AU5
AU6
AT5
AJ9
AJ8
U23D
SA_DQ_0
SA_DQ_1
SA_DQ_2
SA_DQ_3
SA_DQ_4
SA_DQ_5
SA_DQ_6
SA_DQ_7
SA_DQ_8
SA_DQ_9
SA_DQ_10
SA_DQ_11
SA_DQ_12
SA_DQ_13
SA_DQ_14
SA_DQ_15
SA_DQ_16
SA_DQ_17
SA_DQ_18
SA_DQ_19
SA_DQ_20
SA_DQ_21
SA_DQ_22
SA_DQ_23
SA_DQ_24
SA_DQ_25
SA_DQ_26
SA_DQ_27
SA_DQ_28
SA_DQ_29
SA_DQ_30
SA_DQ_31
SA_DQ_32
SA_DQ_33
SA_DQ_34
SA_DQ_35
SA_DQ_36
SA_DQ_37
SA_DQ_38
SA_DQ_39
SA_DQ_40
SA_DQ_41
SA_DQ_42
SA_DQ_43
SA_DQ_44
SA_DQ_45
SA_DQ_46
SA_DQ_47
SA_DQ_48
SA_DQ_49
SA_DQ_50
SA_DQ_51
SA_DQ_52
SA_DQ_53
SA_DQ_54
SA_DQ_55
SA_DQ_56
SA_DQ_57
SA_DQ_58
SA_DQ_59
SA_DQ_60
SA_DQ_61
SA_DQ_62
SA_DQ_63
CANTIGA_GM
BD21
SA_BS_0
BG18
SA_BS_1
AT25
SA_BS_2
BB20
SA_RAS#
BD20
SA_CAS#
AY20
SA_WE#
M_A_DM0
AM37
SA_DM_0
SA_DM_1
SA_DM_2
SA_DM_3
SA_DM_4
SA_DM_5
SA_DM_6
SA_DM_7
SA_DQS_0
SA_DQS_1
SA_DQS_2
SA_DQS_3
SA_DQS_4
SA_DQS_5
SA_DQS_6
SA_DQS_7
SA_DQS#_0
SA_DQS#_1
SA_DQS#_2
SA_DQS#_3
SA_DQS#_4
SA_DQS#_5
SA_DQS#_6
SA_DQS#_7
SA_MA_0
SA_MA_1
SA_MA_2
SA_MA_3
SA_MA_4
SA_MA_5
SA_MA_6
SA_MA_7
SA_MA_8
SA_MA_9
SA_MA_10
SA_MA_11
SA_MA_12
SA_MA_13
SA_MA_14
DDR SYSTEM MEMORY A
AT41
AY41
AU39
BB12
AY6
AT7
AJ5
AJ44
AT44
BA43
BC37
AW12
BC8
AU8
AM7
AJ43
AT43
BA44
BD37
AY12
BD8
AU9
AM8
BA21
BC24
BG24
BH24
BG25
BA24
BD24
BG27
BF25
AW24
BC21
BG26
BH26
BH17
AY25
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7
M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_BS#0 10,11
M_A_BS#1 10,11
M_A_BS#2 10,11
M_A_RAS# 10,11
M_A_CAS# 10,11
M_A_WE# 10,11
M_A_DM[7:0] 10
M_A_DQS[7:0] 10
M_A_DQS#[7:0] 10
M_A_A[14:0] 10,11
M_B_DQ[63:0]10
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
AK47
AH46
AP47
AP46
AJ46
AJ48
AM48
AP48
AU47
AU46
BA48
AY48
AT47
AR47
BA47
BC47
BC46
BC44
BG43
BF43
BE45
BC41
BF40
BF41
BG38
BF38
BH35
BG35
BH40
BG39
BG34
BH34
BH14
BG12
BH11
BG8
BH12
BF11
BF8
BG7
BC5
BC6
AY3
AY1
BF6
BF5
BA1
BD3
AV2
AU3
AR3
AN2
AY2
AV1
AP3
AR1
AH1
AM2
AM3
AH3
AL1
AL2
AJ1
AJ3
U23E
SB_DQ_0
SB_DQ_1
SB_DQ_2
SB_DQ_3
SB_DQ_4
SB_DQ_5
SB_DQ_6
SB_DQ_7
SB_DQ_8
SB_DQ_9
SB_DQ_10
SB_DQ_11
SB_DQ_12
SB_DQ_13
SB_DQ_14
SB_DQ_15
SB_DQ_16
SB_DQ_17
SB_DQ_18
SB_DQ_19
SB_DQ_20
SB_DQ_21
SB_DQ_22
SB_DQ_23
SB_DQ_24
SB_DQ_25
SB_DQ_26
SB_DQ_27
SB_DQ_28
SB_DQ_29
SB_DQ_30
SB_DQ_31
SB_DQ_32
SB_DQ_33
SB_DQ_34
SB_DQ_35
SB_DQ_36
SB_DQ_37
SB_DQ_38
SB_DQ_39
SB_DQ_40
SB_DQ_41
SB_DQ_42
SB_DQ_43
SB_DQ_44
SB_DQ_45
SB_DQ_46
SB_DQ_47
SB_DQ_48
SB_DQ_49
SB_DQ_50
SB_DQ_51
SB_DQ_52
SB_DQ_53
SB_DQ_54
SB_DQ_55
SB_DQ_56
SB_DQ_57
SB_DQ_58
SB_DQ_59
SB_DQ_60
SB_DQ_61
SB_DQ_62
SB_DQ_63
CANTIGA_GM
BC16
SB_BS_0
BB17
SB_BS_1
BB33
SB_BS_2
AU17
SB_RAS#
BG16
SB_CAS#
BF14
SB_WE#
M_B_DM0
AM47
SB_DM_0
SB_DM_1
SB_DM_2
SB_DM_3
SB_DM_4
SB_DM_5
SB_DM_6
SB_DM_7
SB_DQS_0
SB_DQS_1
SB_DQS_2
SB_DQS_3
SB_DQS_4
SB_DQS_5
SB_DQS_6
SB_DQS_7
SB_DQS#_0
SB_DQS#_1
SB_DQS#_2
SB_DQS#_3
SB_DQS#_4
SB_DQS#_5
SB_DQS#_6
SB_DQS#_7
SB_MA_0
SB_MA_1
SB_MA_2
SB_MA_3
SB_MA_4
SB_MA_5
SB_MA_6
SB_MA_7
SB_MA_8
SB_MA_9
SB_MA_10
SB_MA_11
SB_MA_12
DDR SYSTEM MEMORY B
SB_MA_13
SB_MA_14
AY47
BD40
BF35
BG11
BA3
AP1
AK2
AL47
AV48
BG41
BG37
BH9
BB2
AU1
AN6
AL46
AV47
BH41
BH37
BG9
BC2
AT2
AN5
AV17
BA25
BC25
AU25
AW25
BB28
AU28
AW28
AT33
BD33
BB16
AW33
AY33
BH15
AU33
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7
M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_BS#0 10,11
M_B_BS#1 10,11
M_B_BS#2 10,11
M_B_RAS# 10,11
M_B_CAS# 10,11
M_B_WE# 10,11
M_B_DM[7:0] 10
M_B_DQS[7:0] 10
M_B_DQS#[7:0] 10
M_B_A[14:0] 10,11
A A
PROJECT : QL6
Quanta Computer Inc.
Size Document Number Rev
Custom
NB5
5
4
3
2
Date: Sheet
Cantiga DDR2 3/5
1
740Tuesday, February 26, 2008
2A
of
5
AN33
BH32
BG32
BF32
BD32
BC32
BB32
BA32
AY32
AW32
AV32
AU32
AT32
AR32
AP32
AN32
BH31
BG31
BF31
BG30
BH29
BG29
BF29
BD29
BC29
BB29
BA29
AY29
AW29
AV29
AU29
AT29
AR29
AP29
BA36
BB24
BD16
BB21
AW16
AW13
AT13
AE25
AB25
AA25
AE24
AC24
AA24
AE23
AC23
AB23
AA23
AJ21
AG21
AE21
AC21
AA21
AH20
AF20
AE20
AC20
AB20
AA20
AM15
AL15
AE15
AJ15
AH15
AG15
AF15
AB15
AA15
AN14
AM14
AJ14
AH14
Y26
Y24
Y21
T17
T16
Y15
V15
U15
U14
T14
U23G
VCC_SM_2
VCC_SM_3
VCC_SM_4
VCC_SM_5
VCC_SM_6
VCC_SM_7
VCC_SM_8
VCC_SM_9
VCC_SM_10
VCC_SM_11
VCC_SM_12
VCC_SM_13
VCC_SM_14
VCC_SM_15
VCC_SM_16
VCC_SM_17
VCC_SM_18
VCC_SM_19
VCC_SM_20
VCC_SM_21
VCC_SM_22
VCC_SM_23
VCC_SM_24
VCC_SM_25
VCC_SM_26
VCC_SM_27
VCC_SM_28
VCC_SM_29
VCC_SM_30
VCC_SM_31
VCC_SM_32
VCC_SM_33
VCC_SM_34
VCC_SM_35
VCC_SM_36/NC
VCC_SM_37/NC
VCC_SM_38/NC
VCC_SM_39/NC
VCC_SM_40/NC
VCC_SM_41/NC
VCC_SM_42/NC
VCC_AXG_1
VCC_AXG_2
VCC_AXG_3
VCC_AXG_4
VCC_AXG_5
VCC_AXG_6
VCC_AXG_7
VCC_AXG_8
VCC_AXG_9
VCC_AXG_10
VCC_AXG_11
VCC_AXG_12
VCC_AXG_13
VCC_AXG_14
VCC_AXG_15
VCC_AXG_16
VCC_AXG_17
VCC_AXG_18
VCC_AXG_19
VCC_AXG_20
VCC_AXG_21
VCC_AXG_22
VCC_AXG_23
VCC_AXG_24
VCC_AXG_25
VCC_AXG_26
VCC_AXG_27
VCC_AXG_28
VCC_AXG_29
VCC_AXG_30
VCC_AXG_31
VCC_AXG_32
VCC_AXG_33
VCC_AXG_34
VCC_AXG_35
VCC_AXG_36
VCC_AXG_37
VCC_AXG_38
VCC_AXG_39
VCC_AXG_40
VCC_AXG_41
VCC_AXG_42
VCC_AXG_SENSE
VSS_AXG_SENSE
VCC_AXG_NCTF_1VCC_SM_1
VCC_AXG_NCTF_2
VCC_AXG_NCTF_3
VCC_AXG_NCTF_4
VCC_AXG_NCTF_5
VCC_AXG_NCTF_6
VCC_AXG_NCTF_7
VCC_AXG_NCTF_8
VCC_AXG_NCTF_9
VCC_AXG_NCTF_10
VCC_AXG_NCTF_11
VCC_AXG_NCTF_12
VCC_AXG_NCTF_13
VCC_AXG_NCTF_14
VCC_AXG_NCTF_15
VCC_AXG_NCTF_16
VCC_AXG_NCTF_17
VCC_AXG_NCTF_18
VCC_AXG_NCTF_19
VCC_AXG_NCTF_20
VCC_AXG_NCTF_21
VCC_AXG_NCTF_22
POWER
VCC_AXG_NCTF_23
VCC_AXG_NCTF_24
VCC_AXG_NCTF_25
VCC_AXG_NCTF_26
VCC_AXG_NCTF_27
VCC_AXG_NCTF_28
VCC_AXG_NCTF_29
VCC_AXG_NCTF_30
VCC SMVCC GFX
VCC_AXG_NCTF_31
VCC_AXG_NCTF_32
VCC_AXG_NCTF_33
VCC_AXG_NCTF_34
VCC_AXG_NCTF_35
VCC_AXG_NCTF_36
VCC_AXG_NCTF_37
VCC_AXG_NCTF_38
VCC_AXG_NCTF_39
VCC_AXG_NCTF_40
VCC_AXG_NCTF_41
VCC_AXG_NCTF_42
VCC_AXG_NCTF_43
VCC_AXG_NCTF_44
VCC_AXG_NCTF_45
VCC_AXG_NCTF_46
VCC_AXG_NCTF_47
VCC_AXG_NCTF_48
VCC_AXG_NCTF_49
VCC_AXG_NCTF_50
VCC_AXG_NCTF_51
VCC_AXG_NCTF_52
VCC_AXG_NCTF_53
VCC_AXG_NCTF_54
VCC_AXG_NCTF_55
VCC_AXG_NCTF_56
VCC GFX NCTF
VCC_AXG_NCTF_57
VCC_AXG_NCTF_58
VCC_AXG_NCTF_59
VCC_AXG_NCTF_60
VCC_SM_LF1
VCC_SM_LF2
VCC_SM_LF3
VCC_SM_LF4
VCC_SM_LF5
VCC_SM_LF6
VCC_SM_LF7
VCC SM LF
+1.8VSUS +1.05V
D D
C C
B B
A A
2600mA
VCC_SM_36
through
VCC_SM_42 can
be left as NC for
DDR2 desgins.
+1.05V
R99
10_4
VCC_AXG_SENSE
VSS_AXG_SENSE
R95
10_4
+1.05V
W28AP33
V28
W26
V26
W25
V25
W24
V24
W23
V23
AM21
AL21
AK21
W21
V21
U21
AM20
AK20
W20
U20
AM19
AL19
AK19
AJ19
AH19
AG19
AF19
AE19
AB19
AA19
Y19
W19
V19
U19
AM17
AK17
AH17
AG17
AF17
AE17
AC17
AB17
Y17
W17
V17
AM16
AL16
AK16
AJ16
AH16
AG16
AF16
AE16
AC16
AB16
AA16
Y16
W16
V16
U16
AV44
BA37
AM40
AV21
AY5
AM10
BB13
4
Ivcc_axg=6326.84mA
+VCCSM_LF1
+VCCSM_LF2
+VCCSM_LF3
+VCCSM_LF4
+VCCSM_LF5
+VCCSM_LF6
+VCCSM_LF7
C160
.1U/10V_4
+1.05V
+1.05V
12
+
C643
390U/2.5V_6X5.8ESR10
C143
.1U/10V_4
+
C588
*330u_2.5V_7343
C198
.47U/6.3V_4
C130
.33U/6.3V_4
3
Ivcc=1930.4+508.12=2438.52mA
C114
10U/6.3V_8
C305
.47U/6.3V_4
C590
10U/6.3V_8
C600
10U/6.3V_8
C299
1U/6.3V_4
C618
10U/6.3V_8
C113
10U/6.3V_8
C209
.33U/6.3V_4
C129
10U/6.3V_8
C601
.1U/10V_4
C158
1U/6.3V_4
C161
.33U/6.3V_4
C111
10U/6.3V_8
C298
1U/6.3V_4
C176
.33U/6.3V_4
+1.8VSUS
C626
10U/6.3V_8
.1U/10V_4
C180
C622
10U/6.3V_8
C177
.1U/10V_4
C169
.1U/10V_4
2
AG34
AC34
AB34
AA34
AM33
AK33
AJ33
AG33
AF33
AE33
AC33
AA33
W33
AH28
AF28
AC28
AA28
AJ26
AG26
AE26
AC26
AH25
AG25
AF25
AG24
AJ23
AH23
AF23
Y34
V34
U34
Y33
V33
U33
T32
U23F
VCC_1
VCC_2
VCC_3
VCC_4
VCC_5
VCC_6
VCC_7
VCC_8
VCC_9
VCC_10
VCC_11
VCC_12
VCC_13
VCC_14
VCC_15
VCC_16
VCC_17
VCC_18
VCC_19
VCC_20
VCC_21
VCC_22
VCC_23
VCC_24
VCC_25
VCC_26
VCC_27
VCC_28
VCC_29
VCC_30
VCC_31
VCC_32
VCC_33
VCC_34
VCC_35
CANTIGA_GM
POWER
VCC CORE
VCC NCTF
VCC_NCTF_1
VCC_NCTF_2
VCC_NCTF_3
VCC_NCTF_4
VCC_NCTF_5
VCC_NCTF_6
VCC_NCTF_7
VCC_NCTF_8
VCC_NCTF_9
VCC_NCTF_10
VCC_NCTF_11
VCC_NCTF_12
VCC_NCTF_13
VCC_NCTF_14
VCC_NCTF_15
VCC_NCTF_16
VCC_NCTF_17
VCC_NCTF_18
VCC_NCTF_19
VCC_NCTF_20
VCC_NCTF_21
VCC_NCTF_22
VCC_NCTF_23
VCC_NCTF_24
VCC_NCTF_25
VCC_NCTF_26
VCC_NCTF_27
VCC_NCTF_28
VCC_NCTF_29
VCC_NCTF_30
VCC_NCTF_31
VCC_NCTF_32
VCC_NCTF_33
VCC_NCTF_34
VCC_NCTF_35
VCC_NCTF_36
VCC_NCTF_37
VCC_NCTF_38
VCC_NCTF_39
VCC_NCTF_40
VCC_NCTF_41
VCC_NCTF_42
VCC_NCTF_43
VCC_NCTF_44
AM32
AL32
AK32
AJ32
AH32
AG32
AE32
AC32
AA32
Y32
W32
U32
AM30
AL30
AK30
AH30
AG30
AF30
AE30
AC30
AB30
AA30
Y30
W30
V30
U30
AL29
AK29
AJ29
AH29
AG29
AE29
AC29
AA29
Y29
W29
V29
AL28
AK28
AL26
AK26
AK25
AK24
AK23
1
08
+1.05V
5
CANTIGA_GM
PROJECT : QL6
+1.8VSUS6,9,10,29,34,37
+1.05V2,3,4,5,6,9,19,22,29,34,35
NB5
4
3
2
Quanta Computer Inc.
Size Document Number Rev
Custom
Date: Sheet
Cantiga Vcc 4/5
1
840Tuesday, February 26, 2008
of
2A
5
+1.05V 2,3,4,5,6,8,19,22,29,34,35
+3V 2,4,6,10,11,12,14,15,17,18,19,20,21,22,24,25,26,28,29,30,31,35,36,38
+1.5V 4,19,20,22,24,25,28,31,34,38
+1.8VSUS 6,8,10,29,34,37
+1.05V_PEG 6
+1.05V
int
D D
L22 *10uH/100MA_8
C324
*220U/2.5V_B
int
L27 *10uH/100MA_8
C371
*220U/2.5V_B
+1.05V
DV-2 modify
L10 0_6
C132
4.7U/6.3V_6
C C
B B
DV-2 modify
L9 HCB1608KF-181T15_6
+1.05V_MCH_PLL
C141
10U/6.3V_8
+1.5V
R114 0_6
L20
HCB1608KF-181T15_6
R89 0.5/F_6 C208
C236
.1U/10V_4
C241
.1U/10V_4
+1.5V_TVDAC
+1.5V_QDAC+1.5V_QDAC
12
+
0_4
12
+
0_4
.1U/10V_4
*.022U/16V_4
.022U/16V_4
+1.05V_DPLLA
C326
+1.05V_DPLLB
C653
+1.05V_HPLL
C145
+1.05V_MPLL
C267
C256
C128
.1U/10V_4
DV-2 modify
+3V
+3V
+1.05V
R101 0_6
+1.05V
R119 0_6
R411 *0_6
R408 *0_6
+1.5V
+1.5V
for PM/GM internal thermal sensor power
+1.05V
L21 HCB1608KF-181T15_6
A A
+1.05V_PEGPLL
R127
1/F_6
C273
10U/6.3V_8
+1.8VSUS
int
int
C131
*220U/2.5V_B
+3V
4
C619
*.1U/10V_4
int
C617
*.1U/10V_4
int
AB total 64.8mA
R169 0_6
+
C264
2.2U/6.3V_6
R404 *0_6
int
R428 *0_6
int
R125 *0_6
int
73mA
+3V_A_CRT_DAC
C620
0_4
5mA
+3V_A_DAC_BG
C614
0_4
24mA
139.2mA
13.2mA
C390
int
*1000P/50V_4
C652 .1U/10V_4
+1.05V_A_SM
C162
10U/6.3V_8
10U/6.3V_8
C183
4.7U/6.3V_6
10U/6.3V_8
+1.05V_A_SM_CK
C277
.1U/10V_4
10U/6.3V_8
C612
0_4
C629
0_4
35mA
120uA
157.2mA
50mA
C134
.1U/10V_4
+1.8VSUS_GMCH_VCCD
C293
*10U/6.3V_8
int
+1.05V_DPLLA
+1.05V_DPLLB
+1.05V_HPLL
+1.05V_MPLL
+1.8VSUS_TX_LVDS
414uA
+1.5V_PEG_BG
C349
.1U/10V_4
+1.05V_PEGPLL
480mA
C203
1U/6.3V_4
24mA
C278
79mA
+3V_A_TV_DAC
50mA
+1.5V_HDA
+1.5V_TVDAC
+1.5V_QDAC
+1.05V_MCH_PLL
+1.05V_PEGPLL
C656
.1U/10V_4
60.31mA
C172
C255
0_4
50mA
U23H
B27
VCCA_CRT_DAC_1
A26
VCCA_CRT_DAC_2
A25
VCCA_DAC_BG
B25
VSSA_DAC_BG
F47
VCCA_DPLLA
L48
VCCA_DPLLB
AD1
VCCA_HPLL
AE1
VCCA_MPLL
J48
VCCA_LVDS
J47
VSSA_LVDS
AD48
VCCA_PEG_BG
AA48
VCCA_PEG_PLL
AR20
VCCA_SM_1
AP20
VCCA_SM_2
AN20
VCCA_SM_3
AR17
VCCA_SM_4
AP17
VCCA_SM_5
AN17
VCCA_SM_6
AT16
VCCA_SM_7
AR16
VCCA_SM_8
AP16
VCCA_SM_9
AP28
VCCA_SM_CK_1
AN28
VCCA_SM_CK_2
AP25
VCCA_SM_CK_3
AN25
VCCA_SM_CK_4
AN24
VCCA_SM_CK_5
AM28
VCCA_SM_CK_NCTF_1
AM26
VCCA_SM_CK_NCTF_2
AM25
VCCA_SM_CK_NCTF_3
AL25
VCCA_SM_CK_NCTF_4
AM24
VCCA_SM_CK_NCTF_5
AL24
VCCA_SM_CK_NCTF_6
AM23
VCCA_SM_CK_NCTF_7
AL23
VCCA_SM_CK_NCTF_8
B24
VCCA_TV_DAC_1
A24
VCCA_TV_DAC_2
A32
VCC_HDA
M25
VCCD_TVDAC
L28
VCCD_QDAC
AF1
VCCD_HPLL
AA47
VCCD_PEG_PLL
M38
VCCD_LVDS_1
L37
VCCD_LVDS_2
CANTIGA_GM
3
+VTTLF_CAP1
+VTTLF_CAP2
+VTTLF_CAP3
CRTPLLA PEGA SM
A LVDS
POWER
A CK
TV
HDA
D TV/CRT
LVDS
C591
.47U/6.3V_4
VCC_AXF_1
VCC_AXF_2
VCC_AXF_3
AXF
VCC_SM_CK_1
VCC_SM_CK_2
VCC_SM_CK_3
VCC_SM_CK_4
SM CK
VCC_TX_LVDS
HV
VCC_PEG_1
VCC_PEG_2
VCC_PEG_3
VCC_PEG_4
VCC_PEG_5
PEG
VCC_DMI_1
VCC_DMI_2
VCC_DMI_3
VCC_DMI_4
DMI
VTTLF
C135
.47U/6.3V_4
VTT_1
VTT_2
VTT_3
VTT_4
VTT_5
VTT_6
VTT_7
VTT_8
VTT_9
VTT_10
VTT_11
VTT_12
VTT_13
VTT_14
VTT_15
VTT
VTT_16
VTT_17
VTT_18
VTT_19
VTT_20
VTT_21
VTT_22
VTT_23
VTT_24
VTT_25
VCC_HV_1
VCC_HV_2
VCC_HV_3
VTTLF1
VTTLF2
VTTLF3
U13
T13
U12
T12
U11
T11
U10
T10
U9
T9
U8
T8
U7
T7
U6
T6
U5
T5
V3
U3
V2
U2
T2
V1
U1
B22
B21
A21
119.85mA
BF21
BH20
BG20
BF20
K47
C35
B35
A35
V48
U48
V47
U47
U46
AH48
AF48
AH47
AG47
A8
L1
AB2
C597
.47U/6.3V_4
118.8mA
+3V_HV
+1.05V_RXR_DMI
+VTTLF_CAP1
+VTTLF_CAP2
+VTTLF_CAP3
2
C142
.47U/6.3V_4
+1.05V_AXF
C607
1U/6.3V_4
+1.8VSUS_SM_CK
C179
10U/6.3V_8
+1.8VSUS_TX_LVDS
105.3mA
C636
.1U/10V_4
852mA
C151
2.2U/6.3V_6
+3V_HV +3V
C112
4.7U/6.3V_6
R392 0_6
C606
10U/6.3V_8
L15 1uH/300mA_8
R102
1/F_6
C204
+1.8VSUS_SM_CK_L
.1U/10V_4
C157
10U/6.3V_8
12
C388
0_4
+1.05V
R430 0_6
C635
.1U/10V_4
1782mA
12
+
C654
4.7U/6.3V_6
C389
*330u_2.5V_7343
456mA
C350
.1U/10V_4
+1.05V
C152
4.7U/6.3V_6
+1.05V
+1.8VSUS
L26 *1uH/300mA_8
C386
C387
*10U/6.3V_8
*10U/6.3V_8
int
21
+1.05V_HV_MCH
int
D12
RB501V-40
R88
10_4
L28 0_8
C655
10U/6.3V_8
L25 0_6
1
09
+1.8VSUS
int
+1.05V+1.05V_PEG
+1.05V
PROJECT : QL6
Quanta Computer Inc.
Size Document Number Rev
Custom
NB5
5
4
3
2
Date: Sheet
Cantiga Power 5/5
1
940Tuesday, February 26, 2008
2A
of
5
+1.8VSUS
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
D D
C C
B B
A A
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_BS#0
M_B_BS#1
M_B_BS#2
M_B_CLK0
M_B_CLK0#
M_B_CLK1
M_B_CLK1#
M_B_ODT0
M_B_ODT1
DIM2_SA0
DIM2_SA1
CGDAT_SMB
CGCLK_SMB
+0.9VSMVREF_DIM
M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7
M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7
M_B_CKE0
M_B_CKE1
M_B_RAS#
M_B_CAS#
M_B_WE#
M_B_CS#0
M_B_CS#1
+3V
818287889596103
102
A0
101
A1
VDD0
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
BA0
BA1
BA2
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
CK0
CK0
CK1
CK1
CKE0
CKE1
RAS
CAS
WE
S0
S1
ODT0
ODT1
SA0
SA1
SDA
SCL
VDDspd
VREF
VSS0
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VDD1
VSS22
VSS21
100
99
98
97
94
92
93
91
105
90
89
116
86
84
107
106
85
10
26
52
67
130
147
170
185
13
31
51
70
131
148
169
188
11
29
49
68
129
146
167
186
30
32
164
166
79
80
108
113
109
110
115
114
119
198
200
195
197
199
1
2
3
8
9
12
15
18
21
24
27
28
33
34
39
40
41
42
47
48
53
54
111
104
112
117
118
VDD2
VDD3
VDD4
VDD5
VDD6
VDD8
VDD7
VDD9
VDD10
VDD11
NC/TEST
SO-DIMM
(Normal)
VSS32
VSS31
VSS30
VSS29
VSS28
VSS27
VSS26
VSS25
VSS24
VSS23
132
128
127
122
1217877727166656059
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
VSS56
VSS55
VSS54
VSS53
VSS52
VSS51
VSS50
VSS49
VSS48
VSS47
VSS46
VSS45
VSS44
VSS43
VSS42
VSS41
VSS40
VSS39
VSS38
VSS37
VSS36
VSS35
VSS34
VSS33
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
NC1
NC2
NC3
NC4
CN14
5
7
17
19
4
6
14
16
23
25
35
37
20
22
36
38
43
45
55
57
44
46
56
58
61
63
73
75
62
64
74
76
123
125
135
137
124
126
134
136
141
143
151
153
140
142
152
154
157
159
173
175
158
160
174
176
179
181
189
191
180
182
192
194
50
69
83
120
163
196
193
190
187
184
183
178
177
172
171
168
165
162
161
156
155
150
149
145
144
139
138
133
M_B_DQ1
M_B_DQ5
M_B_DQ2
M_B_DQ7
M_B_DQ4
M_B_DQ0
M_B_DQ3
M_B_DQ6
M_B_DQ13
M_B_DQ12
M_B_DQ14
M_B_DQ11
M_B_DQ9
M_B_DQ8
M_B_DQ10
M_B_DQ15
M_B_DQ21
M_B_DQ17
M_B_DQ19
M_B_DQ23
M_B_DQ20
M_B_DQ16
M_B_DQ18
M_B_DQ22
M_B_DQ28
M_B_DQ29
M_B_DQ27
M_B_DQ26
M_B_DQ24
M_B_DQ25
M_B_DQ31
M_B_DQ30
M_B_DQ36
M_B_DQ33
M_B_DQ35
M_B_DQ39
M_B_DQ34
M_B_DQ32
M_B_DQ37
M_B_DQ38
M_B_DQ40
M_B_DQ41M_B_DQ41M_B_DQ41
M_B_DQ46M_B_DQ46
M_B_DQ43M_B_DQ43
M_B_DQ45M_B_DQ45
M_B_DQ44M_B_DQ44
M_B_DQ47M_B_DQ47
M_B_DQ42M_B_DQ42
M_B_DQ53M_B_DQ53
M_B_DQ49M_B_DQ49
M_B_DQ51M_B_DQ51
M_B_DQ54M_B_DQ54
M_B_DQ48M_B_DQ48
M_B_DQ52M_B_DQ52
M_B_DQ55M_B_DQ55
M_B_DQ50M_B_DQ50
M_B_DQ61M_B_DQ61
M_B_DQ60M_B_DQ60
M_B_DQ58M_B_DQ58
M_B_DQ59M_B_DQ59
M_B_DQ56M_B_DQ56
M_B_DQ57M_B_DQ57
M_B_DQ63M_B_DQ63
M_B_DQ62M_B_DQ62
4
+1.8VSUS
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_BS#0
M_A_BS#1
M_A_BS#2
M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7
M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7
M_A_CLK0
M_A_CLK0#
M_A_CLK1
M_A_CLK1#
M_A_CKE0
M_A_CKE1
M_A_RAS#
M_A_CAS#
M_A_WE#
M_A_CS#0
M_A_CS#1
M_A_ODT0
PM_EXTTS#0 6,11
DIM2_SA0
DIM2_SA1
R347 10K/F_4
R348 10K/F_4
M_A_ODT1
DIM1_SA0
DIM1_SA1
CGDAT_SMB
CGCLK_SMB
+0.9VSMVREF_DIM
+3V
+3V
SMbus address A4 SMbus address A0
818287889596103
102
A0
101
A1
VDD0
VDD1
VDD2
VSS22
VSS21
VDD3
VSS24
VSS23
100
A2
99
A3
98
A4
97
A5
94
A6
92
A7
93
A8
91
A9
105
A10
90
A11
89
A12
116
A13
86
A14
84
A15
107
BA0
106
BA1
85
BA2
10
DM0
26
DM1
52
DM2
67
DM3
130
DM4
147
DM5
170
DM6
185
DM7
13
DQS0
31
DQS1
51
DQS2
70
DQS3
131
DQS4
148
DQS5
169
DQS6
188
DQS7
11
DQS0
29
DQS1
49
DQS2
68
DQS3
129
DQS4
146
DQS5
167
DQS6
186
DQS7
30
CK0
32
CK0
164
CK1
166
CK1
79
CKE0
80
CKE1
108
RAS
113
CAS
109
WE
110
S0
115
S1
114
ODT0
119
ODT1
198
SA0
200
SA1
195
SDA
197
SCL
199
VDDspd
1
VREF
2
VSS0
3
VSS1
8
VSS2
9
VSS3
12
VSS4
15
VSS5
18
VSS6
21
VSS7
24
VSS8
27
VSS9
28
VSS10
33
VSS11
34
VSS12
39
VSS13
40
VSS14
41
VSS15
42
VSS16
47
VSS17
48
VSS18
53
VSS19
54
VSS20
3
111
104
112
117
118
CN13
DQ0
VDD7
VSS28
1217877727166656059
VDD8
VDD9
VSS30
VSS29
122
VDD10
VSS31
127
VDD11
NC/TEST
VSS33
VSS32
132
128
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
NC1
NC2
NC3
NC4
VSS56
VSS55
VSS54
VSS53
VSS52
VSS51
VSS50
VSS49
VSS48
VSS47
VSS46
VSS45
VSS44
VSS43
VSS42
VSS41
VSS40
VSS39
VSS38
VSS37
VSS36
VSS35
VSS34
VDD4
VDD5
VDD6
SO-DIMM
(Normal)
VSS27
VSS26
VSS25
5
7
17
19
4
6
14
16
23
25
35
37
20
22
36
38
43
45
55
57
44
46
56
58
61
63
73
75
62
64
74
76
123
125
135
137
124
126
134
136
141
143
151
153
140
142
152
154
157
159
173
175
158
160
174
176
179
181
189
191
180
182
192
194
50
69
83
120
163
196
193
190
187
184
183
178
177
172
171
168
165
162
161
156
155
150
149
145
144
139
138
133
M_A_DQ1
M_A_DQ5
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ0
M_A_DQ7
M_A_DQ6
M_A_DQ9
M_A_DQ8
M_A_DQ15
M_A_DQ14
M_A_DQ13
M_A_DQ12
M_A_DQ10
M_A_DQ11
M_A_DQ17
M_A_DQ21
M_A_DQ23
M_A_DQ19
M_A_DQ20
M_A_DQ16
M_A_DQ18
M_A_DQ22
M_A_DQ25
M_A_DQ24
M_A_DQ31
M_A_DQ26
M_A_DQ28
M_A_DQ29
M_A_DQ27
M_A_DQ30
M_A_DQ37
M_A_DQ33
M_A_DQ38
M_A_DQ35
M_A_DQ32
M_A_DQ36
M_A_DQ39
M_A_DQ34
M_A_DQ40
M_A_DQ41
M_A_DQ46
M_A_DQ42
M_A_DQ45
M_A_DQ44
M_A_DQ43
M_A_DQ47
M_A_DQ53
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ48
M_A_DQ54
M_A_DQ55
M_A_DQ60
M_A_DQ56
M_A_DQ62
M_A_DQ58
M_A_DQ57
M_A_DQ61
M_A_DQ59
M_A_DQ63
PM_EXTTS#0
M_B_DM[0..7]
M_B_DQ[0..63]
M_B_DQS[0..7]
M_B_DQS#[0..7]
M_B_A[14..0]
M_B_CLK0
M_B_CLK0#
M_B_CLK1
M_B_CLK1#
M_B_BS#[0..2]
M_B_ODT[0..1]
M_B_CKE[0..1]
M_B_CS#[0..1]
M_B_RAS#
M_B_CAS#
M_B_WE#
R24 10K/F_4
R23 10K/F_4
2
M_B_DM[0..7] 7
M_B_DQ[0..63] 7
M_B_DQS[0..7] 7
M_B_DQS#[0..7] 7
M_B_A[14..0] 7,11
M_B_CLK0 6
M_B_CLK0# 6
M_B_CLK1 6
M_B_CLK1# 6
M_B_BS#[0..2] 7,11
M_B_ODT[0..1] 6,11
M_B_CKE[0..1] 6,11
M_B_CS#[0..1] 6,11
M_B_RAS# 7,11
M_B_CAS# 7,11
M_B_WE# 7,11
CGCLK_SMB
CGDAT_SMB
C628 470P/50V_4
+0.9VSMVREF_DIM
R424 *10K/F_4
+1.8VSUS
+0.9VSMVREF_DIM
+1.8VSUS
+0.9VSMVREF_DIM
Place these Caps near So-Dimm1.
C584
2.2U/6.3V_6
C262
.1U/10V_4
C579
2.2U/6.3V_6
C575
2.2U/6.3V_6
C258
2.2U/6.3V_6
+3V
C572
2.2U/6.3V_6
C25
2.2U/6.3V_6
C568
2.2U/6.3V_6
Place these Caps near S o-Dimm2.
C570
C589
2.2U/6.3V_6
C261
.1U/10V_4
DIM1_SA0
DIM1_SA1
C564
2.2U/6.3V_6
C565
2.2U/6.3V_6
C257
2.2U/6.3V_6
+3V
C578
2.2U/6.3V_6
C30
2.2U/6.3V_6
2.2U/6.3V_6
M_A_DM[0..7]
M_A_DQ[0..63]
M_A_DQS[0..7]
M_A_DQS#[0..7]
M_A_A[14..0]
M_A_CLK0
M_A_CLK0#
M_A_CLK1
M_A_CLK1#
M_A_BS#[0..2]
M_A_ODT[0..1]
M_A_CKE[0..1]
M_A_CS#[0..1]
M_A_RAS#
M_A_CAS#
M_A_WE#
CGCLK_SMB 2,11,28,31
CGDAT_SMB 2,11,28,31
R425 0_6
R423 *10K/F_4
C582
C583
.1U/10V_4
.1U/10V_4
C566
.1U/10V_4
+1.8VSUS
C585
.1U/10V_4
SO-DIMM BYPASS PLACEMENT :
C29
Place these Caps near So-Dimm1.
.1U/10V_4
No Vias Between the Trace of PIN to CAP.
C573
.1U/10V_4
C581
.1U/10V_4
C586
.1U/10V_4
C577
.1U/10V_4
SO-DIMM BYPASS PLACEMENT :
C26
Place these Caps near So-Dimm2
.1U/10V_4
No Vias Between the Trace of PIN to CAP.
M_A_DM[0..7] 7
M_A_DQ[0..63] 7
M_A_DQS[0..7] 7
M_A_DQS#[0..7] 7
M_A_A[14..0] 7,11
M_A_CLK0 6
M_A_CLK0# 6
M_A_CLK1 6
M_A_CLK1# 6
M_A_BS#[0..2] 7,11
M_A_ODT[0..1] 6,11
M_A_CKE[0..1] 6,11
M_A_CS#[0..1] 6,11
M_A_RAS# 7,11
M_A_CAS# 7,11
M_A_WE# 7,11
+0.9VSMVREF 6,37
C587
C567
.1U/10V_4
.1U/10V_4
C592
C574
.1U/10V_4
.1U/10V_4
1
10
H 9.2
5
4
H 5.2
+1.8VSUS6,8,9,29,34,37
+3V2,4,6,9,11,12,14,15,17,18,19,20,21,22,24,25,26,28,29,30,31,35,36,38
3
2
NB5
PROJECT : QL6
Quanta Computer Inc.
Size Document Number Rev
Custom
Date: Sheet
DDR2 DIMM
10 40Tuesday, February 26, 2008
1
of
2A
5
4
3
2
1
11
DDRII DUAL CHANNEL A,B.
D D
DDRII B CHANNEL
DDRII A CHANNEL
+0.9VSMVTT +0.9VSMVTT
C83
C105
C71
C80
C101
.1U/10V_4
.1U/10V_4
+0.9VSMVTT
C108
C81
.1U/10V_4
C C
M_A_ODT06,10
M_A_CKE16,10
M_A_BS#07,10
M_A_RAS#7,10
M_A_BS#17,10
B B
A A
M_A_WE#7,10
M_A_CAS#7,10
PM_EXTTS#16
.1U/10V_4
M_ODT0
M_A_A13
M_A_A8
M_A_A5
M_A_A3
M_A_A1
M_A_CKE1
M_A_A11
M_A_A10
M_A_BS#0
M_A_A6
M_A_A7
M_A_A2
M_A_A4
M_A_BS#1
M_A_A9
M_A_A12
CGCLK_SMB2,10,28,31
CGDAT_SMB2,10,28,31
PM_EXTTS#06,10
R30
*0_4
RP2 56X2
RP19 56X2
RP14 56X2
RP24 56X2
RP11 56X2
RP18 56X2
RP15 56X2
RP5 56X2
RP22 56X2
RP8 56X2
M_A_A14
M_B_A14
CGCLK_SMB
CGDAT_SMB
PM_EXTTS#0
PM_EXTTS#1_D
.1U/10V_4
.1U/10V_4
C100
C88
.1U/10V_4
.1U/10V_4
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
R62 56.2/F_4
R59 56.2/F_4
U3
8
SCLK
7
SDA
6
ALERT#
4
OVERT#
*LM86CIMM
Layout note: Place one cap close to every 2 pullup resistors terminated to SMDDR_VTERM
VCC
DXP
DXN
GND
.1U/10V_4
C97
.1U/10V_4
+0.9VSMVTT
1
2
3
5
LM86_3V
C94
.1U/10V_4
C93
.1U/10V_4
R22
*200_4
C76
.1U/10V_4
+3V
C24
*.01U/16V_4
DDR_THERMDA
DDR_THERMDC
Uninstall
13
Q4
2
*MMBT3904-7-F
+0.9VSMVTT
M_B_BS#17,10
M_B_CKE06,10
M_B_BS#27,10
M_B_RAS#7,10
M_B_CS#06,10
M_B_WE#7,10
M_B_CAS#7,10
M_B_BS#07,10
M_A_CS#06,10
M_B_ODT06,10
M_B_ODT16,10
M_B_CS#16,10
M_A_CS#16,10
M_A_ODT16,10
M_B_CKE16,10
M_A_CKE06,10
M_A_BS#27,10
C78
.1U/10V_4
C104
.1U/10V_4
C85
.1U/10V_4
C109
.1U/10V_4
M_B_A0
M_B_A1
M_B_A3
M_B_A8
M_B_A5
M_B_A4
M_B_A2
M_B_A12
M_B_A9
M_B_A6
M_B_A7
M_B_A10
M_A_A0
M_B_A13
M_ODT3
M_ODT1
M_B_A11
C106
.1U/10V_4
C91
.1U/10V_4
RP12 56X2
RP13 56X2
RP16 56X2
RP17 56X2
RP21 56X2
RP20 56X2
RP26 56X2
RP6 56X2
RP7 56X2
RP9 56X2
RP10 56X2
RP3 56X2
RP1 56X2
RP4 56X2
RP25 56X2
RP23 56X2
C98
.1U/10V_4
C72
.1U/10V_4
1
3
1
3
1
3
1
3
1
3
1
3
1
3
1
3
1
3
1
3
1
3
1
3
1
3
1
3
1
3
1
3
C84
.1U/10V_4
C73
.1U/10V_4
2
4
2
4
2
4
2
4
2
4
2
4
2
4
2
4
2
4
2
4
2
4
2
4
2
4
2
4
2
4
2
4
C95
.1U/10V_4
C77
.1U/10V_4
+0.9VSMVTT
C89
.1U/10V_4
M_B_A[14..0]
M_A_A[14..0]
M_B_A[14..0] 7,10
M_A_A[14..0] 7,10
+0.9VSMVTT 37
+3V 2,4,6,9,10,12,14,15,17,18,19,20,21,22,24,25,26,28,29,30,31,35,36,38
NB5
5
4
3
2
PROJECT : QL6
Quanta Computer Inc.
Size Document Number Rev
Custom
Date: Sheet
DDR2 termination
1
11 40Tuesday, February 26, 2008
of
2A
5
4
3
2
1
NB9M-GE (G98)
12
+VGA1.1V
~ 500mA
D D
C C
B B
+VGA1.1V
+VGACORE
C345
22U/6.3V_8
C346
22U/6.3V_8
C343
4.7U/6.3V_6
C342
4.7U/6.3V_6
Near BGA
PLACE NEAR BALLS
C225
.47U/6.3V_4
C252
.47U/6.3V_4
C251
.1U/10V_4
C223
.1U/10V_4
C220
.47U/6.3V_4
C245
.47U/6.3V_4
C227
.1U/10V_4
C219
.1U/10V_4
NB9M: VGACORE +0.95V ~ +1.09V
C290
1U/6.3V_4
C287
1U/6.3V_4
C226
.47U/6.3V_4
C247
.47U/6.3V_4
C253
.1U/10V_4
C222
.1U/10V_4
C284
1U/6.3V_4
C291
.47U/6.3V_4
C276
.47U/6.3V_4
C224
.47U/6.3V_4
C249
.1U/10V_4
C246
.1U/10V_4
C289
.1U/10V_4
C285
.47U/6.3V_4
C250
.47U/6.3V_4
C182
.47U/6.3V_4
C248
.1U/10V_4
C221
.1U/10V_4
C283
.1U/10V_4
C280
.1U/10V_4
NEAR BGA
C286
.47U/6.3V_4
1.6A
8.88A
C201
4.7U/6.3V_6
C275
4.7U/6.3V_6
C202
4.7U/6.3V_6
80mA
+3V
+VGA1.1V
L37 10nH_6
C344
4.7U/6.3V_6
A A
+PEX_PLLVDD
C642
4.7U/6.3V_6
C639
1U/6.3V_4
nVIDIA Suggest 9/11
C638
.1U/10V_4
C166
.1U/10V_4
C640
.01U/16V_4
C155
1U/6.3V_4
C149
.1U/10V_4
165mA
12~16 mils width
R147 *200_4
T24
2.49K/F_4
R434
PEX_TERMP
U22A
PBGA533-NVIDIA-GEFORCE6250
AC9
PEX_IOVDD_01
AD7
PEX_IOVDD_02
AD8
PEX_IOVDD_03
AE7
PEX_IOVDD_04
AF7
PEX_IOVDD_05
AG7
PEX_IOVDD_06
AB13
PEX_IOVDDQ_01
AB16
PEX_IOVDDQ_02
AB17
PEX_IOVDDQ_03
AB7
PEX_IOVDDQ_04
AB8
PEX_IOVDDQ_05
AB9
PEX_IOVDDQ_06
AC13
PEX_IOVDDQ_07
AC7
PEX_IOVDDQ_08
AD6
PEX_IOVDDQ_09
AE6
PEX_IOVDDQ_10
AF6
PEX_IOVDDQ_11
AG6
PEX_IOVDDQ_12
J10
VDD_01
J12
VDD_02
J13
VDD_03
J9
VDD_04
L9
VDD_05
M11
VDD_06
M17
VDD_07
M9
VDD_08
N11
VDD_09
N12
VDD_10
N13
VDD_11
N14
VDD_12
N15
VDD_13
N16
VDD_14
N17
VDD_15
N19
VDD_16
N9
VDD_17
P11
VDD_18
P12
VDD_19
P13
VDD_20
P14
VDD_21
P15
VDD_22
P16
VDD_23
P17
VDD_24
R11
VDD_25
R12
VDD_26
R13
VDD_27
R14
VDD_28
R15
VDD_29
R16
VDD_30
R17
VDD_31
R9
VDD_32
T11
VDD_33
T17
VDD_34
T9
VDD_35
U19
VDD_36
U9
VDD_37
W10
VDD_38
W12
VDD_39
W13
VDD_40
W18
VDD_41
W19
VDD_42
W9
VDD_43
W15
VDD_SENSE
W16
GND_SENSE
A12
VDD33_01
B12
VDD33_02
C12
VDD33_03
D12
VDD33_04
E12
VDD33_05
F12
VDD33_06
AF9
PEX_PLLVDD
AE10
PEX_TSTCLK_OUT*
AF10
PEX_TSTCLK_OUT
AG9
RFU_5
AG10
PEX_TERMP
NB9M-GE
1/13 PCI_EXPRESS
PEX_RST*
PEX_REFCLK
PEX_REFCLK*
PEX_TX0
PEX_TX0*
PEX_TX1
PEX_TX1*
PEX_TX2
PEX_TX2*
PEX_TX3
PEX_TX3*
PEX_TX4
PEX_TX4*
PEX_TX5
PEX_TX5*
PEX_TX6
PEX_TX6*
PEX_TX7
PEX_TX7*
PEX_TX8
PEX_TX8*
PEX_TX9
PEX_TX9*
PEX_TX10
PEX_TX10*
PEX_TX11
PEX_TX11*
PEX_TX12
PEX_TX12*
PEX_TX13
PEX_TX13*
PEX_TX14
PEX_TX14*
PEX_TX15
PEX_TX15*
PEX_RX0
PEX_RX0*
PEX_RX1
PEX_RX1*
PEX_RX2
PEX_RX2*
PEX_RX3
PEX_RX3*
PEX_RX4
PEX_RX4*
PEX_RX5
PEX_RX5*
PEX_RX6
PEX_RX6*
PEX_RX7
PEX_RX7*
PEX_RX8
PEX_RX8*
PEX_RX9
PEX_RX9*
PEX_RX10
PEX_RX10*
PEX_RX11
PEX_RX11*
PEX_RX12
PEX_RX12*
PEX_RX13
PEX_RX13*
PEX_RX14
PEX_RX14*
PEX_RX15
PEX_RX15*
RFU_6
AE9
AD9
AB10
AC10
AD10
AD11
AD12
AC12
AB11
AB12
AD13
AD14
AD15
AC15
AB14
AB15
AC16
AD16
AD17
AD18
AC18
AB18
AB19
AB20
AD19
AD20
AD21
AC21
AB21
AB22
AC22
AD22
AD23
AD24
AE25
AE26
AE12
AF12
AG12
AG13
AF13
AE13
AE15
AF15
AG15
AG16
AF16
AE16
AE18
AF18
AG18
AG19
AF19
AE19
AE21
AF21
AG21
AG22
AF22
AE22
AE24
AF24
AG24
AF25
AG25
AG26
AF27
AE27
CLK_PCIE_VGA
CLK_PCIE_VGA#
C_PEG_RX0
C_PEG_RX#0
C_PEG_RX1
C_PEG_RX#1
C_PEG_RX2
C_PEG_RX#2
C_PEG_RX3
C_PEG_RX#3
C_PEG_RX4
C_PEG_RX#4
C_PEG_RX5
C_PEG_RX#5
C_PEG_RX6
C_PEG_RX#6
C_PEG_RX7
C_PEG_RX#7
C_PEG_RX8
C_PEG_RX#8
C_PEG_RX9
C_PEG_RX#9
C_PEG_RX10
C_PEG_RX#10
C_PEG_RX11
C_PEG_RX#11
C_PEG_RX12
C_PEG_RX#12
C_PEG_RX13
C_PEG_RX#13
C_PEG_RX14
C_PEG_RX#14
C_PEG_RX15
C_PEG_RX#15
PEG_TX0
PEG_TX#0
PEG_TX1
PEG_TX#1
PEG_TX2
PEG_TX#2
PEG_TX3
PEG_TX#3
PEG_TX4
PEG_TX#4
PEG_TX5
PEG_TX#5
PEG_TX6
PEG_TX#6
PEG_TX7
PEG_TX#7
PEG_TX8
PEG_TX#8
PEG_TX9
PEG_TX#9
PEG_TX10
PEG_TX#10
PEG_TX11
PEG_TX#11
PEG_TX12
PEG_TX#12
PEG_TX13
PEG_TX#13
PEG_TX14
PEG_TX#14
PEG_TX15
PEG_TX#15
R156 100/F_4
C316 .1U/10V_4
C315 .1U/10V_4
C317 .1U/10V_4
C318 .1U/10V_4
C336 .1U/10V_4
C335 .1U/10V_4
C321 .1U/10V_4
C320 .1U/10V_4
C323 .1U/10V_4
C322 .1U/10V_4
C338 .1U/10V_4
C337 .1U/10V_4
C334 .1U/10V_4
C333 .1U/10V_4
C314 .1U/10V_4
C313 .1U/10V_4
C332 .1U/10V_4
C331 .1U/10V_4
C307 .1U/10V_4
C306 .1U/10V_4
C304 .1U/10V_4
C303 .1U/10V_4
C302 .1U/10V_4
C301 .1U/10V_4
C330 .1U/10V_4
C329 .1U/10V_4
C328 .1U/10V_4
C327 .1U/10V_4
C312 .1U/10V_4
C311 .1U/10V_4
C310 .1U/10V_4
C309 .1U/10V_4
CLK_PCIE_VGA 2
CLK_PCIE_VGA# 2
PEG_RX0 6
PEG_RX#0 6
PEG_RX1 6
PEG_RX#1 6
PEG_RX2 6
PEG_RX#2 6
PEG_RX3 6
PEG_RX#3 6
PEG_RX4 6
PEG_RX#4 6
PEG_RX5 6
PEG_RX#5 6
PEG_RX6 6
PEG_RX#6 6
PEG_RX7 6
PEG_RX#7 6
PEG_RX8 6
PEG_RX#8 6
PEG_RX9 6
PEG_RX#9 6
PEG_RX10 6
PEG_RX#10 6
PEG_RX11 6
PEG_RX#11 6
PEG_RX12 6
PEG_RX#12 6
PEG_RX13 6
PEG_RX#13 6
PEG_RX14 6
PEG_RX#14 6
PEG_RX15 6
PEG_RX#15 6
PEG_TX0 6
PEG_TX#0 6
PEG_TX1 6
PEG_TX#1 6
PEG_TX2 6
PEG_TX#2 6
PEG_TX3 6
PEG_TX#3 6
PEG_TX4 6
PEG_TX#4 6
PEG_TX5 6
PEG_TX#5 6
PEG_TX6 6
PEG_TX#6 6
PEG_TX7 6
PEG_TX#7 6
PEG_TX8 6
PEG_TX#8 6
PEG_TX9 6
PEG_TX#9 6
PEG_TX10 6
PEG_TX#10 6
PEG_TX11 6
PEG_TX#11 6
PEG_TX12 6
PEG_TX#12 6
PEG_TX13 6
PEG_TX#13 6
PEG_TX14 6
PEG_TX#14 6
PEG_TX15 6
PEG_TX#15 6
R155 0_4
R157
*100K/F_4
D15
*RB501V-40
PLT_RST-R#VGA_RST#
21
PLT_RST-R# 6,20
PROJECT : QL6
Quanta Computer Inc.
Size Document Number Rev
5
4
3
2
NB5
Custom
Date: Sheet
NV9X (PCIE I/F) 1/5
1
12 40Tuesday, February 26, 2008
2A
of
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