HP G4 DA0R12MB6E0 R12-1A Schematics

R12 INTEL UMA/DISCRETE SYSTEM DIAGRAM

+3V/+5V

A A

PG.31

+1.05VTT/+1.8V

PG.32

CPU Core

PG.33

VGACore/+1.1V

PG.34

+1.5VSUS

B B

PG.35

Charger

PG.36

Discharger

PG.37

UMA VGACOR E

PG.38

C C

LAN3

Card reader RTS5219-GR

PG.24

10/100

RTS8165EH

10/100

SODIMM1

Max. 4GB

PG.12

SODIMM2

Max. 4GB

PG.13

HDD

ODD

3&,([

LAN

PG.27 PG.30

WLAN

BT COMBO

PG.23

DDR3 Channel A

DDR3 Channel B

LAN1LAN2

SATA0

SATA1

USB 2.0

INTEL

Arrandale

37.5mm X 37.5mm 989pin PGA TDP 35W

PG.3~6

FDI

DMI

INTEL PCH Ibex Peak-m

27mm X 25mm

1071pin FCBGA

TDP 5W

PCI-E x8

DP Port B CRT LVDS

USB2.0 Ports X2

USB 2.0

AMD

Seymour-XT

PP;PP

7'3:

PG.14~18

DDR3 900MHz

VRAM

64Mx16x4,64bit

HDMI Level Shifter

PG.21

Webcam

PORT0,1

PG.19

PG.20PG.26

14.318MHz

CLOCK GEN

PG.2

HDMI CRT LVDS

Softbreeze

PORT4PORT10

PG.26

PORT13

PG.21

PG.22

PG.20

Stackup

KBC

EnE KB3930QF D2

LPC

PG.29

PG.7~11

Azalia

KB TP ROM FAN

D D

AUDIO CODEC

IDT92HD80B1

PG.25

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Speaker

HP/MIC

Analog MIC

PG.25

PG.26

PG.25

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Size Document Number Rev

Size Document Number Rev Custom

Custom

Custom Date: Sheet

Date: Sheet

BLOCK DIAGRAM

TOP GND IN1 IN2 VCC BOT

139Tuesday, September 14, 2010

25mA 150mA

+VDDIO_CLK+1.05V +3V

L56

1 2

HCB1608KF-181T15/1.5A_6

A A

HCB1608KF-181T15/1.5A_6

Place each 0.1uF cap close to pin

C742 0.1U/10V_4C742 0.1U/10V_4 C723 0.1U/10V_4C723 0.1U/10V_4 C747 10U/6.3VS_6C747 10U/6.3VS_6 C746 *10U/6.3V_8C746 *10U/6.3V_8

1 2

HCB1608KF-181T15/1.5A_6

Place each 0.1uF cap close to pin Place each 0.1uF cap close to pin

+VDDSE_CLK+3V

L57

C704 4.7U/6.3V_6C704 4.7U/6.3V_6 C731 0.1U/10V_4C731 0.1U/10V_4 C705 0.1U/10V_4C705 0.1U/10V_4

+3V

1 2

*HCB1608KF-181T15/1.5A_6

+1.5V

1 2

HCB1608KF-181T15/1.5A_6

0510 add for WiMAX

close to U13

L53

L54

150mA

+VDDCORE_CLK

C733 4.7U/6.3V_6C733 4.7U/6.3V_6 C729 0.1U/10V_4C729 0.1U/10V_4

C711 0.1U/10V_4C711 0.1U/10V_4 C716 0.1U/10V_4C716 0.1U/10V_4

XTAL_IN XTAL_OUT

1 2

14.318MHZ

C702

C702 33P/50V_4

33P/50V_4

C703

C703 33P/50V_4

33P/50V_4

R474

R474 *10K_4

*10K_4

CPU_SEL

R476

R476 10K_4

10K_4

CLK_BUF_BCLK_P CLK_BUF_BCLK_N

U29

+VDDSE_CLK

+VDDCORE_CLK

B B

+3V

CLK_ICH_14M<8>

+VDDIO_CLK

CGDAT_SMB<8,12,13> CGCLK_SMB<8,12,13>

C708 *10P/50V_4C708 *10P/50V_4

Place R8044 within 0.5" of C/G

C C

+1.05V <7,8,9,11,39> +1.5V <5,30> +3V <3,7,8,9,10,11,12,13,14,17,20,21,22,23,24,25,27,28,29,30,33,34,36>

C722 *0.047U/10V_4C722 *0.047U/10V_4

C737 *0.047U/10V_4C737 *0.047U/10V_4

R494 10K_4R494 10K_4 R478 33_4R478 33_4

CK_PWRGD_R XTAL_OUT

VDD_LCD

VDD_REF

VDD_USB

VDD_SRC

VDD_CPU

9LRS3197

18 15

31 32

CPU_SELCLK_ICH_14M

30 25 27

9 2 8

Vender

ICS Realtek Silego

9LRS3197

VDD_CPU_IO VDD_SRC_IO

SDATA SCLK

CPU_STOP# REF_0/CPU_SEL

CK_PWRGD/PD#_3.3 XOUT

XIN VSS_SATA VSS_USB VSS_LCD

ICS9LVS3197

AL003197001

IC OTHER(32P) ICS9LVS3197AKLFT(MLF)

QFN32

DOT96T_LPR DOT96C_LPR

27MHz_nonSS

Part Part Number

ICS9LVS3197

AL003197000 RTM890N-632 AL000890000 SLG8LV595VTR AL000595000

CPU-0

CPU-0#

CPU-1

CPU-1#

SRC-1

SRC-1#

SATA

SATA#

27MHz_SS

GND VSS_REF VSS_CPU VSS_SRC

23 22

20 19

3 4

13 14

10 11

6 7

33 26 21 12

C714 *3.3P/50V_4C714 *3.3P/50V_4

CLK_BUF_BCLK_P CLK_BUF_BCLK_N

CLK_BUF_DREFCLK CLK_BUF_DREFCLK#

CLK_BUF_PCIE_3GPLL CLK_BUF_PCIE_3GPLL#

CLK_BUF_DREFSSCLK CLK_BUF_DREFSSCLK#

CLK_VGA_27M_NOSS

0918 SI Modify

CLK_VGA_27M_SSXTAL_IN

R491 *22_4R491 *22_4

UMA remove

8/25 SI for H/W

Part Description

IC OTHER(32P) ICS9LVS3197AKLFT(MLF) IC OTHER(32P) RTM890N-632-GRT(QFN) IC OTHER(32P)SLG8LV595VTR(QFN)

PCH_CLK_27M_1

Discrete only

CLK_BUF_BCLK_P <8> CLK_BUF_BCLK_N <8>

CLK_BUF_DREFCLK <8> CLK_BUF_DREFCLK# <8>

CLK_BUF_PCIE_3GPLL <8> CLK_BUF_PCIE_3GPLL# <8>

CLK_BUF_DREFSSCLK <8> CLK_BUF_DREFSSCLK# <8>

T46T46

8/25 SI for H/W

C741 *0.1U/10V_4C741 *0.1U/10V_4

PCH_CLK_27M_1

VR_PWRGD_CLKEN#<33>

U30

CPU_SEL

+3V

UMA remove

2 4

*74LVC1G126

CPU0/1=133MHz (default)

DGPU_PWROK <10,17,29,34,35>

CPU0/1=100MHz

+3V

R493

R493 1K_4

1K_4

CK_PWRGD_R

Q39

Q39 2N7002E

2N7002E

PCH_CLK_27M <15>

R495

R495 100K_4

100K_4

D D

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Size Document Number Rev

Size Document Number Rev Custom

Custom

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Custom Date: Sheet

Date: Sheet

Clock Gen(9LRS3197)

239Sunday, September 19, 2010

DIS UMA

U15A

FDI_TXN0 FDI_TXN1 FDI_TXN2 FDI_TXN3 FDI_TXN4 FDI_TXN5 FDI_TXN6 FDI_TXN7

FDI_TXP0 FDI_TXP1 FDI_TXP2 FDI_TXP3 FDI_TXP4 FDI_TXP5 FDI_TXP6 FDI_TXP7

A24

DMI_RX#[0]

C23

DMI_RX#[1]

B22

DMI_RX#[2]

A21

DMI_RX#[3]

B24

DMI_RX[0]

D23

DMI_RX[1]

B23

DMI_RX[2]

A22

DMI_RX[3]

D24

DMI_TX#[0]

G24

DMI_TX#[1]

F23

DMI_TX#[2]

H23

DMI_TX#[3]

D25

DMI_TX[0]

F24

DMI_TX[1]

E23

DMI_TX[2]

G23

DMI_TX[3]

E22

FDI_TX#[0]

D21

FDI_TX#[1]

D19

FDI_TX#[2]

D18

FDI_TX#[3]

G21

FDI_TX#[4]

E19

FDI_TX#[5]

F21

FDI_TX#[6]

G18

FDI_TX#[7]

D22

FDI_TX[0]

C21

FDI_TX[1]

D20

FDI_TX[2]

C18

FDI_TX[3]

G22

FDI_TX[4]

E20

FDI_TX[5]

F20

FDI_TX[6]

G19

FDI_TX[7]

F17

FDI_FSYNC[0]

E17

FDI_FSYNC[1]

C17

FDI_INT

F18

FDI_LSYNC[0]

D17

FDI_LSYNC[1]

IC,AUB_CFD_rPGA,R1P0

DMI

Intel(R) FDI

DMI_TXN0<9> DMI_TXN1<9> DMI_TXN2<9> DMI_TXN3<9>

A A

2.7GT/s data rate

B B

C C

DMI_TXP0<9> DMI_TXP1<9> DMI_TXP2<9> DMI_TXP3<9>

DMI_RXN0<9> DMI_RXN1<9> DMI_RXN2<9> DMI_RXN3<9>

DMI_RXP0<9> DMI_RXP1<9> DMI_RXP2<9> DMI_RXP3<9> PM_SYNC<9>

FDI_TXN[7:0]<9>

FDI_TXP[7:0]<9>

FDI_FSYNC0<9> FDI_FSYNC1<9>

FDI_INT<9>

FDI_LSYNC0<9> FDI_LSYNC1<9>

PEG_ICOMPI

PEG_ICOMPO

PEG_RCOMPO

PEG_RBIAS PEG_RX#[0]

PEG_RX#[1] PEG_RX#[2] PEG_RX#[3] PEG_RX#[4] PEG_RX#[5] PEG_RX#[6] PEG_RX#[7] PEG_RX#[8]

PEG_RX#[9] PEG_RX#[10] PEG_RX#[11] PEG_RX#[12] PEG_RX#[13] PEG_RX#[14] PEG_RX#[15]

PEG_RX[0] PEG_RX[1] PEG_RX[2] PEG_RX[3] PEG_RX[4] PEG_RX[5] PEG_RX[6] PEG_RX[7] PEG_RX[8]

PEG_RX[9] PEG_RX[10] PEG_RX[11] PEG_RX[12] PEG_RX[13] PEG_RX[14] PEG_RX[15]

PEG_TX#[0] PEG_TX#[1] PEG_TX#[2] PEG_TX#[3] PEG_TX#[4] PEG_TX#[5] PEG_TX#[6] PEG_TX#[7] PEG_TX#[8] PEG_TX#[9]

PEG_TX#[10] PEG_TX#[11] PEG_TX#[12] PEG_TX#[13] PEG_TX#[14] PEG_TX#[15]

PEG_TX[0]

PEG_TX[1]

PEG_TX[2]

PEG_TX[3]

PCI EXPRESS -- GRAPHICS

PEG_TX[4]

PEG_TX[5]

PEG_TX[6]

PEG_TX[7]

PEG_TX[8]

PEG_TX[9] PEG_TX[10] PEG_TX[11] PEG_TX[12] PEG_TX[13] PEG_TX[14] PEG_TX[15]

for S3 power reduction

R62 *0_4R62 *0_4

DDR3_DRAMRST#_C

R66

100K_4

D D

Q6 BSS138_NLQ6 BSS138_NL

C98

0.047U/10V_4

PEG_COMP

B26 A26 B27

PEG_RBIAS

A25

PEG_RX#0

K35

PEG_RX#1

J34

PEG_RX#2

J33

PEG_RX#3

G35

PEG_RX#4

G32

PEG_RX#5

F34

PEG_RX#6

F31

PEG_RX#7

D35 E33 C33 D32 B32 C31 B28 B30 A31

PEG_RX0

J35

PEG_RX1

H34

PEG_RX2

H33

PEG_RX3

F35

PEG_RX4

G33

PEG_RX5

E34

PEG_RX6

F32

PEG_RX7

D34 F33 B33 D31 A32 C30 A28 B29 A30

C_PEG_TX#0

L33

C_PEG_TX#1

M35

C_PEG_TX#2

M33

C_PEG_TX#3

M30

C_PEG_TX#4

L31

C_PEG_TX#5

K32

C_PEG_TX#6

M29

C_PEG_TX#7

J31 K29 H30 H29 F29 E28 D29 D27 C26

C_PEG_TX0

L34

C_PEG_TX1

M34

C_PEG_TX2

M32

C_PEG_TX3

L30

C_PEG_TX4

M31

C_PEG_TX5

K31

C_PEG_TX6

M28

C_PEG_TX7

H31 K28 G30 G29 F28 E27 D28 C27 C25

SI modify

+1.05V_VTT<5,10,11,29,32,33,38>

+1.5VSUS<5,12,13,34,35,36>

+3V<2,7,8,9,10,11,12,13,14,17,20,21,22,23,24,25,27,28,29,30,33,34,36>

R288 49.9/F_4R288 49.9/F_4

R289 750/F_4R289 750/F_4

C543 0.1U/10V_4C543 0.1U/10V_4 C549 0.1U/10V_4C549 0.1U/10V_4 C554 0.1U/10V_4C554 0.1U/10V_4 C561 0.1U/10V_4C561 0.1U/10V_4 C565 0.1U/10V_4C565 0.1U/10V_4 C570 0.1U/10V_4C570 0.1U/10V_4 C577 0.1U/10V_4C577 0.1U/10V_4 C582 0.1U/10V_4C582 0.1U/10V_4

PEG_RX#[0..7] <14>

PEG_RX[0..7] <14>

UMA remove

C537 0.1U/10V_4C537 0.1U/10V_4 C546 0.1U/10V_4C546 0.1U/10V_4 C550 0.1U/10V_4C550 0.1U/10V_4 C557 0.1U/10V_4C557 0.1U/10V_4 C562 0.1U/10V_4C562 0.1U/10V_4 C566 0.1U/10V_4C566 0.1U/10V_4 C572 0.1U/10V_4C572 0.1U/10V_4 C578 0.1U/10V_4C578 0.1U/10V_4

DDR3_DRAMRST# <12,13>

PCIE_CLK_REQ7# <10>

R58 10K_4R58 10K_4

+3VS5

H_PECI<10>

H_PROCHOT#<29,33>

PM_THRMTRIP#<10,29>

T31T31

H_PWRGOOD<10>

PM_DRAM_PWRGD<9>

T45T45

PLTRST#<8,14,24,27,29,30>

PEG_TX#0 PEG_TX#1 PEG_TX#2 PEG_TX#3 PEG_TX#4 PEG_TX#5 PEG_TX#6 PEG_TX#7

PEG_TX0 PEG_TX1 PEG_TX2 PEG_TX3 PEG_TX4 PEG_TX5 PEG_TX6 PEG_TX7

PEG_TX#[0..7] <14>

PEG_TX[0..7] <14>

SI modify

*10K_4

STAT_1.1<32>

Use a voltage divider with VDDQ (1.5 V) rail ON in S3) and resistor combination of 1.5K ±1% (to VDDQ)/750±1% (to GND) to convert to

http://hobi-elektronika.net

processor VTT level.

R139 20/F_4R139 20/F_4 R142 20/F_4R142 20/F_4 R81 49.9/F_4R81 49.9/F_4 R143 49.9/F_4R143 49.9/F_4

H_CPURST#

H_PWRGD_XDP

R124 1.5K/F_4R124 1.5K/F_4 R126 750/F_4R126 750/F_4

R186

R187

*8.2K_4

2 1

*MC74VHC1G08DFT2G

H_COMP3

AT23

H_COMP2

AT24

H_COMP1

G16

H_COMP0

AT26

AH24

H_CATERR#

AK14 AT15 AN26 AK15

AP26 AL15 AN14 AN27 AK13

XDP_TDO_R H_CATERR#

H_PROCHOT# CPU_PLTRST# XDP_TMS XDP_TDI_R XDP_PREQ#

XDP_TCLK

3 5

AM26 AM15

AL14

AJ22 AK22 AK24

AJ24

AJ25

AH22

AK23

AH23

H_VTTPWRGD CPU_PLTRST#

U10

U10 MC74VHC1G08DFT2G

MC74VHC1G08DFT2G

HWPG<29,31,32,35,38,39>

U15B

COMP3 COMP2 COMP1 COMP0 SKTOCC#

CATERR# PECI PROCHOT# THERMTRIP#

RESET_OBS# PM_SYNC VCCPWRGOOD_1 VCCPWRGOOD_0 SM_DRAMPWROK

TAPPWRGOOD VTTPWRGOOD

RSTIN#

BPM#[0] BPM#[1] BPM#[2] BPM#[3] BPM#[4] BPM#[5] BPM#[6] BPM#[7]

IC,AUB_CFD_rPGA,R1P0

2 1

R184 *0_4R184 *0_4

MISC

THERMAL

PWR MANAGEMENT

JTAG & BPM

R144 51_4R144 51_4 R119 49.9/F_4R119 49.9/F_4

R130 56.2/F_4R130 56.2/F_4 R123 *68_4R123 *68_4 R138 *51_4R138 *51_4 R145 *51_4R145 *51_4 R141 *51_4R141 *51_4

R137 *51_4R137 *51_4

+3V

3 5

+1.5VSUS+3VS5

Rb Rc 0 ohm NA

CLOCKS

DPLL_REF_SSCLK

DPLL_REF_SSCLK#

DDR3

DDR3 MISC

MISC

+1.05V_VTT

R170

HWPG_1 H_VTTPWRGD

2K/F_4

R178

R178 *0_4

*0_4

*0_4/S

R172

R179

1.5K/F_4

R163

R163 750/F_4

750/F_4

HWPG_1

PM_DRAM_PWRGD

0 ohm

BCLK#

BCLK_ITP

BCLK_ITP#

PEG_CLK

PEG_CLK#

SM_DRAMRST#

SM_RCOMP[0] SM_RCOMP[1] SM_RCOMP[2]

PM_EXT_TS#[0] PM_EXT_TS#[1]

PRDY# PREQ#

TRST#

TDI_M

TDO_M

R164

R164 1K/F_4

1K/F_4

0 ohm

A16

BCLK

B16 AR30

AT30 E16

D16 A18

A17

F6 AL1

AM1 AN1

AN15 AP15

AT28 AP27 AN28

TCK

AP28

TMS

AT27 AT29

TDI

AR27

TDO

AR29 AP29

AN25

DBR#

XDP_TDI_R XDP_TDO_M

XDP_TDI_M XDP_TDO_R

Scan Chain (Default)

CPU Only

GMCH Only

CLK_CPU_BCLK <10> CLK_CPU_BCLK# <10>

CLK_PCIE_3GPLL <8> CLK_PCIE_3GPLL# <8>

DREFSSCLK_R DREFSSCLK#_R

SM_RCOMP_0 SM_RCOMP_1 SM_RCOMP_2

PM_EXT_TS#0 PM_EXT_TS#1

XDP_PRDY# XDP_PREQ# XDP_TCLK

XDP_TMS XDP_TRST#

XDP_TDI_R XDP_TDO_R XDP_TDI_M XDP_TDO_M

DDR3_DRAMRST#_C

R363 100/F_4R363 100/F_4 R364 24.9/F_4R364 24.9/F_4 R365 130/F_4R365 130/F_4 R176 10K_4R176 10K_4 R177 *0_4/SR177 *0_4/S R166 *0_4/SR166 *0_4/S R168 10K_4R168 10K_4

JTAG MAPPING

Ra Rb

R140

R140 0_4

0_4

Rd Re

XDP_TRST#

R147

R147 51_4

51_4

STUFF -> Ra, Rc, Re NO STUFF -> Rb, Rd

STUFF -> Ra, Rb NO STUFF -> Rc, Rd, Re

STUFF -> Rd, Re NO STUFF -> Ra, Rb, Rc

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Size Document Number Rev

Size Document Number Rev Custom

Custom

Custom Date: Sheet

Date: Sheet

PROCESSER 1/4(HOST&PEX)

For ITP CLk

T44T44 T28T28 T25T25

T27T27 T32T32 T33T33

T30T30 T29T29 T26T26

XDP_DBRESET# <9>

DREFSSCLK <8> DREFSSCLK# <8>

+1.05V_VTT

PM_EXTTS#0 <12,13> PM_EXTTS#1 <13>

+1.05V_VTT

339Sunday, September 19, 2010

AUBURNDALE/CLARKSFIELD PROCESSOR (DDR3)

A A

M_A_DQ[63:0]<12>

B B

C C

M_A_BS#0<12> M_A_BS#1<12> M_A_BS#2<12>

M_A_CAS#<12> M_A_RAS#<12>

M_A_WE#<12>

M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63

U15C

A10

SA_DQ[0]

C10

SA_DQ[1]

SA_DQ[2]

SA_DQ[3]

B10

SA_DQ[4]

D10

SA_DQ[5]

E10

SA_DQ[6]

SA_DQ[7]

SA_DQ[8]

F10

SA_DQ[9]

SA_DQ[10]

SA_DQ[11]

SA_DQ[12]

SA_DQ[13]

SA_DQ[14]

SA_DQ[15]

H10

SA_DQ[16]

SA_DQ[17]

SA_DQ[18]

SA_DQ[19]

SA_DQ[20]

G10

SA_DQ[21]

SA_DQ[22]

J10

SA_DQ[23]

SA_DQ[24]

SA_DQ[25]

SA_DQ[26]

SA_DQ[27]

SA_DQ[28]

SA_DQ[29]

SA_DQ[30]

SA_DQ[31]

AH5

SA_DQ[32]

AF5

SA_DQ[33]

AK6

SA_DQ[34]

AK7

SA_DQ[35]

AF6

SA_DQ[36]

AG5

SA_DQ[37]

AJ7

SA_DQ[38]

AJ6

SA_DQ[39]

AJ10

SA_DQ[40]

AJ9

SA_DQ[41]

AL10

SA_DQ[42]

AK12

SA_DQ[43]

AK8

SA_DQ[44]

AL7

SA_DQ[45]

AK11

SA_DQ[46]

AL8

SA_DQ[47]

AN8

SA_DQ[48]

AM10

SA_DQ[49]

AR11

SA_DQ[50]

AL11

SA_DQ[51]

AM9

SA_DQ[52]

AN9

SA_DQ[53]

AT11

SA_DQ[54]

AP12

SA_DQ[55]

AM12

SA_DQ[56]

AN12

SA_DQ[57]

AM13

SA_DQ[58]

AT14

SA_DQ[59]

AT12

SA_DQ[60]

AL13

SA_DQ[61]

AR14

SA_DQ[62]

AP14

SA_DQ[63]

AC3

SA_BS[0]

AB2

SA_BS[1]

SA_BS[2]

AE1

SA_CAS#

AB3

SA_RAS#

AE9

SA_WE#

IC,AUB_CFD_rPGA,R1P0

AA6

SA_CK[0]

AA7

SA_CK#[0]

SA_CKE[0]

SA_CK[1]

SA_CK#[1]

SA_CKE[1]

AE2

SA_CS#[0]

AE8

SA_CS#[1]

AD8

SA_ODT[0]

AF9

SA_ODT[1]

SA_DM[0] SA_DM[1] SA_DM[2] SA_DM[3] SA_DM[4] SA_DM[5] SA_DM[6] SA_DM[7]

SA_DQS#[0] SA_DQS#[1] SA_DQS#[2] SA_DQS#[3] SA_DQS#[4] SA_DQS#[5] SA_DQS#[6] SA_DQS#[7]

SA_DQS[0] SA_DQS[1] SA_DQS[2] SA_DQS[3] SA_DQS[4] SA_DQS[5] SA_DQS[6] SA_DQS[7]

SA_MA[0] SA_MA[1] SA_MA[2] SA_MA[3] SA_MA[4] SA_MA[5] SA_MA[6] SA_MA[7] SA_MA[8] SA_MA[9]

DDR SYSTEM MEMORY A

SA_MA[10] SA_MA[11] SA_MA[12] SA_MA[13] SA_MA[14] SA_MA[15]

B9 D7 H7 M7 AG6 AM7 AN10 AN13

C9 F8 J9 N9 AH7 AK9 AP11 AT13

C8 F9 H9 M9 AH8 AK10 AN11 AR13

Y3 W1 AA8 AA3 V1 AA9 V8 T1 Y9 U6 AD4 T2 U3 AG8 T3 V9

M_A_DM0 M_A_DM1 M_A_DM2 M_A_DM3 M_A_DM4 M_A_DM5 M_A_DM6 M_A_DM7

M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7

M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15

M_A_CLK0 <12> M_A_CLK0# <12> M_A_CKE0 <12>

M_A_CLK1 <12> M_A_CLK1# <12> M_A_CKE1 <12>

M_A_CS#0 <12> M_A_CS#1 <12>

M_A_ODT0 <12> M_A_ODT1 <12> M_A_DM[7:0] <12>

DM signals are not present on Clarkfield processor. All DM signal can be left as NC on Clarkfield and connect directly to GND on So-DIMM side for Clarkfield design only

M_A_DQS#[7:0] <12>

M_A_DQS[7:0] <12>

M_A_A[15:0] <12>

M_B_DQ[63:0]<13>

M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63

M_B_BS#0<13> M_B_BS#1<13> M_B_BS#2<13>

M_B_CAS#<13> M_B_RAS#<13>

M_B_WE#<13>

U15D

SB_DQ[0]

SB_DQ[1]

SB_DQ[2]

SB_DQ[3]

SB_DQ[4]

SB_DQ[5]

SB_DQ[6]

SB_DQ[7]

SB_DQ[8]

SB_DQ[9]

SB_DQ[10]

SB_DQ[11]

SB_DQ[12]

SB_DQ[13]

SB_DQ[14]

SB_DQ[15]

SB_DQ[16]

SB_DQ[17]

SB_DQ[18]

SB_DQ[19]

SB_DQ[20]

SB_DQ[21]

SB_DQ[22]

SB_DQ[23]

SB_DQ[24]

SB_DQ[25]

SB_DQ[26]

SB_DQ[27]

SB_DQ[28]

SB_DQ[29]

SB_DQ[30]

SB_DQ[31]

AF3

SB_DQ[32]

AG1

SB_DQ[33]

AJ3

SB_DQ[34]

AK1

SB_DQ[35]

AG4

SB_DQ[36]

AG3

SB_DQ[37]

AJ4

SB_DQ[38]

AH4

SB_DQ[39]

AK3

SB_DQ[40]

AK4

SB_DQ[41]

AM6

SB_DQ[42]

AN2

SB_DQ[43]

AK5

SB_DQ[44]

AK2

SB_DQ[45]

AM4

SB_DQ[46]

AM3

SB_DQ[47]

AP3

SB_DQ[48]

AN5

SB_DQ[49]

AT4

SB_DQ[50]

AN6

SB_DQ[51]

AN4

SB_DQ[52]

AN3

SB_DQ[53]

AT5

SB_DQ[54]

AT6

SB_DQ[55]

AN7

SB_DQ[56]

AP6

SB_DQ[57]

AP8

SB_DQ[58]

AT9

SB_DQ[59]

AT7

SB_DQ[60]

AP9

SB_DQ[61]

AR10

SB_DQ[62]

AT10

SB_DQ[63]

AB1

SB_BS[0]

SB_BS[1]

SB_BS[2]

AC5

SB_CAS#

SB_RAS#

AC6

SB_WE#

IC,AUB_CFD_rPGA,R1P0

SB_CK[0]

SB_CK#[0]

SB_CKE[0]

SB_CK[1]

SB_CK#[1]

SB_CKE[1]

AB8

SB_CS#[0]

AD6

SB_CS#[1]

SB_DM[0] SB_DM[1] SB_DM[2] SB_DM[3] SB_DM[4] SB_DM[5] SB_DM[6] SB_DM[7]

SB_MA[0] SB_MA[1] SB_MA[2] SB_MA[3] SB_MA[4] SB_MA[5] SB_MA[6] SB_MA[7] SB_MA[8]

SB_MA[9] SB_MA[10] SB_MA[11] SB_MA[12] SB_MA[13] SB_MA[14] SB_MA[15]

AC7 AD1

D4 E1 H3 K1 AH1 AL2 AR4 AT8

D5 F4 J4 L4 AH2 AL4 AR5 AR8

C5 E3 H4 M5 AG2 AL5 AP5 AR7

U5 V2 T5 V3 R1 T8 R2 R6 R4 R5 AB5 P3 R3 AF7 P5 N1

M_B_DM0 M_B_DM1 M_B_DM2 M_B_DM3 M_B_DM4 M_B_DM5 M_B_DM6 M_B_DM7

M_B_DQS#0 M_B_DQS#1 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7

M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7

M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15

SB_ODT[0] SB_ODT[1]

SB_DQS#[0] SB_DQS#[1] SB_DQS#[2] SB_DQS#[3] SB_DQS#[4] SB_DQS#[5] SB_DQS#[6] SB_DQS#[7]

SB_DQS[0] SB_DQS[1] SB_DQS[2] SB_DQS[3] SB_DQS[4] SB_DQS[5] SB_DQS[6] SB_DQS[7]

DDR SYSTEM MEMORY B

M_B_CLK0 <13> M_B_CLK0# <13> M_B_CKE0 <13>

M_B_CLK1 <13> M_B_CLK1# <13> M_B_CKE1 <13>

M_B_CS#0 <13> M_B_CS#1 <13>

M_B_ODT0 <13> M_B_ODT1 <13> M_B_DM[7:0] <13>

DM signals are not present on Clarkfield processor. All DM signal can be left as NC on Clarkfield and connect directly to GND on So-DIMM side for Clarkfield design only

M_B_DQS#[7:0] <13>

M_B_DQS[7:0] <13>

M_B_A[15:0] <13>

D D

352-(&75

4XDQWD&RPSXWHU,QF

Size Document Number Rev

Size Document Number Rev Custom

Custom

Custom Date: Sheet

Date: Sheet

http://hobi-elektronika.net

Date: Sheet

PROCESSER 2/4(DDR)

439Tuesday, September 14, 2010

U15F

+VCORE

C206 22U/6.3VS_8C206 22U/6.3VS_8 C513 22U/6.3VS_8C513 22U/6.3VS_8 C599 22U/6.3VS_8C599 22U/6.3VS_8 C515 22U/6.3VS_8C515 22U/6.3VS_8 C233 22U/6.3VS_8C233 22U/6.3VS_8 C202 22U/6.3VS_8C202 22U/6.3VS_8 C205 22U/6.3VS_8C205 22U/6.3VS_8

A A

B B

C C

D D

C322 22U/6.3VS_8C322 22U/6.3VS_8 C587 22U/6.3VS_8C587 22U/6.3VS_8 C285 22U/6.3VS_8C285 22U/6.3VS_8 C281 22U/6.3VS_8C281 22U/6.3VS_8 C604 22U/6.3VS_8C604 22U/6.3VS_8 C593 10U/6.3V_8C593 10U/6.3V_8 C282 10U/6.3V_8C282 10U/6.3V_8 C283 10U/6.3V_8C283 10U/6.3V_8 C516 10U/6.3V_8C516 10U/6.3V_8 C251 10U/6.3V_8C251 10U/6.3V_8 C203 10U/6.3V_8C203 10U/6.3V_8 C312 10U/6.3V_8C312 10U/6.3V_8 C274 10U/6.3V_8C274 10U/6.3V_8 C216 10U/6.3V_8C216 10U/6.3V_8 C320 10U/6.3V_8C320 10U/6.3V_8 C321 10U/6.3V_8C321 10U/6.3V_8 C603 10U/6.3V_8C603 10U/6.3V_8 C204 10U/6.3V_8C204 10U/6.3V_8 C284 10U/6.3V_8C284 10U/6.3V_8 C601 10U/6.3V_8C601 10U/6.3V_8 C298 10U/6.3V_8C298 10U/6.3V_8 C311 0.1U/10V_4C311 0.1U/10V_4 C314 0.1U/10V_4C314 0.1U/10V_4

C200 *0.047U/10V_4C200 *0.047U/10V_4

C198 *0.047U/10V_4C198 *0.047U/10V_4

C199 *0.047U/10V_4C199 *0.047U/10V_4

AG35

VCC1

AG34

VCC2

AG33

VCC3

AG32

VCC4

AG31

VCC5

AG30

VCC6

AG29

VCC7

AG28

VCC8

AG27

VCC9

AG26

VCC10

AF35

VCC11

AF34

VCC12

AF33

VCC13

AF32

VCC14

AF31

VCC15

AF30

VCC16

AF29

VCC17

AF28

VCC18

AF27

VCC19

AF26

VCC20

AD35

VCC21

AD34

VCC22

AD33

VCC23

AD32

VCC24

AD31

VCC25

AD30

VCC26

AD29

VCC27

AD28

VCC28

AD27

VCC29

AD26

VCC30

AC35

VCC31

AC34

VCC32

AC33

VCC33

AC32

VCC34

AC31

VCC35

AC30

VCC36

AC29

VCC37

AC28

VCC38

AC27

VCC39

AC26

VCC40

AA35

VCC41

AA34

VCC42

AA33

VCC43

AA32

VCC44

AA31

VCC45

AA30

VCC46

AA29

VCC47

AA28

VCC48

AA27

VCC49

AA26

VCC50

Y35

VCC51

Y34

VCC52

Y33

VCC53

Y32

VCC54

Y31

VCC55

Y30

VCC56

Y29

VCC57

Y28

VCC58

Y27

VCC59

Y26

VCC60

V35

VCC61

V34

VCC62

V33

VCC63

V32

VCC64

V31

VCC65

V30

VCC66

V29

VCC67

V28

VCC68

V27

VCC69

V26

VCC70

U35

VCC71

U34

VCC72

U33

VCC73

U32

VCC74

U31

VCC75

U30

VCC76

U29

VCC77

U28

VCC78

U27

VCC79

U26

VCC80

R35

VCC81

R34

VCC82

R33

VCC83

R32

VCC84

R31

VCC85

R30

VCC86

R29

VCC87

R28

VCC88

R27

VCC89

R26

VCC90

P35

VCC91

P34

VCC92

P33

VCC93

P32

VCC94

P31

VCC95

P30

VCC96

P29

VCC97

P28

VCC98

P27

VCC99

P26

VCC100

IC,AUB_CFD_rPGA,R1P0

1.1V RAIL POWERSENSE LINES CPU VIDS

CPU CORE SUPPLY

POWER

PROC_DPRSLPVR

VSS_SENSE_VTT

AH14

VTT0_1

AH12

VTT0_2

AH11

VTT0_3

AH10

VTT0_4

J14

VTT0_5

J13

VTT0_6

H14

VTT0_7

H12

VTT0_8

G14

VTT0_9

G13

VTT0_10

G12

VTT0_11

G11

VTT0_12

F14

VTT0_13

F13

VTT0_14

F12

VTT0_15

F11

VTT0_16

E14

VTT0_17

E12

VTT0_18

D14

VTT0_19

D13

VTT0_20

D12

VTT0_21

D11

VTT0_22

C14

VTT0_23

C13

VTT0_24

C12

VTT0_25

C11

VTT0_26

B14

VTT0_27

B12

VTT0_28

A14

VTT0_29

A13

VTT0_30

A12

VTT0_31

A11

VTT0_32

AF10

VTT0_33

AE10

VTT0_34

AC10

VTT0_35

AB10

VTT0_36

Y10

VTT0_37

W10

VTT0_38

U10

VTT0_39

T10

VTT0_40

J12

VTT0_41

J11

VTT0_42

J16

VTT0_43

J15

VTT0_44

AN33

PSI#

AK35

VID[0]

AK33

VID[1]

AK34

VID[2]

AL35

VID[3]

AL33

VID[4]

AM33

VID[5]

AM35

VID[6]

AM34

G15

VTT_SELECT

H_VTTVID1=Low, 1.1V H_VTTVID1=High, 1.05V

AN35

ISENSE

B15

VTT_SENSE

A15

AJ34

VCC_SENSE

AJ35

VSS_SENSE

18A

+1.05V_VTT

C589 10U/6.3V_8C589 10U/6.3V_8 C573 10U/6.3V_8C573 10U/6.3V_8 C539 10U/6.3V_8C539 10U/6.3V_8 C49 10U/6.3V_8C49 10U/6.3V_8 C56 10U/6.3V_8C56 10U/6.3V_8

C62 10U/6.3V_8C62 10U/6.3V_8 C179 22U/6.3VS_8C179 22U/6.3VS_8

C583 22U/6.3VS_8C583 22U/6.3VS_8

C176 22U/6.3VS_8C176 22U/6.3VS_8 C178 22U/6.3VS_8C178 22U/6.3VS_8

VTT Rail Values are Auburndal VTT=1.05V Clarksfield VTT=1.1V

H_PSI# <33>

CPU_VID0 <33> CPU_VID1 <33> CPU_VID2 <33> CPU_VID3 <33> CPU_VID4 <33> CPU_VID5 <33> CPU_VID6 <33> DPRSLPVR <33>

H_VTTVID1 <32>

I_MON <33>

VTT_SENSE <32> VSS_SENSE_VTT <32>

R346 100_4R346 100_4

R349 100_4R349 100_4

8/25 SI for H/W.

Please note that +VCC_GFX_CORE should be 1.05V in Auburndale

+VGACORE_IGPU

+1.05V_VTT

+VCORE

VCCSENSE <33> VSSSENSE <33>

C23*10U/6.3V_8 C23*10U/6.3V_8

C39*10U/6.3V_8 C39*10U/6.3V_8

C511*10U/6.3V_8 C511*10U/6.3V_8

UMA only

Ra 0 ohm

+1.05V_VTT

+VCORE

C24*10U/6.3V_8 C24*10U/6.3V_8

C292*10U/6.3V_8 C292*10U/6.3V_8

C25*10U/6.3V_8 C25*10U/6.3V_8

C590 22U/6.3VS_8C590 22U/6.3VS_8 C584 22U/6.3VS_8C584 22U/6.3VS_8 C564 10U/6.3V_8C564 10U/6.3V_8 C574 10U/6.3V_8C574 10U/6.3V_8

DISNAUMA

C180 22U/6.3VS_8C180 22U/6.3VS_8

8/25 SI for H/W.

C72 22U/6.3VS_8C72 22U/6.3VS_8 C31 22U/6.3VS_8C31 22U/6.3VS_8 C30 22U/6.3VS_8C30 22U/6.3VS_8 C181 22U/6.3VS_8C181 22U/6.3VS_8

C22*10U/6.3V_8 C22*10U/6.3V_8

C38*10U/6.3V_8 C38*10U/6.3V_8

C512*10U/6.3V_8 C512*10U/6.3V_8

C514*10U/6.3V_8 C514*10U/6.3V_8

C142*2.2U/6.3V_6 C142*2.2U/6.3V_6

C223*2.2U/6.3V_6 C223*2.2U/6.3V_6

U15G

AT21

VAXG1

AT19

VAXG2

AT18

VAXG3

AT16

VAXG4

AR21

VAXG5

AR19

VAXG6

AR18

VAXG7

AR16

VAXG8

AP21

VAXG9

AP19

VAXG10

AP18

VAXG11

AP16

VAXG12

AN21

VAXG13

AN19

VAXG14

AN18

VAXG15

AN16

VAXG16

AM21

VAXG17

AM19

VAXG18

AM18

VAXG19

AM16

VAXG20

AL21

VAXG21

AL19

VAXG22

AL18

VAXG23

AL16

VAXG24

AK21

VAXG25

AK19

VAXG26

AK18

VAXG27

AK16

VAXG28

AJ21

VAXG29

AJ19

VAXG30

AJ18

VAXG31

AJ16

VAXG32

AH21

VAXG33

AH19

VAXG34

AH18

VAXG35

AH16

VAXG36

J24

VTT1_45

J23

VTT1_46

H25

VTT1_47

K26

VTT1_48

J27

VTT1_49

J26

VTT1_50

J25

VTT1_51

H27

VTT1_52

G28

VTT1_53

G27

VTT1_54

G26

VTT1_55

F26

VTT1_56

E26

VTT1_57

E25

VTT1_58

IC,AUB_CFD_rPGA,R1P0

0510 add for WiMAX

C74*2.2U/6.3V_6 C74*2.2U/6.3V_6

C70*2.2U/6.3V_6 C70*2.2U/6.3V_6

C149*2.2U/6.3V_6 C149*2.2U/6.3V_6

C109*2.2U/6.3V_6 C109*2.2U/6.3V_6

C80*2.2U/6.3V_6 C80*2.2U/6.3V_6

C128*2.2U/6.3V_6 C128*2.2U/6.3V_6

C175*2.2U/6.3V_6 C175*2.2U/6.3V_6

SENSE

GRAPHICS

POWER

FDI PEG & DMI

C54*2.2U/6.3V_6 C54*2.2U/6.3V_6

AR22

VAXG_SENSE

GFX_VID[0] GFX_VID[1] GFX_VID[2] GFX_VID[3] GFX_VID[4] GFX_VID[5] GFX_VID[6]

GFX_VR_EN

GFX_IMON

VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8

VDDQ9 VDDQ10 VDDQ11 VDDQ12 VDDQ13 VDDQ14 VDDQ15 VDDQ16 VDDQ17 VDDQ18

VTT0_59 VTT0_60 VTT0_61 VTT0_62 VTT1_63 VTT1_64 VTT1_65 VTT1_66 VTT1_67 VTT1_68

VCCPLL1 VCCPLL2 VCCPLL3

+1.5VSUS

C118

C138

*3.3P/50V_4

+VCORE<33>

+1.05V_VTT<3,10,11,29,32,33,38>

+1.5VSUS<3,12,13,34,35,36>

AT22

AM22 AP22 AN22 AP23 AM23 AP24 AN24

AR25 AT25 AM24

AJ1 AF1 AE7 AE4 AC1 AB7 AB4 Y1 W7 W4 U1 T7 T4 P1 N7 N4 L1 H1

P10 N10 L10 K10 J22 J20 J18 H21 H20 H19

L26 L27 M26

C94

C64

C52

*3.3P/50V_4

+1.8V<11,32>

VSSAXG_SENSE

LINES

GFX_DPRSLPVR

GRAPHICS VIDs

DDR3 - 1.5V RAILS

1.1V1.8V

C103

C235

*3.3P/50V_4

DISNAUMA

GFX_VR_EN

Rd Re

R195 *1K_4R195 *1K_4

R372 4.7K_4R372 4.7K_4

C383 1U/6.3V_4C383 1U/6.3V_4 C391 1U/6.3V_4C391 1U/6.3V_4 C390 1U/6.3V_4C390 1U/6.3V_4 C389 1U/6.3V_4C389 1U/6.3V_4 C388 1U/6.3V_4C388 1U/6.3V_4 C392 22U/6.3VS_8C392 22U/6.3VS_8 C371 22U/6.3VS_8C371 22U/6.3VS_8 C638

C638

1 2

*330U_2.5V_5.0x5.9_ESR10m

+1.5VSUS

C555 10U/6.3V_8C555 10U/6.3V_8 C563 10U/6.3V_8C563 10U/6.3V_8 C541 22U/6.3VS_8C541 22U/6.3VS_8 C540 22U/6.3VS_8C540 22U/6.3VS_8

C177 22U/6.3VS_8C177 22U/6.3VS_8 C338 4.7U/6.3V_6C338 4.7U/6.3V_6 C183 2.2U/6.3V_6C183 2.2U/6.3V_6 C341 1U/6.3V_4C341 1U/6.3V_4 C536 1U/6.3V_4C536 1U/6.3V_4

C252

C278

C224

*3.3P/50V_4

4.7KNARc 0 ohm 0 ohm

C245

*15P/50V_4

+1.05V_VTT

+1.8V

C129

C193

*15P/50V_4

VCC_AXG_SENSE <38> VSS_AXG_SENSE <38>

GFXVR_VID_0 <38> GFXVR_VID_1 <38> GFXVR_VID_2 <38> GFXVR_VID_3 <38> GFXVR_VID_4 <38> GFXVR_VID_5 <38> GFXVR_VID_6 <38>

GFXVR_EN <38> GFXVR_DPRSLPVR <38> GFXVR_IMON <38>

C6160.1U/10V_4 C6160.1U/10V_4 C6190.1U/10V_4 C6190.1U/10V_4 C3940.1U/10V_4 C3940.1U/10V_4 C6130.1U/10V_4 C6130.1U/10V_4

C59

C261

C186

*15P/50V_4

for S3 power reduction

+1.5V_CPU

CPU_VID0 CPU_VID1 CPU_VID2 CPU_VID3 CPU_VID4 CPU_VID5 CPU_VID6 DPRSLPVR H_PSI#

SI modify

MAINON_G<12,36>

Q34 2N7002EQ34 2N7002E

+1.5V_CPU +1.5V

R354 1K_4R354 1K_4 R352 *1K_4R352 *1K_4 R351 1K_4R351 1K_4 R348 *1K_4R348 *1K_4 R353 1K_4R353 1K_4 R355 *1K_4R355 *1K_4 R356 *1K_4R356 *1K_4 R361 1K_4R361 1K_4 R362 *1K_4R362 *1K_4 R366 1K_4R366 1K_4 R381 1K_4R381 1K_4 R376 *1K_4R376 *1K_4 R367 *1K_4R367 *1K_4 R373 1K_4R373 1K_4 R374 1K_4R374 1K_4 R371 *1K_4R371 *1K_4 R382 *1K_4R382 *1K_4 R377 1K_4R377 1K_4

HFM_VID : Max 1.4V LFM_VID : Min 0.65V

Size Document Number Rev

Size Document Number Rev Custom

Custom

Custom Date: Sheet of

Date: Sheet

+1.5VSUS

AON7410

Q33

R402 220/F_4R402 220/F_4

40mile routing

+1.05V_VTT

539Sunday, September 19, 2010

MAIND<36>

R394 *0_8/SR394 *0_8/S

352-(&75

4XDQWD&RPSXWHU,QF

PROCESSER 3/4(POWER)

http://hobi-elektronika.net

AUBURNDALE/CLARKSFIELD PROCESSOR (GND)

U15I

U15H

AT20

VSS1

AT17

VSS2

AR31

VSS3

A A

B B

C C

AR28

VSS4

AR26

VSS5

AR24

VSS6

AR23

VSS7

AR20

VSS8

AR17

VSS9

AR15

VSS10

AR12

VSS11

AR9

VSS12

AR6

VSS13

AR3

VSS14

AP20

VSS15

AP17

VSS16

AP13

VSS17

AP10

VSS18

AP7

VSS19

AP4

VSS20

AP2

VSS21

AN34

VSS22

AN31

VSS23

AN23

VSS24

AN20

VSS25

AN17

VSS26

AM29

VSS27

AM27

VSS28

AM25

VSS29

AM20

VSS30

AM17

VSS31

AM14

VSS32

AM11

VSS33

AM8

VSS34

AM5

VSS35

AM2

VSS36

AL34

VSS37

AL31

VSS38

AL23

VSS39

AL20

VSS40

AL17

VSS41

AL12

VSS42

AL9

VSS43

AL6

VSS44

AL3

VSS45

AK29

VSS46

AK27

VSS47

AK25

VSS48

AK20

VSS49

AK17

VSS50

AJ31

VSS51

AJ23

VSS52

AJ20

VSS53

AJ17

VSS54

AJ14

VSS55

AJ11

VSS56

AJ8

VSS57

AJ5

VSS58

AJ2

VSS59

AH35

VSS60

AH34

VSS61

AH33

VSS62

AH32

VSS63

AH31

VSS64

AH30

VSS65

AH29

VSS66

AH28

VSS67

AH27

VSS68

AH26

VSS69

AH20

VSS70

AH17

VSS71

AH13

VSS72

AH9

VSS73

AH6

VSS74

AH3

VSS75

AG10

VSS76

AF8

VSS77

AF4

VSS78

AF2

VSS79

AE35

VSS80

IC,AUB_CFD_rPGA,R1P0

VSS

VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98

VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158 VSS159 VSS160

AE34 AE33 AE32 AE31 AE30 AE29 AE28 AE27 AE26 AE6 AD10 AC8 AC4 AC2 AB35 AB34 AB33 AB32 AB31 AB30 AB29 AB28 AB27 AB26 AB6 AA10 Y8 Y4 Y2 W35 W34 W33 W32 W31 W30 W29 W28 W27 W26 W6 V10 U8 U4 U2 T35 T34 T33 T32 T31 T30 T29 T28 T27 T26 T6 R10 P8 P4 P2 N35 N34 N33 N32 N31 N30 N29 N28 N27 N26 N6 M10 L35 L32 L29 L8 L5 L2 K34 K33 K30

U15I

K27

VSS161

VSS162

VSS163

VSS164

J32

VSS165

J30

VSS166

J21

VSS167

J19

VSS168

H35

VSS169

H32

VSS170

H28

VSS171

H26

VSS172

H24

VSS173

H22

VSS174

H18

VSS175

H15

VSS176

H13

VSS177

H11

VSS178

VSS179

VSS180

VSS181

G34

VSS182

G31

VSS183

G20

VSS184

VSS185

VSS186

VSS187

F30

VSS188

F27

VSS189

F25

VSS190

F22

VSS191

F19

VSS192

F16

VSS193

E35

VSS194

E32

VSS195

E29

VSS196

E24

VSS197

E21

VSS198

E18

VSS199

E13

VSS200

E11

VSS201

VSS202

VSS203

VSS204

D33

VSS205

D30

VSS206

D26

VSS207

VSS208

VSS209

VSS210

C34

VSS211

C32

VSS212

C29

VSS213

C28

VSS214

C24

VSS215

C22

VSS216

C20

VSS217

C19

VSS218

C16

VSS219

B31

VSS220

B25

VSS221

B21

VSS222

B18

VSS223

B17

VSS224

B13

VSS225

B11

VSS226

VSS227

VSS228

VSS229

A29

VSS230

A27

VSS231

A23

VSS232

VSS233

AT35

VSS_NCTF1

AT1

VSS_NCTF2

AR34

VSS_NCTF3

B34

VSS_NCTF4

VSS_NCTF5

VSS_NCTF6

A35

VSS_NCTF7

IC,AUB_CFD_rPGA,R1P0

VSS

NCTF

AUBURNDALE/CLARKSFIELD PROCESSOR( RESERVED, CFG)

U15E

J17

SA_DIMM_VREF

H17

SB_DIMM_VREF

AM30

CFG[0]

AM28

CFG[1]

AP31

CFG[2]

AL32

CFG[3]

AL30

CFG[4]

AM31

CFG[5]

AN29

CFG[6]

AM32

CFG[7]

AK32

CFG[8]

AK31

CFG[9]

AK28

CFG[10]

AJ28

CFG[11]

AN30

CFG[12]

AN32

CFG[13]

AJ32

CFG[14]

AJ29

CFG[15]

AJ30

CFG[16]

AK30

CFG[17]

H16

RSVD_TP_86

AP25

RSVD1

AL25

RSVD2

AL24

RSVD3

AL22

RSVD4

AJ33

RSVD5

AG9

RSVD6

M27

RSVD7

L28

RSVD8

G25

RSVD11

G17

RSVD12

E31

RSVD13

E30

RSVD14

B19

RSVD15

A19

RSVD16

A20

RSVD17

B20

RSVD18

RSVD19

RSVD20

AC9

RSVD21

AB9

RSVD22

RSVD_NCTF_23

RSVD_NCTF_24

J29

RSVD26

J28

RSVD27

A34

RSVD_NCTF_28

A33

RSVD_NCTF_29

C35

RSVD_NCTF_30

B35

RSVD_NCTF_31

AJ13

RSVD32

AJ12

RSVD33

AH25

RSVD34

AK26

RSVD35

AL26

RSVD36

AR2

RSVD_NCTF_37

AJ26

RSVD38

AJ27

RSVD39

AP1

RSVD_NCTF_40

IC,AUB_CFD_rPGA,R1P0

RSVD_NCTF_41 RSVD_NCTF_42 RSVD_NCTF_43

RSVD45 RSVD46 RSVD47 RSVD48 RSVD49 RSVD50

RSVD51 RSVD52

RSVD53 RSVD_NCTF_54 RSVD_NCTF_55 RSVD_NCTF_56 RSVD_NCTF_57

RSVD58

RSVD_TP_59 RSVD_TP_60

KEY RSVD62 RSVD63 RSVD64 RSVD65

RSVD_TP_66 RSVD_TP_67 RSVD_TP_68 RSVD_TP_69 RSVD_TP_70

RSVD_TP_71 RSVD_TP_72 RSVD_TP_73

RESERVED

RSVD_TP_74 RSVD_TP_75 RSVD_TP_76 RSVD_TP_77 RSVD_TP_78 RSVD_TP_79 RSVD_TP_80

RSVD_TP_81 RSVD_TP_82 RSVD_TP_83 RSVD_TP_84 RSVD_TP_85

VSS

AT2 AT3 AR1 AL28 AL29 AP30 AP32 AL27 AT31

AT32 AP33 AR33 AT33 AT34 AP35 AR35 AR32 E15 F15

A2 D15 C15

RSVD64_R

AJ15

RSVD65_R

AH15 AA5 AA4 R8 AD3 AD2

AA2 AA1 R9 AG7 AE3 V4 V5 N2 AD5 AD7

W3 W2 N3 AE5 AD9

AP34

For Discrete only

CFG0 CFG3 CFG4 CFG7

R121 *0_4R121 *0_4 R125 *0_4R125 *0_4

R136 3.01K/F_4R136 3.01K/F_4 R134 *3.01K/F_4R134 *3.01K/F_4 R133 *3.01K/F_4R133 *3.01K/F_4 R135 *3.01K/F_4R135 *3.01K/F_4

T1T1 T2T2

DDR_VREF_DQ0 DDR_VREF_DQ1

R59 *0_4R59 *0_4 R63 *0_4R63 *0_4

CFG0

CFG3 CFG4

CFG7

TP_RSVD17_R TP_RSVD18_R

D D

The Clarkfield processor's PCI Express interface may not meet PCI Express 2.0 jitter specifications. Intel recommends placing a 3.01K +/- 5% pull down resistor to VSS on CFG[7] pin for both rPGA and BGA components. This pull down resistor should be removed when this issue is fixed.

CFG4 (Display Port Presence)

CFG0 (PCI-Epress Configuration Select)

CFG3 (PCI-Epress Static Lane Reversal)

http://hobi-elektronika.net

Disabled; No Physical Display Port attached to Embedded Diplay Port

Single PEG

Normal Operation

Enabled; An external Display port device is connected to the Embedded Display port

Bifurcation enabled

Lane Numbers Reversed 15 -> 0 , 14 -> 1

CFG[ 1:0 ] - PCI_Epress Configuration Select * 11= 1 x 16 PEG * 10= 2 x 8 PEG

352-(&75

4XDQWD&RPSXWHU,QF

Size Document Number Rev

Size Document Number Rev Custom

Custom

Custom Date: Sheet

Date: Sheet

PROCESSER 4/4 (GND)

639Sunday, September 19, 2010

INTVRMEN - Integrated SUS 1.1V VRM Enable High - Enable Internal VRs

C663 18P/50V_4C663 18P/50V_4

A A

B B

+3V

C C

32.768KHZY432.768KHZ

C665 18P/50V_4C665 18P/50V_4

R445 330K_6R445 330K_6

+RTC_CELL

ACZ_SPKR<10,25>

ACZ_SDIN0<25>

GPIO33_E<10,29>

TP12TP12 TP10TP10 TP9TP9 TP8TP8 TP1TP1

must add test point.

1205 The SATALED# signal is open-collector and requires a weak external pull-up (8.2 k to 10 k ) to +V3.3.

R411 10K_4R411 10K_4 R223 10K_4R223 10K_4 R410 10K_4R410 10K_4

R251 *10K_4R251 *10K_4

4 1

R249 *0_4R249 *0_4

TP13TP13

R444

R444 10M_4

10M_4

PCH_GPIO33_R

PCH_JTAG_TCK PCH_JTAG_TMS PCH_JTAG_TDI PCH_JTAG_TDO PCH_JTAG_RST#

SATA_LED#

SATA_DET0# SATA_DET1#

GPIO33_E

UMA HDMI signals

DPB_CTRL_CLK DPB_CTRL_DATA DPB_LANE0_N DPB_LANE0_P DPB_LANE1_N DPB_LANE1_P DPB_LANE2_N DPB_LANE2_P DPB_LANE3_N DPB_LANE3_P

R459 0_4R459 0_4 R458 0_4R458 0_4 C474 0.1U/10V_4C474 0.1U/10V_4 C478 0.1U/10V_4C478 0.1U/10V_4 C471 0.1U/10V_4C471 0.1U/10V_4 C472 0.1U/10V_4C472 0.1U/10V_4 C480 0.1U/10V_4C480 0.1U/10V_4 C482 0.1U/10V_4C482 0.1U/10V_4 C465 0.1U/10V_4C465 0.1U/10V_4 C467 0.1U/10V_4C467 0.1U/10V_4

IBEX PEAK-M (HDA,JTAG,SATA)

U24A

RTC_X1

RTC_X2

RTC_RST# SRTC_RST# SM_INTRUDER# PCH_INVRMEN

ACZ_BCLK ACZ_SYNC

ACZ_RST#

ACZ_SDOUT

SPI_CLK_R SPI_CS0#_R SPI_CS1#

SPI_SI_R SPI_SO

SDVO_CLK <21> SDVO_DATA <21> IN_D2# <21> IN_D2 <21> IN_D1# <21> IN_D1 <21> IN_D0# <21> IN_D0 <21> IN_CLK# <21> IN_CLK <21>

B13

RTCX1

D13

RTCX2

C14

RTCRST#

D17

SRTCRST#

A16

INTRUDER#

A14

INTVRMEN

A30

HDA_BCLK

D29

HDA_SYNC

SPKR

C30

HDA_RST#

G30

HDA_SDIN0

F30

HDA_SDIN1

E32

HDA_SDIN2

F32

HDA_SDIN3

B29

HDA_SDO

H32

HDA_DOCK_EN# / GPIO33

J30

HDA_DOCK_RST# / GPIO13

JTAG_TCK

JTAG_TMS

JTAG_TDI

JTAG_TDO

TRST#

BA2

SPI_CLK

AV3

SPI_CS0#

AY3

SPI_CS1#

AY1

SPI_MOSI

AV1

SPI_MISO

IbexPeak-M_Rev 1_0

IHDA

JTAG

SPI

DPB_HPD_Q

R287

R287 100K_4

100K_4

Ibex-M

Ibex-M 1 OF 10

1 OF 10

RTC

(+3V)

(+3V_S5)

(+3V)

(+3V_S5)

R433 51_4R 433 51_4

+3V

R286 0_4R286 0_4

LPC

FWH0 / LAD0 FWH1 / LAD1 FWH2 / LAD2 FWH3 / LAD3

FWH4 / LFRAME# LDRQ1# / GPIO23

SATA0RXN SATA0RXP

SATA1RXN SATA1RXP

SATA2RXN SATA2RXP

SATA3RXN SATA3RXP

SATA

SATA4RXN SATA4RXP

SATA5RXN SATA5RXP

SATAICOMPO

SATAICOMPI

SATA0GP / GPIO21 SATA1GP / GPIO19

PCH_JTAG_TCK

Q18

Q18 *2N7002K

*2N7002K

LDRQ0#

SERIRQ

SATA0TXN SATA0TXP

SATA1TXN SATA1TXP

SATA2TXN SATA2TXP

SATA3TXN SATA3TXP

SATA4TXN SATA4TXP

SATA5TXN SATA5TXP

SATALED#

HDMI_HPD_CON <21>

D33 B33 C32 A32 C34 A34 F34 AB9

AK7 AK6 AK11 AK9

AH6 AH5 AH9 AH8

AF11 AF9 AF7 AF6

AH3 AH1 AF3 AF1

AD9 AD8 AD6 AD5

AD3 AD1 AB3 AB1

AF16 AF15 T3

Y9 V1

R230 10K_4R230 10K_4

SATA_COMP

SATA_LED#

SATA_DET0# SATA_DET1#

LAD0 <29,30> LAD1 <29,30> LAD2 <29,30> LAD3 <29,30> LFRAME# <29,30>

SATA_RXN0 <23> SATA_RXP0 <23> SATA_TXN0 <23> SATA_TXP0 <23>

SATA_RXN4 <23> SATA_RXP4 <23> SATA_TXN4 <23> SATA_TXP4 <23>

R237 37.4/F_4R237 37.4/F_4

SATA_LED# <28>

R409 *0_4R409 *0_4

For ES1 ONLY.NI for ES2.

+3V SERIRQ <29>

HDD

ODD

+1.05V

ODD_PRSNT# <23>

For ES1 ONLY.NI for ES2.

UMA CRT,LVDS&HDMI signals

LVDS_BLON<20>

DISP_ON<20> DPST_PWM<20> EDIDCLK<20>

EDIDDATA<20>

R266 10K_4R266 10K_4 R269 10K_4R269 10K_4

+3V

R259 2.37K/F_4R259 2.37K/F_4

TP7TP7

HDD0 (SATA3 6.0Gb/s)

TXLCLKOUT-<20>

TXLCLKOUT+<20>

TXLOUT0-<20> TXLOUT1-<20> TXLOUT2-<20>

TXLOUT0+<20> TXLOUT1+<20> TXLOUT2+<20>

TXUCLKOUT-<20>

TXUCLKOUT+<20>

TXUOUT0-<20> TXUOUT1-<20> TXUOUT2-<20> TXUOUT0+<20> TXUOUT1+<20> TXUOUT2+<20>

CRT_B<22> CRT_G<22> CRT_R<22>

DDCCLK<22>

DDCDATA<22>

HSYNC_COM<22>

100_4

R415

200_4

R414

+3VS5

200_4

100_4

R413

R412

VSYNC_COM<22>

R192

R416

20K/F_4

200_4

R197

R436

10K_4

100_4

Part Part Number

R272 1K/F_4R272 1K/F_4

PCH_JTAG_RST# PCH_JTAG_TDO PCH_JTAG_TDI PCH_JTAG_TMS

L_CTRL_CLK L_CTRL_DATA

LVDS_IBG LVDS_VBG

R455 150/F_4R455 150/F_4 R457 150/F_4R457 150/F_4 R456 150/F_4R456 150/F_4

DAC_IREF

IBEX PEAK-M (LVDS,DDI)

U24D

T48 T47

Y48

AB48

Y45

AB46

V48

AP39 AP41

AT43 AT42

AV53 AV51

BB47 BA52 AY48 AV47

BB48 BA50 AY49 AV48

AP48 AP47

AY53 AT49 AU52 AT53

AY51 AT48 AU50 AT51

AA52 AB53 AD53

V51 V53

Y53 Y51

AD48 AB51

IbexPeak-M_Rev1_0

L_BKLTEN L_VDD_EN

L_BKLTCTL L_DDC_CLK

L_DDC_DATA L_CTRL_CLK

L_CTRL_DATA LVD_IBG

LVD_VBG LVD_VREFH

LVD_VREFL

LVDS--A

LVDSA_CLK# LVDSA_CLK

LVDSA_DATA#0 LVDSA_DATA#1 LVDSA_DATA#2 LVDSA_DATA#3

LVDSA_DATA0 LVDSA_DATA1 LVDSA_DATA2 LVDSA_DATA3

LVDS--B

LVDSB_CLK# LVDSB_CLK

LVDSB_DATA#0 LVDSB_DATA#1 LVDSB_DATA#2 LVDSB_DATA#3

LVDSB_DATA0 LVDSB_DATA1 LVDSB_DATA2 LVDSB_DATA3

CRT_BLUE CRT_GREEN CRT_RED

CRT_DDC_CLK CRT_DDC_DATA

CRT_HSYNC CRT_VSYNC

DAC_IREF CRT_IRTN

Ibex-M

SDVO_TVCLKINN

4 OF 10

SDVO_TVCLKINP

SDVO_STALLN

SDVO_STALLP

SDVO

Digital Display Interface

CRT

SDVO_INTN SDVO_INTP

SDVO_CTRLCLK

SDVO_CTRLDATA

DDPB_AUXN DDPB_AUXP

DDPB_HPD

DDPB_0N DDPB_0P DDPB_1N DDPB_1P DDPB_2N DDPB_2P DDPB_3N DDPB_3P

DISPLAY PORT BDISPLAY PORT CDISPLAY PORT D

DDPC_CTRLCLK

DDPC_CTRLDATA

DDPC_AUXN DDPC_AUXP

DDPC_HPD

DDPC_0N DDPC_0P DDPC_1N DDPC_1P DDPC_2N DDPC_2P DDPC_3N DDPC_3P

DDPD_CTRLCLK

DDPD_CTRLDATA

DDPD_AUXN DDPD_AUXP

DDPD_HPD

DDPD_0N DDPD_0P DDPD_1N DDPD_1P DDPD_2N DDPD_2P DDPD_3N DDPD_3P

BJ46 BG46

BJ48 BG48

BF45 BH45

DPB_CTRL_CLK

T51

DPB_CTRL_DATA

T53 BG44

BJ44 AU38

BD42 BC42 BJ42 BG42 BB40 BA40 AW38 BA38

Y49 AB49

BE44 BD44 AV40

BE40 BD40 BF41 BH41 BD38 BC38 BB36 BA36

U50 U52

BC46 BD46 AT38

BJ40 BG40 BJ38 BG38 BF37 BH37 BE36 BD36

DPB_HPD_Q DPB_LANE0_N

DPB_LANE0_P DPB_LANE1_N DPB_LANE1_P DPB_LANE2_N DPB_LANE2_P DPB_LANE3_N DPB_LANE3_P

TP16TP16 TP15TP15

Part Description

For AUDIO

D D

ACZ_RST#_AUDIO<25>

ACZ_SDOUT_AUD IO<25>

ACZ_SYNC_AUDIO<25>

BIT_CLK_AUDIO<25>

For MDC

R452 33_4R452 33_4 R450 33_4R450 33_4 C666 *10P/50V_4C666 *10P/50V_4

R451 33_4R451 33_4 C667 *10P/50V_4C667 *10P/50V_4

R453 33_4R453 33_4 C464 *10P/50V_4C464 *10P/50V_4

ACZ_RST# ACZ_SDOUT

ACZ_SYNC

ACZ_BCLK

RTC

+3VPCU

+3VRTC_2 RTC_RST#

R254 1K_4R254 1K_4

1mA

+RTC_CELL

C438 1U/6.3V_4C438 1U/6.3V_4

CR1RB500V-40 CR1RB500V-40

R242 20K/F_4R242 20K/F_4

CR2RB500V-40 CR2RB500V-40

R241 20K/F_4R241 20K/F_4

R243 1M_4R243 1M_4

+3VRTC_1

8/25 SI for M/E.

C428 1U/6.3V_4C428 1U/6.3V_4

C429 1U/6.3V_4C429 1U/6.3V_4

CN24

1 2

BAT_CONN

DFWF02MS032

50273-0027N-001-2P-L

SRTC_RST#

SM_INTRUDER#

4M byte SPI ROM

U22

SPI_HOLD#

7 4

VDD

HOLD# VSS

W25Q32BVSSIG

AKE391P0N00

IC FLASH(8P) W25Q32BVSSIG(SOIC)

+3V

R422 10K_4R422 10K_4 C659 0.1U/10V_4C659 0.1U/10V_4

http://hobi-elektronika.net

WP#

Vender

Socket

DG008000031 EON - EN25F32-100HIP AKE39FN0Q00

IC FLASH(8P) EN25F32-100HIP (SOIC) WINBOND - W25Q32BVSSIG AKE391P0N00

IC FLASH(8P) W25Q32BVSSIG(SOIC)

352-(&75

4XDQWD&RPSXWHU,QF

Size Document Number Rev

Size Document Number Rev Custom

Custom

Custom Date: Sheet

Date: Sheet

PCH 1/5 (SATA,HDA,LPC)

739Sunday, September 19, 2010

SPI_WP#

+1.05V<2,8,9,11,39>

+3VPCU<20,28,29,31,37>

SPI_CS0#_R SPI_CLK_R SPI_SI_R SPI_SO

R440 10K_4R440 10K_4

+3V<2,3,8,9,10,11,12,13,14,17,20,21,22,23,24,25,27,28,29,30,33,34,36>

+3V

CE#

SCK

IBEX PEAK-M (GND)

U24I

AY7

VSS[159]

B11

VSS[160]

B15

VSS[161]

B19

VSS[162]

B23

VSS[163]

B31

VSS[164]

B35

VSS[165]

D D

C C

B B

A A

B39 B43 B47

B7 BG12 BB12 BB16 BB20 BB24 BB30 BB34 BB38 BB42 BB49

BB5 BC10 BC14 BC18

BC2 BC22 BC32 BC36 BC40 BC44 BC52

BH9 BD48 BD49

BD5 BE12 BE16 BE20 BE24 BE30 BE34 BE38 BE42 BE46 BE48 BE50

BE6

BE8

BF3

BF49

BF51 BG18 BG24

BG4 BG50 BH11 BH15 BH19 BH23 BH31 BH35 BH39 BH43 BH47

BH7

C12

C50

D51

E12

E16

E20

E24

E30

E34

E38

E42

E46

E48

E6 E8

F49

F5 G10 G14 G18

G2 G22 G32 G36 G40 G44 G52

AF39

H16 H20 H30 H34 H38 H42

IbexPeak-M_Rev1_0

VSS[166] VSS[167] VSS[168] VSS[169] VSS[170] VSS[171] VSS[172] VSS[173] VSS[174] VSS[175] VSS[176] VSS[177] VSS[178] VSS[179] VSS[180] VSS[181] VSS[182] VSS[183] VSS[184] VSS[185] VSS[186] VSS[187] VSS[188] VSS[189] VSS[190] VSS[191] VSS[192] VSS[193] VSS[194] VSS[195] VSS[196] VSS[197] VSS[198] VSS[199] VSS[200] VSS[201] VSS[202] VSS[203] VSS[204] VSS[205] VSS[206] VSS[207] VSS[208] VSS[209] VSS[210] VSS[211] VSS[212] VSS[213] VSS[214] VSS[215] VSS[216] VSS[217] VSS[218] VSS[219] VSS[220] VSS[221] VSS[222] VSS[223] VSS[224] VSS[225] VSS[226] VSS[227] VSS[228] VSS[229] VSS[230] VSS[231] VSS[232] VSS[233] VSS[234] VSS[235] VSS[236] VSS[237] VSS[238] VSS[239] VSS[240] VSS[241] VSS[242] VSS[243] VSS[244] VSS[245] VSS[246] VSS[247] VSS[248] VSS[249] VSS[250] VSS[251] VSS[252] VSS[253] VSS[254] VSS[255] VSS[256] VSS[257] VSS[258]

VSS[259] VSS[260] VSS[261] VSS[262] VSS[263] VSS[264] VSS[265] VSS[266] VSS[267] VSS[268] VSS[269] VSS[270] VSS[271] VSS[272] VSS[273] VSS[274] VSS[275] VSS[276] VSS[277] VSS[278] VSS[279] VSS[280] VSS[281] VSS[282] VSS[283] VSS[284] VSS[285] VSS[286] VSS[287] VSS[288] VSS[289] VSS[290] VSS[291] VSS[292] VSS[293] VSS[294] VSS[295] VSS[296] VSS[297] VSS[298] VSS[299] VSS[300] VSS[301] VSS[302] VSS[303] VSS[304] VSS[305] VSS[306] VSS[307] VSS[308] VSS[309] VSS[310] VSS[311] VSS[312] VSS[313] VSS[314] VSS[315] VSS[316] VSS[317] VSS[318] VSS[319] VSS[320] VSS[321] VSS[322] VSS[323] VSS[324] VSS[325] VSS[326] VSS[327] VSS[328] VSS[329] VSS[330] VSS[331] VSS[332] VSS[333] VSS[334] VSS[335] VSS[336] VSS[337] VSS[338] VSS[339] VSS[340] VSS[341] VSS[342] VSS[343] VSS[344] VSS[345] VSS[346] VSS[347] VSS[348] VSS[349] VSS[350] VSS[351] VSS[352] VSS[353] VSS[354] VSS[355] VSS[356] VSS[366]

H49 H5 J24 K11 K43 K47 K7 L14 L18 L2 L22 L32 L36 L40 L52 M12 M16 M20 N38 M34 M38 M42 M46 M49 M5 M8 N24 P11 AD15 P22 P30 P32 P34 P42 P45 P47 R2 R52 T12 T41 T46 T49 T5 T8 U30 U31 U32 U34 P38 V11 P16 V19 V20 V22 V30 V31 V32 V34 V35 V38 V43 V45 V46 V47 V49 V5 V7 V8 W2 W52 Y11 Y12 Y15 Y19 Y23 Y28 Y30 Y31 Y32 Y38 Y43 Y46 P49 Y5 Y6 Y8 P24 T43 AD51 AT8 AD47 Y47 AT12 AM6 AT13 AM5 AK45 AK39 AV14

PEG Clock detect (SG only)

DGPU_PWROK_1 <35>

PEG_CLKREQ#

PCIE_CLKREQ_WLAN# CLK_PCIE_REQ2#

PCIE_CLK_REQ0# PCIE_CLKREQ_LAN# PCIE_CLK_REQ4# PCIE_CLK_REQB#_R

PCIE_CLK_REQ5#

PEG_CLKREQ#

SMB_CLK_ME1

SMB_DATA_ME1

PDAT_SMB

PCLK_SMB

Q35

5/7: modify

*2N7002E

R429 10K_4R429 10K_4 R198 10K_4R198 10K_4

R231 10K_4R231 10K_4 R215 10K_4R215 10K_4 R193 10K_4R193 10K_4 R240 10K_4R240 10K_4

R217 10K_4R217 10K_4 R417 *10K_4R417 *10K_4

R418 10K_4R418 10K_4

Ra: UMA Rb: Muxless

Q36 2N7002EQ36 2N7002E

+3V

Q37

+3V

2N7002E

Q12 2N7002EQ12 2N7002E

Q13 2N7002EQ13 2N7002E

+3V

+3VS5

MBCLK2 <13,29>

R446

2.2K_4

R448

2.2K_4

MBDATA2 <13,29>

CGDAT_SMB <2,12,13>

R191

R191 10K_4

10K_4

R190

R190 10K_4

10K_4

CGCLK_SMB <2,12,13>

Cardreader

MiniWLAN

[WLAN]

[LAN]

LAN

PCIE_RXN1<30> PCIE_RXP1<30> PCIE_TXN1<30>

PCIE_TXP1<30>

PCIE_RXN2_LAN<27> PCIE_RXP2_LAN<27> PCIE_TXN2_LAN<27>

PCIE_TXP2_LAN<27>

PCIE_RXN3_CARD<24> PCIE_RXP3_CARD<24>

PCIE_TXN3_CARD<24> PCIE_TXP3_CARD<24>

CLK_PCIE_WLANN<30> CLK_PCIE_WLANP<30>

PCIE_CLKREQ_WLAN#<30>

CLK_PCIE_CARDN<24> CLK_PCIE_CARDP<24>

CLK_PCIE_REQ2#<24>

CLK_PCIE_LANN<27> CLK_PCIE_LANP<27>

PCIE_CLKREQ_LAN#<27>

http://hobi-elektronika.net

C450 0.1U/10V_4C450 0.1U/10V_4 C449 0.1U/10V_4C449 0.1U/10V_4

C458 0.1U/10V_4C458 0.1U/10V_4 C459 0.1U/10V_4C459 0.1U/10V_4

C460 0.1U/10V_4C460 0.1U/10V_4 C461 0.1U/10V_4C461 0.1U/10V_4

PLT_RST-R#<9>

PCIE_RXN1

PCIE_RXP1 PCIE_TXN1_C PCIE_TXP1_C

PCIE_RXN2_LAN PCIE_RXP2_LAN

PCIE_TXN2_C PCIE_TXP2_C

PCIE_TXN3_CARD_C PCIE_TXP3_CARD_C

PCIE_CLK_REQ0#

PCIE_CLK_REQ4#

PCIE_CLK_REQ5#

PCIE_CLK_REQB#_R

*MC74VHC1G08DFT2G

PLT_RST-R#

R439

100K_4

IBEX PEAK-M (PCI-E,SMBUS,CLK)

U24B

Ibex-M

BG30

PERN1

BJ30

PERP1

BF29

PETN1

BH29

PETP1

AW30

PERN2

BA30

PERP2

BC30

PETN2

BD30

PETP2

AU30

PERN3

AT30

PERP3

AU32

PETN3

AV32

PETP3

BA32

PERN4

BB32

PERP4

BD32

PETN4

BE32

PETP4

BF33

PERN5

BH33

PERP5

BG32

PETN5

BJ32

PETP5

BA34

PERN6

AW34

PERP6

BC34

PETN6

BD34

PETP6

AT34

PERN7

AU34

PERP7

AU36

PETN7

AV36

PETP7

BG34

PERN8

BJ34

PERP8

BG36

PETN8

BJ36

PETP8

AK48

CLKOUT_PCIE0N

AK47

CLKOUT_PCIE0P

PCIECLKRQ0# / GPIO73

AM43

CLKOUT_PCIE1N

AM45

CLKOUT_PCIE1P

PCIECLKRQ1# / GPIO18

AM47

CLKOUT_PCIE2N

AM48

CLKOUT_PCIE2P

PCIECLKRQ2# / GPIO20

AH42

CLKOUT_PCIE3N

AH41

CLKOUT_PCIE3P

PCIECLKRQ3# / GPIO25

AM51

CLKOUT_PCIE4N

AM53

CLKOUT_PCIE4P

PCIECLKRQ4# / GPIO26

AJ50

CLKOUT_PCIE5N

AJ52

CLKOUT_PCIE5P

PCIECLKRQ5# / GPIO44

AK53

CLKOUT_PEG_B_N

AK51

CLKOUT_PEG_B_P

P13

PEG_B_CLKRQ# / G PIO56

IbexPeak-M_Rev1_0

+3VS5

U21

2 1

3 5

R423 0_4R423 0_4

PCI-E*

C658

C658 *0.1U/10V_4

*0.1U/10V_4

Ibex-M 2 OF 10

2 OF 10

R421

R421 *100K_4

*100K_4

SMBus

(+3V_S5)

(+3V_S5) (+3V_S5)

(+3V_S5)

Controller

Controller Link

Link

PEG

PEG_A_CLKRQ# / G PIO47

(+3V_S5)

CLKOUT_DP_N / CLKOUT_BCLK1_N

CLKOUT_DP_P / CLKOUT_BCLK1_P

(+3V_S5)

(+3V)

CLKIN_SATA_N / CKSSCD_N

(+3V)

(+3V_S5)

PLTRST# <3,14,24,27,29,30>

CLKIN_SATA_P / CKSSCD_P

From CLK BUFFER

(+3V)

(+3V) (+3V)

(+3V)

Clock Flex

+1.05V<2,7,9,11,39>

+3V<2,3,7,9,10,11,12,13,14,17,20,21,22,23,24,25,27,28,29,30,33,34,36>

SMBALERT# / GPIO11

SMBCLK

SMBDATA

SML0ALERT# / GPIO60

SML0CLK

SML0DATA

SML1ALERT# / GPIO74

SML1CLK / GPIO58

SML1DATA / GPIO75

CL_CLK1 CL_DATA1 CL_RST1#

CLKOUT_PEG_A_N CLKOUT_PEG_A_P

CLKOUT_DMI_N CLKOUT_DMI_P

CLKIN_DMI_N

CLKIN_DMI_P

CLKIN_BCLK_N CLKIN_BCLK_P

CLKIN_DOT_96N CLKIN_DOT_96P

REFCLK14IN

CLKIN_PCILOOPBACK

XTAL25_IN

XTAL25_OUT

XCLK_RCOMP

CLKOUTFLEX0 / GPIO64 CLKOUTFLEX1 / GPIO65 CLKOUTFLEX2 / GPIO66 CLKOUTFLEX3 / GPIO67

UMA only

XTAL25_IN

XTAL25_OUT

SMBALERT#

PCLK_SMB

H14

PDAT_SMB

SMBL0ALERT#

J14

SMB_CLK_ME0

SMB_DATA_ME0

SML1ALERT#

M14

SMB_CLK_ME1

E10

SMB_DATA_ME1

G12

T13 T11 T9

PEG_CLKREQ#

H1 AD43 AD45 AN4 AN2

AT1 AT3

AW24 BA24

AP3 AP1

F18 E18

AH13 AH12

P41

CLK_PCI_FB

J42

XTAL25_IN

AH51

XTAL25_OUT

AH53

XCLK_RCOMP

AF38

CLK_FLEX0

T45

CLK_FLEX1

P43

CLK_FLEX2

T42

CLK_FLEX3CLK_FLEX3

N50

R454

R454 1M_4

1M_4

352-(&75

4XDQWD&RPSXWHU,QF

Size Document Number Rev

Size Document Number Rev Custom

Custom

Custom Date: Sheet

Date: Sheet

PCH 2/5 (PCIE, SMBUS, CK)

CLK_PCIE_VGA# <14>

CLK_PCIE_VGA <14> CLK_PCIE_3GPLL# <3> CLK_PCIE_3GPLL <3>

DREFSSCLK# <3> DREFSSCLK <3>

CLK_BUF_PCIE_3GPLL# <2> CLK_BUF_PCIE_3GPLL <2>

CLK_BUF_BCLK_N <2> CLK_BUF_BCLK_P <2>

CLK_BUF_DREFCLK# <2> CLK_BUF_DREFCLK <2>

CLK_BUF_DREFSSCLK# <2> CLK_BUF_DREFSSCLK <2>

C473 *5.6P/50V_4C473 *5.6P/50V_4

CLK_PCI_FB <9>

R262 90.9/F_4R262 90.9/F_4

T36T36 T35T35 T34T34 T37T37

Y5 25MHZY525MHZ

+3VS5

R44210K_4 R44210K_4 R1892.2K_4 R1892.2K_4 R2082.2K_4 R2082.2K_4 R23810K_4 R23810K_4 R2292.2K_4 R2292.2K_4 R2122.2K_4 R2122.2K_4 R23910K_4 R23910K_4 R2164.7K_4 R2164.7K_4 R2274.7K_4 R2274.7K_4

CLK_ICH_14M <2>

DIS only

+1.05V

C668 27P/50V_4C668 27P/50V_4

8/25 SI for TXC.

C669 33P/50V_4C669 33P/50V_4

839Sunday, September 19, 2010

IBEX PEAK-M (DMI,FDI,GPIO)

U24C

BC24

BJ22

AW20

BJ20

BD24 BG22

BA20

BG20

BE22 BF21

BD20

BE18

BD22 BH21 BC20 BD18

BH25

DMI_COMP

BF25

PCH_PWROK

CLKRUN# XDP_DBRESET#

RSMRST# RSV_ICH_LAN_RST# PCH_PWROK

BT_COMBO_EN#

B17

A10 C16

F14

BJ10

J12

DMI0RXN DMI1RXN DMI2RXN DMI3RXN

DMI0RXP DMI1RXP DMI2RXP DMI3RXP

DMI0TXN DMI1TXN DMI2TXN DMI3TXN

DMI0TXP DMI1TXP DMI2TXP DMI3TXP

DMI_ZCOMP DMI_IRCOMP

SYS_RESET# SYS_PWROK PWROK MEPWROK

LAN_RST# DRAMPWROK RSMRST#

PWRBTN#

RI# WAKE# PMSYNCH

IbexPeak-M_Rev1_0

R425 8.2K_4R425 8.2K_4

R236 10K_4R236 10K_4 R443 10K_4R443 10K_4 R447 10K_4R447 10K_4

R260 *1K_4R260 *1K_4

DMI FDI

System Power Management

PCH_SUSCLK_L

AC_PRESENT_R

+1.05V

R200 0_4R200 0_4 R199 *0_4R199 *0_4

RSMRST#<29>

DNBSWON#<29>

PCIE_WAKE#<27,30>

PM_SYNC<3>

DMI_RXN0<3> DMI_RXN1<3> DMI_RXN2<3> DMI_RXN3<3>

DMI_RXP0<3> DMI_RXP1<3> DMI_RXP2<3> DMI_RXP3<3>

DMI_TXN0<3> DMI_TXN1<3> DMI_TXN2<3> DMI_TXN3<3>

DMI_TXP0<3> DMI_TXP1<3> DMI_TXP2<3> DMI_TXP3<3>

R247 49.9/F_4R247 49.9/F_4

RSV_ICH_LAN_RST#

R194 *0_4/SR194 *0_4/S

PM_RI#

A A

+3V

PCI_STOP# PCI_IRDY# PCI_PIRQA# PCI_PIRQC#

+3VS5

USB_OC4# USB_OC5# USB_OC6# USB_OC3# USB_OC7#

+3V

PCI_DEVSEL# PCI_TRDY# PCI_PIRQB#

B B

INTH#

C C

RP5

5 4 3 2 1

10P8R-8.2K

RP2

5 4 3 2 1

10P8R-8.2K

RP6

5 4 3 2 1

10P8R-8.2K

PCI_PIRQD#

REQ1#

PCI_SERR#

PCI_FRAME#

9 10

USB_OC0#

USB_OC1#

USB_OC2#

8 9 10

PCI_PLOCK#

PCI_PERR#REQ3#

REQ0#

8 9 10

GNT0#<10> GNT1#<10>

BT_COMBO_EN#<30>

GNT3#<10>

8/25 SI for H/W.

PCI_SERR#<29>

TP2TP2

PLT_RST-R#<8>

CLK_33M_DEBUG<30>

CLK_33M_KBC<29>

CLK_PCI_FB<8>

D D

R460 33_4R460 33_4 R462 33_4R462 33_4

R274 22_4R274 22_4

IBEX PEAK-M (PCI,USB,NVRAM)

U24E

+3V

+3VS5

+3V

PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD#

REQ0# REQ1# REQ2# REQ3#

PIRQE# PIRQF# PIRQG# INTH#

PCI_SERR# PCI_PERR#

PCI_IRDY# PCI_DEVSEL#

PCI_FRAME# PCI_PLOCK# PCI_STOP#

PCI_TRDY#

PME#

PLT_RST-R#

CLK_33M_DEBUG_R CLK_33M_KBC_R

CLK_PCI_FB_C

H40 N34 C44 A38 C36

J34 A40 D45 E36 H48 E40 C40 M48 M45

F53 M40 M43

J36 K48

F40 C42 K46 M51

J52 K51

L34

F42

J40 G46

F44 M47 H36

J50 G42 H47 G34

G38 H51 B37 A44

F51 A46 B45 M53

F48 K45

F36 H53

B41 K53 A36 A48

E44 E50

A42 H44

F46 C46

D49 D41

C48

M7 D5

N52 P53 P46 P51 P48

IbexPeak-M_Rev1_0

AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31

C/BE0# C/BE1# C/BE2# C/BE3#

PIRQA# PIRQB# PIRQC# PIRQD#

REQ0# REQ1# / GPIO50 REQ2# / GPIO52 REQ3# / GPIO54

GNT0# GNT1# / GPIO51 GNT2# / GPIO53 GNT3# / GPIO55

PIRQE# / GPIO2 PIRQF# / GPIO3 PIRQG# / GPIO4 PIRQH# / GPIO5

PCIRST# SERR#

PERR#

IRDY# PAR DEVSEL# FRAME#

PLOCK# STOP#

TRDY# PME# PLTRST# CLKOUT_PCI0

CLKOUT_PCI1 CLKOUT_PCI2 CLKOUT_PCI3 CLKOUT_PCI4

Ibex-M

Ibex-M 5 OF 10

5 OF 10

PCI

(+5V)

(+5V) (+5V)

(+5V)

(+3V)

(+3V) (+3V)

(+3V)

(+5V)

(+5V) (+5V)

(+5V)

NVRAM

NV_DQ0 / NV_IO0 NV_DQ1 / NV_IO1 NV_DQ2 / NV_IO2 NV_DQ3 / NV_IO3 NV_DQ4 / NV_IO4 NV_DQ5 / NV_IO5 NV_DQ6 / NV_IO6 NV_DQ7 / NV_IO7 NV_DQ8 / NV_IO8

NV_DQ9 / NV_IO9 NV_DQ10 / NV_IO10 NV_DQ11 / NV_IO11 NV_DQ12 / NV_IO12 NV_DQ13 / NV_IO13 NV_DQ14 / NV_IO14 NV_DQ15 / NV_IO15

USB

(+3V_S5)

(+3V_S5) (+3V_S5)

(+3V_S5)

(+3V_S5) (+3V_S5)

(+3V_S5)

(+3V_S5) (+3V_S5)

(+3V_S5)

NV_RCOMP

NV_WR#0_RE# NV_WR#1_RE#

NV_WE#_CK0 NV_WE#_CK1

USBRBIAS#

OC0# / GPIO59 OC1# / GPIO40 OC2# / GPIO41 OC3# / GPIO42 OC4# / GPIO43

OC5# / GPIO9 OC6# / GPIO10 OC7# / GPIO14

NV_CE#0 NV_CE#1 NV_CE#2 NV_CE#3

NV_DQS0 NV_DQS1

NV_ALE NV_CLE

NV_RB#

USBP0N

USBP0P

USBP1N

USBP1P

USBP2N

USBP2P

USBP3N

USBP3P

USBP4N

USBP4P

USBP5N

USBP5P

USBP6N

USBP6P

USBP7N

USBP7P

USBP8N

USBP8P

USBP9N

USBP9P

USBP10N

USBP10P

USBP11N

USBP11P

USBP12N

USBP12P

USBP13N

USBP13P

USBRBIAS

AY9 BD1 AP15 BD8

AV9 BG8

AP7 AP6 AT6 AT9 BB1 AV6 BB3 BA4 BE4 BB6 BD6 BB7 BC8 BJ8 BJ6 BG6

BD3 AY6

AU2 AV7 AY8

AY5 AV11

BF5

H18 J18 A18 C18 N20 P20 J20 L20 F20 G20 A20 C20 M22 N22 B21 D21 H22 J22 E22 F22 A22 C22 G24 H24 L24 M24 A24 C24

B25 D25

N16 J16 F16 L16 E14 G16 F12 T15

USB_BIAS

USB_OC0# USB_OC1# USB_OC2# USB_OC3# USB_OC4# USB_OC5# USB_OC6# USB_OC7#

USBP0- <26> USBP0+ <26> USBP1- <26> USBP1+ <26>

USBP4- <20> USBP4+ <20>

USBP8- <26> USBP8+ <26>

USBP10- <30> USBP10+ <30>

USBP2- <26> USBP2+ <26>

R449 22.6/F_4R449 22.6/F_4

>&d^/h^ηϬ >&d^/h^ηϭ

tĞďĐĂŵ

SI Modify

ydh^ηϯ

Change Port2 to Port4 Change Port4 to Port12 change Port5 to Port13

t>E

Z ůƵĞƚŽŽƚŚ

XDP_DBRESET#<3>

IMVP_PWRGD<33>

EC_PWROK<17,29>

PM_DRAM_PWRGD<3>

(+3V_S5)

(+3V_S5) (+3V_S5)

(+3V_S5)

(+3V_S5) (+3V_S5)

(+3V_S5)

+3V

Ibex-M

Ibex-M 3 OF 10

3 OF 10

R438 0_4R438 0_4

R201 *0_4R201 *0_4

FDI_FSYNC0 FDI_FSYNC1 FDI_LSYNC0 FDI_LSYNC1

SUS_PWR_DN_ACK / GPIO30

ACPRESENT / GPIO31

CLKRUN# / GPIO32

(+3V)

SUS_STAT# / GPIO61

SUSCLK / GPIO62

SLP_S5# / GPIO63

BATLOW# / GPIO72

SLP_LAN# / GPIO29

REQ2# PIRQE# PIRQF# PIRQG#

PM_RI# PM_BATLOW# PCIE_WAKE#

SUS_PWR_ACK AC_PRESENT_R

BA18

FDI_RXN0

BH17

FDI_RXN1

BD16

FDI_RXN2

BJ16

FDI_RXN3

BA16

FDI_RXN4

BE14

FDI_RXN5

BA14

FDI_RXN6

BC12

FDI_RXN7

BB18

FDI_RXP0

BF17

FDI_RXP1

BC16

FDI_RXP2

BG16

FDI_RXP3

AW16

FDI_RXP4

BD14

FDI_RXP5

BB14

FDI_RXP6

BD12

FDI_RXP7

BJ14

FDI_INT

BF13 BH13 BJ12 BG14

P12

SLP_S3#

SLP_S4#

SLP_M#

TP23

M1 P7 Y1 P8 F3 E4 A6

PCH_SUSCLK <29>

R268 8.2K_4R268 8.2K_4 R267 8.2K_4R267 8.2K_4 R461 8.2K_4R461 8.2K_4 R257 8.2K_4R257 8.2K_4R220 1K_4R220 1K_4

R233 10K_4R233 10K_4 R441 10K_4R441 10K_4 R211 1K_4R211 1K_4

R209 10K_4R209 10K_4 R210 10K_4R210 10K_4

AC_PRESENT <29>

SLP_M#

AC_PRESENT_R

PCH_SUSCLK_L SLP_S5# PM_BATLOW#

TP4TP4

+3V

+3VS5

FDI_TXN0 <3> FDI_TXN1 <3> FDI_TXN2 <3> FDI_TXN3 <3> FDI_TXN4 <3> FDI_TXN5 <3> FDI_TXN6 <3> FDI_TXN7 <3>

FDI_TXP0 <3> FDI_TXP1 <3> FDI_TXP2 <3> FDI_TXP3 <3> FDI_TXP4 <3> FDI_TXP5 <3> FDI_TXP6 <3> FDI_TXP7 <3>

FDI_INT <3> FDI_FSYNC0 <3> FDI_FSYNC1 <3> FDI_LSYNC0 <3> FDI_LSYNC1 <3>

SUSB# <29> SUSC# <29>

SUS_PWR_ACK <29 CLKRUN# <29>

SLP_S5 <29>

CLK_33M_KBC

C673

C673 *5.6P/50V_4

*5.6P/50V_4

http://hobi-elektronika.net

+1.05V<2,7,8,11,39>

+3V<2,3,7,8,10,11,12,13,14,17,20,21,22,23,24,25,27,28,29,30,33,34,36>

+3VS5<3,7,8,10,11,26,31,32,34,35,36,38>

352-(&75

4XDQWD&RPSXWHU,QF

Size Document Number Rev

Size Document Number Rev Custom

Custom

Custom Date: Sheet

Date: Sheet

PCH 3/5 (PCI,ONFI,USB,DMI)

939Sunday, September 19, 2010

SIO_EXT_SMI#<29> SIO_EXT_SCI#<29>

BT_OFF#<26,30>

TP3TP3

A A

DGPU_PWROK

,17,29,34,35>

GPIO27 left NC for internal VR.

DGPU_PWR_EN<35>

GPIO49<24>

DGPU_HOLD_RST#<14>

RF_OFF#<30>

R264 0_4R264 0_4

UMA remove

TP6TP6

R420 0_4R420 0_4

UMA remove

LCD_BK<20>

PCIE_CLK_REQ7#<3>

PCIE_CLK_REQ7#

R434 *0_4R434 *0_4

R258 0_4R258 0_4

UMA remove

8/25 SI for H/ W.

B B

+3VS5

R235 10K_4R235 10K_4

C C

80$

31R12MB0000 (PIM) 31R12MB0010 (PDT)00

6H\PRXU;7 +\QL[

31R12MB0020 (PIM) 31R12MB0030 (PDT)

6DPVXQJ

31R12MB0040 (PIM) 31R12MB0050 (PDT)

+\QL[*

31R12MB0060 (PIM) 31R12MB0070 (PDT)

6DPVXQJ*

31R12MB0080 (PIM) 31R12MB0090 (PDT)

TP_PCH_GPIO28

000000000

000

1 1

000

1 1

IBEX PEAK-M (GPIO,VSS_NCTF,RSVD)

U24F

BMBUSY#

PCH_GPIO8 LAN_DISABLE_R#

PCH_GPIO17

BIOS_REC

GPIO27

TP_PCH_GPIO28

SATA2GP SATA3GP LCD_BK

SV_SET_UP SATA5GP

PCH_GPIO35

BOARD_ID0 BOARD_ID1 BOARD_ID2 BOARD_ID3 BOARD_ID4 BOARD_ID5

U24F

BMBUSY# / GPIO0

C38

TACH1 / GPIO1

D37

TACH2 / GPIO6

J32

TACH3 / GPIO7

F10

GPIO8

(+3V_S5)

LAN_PHY_PWR_CTRL / GPIO12

GPIO15

(+3V_S5)

F38

TACH0 / GPIO17

SCLOCK / GPIO22

AB12

GPIO27

(+3V_S5)

V13

GPIO28

(+3V_S5)

AB7

SATA2GP / GPIO36

AB13

SATA3GP / GPIO37

SDATAOUT0 / GPIO39

PCIECLKRQ7# / GPIO46

AB6

SDATAOUT1 / GPIO48

AA4

SATA5GP / GPIO49

SATACLKREQ# / GPIO35

H10

GPIO24

PCIECLKRQ6# / GPIO45

GPIO57

M11

STP_PCI# / GPIO34

AA2

SATA4GP / GPIO16

SLOAD / GPIO38

VSS_NCTF_1

A49

VSS_NCTF_2

VSS_NCTF_3

A50

VSS_NCTF_4

A52

VSS_NCTF_5

A53

VSS_NCTF_6

VSS_NCTF_7

VSS_NCTF_8

B52

VSS_NCTF_9

B53

VSS_NCTF_10

BE1

VSS_NCTF_11

BE53

VSS_NCTF_12

BF1

VSS_NCTF_13

BF53

VSS_NCTF_14

BH1

VSS_NCTF_15

IbexPeak-M_Rev1_0

(+3V)

,',',','50%31 ,','

000

00000000

Ibex-M

Ibex-M 6 OF 10

6 OF 10

GPIO

MISC

(+3V_S5)

CLKOUT_BCLK0_N/CLKOUT_PCIE8N CLKOUT_BCLK0_P/CLKOUT_PCIE8P

CPU

(+3V_S5)

(+3V)

(+3V_S5)

(+3V_S5) (+3V_S5)

(+3V_S5) (+3V)

(+3V) (+3V)

(+3V)

NCTF

RSVD

%RDUG,'

80$',6

5HVHUYH

CLKOUT_PCIE6N CLKOUT_PCIE6P

CLKOUT_PCIE7N CLKOUT_PCIE7P

A20GATE

RCIN#

PROCPWRGD

THRMTRIP#

INIT3_3V#

VSS_NCTF_16 VSS_NCTF_17 VSS_NCTF_18 VSS_NCTF_19 VSS_NCTF_20 VSS_NCTF_21 VSS_NCTF_22 VSS_NCTF_23 VSS_NCTF_24 VSS_NCTF_25 VSS_NCTF_26 VSS_NCTF_27 VSS_NCTF_28 VSS_NCTF_29 VSS_NCTF_30 VSS_NCTF_31

R222 10K_4R222 10K_4

BIOS RECOVERY HIGH : DISABLE LOW : ENABLE

 80$  'LV

5HVHUYH

000

5HVHUYH

0000 0

PECI

TP1 TP2 TP3 TP4 TP5 TP6 TP7 TP8

TP9 TP10 TP11 TP12 TP13 TP14 TP15 TP16 TP17 TP18 TP19

NC_1 NC_2 NC_3 NC_4 NC_5

TP24

 1R  <HV

AH45 AH46

AF48 AF47

AM3 AM1

PCH_PECI_R

BG10 T1 BE10

PCH_THRMTRIP#_R

BD10 BA22

AW22 BB22 AY45 AY46 AV43 AV45 AF13 M18 N18 AJ24 AK41 AK42 M32 N32 M30 N30 H12 AA23 AB45 AB38 AB42 AB41 T39 P6 C10

BH2 BH52 BH53 BJ1 BJ2 BJ4 BJ49 BJ5 BJ50 BJ52 BJ53 D1 D2 D53 E1 E53

R232 56.2/F_4R232 56.2/F_4

+1.05V_VTT

R228 56.2/F_4R228 56.2/F_4

EC_RCIN# EC_A20GATE

SATA2GP PCH_GPIO35

SATA3GP SATA5GP BMBUSY# SIO_EXT_SMI# SIO_EXT_SCI# BT_OFF# LCD_BK

PCH_GPIO17

+3V +3VS5

RF_OFF#BIOS_REC

LAN_DISABLE_R#

 1R  <HV

,','

EC_A20GATE <29>

CLK_CPU_BCLK# <3> CLK_CPU_BCLK <3>

EC_RCIN# <29> H_PWRGOOD <3> PM_THRMTRIP# <3,29>

8/25 SI for H/ W.

R203 10K_4R203 10K_4 R426 10K_4R426 10K_4

R224 *10K_4R224 *10K_4 R205 10K_4R205 10K_4

R234 10K_4R234 10K_4 R435 10K_4R435 10K_4 R427 10K_4R427 10K_4 R261 10K_4R261 10K_4 R263 10K_4R263 10K_4 R255 10K_4R255 10K_4 R432 10K_4R432 10K_4

R265 10K_4R265 10K_4

R221 1K_4R221 1K_4

R196 10K_4R196 10K_4

,',',','

*3,2*3,2 *3,2 *3,2*3,2*3,2

 1R  <HV

H_PECI <3>

+3V

IBEX PEAK-M (GND)

+3V

+3VS5

58 5'

58

58

58

58

58

BOARD_ID0

BOARD_ID1

BOARD_ID2

BOARD_ID3

BOARD_ID4

BOARD_ID5

R207 10K_4R207 10K_4

R419 *10K_4R419 *10K_4

R202 *10K_4R202 *10K_4

R424 *10K_4R424 *10K_4

R428 *10K_4R428 *10K_4

8/25 SI for H/ W.

AB16 AA19 AA20 AA22

AM19

AA24 AA26 AA28 AA30 AA31 AA32 AB11 AB15 AB23 AB30 AB31 AB32 AB39 AB43 AB47

AC52 AD11 AD12 AD16 AD23 AD30 AD31 AD32 AD34 AU22 AD42 AD46 AD49

AF12

AH49

AF35 AP13 AN34 AF45 AF46 AF49

AG52 AH11 AH15 AH16 AH24 AH32 AV18 AH43 AH47

AJ19 AJ20

AJ22 AJ23 AJ26 AJ28 AJ32 AJ34

AK12 AM41 AN19

AK26

AK22

AK23

AK28

AB5 AB8 AC2

AD7 AE2 AE4

Y13

AU4

AF5 AF8 AG2

AH7

AJ2

AT5

AJ4

U24H

VSS[0] VSS[1] VSS[2] VSS[3] VSS[4] VSS[5] VSS[6] VSS[7] VSS[8] VSS[9] VSS[10] VSS[11] VSS[12] VSS[13] VSS[14] VSS[15] VSS[16] VSS[17] VSS[18] VSS[19] VSS[20]

VSS[100]

VSS[21]

VSS[101]

VSS[22]

VSS[102]

VSS[23]

VSS[103]

VSS[24]

VSS[104]

VSS[25]

VSS[105]

VSS[26]

VSS[106]

VSS[27]

VSS[107]

VSS[28]

VSS[108]

VSS[29]

VSS[109]

VSS[30]

VSS[110]

VSS[31]

VSS[111] VSS[112]

VSS[32] VSS[33]

VSS[113]

VSS[34]

VSS[114]

VSS[35]

VSS[115]

VSS[36]

VSS[116]

VSS[37]

VSS[117]

VSS[38]

VSS[118]

VSS[39]

VSS[119] VSS[120]

VSS[40]

VSS[121]

VSS[41]

VSS[122]

VSS[42] VSS[43]

VSS[123]

VSS[44]

VSS[124] VSS[125]

VSS[45] VSS[46]

VSS[126]

VSS[47]

VSS[127]

VSS[48]

VSS[128]

VSS[49]

VSS[129]

VSS[50]

VSS[130]

VSS[51]

VSS[131]

VSS[52]

VSS[132]

VSS[53]

VSS[133]

VSS[54]

VSS[134]

VSS[55]

VSS[135]

VSS[56]

VSS[136]

VSS[57]

VSS[137] VSS[138]

VSS[58] VSS[59]

VSS[139]

VSS[60]

VSS[140]

VSS[61]

VSS[141]

VSS[62]

VSS[142]

VSS[63]

VSS[143]

VSS[64]

VSS[144]

VSS[65]

VSS[145]

VSS[66]

VSS[146]

VSS[67]

VSS[147]

VSS[68]

VSS[148]

VSS[69]

VSS[149]

VSS[70]

VSS[150]

VSS[71]

VSS[151]

VSS[72]

VSS[152]

VSS[73]

VSS[153] VSS[154]

VSS[74]

VSS[155]

VSS[75] VSS[76]

VSS[156]

VSS[77]

VSS[157]

VSS[78]

VSS[158]

VSS[79]

IbexPeak-M_Rev1_0

R206 *10K_4R206 *10K_4

5'

R437 10K_4R437 10K_4

5'

R213 10K_4R213 10K_4R214 *10K_4R214 *10K_4

5'

R218 10K_4R218 10K_4

5'

R204 10K_4R204 10K_4

5'

R431 10K_4R431 10K_4

VSS[80] VSS[81] VSS[82] VSS[83] VSS[84] VSS[85] VSS[86] VSS[87] VSS[88] VSS[89] VSS[90] VSS[91] VSS[92] VSS[93] VSS[94] VSS[95] VSS[96] VSS[97] VSS[98] VSS[99]

AK30 AK31 AK32 AK34 AK35 AK38 AK43 AK46 AK49 AK5 AK8 AL2 AL52 AM11 BB44 AD24 AM20 AM22 AM24 AM26 AM28 BA42 AM30 AM31 AM32 AM34 AM35 AM38 AM39 AM42 AU20 AM46 AV22 AM49 AM7 AA50 BB10 AN32 AN50 AN52 AP12 AP42 AP46 AP49 AP5 AP8 AR2 AR52 AT11 BA12 AH48 AT32 AT36 AT41 AT47 AT7 AV12 AV16 AV20 AV24 AV30 AV34 AV38 AV42 AV46 AV49 AV5 AV8 AW14 AW18 AW2 BF9 AW32 AW36 AW40 AW52 AY11 AY43 AY47

GNT3#<9>

A16 swap override Strap/Top-Block Swap Override jumper

GNT3#

SV_SET_UP 1-X High = Strong (Default)

GNT0#<9> GNT1#<9>

Boot BIOS Strap

PCI_GNT0# GNT#1

Danbury Technology Enabled

NV_ALE

DMI Termination Voltage

NV_CLE

No Reboot Strap

ACZ_SPKR<7,25>

GPIO33_E<7,29>

R464 *10K_4R464 *10K_4

Low = A16 swap override/Top-Block Swap Override enabled High = Default

SV_SET_UP

R219 10K_4R219 10K_4

GNT0# GNT1#

High = Enable

Low = Disable

Set to Vcc when LOW

Set to Vcc/2 when HIGH

R253 *100K_4R253 *100K_4

R271 *1K_4R271 *1K_4 R463 *1K_4R463 *1K_4

Boot BIOS Location

LPC

Reserved (NAND)

PCI

SPI

R430*1K_4 R430*1K_4

+1.05V_VTT<3,5,11,29,32,33,38>

+1.8V<5,11,32>

+3V<2,3,7,8,9,11,12,13,14,17,20,21,22,23,24,25,27,28,29,30,33,34,36>

+3VS5<3,7,8,9,11,26,31,32,34,35,36,38>

+3V

D D

352-(&75

4XDQWD&RPSXWHU,QF

Size Document Number Rev

Size Document Number Rev Custom

Custom

http://hobi-elektronika.net

Custom

PCH 4/5 (GPIO & Strap)

Date: Sheet

10 39Sunday, September 19, 2010

1.524A

+1.05V

A A

B B

C C

D D

C463 1U/6.3V_4C463 1U/6.3V_4 C453 10U/6.3VS_6C453 10U/6.3VS_6 C670 0.01U/25V_4C670 0.01U/25V_4

3.208A

+1.05V

+V1.1LAN_VCCAPLL_EXP

TP14TP14

3.208A

+1.05V

C451 10U/6.3VS_6C451 10U/6.3VS_6 C448 1U/6.3V_4C448 1U/6.3V_4 C441 1U/6.3V_4C441 1U/6.3V_4 C437 1U/6.3V_4C437 1U/6.3V_4 C426 1U/6.3V_4C426 1U/6.3V_4 C425 0.1U/10V_4C425 0.1U/10V_4 C446 0.1U/10V_4C446 0.1U/10V_4 C443 0.1U/10V_4C443 0.1U/10V_4

0.357A

+3V

0.035A

+1.8V

+V1.1LAN_VCCAPLL_FDI

TP5TP5

3.208A

+1.05V

U24G

AB24 AB26 AB28 AD26 AD28

AF26 AF28 AF30

AF31 AH26 AH28 AH30 AH31

AJ30

AJ31

AK24

BJ24 AN20

AN22 AN23 AN24 AN26 AN28

BJ26

BJ28

AT26

AT28 AU26 AU28 AV26 AV28

AW26 AW28

BA26 BA28 BB26 BB28 BC26 BC28 BD26 BD28 BE26 BE28 BG26 BG28 BH27 AN30 AN31

AN35

AT22

BJ18

AM23

IbexPeak-M_Rev1_0

VCCCORE[1] VCCCORE[2] VCCCORE[3] VCCCORE[4] VCCCORE[5] VCCCORE[6] VCCCORE[7] VCCCORE[8] VCCCORE[9] VCCCORE[10] VCCCORE[11] VCCCORE[12] VCCCORE[13] VCCCORE[14] VCCCORE[15]

VCC CORE

VCCIO[24] VCCAPLLEXP VCCIO[25]

VCCIO[26] VCCIO[27] VCCIO[28] VCCIO[29] VCCIO[30] VCCIO[31] VCCIO[32] VCCIO[33] VCCIO[34] VCCIO[35] VCCIO[36] VCCIO[37] VCCIO[38] VCCIO[39] VCCIO[40] VCCIO[41] VCCIO[42] VCCIO[43] VCCIO[44] VCCIO[45] VCCIO[46] VCCIO[47] VCCIO[48] VCCIO[49] VCCIO[50] VCCIO[51] VCCIO[52] VCCIO[53] VCCIO[54] VCCIO[55]

VCC3_3[1]

VCCVRM[1] VCCFDIPLL VCCIO[1]

8/25 SI modify Uninstall on UMA Install on DIS

POWER

Ibex-M

7 OF 10

PCI E*

FDI

UMA Only, If have power noise issue then stuff it.

+5V +3V_LDO

VCCADAC[1] VCCADAC[2]

CRT

VSSA_DAC[1] VSSA_DAC[2]

VCCALVDS

VSSA_LVDS

LVDS

VCCTX_LVDS[1] VCCTX_LVDS[2] VCCTX_LVDS[3] VCCTX_LVDS[4]

VCC3_3[2] VCC3_3[3]

HVCMOS

VCC3_3[4]

VCCVRM[2]

VCCDMI[1]

DMI

VCCDMI[2]

VCCPNAND[1] VCCPNAND[2] VCCPNAND[3] VCCPNAND[4] VCCPNAND[5] VCCPNAND[6] VCCPNAND[7] VCCPNAND[8] VCCPNAND[9]

NAND / SPI

VCCME3_3[1] VCCME3_3[2] VCCME3_3[3] VCCME3_3[4]

U26

G910T21U

Vin3Vout

C692

C692 1U/6.3V_4

1U/6.3V_4

GND

R466 *0_6R466 *0_6

C683 10U/6.3V_8C683 10U/6.3V_8

AE50

C671 0.1U/10V_4C671 0.1U/10V_4

AE52 AF53 AF51

AH38

AH39 AP43

C412 10U/6.3V_8C412 10U/6.3V_8

AP45

C477 0.1U/10V_4C477 0.1U/10V_4

AT46

C479 0.01U/25V_4C479 0.01U/25V_4

AT45

0.357A

AB34 AB35

C475 0.1U/10V_4C475 0.1U/10V_4

AD35

0.035A

AT24

0.061A

AT16 AU16

C430 1U/6.3V_4C430 1U/6.3V_4

AM16 AK16 AK20

0.156A

AK19 AK15 AK13

C422 0.1U/10V_4C422 0.1U/10V_4

AM12 AM13

C420 0.1U/10V_4C420 0.1U/10V_4

AM15

AM8

0.085A

AM9 AP11 AP9

C417 0.1U/10V_4C417 0.1U/10V_4

8/25 SI modify Install LDO when UMA

+3V +3V_LDO

+3V

Rc Rd

+1.8V

+3V

+1.8V +1.05V_VTT

+1.8V

EMI request

+3V

0 ohm Rb Rc

0 ohm Rd

+1.05V

3.208A

+1.05V

PV modify

DIS UMA

0 ohm

0.073A

L40 0_6L40 0_6

L41 0_6L41 0_6

R245 *0_4/SR245 *0_4/S

R252 *0_4/SR252 *0_4/S

TP17TP17

C431 0.1U/10V_4C431 0.1U/10V_4

+1.05V

SI EMI request

+1.8V

C419 0.1U/10V_4C419 0.1U/10V_4

C427 0.1U/10V_4C427 0.1U/10V_4

+3VS5

+3V

+1.05V_VTT

+RTC_CELL

+3VS5 +1.05V

VCCACLK

DCPSUSBYP

C470 22U/6.3VS_8C470 22U/6.3VS_8 C432 22U/6.3VS_8C432 22U/6.3VS_8 C466 1U/6.3V_4C466 1U/6.3V_4 C469 1U/6.3V_4C469 1U/6.3V_4 C440 1U/6.3V_4C440 1U/6.3V_4 C435 *0.1U/25V_4C435 *0.1U/25V_4

+VCCRTCEXT

C415 0.1U/10V_4C415 0.1U/10V_4

0.072A

+VCCADPLLA

C487 1U/6.3V_4C487 1U/6.3V_4

+VCCADPLLB

C486 1U/6.3V_4C486 1U/6.3V_4

+1.05V_HDMI1

C433 1U/6.3V_4C433 1U/6.3V_4 C434 1U/6.3V_4C434 1U/6.3V_4

+1.05V_HDMI2

C457 1U/6.3V_4C457 1U/6.3V_4

+VCCSST

+V1.1LAN_INT_VCCSUS

0.163A

C442 0.1U/10V_4C442 0.1U/10V_4

0.357A

C424 0.1U/10V_4C424 0.1U/10V_4

>1mA

C416 4.7U/6.3V_6C416 4.7U/6.3V_6 C418 0.1U/10V_4C418 0.1U/10V_4 C423 0.1U/10V_4C423 0.1U/10V_4

2mA

C661 0.1U/10V_4C661 0.1U/10V_4 C662 0.1U/10V_4C662 0.1U/10V_4

6mA

C444 1U/6.3V_4C444 1U/6.3V_4

U24J

AP51

VCCACLK[1]

AP53

VCCACLK[2]

Y20

DCPSUSBYP

AF23

VCCLAN[1]

AF24

VCCLAN[2]

AD38

VCCME[1]

AD39

VCCME[2]

AD41

VCCME[3]

AF43

VCCME[4]

AF41

VCCME[5]

AF42

VCCME[6]

V39

VCCME[7]

V41

VCCME[8]

V42

VCCME[9]

Y39

VCCME[10]

Y41

VCCME[11]

Y42

VCCME[12]

DCPRTC

AU24

VCCVRM[3]

BB51

VCCADPLLA[1]

BB53

VCCADPLLA[2]

BD51

VCCADPLLB[1]

BD53

VCCADPLLB[2]

AH23

VCCIO[21]

AJ35

VCCIO[22]

AH35

VCCIO[23]

AF34

VCCIO[2]

AH34

VCCIO[3]

AF32

VCCIO[4]

V12

DCPSST

Y22

DCPSUS

PCI/GPIO/LPC

P18

VCCSUS3_3[29]

U19

VCCSUS3_3[30]

U20

VCCSUS3_3[31]

U22

VCCSUS3_3[32]

V15

VCC3_3[5]

V16

VCC3_3[6]

Y16

VCC3_3[7]

AT18

V_CPU_IO[1]

AU18

V_CPU_IO[2]

A12

VCCRTC

L30

VCCSUSHDA

IbexPeak-M_Rev1_0

POWER

Ibex-M

10 OF 10

USB

VCCSUS3_3[1] VCCSUS3_3[2] VCCSUS3_3[3] VCCSUS3_3[4] VCCSUS3_3[5] VCCSUS3_3[6] VCCSUS3_3[7] VCCSUS3_3[8]

VCCSUS3_3[9] VCCSUS3_3[10] VCCSUS3_3[11] VCCSUS3_3[12] VCCSUS3_3[13] VCCSUS3_3[14] VCCSUS3_3[15] VCCSUS3_3[16] VCCSUS3_3[17] VCCSUS3_3[18] VCCSUS3_3[19] VCCSUS3_3[20] VCCSUS3_3[21] VCCSUS3_3[22] VCCSUS3_3[23] VCCSUS3_3[24] VCCSUS3_3[25] VCCSUS3_3[26] VCCSUS3_3[27]

VCCSUS3_3[28]

V5REF_SUS

Clock and Miscellaneous

PCI/GPIO/LPC

VCC3_3[10] VCC3_3[11] VCC3_3[12] VCC3_3[13] VCC3_3[14]

VCCSATAPLL[1] VCCSATAPLL[2]

VCCVRM[4]

SATA

CPU

RTC

VCCME[13]

HDA

VCCME[14] VCCME[15] VCCME[16]

VCCIO[5] VCCIO[6] VCCIO[7] VCCIO[8]

VCCIO[56]

V5REF

VCC3_3[8] VCC3_3[9]

VCCIO[9] VCCIO[10] VCCIO[11] VCCIO[12]

VCCIO[13] VCCIO[14]

VCCIO[15] VCCIO[16] VCCIO[17] VCCIO[18] VCCIO[19] VCCIO[20]

V24 V26 Y24 Y26

V28 U28 U26 U24 P28 P26 N28 N26 M28 M26 L28 L26 J28 J26 H28 H26 G28 G26 F28 F26 E28 E26 C28 C26 B27 A28 A26

U23 V23 F24

R273 100_4R273 100_4

K49

J38 L38 M36 N36 P36 U35 AD13

AK3 AK1

AT20 AH22

AH19 AD20 AF22 AD19 AF20 AF19 AH20 AB19 AB20 AB22 AD22

AA34 Y34 Y35 AA35

3.208A

C452 1U/6.3V_4C452 1U/6.3V_4

0.163A

C439 0.1U/10V_4C439 0.1U/10V_4 C454 0.1U/10V_4C454 0.1U/10V_4 C445 *0.033U/10V_4C445 *0.033U/10V_4

3.208A

>1mA

R244 100_4R244 100_4 D4 RB500V-40D4 RB500V-40 C447 1U/6.3V_4C447 1U/6.3V_4

+V5REF_SUS

D5 RB500V-40D5 RB500V-40 C484 1U/6.3V_4C484 1U/6.3V_4

C462 0.1U/10V_4C462 0.1U/10V_4 C468 0.1U/10V_4C468 0.1U/10V_4

3.208A

+V1.1LAN_VCCAPLL

0.035A

C421 1U/6.3V_4C421 1U/6.3V_4

1.998A

+1.05V

+3VS5

+1.05V +5VS5 +3VS5

>1mA

+5V +3V

+V5REF

+3V

TP11TP11

+1.8V +1.05V

0.357A

+1.05V<2,7,8,9,39>

+1.05V_VTT<3,5,10,29,32,33,38>

+1.8V<5,32>

+3V<2,3,7,8,9,10,12,13,14,17,20,21,22,23,24,25,27,28,29,30,33,34,36>

+3VS5<3,7,8,9,10,26,31,32,34,35,36,38>

+5V<17,21,22,23,25,28,30,36>

http://hobi-elektronika.net

+5VS5<20,26,31,32,33,34,35,36,38,39>

352-(&75

4XDQWD&RPSXWHU,QF

Size Document Number Rev

Size Document Number Rev Custom

Custom

Custom Date: Sheet

Date: Sheet

PCH 5/5 (POWER)

11 39Sunday, September 19, 2010

JDIM1A

A A

SO-DIMMA SPD Address is 0XA0 SO-DIMMA TS Address is 0X30

B B

C C

Place these Caps near So-Dimm0.

Some Projects replace 10UF 0805 by 4.7UF 0603 It can cost down 30%

+1.5VSUS

C210 10U/6.3VS_6C210 10U/6.3VS_6 C185 10U/6.3VS_6C185 10U/6.3VS_6 C166 10U/6.3VS_6C166 10U/6.3VS_6 C221 10U/6.3VS_6C221 10U/6.3VS_6 C34 C254 10U/6.3VS_6C254 10U/6.3VS_6 C232 10U/6.3VS_6C232 10U/6.3VS_6 C156 0.1U/10V_4C156 0.1U/10V_4 C197 0.1U/10V_4C197 0.1U/10V_4 C172 0.1U/10V_4C172 0.1U/10V_4 C192 0.1U/10V_4C192 0.1U/10V_4

C267 0.1U/10V_4C267 0.1U/10V_4 C152 *0.047U/10V_4C152 *0.047U/10V_4 C244 *0.047U/10V_4C244 *0.047U/10V_4

D D

+3V

C352 2.2U/6.3V_6C352 2.2U/6.3V_6 C368 *0.1U/10V_4C368 *0.1U/10V_4

C358 *0.047U/10V_4C358 *0.047U/10V_4

M_A_A[15:0]<4>

M_A_BS#0<4> M_A_BS#1<4> M_A_BS#2<4> M_A_CS#0<4> M_A_CS#1<4> M_A_CLK0<4>

M_A_CLK0#<4>

M_A_CLK1<4>

M_A_CLK1#<4>

M_A_CKE0<4> M_A_CKE1<4> M_A_CAS#<4> M_A_RAS#<4>

M_A_WE#<4>

R375 10K_4R375 10K_4 R380 10K_4R380 10K_4

CGCLK_SMB<2,8,13> CGDAT_SMB<2,8,13>

M_A_ODT0<4> M_A_ODT1<4>

M_A_DM[7:0]<4>

M_A_DQS[7:0]<4>

M_A_DQS#[7:0]<4>

+0.75V_DDR_VTT

12 12

SMDDR_VREF_DQ0

SMDDR_VREF_DIMM

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15

DIMM0_SA0 DIMM0_SA1

M_A_DM0 M_A_DM1 M_A_DM2 M_A_DM3 M_A_DM4 M_A_DM5 M_A_DM6 M_A_DM7

M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7 M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7

C365 1U/6.3V_4C365 1U/6.3V_4 C381 1U/6.3V_4C381 1U/6.3V_4 C380 1U/6.3V_4C380 1U/6.3V_4 C366 1U/6.3V_4C366 1U/6.3V_4 C360 *10U/6.3V_8C360 *10U/6.3V_8 C387 *10U/6.3V_8C387 *10U/6.3V_8 C370 10U/6.3VS_6C370 10U/6.3VS_6

C367 *0.047U/10V_4C367 *0.047U/10V_4

1 2

C382 *0.047U/10V_4C382 *0.047U/10V_4

1 2

C33 0.1U/10V_4C33 0.1U/10V_4 C29 2.2U/6.3V_6C29 2.2U/6.3V_6

C308 0.1U/10V_4C308 0.1U/10V_4 C334 2.2U/6.3V_6C334 2.2U/6.3V_6

C324 *0.047U/10V_4C324 *0.047U/10V_4

1 2

98 97 96 95 92 91 90 86 89 85

107

84 83

119

80 78

109 108

79 114 121 101 103 102 104

74 115 110 113 197 201 202 200

116 120

63 136 153 170 187

64 137 154 171 188

62 135 152 169 186

JDIM1A

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 A14 A15

BA0 BA1 BA2 S0# S1# CK0 CK0# CK1 CK1# CKE0 CKE1 CAS# RAS# WE# SA0 SA1 SCL SDA

ODT0 ODT1

DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7

PC2100 DDR3 SDRAM SO-DIMM

DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS#0 DQS#1 DQS#2 DQS#3 DQS#4 DQS#5 DQS#6 DQS#7

DDR3-DIMM0

DQ0

DQ1

DQ2

DQ3

DQ4

DQ5

DQ6

DQ7

DQ8

DQ9

DQ10

DQ11

DQ12

DQ13

DQ14

DQ15

DQ16

DQ17

DQ18

DQ19

DQ20

DQ21

DQ22

DQ23

DQ24

DQ25

DQ26

DQ27

DQ28

DQ29

DQ30

DQ31

129

DQ32

131

DQ33

141

DQ34

143

DQ35

130

DQ36

132

DQ37

140

DQ38

142

DQ39

147

DQ40

149

DQ41

157

DQ42

159

DQ43

146

DQ44

148

DQ45

158

DQ46

160

DQ47

(204P)

163

DQ48

165

DQ49

175

DQ50

177

DQ51

164

DQ52

166

DQ53

174

DQ54

176

DQ55

181

DQ56

183

DQ57

191

DQ58

193

DQ59

180

DQ60

182

DQ61

192

DQ62

194

DQ63

0511 add for WiMAX

C173 *6.8P/50V_4C173 *6.8P/50V_4

C253 *6.8P/50V_4C253 *6.8P/50V_4

+1.5VSUS

M_A_DQ[63:0] <4>

for S3 power reduction

DDR3_DRAMRST#<3,13>

C222 *100P/50V_4C222 *100P/50V_4

C234 *100P/50V_4C234 *100P/50V_4

http://hobi-elektronika.net

+1.5VSUS

PM_EXTTS#0<3,13>

R35

R35 1K/F_4

1K/F_4

R40

R40 1K/F_4

1K/F_4

+3V

R48 1K_4R48 1K_4

SMDDR_VREF_DQ0

SMDDR_VREF_DIMM

SMDDR_VREF_DQ0

C34

0.1U/10V_4

+1.5VSUS

PM_EXTTS#0

1 2

75 76 81 82 87 88 93 94

99 100 105 106 111 112 117 118 123 124

199

77 122 125

198

126

2 3 8

9 13 14 19 20 25 26 31 32 37 38 43

DDR3-DIMM0

C46

C46 *0.047U/10V_4

*0.047U/10V_4

JDIM1B

VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18

VDDSPD NC1

NC2 NCTEST

EVENT# RESET#

VREF_DQ VREF_CA

VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15

(204P)

PC2100 DDR3 SDRAM SO-DIMM

VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52

VTT1 VTT2

GND

205

44 48 49 54 55 60 61 65 66 71 72 127 128 133 134 138 139 144 145 150 151 155 156 161 162 167 168 172 173 178 179 184 185 189 190 195 196

203 204

GND

206

R109 *10K/F_4R109 *10K/F_4

C379

C378

0510 add for WiMAX

*15P/50V_4

C296 470P/50V_4C296 470P/50V_4

+0.75V_DDR_VTT

SI modify

MAINON_G<5,36>

for S3 power reduction

R111 *0_4/SR111 *0_4/S

R105 *10K/F_4R105 *10K/F_4

352-(&75

4XDQWD&RPSXWHU,QF

Size Document Number Rev

Size Document Number Rev Custom

Custom

Custom Date: Sheet

Date: Sheet

DDR3 DIMM-0

+0.75V_DDR_VTT

R157

R157 22_4

22_4

Q11

Q11 2N7002E

2N7002E

SMDDR_VREF_DIMM <13>

DDR_VTTREF <35>

+1.5VSUS

+0.75V_DDR_VTT<13,35,36>

+1.5VSUS<3,5,13,34,35,36>

+3V<2,3,7,8,9,10,11,13,14,17,20,21,22,23,24,25,27,28,29,30,33,34,36>

+5VPCU<29,31,37>

12 39Sunday, September 19, 2010

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