VULCAIN
UMA
PV Build
2009.02.23
DATE CHANGE NO. REV
DRAWER
DESIGN
CHECK
RESPONSIBLE
SIZE =
FILE NAME :
P/N
XXXXXXXXXXXX
EE
3
XXXX-XXXXXX-XX
DATE
POWER
VER :
DATE
INVENTEC
TITLE
VV UMA SATA
CODE
CS
1310A22163-0-MTR
SHEET
DOC. NUMBER
SIZE
D
REV
A01
OF
50 1
TABLE OF CONTENTS
PAGE
5- DC& BATTERY CHARGER
6- SELECT & BATTERY CONN
7- SYSTEM POWER(3V/5V)
8- SYSTEM POWER(+V1.8/+V1.25S)
9- SYSTEM POWER(+VGFX/+VCCP)
10- SYSTEM POWER(+V1.5S)
11- CPU POWER(VCC_CORE)
12- DDR TERMINATION VOLTAGE
13- POWER(SLEEP)
14- POWER(SEQUENCE)
PAGE
15- CLOCK_GENERATOR
16- PENRYN-1
17- PENRYN-2
18- PENRYN-3
19- THERMAL&FAN CONTROLLER
20- Crestline-1
21- Crestline-2
22- Crestline-3
23- Crestline-4
24- Crestline-5
25- Crestline-6
26- DDR2-DIMM0
27- DDR2-DIMM1
28- DDR2-DAMPING
29- VGA CONN
30- LCM CONN
31- ICH8-1
32- ICH8-2
33- ICH8-3
34- ICH8-4
35- ICH8-5
PAGE
36- SYSTEM BIOS
37- HDD&ODD CONN
38- USB CONN
39- KBC
40- KB&TP CONN
41- AUDIO CODEC
42- MDC CONN & AUDIO JACK
43- NIC 10/100- CONTROLLER
44- NIC 10/100- RJ45 CONN
45- MINICARD & BT CONN
46- NEW CARD & SD/MMC
47- LED & BUTTON&LID SWITCH
48- SCREW HOLE
49- SWITCH Board
50- ODD Extend Board
CHANGE by
Puma_Chen
26-Dec-2008
INVENTEC
TITLE
Vulcain UMA
CODE
CS D
SHEET
DOC. NUMBER
AX1
SIZE
REV
000
OF
50 2
Clock Generator
ICS9LPRS355
P.15
LCM
VGA
P.30
P.29
SYSTEM
BIOS
LVDS
CRT
P.36
SPI
Penryn
(478 uFCPGA)
FSB
Crestline
965GM
(1299 PCBGA)
DMI
P.20
P.16
SATA0
SATA1
DDR2
DDR2
HDD
FIXED ODD
DDR II _SODIMM0
P.26
DDR II _SODIMM1
P.27
P.37
P.37
MAIN BATT
System Charger &
DC/DC System power
SD/MMC
CNTR
P.46
MDC V1.5
CONNECTOR
RJ11
USB0
CNTR
USB1
CNTR
USB2
CNTR
CARD READER
ALCOR AU6433
(USB3)
P.46
P.42
P.42
P.38
P.38
P.38
USB2.0
AUDIO CODEC
IDT_92HD75
Mic IN
Headphone
P.42
Web CAM
CNTR
(USB4)
BlueTooth
CNTR
(USB6)
P.42
ICH8-M
676 BGA
P.30
P.45
HDA
P.41
Speaker
P.41
LPC
PCI_EXPRESS
P.31
SMSC KBC1070
Keyboard
P.40
PCIE2
MINI CARD
CONN
(WLAN)
KBC
TouchPad
P.39
P.40
P.45
CHANGE by
PCIE5
New Card
CONN
(USB7)
Puma_Chen
P.46
PCIE6
NIC 10/100
MARVEL
88E8042
RJ45
12-Feb-2009
P.43
P.44
INVENTEC
TITLE
Vulcain UMA
DOC. NUMBER
CODE
SIZE
AX1
D
CS
SHEET
REV
000
OF
50 3
Adapter
+VADP2
OCP
OCP_OC#
+VBATR
KBC_PW_ON
SLP_S3#_3R
ADP_PRES
5/3.3V
(TPS51120)
+V5A
+V3A
+V5AL
+V3AL
+V5S
+V3S
ADP_PRES
BATSELB
AC_AND_CHG
CHGCTRL_3
Charger
(BQ24703)
Selector
(Discrete)
+VBDC
+VBATA
CHGCTRL_3
ADP_PRES
AC_AND_CHG
BATCON
Main Battery
PWR_GOOD_3
PM_DPRSLPVR
PSI#
H_DPRSTP#
SLP_S4#_3R
SLP_S3#_3R
V1.25S_PG
IO POWER
(TPS51124)
GPU POWER
(TPS51117)
IMVP VI
(ADP3208)
SLP_S3#_3R
+V1.8
V1.8_PG
+V1.25S
V1.25S_PG
+VCCP
+VGFX_CORE
VCCP_PG
+VCC_CORE
+VCCP
LR
(G2997)
LR
(APL5913)
VR_PWRGD_CK505
+V0.9S
M_VREF
+V1.5S
V1.5S_PG
CHANGE by
Puma_Chen 26-Dec-2008
INVENTEC
TITLE
Vulcain UMA
SIZE
CODE
DOC. NUMBER
AX1
D
CS
SHEET
REV
000
OF
50 4
DC JACK
JACK500
SINGA_2DC_G726_I03_4P
4
3.3A_150mil
1
2
3
G1
G2
0.1uF_25v
1
R16
15K_5%
2
R501
8.25K_1%
R502
14.3K_1%
2VREF
1
100K_1%
2
1 2
1
2
7-,14-
+VBDC
C5 1
R503
5-,6-
NFM60R30T222
+VADPTR
C6
2
10pF_50V
1
2
R15
12
100K_1%
L1
2
3
1
2
R505
12
270K_5%
+V5AL
3
+
OUT
2
-
12
+V5AL
5
6
C501
0.022uF_16v
+VADP
4
R500
1M_5%
+
-
5-,6-,47-
+VADP
5-,6-,47-
3.3A_150mil
1
C4 1
2
0.1uF_25v
PDS540_5A_40V
FAIR_FDMC4435BZ_8P
5-,7-
C500
12
0.1uF_16v
8
U8-A
1
ON_LM393DR2G_SOP_8P
4
6-
AC_AND_CHG
5-,7-
8
U8-B
7
OUT
ON_LM393DR2G_SOP_8P
4
CHGCTRL_3
R7
12
100K_1%
R45
12
24K_1%
1
23.7K_1%
2
U500-A
LM324A
C3
1
2
10pF_50V
D501
1
3
2
Q21
D
S
8
1
2
7
3
6
5
4
G
ADP_PRES
+V3AL
Q9028
1
S1
2
G1
6
D1
3
D2
5
G2
4
S2
2N7002DW
6-,39-
191K_1%
R14
12
1M_5%
+V5AL
5-,7-
C503
0.1uF_16v
3 4
2
1
V+
IN+
OUT
R13
IN-
V-
5
MICREL_LMC7101BIM5_SOT23_5P
4
3
+
1
OUT
2
-
11
+VADP1
R9
12
20K_5%
6-,7-,39-,43-
R504
10K_5%
6-,7-,14-,31-,39-,40-,47-
1
R19
4.7K_5%
ALARM
2
R535
1
100K_5%
2
1
R34
1
C15
0.1uF_16v
2
12
U6
5-
2
2
24703VREF
R18
1
100_5%
1
2
1
R521
0_5%
2
Kevin sense
5-
1
2
1
R32
2
1N4148
C513
0.1uF_25v
1
R508
150K_5%
2
140K_1%
D2
1
R30
10K_1%
2
R27
12
100K_1%
3
ANODE
U7
ANPEC_APL431LBAC_SOT23_3P
1
R522
0_5%
2
+VBATR
5-,7-,8-,9-,11-,13-,30-,39-,47-
R509
0.015_1%
1
1
R31
2
100_1%
2
1
1
2
C504
1uF_6.3v
2
CATHODE
1
REF
+VADP2 +VADP1
6-
0.018_1%_1W
2
C16
12
1uF_6.3V
R35
12
1.62K_1%
R536
12
1K_1%
R507
100K_5%
12
1
R539
60.4K_1%
2
C7
1
4.7uF_6.3v
2
R538
60.4K_1%
1 2
R28
221_1%
1
R26
8.87K_1%
2
R513
12
2
1
Kevin sense
9
26
5
28
19
2
3
27
13
4
7
23
C510
1
2
1
150pF_50v
2
R33
100_1%
C13
1
2
4.7uF_25v
U1
ACDRV#
ACN
ACP
ACDET
ENABLE
ACSEL
ALARM
SRSET
ACSET
ACPRES
IBAT
VREF
COMP
NC
NC
TI_BQ24703_QFN_28P
1
2
1
R537
150_1%
2
C23
4.7uF_6.3v
PWM#
BATP
BATDRV#
VHSP
BATSET
BATDEP
THERMAL
VCC
SRP
SRN
VS
GND
NC
NC
5
+
OUT
6
-
25 8
22
21
16
15
12
24
18
20
6
1
17
11 14
10
29
C511
2200pF_50V
12
4
U500-B
7
LM324A
11
Q18
1
B
R512
12
237K_1%
+VBATR
5-,7-,8-,9-,11-,13-,30-,39-,47-
C502
1uF_25v
1
2
D500
RLZ18C
1
R541
10K_5%
2
2
E
C
MMBT3906
3
1
R511
47K_5%
2
2
1
R506
1K_5%
1
2
D502
CHENMKO_BAT54_3P
1
2
10
+
9
-
1
R510
10K_5%
2
1
2
13
4.7uF_25v
C2
180pF_50v
4
U500-C
OUT
11
2
5
2N7002DW
C19
4.7uF_25v
1
R8
174K_1%
2
1
R10
20K_1%
2
1
R11
7.87K_1%
2
8
LM324A
Q7013
G1
G2
C7004
1
2
Q17
1
B
1
S1
6
D1
3
D2
4
S2
4.7uF_25v
Q12
3
D
1
G
S
2
SSM3K7002F
CHANGE by
1
R25
4.7K_5%
2
2
E
C
MMBT3906
3
FAIR_FDMC4435BZ_8P
Q20
1
2
3
C7003
4
1
1
2
R39
0_5%
2
1
C18
0402_OPEN
2
S
1
R516
133K_1%
2
1
R517
80.6K_1%
2
5-
R12
1
412K_1%
D
G
1
R17
13.7K_1%
2
1
R37
300K_0.1%
2
1
R36
24K_0.1%
2
1
R38
8.87K_1%
2
Puma_Chen
1
2
H_STPCLK
32-
2
8
7
6
5
D504
1
SBR3U40P1
12
100K_5%
4
U500-D
12
+
14
OUT
13
-
LM324A
11
C512
0.022uF_16v
1908GND
OCP_OC#
5-,11-,13-,14-,19-,29-,30-,32-,34-,37-,40-,41-
1
1
R4
215K_1%
2
1
R5
80.6K_1%
2
L2
12
PLFC1045R_10uH
Q10
3
D
G
1
S
2
SSM3K7002F
12-Feb-2009
5-,11-,13-,14-,19-,29-,30-,32-,34-,37-,40-,41-
R518
1
D506
2
3
R520
12
383K_1%
R519
12
36.5K_1%
2
D503
BAT54C_30V_0.2A
C505
1
2
1uF_16V
Place near L19
2
E
Q14
B
MMBT3906
C
3
Q7014
1
S1
2
G1
1
R6
330K_5%
2
1 2
1K_1%
0.033uF_16v
Kevin sense
D1
D2
5
G2
S2
1
2N7002DW
R2
2
1M_5%
R42
0.015_1%
12
R44
1K_1%
C17
12
6
3
4
1 2
R43
C21
1
2
4.7uF_25v
4.7uF_25v
C22
1
2
4.7uF_25v
Note:
high power trace
R9645
12
1K_5%
6CELLSEL#=0,Vcharger=12.6V
6CELLSEL#=1,Vcharger=16.8V
6-
6CELLSEL#
INVENTEC
TITLE
Vulcain UMA
DC &BATTERY CHARGER
SIZE
D
DOC. NUMBER CODE
AX1 000
CS
+V5S
1
3
BAT54S_30V_0.2A
C524
1
2
1uF_25v
1
R553
10_5%
2
7-
MAX_LX5
+V5S
1
R3
220K_5%
2
5-
H_STPCLK
+VBDC
5-,6-
C9748
C8
1
1
2
2
4.7uF_25v2
OF SHEET
50 5
REV
CHGCTRL_3
CHENKO_LL4148_2P
C514
2
5-,39-
1000pF_50v
1
1
2
0.047uF_10v
R543
12
1K_5%
D4
C515
1
R544
470K_5%
2
1
2
G
1
1
R546
470K_5%
2
2
3
D
S
2
Q3
SSM3K7002F
+V3AL
5-,6-,7-,14-,31-,39-,40-,47-
5
U5
4
74HC1G14GV
3
AC_AND_CHG
5-
+VADP
5-,47-
R1
12
3K_5%
1
R545
10K_5%
2
Q16
SSM3K7002F
2
S
RLZ18C
D
G
1
2
D1
1
+V3AL
3
+VADP2
5-
1
2
3
AM4825P_AP
5-,6-,7-,14-,31-,39-,40-,47-
1
R24
220K_5%
2
R9668
12
0_5%
+V3AL
5-,6-,7-,14-,31-,39-,40-,47-
+VBDC
5-
Q2
8
D
S
7
6
5 4
G
39-
BATCON
2
PAD3005
3
4
POWERPAD_4A
+VBATA
1
R23
10K_5%
R551
12
1K_5%
D2007
PESD5V0U1BB
2
1
2
1
2
5-
6CELLSEL#
SYN_200046MR006G100ZU_6P
C516
0.1uF_25v
1
2
D2011
D505
PESD5V0U1BB
MAIN BATT
CN500
1
1
2
2
3
3
4
4
5
5
7
6
8
6
1
2
7
8
1
1
R549
R550
10K_5%
10K_5%
2
2
1
R9624
SDA_MAIN
SCL_MAIN
THM_MAIN#
3939-
+V3AL
D3008
DIODE_BAV99
5-,6-,7-,14-,31-,39-,40-,47-
1
D3009
3
2
DIODE_BAV99
+V3AL
5-,6-,7-,14-,31-,39-,40-,47-
1
R9595
100K_5%
2
39-
1
3
2
D3010
DIODE_BAV99
R9625
12
100_5%
1
3
2
12
100_5%
C523
1
2
47pF_50v
PESD5V0U1BB
ADP_PRES
5-,7-,39-,43-
CHANGE by
Puma_Chen
23-Feb-2009
INVENTEC
TITLE
Vulcain UMA
SELECT & BATTERY CONN
SIZE
D
DOC. NUMBER REV
CODE
AX1 000
CS
OF SHEET
50 6
ADP_PRES
KBC_PW_ON
+V3A
11-,13-,14-,30-,32-,33-,34-,36-,43-,45-,47-
PAD3006
POWERPAD_2_0610
5-,6-,39-,43-
39-
4.7uF_25v12
1
2
12
1K_5%
12
1K_5%
C9751
C9750
220uF_6.3V
G1
R9858
5
G2
2N7002DW
R9802
12
6.49K_1%
+VBATP
7-
1
2
L530
CYNTEC_PCMC063_3R3
Q9029
2
R9857
1
S1
6
D1
3
D2
4
S2
C9752
4.7uF_25v
Q9030
SI7326DN
1 2
+V5AL
R9803
12
10K_1%
51125GND
8D765
765
8
D
4 1S23
SI7726DN
5-,7-
1
R9804
330K_5%
2
4G1S23
G
Q9031
C9753
0.1uF_16v
12
Q7015
S1
2
G1
D1
D2
5
G2
S2
2N7002DW
R9805
12
4.7_5%
+V3AL
5-,6-,14-,31-,39-,40-,47-
1
C9754
2
4.7uF_6.3V
1
6
3
4
0_5%_OPEN
12
R9806
R9809
59K_1%
R9807
12
0_5%
R9808
12
0_5%
25
TML
7
VO2
8
VREG3
9
DRVH2
LL2
12
6
VFB2
ENTRIP2
EN0
SKIPSEL
13
1
2
5
TONSEL
GND
14
1
2
3
4
VFB1
VREF
VREG5
VIN
15
16
C9755
2.2uF_25v
1uF_6.3v
2
1
ENTRIP1
VO1
PGOOD
VBST1 VBST2
DRVH1
DRVL1 DRVL2
VCLK
17
18
R9810
59K_1%
1
2
51125GND
2VREF
5-,14-
C9756
1
POWERPAD1x1m
2
51125GND
U7016
24
23
22
21 10
20 11
LL1
19
TI_TPS51125_QFN_24P
+V5AL
PAD3007
5-,7-
1
C9757
4.7uF_6.3V
2
32-,39-
7-
RSMRST#
5-,8-,9-,11-,13-,30-,39-,47-
PAD3008
2
3
4
POWERPAD_4A
4.7_5%
C9758
R9811
12
12
1
0.1uF_16v
+VBATR +VBATP
51125GND
5-
R9812
12
10K_1%
MAX_LX5
R9813
12
15K_1%
65
87
D
G
4S123
SI7326DN
8765
D
G
S
Q9033
SI7726DN
123
4
C9759
1
1
2
2
4.7uF_25v
Q9032
CYNTEC_PCMC063_3R3
+VBATP
C9760
4.7uF_25v
L531
1
2
1 2
7-
C9761
4.7uF_25v
1
2
C9763
220uF_6.3V
PAD3009
POWERPAD_2_0610
+V5A
8-,9-,10-,11-,12-,13-,14-,30-,34-,38-,47-
INVENTEC
TITLE
Vulcain UMA
SYSTEM POWER(3V/5V/12V)
CODE
AX1
CS
SHEET OF CHANGE by
DOC. NUMBER SIZE
75 0
26-Dec-2008 Puma_Chen
D
REV
000
R564
12
42.2K_1%
R563
12
30K_1%
51124GND
51124GND
R561
12
30K_1%
R565
12
20K_1%
+V1.8
10-,12-,20-,23-,24-,26-,27-,47-
PAD3
POWERPAD_2_0610
1
C81
2
330uF_2.5V
+VBATR
5-,7-,8-,9-,11-,13-,30-,39-,47-
C46
1
2
4.7uF_25v
L4
12
PCMC063T_2R2MN
C45
1
2
4.7uF_25v
FDS6690AS
Q28
SI7326DN
Q27
8
D
S
123
8765
D
765
G
4
G
4 1S23
V1.8_PG
SLP_S4#_3R
SLP_S5#_3R
0.1uF_16v
12-,32-
32-,38-
R562
0402_OPEN
C52
12
14-
1
2
R114
12
4.7_5%
6
VO2
7
8
9
10
11
12
VFB2
PGOOD2
EN2
VBST2
DRVH2
TI_TPS51124RGER_QFN_24P
LL2
DRVL2
PGND2
TRIP2
13
1
2
PAD3012
POWERPAD1x1m
51124GND
5
4
TONSEL
V5FILT
14
15
R94
11.3K_1%
R91
2
1
0_5%
C51
+V5A
1
2
0402_OPEN
U11
2
1
3
VO1
GND
VFB1
25
GND
24
PGOOD1
23
EN1
22
VBST1
21
DRVH1
20
LL1
19
DRVL1
PGND1
TRIP1
V5IN
18
17
16
1
R93
5.9K_1%
2
7-,8-,9-,10-,11-,12-,13-,14-,30-,34-,38-,47-
C54
1
2
1uF_10v
R92
12
4.7_5%
R95
12
10_5%
1
R9585
100K_5%_OPEN
2
C49
0.1uF_16v
SLP_S3#_3R
9-,10-,12-,13-,14-,32-,39-,43-,46-
7-,8-,9-,10-,11-,12-,13-,14-,30-,34-,38-,47-
14-
V1.25S_PG
12
+V5A
C53
1
2
4.7uF_6.3v
+VBATR
Q2004
1
D1
2
G1
8
G2
3
FDS6900AS
5-,7-,8-,9-,11-,13-,30-,39-,47-
C47
1
2
4.7uF_25v
5
S1_D2
6
SLF7055T_2R0N6R4_T3PF
7
4
S2
C50
1
2
4.7uF_25v
12
+V1.25S
20-,24-,34-
1
C48
220uF_2.5V
2
PAD2
POWERPAD_2_0610
L3
INVENTEC
TITLE
Vulcain UMA
SYSTEM POWER(+V1.8/+V1.25S)
CHANGE by
Puma_Chen
16-Feb-2009
SIZE
D
DOC. NUMBER
CODE
AX1 000
CS
SHEET
8
REV
OF
50
+V5A
7-,8-,10-,11-,12-,13-,14-,30-,34-,38-,47-
+VBATR
5-,7-,8-,11-,13-,30-,39-,47-
8-,10-,12-,13-,14-,32-,39-,43-,46-
SLP_S3#_3R
DFGT_VR_EN
20-
VCCP_PG
14-
R9568
0_5%
12
2
1
0_5%_OPEN
R46
1
2
1
R9569
10_5%
2
C1024
1uF_10v
1
R9570
200K_1%
2
U521
1
EN_PSV
2
TON
3
VOUT
4
V5FILT
5
VFB
6
PGOOD
7
GND
TI_TPS51117_QFN_14P
VCCPGND
PAD3013
POWERPAD1x1m
VBST
DRVH
V5DRV
DRVL
PGND
8765
G
0_5%
VCCPGND
0.1uF_16v
1
R9572
8.06K_1%
2
C1025
12
R9571
12
14
13
12
LL
11
TRIP
10
9
8
15
TML
1
2
C1026
1uF_6.3V
41S23
8765
G
41S23
D
Q517
SI7326DN
SLF10155T_2R0N8R4
D
Q518
FDS6676AS
C1023
1
2
4.7uF_25v
12
L527
C1022
1
2
4.7uF_25v
VCCPGND
1
R9574
12.1K_1%
2
1
R9573
30K_1%
2
1
C1027
2
POWERPAD_4A
330uF_2.5V
PAD4
1
+VCCP
10-,11-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-,47-
+VGFX_CORE
23-
2
3
4
2
PAD506
3
1
4
POWERPAD_4A
INVENTEC
TITLE
Vulcain UMA
GRAPHIC POWER (+VGFX_CORE)
CODE
CS
SHEET
AX1
DOC. NUMBER SIZE
95 0
CHANGE by OF
Puma_Chen
26-Dec-2008
D
REV
000
8-,9-,12-,13-,14-,32-,39-,43-,46-
R9853
SLP_S3#_3R
+VCCP
9-,11-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-,47-
12
0_5%
R9854
12
0_5%_OPEN
+V5A
7-,8-,9-,11-,12-,13-,14-,30-,34-,38-,47-
C519
1
2
1uF_10v
U501
6
VCNTL
7
POK
8
EN FB
GND
VIN
1
9
+V1.8
8-,12-,20-,23-,24-,26-,27-,47-
C506
1
2
22uF_6.3v
5
VIN
3
VOUT
4
VOUT
2
ANPEC_APL5930KAI_TRL_SOP_8P
14-
V1.5S_PG
C517
1
2
22uF_6.3v
1
2
C518
1uF_10v
C520
1
2
39pF_50V
PAD500
POWERPAD_2_0610
1
R548
27.4K_1%
2
1
R547
30K_1%
2
+V1.5S
13-,18-,24-,34-,45-,46-
Puma_Chen
12-Feb-2009
INVENTEC
TITLE
Vulcain UMA
SYSTEM POWER(+VCCP/+V1.5S)
SIZE REV
D
CODE
CS
SHEET CHANGE by
DOC. NUMBER
OF
10 50
000 AX1
11-,13-,14-,15-,19-,20-,21-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-
+V3S
PM_PWROK
PM_DPRSLPVR
VR_PWRGD_CK505#
PWR_GOOD_3
11-
CSP1
2
2
11-
CSN1
11-
CSN2
2
2
11-
CSP2
AGND_VCORE
20-,32-,39-
C9764
1
47pF_50v
C9765
1
47pF_50v
C9766
1
47pF_50v
C9767
1
47pF_50v
VSSSENSE
VCCSENSE
20-,32-
11-
R9814
1
332_1%
1
2
R9815
12
332_1%
R9816
12
332_1%
1
2
1
D3004
EZJZ0V500AA_OPEN
2
2
C9768
AGND_VCORE
47pF_50v
C9769
47pF_50v
R9817
12
332_1%
AGND_VCORE
R9818
12
18-
0_5%
R9819
12
18-
0_5%
AGND_VCORE
1
1
D3005
2
EZJZ0V500AA_OPEN
2
0_5%_OPEN
C9770
0.22uF_6.3v
1
R9821
2
0_5%
AGND_VCORE
C9771
1
0402_OPEN
2
C9772
1
2
0402_OPEN
C9773
1
0402_OPEN
2
H_DPRSTP#
1
D3007
EZJZ0V500AA_OPEN
D3006
2
EZJZ0V500AA_OPEN
+V5S
5-,13-,14-,19-,29-,30-,32-,34-,37-,40-,41-
1
R9820
2
PAD3010
POWERPAD1x1m
AGND_VCORE
C9774
330pF_50V
1 2
1
2
R9822
12
20K_1%
0402_OPEN
17-,20-,31-
17-
PSI#
H_VID6
18-
H_VID5
18-
H_VID4
18-
H_VID3
18-
H_VID2
18-
H_VID1
18-
H_VID0
18-
R9825
12
0_5%
R9826
12
499_1%
R9827
12
0_5%
R9828
12
0_5%
R9829
12
124K_1%
C9775
12
2.2uF_6.3V
R9823
6.34K_1%
1
2
1
DROOP DRVH1
2
VREF
3
GND
4
CSP1
5
CSN1
6
CSN2
7
CSP2
8
GNDSNS
9
VSNS
10
THERM
+VCCP
9-,10-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-,47-
1
R9830
56_5%
1
R9824
2
2
TP47
34
36
40
35
37
39
38
ISLEW
V5FILT
VR_TT#
DPRSTP#
12
OSRSEL
PSI#
13
TONSEL
VID6
14
15
TRIPSEL
PWRMON
VID5
17
33
VR_ON
VID316VID4
18
CLK_EN#
41
PwPd
U7017
TI_TPS51620RHAR_QFN_40P
11
31
32
PGOOD
DPRSLPVR
VID0
VID119VID2
20
R9831
12
0402_OPEN
R9832
12
0402_OPEN
VBST1
LL1
DRVL1
V5IN
PGND
DRVL2
LL2
VBST2
DRVH2
+V3S
11-,13-,14-,15-,19-,20-,21-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-
2.2_5%
1 2
R9834
R9833
12
2.2_5%
0.22uF_16V
12
C9777
0.22uF_16V
12
C9776
30
29
28
27
26
25
24
23
22
21
+V5A
7-,8-,9-,10-,12-,13-,14-,30-,34-,38-,47-
C9778
1
2
2.2uF_16v
C9780
0.1uF_25V
1
2
POWERPAD_2_0610
C9781
1
2
4.7uF_25v
C9782
1
2
4.7uF_25v
PAD3011
4.7uF_25v
4.7uF_25v
1
2
1
2
C9783
C9784
1
2
C9785
1
2
4.7uF_25v
C9786
1
2
4.7uF_25v
C9779
68uF_25V
0.1uF_25V
4.7uF_25v
1
2
1
2
C9787
C9788
+VBATR
5-,7-,8-,9-,13-,30-,39-,47-
4
G
4G1S23
CHANGE by
7-,13-,14-,30-,32-,33-,34-,36-,43-,45-,47-
VR_PWRGD_CK505#
Q9037
5
876
TPCA8030_H
S
4
23
1
G
87
5
6
D
G
Q9035
TPCA8A04_H
41S23
8765
Q9036
TPCA8030_H
S
23
1
8D765
Q9034
TPCA8A04_H
0603_OPEN
Puma_Chen 26-Dec-2008
11-
CSN1
CSP1
1
2
1
2
R134
47K_5%
11- 14-
11-
39.2K_1%
12
R9837
1
R9835
0805_OPEN
2
C9789
0603_OPEN
1
R9836
0805_OPEN
2
C9790
CSP2
CSN2
+V3A
1
2
Q9038
1
G
SSM3K7002F
1
C9820
2
0.01uF_16V
0.01uF_16V_OPEN
220K_5%
12
R9839
R9841
0_5%
C9791
R9842
2
301K_1%
P2U
L532
12
CYNTEC_PCMC104T_R36MN_2P
L533
12
CYNTEC_PCMC104T_R36MN_2P
R9838
12
39.2K_1%
11-
11-
P2U
1
2
R9840
12
220K_5%
C9821
0.01uF_16V
INVENTEC
TITLE
Vulcain UMA
CPU POWER(VCC_CORE)
SIZE
CODE
D
CS
SHEET
1
R9847
10K_5%
2
15-,32-
VR_PWRGD
3
D
S
2
1 2
12
1
63.4K_1%
12
R9843
R9846
12
63.4K_1%
301K_1%
2
1
R9844
C9792
12
0.01uF_16V_OPEN
R9845 0_5%
2
1
DOC. NUMBER REV
AX1 000
OF
+VCC_CORE
18-,47-
50 11
SLP_S4#_3R
SLP_S3#_3R
8-,32-
8-,9-,10-,13-,14-,32-,39-,43-,46-
+V1.8
8-,10-,20-,23-,24-,26-,27-,47-
1
2
C27
4.7uF_6.3v
+V5A
7-,8-,9-,10-,11-,13-,14-,30-,34-,38-,47-
U9
GMT_G2997F6U_MSOP10_10P
TML11VDDQSNS
10 2
VIN
9
S5
GND8PGND
7
S3
6
C29
1uF_10v
1
2
VTTREF
C28
0.1uF_16v
1
2
NOTE: DDR2 REGULATOR
20-,26-,27-
VLDOIN
VTTSNS
VTT
1
3
4
5
M_VREF
+V0.9S
1
2
28-
C26
10uF_6.3v
1
2
C25
10uF_6.3v
CHANGE by
Puma_Chen 26-Dec-2008
INVENTEC
TITLE
Vulcain UMA
DDR TERMINATION VOLTAGE
SIZE
D
DOC. NUMBER CODE
CS
AX1
OF SHEET
REV
000
50 12
7-,11-,13-,14-,30-,32-,33-,34-,36-,43-,45-,47-
+V3A
6
5
2
C441
1
2
0.01uF_16v
1
FDC655BN
R417
120K_1%
12
13-
GATE_3S GATE_5S
+V3S
11-,14-,15-,19-,20-,21-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-
Q41
4
D
S
3
G
1
1
R418
47_5%
C442
10uF_6.3v
2
2
7-,8-,9-,10-,11-,12-,14-,30-,34-,38-,47-
R415
120K_1%
12
13-
+V5A
6
D
5
2
13
FDC655BN
C439
1
2
0.01uF_16v
Q40
+V5S
5-,11-,14-,19-,29-,30-,32-,34-,37-,40-,41-
4
S
G
1
C440
2
10uF_6.3v
1
R416
100_5%
2
R426
100_5%
+V1.5S
10-,18-,24-,34-,45-,46-
1
2
SLP_S3#_3R
Q44
3
D
G
1
S
2
SSM3K7002F
1
C769
0.033uF_16v
2
SLP_S3#_3R
7-,11-,13-,14-,30-,32-,33-,34-,36-,43-,45-,47-
8-,9-,10-,12-,13-,14-,32-,39-,43-,46-
8-,9-,10-,12-,13-,14-,32-,39-,43-,46-
SSM3K7002F
+VBATR
5-,7-,8-,9-,11-,13-,30-,39-,47-
1
R770
47K_5%
2
+V3A
1
R769
100K_5%
2
Q52
3
D
1
G
S
2
1
B
Q54
MMBT3904
Q43
1
MMBT3906
3
C
E
2
1
R768
130K_1%
2
Q53
G
1
SSM3K7002F
+VBATR
5-,7-,8-,9-,11-,13-,30-,39-,47-
1
R781
2.7K_5%
2
2
E
B
C
3
3
D
S
2
D19
1
RLZ18C
2
R775
12
1K_5%
Q42
1
G
SSM3K7002F
3
D
S
2
13- 13-
GATE_5S
CHANGE by OF
Puma_Chen 26-Dec-2008
1
2
1
2
R779
0_5%
R777
0_5%
Q51
1
G
SSM3K7002F
3
D
S
2
GATE_3S
INVENTEC
TITLE
Vulcain UMA
POWER(SLEEP)
SIZE DOC. NUMBER
CODE
D
CS
SHEET
AX1
REV
000
50 13
5-,6-,7-,14-,31-,39-,40-,47-
1
R419
100K_1%
2
C432
1
2
PHP_74LVC1G17_SOT753_5P
0.1uF_16v
+V3AL +V3AL
5-,6-,7-,14-,31-,39-,40-,47-
C429
1
2
0.1uF_16v
5
2
3
U25
4
1
R397
100K_5%
2
39-
VCC1_POR#_3
PWR_GOOD_3
11-,13-,14-,15-,19-,20-,21-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-
SLP_S3#_3R
+V3S
5-,11-,13-,19-,29-,30-,32-,34-,37-,40-,41-
+V5S
11-,14-
V1.25S_PG
V1.5S_PG
V1.8_PG
VCCP_PG
8-,9-,10-,12-,13-,32-,39-,43-,46-
12
68.1K_1%
12
102K_1%
8-
10-
8-
9-
R390
R380
1
R396
1K_5%
R399
12
140K_1%
R382
2
1
10K_5%
R391
12
10K_5%
R392
12
10K_5%
R389
12
10K_5%
D17
2
2 1
CHENKO_LL4148_2P
R393
49.9K_1%
+V3S
1
R400
10K_5%
2
+V3A
7-,11-,13-,30-,32-,33-,34-,36-,43-,45-,47-
1
R384
10K_5%
2
39-
PWR_GOOD_KBC
1
R401
0_5%_OPEN
2
R385
12
1M_5%
CHENKO_LL4148_2P D18
2 1
R386
12
1
2
C431
0.1uF_16v
1
2
R398
0402_OPEN
20K_5%
ON_LM393DR2G_SOP_8P
R383
12
100K_5%
+V5A
7-,8-,9-,10-,11-,12-,13-,14-,30-,34-,38-,47-
U24-A
8
3
+
1
OUT
2
4
2VREF
5-,7-
R395
12
1M_5%
1
2
C430
0.1uF_16v
11-,13-,14-,15-,19-,20-,21-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-
+V5A
7-,8-,9-,10-,11-,12-,13-,14-,30-,34-,38-,47-
8
U24-B
5
+
7
OUT
6
-
ON_LM393DR2G_SOP_8P
4
11-,14-
PWR_GOOD_3
1
2
C428
1
2
1000pF_50v
R394
12
20K_5%
1
2
C422
0.1uF_16v
INVENTEC
TITLE
Vulcain UMA
CHANGE by
POWER(SEQUENCE)
SIZE CODE
26-Dec-2008 Puma_Chen
D
CS
SHEET
DOC. NUMBER
AX1
14 50
REV
000
OF
+V3S
11-,13-,14-,15-,19-,20-,21-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-
L512
BLM18AG471SN1D
1
2
11-,13-,14-,15-,19-,20-,21-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-
R267 10K_5%
CLKREQ_R_SATA#
15-,32-
+VCCP
9-,10-,11-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-,47-
2
10K_5%
R249
1
CLKREQ_R_MCH#
FSB
FSA
1
1
1
0
17-,2017-,2015-
FSC
0
0
C302
1
2
0402_OPEN
R662
CLK_PWRGD
R663
12
11-,13-,14-,15-,19-,20-,21-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-
VR_PWRGD
FSB CLOCK
FREQUENCY
+V3S CLK_PCIE_LAN
R701
10K_5%
20-
11-,32-
32-
667
800
CPU_BSEL1
CPU_BSEL2
CLK_3S_REF
*CLKREQ# pin controls SRC Table.
Byte5: bit6 =0(PWD)
SRC0
CR#_A
Byte5: bit7=0, disable CR#_A; 1,enable CR#_A
Byte5: bit2 =0(PWD)
SRC0
CR#_C
Byte5: bit3=0, disable CR#_C; 1,enable CR#_C
Byte5: bit6 =1
SRC2
Byte5: bit2 =1
SRC2
Layout note: All decoupling 0.1uF disperse closed to pin
1
2
C715
10uF_6.3v
1
2
C325
0.1uF_16v
1
2
C324
0.1uF_16v
1
2
0.1uF_16v
+V3S
2
1
CPU_BSEL0
12
CLK_R3S_ICH48
CLK_R3S_CR48
CLKREQ_R_SATA#
ICH_3S_SMCLK
ICH_3S_SMDATA
C714
33pF_50v
15-,32-
39-
CLK_R3S_MINICARD
C371
1
0402_OPEN
2
11-,13-,14-,15-,19-,20-,21-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-
19-,26-,27-,3219-,26-,27-,32-
1
2
12
10K_5%
1
R700
475_1%
2
12
R9848
12
0_5%
R9849
12
0_5%_OPEN
HOST CLOCK
FREQUENCY
166
200
10K_5%
C358
22pF_50v
CLK_R3S_DEBUG
Please place close to CLKGEN within 500mils
Byte5: bit4 =0(PWD)
CR#_B
SRC1
Byte5: bit5=0, disable CR#_B; 1,enable CR#_B
Byte5: bit0 =0(PWD)
CR#_D
SRC1
Byte5: bit1=0, disable CR#_D; 1,enable CR#_D
C322
1
2
9-,10-,11-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-,47-
17-,20-
32-
46-
X501
14.31818MHZ
12
30PPM
C321
C319
1
2
0.1uF_16v
0.1uF_16v
+VCCP
R709
10K_5%_OPEN
R708
12
2.2K_5%
R301
0402_OPEN
12
R302
22_5%
R9670
12
R266 475_1%12
12
R305
33_5%
45-
1
C713
33pF_50v
2
Byte5: bit4 =1
SRC4
Byte5: bit0 =1
SRC4
C318
1
2
0.1uF_16v
1
2
2
1
22_5%
R9607
12
33_5%
+V3S
R702
12
10K_5%
CLK_3S_ICH48
CLKREQ_SATA#
CLKREQ_MCH#
CLK_3S_DEBUG
CR#_E
CR#_F
CR#_G
CR#_H
+V3S
11-,13-,14-,15-,19-,20-,21-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-
Layout note: All decoupling 0.1uF disperse closed to pin
L510
BLM18AG471SN1D
1
2
C722
C699
1
1
2
2
10uF_6.3v
10uF_6.3v
U509
26
VDDSRC_IO
45
VDDSRC_IO
36
VDDSRC_IO
12
VDD96_IO
39
VDDSRC
61
VDDREF
20
VDDPLL3_IO
49
VDDCPU_IO
9
VDD48
2
VDDPCI
55
VDDCPU
16
VDD
10
SUB_48MHZ_FSLA
57
FSLB_TEST_MODE
62
REF0_FSLC_TEST_SEL
1
PCI0_CR#_A
3
PCI1_CR#_B
4
CLK_3S_MINICARD
PCI2_TME
5
PCI3
56
CK_PWRGD_PD#
64
SCLK
63
SDTAT
60
X1
59
X2
8
GNDPCI
11
GND48
15
GND
19
GND
23
GNDSRC
29
GNDSRC
42
GNDSRC
58
GNDREF
52
GNDCPU
ICS_ICS9LPRS355BGLFT_TSSOP_64P
CPUT2_ITP_SRCT8
CPUC2_ITP_SRCC8
SRCT11_CR#_H
SRCC11_CR#_G
PCI4_27_Select
PCI_F5_ITP_EN
SRCC2_SATAC
27MHz_NonSS_SRCT1_SE1
27MHz_SS_SRCC1_SE2
SRCC0_DOTT_96
SRCT0_DOTC_96
Byte6: bit7=0, disable CR#_E; 1,enable CR#_E
SRC6
Byte6: bit6=0, disable CR#_F; 1,enable CR#_F
SRC8
Byte6: bit5=0, disable CR#_G; 1,enable CR#_G
SRC9
Byte6: bit4=0, disable CR#_H; 1,enable CR#_H
SRC10
PCI_STOP#
CPU_STOP#
SRCT7_CR#_F
SRCC7_CR#_E
SRCT3_CR#_C
SRCC3_CR#_D
SRCT2_SATAT
C328
C326
1
2
0.1uF_16v
48
NC
38
37
51
CPUT1_F
50
CPUC1_F
54
CPUT0
53
CPUC0
47
46
33
32
34
SRCT10
35
SRCC10
30
SRCT9
31
SRCC9
44
43
41
SRCT6
40
SRCC6
6
7
27
SRCT4
28
SRCC4
24
25
21
22
17
18
13
14
11-,13-,14-,15-,19-,20-,21-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-
C327
1
1
2
2
0.1uF_16v
0.1uF_16v
CLK_R_MCHBCLK
CLK_R_MCHBCLK#
CLK_R_CPUBCLK
CLK_R_CPUBCLK#
CLK_R_XDP
CLK_R_XDP#
CLK_REQH#
CLK_REQG#
CLK_R_PCIE_NEWCARD
CLK_R_PCIE_NEWCARD#
CLK_R_PCIE_MINI2
CLK_R_PCIE_MINI2#
CLK_3S_KBPCI
CLK_3S_ICHPCI
CLK_R_PEG_MCH
CLK_R_PEG_MCH#
CLK_R_PCIE_ICH
CLK_R_PCIE_ICH#
CLK_R_SATA1
CLK_R_SATA1#
SSCLK1_R_DREF
SSCLK1_R_DREF#
CLK_R_DREF
CLK_R_DREF#
11-,13-,14-,15-,19-,20-,21-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-
+V3S
C320
C323
1
11
2
2
0.1uF_16v
0.1uF_16v
10K_5%_OPEN
CLK_3S_REF
11-,13-,14-,15-,19-,20-,21-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-
C329
2
0.1uF_16v
1
R248
2
475_1%
475_1%
ITP_EN =0
SRC8/SRC8#
ITP_EN =1
ITP/ITP#
15-
LAYOUT NOTES : THE R250 , R251 CLOSED TO U509
CHANGE by
Puma_Chen
1
R720
10K_5%
2
R247
10K_5%_OPEN
2
R245 1
1 2
R686
33_5% R704 12
12
33_5% R707
R303
10K_5%
R706
0402_OPEN
12
R250
R251
22_5%
12
22_5%
26-Dec-2008
1
1
R246
10K_5%
2
2
4646-
R304
12
1 2
0402_OPEN
1 2
R703
12
10K_5%
39-
32-
INVENTEC
TITLE
Vulcain UMA
CLOCK_GENERATOR
SIZE
CODE
D
CS
SHEET
32-
PCISTOP#_3
32-
CPUSTOP#_3
21-
CLK_R_MCHBCLK
21-
CLK_R_MCHBCLK#
16-
CLK_R_CPUBCLK
16-
CLK_R_CPUBCLK#
19-
CLK_R_XDP
19-
CLK_R_XDP#
46-
CLK_R_REQH#
45-
CLK_R_REQG#
CLK_R_PCIE_NEWCARD
CLK_R_PCIE_NEWCARD#
45-
CLK_R_PCIE_MINI2
45-
CLK_R_PCIE_MINI2#
4343-
CLK_PCIE_LAN#
39-
CLK_R3S_KBPCI
33-
CLK_R3S_ICHPCI
20-
CLK_R_PEG_MCH
20-
CLK_R_PEG_MCH#
32-
CLK_R_PCIE_ICH
32-
CLK_R_PCIE_ICH#
31-
CLK_R_SATA1
31-
CLK_R_SATA1#
20-
SSCLK1_R_DREF
20-
SSCLK1_R_DREF#
20-
CLK_R_DREF
20-
CLK_R_DREF#
+V3S +V3S
27_Selet =0
LCD_SST 100MHZ
27_Selet =1
27MHZ non-spread clock
CLK_R3S_KBC14
CLK_R3S_ICH14
DOC. NUMBER
AX1
OF
REV
000
50 15
H_A#(35:3)
H_ADSTB#1
H_STPCLK#
H_A20M#
H_FERR#
H_IGNNE#
H_INTR
H_NMI
H_SMI#
21-
H_A#(3)
H_A#(4)
H_A#(5)
H_A#(6)
H_A#(7)
H_A#(8)
H_A#(9)
H_A#(10)
H_A#(11)
H_A#(12)
H_A#(13)
H_A#(14)
H_A#(15)
H_A#(16)
H_REQ#(4:0) H_RS#(2:0)
H_A#(17)
H_A#(18)
H_A#(19)
H_A#(20)
H_A#(21)
H_A#(22)
H_A#(23)
H_A#(24)
H_A#(25)
H_A#(26)
H_A#(27)
H_A#(28)
H_A#(29)
H_A#(30)
H_A#(31)
H_A#(32)
H_A#(33)
H_A#(34)
H_A#(35)
21-
313131-
31313131-
21-
H_REQ#(0)
H_REQ#(1)
H_REQ#(2)
H_REQ#(3)
H_REQ#(4)
H_ADSTB#0
21-
STPCLK#
CN506-1
J4
A3#
L5
A4#
L4
A5#
K5
A6#
M3
A7#
N2
A8#
J1
A9#
N3
A10#
P5
A11#
P2
A12#
L2
A13#
P4
A14#
P1
A15#
R1
A16#
M1
ADSTB0#
K3
REQ0#
H2
REQ1#
K2
REQ2#
J3
REQ3#
L1
REQ4#
Y2
A17#
U5
A18#
R3
A19#
W6
A20#
U4
A21#
Y5
A22#
U1
A23#
R4
A24#
T5
A25#
T3
A26#
W2
A27#
W5
A28#
Y4
A29#
U2
A30#
V4
A31#
W3
A32#
AA4
A33#
AB2
A34#
AA3
A35#
V1
ADSTB1#
A6
A20M#
A5
FERR#
C4
IGNNE#
D5
C6
LINT0
B4
LINT1
A3
SMI#
M4
RSVD01
N5
RSVD02
T2
RSVD03
V3
RSVD04
B2
RSVD05
C3
RSVD06
D2
RSVD07
D22
RSVD08
D3
RSVD09
F6
RSVD010
FOX_PZ4782K_274M_41_478P
GMCH
CPU
ADS#
BNR#
BPRI#
DEFER#
DRDY#
DBSY#
BR0#
IERR#
ADDR GROUP 0
INIT#
CONTROL
LOCK#
RESET#
RS0#
RS1#
RS2#
TRDY#
HIT#
HITM#
BPM0#
BPM1#
BPM2#
BPM3#
PRDY#
PREQ#
TCK
TDI
ADDR GROUP 1
TDO
TMS
XDP/ITP SIGNALS
TRST#
DBR#
THERMAL
PROCHOT#
THERMDA
THERMDC
THERMTRIP#
ICH
H CLK
BCLK0
BCLK1
RESERVED
ICH8
H1
E2
G5
H5
F21
E1
F1
D20
B3
H4
C1
F3
F4
G3
G2
G6
E4
AD4
AD3
AD1
AC4
AC2
AC1
AC5
AA6
AB3
AB5
AB6
C20
9-,10-,11-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-,47-
R152
D21
A24
B25
C7
A22
A21
56_5%12
+VCCP
10mils/10mils
+VCCP
21-
H_ADS#
21-
H_BNR#
21-
H_BPRI#
21-
H_DEFER#
21-
H_DRDY#
21-
H_DBSY#
21-
H_BREQ#0
31-
H_INIT#
21-
H_LOCK#
R212
19-,21-
21-
2121-
1919191919-
16-,1916-,19-
16-,19-
19-
16-,19-
19-,32-
1919-
20-,31-
1515-
+VCCP
9-,10-,11-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-,47-
12
H_CPURST#
51_5%
H_TRDY#
H_HIT#
H_HITM#
H_BPM0_XDP#
H_BPM1_XDP#
H_BPM2_XDP#
H_BPM3_XDP#
H_BPM4_PRDY#
H_BPM5_PREQ#
H_TCK
TDI_FLEX
H_TDO
H_TMS
XDP_DBRESET#
H_THERMDA
THERM_MINUS
PM_THRMTRIP#
CLK_R_CPUBCLK
CLK_R_CPUBCLK#
R679
12
51_5%
R206
12
51_5%
R207
12
51_5%
R666
12
51_5%
+VCCP
+VCCP
9-,10-,11-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-,47-
21-
H_RS#(0)
H_RS#(1)
H_RS#(2)
16-,19-
H_BPM5_PREQ#
16-,19-
TDI_FLEX
16-,19-
H_TMS
16-,19-
H_TCK
9-,10-,11-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-,47-
1
R151
56_5%
CLOSED TO CPU
2
51 ohm +/-1% pull-up to +VCCP
(VCCP) if ITP is implemented
19-
1
R205
51_5%
2
H_TRST#
PM_THRMTRIP# should be T at CPU
CHANGE by
Puma_Chen
26-Dec-2008
INVENTEC
TITLE
Vulcain UMA
MEROM-1
SIZE
D
CODE
CS
SHEET
DOC. NUMBER
AX1
REV
000
OF
50 16
H_D#(63:0)
H_DSTBN#0
H_DSTBP#0
H_DINV#0
H_D#(63:0)
+VCCP
9-,10-,11-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-,47-
1
R598
1K_1%
2
1
2
R597
2K_1%
GTLREF
Layout note: Zo=55 ohm,
0.5" max for GTLREF.
17-,21-
212121-
17-,21-
H_DSTBN#1
H_DSTBP#1
H_DINV#1
CPU_BSEL0
CPU_BSEL1
CPU_BSEL2
212121-
15-,20-
15-,20-
H_D#(1)
H_D#(2)
H_D#(3)
H_D#(4)
H_D#(5)
H_D#(6)
H_D#(7)
H_D#(8)
H_D#(9)
H_D#(10)
H_D#(11)
H_D#(12)
H_D#(13)
H_D#(14)
H_D#(15)
H_D#(16)
H_D#(17)
H_D#(18)
H_D#(19)
H_D#(20)
H_D#(21)
H_D#(22)
H_D#(23)
H_D#(24)
H_D#(25)
H_D#(26)
H_D#(27)
H_D#(28)
H_D#(29)
H_D#(30)
H_D#(31)
R141
0402_OPEN
CN506-2
E22
D0#
F24
D1#
E26
D2#
G22
D3#
F23
D4#
G25
D5#
E25
D6#
E23
D7#
K24
D8#
G24
DATA GRP 0
D9#
J24
D10#
J23
D11#
H22
D12#
F26
D13#
K22
D14#
H23
D15#
J26
DSTBN0#
H26
DSTBP0#
H25
DINV0#
N22
D16#
K25
D17#
P26
D18#
R23
D19#
L23
D20#
M24
D21#
L22
D22#
M23
D23#
P25
D24#
P23
D25#
P22
DATA GRP 1
D26#
T24
D27#
R24
D28#
L25
D29#
T25
D30#
N25
D31#
L26
DSTBN1#
M26
DSTBP1#
N24
DINV1#
AD26
GTLREF
C23
TEST1
D25
TEST2
C24
TEST3
AF26
1
1
R594
0402_OPEN
2
2
C589
1
2
0402_OPEN
Place C589(0.1uF_16V) close to the TEST4 pin.
Make sure TEST4 routing is reference
to GND and away from other noisy signals.
MISC
TEST4
AF1
TEST5
A26
TEST6
B22
BSEL0
B23
BSEL1
C21
BSEL2
FOX_PZ4782K_274M_41_478P
D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#
DATA GRP 2 DATA GRP 3
D41#
D42#
D43#
D44#
D45#
D46#
D47#
DSTBN2#
DSTBP2#
DINV2#
D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63#
DSTBN3#
DSTBP3#
DINV3#
COMP0
COMP1
COMP2
COMP3
DPRSTP#
DPSLP#
DPWR#
PWRGOOD
SLP#
PSI#
Y22
AB24
V24
V26
V23
T22
U25
U23
Y25
W22
Y23
W24
W25
AA23
AA24
AB25
Y26
AA26
U22
AE24
AD24
AA21
AB22
AB21
AC26
AD20
AE22
AF23
AC25
AE21
AD21
AC22
AD23
AF22
AC23
AE25
AF24
AC20
R26
U26
AA1
Y1
E5
B5
D24
D6
D7
AE6
1
R210
0402_OPEN
2
11-,20-,31-
H_D#(32) H_D#(0)
H_D#(33)
H_D#(34)
H_D#(35)
H_D#(36)
H_D#(37)
H_D#(38)
H_D#(39)
H_D#(40)
H_D#(41)
H_D#(42)
H_D#(43)
H_D#(44)
H_D#(45)
H_D#(46)
H_D#(47)
H_D#(48)
H_D#(49)
H_D#(50)
H_D#(51)
H_D#(52)
H_D#(53)
H_D#(54)
H_D#(55)
H_D#(56)
H_D#(57)
H_D#(58)
H_D#(59)
H_D#(60)
H_D#(61)
H_D#(62)
H_D#(63)
2121-
12
R595
12
R596
1
R208 27.4_1%
12
H_DPRSTP#
+VCCP
9-,10-,11-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-,47-
21-
27.4_1%
54.9_1%
2
54.9_1%R209
CLOSED TO CPU
3121-
2111- 15-,20-
Place series resistor (R211 = 1K ohm) on H_PWRGD_XDP without stub
H_DSTBN#3
H_DSTBP#3
H_DINV#3
H_DPSLP#
H_DPWR#
H_CPUSLP#
PSI#
17-,21-
17-,21-
212121-
H_D#(63:0)
H_DSTBN#2
H_DSTBP#2
H_DINV#2
H_D#(63:0)
R211
12
1K_5%
31-
H_PWRGD
19-
H_PWRGD_XDP
INVENTEC
TITLE
Vulcain UMA
MEROM-2
DOC. NUMBER
CODE REV
SIZE
AX1 000
D
CS
CHANGE by OF
Puma_Chen 26-Dec-2008
SHEET
50 17
PLACE THESE INSIDE SOCKET
CAVITY ON L8 (NORTH SIDE
SECONDARY)
PLACE THESE INSIDE SOCKET
CAVITY ON L8 (SOUTH SIDE
SECONDARY)
PLACE THESE INSIDE SOCKET
CAVITY ON L1 (NORTH SIDE
PRIMARY)
PLACE THESE INSIDE SOCKET
CAVITY ON L1 (SOUTH SIDE
PRIMARY)
SOUTH SIDE SECONDARY
NORTH SIDE SECONDARY
C178
1
2
10uF_6.3v
C618
1
2
10uF_6.3v
C174
1
2
10uF_6.3v
C130
1
2
10uF_6.3v
C639
1
2
10uF_6.3v
C643
1
2
10uF_6.3v
1
C649
2
330uF_2v_6mR
1
C648
2
330uF_2v_6mR
1
2
1
2
C181
1
2
10uF_6.3v
C180
1
10uF_6.3v
2
C622
1
2
10uF_6.3v
C175
1
2
10uF_6.3v
C655
10uF_6.3v
C642
10uF_6.3v
1
C647
2
1
C635
2
330uF_2v_6mR
1
2
1
2
1
2
1
2
C636
1
2
10uF_6.3v
C644
1
2
10uF_6.3v
330uF_2v_6mR
C133
10uF_6.3v
C236
10uF_6.3v
C176
10uF_6.3v
C173
10uF_6.3v
C640
1
2
10uF_6.3v
C646
1
2
10uF_6.3v
C182
1
2
10uF_6.3v
C179
1
2
10uF_6.3v
C177
1
2
10uF_6.3v
C232
1
2
10uF_6.3v
1
2
1
2
C638
10uF_6.3v
C656
10uF_6.3v
C131
1
2
10uF_6.3v
C132
1
10uF_6.3v
2
C231
1
2
10uF_6.3v
C172
1
2
10uF_6.3v
C637
1
2
10uF_6.3v
C645
1
2
10uF_6.3v
+VCC_CORE
11-,18-,47-
CN506-3
A7
VCC001
A9
VCC002
A10
VCC003
A12
VCC004
A13
VCC005
A15
VCC006
A17
VCC007
A18
VCC008
A20
VCC009
B7
VCC010
B9
VCC011
B10
VCC012
B12
VCC013
B14
VCC014
B15
VCC015
B17
VCC016
B18
VCC017
B20
VCC018
C9
VCC019
C10
VCC020
C12
VCC021
C13
VCC022
C15
VCC023
C17
VCC024
C18
VCC025
D9
VCC026
D10
VCC027
D12
VCC028
D14
VCC029
D15
VCC030
D17
VCC031
D18
VCC032
E7
VCC033
E9
VCC034
E10
VCC035
E12
VCC036
E13
VCC037
E15
VCC038
E17
VCC039
E18
VCC040
E20
VCC041
F7
VCC042
F9
VCC043
F10
VCC044
F12
VCC045
F14
VCC046
F15
VCC047
F17
VCC048
F18
VCC049
F20
VCC050
AA7
VCC051
AA9
VCC052
AA10
VCC053
AA12
VCC054
AA13
VCC055
AA15
VCC056
AA17
VCC057
AA18
VCC058
AA20
VCC059
AB9
VCC060
AC10
VCC061
AB10
VCC062
AB12
VCC063
AB14
VCC064
AB15
VCC065
AB17
VCC066
AB18
VCC067
FOX_PZ4782K_274M_41_478P
VCC068
VCC069
VCC070
VCC071
VCC072
VCC073
VCC074
VCC075
VCC076
VCC077
VCC078
VCC079
VCC080
VCC081
VCC082
VCC083
VCC084
VCC085
VCC086
VCC087
VCC088
VCC089
VCC090
VCC091
VCC092
VCC093
VCC094
VCC095
VCC096
VCC097
VCC098
VCC099
VCC0100
VCCP01
VCCP02
VCCP03
VCCP04
VCCP05
VCCP06
VCCP07
VCCP08
VCCP09
VCCP10
VCCP11
VCCP12
VCCP13
VCCP14
VCCP15
VCCP16
VCCA01
VCCA02
VCCSENSE
VSSSENSE
+VCC_CORE
11-,18-,47-
AB20
AB7
AC7
AC9
AC12
AC13
AC15
AC17
AC18
AD7
AD9
AD10
AD12
AD14
AD15
AD17
AD18
AE9
AE10
AE12
AE13
AE15
AE17
AE18
AE20
AF9
AF10
AF12
AF14
AF15
AF17
AF18
AF20
G21
V6
J6
K6
M6
J21
K21
M21
N21
N6
R21
R6
T21
T6
V21
W21
B26
C26
AD6
VID0
AF5
VID1
AE5
VID2
AF4
VID3
AE3
VID4
AF3
VID5
AE2
VID6
AF7
AE7
+VCCP
9-,10-,11-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-,47-
1
C641
2
220uF_2.5v
11-
H_VID0
11-
H_VID1
11-
H_VID2
11-
H_VID3
11-
H_VID4
11-
H_VID5
11-
H_VID6
LAYOUT NOTE:
ROUTE VCCSENSE AND VSSSENSE TRACE AT
24.7 OHM WITH 50 MIL SPACEING
PLACE PU AND PD WITHIN I INCH OF CPU
+VCC_CORE
11-,18-,47-
1
R175
100_1%
2
1
R176
100_1%
2
11-
11-
+VCCP
9-,10-,11-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-,47-
C235
1
1
2
2
0.1uF_16v
VCCSENSE
VSSSENSE
C234
0.1uF_16v
LAYOUT NOTE:
PLACE C588 NEAR PIN B26
PLACE THESE INSIDE SOCKET
CAVITY ON L8 (NORTH SIDE
SECONDARY)
C619
C233
1
1
2
2
0.1uF_16v
0.1uF_16v
10-,13-,24-,34-,45-,46-
0.01uF_16v
C588
1
2
+V1.5S
C620
0.1uF_16v
1
2
1
2
0.1uF_16v
1
2
C621
C587
10uF_6.3v
INVENTEC
TITLE
Vulcain UMA
MEROM-3
SIZE
26-Dec-2008 Puma_Chen
D
CODE
CS
SHEET CHANGE by
DOC. NUMBER
AX1
18 50
REV
000
OF
CN506-4
A4
VSS001
A8
VSS002
A11
VSS003
A14
VSS004
A16
VSS005
A19
VSS006
A23
VSS007
AF2
VSS008
B6
VSS009
B8
VSS010
B11
VSS011
B13
VSS012
B16
VSS013
B19
VSS014
B21
VSS015
B24
VSS016
C5
VSS017
C8
VSS018
C11
VSS019
C14
VSS020
C16
VSS021
C19
VSS022
C2
VSS023
C22
VSS024
C25
VSS025
D1
VSS026
D4
VSS027
D8
VSS028
D11
VSS029
D13
VSS030
D16
VSS031
D19
VSS032
D23
VSS033
D26
VSS034
E3
VSS035
E6
VSS036
E8
VSS037
E11
VSS038
E14
VSS039
E16
VSS040
E19
VSS041
E21
VSS042
E24
VSS043
F5
VSS044
F8
VSS045
F11
VSS046
F13
VSS047
F16
VSS048
F19
VSS049
F2
VSS050
F22
VSS051
F25
VSS052
G4
VSS053
G1
VSS054
G23
VSS055
G26
VSS056
H3
VSS057
H6
VSS058
H21
VSS059
H24
VSS060
J2
VSS061
J5
VSS062
J22
VSS063
J25
VSS064
K1
VSS065
K4
VSS066
K23
VSS067
K26
VSS068
L3
VSS069
L6
VSS070
L21
VSS071
L24
VSS072
M2
VSS073
M5
VSS074
M22
VSS075
M25
VSS076
N1
VSS077
N4
VSS078
N23
VSS079
N26
VSS080
P3
VSS081
FOX_PZ4782K_274M_41_478P
VSS082
VSS083
VSS084
VSS085
VSS086
VSS087
VSS088
VSS089
VSS090
VSS091
VSS092
VSS093
VSS094
VSS095
VSS096
VSS097
VSS098
VSS099
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
VSS161
VSS162
VSS163
P6
P21
P24
R2
R5
R22
R25
T1
T4
T23
T26
U3
U6
U21
U24
V2
V5
V22
V25
W1
W4
W23
W26
Y3
Y6
Y21
Y24
AA2
AA5
AA8
AA11
AA14
AA16
AA19
AA22
AA25
AB1
AB4
AB8
AB11
AB13
AB16
AB19
AB23
AB26
AC3
AC6
AC8
AC11
AC14
AC16
AC19
AC21
AC24
AD2
AD5
AD8
AD11
AD13
AD16
AD19
AD22
AD25
AE1
AE4
AE8
AE11
AE14
AE16
AE19
AE23
AE26
A2
AF6
AF8
AF11
AF13
AF16
AF19
AF21
A25
AF25
H_BPM5_PREQ#
H_BPM4_PRDY#
H_BPM3_XDP#
H_BPM2_XDP#
H_BPM1_XDP#
H_BPM0_XDP#
9-,10-,11-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-,47-
+VCCP
H_PWRGD_XDP
C700
1
2
0.1uF_16v
H_TCK
THERM_3S_WARN#
CN4
12
1616-
1616-
1616-
17-
16-
12
R671
54.9_1%
GND0
3
OBSFN_A0
5
OBSFN_A1
78
GND2
9
OBSDATA_A0
11
OBSDATA_A1
13
GND4
15
OBSDATA_A2
17
OBSDATA_A3
19
GND6 GND7
21
OBSFN_B0
23
OBSFN_B1
25 26
GND8
27
OBSDATA_B0
29
OBSDATA_B1
31
GND10
33
OBSDATA_B2
35
OBSDATA_B3
37
GND12 GND13
39
PWRGOOD_HOOK0
41
HOOK1
43
VCC_OBS_AB VCC_OBS_CD
45
HOOK2
47
HOOK3
49 50
GND14
51
SDA
53
SCL
55 56
TCK1
57
TCK0
59
GND16
SAMTEC_BSH_030_01_L_D_A_TR_60P_OPEN
XDP CONNECTOR
+V5S
5-,11-,13-,14-,29-,30-,32-,34-,37-,40-,41-
PWM_3S_FAN#
THERM_3S_WARN#
H_THERMDA
THERM_MINUS
11-,13-,14-,15-,19-,20-,21-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-
16-
16-
19-
+V3S
+V5S
U503
1
2
5
3
TC7SET08F
R572
12
4
5.6K_5%
39-
19-
C107
2.2K_5%
2
ITPCLK_HOOK4
ITPCLK#_HOOK5
RESET#_HOOK6
5-,11-,13-,14-,29-,30-,32-,34-,37-,40-,41-
Q505
2
3
S
D
G
AO3409
1
+V3S
1000pF_50V
12
H_THERMDA
THERM_MINUS
R142
1
11-,13-,14-,15-,19-,20-,21-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-
+V3S
GND1
4
OBSFN_C0
6
OBSFN_C1
GND3
10
OBSDATA_C0
12
OBSDATA_C1
14
GND5
16
OBSDATA_C2
18
OBSDATA_C3
OBSFN_D0
OBSFN_D1
GND9
OBSDATA_D0
OBSDATA_D1
GND11
OBSDATA_D2
OBSDATA_D3
DBR#_HOOK7
GND15
TRSTn
GND17
C554
1
2
0.01uF_16v
TDO
TDI
TMS
9-,10-,11-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-,47-
20
22
24
28
30
32
34
36
38
40
42
44
46
48
52
54
58
60
1
2
3
CN503
1
2
3
+VCCP
G
G
G1
G2
C682
1
2
0.1uF_16v
1K_5%
R202
1 2
ENTERY_3802_B03S_01E_3P
FAN CONN
11-,13-,14-,15-,19-,20-,21-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-
U13
1
VDD
SMCLK
2
DP
SMDATA
3
ALERT DN
4
GND
THERM
SMSC_EMC1402_1_ACZL_MSOP_8P
1
C109
2
0.1uF_16v
15-,26-,27-,32-
8
15-,26-,27-,32-
7
6
5
32-,33-
+VCCP
9-,10-,11-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-,47-
2
1
R203
1K_5%
R204
54.9_1%
2
1
1515-
16-,2116-,32-
16161616-
ICH_3S_SMCLK
ICH_3S_SMDATA
THERM_SCI#
CLK_R_XDP
CLK_R_XDP#
H_CPURST#
XDP_DBRESET#
H_TDO
H_TRST#
TDI_FLEX
H_TMS
LAYOUT NOTES: PUT THE THERMAL SENSOR CLOSE TO CPU
CHANGE by
Puma_Chen 26-Dec-2008
INVENTEC
TITLE
Vulcain UMA
THERMAL&FAN
SIZE
D
DOC. NUMBER
CODE
AX1 000
CS
SHEET OF
REV
50 19
MCH_CFG(5)
MCH_CFG(13:12)
XOR/ALLZ
NOTE: CFG[2:0] STRP : 001b : 533 MT/S
+V1.8
8-,10-,12-,20-,23-,24-,26-,27-,47-
LOW=DMIx2
HIGH=DMIx4
00=PARTIAL CLOCK GATING DISABLE
01=XOR MODE ENABLE
10=ALL-Z MODE ENABLE
11=NORMAL OPERATION
011b : 667 MT/S
1
R569
20_1%
2
1
R570
20_1%
2
Note: R569,R570
For Calero : 80.6 ohm
For Crestline : 20 ohm
20-
20-
MCH_CFG(7)
(CPU Strap)
SM_RCOMP
SM_RCOMP#
+V3S
11-,13-,14-,15-,19-,20-,21-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-
12
R219 10K_5%
12
10K_5%R217
2
1
R216 10K_5%
15-,20-
20-,26-
20-,27-
+V3S
R183
1
1
R213
0402_OPEN
2
2
MCH_CFG(19)
(DMI LANE
REVERSAL)
MCH_CFG(18)
MCH_CFG(19)
MCH_CFG(20)
MCH_CFG(18)
VCC SELECT
MCH_CFG(20)
(PCIE BACKWARD
INTERPOERABILITY
MODE
0402_OPEN
20-
20-
20-
LOW=1.05V
HIGH=1.5V
LOW=ONLY SDVO OR PCIE X1 IS
OPERATIONAL
HIGH=SDVO AND PCIE X1 ARE
OPERATING SIMULTANEOUSLY
VIA THE PEG PORT
LOW=RSVD
HIGH=Mobile CPU
MCH_CFG(16)
(FSB Dynamic
ODT)
LOW=Dynamic ODT
HIGH=Dynamic ODT
CLKREQ_R_MCH#
PM_EXTTS#0
PM_EXTTS#1
CPU_BSEL1
MCH_CFG(17:3)
11-,13-,14-,15-,19-,20-,21-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-
1
R214
0402_OPEN
2
PM_PWROK
MCH_CFG(18)
MCH_CFG(19)
MCH_CFG(20)
11-,20-,32-,39-
PM_THRMTRIP#
PM_DPRSLPVR
BM_BUSY#
H_DPRSTP#
PM_EXTTS#0
PM_EXTTS#1
LOW=NORMAL
HIGH=LANES REVERSED
MCH_CFG(9)
PCIE Graphics
Lane
Disable
Enable
CPU_BSEL0
CPU_BSEL2
15-,1720-
PLT_RST#
LOW=Reverse Lane
HIGH=Normal operation
MCH_CFG(11)
PSB 4X CLK
ENABLE
15-,17-
15-,17-
R182
1K_5%
202020-
3211-,17-,3120-,2620-,27-
33-,4616-,3111-,32-
R153
LOW=CALISTOGA
HIGH=RESERVED
MA_A(14)
MB_A(14)
1
1
R158
1K_5%
2
2
MCH_CFG(3)
MCH_CFG(4)
MCH_CFG(5)
MCH_CFG(6)
MCH_CFG(7)
MCH_CFG(8)
MCH_CFG(9)
MCH_CFG(10)
MCH_CFG(11)
MCH_CFG(12)
MCH_CFG(13)
MCH_CFG(14)
MCH_CFG(15)
MCH_CFG(16)
MCH_CFG(17)
12
100_5%
NOTE :
USE 4K-OHM RESISTOR WHEN INSTALLING
PULL-UP/PULL-DOWN RESISTOR ON ANY
MCH-CFG CONNECTION/PINS.
U506-2
P36
26-,2827-,28-
RSVD1
P37
RSVD2
R35
RSVD3
N35
RSVD4
AR12
RSVD5
AR13
RSVD6
AM12
RSVD7
AN13
RSVD8
J12
RSVD9
AR37
RSVD10
AM36
RSVD11
AL36
RSVD12
AM37
RSVD13
D20
RSVD14
H10
RSVD20
B51
RSVD21
BJ20
RSVD22
BK22
RSVD23
BF19
RSVD24
BH20
RSVD25
BK18
RSVD26
BJ18
RSVD
RSVD27
BF23
RSVD28
BG23
RSVD29
BC23
RSVD30
BD24
RSVD31
BJ29
RSVD32
BE24
RSVD33
BH39
RSVD34
AW20
RSVD35
BK20
RSVD36
C48
RSVD37
D47
RSVD38
B44
RSVD39
C44
RSVD40
A35
RSVD41
B37
RSVD42
B36
RSVD43
B34
RSVD44
C34
RSVD45
P27
CFG_0
N27
CFG_1
N24
CFG_2
C21
CFG_3
C23
CFG_4
F23
CFG_5
N23
CFG_6
G23
CFG_7
J20
CFG_8
C20
CFG_9
R24
CFG_10
L23
CFG_11
CFG
J23
CFG_12
E23
CFG_13
E20
CFG_14
K23
CFG_15
M20
CFG_16
M24
CFG_17
L32
CFG_18
N33
CFG_19
L35
CFG_20
G41
PM_BM_BUSY#
L39
PM_DPRSTP#
L36
PM_EXT_TS#_0
J36
PM_EXT_TS#_1
AW49
PWROK
AV20
RSTIN#
N20
THRMTRIP#
BK51
BK50
BJ51
BL50
BL49
G36
BL3
BL2
BK1
BJ1
E1
A5
C51
B50
A50
A49
BK2
PM
DPRSLPVR
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC
NC9
NC10
NC11
NC12
NC13
NC14
NC15
NC16
ITL_CRESTLINE_FCBGA_1299P
SM_CK_0
SM_CK_1
SM_CK_3
SM_CK_4
SM_CK#_0
SM_CK#_1
SM_CK#_3
SM_CK#_4
SM_CKE_0
SM_CKE_1
SM_CKE_3
SM_CKE_4
SM_CS#_0
SM_CS#_1
DDR MUXING
SM_CS#_2
SM_CS#_3
SM_ODT_0
SM_ODT_1
SM_ODT_2
SM_ODT_3
SM_RCOMP
SM_RCOMP#
SM_RCOMP_VOH
SM_RCOMP_VOL
SM_VREF_0
SM_VREF_1
DPLL_REF_CLK
DPLLREF_CLK#
DPLL_REF_SSCLK
DPLL_REF_SSCLK#
PEG_CLK
CLK
PEG_CLK#
DMI_RXN_0
DMI_RXN_1
DMI_RXN_2
DMI_RXN_3
DMI_RXP_0
DMI_RXP_1
DMI_RXP_2
DMI_RXP_3
DMI
DMI_TXN_0
DMI_TXN_1
DMI_TXN_2
DMI_TXN_3
DMI_TXP_0
DMI_TXP_1
DMI_TXP_2
DMI_TXP_3
GFX_VID_0
GFX_VID_1
GFX_VID_2
GFX_VID_3
DFGT_VR_EN
GRAPHICS VID
CL_CLK
CL_DATA
ME
CL_PWROK
CL_RST#
CL_VREF
SDVO_CTRL_CLK
SDVO_CTRL_DATA
CLK_REQ#
ICH_SYNC#
TEST_1
MISC
TEST_2
AV29
BB23
BA25
AV23
AW30
BA23
AW25
AW23
BE29
AY32
BD39
BG37
BG20
BK16
BG16
BE13
BH18
BJ15
BJ14
BE16
BL15
BK14
BK31
BL31
AR49
AW4
B42
C42
H48
H47
K44
K45
AN47
AJ38
AN42
AN46
AM47
AJ39
AN41
AN45
AJ46
AJ41
AM40
AM44
AJ47
AJ42
AM39
AM43
E35
A39
C38
B39
E36
AM49
AK50
AT43
AN49
AM50
H35
K36
G39
G40
A37
R32
TP39
TP40
TP41
TP42
TP43
12
R162
20K_5%
DMI_TXN(0)
DMI_TXN(1)
DMI_TXN(2)
DMI_TXN(3)
DMI_TXP(0)
DMI_TXP(1)
DMI_TXP(2)
DMI_TXP(3)
DMI_RXN(0)
DMI_RXN(1)
DMI_RXN(2)
DMI_RXN(3)
DMI_RXP(0)
DMI_RXP(1)
DMI_RXP(2)
DMI_RXP(3)
9-
DFGT_VR_EN
11-,20-,32-,39-
MCH_CFG(16)
MCH_CFG(9)
MCH_CFG(7)
MCH_CFG(5)
15-
CLK_R_DREF
15-
CLK_R_DREF#
15-
SSCLK1_R_DREF
15-
SSCLK1_R_DREF#
15-
CLK_R_PEG_MCH
15-
CLK_R_PEG_MCH#
3232-
32-
15-,20-
32-
CHANGE by
20202020-
26-
M_CLK_DDR0
26-
M_CLK_DDR1
27-
M_CLK_DDR2
27-
M_CLK_DDR3
26-
M_CLK_DDR0#
26-
M_CLK_DDR1#
27-
M_CLK_DDR2#
27-
M_CLK_DDR3#
26-,28-
M_CKE0
26-,28-
M_CKE1
27-,28-
M_CKE2
27-,28-
M_CKE3
26-,28-
M_CS0#
26-,28-
M_CS1#
27-,28-
M_CS2#
27-,28-
M_CS3#
26-,28-
M_ODT0
26-,28-
M_ODT1
27-,28-
M_ODT2
27-,28-
M_ODT3
20-
SM_RCOMP
20-
SM_RCOMP#
20-
SM_RCOMP_VOH
20-
SM_RCOMP_VOL
32-
DMI_TXN(3:0)
32-
DMI_TXP(3:0)
32-
DMI_RXN(3:0)
32-
DMI_RXP(3:0)
CL_CLK0
CL_DATA0
PM_PWROK
CL_RST#0
CLKREQ_R_MCH#
MCH_ICH_SYNC#
Puma_Chen
1
2
1
R180
0402_OPEN
2
+V1.8
8-,10-,12-,20-,23-,24-,26-,27-,47-
1
R593
1K_1%
2
1
1
R592
3K_1%
2
2
1
1
R591
1K_1%
2
2
+V1.25S
8-,24-,34-
1
2
C611
0.1uF_16v
1
2
1
2
R181
0402_OPEN
C149
1
2
0.1uF_16v
C550
0.01uF_16v
C545
0.01uF_16v
R610
1K_1%
R611
392_1%
26-Dec-2008
1
1
R179
R178
0402_OPEN
0402_OPEN
2
2
12-,26-,27-
M_VREF
20-
C551
1
2
2.2uF_6.3v
20-
C546
1
2
2.2uF_6.3v
INVENTEC
TITLE
Vulcain UMA
CRESTLINE-1
CODE
SIZE
D
CS
SHEET
SM_RCOMP_VOH
SM_RCOMP_VOL
DOC. NUMBER
AX1
20 50
REV
000
OF
INV_PWM_3
LCM_BKLTEN
LVDS_VDD_EN
3030-
100K_1%
30-
R9556
100K_1%
For Calero 1.5K
For Crestline 2.4K
29-
CRT_B
29-
CRT_G
29-
CRT_R
75_1%
12
R9553
75_1%
R9554
12
75_1%
12
R9555
CLOSE TO CRESTLINE
9-,10-,11-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-,47-
MCH_HSWING
21-
R9558
1
2
LVDS_DDC_CLK
LVDS_DDC_DATA
1
1
R9557
2
2.4K_1%
2
R9557
For Calero 255 1%
+VCCP
For Crestline 1.3K 0.5%
1
R636
221_1%
2
1
R653
C681
1
100_1%
2
2
LVDSA_CLK#
LVDSB_CLK#
LVDSA_DATA#0
LVDSA_DATA#1
LVDSA_DATA#2
LVDSA_DATA0
LVDSA_DATA1
LVDSA_DATA2
LVDSB_DATA#0
LVDSB_DATA#1
LVDSB_DATA#2
LVDSB_DATA0
LVDSB_DATA1
LVDSB_DATA2
CRT_DDCCLK
CRT_DDCDATA
1
R9559
1.3K_0.5%
2
R9559
MCH_HRCOMP
0.1uF_16v
R9563
10K_5%
3030-
LVDSA_CLK
LVDSB_CLK
R9560
R9561
R9562
CRT_HSYNC
CRT_VSYNC
+V3S
11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-
1
1
R9564
10K_5%
U506-3
2
2
J40
L_BKLT_CTRL
H39
L_BKLT_EN
E39
L_CTRL_CLK
E40
L_CTRL_DATA
C37
L_DDC_CLK
D35
L_DDC_DATA
K40
L_VDD_EN
L41
LVDS_IBG
L43
LVDS_VBG
N41
LVDS_VREFH
N40
150_5%
150_5%
150_5%
LVDS_VREFL
D46
LVDSA_CLK#
C45
LVDSA_CLK
D44
LVDSB_CLK#
E42
LVDSB_CLK
G51
LVDSA_DATA#_0
E51
LVDSA_DATA#_1
F49
LVDSA_DATA#_2
G50
LVDSA_DATA_0
E50
LVDSA_DATA_1
F48
LVDSA_DATA_2
G44
LVDSB_DATA#_0
B47
LVDSB_DATA#_1
B45
LVDSB_DATA#_2
E44
LVDSB_DATA_0
A47
LVDSB_DATA_1
A45
LVDSB_DATA_2
E27
TVA_DAC
G27
TVB_DAC
K27
TVC_DAC
F27
TVA_RTN
J27
TVB_RTN
L27
TVC_RTN
M35
TV_DCONSEL0
P33
TV_DCONSEL1
H32
CRT_BLUE
G32
CRT_BLUE#
K29
CRT_GREEN
J29
CRT_GREEN#
F29
CRT_RED
E29
CRT_RED#
K33
CRT_DDC_CLK
G35
CRT_DDC_DATA
F33
CRT_HSYNC
C32
CRT_TVO_IREF
E33
CRT_VSYNC
LVDS
PCI-EXPRESS GRAPHICS
TV
VGA
30303030-
303030-
303030-
303030-
303030-
12
12
12
292929-
29-
ITL_CRESTLINE_FCBGA_1299P
21-
R635
24.9_1%
12
MCH_HSCOMP#
MCH_HSCOMP
24-
+VCC_PEG
N43
PEG_COMPI
M43
PEG_COMPO
J51
PEG_RX#_0
L51
PEG_RX#_1
N47
PEG_RX#_2
T45
PEG_RX#_3
T50
PEG_RX#_4
U40
PEG_RX#_5
Y44
PEG_RX#_6
Y40
PEG_RX#_7
AB51
PEG_RX#_8
W49
PEG_RX#_9
AD44
PEG_RX#_10
AD40
PEG_RX#_11
AG46
PEG_RX#_12
AH49
PEG_RX#_13
AG45
PEG_RX#_14
AG41
PEG_RX#_15
J50
PEG_RX_0
L50
PEG_RX_1
M47
PEG_RX_2
U44
PEG_RX_3
T49
PEG_RX_4
T41
PEG_RX_5
W45
PEG_RX_6
W41
PEG_RX_7
AB50
PEG_RX_8
Y48
PEG_RX_9
AC45
PEG_RX_10
AC41
PEG_RX_11
AH47
PEG_RX_12
AG49
PEG_RX_13
AH45
PEG_RX_14
AG42
PEG_RX_15
N45
PEG_TX#_0
U39
PEG_TX#_1
U47
PEG_TX#_2
N51
PEG_TX#_3
R50
PEG_TX#_4
T42
PEG_TX#_5
Y43
PEG_TX#_6
W46
PEG_TX#_7
W38
PEG_TX#_8
AD39
PEG_TX#_9
AC46
PEG_TX#_10
AC49
PEG_TX#_11
AC42
PEG_TX#_12
AH39
PEG_TX#_13
AE49
PEG_TX#_14
AH44
PEG_TX#_15
M45
PEG_TX_0
T38
PEG_TX_1
T46
PEG_TX_2
N50
PEG_TX_3
R51
PEG_TX_4
U43
PEG_TX_5
W42
PEG_TX_6
Y47
PEG_TX_7
Y39
PEG_TX_8
AC38
PEG_TX_9
AD47
PEG_TX_10
AC50
PEG_TX_11
AD43
PEG_TX_12
AG39
PEG_TX_13
AE50
PEG_TX_14
AH43
PEG_TX_15
9-,10-,11-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-,47-
21-
54.9_1%
9-,10-,11-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-,47-
R624
21-
54.9_1%
R222
24.9_1%
12
12
R625
12
+VCCP
+VCCP
H_D#(63:0)
Trace need be 10 mils wide
17-
Layout notes:
MCH_HSWING
MCH_HRCOMP
MCH_HSCOMP
MCH_HSCOMP#
H_CPURST#
H_CPUSLP#
+VCCP
9-,10-,11-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-,47-
1
R651
1K_1%
2
1
R650
2K_1%
2
1
2
2121-
2121-
16-,1917-
C679
0.1uF_16v
H_D#(0)
H_D#(1)
H_D#(2)
H_D#(4)
H_D#(5)
H_D#(6)
H_D#(7)
H_D#(8)
H_D#(9)
H_D#(11)
H_D#(12)
H_D#(13)
H_D#(14)
H_D#(15)
H_D#(16)
H_D#(17)
H_D#(18)
H_D#(19)
H_D#(20)
H_D#(21)
H_D#(22)
H_D#(23)
H_D#(24)
H_D#(25)
H_D#(26)
H_D#(27)
H_D#(28)
H_D#(29)
H_D#(30)
H_D#(31)
H_D#(32)
H_D#(33)
H_D#(34)
H_D#(35)
H_D#(36)
H_D#(37)
H_D#(38)
H_D#(39)
H_D#(40)
H_D#(41)
H_D#(42)
H_D#(43)
H_D#(44)
H_D#(45)
H_D#(46)
H_D#(47)
H_D#(48)
H_D#(49)
H_D#(50)
H_D#(51)
H_D#(52)
H_D#(53)
H_D#(54)
H_D#(55)
H_D#(56)
H_D#(57)
H_D#(58)
H_D#(59)
H_D#(60)
H_D#(61)
H_D#(62)
H_D#(63)
U506-1
E2
H_D#_0
G2
H_D#_1
G7
H_D#_2
H_D#(3)
M6
H_D#_3
H7
H_D#_4
H3
H_D#_5
G4
H_D#_6
F3
H_D#_7
N8
H_D#_8
H2
H_D#_9
H_D#(10)
M10
H_D#_10
N12
H_D#_11
N9
H_D#_12
H5
H_D#_13
P13
H_D#_14
K9
H_D#_15
M2
H_D#_16
W10
H_D#_17
Y8
H_D#_18
V4
H_D#_19
M3
H_D#_20
J1
H_D#_21
N5
H_D#_22
N3
H_D#_23
W6
H_D#_24
W9
H_D#_25
N2
H_D#_26
Y7
H_D#_27
Y9
H_D#_28
P4
H_D#_29
W3
H_D#_30
N1
H_D#_31
AD12
H_D#_32
AE3
H_D#_33
AD9
H_D#_34
AC9
H_D#_35
AC7
H_D#_36
AC14
H_D#_37
AD11
H_D#_38
AC11
H_D#_39
AB2
H_D#_40
AD7
H_D#_41
AB1
H_D#_42
Y3
H_D#_43
AC6
H_D#_44
AE2
H_D#_45
AC5
H_D#_46
AG3
H_D#_47
AJ9
H_D#_48
AH8
H_D#_49
AJ14
H_D#_50
AE9
H_D#_51
AE11
H_D#_52
AH12
H_D#_53
AJ5
H_D#_54
AH5
H_D#_55
AJ6
H_D#_56
AE7
H_D#_57
AJ7
H_D#_58
AJ2
H_D#_59
AE5
H_D#_60
AJ3
H_D#_61
AH2
H_D#_62
AH13
H_D#_63
B3
H_SWING
C2
H_RCOMP
W1
H_SCOMP
W2
H_SCOMP#
B6
H_CPURST#
E5
H_CPUSLP#
B9
H_AVREF
A9
H_DVREF
ITL_CRESTLINE_FCBGA_1299P
CHANGE by
H_A#_3
H_A#_4
H_A#_5
H_A#_6
H_A#_7
H_A#_8
H_A#_9
H_A#_10
H_A#_11
H_A#_12
H_A#_13
H_A#_14
H_A#_15
H_A#_16
H_A#_17
H_A#_18
H_A#_19
H_A#_20
H_A#_21
H_A#_22
H_A#_23
H_A#_24
H_A#_25
H_A#_26
H_A#_27
H_A#_28
H_A#_29
H_A#_30
HOST
H_A#_31
H_A#_32
H_A#_33
H_A#_34
H_A#_35
H_ADS#
H_ADSTB#_0
H_ADSTB#_1
H_BNR#
H_BPRI#
H_BREQ#
H_DEFER#
H_DBSY#
HPLL_CLK
HPLL_CLK#
H_DPWR#
H_DRDY#
H_HIT#
H_HITM#
H_LOCK#
H_TRDY#
H_DINV#_0
H_DINV#_1
H_DINV#_2
H_DINV#_3
H_DSTBN#_0
H_DSTBN#_1
H_DSTBN#_2
H_DSTBN#_3
H_DSTBP#_0
H_DSTBP#_1
H_DSTBP#_2
H_DSTBP#_3
H_REQ#_0
H_REQ#_1
H_REQ#_2
H_REQ#_3
H_REQ#_4
H_RS#_0
H_RS#_1
H_RS#_2
J13
B11
C11
M11
C15
F16
L13
G17
C14
K16
B13
L16
J17
B14
K19
P15
R17
B16
H20
L19
D17
M17
N16
J19
B18
E19
B17
B15
E17
C18
A19
B19
N19
G12
H17
G20
C8
E8
F12
D6
C10
AM5
AM7
H8
K7
E4
C6
G10
B7
K5
L2
AD13
AE13
M7
K3
AD2
AH11
L7
K2
AC2
AJ10
M14
E13
A11
H13
B12
E12
D7
D8
H_A#(3)
H_A#(4)
H_A#(5)
H_A#(6)
H_A#(7)
H_A#(8)
H_A#(9)
H_A#(10)
H_A#(11)
H_A#(12)
H_A#(13)
H_A#(14)
H_A#(15)
H_A#(16)
H_A#(17)
H_A#(18)
H_A#(19)
H_A#(20)
H_A#(21)
H_A#(22)
H_A#(23)
H_A#(24)
H_A#(25)
H_A#(26)
H_A#(27)
H_A#(28)
H_A#(29)
H_A#(30)
H_A#(31)
H_A#(32)
H_A#(33)
H_A#(34)
H_A#(35)
26-Dec-2008 Puma_Chen
17171717-
17171717-
17171717-
16161616161616161515171616161616-
H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3
H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3
H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3
16-
H_A#(35:3)
H_ADS#
H_ADSTB#0
H_ADSTB#1
H_BNR#
H_BPRI#
H_BREQ#0
H_DEFER#
H_DBSY#
CLK_R_MCHBCLK
CLK_R_MCHBCLK#
H_DPWR#
H_DRDY#
H_HIT#
H_HITM#
H_LOCK#
H_TRDY#
16-
H_REQ#(0)
H_REQ#(1)
H_REQ#(2)
H_REQ#(3)
H_REQ#(4)
H_RS#(0)
H_RS#(1)
H_RS#(2)
INVENTEC
TITLE
Vulcain UMA
Crestline-2
CODE DOC. NUMBER
SIZE
D
CS
SHEET
H_REQ#(4:0)
16-
H_RS#(2:0)
OF
21 50
REV
000 AX1
MA_DATA(63:0)
26-
U506-4
AR43
SA_DQ0
AW44
SA_DQ1
BA45
SA_DQ2
AY46
SA_DQ3
AR41
SA_DQ4
AR45
SA_DQ5
AT42
SA_DQ6
AW47
SA_DQ7
BB45
SA_DQ8
BF48
SA_DQ9
BG47
SA_DQ10
BJ45
SA_DQ11
BB47
SA_DQ12
BG50
SA_DQ13
BH49
SA_DQ14
BE45
SA_DQ15
AW43
SA_DQ16
BE44
SA_DQ17
BG42
SA_DQ18
BE40
SA_DQ19
BF44
SA_DQ20
BH45
SA_DQ21
BG40
SA_DQ22
BF40
SA_DQ23
AR40
SA_DQ24
AW40
SA_DQ25
AT39
SA_DQ26
AW36
SA_DQ27
AW41
SA_DQ28
AY41
SA_DQ29
AV38
SA_DQ30
AT38
SA_DQ31
AV13
SA_DQ32
AT13
SA_DQ33
AW11
SA_DQ34
AV11
SA_DQ35
AU15
SA_DQ36
AT11
SA_DQ37
BA13
SA_DQ38
BA11
SA_DQ39
BE10
SA_DQ40
BD10
SA_DQ41
BD8
SA_DQ42
AY9
SA_DQ43
BG10
SA_DQ44
AW9
SA_DQ45
BD7
SA_DQ46
BB9
SA_DQ47
BB5
SA_DQ48
AY7
SA_DQ49
AT5
SA_DQ50
AT7
SA_DQ51
AY6
SA_DQ52
BB7
SA_DQ53
AR5
SA_DQ54
AR8
SA_DQ55
AR9
SA_DQ56
AN3
SA_DQ57
AM8
SA_DQ58
AN10
SA_DQ59
AT9
SA_DQ60
AN9
SA_DQ61
AM9
SA_DQ62
AN11
SA_DQ63
ITL_CRESTLINE_FCBGA_1299P
SA_DQS#_0
SA_DQS#_1
SA_DQS#_2
SA_DQS#_3
SA_DQS#_4
SA_DQS#_5
SA_DQS#_6
SA_DQS#_7
DDR SYSTEM MEMORY A
SA_RCVEN#
BB19 26-,28-
SA_BS_0
BK19
SA_BS_1
BF29
SA_BS_2
SA_CAS#
SA_DM_0
SA_DM_1
SA_DM_2
SA_DM_3
SA_DM_4
SA_DM_5
SA_DM_6
SA_DM_7
SA_DQS_0
SA_DQS_1
SA_DQS_2
SA_DQS_3
SA_DQS_4
SA_DQS_5
SA_DQS_6
SA_DQS_7
SA_MA_0
SA_MA_1
SA_MA_2
SA_MA_3
SA_MA_4
SA_MA_5
SA_MA_6
SA_MA_7
SA_MA_8
SA_MA_9
SA_MA_10
SA_MA_11
SA_MA_12
SA_MA_13
SA_RAS#
SA_WE#
BL17
AT45
BD44
BD42
AW38
AW13
BG8
AY5
AN6
AT46
BE48
BB43
BC37
BB16
BH6
BB2
AP3
AT47
BD47
BC41
BA37
BA16
BH7
BC1
AP2
BJ19
BD20
BK27
BH28
BL24
BK28
BJ27
BJ25
BL28
BA28
BC19
BE28
BG30
BJ16
BE18
AY20
BA19
26-,28-
TP28
MA_CAS#
MA_DM(0)
MA_DM(1)
MA_DM(2)
MA_DM(3)
MA_DM(4)
MA_DM(5)
MA_DM(6)
MA_DM(7)
MA_DQS(0)
MA_DQS(1)
MA_DQS(2)
MA_DQS(3)
MA_DQS(4)
MA_DQS(5)
MA_DQS(6)
MA_DQS(7)
MA_DQS#(0)
MA_DQS#(1)
MA_DQS#(2)
MA_DQS#(3)
MA_DQS#(4)
MA_DQS#(5)
MA_DQS#(6)
MA_DQS#(7)
MA_A(0)
MA_A(1)
MA_A(2)
MA_A(3)
MA_A(4)
MA_A(5)
MA_A(6)
MA_A(7)
MA_A(8)
MA_A(9)
MA_A(10)
MA_A(11)
MA_A(12)
MA_A(13)
26-,2826-,28-
26-,28-
26-,28-
MA_BS0#
MA_BS1#
MA_BS2#
26-
26-
26-
26-,28-
MA_RAS#
MA_WE#
MB_DATA(63:0)
MA_DM(7:0)
MA_DQS(7:0)
MA_DQS#(7:0)
MA_A(13:0)
27-
U506-5
AP49
SB_DQ0
AR51
SB_DQ1
AW50
SB_DQ2
AW51
SB_DQ3
AN51
SB_DQ4
AN50
SB_DQ5
AV50
SB_DQ6
AV49
SB_DQ7
BA50
SB_DQ8
BB50
SB_DQ9
BA49
SB_DQ10
BE50
SB_DQ11
BA51
SB_DQ12
AY49
SB_DQ13
BF50
SB_DQ14
BF49
SB_DQ15
BJ50
SB_DQ16
BJ44
SB_DQ17
BJ43
SB_DQ18
BL43
SB_DQ19
BK47
SB_DQ20
BK49
SB_DQ21
BK43
SB_DQ22
BK42
SB_DQ23
BJ41
SB_DQ24
BL41
SB_DQ25
BJ37
SB_DQ26
BJ36
SB_DQ27
BK41
SB_DQ28
BJ40
SB_DQ29
BL35
SB_DQ30
BK37
SB_DQ31
BK13
SB_DQ32
BE11
SB_DQ33
BK11
SB_DQ34
BC11
SB_DQ35
BC13
SB_DQ36
BE12
SB_DQ37
BC12
SB_DQ38
BG12
SB_DQ39
BJ10
SB_DQ40
BL9
SB_DQ41
BK5
SB_DQ42
BL5
SB_DQ43
BK9
SB_DQ44
BK10
SB_DQ45
BJ8
SB_DQ46
BJ6
SB_DQ47
BF4
SB_DQ48
BH5
SB_DQ49
BG1
SB_DQ50
BC2
SB_DQ51
BK3
SB_DQ52
BE4
SB_DQ53
BD3
SB_DQ54
BJ2
SB_DQ55
BA3
SB_DQ56
BB3
SB_DQ57
AR1
SB_DQ58
AT3
SB_DQ59
AY2
SB_DQ60
AY3
SB_DQ61
AU2
SB_DQ62
AT2
SB_DQ63
ITL_CRESTLINE_FCBGA_1299P
SB_DQS_0
SB_DQS_1
SB_DQS_2
SB_DQS_3
SB_DQS_4
SB_DQS_5
SB_DQS_6
SB_DQS_7
SB_DQS#_0
SB_DQS#_1
SB_DQS#_2
SB_DQS#_3
SB_DQS#_4
SB_DQS#_5
SB_DQS#_6
SB_DQS#_7
DDR SYSTEM MEMORY B
SB_MA_10
SB_MA_11
SB_MA_12
SB_MA_13
SB_RCVEN#
SB_BS_0
SB_BS_1
SB_BS_2
SB_CAS#
SB_DM_0
SB_DM_1
SB_DM_2
SB_DM_3
SB_DM_4
SB_DM_5
SB_DM_6
SB_DM_7
SB_MA_0
SB_MA_1
SB_MA_2
SB_MA_3
SB_MA_4
SB_MA_5
SB_MA_6
SB_MA_7
SB_MA_8
SB_MA_9
SB_RAS#
SB_WE#
AY17
BG18
BG36
BE17
AR50
BD49
BK45
BL39
BH12
BJ7
BF3
AW2
AT50
BD50
BK46
BK39
BJ12
BL7
BE2
AV2
AU50
BC50
BL45
BK38
BK12
BK7
BF2
AV3
BC18
BG28
BG25
AW17
BF25
BE25
BA29
BC28
AY28
BD37
BG17
BE37
BA39
BG13
AV16
AY18
BC17
27-,28-
MB_CAS#
TP29
MB_A(0)
MB_A(1)
MB_A(2)
MB_A(3)
MB_A(4)
MB_A(5)
MB_A(6)
MB_A(7)
MB_A(8)
MB_A(9)
MB_A(10)
MB_A(11)
MB_A(12)
MB_A(13)
27-,28-
27-,28-
27-,2827-,2827-,28-
27-
27-
27-,28-
MB_RAS#
MB_WE#
27-
MB_DQS(7:0)
MB_DQS#(7:0)
MB_A(13:0)
MB_BS0#
MB_BS1#
MB_BS2#
MB_DM(7:0)
INVENTEC
TITLE
Vulcain UMA
CRESTLINE-3
SIZEOFCODE DOC. NUMBER REV
D
CHANGE by SHEET
Puma_Chen
26-Dec-2008
CS
AX1
000
50 22
+VCCP
9-,10-,11-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-,47-
+V1.8
8-,10-,12-,20-,23-,24-,26-,27-,47-
+VGFX_CORE
9-,23-
AH28
AC32
AC31
AK32
AH32
AH31
AH29
AU32
AU33
AU35
AV33
AW33
AW35
AY35
BA32
BA33
BA35
BB33
BC32
BC33
BC35
BD32
BD35
BE32
BE33
BE35
BG32
BG33
BG35
BH32
BH34
BH35
BK32
BK33
BK34
BK35
AU30
AA20
AA23
AA26
AA28
AB21
AB24
AB29
AC20
AC21
AC23
AC24
AC26
AC28
AC29
AD20
AD23
AD24
AD28
AA31
AH20
AH21
AH23
AH24
AH26
AD31
AN14
AT35
AT34
AJ31
AJ28
AF32
BF33
BF34
BJ32
BJ33
BJ34
BL33
AF21
AF26
AJ20
W13
W14
U506-7
R30
R20
T14
Y12
VCC_1
VCC_2
VCC_3
VCC_4
VCC_5
VCC_6
VCC_7
VCC_8
VCC_9
VCC_10
VCC_11
VCC_12
VCC_13
VCC_SM_1
VCC_SM_2
VCC_SM_3
VCC_SM_4
VCC_SM_5
VCC_SM_6
VCC_SM_7
VCC_SM_8
VCC_SM_9
VCC_SM_10
VCC_SM_11
VCC_SM_12
VCC_SM_13
VCC_SM_14
VCC_SM_15
VCC_SM_16
VCC_SM_17
VCC_SM_18
VCC_SM_19
VCC_SM_20
VCC_SM_21
VCC_SM_22
VCC_SM_23
VCC_SM_24
VCC_SM_25
VCC_SM_26
VCC_SM_27
VCC_SM_28
VCC_SM_29
VCC_SM_30
VCC_SM_31
VCC_SM_32
VCC_SM_33
VCC_SM_34
VCC_SM_35
VCC_SM_36
VCC_AXG_1
VCC_AXG_2
VCC_AXG_3
VCC_AXG_4
VCC_AXG_5
VCC_AXG_6
VCC_AXG_7
VCC_AXG_8
VCC_AXG_9
VCC_AXG_10
VCC_AXG_11
VCC_AXG_12
VCC_AXG_13
VCC_AXG_14
VCC_AXG_15
VCC_AXG_16
VCC_AXG_17
VCC_AXG_18
VCC_AXG_19
VCC_AXG_20
VCC_AXG_21
VCC_AXG_22
VCC_AXG_23
VCC_AXG_24
VCC_AXG_25
VCC_AXG_26
VCC_AXG_27
VCC_AXG_28
VCC_AXG_29
VCC_AXG_30
VCC_AXG_31
VCC_AXG_32
VCC_AXG_33
VCC_AXG_34
VCC_AXG_NCTF_1
VCC_AXG_NCTF_2
VCC_AXG_NCTF_3
VCC_AXG_NCTF_4
VCC_AXG_NCTF_5
VCC_AXG_NCTF_6
VCC_AXG_NCTF_7
VCC_AXG_NCTF_8
VCC_AXG_NCTF_9
VCC_AXG_NCTF_10
VCC_AXG_NCTF_11
VCC_AXG_NCTF_12
VCC_AXG_NCTF_13
VCC_AXG_NCTF_14
VCC_AXG_NCTF_15
VCC_AXG_NCTF_16
VCC_AXG_NCTF_17
VCC_AXG_NCTF_18
VCC_AXG_NCTF_19
VCC_AXG_NCTF_20
VCC_AXG_NCTF_21
VCC_AXG_NCTF_22
VCC_AXG_NCTF_23
VCC_AXG_NCTF_24
VCC_AXG_NCTF_25
VCC_AXG_NCTF_26
POWER
VCC_AXG_NCTF_27
VCC_AXG_NCTF_28
VCC_AXG_NCTF_29
VCC_AXG_NCTF_30
VCC_AXG_NCTF_31
VCC_AXG_NCTF_32
VCC_AXG_NCTF_33
VCC_AXG_NCTF_34
VCC_AXG_NCTF_35
VCC_AXG_NCTF_36
VCC_AXG_NCTF_37
VCC_AXG_NCTF_38
VCC_AXG_NCTF_39
VCC_AXG_NCTF_40
VCC_AXG_NCTF_41
VCC_AXG_NCTF_42
VCC_AXG_NCTF_43
VCC_AXG_NCTF_44
VCC_AXG_NCTF_45
VCC_AXG_NCTF_46
VCC_AXG_NCTF_47
VCC_AXG_NCTF_48
VCC_AXG_NCTF_49
VCC_AXG_NCTF_50
VCC_AXG_NCTF_51
VCC_AXG_NCTF_52
VCC_AXG_NCTF_53
VCC_AXG_NCTF_54
VCC_AXG_NCTF_55
VCC_AXG_NCTF_56
VCC_AXG_NCTF_57
VCC_AXG_NCTF_58
VCC_AXG_NCTF_59
VCC_AXG_NCTF_60
VCC_AXG_NCTF_61
VCC_AXG_NCTF_62
VCC_AXG_NCTF_63
VCC_AXG_NCTF_64
VCC_AXG_NCTF_65
VCC_AXG_NCTF_66
VCC_AXG_NCTF_67
VCC_AXG_NCTF_68
VCC_AXG_NCTF_69
VCC_AXG_NCTF_70
VCC_AXG_NCTF_71
VCC_AXG_NCTF_72
VCC_AXG_NCTF_73
VCC_AXG_NCTF_74
VCC_AXG_NCTF_75
VCC_AXG_NCTF_76
VCC_AXG_NCTF_77
VCC_AXG_NCTF_78
VCC_AXG_NCTF_79
VCC_AXG_NCTF_80
VCC_AXG_NCTF_81
VCC_AXG_NCTF_82
VCC_AXG_NCTF_83
ITL_CRESTLINE_FCBGA_1299P
VCC_SM_LF1
VCC_SM_LF2
VCC_SM_LF3
VCC_SM_LF4
VCC_SM_LF5
VCC_SM_LF6
VCC_SM_LF7
+VGFX_CORE
T17
T18
T19
T21
T22
T23
T25
U15
U16
U17
U19
U20
U21
U23
U26
V16
V17
V19
V20
V21
V23
V24
Y15
Y16
Y17
Y19
Y20
Y21
Y23
Y24
Y26
Y28
Y29
AA16
AA17
AB16
AB19
AC16
AC17
AC19
AD15
AD16
AD17
AF16
AF19
AH15
AH16
AH17
AH19
AJ16
AJ17
AJ19
AK16
AK19
AL16
AL17
AL19
AL20
AL21
AL23
AM15
AM16
AM19
AM20
AM21
AM23
AP15
AP16
AP17
AP19
AP20
AP21
AP23
AP24
AR20
AR21
AR23
AR24
AR26
V26
V28
V29
Y31
AW45
BC39
BE39
BD17
BD4
AW8
AT6
1
2
9-,23-
C134
0.1uF_16v
1
2
1
2
C135
0.1uF_16v
C1001
220uF_2.5v
370 mils from the Edge
C110
1
2
0.22uF_10v
+VCCP
9-,10-,11-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-,47-
1
C634
2
220uF_2.5v
308 mils from
the Edge
+VGFX_CORE
9-,23-
1
C1002
2
220uF_2.5v
+VCCP
9-,10-,11-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-,47-
C306
1
2
22uF_6.3v
1
2
1
2
1
2
C564
0.1uF_16v
C307
0.22uF_10v
PLACE THE EDGE
C111
1
2
0.22uF_10v
C147
1
2
0.47uF_6.3v
C1003
C141
1
2
22uF_6.3v
Cavity Capacitors
C1004
1
2
1
C563
2
220uF_2.5v
C298
1
2
0.22uF_10v
C145
1
2
1uF_10v
C186
1
2
0.22uF_10v
C1005
1
2
22uF_6.3v
Cavity Capacitors
+V1.8
8-,10-,12-,20-,23-,24-,26-,27-,47-
C566
1
2
22uF_6.3v
C146
1
2
0.1uF_16v
C148
1
2
1uF_10v
C143
1
2
0.22uF_10v
C1006
1
2
0.1uF_16v 0.47uF_6.3v
C565
1
2
22uF_6.3v
C187
1
2
0.1uF_16v
Cavity Capacitors
U506-6
AB33
VCC_NCTF_1
AB36
VCC_NCTF_2
AB37
VCC_NCTF_3
AM35
AM26
AM28
AM29
AM31
AM32
AM33
AC33
AC35
AC36
AD35
AD36
AF33
AF36
AH33
AH35
AH36
AH37
AJ33
AJ35
AK33
AK35
AK36
AK37
AD33
AJ36
AL33
AL35
AA33
AA35
AA36
AP35
AP36
AR35
AR36
AL24
AL26
AL28
AP29
AP31
AP32
AP33
AL29
AL31
AL32
AR31
AR32
AR33
Y32
Y33
Y35
Y36
Y37
T30
T34
T35
U29
U31
U32
U33
U35
U36
V32
V33
V36
V37
VCC_NCTF_4
VCC_NCTF_5
VCC_NCTF_6
VCC_NCTF_7
VCC_NCTF_8
VCC_NCTF_9
VCC_NCTF_10
VCC_NCTF_11
VCC_NCTF_12
VCC_NCTF_13
VCC_NCTF_14
VCC_NCTF_15
VCC_NCTF_16
VCC_NCTF_17
VCC_NCTF_18
VCC_NCTF_19
VCC_NCTF_20
VCC_NCTF_21
VCC_NCTF_22
VCC_NCTF_23
VCC_NCTF_24
VCC_NCTF_25
VCC_NCTF_26
VCC_NCTF_27
VCC_NCTF_28
VCC_NCTF_29
VCC_NCTF_30
VCC_NCTF_31
VCC_NCTF_32
VCC_NCTF_33
VCC_NCTF_34
VCC_NCTF_35
VCC_NCTF_36
VCC_NCTF_37
VCC_NCTF_38
VCC_NCTF_39
VCC_NCTF_40
VCC_NCTF_41
VCC_NCTF_42
VCC_NCTF_43
VCC_NCTF_44
VCC_NCTF_45
VCC_NCTF_46
VCC_NCTF_47
VCC_NCTF_48
VCC_NCTF_49
VCC_NCTF_50
VCC_AXM_NCTF_1
VCC_AXM_NCTF_2
VCC_AXM_NCTF_3
VCC_AXM_NCTF_4
VCC_AXM_NCTF_5
VCC_AXM_NCTF_6
VCC_AXM_NCTF_7
VCC_AXM_NCTF_8
VCC_AXM_NCTF_9
VCC_AXM_NCTF_10
VCC_AXM_NCTF_11
VCC_AXM_NCTF_12
VCC_AXM_NCTF_13
VCC_AXM_NCTF_14
VCC_AXM_NCTF_15
VCC_AXM_NCTF_16
VCC_AXM_NCTF_17
VCC_AXM_NCTF_18
VCC_AXM_NCTF_19
POWER
C144
1
2
0.1uF_16v
C1007
1
2
0.1uF_16v 1uF_10v
C185
1
2
0.1uF_16v
VSS_NCTF_1
VSS_NCTF_2
VSS_NCTF_3
VSS_NCTF_4
VSS_NCTF_5
VSS_NCTF_6
VSS_NCTF_7
VSS_NCTF_8
VSS_NCTF_9
VSS_NCTF_10
VSS_NCTF_11
VSS_NCTF_12
VSS_NCTF_13
VSS_NCTF_14
VSS_NCTF_15
VSS_NCTF_16
VSS_NCTF_17
VSS_NCTF_18
VSS_NCTF_19
VSS_NCTF_20
VSS_NCTF_21
VSS_SCB1
VSS_SCB2
VSS_SCB3
VSS_SCB4
VSS_SCB5
VSS_SCB6
VCC_AXM_1
VCC_AXM_2
VCC_AXM_3
VCC_AXM_4
VCC_AXM_5
VCC_AXM_6
VCC_AXM_7
T27
T37
U24
U28
V31
V35
AA19
AB17
AB35
AD19
AD37
AF17
AF35
AK17
AM17
AM24
AP26
AP28
AR15
AR19
AR28
A3
B2
C1
BL1
BL51
A51
AT33
AT31
AK29
AK24
AK23
AJ26
AJ23
+VCCP
9-,10-,11-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-,47-
ITL_CRESTLINE_FCBGA_1299P
INVENTEC
TITLE
Vulcain UMA
CRESTLINE-4
SIZE
CHANGE by
Puma_Chen
26-Dec-2008
CODE
DOC. NUMBER
AX1
D
CS
SHEET
23 50
REV
000
OF
+V1.25S
8-,20-,24-,34-
+V1.25S
L523
12
BLM11P600S
8-,20-,24-,34-
L505
12
BLM11A121S
L502
12
BLM11A121S
L9
12
BLM18PG121SN1
8-,20-,24-,34-
11-,13-,14-,15-,19-,20-,21-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-
+V1.5S
10-,13-,18-,34-,45-,46-
C237
1
2
0.1uF_16v
1
2
1
C616
2
22uF_6.3v
1
C615
2
22uF_6.3v
1
2
C238
1
2
0.022uF_16v
24-
C1008
470uF_2.5V
C284
0.1uF_16v
+V1.25S
1
C84
2
+VCCA_TVDAC
C1009
1
2
0.1uF_16v
C1010
1
2
0.1uF_16v
C614
1
2
0.1uF_16v
C613
1
2
0.1uF_16v
+V1.25S
8-,20-,24-,34-
1
C87
2
47uF_6.3V
47uF_6.3V
BLM18PG181SN1J
+V1.25S_PEGPLL
11-,13-,14-,15-,19-,20-,21-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-
+V3S
12
L526
1
BLM18PG181SN1J
C9814
2
0402_OPEN
11-,13-,14-,15-,19-,20-,21-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-
0.1uF_16v
1
1
2
C1014
2
0402_OPEN
C1011
1
2
0.1uF_16v
11-,13-,14-,15-,19-,20-,21-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-
+V1.25S_PEGPLL
24-
C138
1uF_6.3v
L525
C1012
0.1uF_16v
C136
1
2
4.7uF_6.3v
1
2
+VCCA_TVDAC
1
2
+V1.25S
8-,20-,24-,34-
C612
1
2
0.1uF_16v
1
2
+V3S
BLM18PG181SN1J
L524
12
24-
C190
1
2
0.1uF_16v
C86
22uF_6.3v
1
2
12
1
2
C140
1uF_6.3v
24-
C1013
10uF_6.3v
+V3S
1
2
C677
0.1uF_16v
C85
1
2
22uF_6.3v
1
2
8-,10-,12-,20-,23-,24-,26-,27-,47-
C1018
1000pF_50v
C113
1
2
22uF_6.3v
C1015
0.1uF_16v
+V3S
C1020
C9815
1
2
+V1.8
1
2
C142
1
2
1uF_6.3v
C112
1
2
0.1uF_16v
C1019
C1016
1
1
2
2
8-,10-,12-,20-,23-,24-,26-,27-,47-
0.1uF_16v
+V1.8
C1017
1
2
0.1uF_16v
0.1uF_16v
0.1uF_16v
1
2
C1021
10uF_6.3v
U506-8
J32
VCCSYNC
A33
VCCA_CRT_DAC_1
B33
VCCA_CRT_DAC_2
A30
VCCA_DAC_BG
B32
VSSA_DAC_BG
B49
VCCA_DPLLA
H49
VCCA_DPLLB
AL2
VCCA_HPLL
AM2
VCCA_MPLL
A41
VCCA_LVDS
B41
VSSA_LVDS
K50
VCCA_PEG_BG
K49
VSSA_PEG_BG
U51
VCCA_PEG_PLL
AW18
VCCA_SM_1
AV19
VCCA_SM_2
AU19
VCCA_SM_3
AU18
VCCA_SM_4
AU17
VCCA_SM_5
AT22
VCCA_SM_7
AT21
VCCA_SM_8
AT19
VCCA_SM_9
AT18
VCCA_SM_10
AT17
VCCA_SM_11
AR17
VCCA_SM_NCTF_1
AR16
VCCA_SM_NCTF_2
BC29
VCCA_SM_CK_1
BB29
VCCA_SM_CK_2
C25
VCCA_TVA_DAC_1
B25
VCCA_TVA_DAC_2
C27
VCCA_TVB_DAC_1
B27
VCCA_TVB_DAC_2
B28
VCCA_TVC_DAC_1
A28
VCCA_TVC_DAC_2
M32
VCCD_CRT
L29
VCCD_TVDAC
N28
VCCD_QDAC
AN2
VCCD_HPLL
U48
VCCD_PEG_PLL
J41
VCCD_LVDS_1
H42
VCCD_LVDS_2
ITL_CRESTLINE_FCBGA_1299P
VCC_AXD_NCTF
POWER
VCC_SM_CK_1
VCC_SM_CK_2
VCC_SM_CK_3
VCC_SM_CK_4
VCC_RXR_DMI_1
VCC_RXR_DMI_2
VTT_1
VTT_2
VTT_3
VTT_4
VTT_5
VTT_6
VTT_7
VTT_8
VTT_9
VTT_10
VTT_11
VTT_12
VTT_13
VTT_14
VTT_15
VTT_16
VTT_17
VTT_18
VTT_19
VTT_20
VTT_21
VTT_22
VCC_AXD_1
VCC_AXD_2
VCC_AXD_3
VCC_AXD_4
VCC_AXD_5
VCC_AXD_6
VCC_AXF_1
VCC_AXF_2
VCC_AXF_3
VCC_DMI
VCC_TX_LVDS
VCC_HV_1
VCC_HV_2
VCC_PEG_1
VCC_PEG_2
VCC_PEG_3
VCC_PEG_4
VCC_PEG_5
VTTLF1
VTTLF2
VTTLF3
U13
U12
U11
U9
U8
U7
U5
U3
U2
U1
T13
T11
T10
T9
T7
T6
T5
T3
T2
R3
R2
R1
AT23
AU28
AU24
AT29
AT25
AT30
AR29
B23
B21
A21
AJ50
BK24
BK23
BJ24
BJ23
11-,13-,14-,15-,19-,20-,21-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-
A43
C40
B40
AD51
W50
W51
V49
V50
AH50
AH51
A7
F2
AH1
C653
C680
1
1
C183
2
0.47uF_6.3v
1
2
0.47uF_6.3v
2
0.47uF_6.3v
C239
0.1uF_16v
1
2
1
2
C139
1uF_10v
C283
1uF_10v
1
2
C184
4.7uF_6.3v
1
2
1
2
Place on the Edge
C137
1
2
22uF_6.3v
C678
1
2
10uF_6.3v
+V3S
1
R221
10_5%
2
D13
+VCCP
13
CHENMKO_BAT54_3P
C584
1
2
10uF_6.3v
C189
2.2uF_16V
+V1.25S
1
2
8-,20-,24-,34-
C188
0.47uF_6.3v
1
2
+V1.25S
8-,20-,24-,34-
+V1.25S
8-,20-,24-,34-
1
2
C585
1
2
0.1uF_16v
C1042
1
2
1000pF_50v
9-,10-,11-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-,47-
1
C285
2
220uF_2.5v
21-
1
C286
2
220uF_2.5v
9-,10-,11-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-,47-
+VCCP
C654
220uF_2.5v
C633
0.1uF_16v
+V1.8
8-,10-,12-,20-,23-,24-,26-,27-,47-
C586
1
2
22uF_6.3v
+V1.8
8-,10-,12-,20-,23-,24-,26-,27-,47-
1
C1043
2
220uF_2.5v
+VCC_PEG
R573
12
0_5%_OPEN
9-,10-,11-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-,47-
R223
12
0_5%
+V1.25S
+VCCP
8-,20-,24-,34-
INVENTEC
TITLE
Vulcain UMA
Cresline-5
SIZE CODE REV
CHANGE by OF
Puma_Chen 26-Dec-2008
D
CS
SHEET
DOC. NUMBER
AX1
000
50 24
U506-9
A13
VSS_1
A15
VSS_2
A17
VSS_3
A24
VSS_4
AA21
VSS_5
AA24
VSS_6
AA29
VSS_7
AB20
VSS_8
AB23
VSS_9
AB26
VSS_10
AB28
VSS_11
AB31
VSS_12
AC10
VSS_13
AC13
VSS_14
AC3
VSS_15
AC39
VSS_16
AC43
VSS_17
AC47
VSS_18
AD1
VSS_19
AD21
VSS_20
AD26
VSS_21
AD29
VSS_22
AD3
VSS_23
AD41
VSS_24
AD45
VSS_25
AD49
VSS_26
AD5
VSS_27
AD50
VSS_28
AD8
VSS_29
AE10
VSS_30
AE14
VSS_31
AE6
VSS_32
AF20
VSS_33
AF23
VSS_34
AF24
VSS_35
AF31
VSS_36
AG2
VSS_37
AG38
VSS_38
AG43
VSS_39
AG47
VSS_40
AG50
VSS_41
AH3
VSS_42
AH40
VSS_43
AH41
VSS_44
AH7
VSS_45
AH9
VSS_46
AJ11
VSS_47
AJ13
VSS_48
AJ21
VSS_49
AJ24
VSS_50
AJ29
VSS_51
AJ32
VSS_52
AJ43
VSS_53
AJ45
VSS_54
AJ49
VSS_55
AK20
VSS_56
AK21
VSS_57
AK26
VSS_58
AK28
VSS_59
AK31
VSS_60
AK51
VSS_61
AL1
VSS_62
AM11
VSS_63
AM13
VSS_64
AM3
VSS_65
AM4
VSS_66
AM41
VSS_67
AM45
VSS_68
AN1
VSS_69
AN38
VSS_70
AN39
VSS_71
AN43
VSS_72
AN5
VSS_73
AN7
VSS_74
AP4
VSS_75
AP48
VSS_76
AP50
VSS_77
AR11
VSS_78
AR2
VSS_79
AR39
VSS_80
AR44
VSS_81
AR47
VSS_82
AR7
VSS_83
AT10
VSS_84
AT14
VSS_85
AT41
VSS_86
AT49
VSS_87
AU1
VSS_88
AU23
VSS_89
AU29
VSS_90
AU3
VSS_91
AU36
VSS_92
AU49
VSS_93
AU51
VSS_94
AV39
VSS_95
AV48
VSS_96
AW1
VSS_97
AW12
VSS_98
AW16
VSS_99
ITL_CRESTLINE_FCBGA_1299P
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
VSS_165
VSS_166
VSS_167
VSS_168
VSS_169
VSS_170
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
VSS_180
VSS_181
VSS_182
VSS_183
VSS_184
VSS_185
VSS_186
VSS_187
VSS_188
VSS_189
VSS_190
VSS_191
VSS_192
VSS_193
VSS_194
VSS_195
VSS_196
VSS_197
VSS_198
AW24
AW29
AW32
AW5
AW7
AY10
AY24
AY37
AY42
AY43
AY45
AY47
AY50
B10
B20
B24
B29
B30
B35
B38
B43
B46
B5
B8
BA1
BA17
BA18
BA2
BA24
BB12
BB25
BB40
BB44
BB49
BB8
BC16
BC24
BC25
BC36
BC40
BC51
BD13
BD2
BD28
BD45
BD48
BD5
BE1
BE19
BE23
BE30
BE42
BE51
BE8
BF12
BF16
BF36
BG19
BG2
BG24
BG29
BG39
BG48
BG5
BG51
BH17
BH30
BH44
BH46
BH8
BJ11
BJ13
BJ38
BJ4
BJ42
BJ46
BK15
BK17
BK25
BK29
BK36
BK40
BK44
BK6
BK8
BL11
BL13
BL19
BL22
BL37
BL47
C12
C16
C19
C28
C29
C33
C36
C41
U506-10
C46
VSS_199
C50
VSS_200
C7
VSS_201
D13
VSS_202
D24
VSS_203
D3
VSS_204
D32
VSS_205
D39
VSS_206
D45
VSS_207
D49
VSS_208
E10
VSS_209
E16
VSS_210
E24
VSS_211
E28
VSS_212
E32
VSS_213
E47
VSS_214
F19
VSS_215
F36
VSS_216
F4
VSS_217
F40
VSS_218
F50
VSS_219
G1
VSS_220
G13
VSS_221
G16
VSS_222
G19
VSS_223
G24
VSS_224
G28
VSS_225
G29
VSS_226
G33
VSS_227
G42
VSS_228
G45
VSS_229
G48
VSS_230
G8
VSS_231
H24
VSS_232
H28
VSS_233
H4
VSS_234
H45
VSS_235
J11
VSS_236
J16
VSS_237
J2
VSS_238
J24
VSS_239
J28
VSS_240
J33
VSS_241
J35
VSS_242
J39
VSS_243
K12
VSS_245
K47
VSS_246
K8
VSS_247
L1
VSS_248
L17
VSS_249
L20
VSS_250
L24
VSS_251
L28
VSS_252
L3
VSS_253
L33
VSS_254
L49
VSS_255
M28
VSS_256
M42
VSS_257
M46
VSS_258
M49
VSS_259
M5
VSS_260
M50
VSS_261
M9
VSS_262
N11
VSS_263
N14
VSS_264
N17
VSS_265
N29
VSS_266
N32
VSS_267
N36
VSS_268
N39
VSS_269
N44
VSS_270
N49
VSS_271
N7
VSS_272
P19
VSS_273
P2
VSS_274
P23
VSS_275
P3
VSS_276
P50
VSS_277
R49
VSS_278
T39
VSS_279
T43
VSS_280
T47
VSS_281
U41
VSS_282
U45
VSS_283
U50
VSS_284
V2
VSS_285
V3
VSS_286
ITL_CRESTLINE_FCBGA_1299P
VSS_287
VSS_288
VSS_289
VSS_290
VSS_291
VSS_292
VSS_293
VSS_294
VSS_295
VSS_296
VSS_297
VSS_298
VSS_299
VSS_300
VSS_301
VSS_302
VSS_303
VSS_304
VSS_305
VSS_306
VSS_307
VSS_308
VSS_309
VSS_310
VSS_311
VSS_312
VSS_313
VSS
W11
W39
W43
W47
W5
W7
Y13
Y2
Y41
Y45
Y49
Y5
Y50
Y11
P29
T29
T31
T33
R28
AA32
AB32
AD32
AF28
AF29
AT27
AV25
H50
CHANGE by OF
Puma_Chen 26-Dec-2008
INVENTEC
TITLE
Vulcain UMA
CRESTLINE-6
CS
SHEET
DOC. NUMBER
AX1
SIZE CODE
D
REV
000
50 25
R48
10K_5%
MA_A(13:0)
1
1
R47
10K_5%
2
2
MA_DQS#(7:0)
MA_DM(7:0)
MA_DQS(7:0)
22-
22-,28-
MA_A(14)
22-
20-,28-
M_CLK_DDR0
M_CLK_DDR0#
M_CLK_DDR1
M_CLK_DDR1#
ICH_3S_SMCLK
ICH_3S_SMDATA
MA_BS2#
MA_BS0#
MA_BS1#
M_CS0#
M_CS1#
M_CKE0
M_CKE1
MA_CAS#
MA_RAS#
MA_WE#
M_ODT0
M_ODT1
22-,28-
22-,2822-,2820-,2820-,282020202020-,2820-,2822-,2822-,2822-,28-
15-,19-,27-,3215-,19-,27-,32-
20-,28- 2220-,28-
CN501-1
102
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10_AP
A11
A12
A13
A14
A15
A16_BA2
BA0
BA1
S0#
S1#
CK0
CK0#
CK1
CK1#
CKE0
CKE1
CAS#
RAS#
WE#
SA0
SA1
SCL
SDA
ODT0
ODT1
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
101
100
99
98
97
94
92
93
91
105
90
89
116
86
84
85
107
106
110
115
30
32
164
166
79
80
113
108
109
198
200
197
195
114
119
10
26
52
67
130
147
170
185
13
31
51
70
131
148
169
188
11
29
49
68
129
146
167
186
TYCO_292531_4_200P
22-
MA_DATA(63:0)
5
7
17
19
4
6
14
16
23
25
35
37
20
22
36
38
43
45
55
57
44
46
56
58
61
63
73
75
62
64
74
76
123
125
135
137
124
126
134
136
141
143
151
153
140
142
152
154
157
159
173
175
158
160
174
176
179
181
189
191
180
182
192
194
+V1.8
8-,10-,12-,20-,23-,24-,27-,47-
Layout notes: Place these Caps closed So-Dimm0
1
2
C540
0.1uF_16v
1
2
0.1uF_16v
1
2
0.1uF_16v
1
2
C538
C536
+V3S
1
C532
0.1uF_16v
1
2
2
1
2
1
2
C541
2.2uF_16v
1
2
M_VREF
12-,20-,27-
1
2
C535
2.2uF_16v
C43
2.2uF_16v
1
2
C534
2.2uF_16v
1
2
C537
2.2uF_16v
C539
C542
1
2.2uF_16v
2
0.1uF_16v
11-,13-,14-,15-,19-,20-,21-,24-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-
C533
2.2uF_16v
C42
0.1uF_16v
PM_EXTTS#0
CN501-2
112
VDD1
111
VDD2
117
VDD3
96
VDD4
95
VDD5
118
VDD6
81
VDD7
82
VDD8
87
VDD9
103
VDD10
88
VDD11
104
VDD12
199
VDDSPD
83
NC1
120
20-
NC2
50
NC3
69
NC4
163
NCTEST
1
VREF
G1
GND0
G2
GND1
47
VSS1
133
VSS2
183
VSS3
77
VSS4
12
VSS5
48
VSS6
184
VSS7
78
VSS8
71
VSS9
72
VSS10
121
VSS11
122
VSS12
196
VSS13
193
VSS14
8
VSS15
TYCO_292531_4_200P
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
18
24
41
53
42
54
59
65
60
66
127
139
128
145
165
171
172
177
187
178
190
9
21
33
155
34
132
144
156
168
2
3
15
27
39
149
161
28
40
138
150
162
SO DIMM0_9.2mm
CHANGE by
INVENTEC
TITLE
Vulcain UMA
DDR2-DIMM-0
SIZE
CODE
DOC. NUMBER REV
AX1
D
CS
26-Dec-2008 Puma_Chen
SHEET
26 50
000
OF
+V3S
MB_A(13:0)
11-,13-,14-,15-,19-,20-,21-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-
1
R76
10K_5%
2
1
R77
MB_DM(7:0)
10K_5%
2
MB_DQS(7:0)
MB_DQS#(7:0)
22-
22-,28-
MB_A(14)
22-
20-,28-
22-
MB_BS2#
MB_BS0#
MB_BS1#
M_CS2#
M_CS3#
M_CLK_DDR2
M_CLK_DDR2#
M_CLK_DDR3
M_CLK_DDR3#
M_CKE2
M_CKE3
MB_CAS#
MB_RAS#
MB_WE#
ICH_3S_SMCLK
ICH_3S_SMDATA
M_ODT2
M_ODT3
22-
C62
1
2
0.1uF_16v
C544
0.1uF_16v
C93
1
2
MB_DATA(63:0)
C67
1
1
2
2
0.1uF_16v
+V3S
1
1
2
2
+V1.8
8-,10-,12-,20-,23-,24-,26-,27-,47-
C90
1
1
2
2
0.1uF_16V
0.1uF_16V
C55
C72
0.1uF_16v
11-,13-,14-,15-,19-,20-,21-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-
C44
2.2uF_16v
0.1uF_16v
C91
0.1uF_16V
1
2
1
2
2.2uF_16v
C79
C94
0.1uF_16V
1
2
1
2
1
2
C70
2.2uF_16v
C95
1
2
M_VREF
12-,20-,26-
1
2
C75
2.2uF_16v
C80
2.2uF_16v
1
2
C60
2.2uF_16v
C65
1
2.2uF_16v
2
PM_EXTTS#1
CN502-1
102
A0
101
A1
100
A2
99
A3
98
A4
97
A5
94
A6
92
A7
93
A8
91
A9
105
A10_AP
90
A11
89
A12
116
A13
86
A14
84
22-,28-
22-,2822-,2820-,2820-,282020202020-,2820-,2822-,2822-,2822-,28- 20-
15-,19-,26-,3215-,19-,26-,32-
20-,2820-,28-
A15
85
A16_BA2
107
BA0
106
BA1
110
S0#
115
S1#
30
CK0
32
CK0#
164
CK1
166
CK1#
79
CKE0
80
CKE1
113
CAS#
108
RAS#
109
WE#
198
SA0
200
SA1
197
SCL
195
SDA
114
ODT0
119
ODT1
10
DM0
26
DM1
52
DM2
67
DM3
130
DM4
147
DM5
170
DM6
185
DM7
13
DQS0
31
DQS1
51
DQS2
70
DQS3
131
DQS4
148
DQS5
169
DQS6
188
DQS7
11
DQS#0
29
DQS#1
49
DQS#2
68
DQS#3
129
DQS#4
146
DQS#5
167
DQS#6
186
DQS#7
FOX_AS0A42X_N2RX_RVS_5.2mm_200P
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
5
DQ0
7
DQ1
17
DQ2
19
DQ3
4
DQ4
6
DQ5
14
DQ6
16
DQ7
23
DQ8
25
DQ9
35
37
20
22
36
38
43
45
55
57
44
46
56
58
61
63
73
75
62
64
74
76
123
125
135
137
124
126
134
136
141
143
151
153
140
142
152
154
157
159
173
175
158
160
174
176
179
181
189
191
180
182
192
194
+V1.8
8-,10-,12-,20-,23-,24-,26-,27-,47-
Layout note: Place these Caps closed So-Dimm1
C57
1
2
0.1uF_16v
C92
1
2
0.1uF_16V
0.1uF_16V
FOR EMI TEST
SO DIMM1 5.2mm
112
111
117
96
95
118
81
82
87
103
88
104
199
83
120
50
69
163
G1
G2
47
133
183
77
12
48
184
78
71
72
121
122
196
193
CN502-2
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDDSPD
NC1
NC2
NC3
NC4
NCTEST
1
VREF
GND0
GND1
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
8
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
18
24
41
53
42
54
59
65
60
66
127
139
128
145
165
171
172
177
187
178
190
9
21
33
155
34
132
144
156
168
2
3
15
27
39
149
161
28
40
138
150
162
FOX_AS0A42X_N2RX_RVS_5.2mm_200P
CHANGE by
Puma_Chen 26-Dec-2008
INVENTEC
TITLE
Vulcain UMA
DDR2-DIMM1
CODE SIZE REV
DOC. NUMBER
AX1
D
CS
SHEET
000
OF
50 27
+V0.9S
12-,28-
+V0.9S
12-,28-
C64
0.1uF_16v
C59
0.1uF_16v
12
56_5%
12
56_5%R61
2
1
56_5%R111
12
56_5%R90
56_5%
12
12
56_5%
12
12
56_5%
12
12
56_5%R53
56_5%R74
12
56_5%
12
12
12
56_5%
12
12
12
12
56_5%
12
56_5%
2
1
56_5%R68
56_5%R55
12
56_5%
12
12
56_5%
12
12
56_5%
12
56_5%
12
1
2
56_5%R72
56_5%R67
12
56_5%R59
12
12
56_5%
1
2
2
1
56_5%R60
1
2
1
2
1
2
1
2
R75
R50
R62 56_5%
R79
R98 56_5%
R66
R65
R64 56_5%
R52 56_5%
R51
R63 56_5%
R80 56_5%
R99
R54
R69
R56
R70 56_5%
R57 56_5%
R58
R71
R73
R49 56_5%
C37
0.1uF_16v
C56
0.1uF_16v
1
2
1
2
C63
0.1uF_16v
C77
0.1uF_16v
1
2
1
2
C39
0.1uF_16v
C31
0.1uF_16v
1
2
1
2
C41
0.1uF_16v
C30
0.1uF_16v
1
2
1
2
C38
0.1uF_16v
C33
0.1uF_16v
C66
1
2
C76
1
2
0.1uF_16v
0.1uF_16v
1
2
1
2
C40
0.1uF_16v
C32
0.1uF_16v
C36
1
2
C71
1
2
0.1uF_16v
0.1uF_16v
1
2
1
2
C69
0.1uF_16v
C58
0.1uF_16v
C68
1
2
C74
1
2
0.1uF_16v
0.1uF_16v
LAYOUT NOTES : PLACE ONE CAP CLOSE TO EVERY 2 PULL UP RESISTOR TERMINATED TO +V0.9S
20-,26-
M_CKE0
20-,26-
M_CKE1
20-,27-
M_CKE2
20-,27-
M_CKE3
+V0.9S
12-,28-
R102
R82
R110
R101
R100
R81
R83
R104
R84
R105
R85
R106
R86
R87
R107
R108
R103
R88
R109
R78
R89
56_5%
12
56_5%
12
56_5%
1
2
56_5%
12
56_5%
12
56_5%
12
56_5%
12
56_5%
12
56_5%
12
56_5%
12
56_5%
12
56_5%
12
56_5%
12
56_5%
12
56_5%
12
56_5%
12
56_5%
12
56_5%
12
56_5%
12
56_5%
12
56_5%
12
MA_A(0)
MA_A(1)
MA_A(2)
MA_A(3)
MA_A(4)
MA_A(5)
MA_A(6)
MA_A(7)
MA_A(8)
MA_A(9)
MA_A(10)
MA_A(11)
MA_A(12)
MA_A(13)
20-,26-
20-,26-
20-,27-
20-,27-
22-,26-
22-,26-
22-,26-
22-,26-
22-,26-
22-,26-
20-,26-
20-,26-
20-,27-
20-,27-
22-,26-
20-,26-
M_ODT0
M_ODT1
M_ODT2
M_ODT3
MA_BS0#
MA_BS1#
MA_BS2#
MA_WE#
MA_CAS#
MA_RAS#
M_CS0#
M_CS1#
M_CS2#
M_CS3#
MA_A(13:0)
MA_A(14)
1
2
1
2
C34
0.1uF_16v
C73
0.1uF_16v
MB_A(0)
MB_A(1)
MB_A(2)
MB_A(3)
MB_A(4)
MB_A(5)
MB_A(6)
MB_A(7)
MB_A(8)
MB_A(9)
MB_A(10)
MB_A(11)
MB_A(12)
MB_A(13)
C35
1
2
0.1uF_16v
C61
1
2
0.1uF_16v
CHANGE by
22-,27-
22-,27-
22-,27-
22-,27-
22-,27-
22-,27-
22-,27-
20-,27-
MB_BS0#
MB_BS1#
MB_BS2#
MB_WE#
MB_CAS#
MB_RAS#
MB_A(13:0)
MB_A(14)
INVENTEC
TITLE
Vulcain UMA
Vulcain UMA
Vulcain UMA
DDR2-DAMPING
SIZE
CODE
D
D
D
CS
CS
CS
SHEET
27-Sep-2003Puma_Chen
27-Sep-2003Puma_Chen
27-Sep-2003Puma_Chen
28 50
28 50
28 50
REV DOC. NUMBER
000 AX1
000 AX1
000 AX1
OF
CRT_R
CRT_G
CRT_B
CLOSE TO CRESTLINE
1
R139
2.2K_5%
2
CRT1_L_R CRT_L_R
CRT1_L_G
CRT1_L_B
U522
1
2
3
4
5
6
7
8
NXP_IP4772CZ16_SSOP_16P
C155
1
2
0.22uF_16V_OPEN
VCC-SYNC
VCC-VIDEO
VIDEO_1
VIDEO_2
VIDEO_3
GND
VCC-DCC
BYP
SYNC_OUT2
SYNC_IN2
SYNC_OUT1
SYNC_IN1
DDC_OUT2
DDC_IN2
DDC_IN1
DDC_OUT1
16
15
14
13
12
11
10
9
VSYNC_OUT
HSYNC_OUT
1
R9580
10K_5%
2
21-
21-
1
R9579
10K_5%
2
12
12
R116
CRT_VSYNC
CRT_HSYNC
22_5%R137
22_5%
HSYNC_R_OUT
VSYNC_R_OUT
R161
R163
R164
R167
R168
12
0_5%
12
0_5%
12
0_5%
12
0_5%
12
0_5%
1
R9578
2.2K_5%
2
CRT1_L_R
CRT1_L_G
CRT1_L_B
1
R9577
2.2K_5%
2
SYN_070546FR015S239ZR_15P
CN3
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
G
12
13
G
13
14
14
15
15
VGA_GND
G1
G2
VGA_GND
L10
1
2
C9796
10pF_50V
12
BLM18BB100SN1D
BLM18BB100SN1D
C9797
1
2
10pF_50V
L506
12
L11
12
BLM18BB100SN1D
CRT_L_G
C152
1
2
CRT_L_B
22pF_50V
21-
21-
21-
C9795
1
2
10pF_50V
BLM18BB100SN1D
BLM18BB100SN1D
C153
1
2
22pF_50V
L536
12
L535
12
L534
12
BLM18BB100SN1D
C154
1
2
22pF_50V
+V5S
5-,11-,13-,14-,19-,30-,32-,34-,37-,40-,41-
+V3S
11-,13-,14-,15-,19-,20-,21-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-
+V3S
11-,13-,14-,15-,19-,20-,21-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-
11
1
C117
C124
0.1uF_16v
2
0.1uF_16v
2
2
C116
0.1uF_16v
+V3S
11-,13-,14-,15-,19-,20-,21-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-
1
R140
2.2K_5%
CRT_DDCDATA
CRT_DDCCLK
21-
21-
2
CHANGE by
Puma_Chen
VGA_GND
24-Feb-2009
INVENTEC
TITLE
Vulcain UMA
VGA CONN
SIZE
CODE
DOC. NUMBER
AX1 000
D
CS
SHEET
REV
OF
50 29
LID_SW#_3
LCM_BKLTEN
32-,47-
21-
7-,11-,13-,14-,30-,32-,33-,34-,36-,43-,45-,47-
10K_5%
CAM_DISABLE#
32-
+V5S
5-,11-,13-,14-,19-,29-,32-,34-,37-,40-,41-
U7011
5
1
4
2
NC7SZ08M5
3
R9783
12
0_5%_OPEN
+V3A
C119
1uF_6.3V
1
R159
2
SSM3K7002F
LVDS_VDD_EN
R9784
12
100_5%
+V5A
7-,8-,9-,10-,11-,12-,13-,14-,30-,34-,38-,47-
1
1
R138
10K_5%
2
2
Q26
3
D
1
G
S
2
21-
R155
12
47K_5%
C9722
1
2
100pF_50v
INV_PWM_3
1
2
SSM3K7002F
C120
0.1uF_16V
+V5A
7-,8-,9-,10-,11-,12-,13-,14-,30-,34-,38-,47-
1
R9780
47K_5%
2
R9781
12
47K_5%
Q9025
3
D
1
G
S
2
21-
Q25
3
2
D
S
G
PMV65XP
1
C9723
1
2
0.01uF_16v
C9724
1
2
1000pF_50v
USB_P4-
USB_P4+
D2012
PESD5V0U1BB
+V3A
7-,11-,13-,14-,30-,32-,33-,34-,36-,43-,45-,47-
3232-
1
2
Place closed to connector
Q9026
1
G
D
S
3
2
PMV65XP
SSM3K7002F
LVDS_DDC_CLK
LVDS_DDC_DATA
LVDSA_CLK#
LVDSA_DATA#2
LVDSA_DATA2
LVDSA_DATA#1
LVDSA_DATA1
LVDSA_DATA#0
LVDSA_DATA0
LVDSB_CLK#
LVDSB_DATA#0
LVDSB_DATA0
LVDSB_DATA#1
LVDSB_DATA1
LVDSB_DATA#2
LVDSB_DATA2
1
D2013
PESD5V0U1BB
2
Q9027
LVDSA_CLK
LVDSB_CLK
1
2
10uF_6.3v
1
R9782
100_5%
2
3
D
1
G
S
2
+VBATR
5-,7-,8-,9-,11-,13-,39-,47-
2121-
2121212121212121-
2121-
212121212121-
CN14
1
1
2
2
3
G1
G
3
4
G
G2
4
ACES_87213_0400_4P
C9725
(20/5)
1
2
C9726
0.1uF_16v
+V3S
11-,13-,14-,15-,19-,20-,21-,24-,26-,27-,29-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-
1
1
R9785
2.2K_5%
2
R9786
2.2K_5%
2
C9728
1
2
0.1uF_16v
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
CN6007
1
2
3
4
5
6
7
8
9
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
ACES_87223_3001_30P
C9727
1
2
0.1uF_25V
G1
G
G
G2
CHANGE by
Puma_Chen 12-Feb-2009
INVENTEC
TITLE
Vulcain UMA
LCM CONN
SIZE
CODE
DOC. NUMBER
AX1
D
CS
SHEET
REV
000
OF
50 30
D512
BAT54C
RTCBAT
CN510
2
1
+-
LOTES_AAA_BAT_032_K01_A_2P
+V3AL +V_RTC
5-,6-,7-,14-,39-,40-,47-
1
2
R287
3
12
1
R748
1K_5%
2
MDC_3S_BITCLK
MDC_3S_SYNC
MDC_3S_RST#
AZ_3S_BITCLK
AZ_3S_SYNC
AZ_3S_RST#
AZ_3S_SDIN0
MDC_3S_SDIN1
AZ_3S_SDOUT
MDC_3S_SDOUT
SATA_C_RXN0
SATA_C_RXP0
SATA_C_TXN0
SATA_C_TXP0
SATA_C_RXN1
SATA_C_RXP1
SATA_C_TXN1
SATA_C_TXP1
CLK_R_SATA1#
CLK_R_SATA1
12
47K_5%
1
R286
1M_5%
2
12
R307
4242-
R308
42-
1
4141-
R698 33_5%
R309
41-
4142-
R313
41-
R311
42-
37373737-
37373737-
1515-
1
2
332K_1%R252
12
2
1
12
2
2
1
12
2
1
12
CLOSE TO ICH8
CLOSE TO ICH8
1
R339
24.9_1%
2
31-,34-,39-
C738
1uF_10v
C337
1uF_6.3v
33_5%
33_5%
33_5%R310
33_5%R697
33_5%
33_5%
33_5%
1
R253
0402_OPEN
2
C7009
12
12
22pF_50v
22pF_50v
1
R280
0402_OPEN
2
3300pF_50vC378
C377
3300pF_50v
C7010
C335
12
1
X1
4
C334
1
2
+V_RTC
+V1.5S_PCIE_ICH
3300pF_50v
12
12
2 3
31-,34-,39-
1
2
32-,34-
1
2
32.768KHZ
R282
332K_1%
R290
24.9_1%
SATA_TXN0
SATA_TXN1
R9640
12
0_5%_OPEN
CMOS CLEAR
SATA_TXP0
SATA_TXP1
TP27
1
R273
10M_5%
2
3300pF_50v
U511-1
AG25
RXTC1
AF24
RXTC2
AF23
RTCRST#
AD22
INTRUDER#
AF25
INTVRMEN
AD21
LAN100_SLP
B24
GLAN_CLK
D22
LAN_RSTSYNC
C21
LAN_RXD0
B21
LAN_RXD1
C22
LAN_RXD2
D21
LAN_TXD0
E20
LAN_TXD1
C20
LAN_TXD2
AH21
GLAN_DOCK#_GPIO13
D25
GLAN_COMPI
C25
GLAN_COMPO
AJ16
HDA_BIT_CLK
AJ15
HDA_SYNC
AE14
HDA_RST#
AJ17
HDA_SDIN0
AH17
HDA_SDIN1
AH15
HDA_SDIN2
AD13
HDA_SDIN3
AE13
HDA_SDOUT
AE10
HDA_DOCK_EN#_GPIO33
AG14
HDA_DOCK_RST#_GPIO34
AF10
SATALED#
AF6
SATA0RXN
AF5
SATA0RXP
AH5
SATA0TXN
AH6
SATA0TXP
AG3
SATA1RXN
AG4
SATA1RXP
AJ4
SATA1TXN
AJ3
SATA1TXP
AF2
SATA2RXN
AF1
SATA2RXP
AE4
SATA2TXN
AE3
SATA2TXP
AB7
SATA_CLKN
AC6
SATA_CLKP
AG1
SATARBIAS#
AG2
SATARBIAS
LPC
RTC
FWH4_LFRAME#
LDRQ1#_GPIO23
CPUPWRGD_GPIO49
LAN / GLAN
IHDA
SATA
ITL_ICH8_M_BGA_676P
FWH0_LAD0
FWH1_LAD1
FWH2_LAD2
FWH3_LAD3
LDRQ0#
A20GATE
DPRSTP#
DPSLP#
IGNNE#
CPU
STPCLK#
THRMTRIP#
IDE
DDACK#
IDEIRQ
DDREQ
A20M#
FERR#
INIT#
INTR
RCIN#
SMI#
DD10
DD11
DD12
DD13
DD14
DD15
DCS1#
DCS3#
DIOR#
DIOW#
IORDY
11-,13-,14-,15-,19-,20-,21-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-
+V3S
+V3S
Close to ICH8
1
R343
0402_OPEN
+VCCP
2
9-,10-,11-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-,47-
1
R254
56_5%
2
9-,10-,11-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-,47-
+VCCP
1
R256
56_5%
2
16-
16-,20-
H_FERR#
PM_THRMTRIP#
E5
F5
G8
F6
C4
G9
E6
AF13
39-
EC_3S_A20GATE
16-
AG26
AF26
AE26
AD24
AG29
AF27
AE24
AC20
AH14
AD23
NMI
AG28
AA24
AE27
AA23
TP8
V1
DD0
U2
DD1
V3
DD2
T1
DD3
V4
DD4
T5
DD5
AB2
DD6
T6
DD7
T3
DD8
R2
DD9
T4
V6
V5
U1
V2
U6
AA4
DA0
AA1
DA1
AB3
DA2
Y6
Y5
W4
W3
Y2
Y3
Y1
W5
17-
H_A20M#
H_DPSLP#
17-
16-
1616-
1616-
16-
H_PWRGD
H_IGNNE#
H_INIT#
H_INTR
H_NMI
H_SMI#
H_STPCLK#
+V3S
39-,45-
LPC_3S_AD(0)
39-,45-
LPC_3S_AD(1)
39-,45-
LPC_3S_AD(2)
39-,45-
LPC_3S_AD(3)
39-,45-
LPC_3S_FRAME#
11-,17-,20-
H_DPRSTP#
11-,13-,14-,15-,19-,20-,21-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-
R693
12
10K_5%
39-
PM_3S_KBCCPURST#
R255
12
24.9_1%
11-,13-,14-,15-,19-,20-,21-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-
+V3S
11-,13-,14-,15-,19-,20-,21-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-
1
R9671
8.2K_5%
2
1
R9672
4.7K_5%
2
CHANGE by
Puma_Chen 26-Dec-2008
INVENTEC
TITLE
Vulcain UMA
ICH8-1
CODE SIZE
D
DOC. NUMBER REV
CS
AX1
SHEET
000
OF
50 31
11-,13-,14-,15-,19-,20-,21-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-
+V3S
1
1
R425
2.2K_5%
ICH_3S_SMCLK
ICH_3A_SMCLK
ICH_3A_SMDATA
ICH_3S_SMDATA
8-,9-,10-,12-,13-,14-,32-,39-,43-,46-
LED_3S_LANLINK#
ICH_3A_ALERT_CLK
ICH_3A_ALERT_DAT
PCI_3S_CLKRUN#
PCI_3S_SERIRQ
11-,13-,14-,15-,19-,20-,21-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-
A_3S_ICHSPKR
NEWCARD_SD#
GPIO20_LOM_DISABLE#
11-,13-,14-,15-,19-,20-,21-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-
CL_VREF0
15-,19-,26-,27-
32-
32-
15-,19-,26-,27-
SLP_S3#_3R
43-,44-
32-
WOL_EN
32-
GPIO12
SPI_CS1#
CL_RST#1
PCIE_WAKE#
OCP_OC#
GPIO48
GPIO39
GPIO27
GPIO18
GPIO17
ISO_PREP#
GPIO22
32-,3932-
PM_RI#
32-,45323232-,43-,4532-
GPIO10
11-,13-,14-,15-,19-,20-,21-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-
5-,3232-,3932-,3932-
GPIO14
32-
GPIO38
32-,41-
32-
32-
32-,46-
32-
32-,43-
32-
32-
32-
32-
32-
C344
1
2
0.1uF_16v
R423
2.2K_5%
2
2
R420
R424
7-,11-,13-,14-,30-,32-,33-,34-,36-,43-,45-,47-
R275
R284 10K_5%
R314
R278
R324
R3211 2
R315 1K_5%
R680
R338
R733
R320
R735
R340
0402_OPEN R341
12
R325 0402_OPEN
12
12
R316 0402_OPEN
12
0402_OPEN R681
12
R322
12
R695 0402_OPEN
2
1
R337 10K_5%
12
R734 10K_5%
12
R9567 10K_5%
12
+V3S
1
R293
3.24K_1%
2
CL_VREF1
1
R292
453_1%
2
7-,11-,13-,14-,30-,32-,33-,34-,36-,43-,45-,47-
+V3A
1
1
R421
R422
10K_5%
10K_5%
2
2
2
33_5%
1
2
33_5%
12
3
3
2
+V3A
1
R279
8.2K_5%
2
32-
Q526
3
D
1
G
S
2
SSM3K7002F
12
10K_5%
12
12
0402_OPEN R288
12
10K_5%
12
0402_OPEN
12
10K_5%
10K_5%
1
2
12
0_5%_OPEN
12
10K_5%
8.2K_5%
12
8.2K_5%1
2
8.2K_5%
1
2
8.2K_5%
12
+V3S
10K_5%R696
0_5%_OPEN
VR_PWRGD
+V3A
7-,11-,13-,14-,30-,32-,33-,34-,36-,43-,45-,47-
32-
C336
1
2
0.1uF_16v
5-,11-,13-,14-,19-,29-,30-,34-,37-,40-,41-
+V5S
PCIE_C_RXN2
PCIE_C_RXP2
PCIE_C_TXN2
PCIE_C_TXP2
SSM3K7002F
S
G
1
D
Q50
Q55
D
G
S
SSM3K7002F
LED_LANLINK#
PCIE_C_RXN5
1
PCIE_C_RXP5
PCIE_C_TXN5
PCIE_C_TXP5
PCIE_C_RXN6
PCIE_C_RXP6
PCIE_C_TXN6
PCIE_C_TXP6
SPI_CLK
SPI_CE#
SPI_SI
SPI_SO
+V3A
+V3A
7-,11-,13-,14-,30-,32-,33-,34-,36-,43-,45-,47-
ICH_3A_SMCLK
ICH_3A_SMDATA
+V3S
CL_RST#1
ICH_3A_ALERT_CLK
ICH_3A_ALERT_DAT
XDP_DBRESET#
BM_BUSY#
LED_LANLINK#
PCISTOP#_3
CPUSTOP#_3
PCI_3S_CLKRUN#
PCIE_WAKE#
PCI_3S_SERIRQ
THERM_SCI#
11-,15-
OCP_OC#
RUNSCI0#_3
ISO_PREP#
LID_SW#_3
GPIO12
GPIO17
GPIO20_LOM_DISABLE#
1
R272
3.24K_1%
2
1
R274
453_1%
2
GPIO18
GPIO22
GPIO27
NEWCARD_SD#
CLKREQ_R_SATA#
GPIO38
GPIO39
GPIO48
A_3S_ICHSPKR
MCH_ICH_SYNC#
454545-
C690
45-
0.1uF_16v
12
46464646-
0.1uF_16v
C686
12
43434343-
0.1uF_16v
C9446
12
12
R295
36-,3936-,39-
36-,3936-,39-
7-,11-,13-,14-,30-,32-,33-,34-,36-,43-,45-,47-
1
R326
10K_5%
2
323232-,453232-
32-
16-,19-
20-
32-
1515-
32-,39-
32-,43-,4532-,3919-,33-
R683
100K_5%_OPEN
5-,3233-,393230-,4732323232-,43323232-,4615323232-
32-,41-
20-
12
12
C691
12
C687
12
C9445
12
15_5%
15_5%R294
SPI_CS1#
R291
12
BT_OFF
CAM_DISABLE#
TP24
TP22
TP23
0.1uF_16v
0.1uF_16v
0.1uF_16v
15_5%
4530-
U511-3
AJ26
SMBLCK
AD19
SMBDATA
AG21
LINKALERT#
AC17
SMLINK0
AE19
SMLINK1
AF17
RI#
F4
AD15
SYS_RESET#
AG12
BMBUSY#_GPIO0
AG22
SMBALERT#_GPIO11
AE20
STP_PCI#_GPIO15
AG18
STP_CPU#_GPIO25
AH11
CLKRUN#_GPIO32
AE17
WAKE#
AF12
SERIRQ
AC13
THRM#
AJ20
VRMPWRGD
AJ22
TP7
AJ8
TACH1_GPIO1
AJ9
TACH2_GPIO6
AH9
TACH3_GPIO7
AE16
GPIO8
AC19
GPIO12
AG8
TACH0_GPIO17
AH12
GPIO18
AE11
GPIO20
AG10
SCLOCK_GPIO22
AH25
QRT_SATAE0_GPIO27
AD16
QRT_SATA1_GPIO28
AG13
SATACLKREQ#_GPIO35
AF9
SLOAD_GPIO38
AJ11
SDATAOUT0_GPIO39
AD10
SDATAOUT1_GPIO48
AD9
SPKR
AJ13
MCH_SYNC#
AJ21
TP3
PCIE_TXN2
PCIE_TXP2
PCIE_TXN5
PCIE_TXP5
PCIE_TXN6
PCIE_TXP6
32-,39-
SMB
SYS GPIO
GPIO
MISC
ITL_ICH8_M_BGA_676P
U511-4
P27
PERN1
P26
PERP1
N29
PETN1
N28
PETP1
M27
PERN2
M26
PERP2
L29
PETN2
L28
PETP2
K27
PERN3
K26
PERP3
J29
PETN3
J28
PETP3
H27
PERN4
H26
PERP4
G29
PETN4
G28
PETP4
F27
PERN5
F26
PERP5
E29
PETN5
E28
PETP5
D27
PERN6_GLAN_RXN
D26
PERP6_CLAN_RXP
C29
PETN6_GLAN_TXN
C28
PETP6_GLAN_TXP
C23
SPI_CLK
B23
SPI_CS0#
E22
SPI_CS1#
D23
SPI_MOSI
F21
SPI_MISO
AJ19
OC0#
AG16
OC1#_GPIO40
AG15
OC2#_GPIO41
AE15
OC3#_GPIO42
AF15
OC4#_GPIO43
AG17
OC5#_GPIO29
AD12
OC6#_GPIO30
AJ18
OC7#_GPIO31
AD14
OC8#
AH18
OC9#
ITL_ICH8_M_BGA_676P
SATA0GP_GPIO21
SATA1GP_GPIO19
SATA2GP_GPIO36
SATA
GPIO
SATA3GP_GPIO37
CLK14
CLK48
Clocks
SUSCLK SUS_STAT#_LPCPD#
SLP_S3#
SLP_S4#
SLP_S5#
S4_STATE#_GPIO26
PWROK
DPRSLPVR_GPIO16
BATLOW#
PWRBTN#
LAN_RST#
RSMRST#
Power MGT
CK_PWRGD
CLPWROK
SLP_M#
CL_CLK0
CL_CLK1
CL_DATA0
CL_DATA1
CL_VREF0
CL_VREF1
Controller Link
CL_RST#
MEM_LED_GPIO24
ME_EC_ALERT_GPIO10
EC_ME_ALERT_GPIO14
WOL_EN_GPIO9
DMI0RXN
DMI0RXP
DMI0TXN
DMI0TXP
DMI1RXN
DMI1RXP
DMI1TXN
DMI1TXP
DMI2RXN
DMI2RXP
DMI2TXN
DMI2TXP
DMI3RXN
DMI3RXP
PCI-Express
DMI3TXN
Direct Media Interface
DMI3TXP
DMI_CLKN
DMI_CLKP
DMI_ZCOMP
DMI_IRCOMP
SPI
USB
USBRBIAS#
USBRBIAS
AJ12
AJ10
AF11
AG11
AG9
G5
D3
AG23
AF21
AD18
AH27
AE23
AJ14
AE21
C2
R9680
AH20
AG27
E1
E3
AJ25
F23
AE18
F22
AF19
D24
AH23
AJ23
AJ27
AJ24
AF22
AG19
USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P
3232-
V27
V26
U29
U28
Y27
Y26
W29
W28
AB26
AB25
AA29
AA28
AD27
AD26
AC29
AC28
T26
T25
Y23
Y24
G3
G2
H5
H4
H2
H1
J3
J2
K5
K4
K2
K1
L3
L2
M5
M4
M2
M1
N3
N2
F2
USB_RBIAS_PN
F3
1
2
100K_5%
12
TP44
15-
11-,20-,39-
TP25
CL_VREF0
CL_VREF1
Place within 500 mils of ICH
11-,13-,14-,15-,19-,20-,21-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-
1
1
R699
8.2K_5%
8-,9-,10-,12-,13-,14-,32-,39-,43-,46-
CLK_PWRGD
PM_PWROK
Signal has integrated pull-up of 18K ohm-42K ohm .
R312
R317
8.2K_5%
8.2K_5%
2
2
8-,128-,38-
11-,20-,39-
11-,20-
7-,39-
7-,11-,13-,14-,30-,32-,33-,34-,36-,43-,45-,47-
R345
39-
1515-
TP26
47-
1
2045-
2045-
20-
45323232-
Puma_Chen
+V3S
NPCI_RESET#
CLK_R3S_ICH14
CLK_R3S_ICH48 PM_RI#
SLP_S3#_3R
SLP_S4#_3R
SLP_S5#_3R
PM_PWROK
PM_DPRSLPVR
PWR_SWIN2#_3
RSMRST#
0402_OPEN
2
CL_CLK0
CL_CLK1
CL_DATA0
CL_DATA1
CL_RST#0
XMIT_OFF#
GPIO10
GPIO14
WOL_EN
20-
DMI_RXN(0)
20-
DMI_RXP(0)
20-
DMI_TXN(0)
20-
DMI_TXP(0)
20-
DMI_RXN(1)
20-
DMI_RXP(1)
20-
DMI_TXN(1)
20-
DMI_TXP(1)
20-
DMI_RXN(2)
20-
DMI_RXP(2)
20-
DMI_TXN(2)
20-
DMI_TXP(2)
20-
DMI_RXN(3)
20-
DMI_RXP(3)
20-
DMI_TXN(3)
20-
DMI_TXP(3)
15-
CLK_R_PCIE_ICH#
15-
CLK_R_PCIE_ICH
38-
USB_P0-
38-
USB_P0+
38-
USB_P1-
38-
USB_P1+
38-
USB_P2-
38-
USB_P2+
46-
USB_P3-
46-
USB_P3+
30-
USB_P4-
30-
USB_P4+
45-
USB_P6-
45-
USB_P6+
46-
USB_P7-
46-
USB_P7+
R747
12
22.6_1%
7-,11-,13-,14-,30-,32-,33-,34-,36-,43-,45-,47-
+V3A
1
R660
10K_5%_OPEN
2
R283
1
2
10K_5%
+V3A
CHENMKO_BAT54_3P D16
7-,11-,13-,14-,30-,32-,33-,34-,36-,43-,45-,47-
ISOLATION
+V1.5S_PCIE_ICH
DMI_IRCOMP_R
Close to ICH8
1
R692
0402_OPEN
2
39-
3
1
+V3A
R368
12
8.2K_5%
INVENTEC
TITLE
Vulcain UMA
ICH8-2
CODE
CS
SHEET CHANGE by
DOC. NUMBER
AX1
SIZE
D
31-,34-
1
R285
24.9_1%
2
LOW_BAT#_3
OF
REV
000
50 32
+V3S
PCI_3S_FRAME#
PCI_3S_IRDY#
PCI_3S_TRDY#
PCI_3S_STOP#
PCI_3S_SERR#
PCI_3S_DEVSEL#
PCI_3S_PERR#
PCI_3S_LOCK#
PCI_3S_REQ#(0)
PCI_3S_REQ#(1)
PCI_3S_REQ#(2)
PCI_3S_REQ#(3)
PCI_3S_INTA#
PCI_3S_INTB#
PCI_3S_INTC#
PCI_3S_INTD#
PCI_3S_INTE# PCI_3S_INTE#
ODD_DET#
PCI_3S_INTG#
RUNSCI0#_3
THERM_SCI#
PCI_3S_INTH#
33-
33-
33-
33-
33-,39-
33-
33-
33-
33-
33-
33-
33-
33-
33-
33-
33-
33-
33-,37-
33-
32-,39-
19-,32-
33-
R691
R346
R347
R333
R328
R334
R731
R728
R729
R331
R690
R689
R329
R730
R344
R688
R342
R330
R327
R736
R323
R727
8.2K_5%1
2
12
8.2K_5%
12
8.2K_5%
8.2K_5%
12
12
8.2K_5%
8.2K_5%12
8.2K_5%
12
8.2K_5%
12
12
8.2K_5%
8.2K_5%
12
8.2K_5%
12
12
8.2K_5%
8.2K_5%12
8.2K_5%
12
8.2K_5%
12
12
8.2K_5%
8.2K_5%12
8.2K_5%12
12
8.2K_5%
8.2K_5%1
2
1
8.2K_5%
2
8.2K_5%
12
11-,13-,14-,15-,19-,20-,21-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-
PCI_3S_INTA#
PCI_3S_INTB#
PCI_3S_INTC#
PCI_3S_INTD#
D20
E19
D19
A20
D17
A21
A19
C19
A18
B16
A12
E16
A14
G16
A15
B6
C11
A9
D11
B12
C12
D10
C7
F13
E11
E13
E12
D8
A6
E8
D6
A3
33-
F9
33-
B5
33-
C5
33-
A10
U511-2
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9 C_BE0#
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
PIRQA#
PIRQB#
PIRQC#
PIRQD#
ITL_ICH8_M_BGA_676P
REQ1#_GPIO50
GNT1#_GPIO51
REQ2#_GPIO52
GNT2#_GPIO53
REQ3#_GPIO54
GNT3#_GPIO55
PCI
Interrupt I/F
PIRQE#_GPIO2
PIRQF#_GPIO3
PIRQG#_GPIO4
PIRQH#_GPIO5
REQ0#
GNT0#
C_BE1#
C_BE2#
C_BE3#
IRDY#
PCIRST#
DEVSEL#
PERR#
PLOCK#
SERR#
STOP#
TRDY#
FRAME#
PLTRST#
PCICLK
PME#
PAR
A4
D7
E18
C18
B19
F18
A11
C10
C17
E15
F16
E17
C8
D9
G6
D16
A7
B7
F10
C16
C9
A17
AG24
B10
G7
F8
G11
F12
B3
33-,37-
R332
33-
3333-
33-
33-
33-
33-
12
10K_5%
33-
333333-
33-,39-
333333-
15-
ODD_DET#
PCI_3S_INTG#
PCI_3S_INTH#
PCI_3S_REQ#(0)
PCI_3S_REQ#(1)
PCI_3S_REQ#(2)
PCI_3S_REQ#(3)
PCI_3S_IRDY#
PCI_3S_DEVSEL#
PCI_3S_PERR#
PCI_3S_LOCK#
PCI_3S_SERR#
PCI_3S_STOP#
PCI_3S_TRDY#
PCI_3S_FRAME#
CLK_R3S_ICHPCI
+V3S
11-,13-,14-,15-,19-,20-,21-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-
1
R348
Boot BIOS from SPI
1K_5%
GNT0# = 0
2
SPI_CS1# = 1
20-,46-
PLT_RST#
+V3A
7-,11-,13-,14-,30-,32-,34-,36-,43-,45-,47-
5
U20
2
4
PHP_74LVC1G17_SOT753_5P
3
R9540
1
2
0_5%_OPEN
39-,43-,45-
1
R271
100K_5%
2
BUF_PLT_RST#
CHANGE by
Puma_Chen 26-Dec-2008
INVENTEC
TITLE
Vulcain UMA
ICH8-3
SIZE
D
DOC. NUMBER
CODE REV
AX1
CS
SHEET
000
OF
50 33
+V_RTC +VCCP
31-,39-
1
C698
0.1uF_16v
2
7-,8-,9-,10-,11-,12-,13-,14-,30-,38-,47-
10-,13-,18-,24-,34-,45-,46-
1
0.1uF_16v
2
+V3A
7-,11-,13-,14-,30-,32-,33-,34-,36-,43-,45-,47-
CHENMKO_BAT54_3P D511
+V5A
+V1.5S
12
KC_FBM_11_160808_101_T_2P
11-,13-,14-,15-,19-,20-,21-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-
C697
+V3S
+V5S
5-,11-,13-,14-,19-,29-,30-,32-,37-,40-,41-
13
R732
2
1
10_1%
C728
1
2
0.1uF_16v
+V1.5S_PCIE_ICH
L14
1
C339
220uF_2.5v
2
31-,32-,34-
1
2
100_5%
C338
0.1uF_16v
13
R687
D510CHENMKO_BAT54_3P
1 2
1
2
C718
C342
0.1uF_16v
1
2
1uF_10v
C343
1
2
0.1uF_16v
+V1.5S
10-,13-,18-,24-,34-,45-,46-
+V1.5S
10-,13-,18-,24-,34-,45-,46-
+V1.5S
10-,13-,18-,24-,34-,45-,46-
L514
12
BLM11A121S
C730
10uF_6.3v
C729
1uF_6.3v
1
2
1
2
1uF_6.3v
1
2
C379
C381
1uF_10v
1
2
+V1.5S
10-,13-,18-,24-,34-,45-,46-
1
C396
0.1uF_16v
+V1.5S
10-,13-,18-,24-,34-,45-,46-
0.1uF_16v
C707
4.7uF_6.3V
+V3_LAN
C340
34-,43-,44-,45-
1
2
1
2
+V1.5S
10-,13-,18-,24-,34-,45-,46-
1
C384
+V1.5S
10-,13-,18-,24-,34-,45-,46-
+V1.5S_PCIE_ICH
31-,32-,34-
+V3S
11-,13-,14-,15-,19-,20-,21-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-
0.1uF_16v
2
L511
12
BLM11A121S
1
2
C705
10uF_6.3v
2
C704
1
2
2.2uF_6.3v
U511-6
AD25
VCCRTC
A16
V5REF1
T7
V5REF2
G4
V5REF_SUS
AA25
VCC1_5_B1
AA26
VCC1_5_B2
AA27
VCC1_5_B3
AB27
VCC1_5_B4
AB28
VCC1_5_B5
AB29
VCC1_5_B6
D28
VCC1_5_B7
D29
VCC1_5_B8
E25
VCC1_5_B9
E26
VCC1_5_B10
E27
VCC1_5_B11
F24
VCC1_5_B12
F25
VCC1_5_B13
G24
VCC1_5_B14
H23
VCC1_5_B15
H24
VCC1_5_B16
J23
VCC1_5_B17
J24
VCC1_5_B18
K24
VCC1_5_B19
K25
VCC1_5_B20
L23
VCC1_5_B21
L24
VCC1_5_B22
L25
VCC1_5_B23
M24
VCC1_5_B24
M25
VCC1_5_B25
N23
VCC1_5_B26
N24
VCC1_5_B27
N25
VCC1_5_B28
P24
VCC1_5_B29
P25
VCC1_5_B30
R24
VCC1_5_B31
R25
VCC1_5_B32
R26
VCC1_5_B33
R27
VCC1_5_B34
T23
VCC1_5_B35
T24
VCC1_5_B36
T27
VCC1_5_B37
T28
VCC1_5_B38
T29
VCC1_5_B39
U24
VCC1_5_B40
U25
VCC1_5_B41
V23
VCC1_5_B42
V24
VCC1_5_B43
V25
VCC1_5_B44
W25
VCC1_5_B45
Y25
VCC1_5_B46
AJ6
VCCSATAPLL
AE7
VCC1_5_A1
AF7
VCC1_5_A2
AG7
VCC1_5_A3
AH7
VCC1_5_A4
AJ7
VCC1_5_A5
AC1
VCC1_5_A6
AC2
VCC1_5_A7
AC3
VCC1_5_A8
AC4
VCC1_5_A9
AC5
VCC1_5_A10
AC10
VCC1_5_A11
AC9
VCC1_5_A12
AA5
VCC1_5_A13
AA6
VCC1_5_A14
G12
VCC1_5_A15
G17
VCC1_5_A16
H7
VCC1_5_A17
AC7
VCC1_5_A18
AD7
VCC1_5_A19
D1
VCCUSBPLL
F1
VCC1_5_A20
L6
VCC1_5_A21
L7
VCC1_5_A22
M6
VCC1_5_A23
M7
VCC1_5_A24
W23
VCC1_5_A25
TP16
F17
VCCLAN1_05_1
TP17
G18
VCCLAN1_05_2
F19
VCCLAN3_03_1
G20
VCCLAN3_03_2
A24
VCCGLANPLL
A26
VCCGLAN1_5_1
A27
VCCGLAN1_5_2
B26
VCCGLAN1_5_3
B27
VCCGLAN1_5_4
B28
VCCGLAN1_5_5
B25
VCCGLAN3_3
ITL_ICH8_M_BGA_676P
CORE
VCCA3GP
VCCP
ARX ATX
PCI
VCCPSUS
USB_CORE
VCCPUSB
GLAN POWER
VCC1_05_1
VCC1_05_2
VCC1_05_3
VCC1_05_4
VCC1_05_5
VCC1_05_6
VCC1_05_7
VCC1_05_8
VCC1_05_9
VCC1_05_10
VCC1_05_11
VCC1_05_12
VCC1_05_13
VCC1_05_14
VCC1_05_15
VCC1_05_16
VCC1_05_17
VCC1_05_18
VCC1_05_19
VCC1_05_20
VCC1_05_21
VCC1_05_22
VCC1_05_23
VCC1_05_24
VCC1_05_25
VCC1_05_26
VCC1_05_27
VCC1_05_28
VCCDMIPLL
VCC_DMI_1
VCC_DMI_2
V_CPU_IO_1
V_CPU_IO_2
VCC3_3_1
VCC3_3_2
VCC3_3_3
VCC3_3_4
VCC3_3_5
CORE
VCC3_3_6
VCC3_3_7
VCC3_3_8
VCC3_3_9
VCC3_3_10
IDE
VCC3_3_11
VCC3_3_12
VCC3_3_13
VCC3_3_14
VCC3_3_15
VCC3_3_16
VCC3_3_17
VCC3_3_18
VCC3_3_19
VCC3_3_20
VCC3_3_21
VCC3_3_22
VCC3_3_23
VCC3_3_24
VCCHDA
VCCSUSHDA
VCCSUS1_05_1
VCCSUS1_05_2
VCCSUS1_5_1
VCCSUS1_5_2
VCCSUS3_3_1
VCCSUS3_3_2
VCCSUS3_3_3
VCCSUS3_3_4
VCCSUS3_3_5
VCCSUS3_3_6
VCCSUS3_3_7
VCCSUS3_3_8
VCCSUS3_3_9
VCCSUS3_3_10
VCCSUS3_3_11
VCCSUS3_3_12
VCCSUS3_3_13
VCCSUS3_3_14
VCCSUS3_3_15
VCCSUS3_3_16
VCCSUS3_3_17
VCCSUS3_3_18
VCCSUS3_3_19
VCCCL1_05
VCCCL1_5
VCCCL3_3_1
VCCCL3_3_2
A13
B13
C13
C14
D14
E14
F14
G14
L11
L12
L14
L16
L17
L18
M11
M18
P11
P18
T11
T18
U11
U18
V11
V12
V14
V16
V17
V18
R29
AE28
AE29
AC23
AC24
AF29
AD2
AC8
AD8
AE8
AF8
AA3
U7
V7
W1
W6
W7
Y7
A8
B15
B18
B4
B9
C15
D13
D5
E10
E7
F11
AC12
AD11
J6
AF20
AC16
J7
C3
AC18
AC21
AC22
AG20
AH28
P6
P7
C1
N7
P1
P2
P3
P4
P5
R1
R3
R5
R6
G22
A22
F20
G21
TP18
TP19
TP20
C706
1
2
0.1uF_16v_OPEN
1
2
C365
1
2
0.1uF_16v
+V1.25S
8-,20-,24-
C695
1
2
22uF_6.3v
C386
C341
1
2
0.1uF_16v
0.1uF_16v
7-,11-,13-,14-,30-,32-,33-,34-,36-,43-,45-,47-
1
C385
2
0.1uF_16v
C250
1
2
0.1uF_16v
+V3_LAN
1
2
C380
1
2
0.1uF_16v
1
2
1
2
+V3A
1
2
34-,43-,44-,45-
CHANGE by
9-,10-,11-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-,47-
C364
1
0.1uF_16v
2
+V1.5S
10-,13-,18-,24-,34-,45-,46-
C692
1
2
C367
1
2
0.1uF_16v
0.1uF_16v
11-,13-,14-,15-,19-,20-,21-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-
C696
1
2
0.1uF_16v
1
C693
2
0.01uF_16v
C368
10uF_6.3v
+VCCP
9-,10-,11-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-,47-
C694 1
2
4.7uF_6.3V
+V3S
11-,13-,14-,15-,19-,20-,21-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-
+V3S
C383
0.1uF_16v
C369
11-,13-,14-,15-,19-,20-,21-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-
0.1uF_16v
C362
0.1uF_16v
+V3S
C382
1
0.1uF_16v
2
+V3A
7-,11-,13-,14-,30-,32-,33-,34-,36-,43-,45-,47-
1
C363
2
0.1uF_16v
7-,11-,13-,14-,30-,32-,33-,34-,36-,43-,45-,47-
+V3A
C366
1
2
4.7uF_6.3V
TITLE
SIZE
Puma_Chen
26-Dec-2008
D
INVENTEC
Vulcain UMA
ICH8-4
CODE
DOC. NUMBER REV
AX1
CS
SHEET
OF
50 34
000
U511-5
A23
VSS001
A5
VSS002
AA2
VSS003
AA7
VSS004
A25
VSS005
AB1
VSS006
AB24
VSS007
AC11
VSS008
AC14
VSS009
AC25
VSS010
AC26
VSS011
AC27
VSS012
AD17
VSS013
AD20
VSS014
AD28
VSS015
AD29
VSS016
AD3
VSS017
AD4
VSS018
AD6
VSS019
AE1
VSS020
AE12
VSS021
AE2
VSS022
AE22
VSS023
AD1
VSS024
AE25
VSS025
AE5
VSS026
AE6
VSS027
AE9
VSS028
AF14
VSS029
AF16
VSS030
AF18
VSS031
AF3
VSS032
AF4
VSS033
AG5
VSS034
AG6
VSS035
AH10
VSS036
AH13
VSS037
AH16
VSS038
AH19
VSS039
AH2
VSS040
AF28
VSS041
AH22
VSS042
AH24
VSS043
AH26
VSS044
AH3
VSS045
AH4
VSS046
AH8
VSS047
AJ5
VSS048
B11
VSS049
B14
VSS050
B17
VSS051
B2
VSS052
B20
VSS053
B22
VSS054
B8
VSS055
C24
VSS056
C26
VSS057
C27
VSS058
C6
VSS059
D12
VSS060
D15
VSS061
D18
VSS062
D2
VSS063
D4
VSS064
E21
VSS065
E24
VSS066
E4
VSS067
E9
VSS068
F15
VSS069
E23
VSS070
F28
VSS071
F29
VSS072
F7
VSS073
G1
VSS074
E2
VSS075
G10
VSS076
G13
VSS077
G19
VSS078
G23
VSS079
G25
VSS080
G26
VSS081
G27
VSS082
H25
VSS083
H28
VSS084
H29
VSS085
H3
VSS086
H6
VSS_NCTF_01
VSS087
J1
VSS_NCTF_02
VSS088
J25
VSS_NCTF_03
VSS089
J26
VSS_NCTF_04
VSS090
J27
VSS_NCTF_05
VSS091
J4
VSS_NCTF_06
VSS092
J5
VSS_NCTF_07
VSS093
K23
K28
K29
VSS_NCTF_08
VSS094
VSS_NCTF_09
VSS095
VSS_NCTF_010
VSS096
K3
VSS_NCTF_011
VSS097
K6
VSS_NCTF_012
VSS098
ITL_ICH8_M_BGA_676P
VSS099
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172
VSS173
VSS174
VSS175
VSS176
VSS177
VSS178
VSS179
VSS180
VSS181
VSS182
VSS183
VSS184
K7
L1
L13
L15
L26
L27
L4
L5
M12
M13
M14
M15
M16
M17
M23
M28
M29
M3
N1
N11
N12
N13
N14
N15
N16
N17
N18
N26
N27
N4
N5
N6
P12
P13
P14
P15
P16
P17
P23
P28
P29
R11
R12
R13
R14
R15
R16
R17
R18
R28
R4
T12
T13
T14
T15
T16
T17
T2
U12
U13
U14
U15
U16
U17
U23
U26
U27
U3
U5
V13
V15
V28
V29
W2
W26
W27
Y28
Y29
Y4
AB4
AB23
AB5
AB6
AD5
U4
W24
A1
A2
A28
A29
AH1
AH29
AJ1
AJ2
AJ28
AJ29
B1
B29
INVENTEC
TITLE
Vulcain UMA
ICH8-5
CODE
SIZE
CHANGE by OF
Puma_Chen
26-Dec-2008
D
DOC. NUMBER REV
AX1
CS
SHEET
000
50 35
7-,11-,13-,14-,30-,32-,33-,34-,36-,43-,45-,47-
+V3A
SPI_CE#
SPI_SO
32-,39-
32-,39-
R374
15_5%R379
12
0_5%_OPEN
12
R118
3.3K_5%
1
2
U23
1
CE#
2
SO
3
WP#
4
VSS
SST_25VF080B_SOIC_8P
HOLD#
8
VDD
7
6
SCK
5
SI
+V3A
39-
SPI_HOLD#
3.3K_5%R373
2
1
32-,39-
SPI_CLK
32-,39-
SPI_SI
7-,11-,13-,14-,30-,32-,33-,34-,36-,43-,45-,47-
1
C421
0.1uF_16v
2
INVENTEC
TITLE
Vulcain UMA
SYSTEM BIOS&ODD EXT/B
CODE
CHANGE by
Puma_Chen
26-Dec-2008
SIZE
D
CS
SHEET
DOC. NUMBER
OF
36 50
REV
000 AX1
SATA_C_TXP0
SATA_C_TXN0
SATA_C_RXN0
SATA_C_RXP0
3131-
3131-
CLOSE TO SATA CONN
5-,11-,13-,14-,19-,29-,30-,32-,34-,37-,40-,41-
ODD_DET#
SATA_C_RXP1
SATA_C_RXN1
SATA_C_TXN1
SATA_C_TXP1
C346
3300pF_50v
12
12
3300pF_50vC347
+V5S
5-,11-,13-,14-,19-,29-,30-,32-,34-,37-,40-,41-
C78
1
2
0.1uF_16v
R20
C24
0_5%_OPEN
12
12
3300pF_50v
33-
3131-
3131-
SATA_RXN0
SATA_RXP0
+V5S
1
2
3300pF_50v
12
C9822
4.7uF_6.3V
C20
SATA_RXP1
SATA_RXN1
CN8
1
GND
2
A+
3
A-
4
GND
5
B-
6
B+
7
GND
8
V3.3
9
V3.3
10
V3.3
11
GND
12
GND
13
GND
14
V5
15
V5
16
V5
17
GND
18
RESERVED
19
GND
20
V12
21
G1
V12
22
V12
SYN_127043FR022G269ZR_22P
CN6003
P6
GND
P5
GND
P4
MD
P3
+5V
P2
+5V
P1
DP
S7
GND
S6
B+
S5
B-
S4
GND
S3
A-
S2
A+
S1
GND
SYN_127382FR013S530ZR_13P
G2
G1
G
G2
G
G3
G
G4
G
G1
G2
Puma_Chen
12-Feb-2009
INVENTEC
TITLE
Vulcain UMA
HDD & ODD CONN
SIZE CODE
D
DOC. NUMBER
AX1
CS
SHEET CHANGE by OF
37 50
REV
000
7-,8-,9-,10-,11-,12-,13-,14-,30-,34-,38-,47-
+V5A
(20/5)
1
C724
2
0.01uF_16v
SLP_S5#_3R
7-,8-,9-,10-,11-,12-,13-,14-,30-,34-,38-,47-
+V5A
(20/5)
1
C11
0.01uF_16v
2
SLP_S5#_3R
U3
1
GND
2
IN
IN3OUT
4
EN
GMT_G545B1P8U_MSOP_8P
U2
1
GND
2
IN
3
IN6OUT
4
8-,32-,38-
EN
GMT_G545B1P8U_MSOP_8P
+V5A_USB_0
38-
C726
1
+V5A_USB_0
38-
(20/5)
8
OUT
7
OUT
6
58-,32-,38-
OC#
1
2
1
2
C9833
0.1uF_16V
C735
22uF_6.3V
USB_P0-
USB_P0+
32-
32-
L516
1
4
WCM_2012_900T
Close to USB CON
USB_L_P0-
2
USB_L_P0+
3
2
0.1uF_16v
1
2
C725
1000pF_50v
CN508
1
G1
G
1
2
G2
G
2
3
G3
G
3
4
G4
G
4
SYN_020173MR004G565ZR_4P
+V5A_USB_1
38-
C716
+V5A_USB_1
38-
(20/5)
8
OUT
7
OUT
5
OC#
1
2
1
2
C9834
0.1uF_16V
C10
22uF_6.3V
USB_P1-
USB_P1+
32-
32-
L513
1
4
WCM_2012_900T
Close to USB CON
USB_L_P1-
2
USB_L_P1+
3
1
2
0.1uF_16v
1
2
C717
1000pF_50v
CN507
G1
1
G
1
G2
2
G
2
3
G3
G
3
G4
4
G
4
SYN_020173MR004G565ZR_4P
+V5A_USB_2
38-
7-,8-,9-,10-,11-,12-,13-,14-,30-,34-,38-,47-
+V5A
(20/5)
1
C12
0.01uF_16v
2
SLP_S5#_3R
U4
1
GND
2
IN
IN3OUT
4
8-,32-,38-
EN
GMT_G545B1P8U_MSOP_8P
+V5A_USB_2
OUT
7
OUT
6
5
OC#
1
2
C9
22uF_6.3V
USB_P2-
USB_P2+
32-
32-
L520
1
4
WCM_2012_900T
USB_L_P2-
2
USB_L_P2+
3
38-
(20/5)
8
Close to USB CON
C9835
1
2
0.1uF_16V
1
2
C748
0.1uF_16v
1
2
C747
1000pF_50v
CN511
G1
1
G
1
G2
2
G
2
G3
3
G
3
G4
4
G
4
SYN_020173MR004G565ZR_4P
INVENTEC
TITLE
Vulcain UMA
Close to USB CON
CHANGE by
USB CONN
SIZE
CODE
D
CS
23-Feb-2009 Puma_Chen
SHEET
38 50
REV DOC. NUMBER
000 AX1
OF
+V3AL
5-,6-,7-,14-,31-,39-,40-,47-
1
2
SCAN_3S_OUT(11:0)
SCAN_3S_IN(7:0)
LPC_3S_AD(3:0)
11-,13-,14-,15-,19-,20-,21-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-
40-,47-,49-
31-,39-,45-
LPC_3S_AD(3)
LPC_3S_AD(2)
LPC_3S_AD(1)
LPC_3S_AD(0)
C389
0.1uF_16v
SCAN_3S_IN(0)
SCAN_3S_IN(1)
SCAN_3S_IN(2)
SCAN_3S_IN(3)
SCAN_3S_IN(4)
SCAN_3S_IN(5)
SCAN_3S_IN(6)
SCAN_3S_IN(7)
C401
1
2
0.1uF_16v
40-,47-,49-
SCAN_3S_OUT(12)
SCAN_3S_OUT(13)
IM_5S_CLK
IM_5S_DATA
RUNSCI0#_3
PCI_3S_CLKRUN#
PCI_3S_SERIRQ
CLK_R3S_KBPCI
LPC_3S_FRAME#
NPCI_RESET#
1
C553
0.1uF_16v
2
+V3S
4040-
32-,3332-
32-
15-
31-,39-,4532-
1
C370
0.1uF_16v
2
SCAN_3S_OUT(0)
SCAN_3S_OUT(1)
SCAN_3S_OUT(2)
SCAN_3S_OUT(3)
SCAN_3S_OUT(4)
SCAN_3S_OUT(5)
SCAN_3S_OUT(6)
SCAN_3S_OUT(7)
SCAN_3S_OUT(8)
SCAN_3S_OUT(9)
SCAN_3S_OUT(10)
SCAN_3S_OUT(11)
4040-
1
R29
10K_5%
32-
12
10K_5%R359
1
2
+V3AL
5-,6-,7-,14-,31-,39-,40-,47-
39-
LED_3_NUM#
1
2
+VBATR
ACES_87216_2406_24P_OPEN
LOW_BAT#_3
7-,32-
+V3AL
4
3
32.768KHZ
C400
15pF_50V
5-,7-,8-,9-,11-,13-,30-,47-
5-,6-,7-,14-,31-,39-,40-,47-
C397
0.1uF_16v
21
20
19
18
17
16
13
12
10
9
8
7
6
5
29
28
27
26
25
24
23
22
41
42
35
36
40
38
76
55
57
54
51
50
48
46
52
53
45
1
2
3
30
31
32
33
34
43
44
62
63
64
65
66
67
94
1
C388
2
0.1uF_16v
U21
KOS00
KOS01
KOS02
KOS03
KOS04
KOS05
KOS06
KOS07
KOS08
KOS09
KOS10
KOS11
KOS12
KOS13
KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
EMCLK
EMDAT
IMCLK
IMDAT
KDAT
KCLK
nEC_SCI
CLKRUN#
SER_IRQ
PCI_CLK
LAD3
LAD2
LAD1
LAD0
LFRAME#
LRESET#
LPCPD#
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
1
2
2
+V3AL
58
39
14
VCC1
VCC1
Keyboard / Mouse Interface
SIRQ
Mgmt
Power
LPC Bus
AGND
VSS
72
11
11-,13-,14-,15-,19-,20-,21-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-
5-,6-,7-,14-,31-,39-,40-,47-
+V_RTC +V3AL
31-,34-
1
1
R355
0402_OPEN
2
2
R9616
12
0_5%
124
OUT0
125
OUT1
123
OUT7
OUT8
OUT9
OUT10
OUT11
GPIO01
GPIO02
GPIO03
GPIO04
GPIO05
GPIO07
GPIO08
GPIO09
GPIO11
GPIO012
GPIO013
GPIO014
GPIO015
GPIO016
GPIO017
GPIO019
GPIO020
GPIO021
GPIO024
GPIO025
GPIO026
GPIO027
GPIO028
GPIO029
GPIO030
GPIO031
GPIO032
AB1A_CLK
AB1A_DATA
AB1B_CLK
AB1B_DATA
XTAL1
XTAL2
CLOCKI
nRESET_OUT
TEST_PIN
VCC1_PWRGD
nBAT_LED
nPWR_LED
nFDD_LED
mDMS_LED
PWEGD
TP35
122
121
120
118
TP46
107
79
80
81
83
85
TP11
86
87
TP30
88
89
TP31
90
91
TP36
92
101
102
TP37
61
103
105
4
TP32
73
108
R349
74
TP1
93
TP2
98
TP3
99
100
126
112
111
110
109
70
71
59
75
60
69
77
113
115
114
116
78
95
NC
96
NC
97
NC
127
NC
128
NC
SMSC_KBC1070_VTQFP_128P
84
106
119
49
VCC1
VCC1
VCC1
VCC1
Access Bus
Intreface
Miscellaneous
VSS
VSS
VSS
37
82
47
56
VCC2
VSS
15
CAP
104
R352
0402_OPEN
68
VCC0
Genrel Purpose I/O Interface
32KHZ_OUT_GPIO22
VSS
VSS
117
1
C549
2
4.7uF_6.3V
TP13
8-,9-,10-,12-,13-,14-,32-,43-,46-
12
10K_5%
R568
1K_1%
12
12
5-,6-,7-,43-
R361
10K_5%
C552
1
2
0.1uF_16v
7-
47-
314119-
5-,6-
47-
40-
SCAN_3S_OUT(14)
40-
SCAN_3S_OUT(15)
TP14
TP15
6-
6-
31-,39-
4133-
15-
+V3S
1
C387
0.1uF_16v
2
KBC_PW_ON
BAT_GRN_LED#
PM_3S_KBCCPURST#
A_SD
PWM_3S_FAN#
CHGCTRL_3
PWR_SWIN#_3
BATCON
THM_MAIN#
EC_3S_A20GATE
SLP_S3#_3R
ADP_PRES
A_EAPD
PCI_3S_SERR#
CLK_R3S_KBC14
2
10K_5%
12
R356
1
1K_5%
CLK_R3S_DEBUG
LPC_3S_FRAME#
BUF_PLT_RST#
LPC_3S_AD(0)
LPC_3S_AD(1)
LPC_3S_AD(2)
LPC_3S_AD(3)
STBY_LED#
LED_3_CAPS#
LED_3_NUM#
VCC1_R_POR#_3
SPI_HOLD#
100K_5%
R184
SPI_CS1#
+V3AL
+V3S
11-,13-,14-,15-,19-,20-,21-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-
1
2
CRACK_GPIO8
66-
11-,20-,32-
R353
39-,4739-,47-
391447-
14-
15-
31-,39-,45-
33-,43-,45-
31-,39-,4531-,39-,4531-,39-,4531-,39-,45-
39-,4739-,47393932-,36-
SPI_CLK
32-,36-
SPI_CE#
32-,36-
SPI_SI
32-,36-
SPI_SO
3632-
5-,6-,7-,14-,31-,39-,40-,47-
1
R357
10K_5%_OPEN
+V3AL
2
5-,6-,7-,14-,31-,39-,40-,47-
1
1
R9641
5.1K_5%
5.1K_5%
2
2
12
100K_5%
SCL_MAIN
SDA_MAIN
PM_PWROK
VCC1_R_POR#_3
VCC1_POR#_3
BAT_AMBER_LED#
STBY_LED#
LED_3_CAPS#
PWR_GOOD_KBC
R9642
R358 10K_5%
R360
CN6
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
G1
25
21
22
G2
26
22
23
23
24
24
DEBUG PORT
RSMRST#
5-,6-,7-,14-,31-,39-,40-,47-
X2
1
2
C399
1
2
15pF_50V
EC_3S_A20GATE
31-,39-
R362
12
10K_5%
+V3S
11-,13-,14-,15-,19-,20-,21-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-
INVENTEC
TITLE
Vulcain UMA
KBC
DOC. NUMBER
CODE
D
AX1
CS
26-Dec-2008 Puma_Chen
SHEET CHANGE by
39 50
REV SIZE
000
OF
SCAN_3S_OUT(15)
SCAN_3S_OUT(10)
SCAN_3S_OUT(11)
SCAN_3S_OUT(14)
SCAN_3S_OUT(13)
SCAN_3S_OUT(12)
SCAN_3S_OUT(3)
SCAN_3S_OUT(6)
SCAN_3S_OUT(8)
SCAN_3S_OUT(7)
SCAN_3S_OUT(4)
SCAN_3S_OUT(2)
SCAN_3S_IN(0)
SCAN_3S_OUT(1)
SCAN_3S_OUT(5)
SCAN_3S_IN(3)
SCAN_3S_IN(2)
SCAN_3S_OUT(0)
SCAN_3S_IN(5)
SCAN_3S_IN(4)
SCAN_3S_OUT(9)
SCAN_3S_IN(6)
SCAN_3S_IN(7)
SCAN_3S_IN(1)
39393939393939393939393939-,40-,47393939-,4039-,4039-,4739-,4039-,403939-,4039-,4039-,40-
CN1
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
21
22
22
23
23
24
24
25
25
26
26
27
G1
G
27
28
G
G2
28
29
29
30
30
HRS_FH28_60_1SH_30P
+V3AL
5-,6-,7-,14-,31-,39-,47-
47K_5%
5 6
RS500
7
8
110234
9
SCAN_3S_IN(0)
SCAN_3S_IN(1)
SCAN_3S_IN(2)
SCAN_3S_IN(3)
SCAN_3S_IN(4)
SCAN_3S_IN(5)
SCAN_3S_IN(6)
SCAN_3S_IN(7)
IM_5S_CLK
IM_5S_DATA
+V5S
5-,11-,13-,14-,19-,29-,30-,32-,34-,37-,41-
1
1
R296
4.7K_5%
2
2
3939-
680pF_50v
R297
4.7K_5%
C345
+V5S
1
2
(15/5)
TOUCH PAD CNTR
CN7
1
1
2
2
3
G
G1
3
4
G
G2
4
ACES_8876641L_4P
KEYBOARD CONN
SCAN_3S_IN(7:0)
39-,40-,47-,49-
INVENTEC
TITLE
Vulcain UMA
KB & TP CONN
CODE
CS
SHEET
DOC. NUMBER
AX1
40 50
SIZE
CHANGE by OF
26-Dec-2008 Puma_Chen
D
REV
000
+V3S
11-,13-,14-,15-,19-,20-,21-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-
R147
12
0_5%
11-,13-,14-,15-,19-,20-,21-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-
AZ_3S_SDOUT
AZ_3S_BITCLK
AZ_3S_SDIN0
AZ_3S_SYNC
AZ_3S_RST#
+VAUDIO_VCC1
R171
10K_5%
G
32-
A_3S_ICHSPKR
LINE_OUT_R
LINE_OUT_L
AMP_SHUT#
1
C9809
0.047uF_16V
41-
12
0.047uF_16V
41-
12
C226
HP_JS
41-
+V5S
5-,11-,13-,14-,19-,29-,30-,32-,34-,37-,40-,41-
41-
0_5%_OPEN
1
C162
2
4.7uF_6.3V
31-
31-
31-
31-
31-
41-,42-
1
2
3
D
Q7
SSM3K7002F
S
2
R9850
1
2K_5%
R9851
12
2K_5%
R9856
12
0_5%_OPEN
R21
0_5%
12
R22
12
0_5%
R40
12
R96
12
100K_5%
0.1uF_10V
12
12
Place near pin1 and pin6 each
C221
0.1uF_16v
C222
0.1uF_16v
+V3S
1
R165
4.7K_5%
2
C9816
1
2
0.01uF_16V
2
C200
0.022uF_16V
12
12
C201
0.047uF_16v
12
C9810
0.047uF_16v
2
1
C193
1uF_6.3V
+VAUDIO_VCC
41-
12
41-
41-
1
2
HP_OUT_R
HP_OUT_L
C213
C1
0.1uF_16V
12
5-,11-,13-,14-,19-,29-,30-,32-,34-,37-,40-,41-
C217
1uF_10V
R9852
1K_5%
2
1
3
4
12
24
22
23
26
27
25
29
C194
10uF_6.3v
C9808
1
2
47pF_50V_OPEN
C9808 close to U15
R166
12
1
R170
0_5%_OPEN
2
C161
1
2
12pF_50V_OPEN
R160
100K_5%
12
R123
10K_5%
+V5S
12
U10
SPKR_RIN+
SPKR_RIN-
SPKR_LIN+
SPKR_LIN-
BYPASS
HP_EN
SPKR_EN#
HP_INR
HP_INL
REG_EN
REG_OUT
SPGND
5
21
AS_SDIN
33_5%
PCBEEP_IC_C PCBEEP_IC_CR PCBEEP_CRC
1
C160
1
2
0.01uF_16v
2
5-,11-,13-,14-,19-,29-,30-,32-,34-,37-,40-,41-
C216
1uF_6.3V
30
17
9
VDD
HPVDD
CPVDD
SPGND
CPGND
GND
CPVSS
11
28
13
12
1uF_6.3V
C9813
1
10uF_6.3V
2
U15
1
DVDD_IO
2
SDO
3
BITCLK
4
DVSS
5
SDI_CODEC
6
DVDD_CORE
7
SYNC
8
RESET#
C223
PCBEEP_IC
12
0.1uF_16v
+V5S
C196
1
12
2
10uF_6.3v
C215
1uF_6.3V
18
8
7
LOUT-
6
SPVDD
SPVDD
LOUT+
19
ROUT-
20
ROUT+
31
GAIN0
32
GAIN1
16
HP_OUTL
15
HP_OUTR
10
C1P
12
C1N
HPVSS
TML-PAD
TI_TPA6047A4RHBR_QFN_32P-004
14
33
C219
A_EAPD
33
32
29
30
31
28
TML
DMIC_CLK
SPDIF-OUT0
DMIC_0-GPIO1
GPIO2-SPDIF-OUT1
EAPD-GPIO0-SPDIFOUT
PCBEEP-MONO
PORTB_L
PORTE_L
PORTE_R
SENSE_A
9
13
11
12
10
SENSE_A
R129 39.2K_1%
1
C159
2
1000pF_50V
+V5S
5-,11-,13-,14-,19-,29-,30-,32-,34-,37-,40-,41-
1
C195
12
10uF_6.3v
2
C9811
0.47uF_6.3V
12
12
0.47uF_6.3V
C9812
HP_OUTL
HP_OUTR
12
C218
1uF_6.3V
R9855
12
39-
0_5%_OPEN
C209
HP_OUT_R_IC
HP_OUT_L_IC
26
27
PORTA_L
PORTA_R
PORTB_R
PORTC_L
14
15
12
12
12
R130 20K_1%
C208
12
4.7uF_6.3V
12
41-
4.7uF_6.3V
24
23
22
21
20
19
18
17
C163
12
C228
12
41-
SENSE_B
1
2
C156
1uF_6.3V
+VAUDIO_VCC1
LINE_OUT_R
LINE_OUT_L
1
2
10uF_6.3V
12
C229
1
25
PORTD_R
PORTD_L
SENSE_B
CAP2
VREFOUT-C
VREFOUT-B
VREFFILT
AVSS1
AVDD1
PORTC_R
IDT_92HD75B2X5NLGXYBX_QFN_32P
16
1uF_6.3V
1uF_6.3V
A_MIC2_IC
A_MIC1_IC
C127
2.49K_1%R125
0_5%_OPEN
R172
60.4_1%
HP_OUT_L_R
12
1
2
HP_OUT_R_R HP_OUT_R_JACK
R173
1
1
60.4_1%
R174
R189
20K_5%
20K_5%
2
2
4141-
C214
1
2
C158
1000pF_50V
1uF_6.3V
1uF_6.3V
2
41-,42-
R191
R193
0_5%
HP_OUT_R
HP_OUT_L
+VAUDIO_VCC1
41-,42-
R126
2
1
2.49K_1%
42-
INT_MIC
42-
A_MIC_R
42-
A_MIC_L
+V5S
5-,11-,13-,14-,19-,29-,30-,32-,34-,37-,40-,41-
2
2
R192
0_5%
1
1
1
1
R190
0_5%_OPEN
2
2
L6
BLM11A121S
12
1
2
L5
BLM11A121S
C198
100pF_50V
D5
12
(35/15)
C165
1
100pF_50v
2
Colse to internal speaker.
HP_OUT_L_JACK
12
12
C199
100pF_50V
SGND1
BAT54A
3
R200
12
100K_5%
41-
+VMIC_BIAS_C
1
2
SPK_OUT_RSPK_OUT_R+
1
2
C192
100pF_50v
39-
A_SD
+V3S
11-,13-,14-,15-,19-,20-,21-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-
AMP_SHUT#
+VMIC_BIAS_B
42-
C89
0.1uF_16v
Place close to pin17
PHP_PESD5V0S1BB_SOD523_2P
42-
1
C126
2
10uF_6.3v_OPEN
Colse to internal speaker.For ESD
D2015
12
D2014
12
PHP_PESD5V0S1BB_SOD523_2P
CN9
1
1
2
2
ACES_87213_0200_2P
Internal Speaker
41-
HP_JS
JACK1
1
2
6
3
4
5
SIN_2SJ_C82014D3_6P
C204
C205
C207
C206
C224
C225
1
12
12
12
12
12
0.1uF_16v
2
0.1uF_16v
0.1uF_16v
0.1uF_16v
0.1uF_16v
0.1uF_16v
For EMI.
+VAUDIO_VCC1
41-,42-
1
C118
1uF_6.3V
2
SENSE_A_A
SENSE_A_B
_OPEN
_OPEN
G
G1
G2
G
Earphone Jack
Recommend a copper trace about 80 mills wide under CODEC(on the GND layer)
bridging the 2 planes across the moat.
For pin7,use very direct connection to DGND plane.
Plane using double via.
12
C203
1uF_6.3V
For EMI
+VAUDIO_VCC
R154
12
0_5%
41-
Place near CODEC
Q23
SSM3K7002F
Q22
SSM3K7002F
R124
12
0_5%
(0603)
+V5S
5-,11-,13-,14-,19-,29-,30-,32-,34-,37-,40-,41-
2
R195
100K_5%
3
D
1
1
G
S
2
+V5S
1
3
2
D
G
1
S
2
1
C202
0.1uF_16v
2
Close to R129
5-,11-,13-,14-,19-,29-,30-,32-,34-,37-,40-,41-
R194
47K_5%
1
C197
0.1uF_16v
2
41-
42-
HP_JS
MIC_SENSE
Close to R130
INVENTEC
TITLE
Vulcain UMA
AUDIO CODEC
DOC. NUMBER
CODE
SIZE
AX1
D
CHANGE by SHEET
Puma_Chen
26-Dec-2008
CS
REV
000
OF
50 41
+VAUDIO_VCC1 MIC_REF1
41-,42-
R9792
47K_5%
R9791
47K_5%
1
2
1
2
C9741
12
4.7uF_6.3V
+VAUDIO_VCC1
41-,42-
4
U7012-B
5
+
OUT
6
11
7
R9794
100_5%
12
TI_TLV2464IPW_TSSOP_14P
JACK502
SIN_2SJ_C82014D3_6P
MIC Jack
SGND1
CHENMKO_CHPZ6V2_3P
D2009
1
2
6
3
4
5
C9729
100pF_50V
For EMI
A
EXT_JACK_MIC1
EXT_JACK_MIC2
C9730
1
1
2
100pF_50V
2
C9798
1
2
1uF_6.3V
C1 C2
Close to JACK503 FOR EMI
BLM11A121S
BLM11A121S
1
C9742
1000pF_50V_OPEN
2
Close to JACK503 pin1
MDC_3S_SDOUT
MDC_3S_SYNC
MDC_3S_SDIN1
MDC_3S_RST#
42-
C9740
12
4.7uF_6.3V
+VMIC_BIAS_B
R9796
4.7K_5%
L528
L529
41-
1 2
1 2
MIC_SENSE
31-
313131-
41-
1
4.7K_5%
2
1 2
R9797
Close to CODEC
EXT_MIC1
EXT_MIC2
CN6008
2
-1+
HIT_HMO60_HO3PZ_G_2P
Internal MIC
C9738
0.47uF_16v
12
C9739
0.47uF_16v
12
11-,13-,14-,15-,19-,20-,21-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,43-,45-,46-,47-
CN11
1
34
56
78
9
11
G1
G2
G3
ACES_88020_1210N_12P
INT_MIC_JACK
PESD5V0U1BB_OPEN
For ESD
R9793
1
2
0_5%
R9795
1
2
0_5%
2
10
12
G4
G5
G6
+VMIC_BIAS_C
1 2
D2010
12
10K_5%
1
C9732
68pF_50v
2
12
10K_5%
1
C9735
68pF_50v
2
31-
41-
1
R9800
3K_1%
2
1
C9745
47pF_50v
2
100pF_50v
R9788
100pF_50v
R9790
MDC_3S_BITCLK
C9746
12
0.1uF_16v
0_5%_OPEN
MIC_REF1
42-
C9733
MIC_REF1
42-
C9737
R97
12
0_5%_OPEN
R9801
1
0_5%
INT_MIC_C
R115
12
+VAUDIO_VCC1
1
3
+
2
2
-
+VAUDIO_VCC1
1
10
+
2
9
-
20 MIL
C427
1
2
0.1uF_16v
2
1
2
OUT
OUT
INT_MIC_R
41-,42-
4
11
41-,42-
4
11
R119
12
0_5%_OPEN
C9744
100pF_50v
R9799
12
10K_5%
C9743
68pF_50v
1
C9736
0.1uF_16v
2
U7012-A
1
C9731
33pF_50V
R9787
100K_5%
U7012-C
8
C9734
33pF_50V
R9789
100K_5%
+V3S
C443
1
2
10uF_6.3v
MIC_REF1
42-
+VAUDIO_VCC1
1
2
INT_MIC_AMP
41-,42-
4
U7012-D
12
+
14
OUT
13
11
41-
A_MIC_L
TI_TLV2464IPW_TSSOP_14P
12
1 2
TI_TLV2464IPW_TSSOP_14P
12
1 2
41-
A_MIC_R
TI_TLV2464IPW_TSSOP_14P
C9747
100pF_50V
12
R9798
1 2
100K_5%
41-
INT_MIC
MDC CNTR
CHANGE by
Puma_Chen 26-Dec-2008
INVENTEC
TITLE
Vulcain UMA
MDC CNTR
DOC. NUMBER
CODE
SIZE
AX1 000
D
CS
SHEET
REV
OF
50 42
11-,13-,14-,15-,19-,20-,21-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,45-,46-,47-
+VDD
+V2.5_VDD
43-
43-,44-
+V3S
R9675
4.7K_5%
+V3_LAN
34-,43-,44-,45-
1
2
U7006
1
2
3
4
ATM_AT24C08BN_SOIC_8P
8
VCC
A0
7
A1
WP
6
A2
SCL
5
SDA
GND
R9677
4.7K_5%
1
2
1
R9676
4.7K_5%
2
+V3_LAN
34-,43-,44-,45-
1
2
C9425
0.1uF_16V
8-,9-,10-,12-,13-,14-,32-,39-,46-
SLP_S3#_3R
ADP_PRES
5-,6-,7-,39-
7-,11-,13-,14-,30-,32-,33-,34-,36-,45-,47-
1
R737
12
2
220K_5%
+V3A
5
3
U513
NC7SZ02M5X
4
PMV65XP
Q2013
2
3
S
D
G
1
R9655
12
220K_5%
+V3_LAN
1
2
4.7uF_6.3V
34-,43-,44-,45-
0.1uF_16v
C96
1
2
SSM3K7002F
C721
Q2014
1
G
1 2
R9656
100_5%
3
D
S
2
PCIE_C_RXP6
PCIE_C_RXN6
PCIE_C_TXN6
PCIE_C_TXP6
CLK_PCIE_LAN
CLK_PCIE_LAN#
LED_3S_LANACT#
LED_3S_LANLINK#
C9426
1
2
4.7uF_6.3V
3232-
32321515-
44-
32-,44-
close to pin64
GPIO20_LOM_DISABLE#
C9427
1
2
0.1uF_16V
close to pin39
C9428
12
C9429
0.1uF_16V
C9422
1
2
4.7uF_6.3V
34-,43-,44-,45-
0.1uF_16V
PCIE_RXP6
12
PCIE_RXN6
+V3_LAN
BUF_PLT_RST#
PCIE_WAKE#
12
32-
0_5%_OPEN
R9678
49
PCIE_TXP
50
PCIE_TXN
51
AVDD
52
AVDD
53
PCIE_RXN
54
PCIE_RXP
55
REFCLKP
56
REFCLKN
57
RESERVED
58
VDD
59
LED_ACTn
60
LED_SPEEDn
61
VDDO_TTL
62
RESERVED
63
LED_LINKn
64
VDD25
65
EPAD
R9679
12
4.7K_5%
33-,39-,45-
32-,45-
46
47
45
48
VDD
TESTMODE
VMAIN_AVLBL
U523
MARVELL_88E8042_QFN_64P
VDDO_TTL
VDD
1
3
2
43
44
VDD
VDDO_TTL
PU_VDDO_TTL
PD_12
PD_254PERSTn
5
42
41
CLKREQn
VPD_DATA
WAKEn
7
6
40
VDDO_TTL
VDD
VDDO_TTL
8
38
37
39
VDD
VPD_CLK
RESERVED
SWITCH_VAUX
SWITCH_VCC
LOM_DISABLEn
9
11
10
Please close to XTALO and XTAL1
35
36
34
RESERVED
RESERVED
RESERVED
VDD
VAUX_AVLBL
13
12
C9423
33
VDD
TSTPT
HSDACN
HSDACP
AVDDL
RSET
XTALI14XTALO
16
15
12
22pF_50v
32
NC
31
NC
30
NC
29
28
NC
27
NC
26
NC
25
24
23
NC
22
NC
21
TXN
20
TXP
19
18
RXN
17
RXP
R9674
12
2K_1%
X505
1
25MHZ
22pF_50v
+V2.5_VDD
2
12
43-,44-
C9424
+V2.5_VDD +V3_LAN
43-,44-
44-
TRD1N
44-
TRD1P
44-
TRD0N
44-
TRD0P
1
2
+VDD
1
2
C9430
0.1uF_16V
43-
C9440
0.1uF_16V
1
2
C9441
1
2
0.1uF_16V
0.1uF_16V
1
2
1
2
C9432
0.1uF_16V
C9442
0.1uF_16V
C9433 C9431
1
2
0.1uF_16V
C9443
1
2
0.1uF_16V
1
2
1
2
C9434
0.1uF_16V
C9444
0.1uF_16V
Please bypass caps as close as possible with every power pin of MARVEL 88E8042
CHANGE by OF
34-,43-,44-,45-
1
2
C9435
0.1uF_16V
1
2
C9436
0.1uF_16V
1
2
Puma_Chen 26-Dec-2008
C9437
C9438
1
2
0.1uF_16V
0.1uF_16V
INVENTEC
TITLE
Vulcain UMA
NIC 10/100- CONTROLLER
CODE REV
SIZE
D
CS
SHEET
C9439
1
2
0.1uF_16V
DOC. NUMBER
AX1 000
50 43
+V2.5_VDD
43-
TRD1N
TRD1P
TRD0N
TRD0P
C315
1
2
0.1uF_16v
U510
4343-
4343-
2
3
1
7
8
6
4
5
BOTH_TS8121C_LF_SOP_16P
15
TCT TCT
14
TX-
TD-
16
TX+
TD+
10
RCT
RCT
9
RX-
RD-
11
RX+
RD+
12
NC
NC
13
NC
NC
1
2
C317
0.1uF_16v
4444-
4444-
RJ45_TARJ45_TA+
RJ45_TBRJ45_TB+
C105
0.01uF_50V
1
2
2
R243
1
75_1%
C108
1
2
0.01uF_50V
2
R244
75_1%
1
RJ45_TB+
RJ45_TB-
RJ45_TA+
RJ45_TA-
1
2
2200pF_2000v
C701
+V3_LAN
34-,43-,45-
R201
12
444444-
C114
0.01uF_50V
R177
330_5%
330_5%
12
1
2
2
R185
1
75_1%
C115
1
2
0.01uF_50V
2
R186
1
75_1%
11 YL2 12
YL1
TX+
1
TX-
2
RX+
3
C+
4
C-
5
RX-
6
D+
7
D-
8
GL1 9 GL2
JACK501
SYN_100073FR012G101ZL_12P
G1 G
G2 G
10
32-,43-
LED_3S_LANLINK#
43-
LED_3S_LANACT#
C9830
1
2
1000pF_50V_OPEN
CHANGE by
INVENTEC
TITLE
Vulcain UMA
NIC 10/100- RJ45
DOC. NUMBER
CODE
SIZE
AX1
D
CS
23-Feb-2009 Puma_Chen
SHEET
44 50
REV
000
OF
PCIE_WAKE#
WLAN_PRIORITY
BT_PRIORITY
CLK_R_REQG#
CLK_R_PCIE_MINI2#
CLK_R_PCIE_MINI2
BUF_PLT_RST#
CLK_R3S_MINICARD
PCIE_C_RXN2
PCIE_C_RXP2
PCIE_C_TXN2
PCIE_C_TXP2
CL_CLK1
CL_DATA1
CL_RST#1
32-,43454515-
1515-
33-,39-,43-,4515-
3232-
3232-
323232-
R757
R758
R759
1
2
0_5%_OPEN
12
0_5%_OPEN
12
0_5%_OPEN
12
1
C416
C409
0.1uF_16v
CL_R_CLK1
CLK_R_DATA1
2
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51 52
G1
C415
1
2
0.1uF_16v
10uF_6.3v
CN509
WAKE#
Reserved
Reserved
CLKREQ#
GND
REFCLKREFCLK+
GND
Reserved
Reserved
GND
PERn0
PERp0
GND 1.5V
GND
PETn0
SMB_DATA
PETp0
GND
Reserved
Reserved
LED_WWAN#
Reserved
LED_WLAN#
Reserved
LED_WPAN#
Reserved
Reserved
Reserved
Reserved
GG
TYCO_1720007_1_52P
WLAN CNTR
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
PERST#
+3.3Vaux
SMB_CLK
USB_D-
USB_D+
+V3S
11-,13-,14-,15-,19-,20-,21-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,46-,47-
+V1.5S
10-,13-,18-,24-,34-,46-
C410
1
2
0.1uF_16v
2
3.3V
4
GND
6
1.5V
8
10
12
14
16
18
GND
20
22
24
26
GND
28
30
32
34
GND
36
38
40
GND
42
44
46
48
1.5V
50
GND
3.3V
G2
C414
1
2
31-,3931-,3931-,3931-,3931-,39-
0.1uF_16v
LPC_3S_FRAME#
LPC_3S_AD(3)
LPC_3S_AD(2)
LPC_3S_AD(1)
LPC_3S_AD(0)
33-,39-,43-,45-
1
2
32-,45-
C413
4.7uF_6.3V
XMIT_OFF#
BUF_PLT_RST#
+V3_LAN
34-,43-,44-
1
2
0.1uF_16v
C412
1
2
C411
10uF_6.3v
BT_OFF
+V3A
R187
10K_5%
32-
7-,11-,13-,14-,30-,32-,33-,34-,36-,43-,47-
1
2
12
220K_5%
R188
2
S
PMV65XP
LED_BLUETOOTH
WLAN_PRIORITY
BT_PRIORITY
BLUETOOTH_VCC
3
D
G
1
USB_P6+
Q29
USB_P6-
1
2
3232454545-
C151
10uF_6.3v
R9627
R9626
1
0.1uF_16v
2
12
0_5%_OPEN
12
0_5%_OPEN
C150
ACES_8213_0800N_8P
1
2
3
4
5
6
7
8
BLUETOOTH CNTR
CN20
47-
Q65
3
SSM3K7002F
R9643
100K_5%
1
G
D
S
2
SSM3K7002F
1
2
Q2002
1
D
G
S
LED_BLUETOOTH
G1
G2
XMIT_OFF#
45-
R9628
100K_5%
32-,45-
1
2
WL_BT_LED#
3
2
INVENTEC
TITLE
Vulcain UMA
MINICARD & BT CONN
CODE
CHANGE by
Puma_Chen
26-Dec-2008
D
CS
SHEET
DOC. NUMBER SIZE
AX1 000
45
REV
OF
50
CLK_R3S_CR48
USB_P3+
USB_P3-
3232-
C7015
0402_OPEN
15-
1
2
R9673
12
0_5%
C7016
0402_OPEN
0_5%_OPEN
CLK_R_R3S_CR48
C751
0.1uF_16V
1
C755
2
1
2
4.7uF_6.3V
SD_CLK
11-,13-,14-,15-,19-,20-,21-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-
+V3S +V3S
R753
11-,13-,14-,15-,19-,20-,21-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-
+V3S
1
2
1
1
2
2
SDDATA3
SD_CMD
R41
12
46-
0_5%
10pF_50V_OPEN
11-,13-,14-,15-,19-,20-,21-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-
+VCC_SD
46-
C750
2.2uF_6.3V
C758
2.2uF_6.3V
46-
46-
1
C97
2
1
2
+VCC_SD
U517
EXT48IN1GPON7
2
CHIPRESET#
3
REXT
4
VD33P
5
DP
6
7
VS33P
8
VDD
9
CF_V33
10
V33
11
CTRL4
12
XDCDN
13
XDCEN
XDCIS14XDWPN
ALCOR_AU6433_GEF_GR_QFN_28P
1
R752
330_5%
2
46-
10K_5%
R350
12
SDDATA0
46-
29
TML-PAD
28
27
46-
CTRL1
CTRL3
DATA1
DATA0
DATA7 DM
DATA6
CTRL0
DATA5
CTRL2
DATA4
DATA3
DATA2
SD_WP
26
46-
SD_CD#
46-
25
SDDATA1
24
46-
SDDATA0
23
22
21
46-
SD_CLK
20
19
46-
SD_CMD
18
17
46-
SDDATA3
16
46-
SDDATA2
15
SD/MMC CONN
CN6002
1
DAT3
2
CMD
3
VSS
4
VDD
5
CLK
6
VSS
7
DAT0 DAT1
PLAS_CS165_14P
CD_WP_COM
DAT2
G1
GND
G2
GND
12
11
CD
10
WP
9
8
+V3S
11-,13-,14-,15-,19-,20-,21-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-
C710
1
0.1uF_16v
2
NEWCARD_SD#
+V3_EXP
46-
C711
1
2
0.1uF_16v
C333
4.7uF_6.3V
1
2
R9615
12
32-
0_5%_OPEN
C331
1
10uF_6.3v
2
PLT_RST#
SLP_S3#_3R
8-,9-,10-,12-,13-,14-,32-,39-,43-
PERST#
U18
20-,33-
1
SYSRST#
2
SHDN#
3
STBY#
4
3.3VIN
5
3.3VIN
6
3.3VOUT
7
3.3VOUT
8
46-
PERST#
9
NC
10
GND
TI_TPS2231PW_TSSOP_20P
RCLKEN
AUXIN
AUXOUT
1.5VIN
1.5VIN
1.5VOUT
1.5VOUT
CPPE#
CPUSB#
11-,13-,14-,15-,19-,20-,21-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-
0.1uF_16v
20
OC#
19
18
17
16
15
14
13
12
46-
CPPE#
11
46-
CPUSB#
+V1.5S
+V1.5_EXP
C720
1
1
2
2
0.1uF_16v
1
C708
2
+V3AUX_EXP
C361
1
10uF_6.3v
2
10-,13-,18-,24-,34-,45-
46-
C360
10uF_6.3v
+V3S
1
2
4.7uF_6.3V
1
2
C332
46-
C719
0.1uF_16v
CN6009
G3 G4
G1 G2
SANTA_130888_2_4P
+V3S
11-,13-,14-,15-,19-,20-,21-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-
+V1.5_EXP
46-
+V3_EXP
46-
PCIE_C_TXP5
+V3AUX_EXP
46-
R684
R269
R268
1
1
1
2
2
2
4.7K_5%
4.7K_5%
0_5%_OPEN
46-
SD_CD#
46-
SD_WP
4646-
SDDATA2
46-
SDDATA1
CPUSB#
C330
1
0.1uF_16v
2
C712
1
0.1uF_16v
2
C359
1
0.1uF_16v
2
PCIE_C_TXN5
PCIE_C_RXP5
PCIE_C_RXN5
CLK_R_PCIE_NEWCARD
CLK_R_PCIE_NEWCARD#
CPPE#
CLK_R_REQH#
PERST#
USB_P7+
USB_P7-
R685
1
0_5%_OPEN
2
46-
3232-
3232-
15154615-
3232-
SANTA_130810_7_26P
26
26
25
25
G
24
24
G2
23
G
23
G1
22
22
21
21
20
20
19
19
18
18
17
17
16
16
15
15
14
14
13
13
12
12
11
11
10
10
9
9
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
CN5
NEW CARD CONN
CHANGE by
Puma_Chen
12-Feb-2009
INVENTEC
TITLE
Vulcain UMA
NEW CARD & SD/MMC
DOC. NUMBER SIZE
CODE REV
D
CS
SHEET
46 50
000 AX1
OF
PWR_SWIN#_3
39-,47-
+V3A
7-,11-,13-,14-,30-,32-,33-,34-,36-,43-,45-,47-
1
G
Q39
D
S
3
2
SSM3K7002F
32-
PWR_SWIN2#_3
WL_BT_LED#
STBY_LED#
SCAN_3S_OUT(0)
SCAN_3S_IN(0)
PWR_SWIN#_3
PHP_PESD5V2S2UT_SOT23_3P
+V3S
11-,13-,14-,15-,19-,20-,21-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-
+V3AL
5-,6-,7-,14-,31-,39-,40-,47-
LED&SWITCH BOARD CNTR
453939-,4039-,4039-,47-
1
2
D2008
1
2
3
C9826
1
2
1000pF_50V
C9825
1
2
1
2
C9827
1000pF_50V 1000pF_50V
ACES_88746_100N_10P
C9823
1
2
0.1uF_16V
C9824
0.1uF_16V
CN2
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
G1
G
9
10
G
G2
10
BAT_AMBER_LED#
BAT_GRN_LED#
LED_3_CAPS#
7-,11-,13-,14-,30-,32-,33-,34-,36-,43-,45-,47-
BATTERY-CHARGE LED
D12
39-
39-
1
2
1000pF_50V_OPEN
C9829
HT_191UY
2 1
D11
S1_023459
2 1
C9828
1
2
1000pF_50V_OPEN
7-,11-,13-,14-,30-,32-,33-,34-,36-,43-,45-,47-
CAP LED
39-
LID_SW#_3
100pF_50v
D8
LITEON_LTW_C190DA5
C9831
1
2
1000pF_50V_OPEN
LID SWITCH
+V3A
1
R9644
100K_5%
2
30-,32-
C9794
C9793
1
2
0.01uF_16v
2 1
1
2
E-COMS_BC2648_B3_F_SOT23_3P
1
2
5-,6-,7-,14-,31-,39-,40-,47-
R157
270_5%
12
12
R156
270_5%
1
U7019
VDD
GND
OUT
R148
270_5%
3
+V3AL
+V3A
5-,7-,8-,9-,11-,13-,30-,39-,47-
2
5-,7-,8-,9-,11-,13-,30-,39-,47-
+VBATR
C9799
0.1uF_25V
C9800
0.1uF_25V
12
12
+VBATR
+VBATR
5-,7-,8-,9-,11-,13-,30-,39-,47-
5-,7-,8-,9-,11-,13-,30-,39-,47-
+VBATR
C9801
0.1uF_25V
C9802
0.1uF_25V
12
+VCC_CORE
12
9-,10-,11-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-
+V5A
7-,8-,9-,10-,11-,12-,13-,14-,30-,34-,38-
9-,10-,11-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-
+V1.8
8-,10-,12-,20-,23-,24-,26-,27-
+V1.8
8-,10-,12-,20-,23-,24-,26-,27-
5-,7-,8-,9-,11-,13-,30-,39-,47-
11-,18-
+VBATR
11-,13-,14-,15-,19-,20-,21-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-
+VCCP
C9803
+VCCP
C9804
C9807
+V3S
12
0.1uF_16V
11-,13-,14-,15-,19-,20-,21-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-
+V3S
12
0.1uF_16V
11-,13-,14-,15-,19-,20-,21-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-
+V3S
12
0.1uF_16V
+VADP
C9819
5-,6-
12
0.1uF_25V
+VADP
C9818
5-,6-
12
0.1uF_25V
EMC:For power plan
INVENTEC
TITLE
Vulcain UMA
BUTTON & LED
CHANGE by
Puma_Chen
24-Feb-2009
SIZE
D
CODE
CS
SHEET
DOC. NUMBER
AX1
REV
000
OF
50 47
SCREW3_8_1P
S1
S3
SCREW3_8_9_1P
S5
SCREW3_6_7_1P
S2
SCREW3_8_9_1P
S4
SCREW3_6_7_1P
S10
SCREW3_8_10_1P
SCREW3.4_6_6_1P
S6
SCREW3.4_6_6_1P
S8
CPU
SCREW3.4_6_6_1P
S7
SCREW3.4_6_6_1P
S9
SCREW3.7_4_6_1P
S15
SCREW3.7_4_6_1P
S17
MINI CARD
S16
SCREW3.7_4_6_1P
S18
SCREW3.7_4_6_1P
S13
SCREW2_0_6_1P
MDC
S14
SCREW2_0_6_1P
FIX7
FIX_MASK
FIX8
FIX_MASK
FIX9
FIX_MASK
FIX10
FIX_MASK
FIX11
FIX_MASK
FIX12
FIX_MASK
FIX37
FIX_MASK
FIX38
FIX_MASK
S11
SCREW3_8_10_1P
S19
SCREW3_8_10_1P
S21
MAIN BOARD
S12
SCREW3_8_10_1P
SCREW3_8_10_1P
CHANGE by
INVENTEC
TITLE
Vulcain UMA
SCREW
SIZE
CODE
CS
DOC. NUMBER
AX1
48 50
26-Dec-2008 Puma_Chen
D
REV
000
OF SHEET
POWER BUTTON
+V3AL_DB
49-
R3003
12
100K_5%
1
C3000
1000pF_50v
2
D3003
2
PHP_PESD5V0S1BB_SOD523_2P
DB_DGND
WIRELESS BUTTON
SCAN_3S_OUT(0)_DB SCAN_3S_IN(0)_DB
39-,49-
MITSUMI_SOT_152HST_4P
1
SW3000
214
49-
PWR_SWIN#_3_DB
MITSUMI_SOT_152HST_4P
3
SW3001
214
39-,40-,49-
3
DB_DGND
POWER / STANDBY LED
+V3AL_DB
49-
STBY_LED#_DB
D3002
49-
LITEON_LTW_C190DA5
12
2 1
270_5%
R3002
WL_BT_LED#_DB
S3000
SCREW5.5_8_10_1P
+V3S_DB
49-
S3001
49-
EVL_19_21UYC_S530_A2_TR8
1
R3001
300_5%
2
SCREW5.5_8_10_1P
DB_DGND DB_DGND
D3001
21
2 1
D3000
EVL_19_21_B7C_ZQ1R2_3T_2P
49-
+V3S_DB
+V3AL_DB
WL_BT_LED#_DB
STBY_LED#_DB
SCAN_3S_OUT(0)_DB
SCAN_3S_IN(0)_DB
PWR_SWIN#_3_DB
12
R3000
130_1%
49-
494939-,4939-,40-,4949-
DB_DGND
LED&SWITCH BOARD
FIX3001
FIX_MASK
FIX3000
FIX_MASK
FIX3005
FIX_MASK
+V3S_DB
DB_DGND
PAD3000
1
2
3
4
5
6
7
8
9
10
SMDPAD_10P
49-
WLAN LED
SWITCH DAUGHTER BOARD
FIX3003
FIX_MASK
FIX3004
FIX_MASK
FIX3002
FIX_MASK
INVENTEC
TITLE
Vulcain UMA
SWITCH Board
SIZE CODE
CHANGE by SHEET OF
26-Dec-2008 Puma_Chen
D
DOC. NUMBER REV
AX1
CS
49 50
000
CN5000
P6
GND
P5
GND
P4
MD
P3
+5V
P2
+5V
P1
DP
S7
GND
S6
B+
S5
B-
S4
GND
G1
G2
G3
ALLTOP_C18601_11305_L_13P
S3
A-
G
S2
A+
G
S1
G
GND
CN5001
P6
GND
P5
GND
P4
MD
P3
+5V
P2
+5V
P1
DP
S7
GND
S6
B+
S5
B-
S4
GND
S3
A-
S2
A+
S1
GND
SANTA_202001_1_13P
G1
G
G2
G
EX_ODD_GND EX_ODD_GND
FIX5001
FIX_MASK
FIX5002
FIX_MASK
FIX5003
FIX_MASK
ODD EXTEND/B
EX_ODD_GND
SCREW2.8_7_1P
S5000
EX_ODD_GND
SCREW2.8_7_1P
S5001
EX_ODD_GND EX_ODD_GND
INVENTEC
TITLE
Vulcain UMA
15.4"W ODD Extend Board
SIZE
12-Feb-2009 Puma_Chen
D
CODE
CS
SHEET CHANGE by
DOC. NUMBER
AX1
50 50
REV
000
OF