TT 2.0
PV1-Build A01 Final
2008/04/08
DATE
CHANGE NO.
REV
DRAWER
DESIGN
CHECK
RESPONSIBLE
SIZE = DOC. NUMBER
FILE NAME :
P/N
XXXX-XXXXXX-XX
XXXXXXXXXXXX
DATE
POWEREE
VER :
DATE
INVENTEC
TITLE
TT20
SIZE
CODE3
A3
1310A21501-0 AX4
CS
REV
OFSHEET
701
Table Of Content
PAGE
5- DC& Battery Charger
6- Selector & Battery CONN
7- +V5A, +V3A & +V1.8S
8- OCP
9- +VCC_NB & V1.2S
10- +VCC_CORE
11- POWER
12- DDR2 POWER
13- Power(Sleep)
14- Power(Sequence)
15- Clock Generator
16- AMD CPU-1
17- AMD CPU-2
18- AMD CPU-3
19- AMD CPU-4
20- Thermal & Fan Controller
21- RS780 -1
22- RS780 -2
23- RS780 -3
24- RS780 -4
25- DDR2-DIMM0
26- DDR2-DIMM1
27- DDR2-DAMPING
28- VIDEO MEMORY
29- CRT& S-Vedio CONN
PAGE
30- LCD CONN
31- SB700-1
32- SB700-2
33- SB700-3
34- SB700-4
35- KBC
36- SPI & Accelero-Meter
37- INT. KBC/Touch Pad Devices
38- Super I/O
39- TPM V1.2
40- HDD CONN (SATA)
41- SATA ODD & USB WEBCAM
42- USB CONN
43- Express DB CONN-MB SIDE
44- Audio DB CONN-MB SIDE
45- 7 IN 1 & SIM DB CONN-MB SIDE
46- MiniCard
47- LAN Interface
48- LAN RJ45 CONN
49- Docking CONN
50- Screw
51- BlueTooth
52- Power/LED
53- SW/B connector
PAGE
54- 1394
55- SIM CARD Daughter Board
56- Serial Port Connector
57- 7 IN 1 & USB Daughter Board (TT)
58- 7 IN 1 & USB Daughter Board (TT)
59- ODD EXTENSION BOARD
60- SERIAL BOARD
61- POWER BUTTON/LID SWITCH
62- AUDIO CONN
63- AUDIO DAUGHTER BOARD
64- Earphone & MIC JACK
65- Audio AMP & INT. Speaker CONN
66- MDC CONN
67- NEW CARD CNTR
68- NEW CARD
69- NEW CARD LED
70- FINGER PRINT READER
INVENTEC
TITLE
TT2.0
CODE
CHANGE by
Kevin Hsiao
8-Apr-2008
SIZE
A3
CS
SHEET
DOC. NUMBER
270
REV
A011310A2150101
OF
Inventec Confidential
CLK GEN
ICS9LPRS476KLFT
Thermal Sensor
TV Docking
CRT Docking
Fixed ODD
HDD
TV
LCM
CRT
DVI
Docking
S1G2 Socket/638 pin
LVDS
TMDS
SATA 0
SATA 1
AMD
Lion / Sable
Hyper
Transport 3
AMD
RS780
FCBGA
A-link
DDR2 Interface
DDR2 Interface
DDR II _SODIMM0
PCIE1
PCIE x1
PCIE0
Giga-bit LAN
BCM 5787M
DDR2
LFB
Docking
NIC
DDR II _SODIMM1
RJ45
PCIE2
USB10
PCIE3
USB1
USB6
MINI CARD for WLAN(MIMO)/WiMAX
PCIE Express card (Smart card adapter)
MINI CARD for WWAN/WLAN/WiMAX
USB0
MAIN BATT
USB2
CONN A
CONN B
Docking connector
TRAVEL BATT
USB4 DB
System Charger &
DC/DC System power
CONN C
USB5 DB
USB7
CONN D
7 in 1
Slot
USB8
CAMERA
USB9
Docking
Flash media
SMSC USX2016
MDC
Modem Module
V1.5
RJ11
USB11
Docking
USB3
Docking
USB13
Bluetooth
Azalia_Interface
Audio
ADI_1984A
Line Out
Docking
Line In
MIC In
AMD
FCBGA
Finger Print
Head Phone
SB700
SMBus
3.3V, LPC_Interface,33MHz
TPM
V1.2
3.3V, PCI_Interface,33MHz
Accelero
Meter
Super I/O
47N217
Parallel Port
Serial Port
Docking
Docking
1394
Controller
Agere
FW322-07-NV100
1394
CONN
KBC
SMSC 1091
(128P)
Keyboard
PS2 Port
Docking
Internal
CHANGE by
Kevin Hsiao
BIOS
8-Apr-2008
INVENTEC
TITLE
TT2.0
Block Diagram
CODE
CS
SHEET
DOC. NUMBER
370
SIZE
A3
REV
A011310A2150101
OF
OCP
ADP_EN
OCP_OC
PROCHOT#
5V/3.3V
+V5AL
+V3AL
FDC655BN
+V5S
GATE_5S
Adapter
(90W)
BATSELB
AC_AND_CHG
CHGCTRL
Selector
(Discrete)
Charger
(BQ24740)
+VBDC
+VBATA
+VBATB
BATCON
+VBATR
CHGCTRL_3
ADP_PRES
AC_AND_CHG
Main Battery
Travel Battery
KBC_PWR_ON
PWR_GOOD_3
PWR_GOOD_3
SLP_S5#_5R
(TPS51120)
NB POWER
(TPS51117)
I/O POWER
(TPS51117)
DDR POWER
(TPS51117)
+V1.8
+V5A
+V3A
+VCC_NB
+V1.2S
PWR_GOOD_3
PWR_GOOD_3
FDC655BN
LR
LR
LR
LR
FDC655BN
+V3S
GATE_5S
+V2.5S
+V1.2A
+V1.1S
+V1.5S
+V1.8S
GATE_3S
SVC
+VCC_CORE_NB
SYS_PWRGD
NB_SKIP#
NBV_BUF
SVD
PWR_GOOD_3
AMD Griff
+VCC_CORE
+VCC_CORE_VDD1
TPS51100
SLP_S5#_5R
+V0.9
MAX8792
PWR_GOOD_3
NB_GNDS
NB_SKIP#
NBV_BUF
NB_GNDS
MAX17009
SYS_PWRGD
CHANGE by
INVENTEC
TITLE
TT2.0
DOC. NUMBER
CODE
SIZE
A3
CS
8-Apr-2008Kevin Hsiao
SHEET
470
REV
A011310A2150101
OF
+VBDC
1
R509
15K_5%
2
5-,6-
R83
12
100K_1%
ADP_EN#
12
R511
100K_1%
1
R512
8.25K_1%
2
2VREF
1
R510
14.3K_1%
2
+VADPBL
5-
8-
1SS355W
5-,7-,14-
C506
1
2
0.022uF_16v
R109
12
100K_1%
R110
23.7K_1%
R84
12
24K_1%
12
21
100K_5%
R514
12
270K_5%
+V5AL
3
+
OUT
2
-
R513
1M_5%
12
+V5AL
5
+
6
-
8-
R3
5-,6-,7-
8
1
AS393MTR_E1
U4-A
4
5-,6-,7-
8
OUT
AS393MTR_E1
U4-B
4
BATCAL#
D7
CHGCTRL_3
R82
12
1M_5%
3
+
OUT
2
-
1
U16-A
TI_LMV393IDGKR_SOP_8P
2
1
2
1
G
S
2
Q1
2N7002W
6-,8-,33-,35-,47-
7
R569
1
6-,35-
280K_1%
R85
12
100K_5%
8
1
4
R4
220K_5%
D
3
6-
2N7002W
2
C12
0.1uF_25v
12
12
R5
220K_5%
ADP_PRES
+V3AL
5-,6-,7-,8-,23-,31-,33-,35-,36-,43-,52-,53-
AC_AND_CHG
1
R36
10K_5%
2
Q7
3
D
G
1
S
2
1
R91
200K_1%
2
+V5AL
5-,6-,7-
VCTRL_3
Q14
D
G
1
S
2N7002W
C58
1
2
0.1uF_10v
22K_5%
2
R37
CELLS
5-
3
2
1
S
2
3
FDS6673BZ
1
35-
35-
ADPDRV#
+VADPBL
Q500
D
G
SLP_S3#_3R
1
2
3.3A_150mil
5-
21
Q501
8
8
D
7
7
6
6
5
54
FDS6675BZ
ADPDRV#
R35
1
47K_5%
BQREF
R775
100K_5%
1
2
8-
I_SET
C62
1uF_6.3v
R89
12
422K_1%
C524
1uF_6.3v
+VADP
1
C501
1
2
10pF_50v
2
D503
SSM14_1A40V
1
S
2
3
4
G
5-
2
8-
8-,13-,33-,35-,43-,44-,47-,49-
1
R88
453K_1%
2
1
R563
1
1M_1%
2
2
8-,49-
NFM60R30T222
12
C502
0.1uF_25v
R500
1
47K_5%
R81
1
2
4.7K_5%
R86
12
300K_5%
+V3A
L500
+VADPTR
3
4
C503
1
2
10pF_50v
5-
+VBAT
0.01_1%_1W
2
C733
1
2
1uF_25v
U5
2
ACN
3
ACP
5
ACDET
9
AGND
13
EXTPWR
16
SRSET
6
ACSET
10
VREF
8
IADSLP
21
C59
1uF_6.3v
1
2
100pF_50v
DPMDET
4
LPMD
20
CELLS
1
CHGEN
11
VDAC
12
VADJ
15
IADAPT
TI_BQ24740_QFN_28P
C61
7-,9-,13-,14-,32-,33-,34-,37-,39-,43-,46-,47-,49-
12
R87
20K_5%
1
2
+VADPTR
5A
C500
1
2
0.1uF_25v
R778
12
PVCC
HIDRV
BTST
REGN
LODRV
PGND
SRP
SRN
BAT
LPREF
ISYNSET
PowerPad
8-
ICS
PH
C732
1
2
1uF_25v
28
1
2
26
25
27
24
13
1
C28
1uF_10v
CHENMKO_BAT54_3P
2
23
22
19
18
17
7
5-,6-,7-,8-,23-,31-,33-,35-,36-,43-,52-,53-
14
29
1
R90
33K_5%
2
DC JACK
LIMITsignal
7-,9-,10-,11-,12-,13-,30-,35-
C27
1uF_25v
C507
0.1uF_16v
D8
+V3AL
1
100K_5%
2
+V5AL
5-,6-,7-
1
2
C26
0.1uF_16v
8-,49-
+VBATR
C52
0.1uF_25v
1
1
2
2
12
4.7uF_25v
4.7uF_25v
C525
1
2
0.1uF_25v
R16
6-
ALARM
R17
12
1M_5%
8
+
7
OUT
-
4
U16-B
TI_LMV393IDGKR_SOP_8P
JACK2
1
2
3
4
5
FOX_JPD113E_NB103_7F_9P
6789
Q12
Q1
1
Q2
8
1
1
FAIR_FDMS9620S_MLP_8P
2
2
C725
C53
C54
x2
2VREF
5-,7-,14-
1
R19
10K_5%
2
5
6
CHANGE by
+VADPBL
5-
5-
1
R79
3K_5%
D12
2
21
RLZ18C
2
3
4
9
12
10
PCMB103T_8R2MS
5
6
7
L504
4.7uF_25v
4.7uF_25v
C55
+VBDCR
C56
1
1
2
2
Kevin sense
1
2
1
R21
93.1K_1%
2
1
R18
20K_1%
2
1
R20
Q8
3
8.06K_1%
D
G
S
2
2N7002W
1
2
Icharger=3A
CELLSEL#=0,Vcharger=12.6V
CELLSEL#=1,Vcharger=16.8V
Kevin Hsiao
8-Apr-2008
+VBAT
1
S
2
3
FDS6675BZ
R80
0.01_1%_1W
12
1
1
R565
R566
0_5%
0_5%
2
2
C30
0.033uF_16v
12
C29
C60
1
2
1uF_25v
1uF_25v
6-
CFET_B
INVENTEC
TITLE
TT2.0
DC &BATTERY CHARGER
CODE
A3
CS
SHEET
Q13
8
D
7
6
54
G
1
2
+VBDC
5-,6-
+VBDC
5-,6-
C726
C57
C800
1
1
2
4.7uF_25v
2
4.7uF_25v
4.7uF_25v
Note:
high power trace
DOC. NUMBERSIZE
OF
570
REV
A011310A2150101
BATSELB
CHGCTRL_3
BATSELB#
BATSELB
C103
0.1uF_10v
6-,35-
C531
5-,35-
12
1000pF_50v
C101
1000pF_50v
2
6-
C102
1000pF_50v
2
6-,35-
22K_5%
+V3AL
1
2
1
R585
12
1K_5%
D508
1SS355W 2
1
1
R156
22K_5%
2
1
1
R157
2
5
2
R579
470K_5%
1
5-,6-,7-,8-,23-,31-,33-,35-,36-,43-,52-,53-
6-
U21-A
TC7PA14FU
BATSELB#
6
1
2
1
C530
0.047uF_16v
2
+V3AL
2
Q509
3
D
G
1
S
2
1
2N7002W
R581
470K_5%
2
AC_AND_CHG
ADP_PRES
+V3AL
5-,6-,7-,8-,23-,31-,33-,35-,36-,43-,52-,53-
1
R158
47K_5%
ALARM
2
Q25
1
S1
2
G1
6
D1
3
D2
5
G2
4
S2
2N7002DW
Q24
3
D
G
5-,6-,8-,33-,35-,47-
1
S
2
2N7002W
5-,6-,7-,8-,23-,31-,33-,35-,36-,43-,52-,53-
5
U502
4
74HC1G14GV
3
1
R580
10K_5%
Q507
2
2
3
5-
S
D
G
2N7002W
1
5-,6-,8-,33-,35-,47-
BATSELB CFET_B
+V3AL
5-,6-,7-,8-,23-,31-,33-,35-,36-,43-,52-,53-
8
U23-A
1
5-
7
2
TC7W02FU
4
+V3AL
5-,6-,7-,8-,23-,31-,33-,35-,36-,43-,52-,53-
5
U21-B
4
3
TC7PA14FU
2
ADP_PRES
+V3AL
5-,6-,7-,8-,23-,31-,33-,35-,36-,43-,52-,53-
C511
1
2
0.1uF_10v
8
1
7
2
4
U500-A
TC7W08FU
+V3AL
5-,6-,7-,8-,23-,31-,33-,35-,36-,43-,52-,53-
1
R529
220K_5%
2
8
5
3
6
U500-B
4
TC7W08FU
6-,35-
+V3AL
5-,6-,7-,8-,23-,31-,33-,35-,36-,43-,52-,53-
C104
1
2
0.1uF_10v
8
U23-B
5
3
6
TC7W02FU
4
R527
12
10K_5%
2
5
2N7002DW
R597
2
1
10K_5%
+VBATA
6-
D19
DAN202K
+VBATB
6-
+V3AL
2N7002W
5-,6-,7-,8-,23-,31-,33-,35-,36-,43-,52-,53-
R524
470K_5%
R526
10K_5%
Q506
S1
G1
D1
D2
G2
S2
Q515
2
G1
5
G2
2N7002DW
Q26
2
S
D
G
1
D1
D2
S2
1
2
3
1
6
3
4
S1
+VBDC
5-,6-
1
D_MMST3904
2
1
2
470K_5%
1
6
3
4
3
Q504
1SS355W
R107
R108
10K_5%
3
C
1
B
E
2
D506
21
6-,8-
+VBDC
5-,6-
1
D_MMST3904
2
1
2
5-,6-
12
100_5%
0.1uF_25v
Q19
1SS355W
R127
C83
1
2
CFET_A
1
D16
D505
3
PDS540_5A_40V
Q503
1
S
2
3
4
G
FDS6675BZ
R521
470K_5%
CFET_A#
SSM34_3A40V
3
C
B
1
R106
E
470K_5%
2
2
21
CFET_B#
1
1
2
2
R128
1.5M_5%
1
2
8
D
7
6
5
D17
1
S
2
3
FDS6675BZ
2N7002W
Q22
3
D
G
1
1
UDZW7.5B
2
21
G
2
S
1N4148
D20
Q20
Q502
1
8
D
S
2
7
3
6
54
G
FDS6675BZ
Q505
1
S1
2
G1
6
D1
3
D2
5
G2
4
S2
2N7002DW
Q21
8
8
7
6
54
D
7
6
5
FDS6675BZ
Q516
S1
2
G1
D1
D2
5
G2
S2
2N7002DW
G
1
6
3
4
D
2
1
D18
CFET_A
DAN202K
CFET_B
+VBATA
1
S
2
3
4
D510
6-
1
R523
470K_5%
2
1
R522
4.7K_5%
2
+VBATB
6-,8-
5-,6-
6-
1
R589
470K_5%
2
1
R598
4.7K_5%
2
1
2
SDA_MAIN
SCL_MAIN
SDA_MBAY
SCL_MBAY
THM_TRAVEL#
D509
BAV99W
3
1
R507
10K_5%
2
3535-
A1
C1 C2
AC2
DS_BAV99DW_7_SOT363_6P
35-
35-
35-
2
3
1
+V3AL
5-,6-,7-,8-,23-,31-,33-,35-,36-,43-,52-,53-
5
U503
2
3
1
R596
220K_5%
2
CHANGE by
+V3AL
5-,6-,7-,8-,23-,31-,33-,35-,36-,43-,52-,53-
R504
12
100_5%
5-,6-,7-,8-,23-,31-,33-,35-,36-,43-,52-,53-
+V3AL
D504
100pF_50v
AC1
A2
OCP_ADJ
+V3AL
5-,6-,7-,8-,23-,31-,33-,35-,36-,43-,52-,53-
1
2
1
R588
10K_5%
R591
10K_5%
2
R590
12
100_5%
+V3AL
5-,6-,7-,8-,23-,31-,33-,35-,36-,43-,52-,53-
R592
12
100_5%
1
2
100pF_50v
100pF_50v
D517
A1
C1 C2
AC2
DS_BAV99DW_7_SOT363_6P
C535
0.1uF_10v
1
2
35-
4
TI_SN74LVC1G17DCKR_SC70_5P
BATCON
Kevin Hsiao
1
R508
10K_5%
2
R503
12
100_5%
1
2
C108
C49
100pF_50v
1
C202
C238
2
AC1
A2
8-Apr-2008
1
R505
12
1K_5%
2
+V5AL
5-,6-,7-
2
R779
3
1
69.8K_1%
R780
1
100K_1%
D520
BAV99W
R781
150K_1%
R784
12
8-
294K_1%
+V3AL
5-,6-,7-,8-,23-,31-,33-,35-,36-,43-,52-,53-
1
R586
100K_5%
2
R587
12
100_5%
C532
1
2
100pF_50v
INVENTEC
TITLE
SIZE
A3
1
2
1
2
B
+V5AL
B
1
2
C505
0.1uF_25v
5-,6-,7-
E
E
Q526
C
D-MMST3906
C
1
1
R782
220K_5%
2
THM_MAIN#
1
2
3
4
5
6
7
8
+V3AL
G
CN7
1
2
3
4
5
6
7
8
D
S
5-,6-,7-,8-,23-,31-,33-,35-,36-,43-,52-,53-
1
R783
100K_5%
2
3
Q527
2N7002W
2
35-
ALLTOP_C144M6_108A5_L_8P
1
2
C48
100pF_50v
2
SYN_200263MS006G114ZT_6P
CN502
1
1
2
2
3
3
4
4
5
5
6
6
C76
1
2
0.1uF_25v
TT2.0
SELECT & BATTERY CONN
1310A2150101 A01
CS
SHEET
OF
706
REVDOC. NUMBERCODE
7A
5-,9-,13-,14-,32-,33-,34-,37-,39-,43-,46-,47-,49-
+V3A
PAD6
POWERPAD_2_0610
C345
10uF_6.3v12
KBC_PWR_ON
R411
17.4K_1%
C399
12
OPEN
12
PCMB104E_4R7MS
1
C319
330uF_4v
12
L42
R10
4.7_5%
1
2
1
2
R24
12
35-
30K_5%
1
R499
200K_5%
2
R410
12
7.32K_1%
51120GND
C375
12
0.1uF_16v
Q51
2
3
Q1
4
1
9
10
Q2
5
6
8
7
FAIR_FDMS9600S_MLP_8P
C13
1000pF_50v
R26
100K_5%
Q535
2
G1
5
G2
1
2N7002DW
C22
2
0.01uF_16v
RSMRST#
R414
12
4.7_5%
+VBATR
5-,7-,9-,10-,11-,12-,13-,30-,35-
1
2
C344
4.7uF_25v
S1
D1
D2
S2
1
6
3
4
33-,35-
+V5AL
5-,6-,7-
12
R25
1
100K_5%
2
R488
12
33_5%
+V5AL
1
2
5-,6-,7-
10uF_6.3v
C373
R386
4.99K_1%
7
8
VO2
COMP2
9
TI_TPS51120_QFN_32P
EN5
10
EN3
11
PGOOD2
12
EN2
13
VBST2
14
DRVH2
15
LL2
16
DRVL2
CS2
PGND2
U49
18
17
1
2
2VREF
5-,7-,14-
5
4
6
GND
VFB2
VREF2
VREG319VREG5
V5FILT
21
20
C720
1
0.1uF_10v
2
1
2
51120GND
2
3
VFB1
COMP1
CS1
VIN
23
22
1
2
C398
1000pF_50v
1
VO1
SKIPSEL
TONSEL
PGOOD1
EN1
VBST1
DRVH1
LL1
DRVL1
PGND1
24
C374
10uF_6.3v
R384
4.7K_1%
1
2
C721
1
2
51120GND
33
32
31
30
29
28
27
26
25
+V3AL
5-,6-,8-,23-,31-,33-,35-,36-,43-,52-,53-
1
2
R385
5.1_5%
1uF_6.3v
+VBATR
5-,7-,9-,10-,11-,12-,13-,30-,35-
C371 1
2
4.7uF_25v
R407
12
4.7_5%
R409
12
0_5%
51120GND
FAIR_FDMS9600S_MLP_8P
C119
10uF_6.3v
R408
12
7.32K_1%
51120GND
0.1uF_16v
12
C370
5-,7-,9-,10-,11-,12-,13-,30-,35-
Q50
2
3
Q1
4
1
9
10
Q2
5
6
8
7
2VREF
5-,7-,14-
+V3S
8-,10-,13-,14-,15-,20-,23-,24-,25-,26-,29-,30-,31-,32-,33-,34-,35-,36-,38-,39-,43-,44-,45-,46-,47-,49-,51-,53-,54-,56-
1
R172
12
2
10K_5%
R406
12
30K_1%
C397
12
OPEN
+VBATR
C372
C724
4.7uF_25v
4.7uF_25v
1
1
2
2
L41
12
CYNTEC_PCMC063_4R7
1
R27
4.7_5%
2
220uF_6.3v
1
C139
2
1000pF_50v
U26
GMT_G916T1Uf_SOT23_5_5P
1
IN
3
SHDN#
GND
2
PAD5
C317
1
10uF_6.3v
2
POWERPAD_2_0610
C318
1
2
+V2.5S
5
OUT
4
SET
1
R141
10K_1%
2
1
R140
10K_1%
2
200mA
18-
12
C86
22uF_10v
5A
+V5A
9-,10-,11-,12-,13-,42-,45-
INVENTEC
TITLE
TT2.0
CHANGE by
Kevin Hsiao 8-Apr-2008
+V5A, +V3A & +V2.5S
CODE
A3
CS
SHEET
DOC. NUMBER
1310A2150101 A01
REVSIZE
OF
707
LIMITsignal
OLD_DOCK_DET
ACOCP_EN#
+VADP
5-,8-,49-
8-
49-
R71
200K_5%
5-,8-,49-
12
B
1
R72
47K_5%
2
1
2
B
1
R69
210K_1%
2
D11
1SS355W
Q11
C
D-MMST3906
C
E
E
OLD_DOCK_DET
1
R564
137K_1%
2
12
1
R562
10K_1%
2
R568
1M_5%
8-
+VADP
5-,8-,49-
1
R94
22.6K_1%
2
1
R786
10K_1%
2
BQREF
200K_5%
+VADP
R788
1
LIMITsignal
VBIAS
5-,8-,49-
1
R93
29.4K_1%
2
1
2
R92
10K_1%
+V5S
8-,13-,14-,15-,20-,29-,32-,33-,40-,41-,43-,44-,46-,49-
R573
12
ICS
5-
10K_5%
1
R789
100K_5%
2
12
R47
165K_1%
R787
511K_1%
Q528
1
G
2N7002W
1
2
3
D
S
2
5-
2
U501
1
+IN5+VS
2
-VS
3
-IN
FAIR_LMV321AS5X_SOT23_5P
12
C33
0.22uF_10v
Q529
3
1
S
D
G
BSS138
2
1
R46
105K_1%
2
OUT
1SS355W
1
R48
2K_1%
2
BSS138
2
1
1
1
2
Q530
S
3
2
C508
0.1uF_10v
3
D
G
2
150K_5%
Q531
D
G
1
5-,6-,33-,35-,47-
S
2N7002W
12
330K_5%
OCP_ADJ
6-
R790
2
1
CFET_A
6-
ADP_PRES
4
D10
7-,10-,13-,14-,15-,20-,23-,24-,25-,26-,29-,30-,31-,32-,33-,34-,35-,36-,38-,39-,43-,44-,45-,46-,47-,49-,51-,53-,54-,56-
+V5S
8-,13-,14-,15-,20-,29-,32-,33-,40-,41-,43-,44-,46-,49-
R33
8
U6-A
3
+
1
OUT
2
-
AS393MTR_E1
4
OCP_OC
R40
12
5-,8-,49-
8-
R785
2
12
100_5%
BSS84_3P
+VADP
5-,8-,49-
1
R23
1_5%
2
8
3
+
OUT
2
-
AS393MTR_E1
U17-A
4
8-
VBIAS
R571
12
1M_5%
8
5
+
OUT
6
-
AS393MTR_E1
U17-B
4
1
2
1
7
Q16
S
3
D
G
1
C63
1uF_25v
D519
21
1SS355W
+V3AL
5-,6-,7-,8-,23-,31-,33-,35-,36-,43-,52-,53-
1
2
1
R572
R570
47K_5%
220K_5%
2
1SS355W
D507
21
5-
ADP_EN#
1
2
R567
10K_5%
35-
C31
3900pF_16v
5-,13-,33-,35-,43-,44-,47-,49-
ADP_PWRID
+V3AL
5-,6-,7-,8-,23-,31-,33-,35-,36-,43-,52-,53-
1
1
R593
10K_5%
2
2
3
D
G
1
Q510
S
2
1
R594
220K_5%
2
100K_5%
1
R39
3.9K_1%
2
1
2
2N7002W
3.9K_5%
R38
1
R561
100K_5%
1
2
3
C
B
E
2
1
B
SLP_S3#_3R
5-
Q508
D_MMST3904
35-
3
C
Q15
E
D_MMST3904
2
BATCAL#
ADP_EN
5-
I_SET
CHANGE by
+V3S
12
1
R44
R32
10K_5%
133K_1%
2
1
R45
80.6K_1%
2
1SS355W D9
21
Q9
G
1
2N7002W
3
D
S
2
Kevin Hsiao 8-Apr-2008
8
5
+
OUT
6
4
1
C32
0.027uF_10v
2
9-,10-,11-,14-
R22
12
18-,20-
0_5%
R41
10K_5%
2
R43
100K_5%
2
U6-B
7
AS393MTR_E1
R42
12
604K_1%
PWR_GOOD_3
PROCHOT#
1
1
INVENTEC
TITLE
TT2.0
OCP
CODE
SIZE
A3
1310A2150101 A01
CS
SHEET
REVDOC. NUMBER
OF
708
PWR_GOOD_3
8-,9-,10-,11-,14-
V12S_PG
R288
12
0_5%
9-
C271
1uF_6.3v
1
2
R287
12
0_5%
1.2A_GND
R290
12
10_5%
R289
12
200K_5%
U38
1
EN_PSV
TON
VOUT
V5FILT
VFB
PGOOD
GND
12
R285
0_5%
VBST
DRVH
V5DRV
DRVL
PGND
LL
TRIP
TML
2
3
4
5
6
7
TI_TPS51117_QFN_14P
14
13
12
11
10
9
8
15
+V5A
7-,9-,10-,11-,12-,13-,42-,45-
R284
12
4.7_5%
1
2
C269
1uF_6.3v
1.2A_GND
C270
0.1uF_16v
1
R283
5.62K_1%
2
12
FAIR_FDMS9600S_MLP_8P
+VBATR
5-,7-,9-,10-,11-,12-,13-,30-,35-
C268
1
Q39
2
3
Q1
4
9
1
10
Q2
5
6
8
7
1
2
2
C727
4.7uF_25v
L29
12
PCMB104E_2R2MS
1
R28
4.7_5%_OPEN
2
C239
1
220uF_2.5v
2
1000pF_50v_OPEN
4.7uF_25v
C264
+V1.2S
9-,11-,15-,18-,19-,24-,31-,32-
PAD4
Q523
3
D
G
1
FDV305N
R699
12
10K_5%
9-,11-,15-,18-,19-,24-,31-,32-
2
S
R483
49.9K_1%
9-
V12S_PG
+V1.2S
1
2
POWERPAD_2_0610
1
2
1.2A_GND
1
R291
6.49K_1%
2
1
R271
10K_1%
2
+V3A
+V5A
5-,7-,13-,14-,32-,33-,34-,37-,39-,43-,46-,47-,49-
C294
1
2
10uF_6.3v
1
2
7-,9-,10-,11-,12-,13-,42-,45-
1
10K_5%
C293
0.1uF_10v
U40
1
PGOOD TML-PAD
R321
2
2
3
VIN VOUT
4
VDD
RICHTEK_RT9018A25PSP_SOP8_8P
9
8
GND
7
ADJEN
6
5
NC
4.53K_1%
C295
1
2
10uF_6.3v
+V1.2A
R324
+V5A
7-,9-,10-,11-,12-,13-,42-,45-
1
2
32-
1
R323
10K_1%
2
PWR_GOOD_3
8-,9-,10-,11-,14-
R805
12
10K_5%
C764
1000pF_50v
1uF_6.3v
1
2
C536
1
2
VCC_VB_GND
R600
12
200K_5%
U504
1
EN_PSV
TON
VOUT
V5FILT
VFB
PGOOD
GND
VBST
DRVH
LL
TRIP
V5DRV
DRVL
PGND
TML
R626
12
0_5%
2
3
4
5
6
7
TI_TPS51117_QFN_14P
14
13
12
11
10
9
8
15
+V5A
7-,9-,10-,11-,12-,13-,42-,45-
R624
4.7_5%
C543
1
2
2.2uF_6.3v
VCC_VB_GND
12
1
R625
2
3.3K_1%
C542
2
1
0.1uF_16v
8765
D
G
S
41
23
8
765
D
G
41S23
STRP_DATA
9
9
5-,7-,9-,10-,11-,12-,13-,30-,35-
1
2
L512
C728
4.7uF_25v
12
Q518
FDMS8690
PCMB104E_2R2MS
Q532
FDMS8660S
330uF_2v_15mR_Panasonic
23-
2K_5%
R133
C593
5.1K_1%
2
1
2
+VBATR
1
2
R132
1
4700pF_25v
C85
1
2
C549
4.7uF_25v
R601
10K_1%
R602
23.2K_1%
1
2
1
2
1
2
VCC_VB_GND
R130
16.2K_1%
1500pF_50v
C84
+VCC_NB
24-
PAD500
POWERPAD_2_0610
1
R129
226K_1%
2
12
1
2
STRP_DATA
Kevin Hsiao
+VCC_NB
0
1.1
1.01
8-Apr-2008
INVENTEC
TITLE
TT2.0
+VCC_NB & +V1.2A
DOC. NUMBERSIZE CODE
A3
1310A2150101 A01
CS
SHEET
REV
OFCHANGE by
709
R63
COREFB
COREFB#
10-,19-
1
R98
51_5%
2
1
2
0_5%_OPEN
12
0_5%
100_1%
18-
2
R64
18-
+V3S
7-,8-,13-,14-,15-,20-,23-,24-,25-,26-,29-,30-,31-,32-,33-,34-,35-,36-,38-,39-,43-,44-,45-,46-,47-,49-,51-,53-,54-,56-
1
R58
1.2K_1%
2
12
100K_1%
R55
12
R54
154K_1%
1000pF_50v
MAX17009
R96
2
MAX17009
100_1%
C34
12
0.0047uF_50v
R50
12
10_1%
R95
51_5%
R300
12
18-,31-
LDT_PG CPU_PWRGD_SVID_REG
NBV_BUF
11-,35-
11-
8-,9-,11-,14-
1818-
SYS_PWRGD
PWR_GOOD_3
CPU_SVC_R
CPU_SVD_R
+VCC_CORE_VDD1
18-
VDD1_FB#
18-
VDD1_FB
NB_GNDS
NB_SKIP#
11-
10-
12
1.2K_1%
1
2
R60
C43
1
2
0.0047uF_50v
MAX17009
MAX_MAX17009GTL+_TQFN_40P
12
47K_1%
C39
1
2
C38
0.22uF_6.3v12
12
R515
121K_1%
12
R53
10K_1%
R57
12
100_5%
R56
+V1.8
12-,13-,18-,19-,20-,25-,26-,27-
R51
2
1
1.2K_1%
12
1
C35
1000pF_50v
2
MAX17009
1000pF_50v
1000pF_50v
C41
1
R62
2
100_1%
C40
0.0047uF_50v
C36
0.0047uF_50v
2
100_1%
1
C37
+V5A
7-,9-,10-,11-,12-,13-,42-,45-
1.5K_1%
2
R52
2
1.5K_1%
1
1
2
MAX17009
10
MAX17009
R59
1
PERGD
2
NV_BUF
3
SHDN#
4
REF
5
ILIM
6
OSC
7
TIME
8
SVC
9
SVD
THRM
1
2
1
R49
R97
12
10_5%
1
36
4011
37
38
39
CSN1CSN2
FBAC1FBAC2
FBDC1FBDC2
GNDS1
PGD_IN
OPTION
U7
GNDS215GNDS_NB
VDDIO
13
12
14
1
33
3417
35
CSP1
PRO#
CSP2
VCC
16
18
1
2
2.2uF_6.3v
32
DH1
TMLPAD
VRHOT#
BST1
VDD1
GND1
GND2
VDD2
BST2
DH2
NBSKP#
19
C66
3120
LX1
DL1
DL2
LX2
10-
R61
12
0_5%
R102
12
0_5%
41
30
29
28
27
26
25
24
23
22
21
1
2
1
2
CPU_PWRGD_SVID_REG
MAX17009
MAX17009
R99
4.7_5%
C67
0.1uF_16v
(Should routed in 5/5/5 pair and need to
have 10mil clearance to other traces.)
2
C69
0.1uF_16v
1
1
R101
4.7_5%
2
+V5A
7-,9-,10-,11-,12-,13-,42-,45-
R100
0_5%
C68
1
2
4.7uF_6.3v
(Should routed in 5/5/5 pair and need to
have 10mil clearance to other traces.)
12
MAX17009
G
41S23
G
4
C534
1
2
4700pF_25v
G
41S23
G
41
1
2
9
8765
D
Q513
FDMS8660S
8
9
765
D
1S23
9
8765
D
Q512
FDMS8660S
9
8765
D
S
23
C538
4700pF_25v
C527
1
2
Q514
FDMS8690
1
C526
2
Q511
FDMS8690
+VBATR
5-,7-,9-,10-,11-,12-,13-,30-,35-
C528
1
2
4.7uF_25v
4.7uF_25v
4.7uF_25v
D14
1
40V_3A_1W
2
CHANGE by
C529
1
2
4.7uF_25v
4.7uF_25v
4.7uF_25v
D13
1
40V_3A_1W2
C730
1
2
1
2
1
2
+VBATR
C7291
2
1
2
R117
22_5%
C77
1000pF_50v
Kevin Hsiao
5-,7-,9-,10-,11-,12-,13-,30-,35-
1
C71
47uF_25v
2
C42
220pF_50v
1
R595
22_5%
2
C533
1000pF_50v
ETQP4LR45XFC
1
1
R777
R114
1K_5%
2.4K_1%
2
2
R115
12
4.02K_1%
C64
1
2
220pF_50v
1
R776
1K_5%
2
1
2
L10
12
R116
12
10K_1%_THER_NTC
C65
12
0.22uF_10v
8-Apr-2008
C70
12
0.22uF_10v
R111
R112
12
12
4.02K_1%
10K_1%_THER_NTC
1
R113
2.4K_1%
2
L9
ETQP4LR45XFC
2
1
330uF_2v_7mR
330uF_2v_7mR
C539
INVENTEC
TITLE
TT2.0
+VCC_CORE
CODE
SIZE
A3
CS
SHEET
+VCC_CORE
C93
1
2
+VCC_CORE_VDD1
1
2
330uF_2v_7mR
330uF_2v_7mR
DOC. NUMBER
10 70
18-,19-
1
C537
2
10-,19-
1
C94
2
REV
A011310A2150101
OF
+VCC_CORE_NB
19-
POWERPAD_2_0610
PAD2
C254
220uF_2.5v
1
2
7-,9-,10-,11-,12-,13-,42-,45-
5-,7-,9-,10-,12-,13-,30-,35-
+VBATR
4.7uF_25v
L26
R250
1.5K_1%
C250
12
12
12
CYNTEC_PCMC063_3R3
0.22uF_16v
C253
R683
5.76K_1%
+V5A
C252
1
2
1uF_6.3v
1
2
12
FAIR_FDMS9600S_MLP_8P
12
10-,11-,35-
NB_SKIP#
C644
8792GND
SYS_PWRGD
1
2
80.6K_1%
R680
12
0_5%
10-
R253
1
2
NBV_BUF
C248
12
1000pF_50v
R251
1
OPEN
2
8792GND
R252
0_5%
C249
1
2
R254
PWR_GOOD_3
C251
R684
12
R255
100K_1%
12
0.22uF_16v
12
2.2_5%
Q36
2
3
Q1
4
1
9
10
Q2
5
6
8
7
8-,9-,10-,11-,14-
12
0_5%
U36
1
EN
PGOOD
VCC
VDD
3
DL
SKIP
4
LX
REF
5
DH
REFIN
6
BST
ILIM
7
TON
TML-PAD
MAX_MAX8792ETD+T_DFN_14P
R249
12
0_5%
1uF_6.3v
14
8792GND
132
12
11
10
9
8
FB
15
8792GND
10-
100pF_50v
1
C286
4.7uF_10v
2
1
R316
9.1K_1%
2
1
R317
10K_1%
2
+V1.5S
43-
1
2
C288
220uF_2.5v
PWR_GOOD_3
7-,9-,10-,11-,12-,13-,42-,45-
U35
8-,9-,10-,11-,14-
1
2
3
6
EN
VCC
5
DRI
GND
4
FB
PGOOD
RICH_RT9194PE_05P_SOT23_6P
9-,15-,18-,19-,24-,31-,32-
+V5A
1
C245
0.1uF_10v
2
R246
12
10-,11-,35-
0_5%
+V1.2S
8
D
7
6
5
G
FDM6296_POWERPAK1212_8
SYS_PWRGD
1
C244
22uF_6.3v
2
Q35
S
C287
0.1uF_10v
+V1.8S
Q40
8
S
D
7
6
54
G
FDM6296_POWERPAK1212_8
1
2
3
13-,14-,15-,18-,21-,23-,24-,28-,33-
+V1.1S
21-,22-,23-,24-
PAD3
POWERPAD_2_0610
1
2
3
4
1
R248
4.12K_1%
2
1
R247
10K_1%
2
1
2
C246
220uF_2.5v
PWR_GOOD_3
8-,9-,10-,11-,14-
7-,9-,10-,11-,12-,13-,42-,45-
U37
1
EN
2
GND
3
PGOOD
FB
RICH_RT9194PE_05P_SOT23_6P
+V5A
1
2
6
VCC
5
DRI
4
INVENTEC
TITLE
TT2.0
CHANGE by
Kevin Hsiao 8-Apr-2008
SIZE
A3
POWER
DOC. NUMBERCODE
1310A2150101 A01
CS
SHEET
REV
OF
7011
SLP_S5#_5R
V18_GOOD
12-,13-,49-
0_5%_OPEN
13-
R166
12
C107
1uF_6.3v
C106
2.2uF_6.3v
+VBATR
5-,7-,9-,10-,11-,13-,30-,35-
Q30
FDMS8690
Q32
FDMS8670S
10-,12-,13-,18-,19-,20-,25-,26-,27-
1
65
G
41S23
G
4
1
9
87
D
9
8
765
D
S
123
2
2
C178
C731
4.7uF_25v
4.7uF_25v
L16
12
PCMC063T_2R2MN
R164
43.2K_1%
R161
30.1K_1%
51117GND
1
2
1
2
POWERPAD_2_0610
1
C175
330uF_2v_15mR_Panasonic
2
+V1.8
PAD1
+V5A
7-,9-,10-,11-,12-,13-,42-,45-
R160
12
10_5%
1
R167
330K_1%
2
1
2
U24
1
EN_PSV
TON
VOUT
V5FILT
VFB
PGOOD
GND
R202
0_5%
12
VBST
DRVH
V5DRV
DRVL
PGND
LL
TRIP
TML
2
3
4
5
6
7
TI_TPS51117_QFN_14P
51117GND 51117GND
C142
0.1uF_16v
R165
12
14
13
4.7_5%
12
11
10
9
8
15
1
2
5.1K_1%
R203
1
1
2
2
D21
C141
0.033uF_16v
M_VREF
+V5A
25-,26-
7-,9-,10-,11-,12-,13-,42-,45-
11
10
9
8
7
1
2
C105
1
1
2
2
1uF_6.3v
6
TI_TPS51100_DGQ_10P
GND
VIN
S5
GND
S3
VTTREF
VDDQSNS
VLDOIN
PGND
VTTSNS
U22
VTT
1
2
3
4
5
C138
1
2
10uF_6.3v
+V0.9
19-,27-
1
C98
220uF_2.5v
2
10-,12-,13-,18-,19-,20-,25-,26-,27-
1uF_6.3v
C99
+V1.8
C100
1
1
2
2
10uF_6.3v
SLP_S5#_5R
BAT54_30V_0.2A
12-,13-,49-
13
R159
12
200K_5%
C140
3300pF_50v
NOTE: DDR2 REGULATOR
INVENTEC
TITLE
TT2.0
DDR2 POWER
CHANGE by
Kevin Hsiao 8-Apr-2008
SIZE
A3
DOC. NUMBERCODE
1310A2150101 A01
CS
SHEET
REV
OF
7012
GATE_5S
+V5A
7-,9-,10-,11-,12-,13-,42-,45-
Q49
6
D
5
2
13
G
FDC655BN
13-
+V5S
8-,14-,15-,20-,29-,32-,33-,40-,41-,43-,44-,46-,49-
4
S
C316
1
2
10uF_6.3v
1
R338
47_5%
2
3
D
Q48
1
G
2N7002W
S
2
GATE_5S
+V3A
5-,7-,9-,14-,32-,33-,34-,37-,39-,43-,46-,47-,49-
Q60
6
D
5
2
13
G
FDC655BN
13-
+V3S
7-,8-,10-,14-,15-,20-,23-,24-,25-,26-,29-,30-,31-,32-,33-,34-,35-,36-,38-,39-,43-,44-,45-,46-,47-,49-,51-,53-,54-,56-
4
S
1
G
1
2
3
D
S
2
R419
47_5%
Q61
2N7002W
1
C401
2
100uF_6.3v_OPEN
1
C870
2
100uF_6.3v
C901
1
1000pF_50v
2
C905
1
1000pF_50v
2
C908
1
1000pF_50v
2
1
1000pF_50v
2
C906
1
1000pF_50v
2
C909
1
1000pF_50v
2
C903
1
1000pF_50v
2 1000pF_50v
C907
1
2
1000pF_50v
C910
1
1000pF_50v
2
C904C902
1
2
GATE_3S
+V1.8
10-,12-,18-,19-,20-,25-,26-,27-
Q29
6
D
5
2
13
G
FDC655BN
13-
4
S
C137
1
2
1000pF_50v
1
+V1.8S
G
1
2
3
D
S
2
11-,14-,15-,18-,21-,23-,24-,28-,33-
C173
1
2
10uF_6.3v
R219
47_5%
Q28
2N7002W
SLP_S5#_3R
33-,42-,45-
Q33
S1
2
G1
D1
D2
5
G2
S2
2N7002DW
EMI solution
13-,14-
SLP_S3_5R
+V5A
7-,9-,10-,11-,12-,13-,42-,45-
1
R223
1
10K_5%
2
6
3
4
+V5A
7-,9-,10-,11-,12-,13-,42-,45-
1
R222
3K_5%
2
12-,49-
47-
SLP_S5#_5R
SLP_S5_FPR
SLP_S3_5R
V18_GOOD
SLP_S3#_3R
13-,14-
12-
5-,8-,33-,35-,43-,44-,47-,49-
R478
1
R412
100K_5%
2
12
4.7K_5%
Q58
S1
2
G1
D1
D2
5
G2
S2
2N7002DW
+VBATR
5-,7-,9-,10-,11-,12-,13-,30-,35-
1
2
1
R417
470K_5%
2
1
6
3
4
R416
100K_5%
+VBATR
5-,7-,9-,10-,11-,12-,13-,30-,35-
E
E
B
B
C
C
Q59
D-MMST3906
R415
1
2
100K_5%
R413
12
470_5%
1
C400
2200pF_50v
2
1
R418
20K_5%
2
13-
GATE_5S
13-
GATE_3S
INVENTEC
TITLE
TT2.0
POWER(sleep)
SIZE
CHANGE by SHEET
Kevin Hsiao
8-Apr-2008
A3
DOC. NUMBER
CODE
1310A2150101 A01
CS
REV
OF
7013
11-,13-,15-,18-,21-,23-,24-,28-,33-
8-,13-,15-,20-,29-,32-,33-,40-,41-,43-,44-,46-,49-
+V1.8S
+V5S
R389
12
100K_1%
R388
12
280K_1%
C376
1000pF_50v
SLP_S3_5R
+V3S
7-,8-,10-,13-,15-,20-,23-,24-,25-,26-,29-,30-,31-,32-,33-,34-,35-,36-,38-,39-,43-,44-,45-,46-,47-,49-,51-,53-,54-,56-
R391
12
1M_5%
R393
20K_5%
12
1
1
R390
54.9K_1%
2
2
13-
Q54
1
G
2N7002W
2VREF
5-,7-
R394
12
100K_1%
3
D
S
2
1
2
5-,7-,9-,13-,32-,33-,34-,37-,39-,43-,46-,47-,49-
1
3
TI_LMV331IDBVR_SOT23_5P
R395
12
100K_1%
C379
4700pF_25v
+
OUT
-
+V3A
5
U45
4
2
C378
1
2
0.1uF_16v
1
2
R392
1.2K_1%
8-,9-,10-,11-
PWR_GOOD_3
INVENTEC
TITLE
TT2.0
POWER(Sequence)
DOC. NUMBER
CODE
SIZE REV
A3
CHANGE by SHEET
8-Apr-2008Kevin Hsiao
CS
14 70
A011310A2150101
OF
CPPE_DOCK#
CPPE_NC#
+V5S
8-,13-,14-,20-,29-,32-,33-,40-,41-,43-,44-,46-,49-
1
G
SSM3K7002F
33-,49-
D
S
3
2
Q77
+V5S
8-,13-,14-,20-,29-,32-,33-,40-,41-,43-,44-,46-,49-
1
G
SSM3K7002F
33-,43-
S
D
2
3
Q78
+V3S_CLK
15-
7-,8-,10-,13-,14-,15-,20-,23-,24-,25-,26-,29-,30-,31-,32-,33-,34-,35-,36-,38-,39-,43-,44-,45-,46-,47-,49-,51-,53-,54-,56-
WL_OFF
CLK_DVI#
CLK_DVI
20-,25-,26-,33-,3620-,25-,26-,33-,36-
4949-
4343-
4646-
4747-
+V3S
1
R326
10K_5%
2
4647-
2323-
23233131-
R491
10K_5%
R302 0_5%
R708
R709
SB_3S_SMCLK
SB_3S_SMDATA
CLK_R_PCIE_DOCK#
CLK_R_PCIE_DOCK
CLK_R_PCIE_NEWCARD#
CLK_R_PCIE_NEWCARD
CLK_R_PCIE_MINICARD1#
CLK_R_PCIE_MINICARD1
CLK_R_PCIE_LAN#
CLK_R_PCIE_LAN
7-,8-,10-,13-,14-,15-,20-,23-,24-,25-,26-,29-,30-,31-,32-,33-,34-,35-,36-,38-,39-,43-,44-,45-,46-,47-,49-,51-,53-,54-,56-
7-,8-,10-,13-,14-,15-,20-,23-,24-,25-,26-,29-,30-,31-,32-,33-,34-,35-,36-,38-,39-,43-,44-,45-,46-,47-,49-,51-,53-,54-,56-
CPPE_NIC#
CLK_R_PCIE_ALINK#
CLK_R_PCIE_ALINK
CLK_R_PCIE_SB#
CLK_R_PCIE_SB
+V3S_CLK
+V3S
+V3S
1
2
12
0_5%R301
12
0_5%
12
0_5%
12
15-
R325
12
10K_5%
L27
12
ICB_1206_3.0A
CLK_PCIE_ALINK#
CLK_PCIE_ALINK
CLK_PCIE_SB#
CLK_PCIE_SB
C260
1
2
22uF_6.3v
CLKGEN_X1
CLKGEN_X2
1
2
+V3S_CLK
15-
L30
BLM11A121S
12
C281
0.1uF_16v
C278
0.047uF_10v
L31
BLM11A121S
12
+V3S_CLK_VDDA
1
2
C283
1
2
0.1uF_16v
+V3S_CLK
15-
U39
1
SMBCLK
2
SMBDAT
4
SRC7C_LPRS_27MHZ_NS
5
SRC7T_LPRS_27MHZ_SS
45
SRC6C_SATAC_LPRS
46
SRC6T_SATAT_LPRS
7
SRC5C_LPRS
8
SRC5T_LPRS
9
SRC4C_LPRS
10
SRC4T_LPRS
13
SRC3C_LPRS
14
15
SRC2C_LPRS
16
SRC2T_LPRS
20
SRC1C_LPRS
21
SRC1T_LPRS
22
SRC0C_LPRS
23
SRC0T_LPRS
42
CLKREQ4#
43
CLKREQ3#
50
CLKREQ2#
51
CLKREQ1#
24
CLKREQ0#
25
ATIG2C_LPRS
26
ATIG2T_LPRS
30
ATIG1C_LPRS
31
ATIG1T_LPRS
32
ATIG0C_LPRS
33
ATIG0T_LPRS
34
SB_SRC1C_LPRS
35
SB_SRC1T_LPRS
39
SB_SRC0C_LPRS
40
SB_SRC0T_LPRS
41
SB_SRC_SLOW#
67
X1
68
X2
ICS_ICS9LPRS476KLFT_MLF_72P
1
2
0.047uF_10v
+V3S_CLK_VDDREF
C284
2.2uF_6.3v
C280
22uF_6.3v
VDDA
VDD48
VDDDOT
VDDREF
VDDHTT
VDDCPU
VDDSB_SRC
VDDATIG
VDDSRC
VDDSATA
VDDCPU_IO
VDDSB_SRC_IOSRC3T_LPRS
VDDATIG_IO
VDDSRC_IO
VDDSRC_IO
48MHZ_0
48MHZ_1
HTT0T_LPRS_66M
HTT0C_LPRS_66M
CPUKG0T_LPRS
CPUKG0C_LPRS
REF0_SEL_HTT66
REF1_SEL_SATA
REF2_SEL_27
GND48
GNDREF
GNDHTT
GNDCPU
GNDA
GNDSATA
GNDSB_SRC
GNDATIG
GNDSRC
GNDSRC
GNDDOT
THERMAL-PAD
C263
PD#
+V3S_CLK
15-
0.1uF_16v
12
23-
NBHT_CLK
23-
NBHT_CLK#
1
2
C285
1
2
0.1uF_16v
C265
1
2
0.047uF_10v
1
2
R276
R277
R282
8.2K_5%
C275
1
2
1
2
1
2
49
69
3
62
61
54
38
29
17
44
53
37
28
18
12
71
70
HT_CLK
60
HT_CLK#
59
CPUBCLK
56
55
CPUBCLK#
57
65
64
63
72
66
58
52
48
47
36
27
19
11
6
73
R305
R306
R307
R308
C276
1
2
0.1uF_16v
CLK_48M
12
12
12
12
0.1uF_16v
0_5%
0_5%
0_5%
0_5%
1
2
1
2
R279
22_5%
C266
C282
0.1uF_16v
CLK_SIO14
CLK_R3S_NB14
CLK_KBC&SB14
1
2
+V1.2S_CLK_IO
1
2
C267
4.7pF_50v
12
12
C279
0.1uF_16v
+V1.2S_CLK_IO
C262
0.047uF_10v
1
R310
261_1%_OPEN
2
33_5%
33_5%
C745
1
4.7pF_50v
2
1
2
C277
1uF_10v
C261
1
2
33-
CLK_R3S_SB48
18-
CLK_R_CPUBCLK
18-
CLK_R_CPUBCLK#
1
R280
8.2K_5%
2
L28
BLM11A121S
22uF_6.3v
38-
15-
35-
C746
1
4.7pF_50v
2
+V1.2S
9-,11-,18-,19-,24-,31-,32-
12
R309
4.7K_5%
2
CLK_R3S_SIO14
CLK_R3S_NB14
CLK_R3S_KBC14
1
+V3S_CLK
15-
+V1.8S
X500
14.31818MHZ
12
1
2
C656
22pF_50v
30PPM
1
2
C655
47pF_50v
Place close to CLKGEN within 500mils
NBGFX_CLK#
11-,13-,14-,18-,21-,23-,24-,28-,33-
1
R438
4.7K_5%
2
R303
23-
23- 15-
1
R304
90.9_1%
2
2.2K_5%
12
R806
12
158_1%
CLK_R3S_NB14NBGFX_CLK
INVENTEC
TITLE
TT2.0
CLOCK_GENERATOR
DOC. NUMBER
CHANGE by
Kevin Hsiao
8-Apr-2008
SIZE
A3
CODE
1310A2150101 A01
CS
SHEET
REV
OF
7015
L0_CLKIN1
L0_CLKIN1#
L0_CLKIN0
L0_CLKIN0#
L0_CTLIN1
L0_CTLIN1#
L0_CTLIN0
L0_CTLIN0#
L0_CADIN15
L0_CADIN15#
L0_CADIN14
L0_CADIN14#
L0_CADIN13
L0_CADIN13#
L0_CADIN12
L0_CADIN12#
L0_CADIN11
L0_CADIN11#
L0_CADIN10
L0_CADIN10#
L0_CADIN9
L0_CADIN9#
L0_CADIN8
L0_CADIN8#
L0_CADIN7
L0_CADIN7#
L0_CADIN6
L0_CADIN6#
L0_CADIN5
L0_CADIN5#
L0_CADIN4
L0_CADIN4#
L0_CADIN3
L0_CADIN3#
L0_CADIN2
L0_CADIN2#
L0_CADIN1
L0_CADIN1#
L0_CADIN0
L0_CADIN0#
21-
2121-
21212121-
21212121212121212121212121212121-
212121212121212121212121212121- 2121- 21-
CN13-1
J5
L0_CLKIN_H1
K5
L0_CLKIN_L1
J3
L0_CLKIN_H0
J2
L0_CLKIN_L0
P3
L0_CTLIN_H1
P4
L0_CTLIN_L1
N1
L0_CTLIN_H0
P1
L0_CTLIN_L0
N5
L0_CADIN_H15
P5
L0_CADIN_L15
M3
L0_CADIN_H14
M4
L0_CADIN_L14
L5
L0_CADIN_H13
M5
L0_CADIN_L13
K3
L0_CADIN_H12
K4
L0_CADIN_L12
H3
L0_CADIN_H11
H4
L0_CADIN_L11
G5
L0_CADIN_H10
H5
L0_CADIN_L10
F3
L0_CADIN_H9
F4
L0_CADIN_L9
E5
L0_CADIN_H8
F5
L0_CADIN_L8
N3
L0_CADIN_H7
N2
L0_CADIN_L7
L1
L0_CADIN_H6
M1
L0_CADIN_L6
L3
L0_CADIN_H5
L2
L0_CADIN_L5
J1
L0_CADIN_H4
K1
L0_CADIN_L4
G1
L0_CADIN_H3
H1
L0_CADIN_L3
G3
L0_CADIN_H2
G2
L0_CADIN_L2
E1
L0_CADIN_H1
F1
L0_CADIN_L1
E3
L0_CADIN_H0
E2
L0_CADIN_L0
L0_CLKOUT_H1
L0_CLKOUT_L1
L0_CLKOUT_H0
L0_CLKOUT_L0
L0_CTLOUT_H1
L0_CTLOUT_L1
L0_CTLOUT_H0
L0_CTLOUT_L0
L0_CADOUT_H15
L0_CADOUT_L15
L0_CADOUT_H14
L0_CADOUT_L14
L0_CADOUT_H13
L0_CADOUT_L13
L0_CADOUT_H12
L0_CADOUT_L12
L0_CADOUT_H11
L0_CADOUT_L11
L0_CADOUT_H10
L0_CADOUT_L10
L0_CADOUT_H9
L0_CADOUT_L9
L0_CADOUT_H8
HYPERTRANSPORT
L0_CADOUT_L8
L0_CADOUT_H7
L0_CADOUT_L7
L0_CADOUT_H6
L0_CADOUT_L6
L0_CADOUT_H5
L0_CADOUT_L5
L0_CADOUT_H4
L0_CADOUT_L4
L0_CADOUT_H3
L0_CADOUT_L3
L0_CADOUT_H2
L0_CADOUT_L2
L0_CADOUT_H1
L0_CADOUT_L1
L0_CADOUT_H0
L0_CADOUT_L0
Y4
Y3
Y1
W1
T5
R5
R2
R3
T4
T3
V5
U5
V4
V3
Y5
W5
AB5
AA5
AB4
AB3
AD5
AC5
AD4
AD3
T1
R1
U2
U3
V1
U1
W2
W3
AA2
AA3
AB1
AA1
AC2
AC3
AD1
AC1
FOX_PZ63823_284S_41F_TEMP_638P
21-
L0_CLKOUT1
21-21-
L0_CLKOUT1#
21-
L0_CLKOUT0
21-
L0_CLKOUT0#
21-
L0_CTLOUT1
21-
L0_CTLOUT1#
21-
L0_CTLOUT0
21-
L0_CTLOUT0#
21-
L0_CADOUT15
21-
L0_CADOUT15#
21-
L0_CADOUT14
21-
L0_CADOUT14#
21-
L0_CADOUT13
21-
L0_CADOUT13#
21-
L0_CADOUT12
21-
L0_CADOUT12#
21-
L0_CADOUT11
21-
L0_CADOUT11#
21-
L0_CADOUT10
21-
L0_CADOUT10#
21-
L0_CADOUT9
21-
L0_CADOUT9#
21-
L0_CADOUT8
21-
L0_CADOUT8#
21-
L0_CADOUT7
21-
L0_CADOUT7#
21-
L0_CADOUT6
21-
L0_CADOUT6#
21-
L0_CADOUT5
21-
L0_CADOUT5#
21-
L0_CADOUT4
21-
L0_CADOUT4#
21-
L0_CADOUT3
21-
L0_CADOUT3#
21-
L0_CADOUT2
21-
L0_CADOUT2#
21-
L0_CADOUT1
21-
L0_CADOUT1#
L0_CADOUT0
L0_CADOUT0#
A1
A26
Layout: Add stitching caps if crossing plane split.
S1
Top View
AF1
CHANGE by
Kevin Hsiao
8-Apr-2008
INVENTEC
TITLE
TT2.0
CPU-1
CODE
SIZE
A3
DOC. NUMBER
1310A2150101 A01
CS
SHEET
REV
OF
7016
MA_CLK_DDR2
MA_CLK_DDR2#
MA_CLK_DDR1
MA_CLK_DDR1#
MA_CS1#
MA_CS0#
MA_ODT1
MA_ODT0
MA_CAS#
MA_WE#
MA_RAS#
MA_BA2
MA_BA1
MA_BA0
MA_CKE1
MA_CKE0
MA_A(15:0)
MA_DQS(7)
MA_DQS#(7)
MA_DQS(6)
MA_DQS#(6)
MA_DQS(5)
MA_DQS#(5)
MA_DQS(4)
MA_DQS#(4)
MA_DQS(3)
MA_DQS#(3)
MA_DQS(2)
MA_DQS#(2)
MA_DQS(1)
MA_DQS#(1)
MA_DQS(0)
MA_DQS#(0)
MA_DM(7:0)
25252525-
25-,2725-,27-
25-,2725-,27-
25-,2725-,2725-,27-
25-,2725-,2725-,27-
25-,2725-,2725-,27-
2525252525252525252525252525252525-
MA_A(15)
MA_A(14)
MA_A(13)
MA_A(12)
MA_A(11)
MA_A(10)
MA_A(9)
MA_A(8)
MA_A(7)
MA_A(6)
MA_A(5)
MA_A(4)
MA_A(3)
MA_A(2)
MA_A(1)
MA_A(0)
MA_DQS(7)
MA_DQS#(7)
MA_DQS(6)
MA_DQS#(6)
MA_DQS(5)
MA_DQS#(5)
MA_DQS(4)
MA_DQS#(4)
MA_DQS(3)
MA_DQS#(3)
MA_DQS(2)
MA_DQS#(2)
MA_DQS(1)
MA_DQS#(1)
MA_DQS(0)
MA_DQS#(0)
MA_DM(7)
MA_DM(6)
MA_DM(5)
MA_DM(4)
MA_DM(3)
MA_DM(2)
MA_DM(1)
MA_DM(0)
CN13-2
P19
MA_CLK_H3
N19
MA_CLK_H0
N20
MA_CLK_L0
P20
MA_CLK_L3
Y16
MA_CLK_H2
AA16
MA_CLK_L2
E16
MA_CLK_H1
F16
MA_CLK_L1
V20
MA1_CS_L1
U20
MA1_CS_L0
U19
MA0_CS_L1
T20
MA0_CS_L0
V22
MA0_ODT1
T19
MA0_ODT0
V19
MA1_ODT1
U21
MA1_ODT0
T22
MA_CAS_L
T24
MA_WE_L
R19
MA_RAS_L
J21
MA_BANK2
R23
MA_BANK1
R20
MA_BANK0
J20
MA_CKE1
J22
MA_CKE0
K19
MA_ADD15
K24
MA_ADD14
V24
MA_ADD13
K20
MA_ADD12
L22
MA_ADD11
R21
MA_ADD10
K22
MA_ADD9
L19
MA_ADD8
L21
MA_ADD7
M24
MA_ADD6
L20
MA_ADD5
M22
MA_ADD4
M19
MA_ADD3
N22
MA_ADD2
M20
MA_ADD1
N21
MA_ADD0
W12
MA_DQS_H7
W13
MA_DQS_L7
Y15
MA_DQS_H6
W15
MA_DQS_L6
AB19
MA_DQS_H5
AB20
MA_DQS_L5
AD23
MA_DQS_H4
AC23
MA_DQS_L4
G22
MA_DQS_H3
G21
MA_DQS_L3
C22
MA_DQS_H2
C21
MA_DQS_L2
G16
MA_DQS_H1
G15
MA_DQS_L1
G13
MA_DQS_H0
H13
MA_DQS_L0
Y13
MA_DM7
AB16
MA_DM6
Y19
MA_DM5
AC24
MA_DM4
F24
MA_DM3
E19
MA_DM2
C15
MA_DM1
E12
MA_DM0
FOX_PZ63823_284S_41F_TEMP_638P
MA_DATA63
MA_DATA62
MA_DATA61
MA_DATA60
MA_DATA59
MA_DATA58
MA_DATA57
MA_DATA56
MA_DATA55
MA_DATA54
MA_DATA53
MA_DATA52
MA_DATA51
MA_DATA50
MA_DATA49
MA_DATA48
MA_DATA47
MA_DATA46
MA_DATA45
MA_DATA44
MA_DATA43
MA_DATA42
MA_DATA41
MA_DATA40
MA_DATA39
MA_DATA38
MA_DATA37
MA_DATA36
MA_DATA35
MA_DATA34
MA_DATA33
MA_DATA32
MEMORY INTERFACE
MA_DATA31
MA_DATA30
MA_DATA29
MA_DATA28
MA_DATA27
MA_DATA26
MA_DATA25
MA_DATA24
MA_DATA23
MA_DATA22
MA_DATA21
MA_DATA20
MA_DATA19
MA_DATA18
MA_DATA17
MA_DATA16
MA_DATA15
MA_DATA14
MA_DATA13
MA_DATA12
MA_DATA11
MA_DATA10
MA_DATA9
MA_DATA8
MA_DATA7
MA_DATA6
MA_DATA5
MA_DATA4
MA_DATA3
MA_DATA2
MA_DATA1
MA_DATA0
AA12
AB12
AA14
AB14
W11
Y12
AD13
AB13
AD15
AB15
AB17
Y17
Y14
W14
W16
AD17
Y18
AD19
AD21
AB21
AB18
AA18
AA20
Y20
AA22
Y22
W21
W22
AA21
AB22
AB24
Y24
H22
H20
E22
E21
J19
H24
F22
F20
C23
B22
F18
E18
E20
D22
C19
G18
G17
C17
F14
E14
H17
E17
E15
H15
E13
C13
H12
H11
G14
H14
F12
G12
MA_DATA(63)
MA_DATA(62)
MA_DATA(61)
MA_DATA(60)
MA_DATA(59)
MA_DATA(58)
MA_DATA(57)
MA_DATA(56)
MA_DATA(55)
MA_DATA(54)
MA_DATA(53)
MA_DATA(52)
MA_DATA(51)
MA_DATA(50)
MA_DATA(49)
MA_DATA(48)
MA_DATA(47)
MA_DATA(46)
MA_DATA(45)
MA_DATA(44)
MA_DATA(43)
MA_DATA(42)
MA_DATA(41)
MA_DATA(40)
MA_DATA(39)
MA_DATA(38)
MA_DATA(37)
MA_DATA(36)
MA_DATA(35)
MA_DATA(34)
MA_DATA(33)
MA_DATA(32)
MA_DATA(31)
MA_DATA(30)
MA_DATA(29)
MA_DATA(28)
MA_DATA(27)
MA_DATA(26)
MA_DATA(25)
MA_DATA(24)
MA_DATA(23)
MA_DATA(22)
MA_DATA(21)
MA_DATA(20)
MA_DATA(19)
MA_DATA(18)
MA_DATA(17)
MA_DATA(16)
MA_DATA(15)
MA_DATA(14)
MA_DATA(13)
MA_DATA(12)
MA_DATA(11)
MA_DATA(10)
MA_DATA(9)
MA_DATA(8)
MA_DATA(7)
MA_DATA(6)
MA_DATA(5)
MA_DATA(4)
MA_DATA(3)
MA_DATA(2)
MA_DATA(1)
MA_DATA(0)
CN13-3
R26
MB_CLK_H3
P22
MB_CLK_H0
R22
MB_CLK_L0
R25
MB_CLK_L3
AF18
MB_CLK_H2
AF17
MB_CLK_L2
A17
MB_CLK_H1
A18
MB_CLK_L1
U22
MB1_CS_L0
W25
MB0_CS_L1
V26
MB0_CS_L0
W23
MB0_ODT1
W26
MB0_ODT0
Y26
MB1_ODT0
U24
MB_CAS_L
U23
MB_WE_L
U25
MB_RAS_L
J26
MB_BANK2
U26
MB_BANK1
R24
MB_BANK0
H26
MB_CKE1
J25
MB_CKE0
J24
MB_ADD15
J23
MB_ADD14
W24
MB_ADD13
L25
MB_ADD12
L26
MB_ADD11
T26
MB_ADD10
K26
MB_ADD9
M26
MB_ADD8
L24
MB_ADD7
N25
MB_ADD6
L23
MB_ADD5
N26
MB_ADD4
N23
MB_ADD3
P26
MB_ADD2
N24
MB_ADD1
P24
MB_ADD0
AF12
MB_DQS_H7
AE12
MB_DQS_L7
AE16
MB_DQS_H6
AD16
MB_DQS_L6
AF21
MB_DQS_H5
AF22
MB_DQS_L5
AC25
MB_DQS_H4
AC26
MB_DQS_L4
F26
MB_DQS_H3
E26
MB_DQS_L3
A24
MB_DQS_H2
A23
MA_DQS_L2
D16
MB_DQS_H1
C16
MA_DQS_L1
C12
MB_DQS_H0
B12
MA_DQS_L0
AD12
MB_DM7
AC16
MB_DM6
AE22
MB_DM5
AB26
MB_DM4
E25
MB_DM3
A22
MB_DM2
B16
MB_DM1
A12
MB_DM0
FOX_PZ63823_284S_41F_TEMP_638P
MB_DATA63
MB_DATA62
MB_DATA61
MB_DATA60
MB_DATA59
MB_DATA58
MB_DATA57
MB_DATA56
MB_DATA55
MB_DATA54
MB_DATA53
MB_DATA52
MB_DATA51
MB_DATA50
MB_DATA49
MB_DATA48
MB_DATA47
MB_DATA46
MB_DATA45
MB_DATA44
MB_DATA43
MB_DATA42
MB_DATA41
MB_DATA40
MB_DATA39
MB_DATA38
MB_DATA37
MB_DATA36
MB_DATA35
MB_DATA34
MB_DATA33
MB_DATA32
MB_DATA31
MEMORY INTERFACE
MB_DATA30
MB_DATA29
MB_DATA28
MB_DATA27
MB_DATA26
MB_DATA25
MB_DATA24
MB_DATA23
MB_DATA22
MB_DATA21
MB_DATA20
MB_DATA19
MB_DATA18
MB_DATA17
MB_DATA16
MB_DATA15
MB_DATA14
MB_DATA13
MB_DATA12
MB_DATA11
MB_DATA10
MB_DATA9
MB_DATA8
MB_DATA7
MB_DATA6
MB_DATA5
MB_DATA4
MB_DATA3
MB_DATA2
MB_DATA1
MB_DATA0
AD11
AF11
AF14
AE14
Y11
AB11
AC12
AF13
AF15
AF16
AC18
AF19
AD14
AC14
AE18
AD18
AD20
AC20
AF23
AF24
AF20
AE20
AD22
AC22
AE25
AD26
AA25
AA26
AE24
AD24
AA23
AA24
G24
G23
D26
C26
G26
G25
E24
E23
C24
B24
C20
B20
C25
D24
A21
D20
D18
C18
D14
C14
A20
A19
A16
A15
A13
D12
E11
G11
B14
A14
A11
C11
MB_DATA(63)
MB_DATA(62)
MB_DATA(61)
MB_DATA(60)
MB_DATA(59)
MB_DATA(58)
MB_DATA(57)
MB_DATA(56)
MB_DATA(55)
MB_DATA(54)
MB_DATA(53)
MB_DATA(52)
MB_DATA(51)
MB_DATA(50)
MB_DATA(49)
MB_DATA(48)
MB_DATA(47)
MB_DATA(46)
MB_DATA(45)
MB_DATA(44)
MB_DATA(43)
MB_DATA(42)
MB_DATA(41)
MB_DATA(40)
MB_DATA(39)
MB_DATA(38)
MB_DATA(37)
MB_DATA(36)
MB_DATA(35)
MB_DATA(34)
MB_DATA(33)
MB_DATA(32)
MB_DATA(31)
MB_DATA(30)
MB_DATA(29)
MB_DATA(28)
MB_DATA(27)
MB_DATA(26)
MB_DATA(25)
MB_DATA(24)
MB_DATA(23)
MB_DATA(22)
MB_DATA(21)
MB_DATA(20)
MB_DATA(19)
MB_DATA(18)
MB_DATA(17)
MB_DATA(16)
MB_DATA(15)
MB_DATA(14)
MB_DATA(13)
MB_DATA(12)
MB_DATA(11)
MB_DATA(10)
MB_DATA(9)
MB_DATA(8)
MB_DATA(7)
MB_DATA(6)
MB_DATA(5)
MB_DATA(4)
MB_DATA(3)
MB_DATA(2)
MB_DATA(1)
MB_DATA(0)
26-
MB_CS1#
MB_CS0#
MB_ODT1
MB_ODT0
MB_CAS#
MB_WE#
MB_RAS#
MB_BA2
MB_BA1
MB_BA0
MB_CKE1
MB_CKE0
26262626-
26-,2726-,27-
26-,2726-,27-
26-,2726-,2726-,27-
26-,2726-,2726-,27-
26-,2726-,2726-,27-
2626262626262626262626262626262626-
MB_A(15)
MB_A(14)
MB_A(13)
MB_A(12)
MB_A(11)
MB_A(10)
MB_A(9)
MB_A(8)
MB_A(7)
MB_A(6)
MB_A(5)
MB_A(4)
MB_A(3)
MB_A(2)
MB_A(1)
MB_A(0)
MB_DQS(7)
MB_DQS#(7)
MB_DQS(6)
MB_DQS#(6)
MB_DQS(5)
MB_DQS#(5)
MB_DQS(4)
MB_DQS#(4)
MB_DQS(3)
MB_DQS#(3)
MB_DQS(2)
MB_DQS#(2)
MB_DQS(1)
MB_DQS#(1)
MB_DQS(0)
MB_DQS#(0)
MB_DM(7)
MB_DM(6)
MB_DM(5)
MB_DM(4)
MB_DM(3)
MB_DM(2)
MB_DM(1)
MB_DM(0)
25-
MA_DATA(63:0) MB_DATA(63:0)
MB_CLK_DDR2
MB_CLK_DDR2#
MB_CLK_DDR1
MB_CLK_DDR1#
MB_A(15:0)
MB_DQS(7)
MB_DQS#(7)
MB_DQS(6)
MB_DQS#(6)
MB_DQS(5)
MB_DQS#(5)
MB_DQS(4)
MB_DQS#(4)
MB_DQS(3)
MB_DQS#(3)
MB_DQS(2)
MB_DQS#(2)
MB_DQS(1)
MB_DQS#(1)
MB_DQS(0)
MB_DQS#(0)
MB_DM(7:0)
INVENTEC
TITLE
TT2.0
CPU-2
CHANGE by
CODE
A3
CS
8-Apr-2008Kevin Hsiao
17 70
REVDOC. NUMBERSIZE
A011310A2150101
OFSHEET
10-
COREFB
10-
COREFB#
Routing differential pair type
To put pull high resistors near switching power source
Keep trace to resistor less than 600mils from CPU pin
and trace to AC caps less than 1250mils.
CLK_R_CPUBCLK
CLK_R_CPUBCLK#
+V1.8
10-,12-,13-,18-,19-,20-,25-,26-,27-
33-
CPU_SIC
33-
+VCC_CORE
+V1.8
10-,12-,13-,18-,19-,20-,25-,26-,27-
1
R267
1K_1%
2
1
R266
1K_1%
2
CPU_SID
10-,19-
Routing differential pair type
C625
1
2
1000pF_50v
CPU_MVREF
11-,13-,14-,15-,18-,21-,23-,24-,28-,33-
18-
1
2
1
R65
51_5%
2
1
R66
51_5%
2
CPU_DBREQ#
C626
0.22uF_6.3v
10-,12-,13-,18-,19-,20-,25-,26-,27-
C87
15-
12
1
3900pF_16v
R143
169_1%
2
C88
15-
12
3900pF_16v
12
R685 604_1%
12
604_1%R686
+V1.8S
R479
12
300_5%
18-
+V1.8
R265
Keep trace to resistors less
than 1" from CPU pin.
VDD1_FB
VDD1_FB#
Routing differential pair type
CPUBCLKIN_H
CPUBCLKIN_L
LDT_PG
LDTSTOP#
LDT_RST#
CPU_TDI
CPU_TRST#
CPU_TCK
CPU_TMS
12
39.2_1%R263
12
39.2_1%
1
R174
0_5%
2
1010-
10-,18-,3118-,23-,3118-,31-
18181818-
CPU_MVREF
18-
R617
510_5%
510_5%R657
300_5%R613
R612 300_5%
R656
R142
R688
+V1.8
10-,12-,13-,18-,19-,20-,25-,26-,27-
12
1
12
12
12
300_5%
12
300_5%
300_5%
2
1
CPU_VDDA
TP1016
TP1007
TP1023
2
TP1009
TP1012
FOX_PZ63823_284S_41F_TEMP_638P
C121
C582
1
1
2
2
4.7uF_6.3v
3300pF_50v
CN13-4
F8
VDDA
F9
VDDA
A9
CLKIN_H
A8
CLKIN_L
A7
PWROK
LDTSTOP_L
B7
RESET_L
AF4
SIC
AF5
SID
AF9 AE9
TDI
AD9
TRST_L
AC9
TCK
AA9
TMS
E10
DBREQ_L
F6
VDD_FB_H
E6
VDD_FB_L
H6
VDDNB_FB_H
G6
VDDNB_FB_L
Y10
VTT_SENSE
W17
M_VREF
AE10
M_ZN
AF10
M_ZP
AA8
MEMHOT_L
E9
TEST25_H
E8
TEST25_L
G9
TEST19
H10
TEST18
C2
TEST9
D7
TEST17
E7
TEST16
F7
TEST15
C7
TEST14
AC8
TEST12
C3
TEST7
AA6
TEST6
W7
THERMDC
W8
THERMDA
Y6
VDD1_FB_H
AB6
VDD1_FB_L
MISC
THERMTRIP_L
1
2
LDTREQ_L
PROCHOT_L
DBRDY
VDDIO_FB_H
VDDIO_FB_L
HTREF1
HTREF0
TEST29_H
TEST29_L
TEST24
TEST23
TEST22
TEST21
TEST20
TEST28_H
TEST28_L
TEST27
ALERT_L
TEST10
TEST8
BLM11A221S
1
C579
0.22uF_6.3v
C6F10
A6
SVC
A4
SVD
AF6
AC7
TDO
G10
W9
Y9
P6
R6
C9
C8
AE7
AD7
AE8
AB8
AF7
J7
H8
AF8
AE6
K8
C4
L15
2
+V1.8
10-,12-,13-,18-,19-,20-,25-,26-,27-
1
R615
1K_1%
2
TP1022
TP1021
TP1011
TP1010
TP1025
TP1027
TP1017
TP1018
+V2.5S
7-
1
R616
1K_1%
2
18-,23-,31-
LDT_REQ#
10-
CPU_SVC_R
10-
THERMTRIP#
18-
CPU_DBRDY
44.2_1%
44.2_1%
12
80.6_1%_OPEN
Routing as differential as short as possible
CPU_SVD_R
12
2
1
R633
Route as 80 ohm differential impedance.
Keep trace to resistor less than 1" FROM CPU PIN.
12
12
12
12
CPU_THERM_SCI#
R672
R671
+V1.2S
R260
R262
R689
R259
300_5%
300_5%
300_5%
300_5%
R261
300_5%
12
+V1.8
10-,12-,13-,18-,19-,20-,25-,26-,27-
R687
300_5%
1
2
R256
300_5%
1
2
9-,11-,15-,19-,24-,31-,32-
Keep trace to resistors less
than 1" from CPU pin.
+V1.8
10-,12-,13-,18-,19-,20-,25-,26-,27-
1
2
1
R258
1K_5%
2
R257
1K_5%
Q37
1
B
MMBT3904
C32E
+V1.8
1
B
Q38
MMBT3904
10-,12-,13-,18-,19-,20-,25-,26-,27-
1
R264
30K_5%
2
33-
C32E
20-,33-
H_THERMTRIP#
8-,20-
PROCHOT#
18-
CPU_TDO
THERM_SCI#
+V1.8S
+V1.8S
11-,13-,14-,15-,18-,21-,23-,24-,28-,33-
1
R492
604_1%
2
CPU_DBREQ#
CPU_TCK
CPU_TMS
CPU_TDI
CPU_TDO
LDT_RST#
18-
18-
18-
18-
18-
18-
18-,31-
CPU_DBRDY
CPU_TRST#
HDT Header
11-,13-,14-,15-,18-,21-,23-,24-,28-,33-
CN504
1
1
2
2
3
3
4
4
5
5
6
6
18-
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
21
22
22
23
23
24
24
25
25
26
26
SAMTEC_ASP_68200_26P_OPEN
LDT_PG
LDT_RST#
LDT_RST#
LDTSTOP#
LDT_REQ#
10-,18-,31-
18-,31-
18-,31-
18-,23-,31-
18-,23-,31-
CHANGE by
+V1.8S
11-,13-,14-,15-,18-,21-,23-,24-,28-,33-
R176
2
1
300_5%
R175
12
604_1%
R432
2
1
604_1%
R632
12
470_5%
R614
12
470_5%
Kevin Hsiao 8-Apr-2008
INVENTEC
TITLE
TT2.0
CPU-3
SIZE
A3
DOC. NUMBER
CODE
1310A2150101 A01
CS
SHEET
REV
OF
7018
+VCC_CORE
10-,18-,19-
C584
1
22uF_6.3v
2
+VCC_CORE_VDD1
10-,19-
C620
1
2
+VCC_CORE_NB
11-,19-
C624
1
2
22uF_6.3v
Place under socket on bottom side.
+VCC_CORE_VDD1
10-,19-
+VCC_CORE
C583
C622
1
22uF_6.3v
22uF_6.3v
2
2
C618
C623
1
1
2
2
22uF_6.3v
22uF_6.3v
C586
C585
1
1
22uF_6.3v
2
2
4.7uF_6.3v
+VCC_CORE
10-,18-,19+VCC_CORE_VDD1
10-,19-
CN13-5
AC4
VDD1
AD2
VDD1
G4
VDD0
H2
VDD0
J9
VDD0
J11
VDD0
J13
VDD0
K6
VDD0
K10
VDD0
K12
VDD0
K14
VDD0
L4
VDD0
L7
VDD0
L9
VDD0
L11
VDD0
L13
VDD0
M2
VDD0
M6
VDD0
M8
VDD0
M10
VDD0
N7
VDD0
N9
VDD0
N11
VDD0
P8
VDD1
P10
VDD1
R4
VDD1
R7
VDD1
R9
VDD1
R11
VDD1
T2
VDD1
T6
VDD1
T8
VDD1
T10
VDD1
T12
VDD1
T14
VDD1
U7
VDD1
U9
VDD1
U11
VDD1
U13
VDD1
V6
VDD1
V8
VDD1
V10
VDD1
V12
VDD1
V14
VDD1
W4
VDD1
Y2
VDD1
FOX_PZ63823_284S_41F_TEMP_638P
C581
C578
11
22uF_6.3v
2
C621
1
2
22uF_6.3v22uF_6.3v
1
1
2
2 0.01uF_16v
0.22uF_16v
C615
1
1
2
2
0.22uF_16v
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VDD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
C617
C616
0.01uF_16v
AA4
AA11
AA13
AA15
AA17
AA19
AB2
AB7
AB9
AB23
AB25
AC11
AC13
AC15
AC17
AC19
AC21
AD6
AD8
AD25
AE11
AE13
AE15
AE17
AE19
AE21
AE23
B4
B6
B8
B9
B11
B13
B15
B17
B19
B21
B23
B25
D6
D8
D9
D11
D13
D15
D17
AC6
C580
1
180pF_50v
2
C619
1
180pF_50v
2
10-,12-,13-,18-,19-,20-,25-,26-,27-
+V1.8
10-,12-,13-,18-,19-,20-,25-,26-,27-
C627
22uF_6.3v
C590
1
2
4.7uF_6.3v
C629
1
2
0.01uF_16v
1
2
C588
22uF_6.3v
1
2
+V1.8
10-,12-,13-,18-,19-,20-,25-,26-,27-
+V1.2S
9-,11-,15-,18-,19-,24-,31-,32-
CN13-6
D4
VLDT_A
D3
VLDT_A
D2
AD10
VLDT_A
D1
VLDT_A
D10
VTT
C10
VTT
B10
VTT
VTT
W10
VTT
H25
VDDIO
J17
VDDIO
K18
VDDIO
K21
VDDIO
K23
VDDIO
K25
VDDIO
L17
VDDIO
M18
VDDIO
M21
VDDIO
M23
VDDIO
M25
VDDIO
N17
VDDIO
P18
VDDIO
P21
VDDIO
P23
VDDIO
P25
VDDIO
R17
VDDIO
T18
VDDIO
T21
VDDIO
T23
VDDIO
T25
VDDIO
U17
VDDIO
V18
VDDIO
V21
VDDIO
V23
VDDIO
V25
VDDIO
Y25
VDDIO
+V0.9 +V0.9
12-,19-,27-
+V1.8
FOX_PZ63823_284S_41F_TEMP_638P
VLDT_B
VLDT_B
VLDT_B
VLDT_B
IOPWR
AE5
AE4
AE3
AE2
AC10
VTT
AB10
VTT
AA10
VTT
A10
VTT
D19
VSS
D21
VSS
D23
VSS
D25
VSS
E4
VSS
F2
VSS
F11
VSS
F13
VSS
F15
VSS
F17
VSS
F19
VSS
F21
VSS
F23
VSS
F25
VSS
H7
VSS
H9
VSS
H21
VSS
H23
VSS
J4
VSS
J6
VSS
J8
VSS
J10
VSS
J12
VSS
J14
VSS
J16
VSS
J18
VSS
K2
VSS
K7
VSS
K9
VSS
K11
VSS
K13
VSS
K15
VSS
K17
VSS
L6
VSS
L8
VSS
L10
VSS
L12
VSS
L14
VSS
L16
VSS
L18
VSS
M7
VSS
M9
VSS
M11
VSS
+V1.8
C591
1
2
0.22uF_10v
Place under socket on bottom side.
C635
4.7uF_6.3v
C589
0.01uF_16v
C633
1
2
0.22uF_10v
C628
1
2
180pF_50v
1
2
1
2
C592
1
2
0.22uF_10v
C631
1
2
0.22uF_10v
C229
1
2
4.7uF_6.3v
C634
1
2
180pF_50v
1
2
1
2
1
2
C632
0.22uF_10v
C148
4.7uF_6.3v
C587
180pF_50v
C630
1
2
0.22uF_10v
+V1.2S
9-,11-,15-,18-,19-,24-,31-,32-
12-,19-,27-
+V1.2S
+VCC_CORE
9-,11-,15-,18-,19-,24-,31-,32-
1
C576
180pF_50v
2
C646
1
2
0.22uF_10v
+V0.9
12-,19-,27-
C204
1
1000pF_50v_OPEN
2
+VCC_CORE_VDD1
10-,18-,19-
1
C645
180pF_50v
2
C577
1
2
0.22uF_10v
C203
1
1000pF_50v_OPEN
2
+VCC_CORE_NB
11-,19-
10-,19-
FOX_PZ63823_284S_41F_TEMP_638P
+V1.2S
C256
1
2
1
2
C255
1
4.7uF_6.3v
4.7uF_6.3v
2
C734
22uF_6.3v
Place close to socket.
C186
1
1000pF_50v_OPEN
2
CN13-7
M16
VDDNB
P16
VDDNB
T16
VDDNB
K16
VDDNB
U15
VDD1
V16
VDDNB
J15
VDD0
L15
VDD0
C120
1
2
4.7uF_6.3v
C125
1
1000pF_50v_OPEN
2
VDD
M17
VSS
N4
VSS
N8
VSS
N10
VSS
N16
VSS
N18
VSS
P2
VSS
P7
VSS
P9
VSS
P11
VSS
P17
VSS
R8
VSS
R10
VSS
R16
VSS
R18
VSS
T7
VSS
T9
VSS
T11
VSS
T13
VSS
T15
VSS
T17
VSS
U4
VSS
U6
VSS
U8
VSS
U10
VSS
U12
VSS
U14
VSS
U16
VSS
U18
VSS
V2
VSS
V7
VSS
V9
VSS
V11
VSS
V13
VSS
V15
VSS
V17
VSS
W6
VSS
Y21
VSS
Y23
VSS
N6
VSS
FOX_PZ63823_284S_41F_TEMP_638P
+V0.9
12-,19-,27-
C652
1
2
4.7uF_6.3v
C650
1
2
0.22uF_10v
C123
1
2
1000pF_50v
1
C151
2
180pF_50v
Place close to socket.
CN13-8
A5
RSVD
C5
RSVD RSVD
B5
RSVD
A3
RSVD
AA7
RSVD
B3
RSVD
B18
RSVD
+V0.9
C91
1
2
4.7uF_6.3v
C89
1
2
0.22uF_10v
C124
1
2
1000pF_50v
1
C122
2
180pF_50v
RSVD
RSVD
RSVD
RSVD
RSVD
C92
1
2
4.7uF_6.3v
C90
1
2
0.22uF_10v
C648
1
2
1000pF_50v
1
C150
2
180pF_50v
C1
D5
H16
H18
H19
W18
C653
1
2
4.7uF_6.3v
C651
1
2
0.22uF_10v
C649
1
2
1000pF_50v
1
C647
2
180pF_50v
Place close to socket.
Place on DDR path
CHANGE by OF
Kevin Hsiao 8-Apr-2008
INVENTEC
TITLE
TT2.0
CPU-4
SIZE
A3
DOC. NUMBER
CODE
1310A2150101 A01
CS
SHEET
REV
7019
H_THERMDA
H_THERMDC
23-
23-
Route differential pair type
+V5S
15-,25-,26-,33-,36-
15-,25-,26-,33-,36-
8-,13-,14-,15-,20-,29-,32-,33-,40-,41-,43-,44-,46-,49-
1
R489
10K_5%
2
SB_3S_SMCLK
SB_3S_SMDATA
C230
2200pF_50v
12
H_THERMTRIP#
+V1.8
10-,12-,13-,18-,19-,25-,26-,27-
1
2
1
MMBT3904
PROCHOT#
+V3S
7-,8-,10-,13-,14-,15-,23-,24-,25-,26-,29-,30-,31-,32-,33-,34-,35-,36-,38-,39-,43-,44-,45-,46-,47-,49-,51-,53-,54-,56-
18-,33-
SMSC_EMC1402_1_ACZL_MSOP_8P
1
C231
0.1uF_16v
2
B
8-,18-
C32E
Q6
U33
1
SMCLK
VDD
2
DP
SMDATA
3
ALERTDN
4
THERM
R15
30K_5%
TS_THERM#
8
7
6
5
GND
LAYOUT Note: Put the thermal sensor close to CPU.
PWM_3S_FAN#
R485
12
35-
3K_5%
+V5S
8-,13-,14-,15-,20-,29-,32-,33-,40-,41-,43-,44-,46-,49-
U2
5
1
4
2
NC7SZ00M5
3
C20
1
1uF_10v
2
FAN_FG
R451
12
2.2K_5%
C21
1
0.1uF_16v
2
1
2
C472
0.1uF_16v
CN6
1
VCC
1
2
GND
2
3
G
FG
3
4
G
PWM
4
ACES_85205_0400_4P
G1
G2
INVENTEC
TITLE
TT2.0
THERMAL&FAN CONTROLLER
CHANGE by
Kevin Hsiao
8-Apr-2008
SIZE
A3
CODE
DOC. NUMBER
1310A2150101 A01
CS
SHEET
20
REV
OF
70
11-,13-,14-,15-,18-,21-,23-,24-,28-,33-
+V1.8S
GM_MA(0)
GM_MA(1)
GM_MA(2)
GM_MA(3)
GM_MA(4)
GM_MA(5)
GM_MA(6)
GM_MA(7)
GM_MA(8)
GM_MA(9)
GM_MA(10)
GM_MA(11)
GM_MA(12)
GM_BA0
GM_BA1
GM_RAS#
GM_CAS#
GM_WE#
GM_CS#
GM_CKE
GM_ODT
GM_CLK
GM_CLK#
28282828282828282828282828-
2828-
2828282828-
R670 100_1%
2828-
L0_CADOUT0
L0_CADOUT0#
L0_CADOUT1
L0_CADOUT1#
L0_CADOUT2
L0_CADOUT2#
L0_CADOUT3
L0_CADOUT3#
L0_CADOUT4
L0_CADOUT4#
L0_CADOUT5
L0_CADOUT5#
L0_CADOUT6
L0_CADOUT6#
L0_CADOUT7
L0_CADOUT7#
L0_CADOUT8
L0_CADOUT8#
L0_CADOUT9
L0_CADOUT9#
L0_CADOUT10
L0_CADOUT10#
L0_CADOUT11
L0_CADOUT11#
L0_CADOUT12
L0_CADOUT12#
L0_CADOUT13
L0_CADOUT13#
L0_CADOUT14
L0_CADOUT14#
L0_CADOUT15
L0_CADOUT15#
L0_CLKOUT0
L0_CLKOUT0#
L0_CLKOUT1
L0_CLKOUT1#
L0_CTLOUT0
L0_CTLOUT0#
L0_CTLOUT1
L0_CTLOUT1#
16161616161616161616161616161616-
16161616161616161616161616161616-
16161616-
16161616-
12
R631
301_1%
Please close to NB balls
U28-4
AB12
MEM_A0_NC
AE16
MEM_A1_NC
V11
MEM_A2_NC
AE15
MEM_A3_NC
AA12
MEM_A4_NC
AB16
MEM_A5_NC
AB14
MEM_A6_NC
AD14
MEM_A7_NC
AD13
MEM_A8_NC
AD15
MEM_A9_NC
AC16
MEM_A10_NC
AE13
MEM_A11_NC
AC14
MEM_A12_NC
Y14
MEM_A13_NC
AD16
MEM_BA0_NC
AE17
MEM_BA1_NC
AD17
MEM_BA2_NC
W12
MEM_RAS#_NC
Y12
MEM_CAS#_NC
AD18
MEM_WE#_NC
AB13
MEM_CS#_NC
AB18
MEM_CKE_NC
V14
12
12
R232
12
R231
40.2_1%
40.2_1%
MEM_ODT_NC
V15
MEM_CKP_NC
W14
MEM_CKN_NC
AE12
MEM_COMPP_NC
AD12
MEM_COMPN_NC
ATI_RS780_FCBGA_TT20_528P
U28-1
PART 1 OF 6
Y25
HT_RXCAD0P
Y24
HT_RXCAD0N
V22
HT_RXCAD1P
V23
HT_RXCAD1N
V25
SPAD13
V24
SPAD13
U24
SPAD13
U25
SPAD13
T25
SPAD13
T24
SPAD13
P22
HT_RXCAD5P
P23
HT_RXCAD5N
P25
SPAD13
P24
SPAD13
N24
SPAD13
N25
SPAD13 HT_TXCAD7N
AC24
HT_RXCAD8P
AC25
HT_RXCAD8N
AB25
HT_RXCAD9P
AB24
HT_RXCAD9N
AA24
HT_RXCAD10P
AA25
HT_RXCAD10N
Y22
HT_RXCAD11P
Y23
HT_RXCAD11N
W21
HT_RXCAD12P
W20
HT_RXCAD12N
V21
HT_RXCAD13P
V20
HT_RXCAD13N
U20
HT_RXCAD14P
U21
HT_RXCAD14N
U19
HT_RXCAD15P
U18
HT_RXCAD15N
T22
HT_RXCLK0P
T23
HT_RXCLK0N
AB23
HT_RXCLK1P
AA22
HT_RXCLK1N
M22
HT_RXCTL0P
M23
HT_RXCTL0N
R21
HT_RXCTL1P
R20
HT_RXCTL1N
C23
HT_RXCALP
A24
HT_RXCALN
ATI_RS780_FCBGA_TT20_528P
PAR 4 OF 6
MEM_DQ0_DVO_VSYNC_NC
MEM_DQ1_DVO_HSYNC_NC
MEM_DQ2_DVO_DE_NC
MEM_DQ3_DVO_D0_NC
MEM_DQ4_NC
MEM_DQ5_DVO_D1_NC
MEM_DQ6_DVO_D2_NC
MEM_DQ7_DVO_D4_NC
MEM_DQ8_DVO_D3_NC
MEM_DQ9_DVO_D5_NC
MEM_DQ10_DVO_D6_NC
MEM_DQ11_DVO_D7_NC
MEM_DQ12_NC
MEM_DQ13_DVO_D9_NC
MEM_DQ14_DVO_D10_NC
MEM_DQ15_DVO_D11_NC
MEM_DQS0P_DVO_IDCKP_NC
MEM_DQS0N_DVO_IDCKN_NC
MEM_DQS1P_NC
MEM_DQS1N_NC
MEM_DM0_NC
MEM_DM1_DVO_D8_NC
IOPLLVDD18_NC
IOPLLVDD_NC
IOPLLVSS_NC
SBD_MEM/DVO_I/F
MEM_VREF_NC
D24
HT_TXCAD0P
D25
HT_TXCAD0N
E24
HT_TXCAD1P
E25
HT_TXCAD1N
F24
SPAD13
F25
SPAD13
F23
HT_TXCAD3P
F22
HT_TXCAD3N
H23
HT_TXCAD4P
H22
HT_TXCAD4N
J25
SPAD13
J24
SPAD13
K24
SPAD13
K25
SPAD13
K23
HT_TXCAD7P
K22
F21
HT_TXCAD8P
G21
HT_TXCAD8N
G20
HT_TXCAD9P
H21
HT_TXCAD9N
J20
HT_TXCAD10P
J21
HT_TXCAD10N
J18
HT_TXCAD11P
K17
HT_TXCAD11N
L19
HT_TXCAD12P
J19
HT_TXCAD12N
M19
HT_TXCAD13P
HT_TXCAD13N
HT_TXCAD14P
HT_TXCAD14N
HT_TXCAD15P
HT_TXCAD15N
SPAD13
SPAD13
HT_TXCLK1P
HT_TXCLK1N
SPAD13
SPAD13
HT_TXCTL1P
HT_TXCTL1N
HT_TXCALP
HT_TXCALN
NB_IOPLLVDD18
NB_IOPLLVDD
NB_MEM_VREF
L18
M21
P21
P18
M18
H24
H25
L21
L20
M24
M25
P19
R18
B24
B25
C227
2.2uF_6.3v
1
2
HYPER TRANSPORT CPU I/F
AA18
AA20
AA19
Y19
V17
AA17
AA15
Y15
AC20
AD19
AE22
AC18
AB20
AD22
AC22
AD21
Y17
W18
AD20
AE21
W17
AE19
AE23
AE24
AD23
AE18
16-
L0_CADIN0
16-
L0_CADIN0#
16-
L0_CADIN1
16-
L0_CADIN1#
16-
L0_CADIN2
16-
L0_CADIN2#
16-
L0_CADIN3
16-
L0_CADIN3#
16-
L0_CADIN4
16-
L0_CADIN4#
16-
L0_CADIN5
16-
L0_CADIN5#
16-
L0_CADIN6
16-
L0_CADIN6#
16-
L0_CADIN7
16-
L0_CADIN7#
16-
L0_CADIN8
16-
L0_CADIN8#
16-
L0_CADIN9
16-
L0_CADIN9#
16-
L0_CADIN10
16-
L0_CADIN10#
16-
L0_CADIN11
16-
L0_CADIN11#
16-
L0_CADIN12
16-
L0_CADIN12#
16-
L0_CADIN13
16-
L0_CADIN13#
16-
L0_CADIN14
16-
L0_CADIN14#
16-
L0_CADIN15
16-
L0_CADIN15#
16-
L0_CLKIN0
16-
L0_CLKIN0#
16-
L0_CLKIN1
16-
L0_CLKIN1#
16-
L0_CTLIN0
16-
L0_CTLIN0#
16-
L0_CTLIN1
16-
HT_TXCALP HT_TXCALN
R652
L0_CTLIN1#
12
301_1%
Please close to NB balls
28-
GM_MD(0)
28-
GM_MD(1)
28-
GM_MD(2)
28-
GM_MD(3)
28-
GM_MD(4)
28-
GM_MD(5)
28-
GM_MD(6)
28-
GM_MD(7)
28-
GM_MD(8)
28-
GM_MD(9)
28-
GM_MD(10)
28-
GM_MD(11)
28-
GM_MD(12)
28-
GM_MD(13)
28-
GM_MD(14)
28-
GM_MD(15)
28-
GM_DQS0
28-
GM_DQS0#
28-28-
GM_DQS1
28-
GM_DQS1#
28-
GM_DM0
28-
GM_DM1
L18
12
BLM11A221S
12
C228
1
2
2.2uF_6.3v
L21
BLM11A221S
+V1.8S
11-,13-,14-,15-,18-,21-,23-,24-,28-,33-
+V1.1S
11-,22-,23-,24-
C433
1
0.1uF_16v
2
C225
1
0.1uF_16v
2
+V1.8S
11-,13-,14-,15-,18-,21-,23-,24-,28-,33-
1
R233
1K_5%
2
1
R234
1K_5%
2
INVENTEC
TITLE
TT2.0
RS780-1
SIZE DOC. NUMBER
Kevin Hsiao
8-Apr-2008
CODE
A3
1310A2150101 A01
CS
SHEETCHANGE by
REV
OF
7021