Document Part # S13K-1055-20Publication Number 1550
Hitachi Global Storage Technologies
1st Edition (Revision 0.1) Sxxx-xxxx-01 (1 December 2002) Preliminary
2nd Edition (Revision 0.2) Sxxx-xxxx-01 (27 Feburary 2003) Preliminary
3rd Edition (Revision 0.3) S13K-1055-03(7 March 2003) Preliminary
4th Edition (Revision 0.4) S13K-1055-04(7 March 2003) Preliminary
5th Edition (Revision 0.5) S13K-1055-05(7 March 2003) Preliminary
6th Edition (Revision 1.0) S13K-1055-10(7 March 2003) Revision
7th Edition (Revision 1.1) S13K-1055-11(13 March 2003) Revision
8th Edition (Revision 1.2) S13K-1055-12(17 June 2003) Revision
9th Edition (Revision 1.3) S13K-1055-13(18 June 2003) Revision
10th Edition (Revision 1.4) S13K-1055-14(26 June 2003) Revision
11th Edition (Revision 1.5) S13K-1055-15(14 July 2003) Revision
12th Edition (Revision 1.6) S13K-1055-16(29 August 2003) Revision
13th Edition (Revision 1.7) S13K-1055-17 (02 September 2003) Revision
14th Edition (Revision 2.0) S13K-1055-20 (19 September 2003) Final
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Table 132: Command coverage (1 of 2) ...............................................................................193
Table 133: Command coverage (2 of 2) ...............................................................................194
Table 134: SET FEATURES command coverage ................................................................195
1.0 General
1.1 Introduction
This document describes the specifications of the following T ravelstar 80GN, a 2.5-inch hard disk drive, ATA/IDE
interface with a rotational speed of 4200 RPM and a height of 9.5 mm:
Part 1 of this document beginning on page 11 defines the hardware functional specification. Part 2 of this document beginning on page 57 defines the interface specification
These specifications are subject to change without notice.
1.2 References
ATA/ATAPI-6 (T13/1410D Revision 3b)
1.3 Abbreviations
Abbreviation Meaning
32 KB32 x 1024 bytes
64 KB64 x 1024 bytes
AAmpere
ACalternating current
ATAdvanced Technology
ATAAdvanced Technology Attachment
BIOSBasic Input/Output System
CCelsius
CSACanadian Standards Association
C-ULCanadian-Underwriters Laborato ry
Cylcylinder
DCDirect Current
DFTDrive Fitness Test
DMADirect Memory Access
ECCerror correction code
EECEuropean Economic Community
EMCelectromagnetic compatibility
ERPError Recovery Procedure
Travelstar 80GN Hard Disk Drive Specification
5
ESDE lectrostatic Discharge
FCCFederal Communications Commission
FRUfield replacement unit
Ggravity (a unit of force)
2
G
/Hz(32 ft/sec)2 per Hertz
Gb1,000,000,000 bits
GB1,000,000,000 bytes
GNDground
hhexadecimal
HDDhard disk drive
HzHertz
IInput
ILSi ntegrated lead suspension
I/OInput/Output
ISOInternational Standards Organization
KB1,000 bytes
Kbpi1000 bits per inch
kgf-cmkilogram (force)-centimeter
KHzkilohertz
LBAlogical block addressing
Lwunit of A-weighted sound power
mmeter
maxmaximum
MB1,000,000 bytes
Mbps1,000,000 bits per second
MHzmegahertz
MLCMachine Level Control
mmmillimeter
msmillisecond
us, msmicrosecond
Nonumber
OOutput
ODOpen Drain Programmed Input/Output
PIOProgrammed Input/Output
POHpower on hours
Poppopulation
P/Npart number
p-ppeak-to-peak
PSDpower spectral density
RESradiated electromagnetic susceptibility
RFIradio frequency interference
RHrelative humidity
% RHper cent relative humidity
Travelstar 80GN Hard Disk Drive Specification
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RMSroot mea n sq uare
RPMrevolut ions per minute
RSTreset
R/Wread/write
secsecond
SELVsecondary low voltage
S.M.A.R.TSelf-Monitoring, Analysis, and Reporting Technology
TPItracks per inch
Trktrack
TTLtransistor-transistor logic
ULUnderwriters Laboratory
Vvolt
VDEVerband Deutscher Electrotechniker
Wwatt
3-statetransistor-transistor tristate logic
1.4 Caution
•Do not apply force to the top cover (See figure below).
•Do not cover the breathing hole on the top cover (See figure below).
•Do not touch the interface connector pins or the surface of the printed circuit board
•This drive can be damaged by electrostatic discharge (ESD). Any damages incurred to the drive after its
removal from the shipping package and the ESD protective bag are the responsibility of the user.
•AT Interface (Enhanced IDE) conforming to ATA/ATAPI-6
•Integrated controller
•No-ID recording format
•Coding : 96/102 MTR
•Multi zone recording
•Enhanced ECC On-The-Fly
•52 bytes 4 way Interleaved Reed Solomon Code
•5 bytes per interleave On-The-Fly correction
•Segmented Buffer with write cache
8192 KB - Upper 308 KB is used for firmware (80/60GB models)
2048 KB - Upper 308 KB is used for firmware (40/30/20GB models)
Bytes per sector512512512512512
Sectors per track392-952392-952392-952392-952392-952
Number of heads43221
Number of disks22111
Logical layout
Number of heads1616161616
Number of Sectors/track6363636363
Number of Cylinders16,38316,38316,38316,38316,383
Number of sectors156,301,488117,210,24078,140,16058,605,12039,070,080
Total logical data bytes 80,026,361,856 60,011,642,880 40,007,761,920 30,005,821,440 20,003,880,960
4.2 Data sheet
Table 2: Data sheet
Rotational Speed [RPM]4200
Data transfer rates (buffer to/from media) (Mbps)350
Data transfer rates (Mbytes/sec) ULTRA DMA 100100
Recording density (Kbit/mm) (Max) 28
(KBPI) (Max. Typ)712
Track density (Ktrack/mm) (Typ.)3.78
(Ktpi) (Typ)96
Areal density (Kbit/sq-mm - Max)106
(Gbit/sq-inch - Max)70
Number of zones16
Travelstar 80GN Hard Disk Drive Specification
15
4.3 Cylinder allocation
The table shows typical data format (96K TPI / 712K BPI). Each drive is formatted in the factory test by optimizing TPI/BPI combination. Contact Hitachi technical support for detail.
Table 3: Cylinder allocation
96 kTPI / 712 kBPI format
ZonePhysical cylindersSectors/Track
Data Zone 00 - 4,359868
Data Zone 14,360 - 9,591840
Data Zone 29,592 - 13,951 812
Data Zone 313,952 - 19,183777
Data Zone 419,184 - 23,775735
Data Zone 523,980 - 28,775700
Data Zone 628,776 - 33,135672
Data Zone 733,136 - 37,059630
Data Zone 837,060 - 39,675609
Data Zone 939,676 - 43,163588
Data Zone 1043,164 - 48,395546
Data Zone 1148,396 - 51,011525
Data Zone 1251,012 - 53,627504
Data Zone 1353,628 - 54,935483
Data Zone 1454,936 - 57,551462
Data Zone 1557,552 - 58,859448
Travelstar 80GN Hard Disk Drive Specification
16
4.4 Performance characteristics
Drive performance is characterized by the following parameters:
• Command overhead
• Mechanical head positioning
- Seek time
- Latency
• Data transfer speed
• Buffering operation (read ahead/write cache)
Note: All the above parameters contribute to drive performance. There are other parameters that contribute to the
performance of the actual system. This specification tries to define the bare drive characteristics, not system
throughput, which depends on the system and the application.
The following table gives a typical value for each parameter. The detailed descriptions are found in Section 5.0,
“Data integrity” beginning on page 21.
Table 4: Performance characteristics
Function
Average random seek time - read (ms)12
Average random seek time - write (ms)14
Rotational speed (RPM)4200
Power-on-to-ready (sec)3.0
Command overhead (ms)1.0
Disk-buffer data transfer (Mb/s)350
Buffer-host data transfer (Mb/s)100
4.4.1 Command overhead
Command overhead time is defined as the interval from the time that a drive receives a command to the time that
the actuator starts its motion
4.4.2 Mechanical positioning
4.4.2.1 Average seek time (including settling)
Table 5: Mechanical positioning performance
Command typeTypical (ms)Max (ms)
Read1216
Write1417
Travelstar 80GN Hard Disk Drive Specification
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“Typical” and “Max” are used throughout this document and are defined as follows:
Typical Average of the drive population tested at nominal environmental and voltage conditions.
MaxMaximum value measured on any one drive over the full range of the environmental and voltage
conditions. (See Section 6.1, “Environment” on page 25 and Section 6.2, “DC power requirements” on page 27 for ranges.)
The seek time is measured from the start of the actuator’s motion to the start of a reliable read or write operation. A
reliable read or write implies that error correction or recovery is not used to correct arrival problems. The average
seek time is measured as the weighted average of all possible seek combinations.
max
Σ (m10 n)(Tnin + Tnout)
n=1
Weighted Average = ––––––––––––––––––––––––––––
(max + 1)(max)
where
max= Maximum seek length
n= Seek length (1 to max)
Tnin= Inward measured seek time for an n track seek
Tnout= Outward measured seek time for an n track seek
4.4.2.2 Full stroke seek time
Table 6: Full stroke seek time
Command typeTypical (ms)Max (ms)
Read23.030.0
Write24.031.0
Full stroke seek is measured as the average of 1,000 full stroke seeks.
4.4.2.3 Single track seek time (without command overhead, including settling)
Table 7: Single track seek time
Command typeTypical (ms)Max (ms)
Read2.54.0
Write3.04.5
Single track seek is measured as the average of one (1) single track seek from every track in both directions
(inward and outward).
Travelstar 80GN Hard Disk Drive Specification
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4.4.2.4 Average latency
Table 8: Average latency
Rotational speed
(RPM)
Time for one
revolution (ms)
Average latency
420014.37.1
4.4.2.5 Drive ready time
Table 9: Drive ready time
Drive ready time (sec)
Condition
TypicalMax
Power on to Ready3.09.5
Ready
Power on to Ready
The condition in which the drive is able to perform a media access command (for example- read, write) immediately.
This includes the time required for the internal self diagnostics.
4.4.3 Operating modes
4.4.3.1 Description of operating modes
(ms)
Table 10: Description of operating modes
Operating modeDescription
Spin-up
Seek
Write
Read
Start up time period from spindle stop or power down.
Seek operation mode
Write operation mode
Read operation mode
The device is capable of responding immediately to idle media access requests. All
Performance Idle
electronic components remain powered and the full frequency servo remains operational.
The device is capable of responding immediately to media access requests. Some circuitry—including servo system and R/W electronics—is in power saving mode. The
Active idle
head is parked near the mid-diameter the disk without servoing. A device in Active
idle mode may take longer to complete the execution of a command because it must
activate that circuitry.
Low power idle
The head is unloaded onto the ramp position. The spindle motor is rotating at full
speed.
Travelstar 80GN Hard Disk Drive Specification
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Table 10: Description of operating modes
Operating modeDescription
The device interface is capable of accepting commands. The spindle motor is stopped.
Standby
All circuitry but the host interface is in power saving mode. The spindle motor is
stopped. All circuitry but the host interface is in power saving mode.
Sleep
The device requires a soft reset or a hard reset to be activated. All electronics, including spindle motor and host interface, are shut off.
4.4.3.2 Mode transition time - from Standby to Idle
Table 11: Drive ready time
FromTo
Transition Time
(typical)
StandbyIdle2.0 (80,60GB)
Transition Time
(max.)
9.5
1.8(40,30,20GB)
4.4.3.3 Operating mode at power on
The device goes into Idle mode after power on or hard reset as an initial state. Initial state may be changed to
Standby mode using pin C on the interface connector. Refer to section 7.10, “Drive address setting” on page 55 for
details.
4.4.3.4 Adaptive power save control
The transient timing from Performance Idle mode to Active Idle mode and Active Idle mode to Low Power Idle
mode is controlled adaptively according to the access pattern of the host system. The transient timing from Low
Power Idle mode to Standby mode is also controlled adaptively, if it is allowed by Set Features Enable Adavanced
Power Management subcommand.
Travelstar 80GN Hard Disk Drive Specification
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5.0 Data integrity
5.1 Data loss at power off
Data loss will not be caused by a power off during any operation except the write operation.
A power off during a write operation causes the loss of any received or resident data that has not been writ-
ten onto the disk media.
A power off during a write operation might make a maximum of one sector of data unreadable. This state
can be recovered by a rewrite operation.
5.2 Write Cache
When the write cache is enabled, the write command may complete before the actual disk write operation
finishes. This means that a power off, even after the write command completion, could cause the loss of
data that the drive has received but not yet written onto the disk.
In order to prevent this data loss, confirm the completion of the actual write operation prior to the power
off by issuing a
•Soft reset
•Hard reset
•Flush Cache command
•Standby command
•Standby Immediate command
•Sleep command
Confirm the command's completion.
5.3 Equipment status
The equipment status is available to the host system whenever the drive is not ready to read, write, or seek.
This status normally exists at power-on time and will be maintained until the following conditions are satisfied:
•Access recalibration/tuning is complete
•Spindle speed meets requirements for reliable operations
•Self-check of drive is complete
Appropriate error status is made available to the host system if any of the following conditions occur after
the drive has become ready:
•Spindle speed lies outside the requirements for reliable operation
•The occurrence of a Write Fault condition
Travelstar 80GN Hard Disk Drive Specification
21
5.4 WRITE safety
The drive ensures that the data is written into the disk media properly. The following conditions are monitored during a write operation. When one of these conditions exceeds the criteria, the write operation is terminated and the automatic retry sequence is invoked.
•Head off track
•External shock
•Low supply voltage
•Spindle speed out of tolerance
•Head open/short
5.5 Data buffer test
The data buffer is tested at power on reset and when a drive self-test is requested by the host. The test consists of a write/read '00'x and 'ff'x pattern on all buffers.
5.6 Error recovery
Errors occurring on the drive are handled by the error recovery procedure.
Errors that are uncorrectable after application of the error recovery procedures are reported to the host sys-
tem as non-recoverable errors.
5.7 Automatic reallocation
The sectors that show some errors may be reallocated automatically when specific conditions are met. The
drive does not report any auto reallocation to the host system. The conditions for auto reallocation are
described below.
5.7.1 Nonrecovered write errors
When a write operation cannot be completed after the Error Recovery Procedure (ERP) is fully carried out,
the sectors are reallocated to the spare location. An error is reported to the host system only when the write
cache is disabled and the auto reallocation has failed.
5.7.2 Nonrecoverable read error
When a read operation fails after ERP is fully carried out, a hard error is reported to the host system. This
location is registered internally as a candidate for the reallocation. When a registered location is specified
as a target of a write operation, a sequence of media verification is performed automatically. When the
result of this verification meets the required criteria, this sector is reallocated.
5.7.3 Recovered read errors
When a read operation for a sector fails and is recovered at the specific ERP step, the sector is reallocated
automatically . A media verification sequence may be run prior to the reallocation according to the predefined conditions.
Travelstar 80GN Hard Disk Drive Specification
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5.8 ECC
The 52 byte four way interleaved ECC processor provides user data verification and correction capability.
The first 4 bytes of ECC are check bytes for user data and the other 48 by tes are Read Solomon ECC. Each
interleave has 12 bytes for ECC. Hardware logic corrects up to 20 bytes (5 bytes for each interleave) errors
on-the-fly.
Following are some examples of error cases. An "O" means that the byte contains no error. An "X" means
that at least one bit of the byte is bad.
Table 12: Examples of error cases.
On The Fly Correctable
Byte #01234567891011121314151617181920212223Error byte# for each interleave
InterleaveABCDABCDABC DA B C DA B C D A B C DABCD
Error patternxxxxxxxxxxx x x x x x x x x x 0 0 0 05555
Error patternxxxxxxxxxxx x 0 0 0 0 x x x x x x x x5555
Uncorrectable
Byte #01234567891011121314151617181920212223Error byte# for each interleave
InterleaveABCDABCDABC DA B C DA B C D A B C DABCD
Error patternxxxxxxxxxxx x x x x x x x x x x 0 0 06555
Error patternx000x000x00 0 x 0 0 0 x 0 0 0 x 0 0 06000
Travelstar 80GN Hard Disk Drive Specification
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Travelstar 80GN Hard Disk Drive Specification
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6.0 Specification
6.1 Environment
6.1.1 Temperature and humidity
Table 13: Environmental condition
Operating conditions
Temperature5 to 55ºC (See note below)
Relative humidity8 to 90%, non-condensing
Maximum wet bulb temperature29.4ºC, non-condensing
Maximum temperature gradient20ºC/hour
Altitude–300 to 3,048 m (10,000 ft)
Non-operating conditions
Temperature–40 to 65ºC
Relative humidity5 to 95%, non-condensing
Maximum wet bulb temperature40ºC, non-condensing
Maximum temperature gradient20ºC/hour
Altitude–300 to 12,192 m (40,000 ft)
Notes:
The system is responsible for supplying sufficient ventilation to maintain a surface temperature below 60ºC at the
center of the top cover of the drive and below 63°C at the center of the drive circuit board assembly.
The maximum storage period in the shipping package is one year.
Travelstar 80GN Hard Disk Drive Specification
25
100
90
80
70
60
50
40
Specification (Environment)
Non Operating
31'C/90%
Operating
41'C/95%
WetBulb 40'C
WetBulb29.4'C
Relative Humidity (%)
30
20
55'C/15%
65'C/23%
10
0
-45-35-25-15-5 5 152535455565
Temperatur e (degC)
Figure 1: Limits of temperature and humidity
6.1.1.1 Corrosion test
The drive must be functional and show no signs of corrosion after being exposed to a temperature humidity stress
of 50°C/90% RH (relative humidity) for one week followed by a temperature and humidity drop to 25°C/40%RH
in 2 hours.
6.1.2 Radiation noise
The drive shall work without degradation of the soft error rate under the following magnetic flux density limits at
the enclosure surface.
Table 14: Magnetic flux density limits
Frequency (KHz)Limits (uT RMS)
0–60500
Travelstar 80GN Hard Disk Drive Specification
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Table 14: Magnetic flux density limits
Frequency (KHz)Limits (uT RMS)
61–100250
101–200100
201–400 50
6.1.3 Conductive noise
The disk drive shall work without soft error degradation in the frequency range from DC to 20 Mhz injected
through any two of the mounting screw holes of the drive when an AC current of up to 45 mA (p-p) is applied
through a 50-ohm resistor connected to any two mounting screw holes.
6.1.4 Magnetic fields
The disk drive will withstand radiation and conductive noise within the limits shown below. The test method is
defined in the Noise Susceptibility Test Method specification, P/N 95F3944.
6.2 DC power requirements
Connection to the product should be made in a safety extra low voltage (SEL V) circuits. The vol tage specifications
are applied at the power connector of the drive.
Table 15: DC power requirements
ItemRequirements
Nominal supply+5Volt DC
Supply voltage–0.3 Volt to 6.0 Volt
Power supply ripple (0–20 MHz)
Tolerance
2
1
100mV p-p max.
±5%
Supply rise time7–100 ms
Watts (RMS typical)80GB, 60GB models
Performance Idle average
3
1.851.85
40GB, 30GB 20GB
models
Active Idle average0.950.85
Low Power Idle average0.650.65
Read average
The maximum fixed disk ripple is measured at the 5 volt input of the drive.
2
The disk drive shall not incur damage for an over voltage condition of +25% (maximum duration of
20 ms) on the 5 volt nominal supply.
3
The idle current is specified at an inner track.
4
The read/write current is specified based on three operations of 63 sector read/write per 100 ms.
5
The seek average current is specified based on three operations per 100 ms.
6
The worst case operating current includes motor surge.
6.2.1 Power consumption efficiency
Table 16: Power consumption efficiency
Capacity
80GB0.008
60GB0.011
40GB0.016
30GB0.022
20GB0.033
Power Consumption
Efficiency (Watts/GB)
Note: Power consumption efficiency is calculated as Power Consumption of Low Power Idle in Watts/Capacity
(GB).
6.3 Reliability
6.3.1 Data Reliability
• Probability of not recovering data is 1 in 1013 bits read
•ECC implementation
On-the-fly correction performed as a part of read channel function recovers up to 20 symbols of error in one sector
(1 symbol is 8 bits).
6.3.2 Failure prediction (S.M.A.R.T.)
The drive supports Self-monitoring, analysis and reporting technology (S.M.A.R.T.) function. The details are
described in Section 11.8, “S.M.A.R.T. Function” on page 77 and Section 13.38, “S.M.A.R.T. Function Set (B0h)”
on page 161.
6.3.3 Cable noise interference
T o avoid any degradation of performance thr oughput or erro r when the interface cable is routed on top or comes in
Travelstar 80GN Hard Disk Drive Specification
28
common mode noise or voltage level difference between the system frame and power cable ground or A T int erface
cable ground should be in the allowable level specified in the power requirement section.
6.3.4 Service life and usage condition
The drive is designed to be used under the following conditions:
•The drive should be operated within specifications of shock, vibration, temperature, humidity , altitude, and
magnetic field.
•The drive should be protected from ESD.
•The breathing hole in the top cover of the drive should not be covered.
•Force should not be applied to the cover of the drive.
•The specified power requirements of the drive should be satisfied.
•The drive frame should be grounded electrically to the system through four screws.
•The drive should be mounted with the recommended screw de pth and torque.
•The interface physical and electrical requirements of the drive should satisfy ATA-6.
•The power-off sequence of the drive should comply with the required power off sequence described in Section 6.3.6.2, “Required Power-Off Sequence” on page 30.
Service life of the drive is approximately 5 years or 20,000 power on hours, which comes first, under the following
assumptions:
•Less than 333 power on hours per month.
•Seeking/Writing/Reading operation is less than 20% of power on hours.
This does not represent any warranty or warranty period. App l icable warranty and warranty period are covered by
the purchase agreement.
6.3.5 Preventive maintenance
None
6.3.6 Load/unload
The product supports a minimum of 300,000 normal load/unloads.
Load/unload is a functional mechanism of the hard disk drive. It is controlled by the drive micro code. Specifically,
unloading of the heads is invoked by the following commands:
•Hard reset
•Standby
•Standby immediate
•Sleep
Load/unload is also invoked as one of the idle modes of the drive.
The specified start/stop life of the product assumes that load/unload is operated normally, not in emergency mode.
6.3.6.1 Emergency unload
When hard disk drive power is interrupted while the heads are still loaded the micro code cannot operate and the
normal 5-volt power is unavailable to unload the heads. In this case, normal unload is not possible. The heads are
Travelstar 80GN Hard Disk Drive Specification
29
unloaded by routing the back EMF of the spinning motor to the voice coil. The actuator velocity is greater than the
normal case and the unload process is inherently less controllable without a normal seek current profile.
Emergency unload is intended to be invoked in rare situations. Because this operation is inherently uncontrolled, it
is more mechanically stressful than a normal unload.
The drive supports a minimum of 20,000 emergency unloads.
6.3.6.2 Required Power-Off Sequence
The required BIOS sequence for removing power from the drive is as follows:
Step 1: Issue one of the following command:
•Standby
•Standby immediate
•Sleep
Note: Do not use the Flush Cache command for the power off sequence because this command does not invoke
Unload.
Step 2: Wait until the Command Complete status is returned
In a typical case 350 ms are required for the command to finish completion; however, the BIOS time out value
needs to be 30 seconds considering error recovery time. Refer to Section 14.0, “Time-out values” on page 193.
Step 3: Terminate power to the drive
This power-down sequence should be followed for entry into any system power-down state, system suspend state,
or system hibernation state. In a robustly designed system, emergency unload is limited to rare scenarios, such as
battery removal during operation.
6.3.6.3 Power Switch design considerations
In systems that use this drive consideration should be given to the design of the system power switch.
Hitachi recommends that the switch operate under control of the BIOS rather than be hardwired. The same recom-
mendation is made for cover-close switches. When a hardwired switch is turned off, emergency unload occurs, as
well as the problems cited in Section 5.1, “Data loss at power off” on page 21 and Section 5.2, “Write Cache” on
page 21.
6.3.6.4 Test considerations
Start/stop testing is classically performed to verify head/disk durability. The heads do not land on the disk, therefore this type of test should be viewed as a test of the load/unload function.
Start/Stop testing should be done by commands through the interface, not by power cycling the drive. Simple
power cycling of the drive invokes the emergency unload mechanism and subjects the HDD to nontypical mechanical stress.
Power cycling testing may be required to test the boot-up function of the system. In this case Hitachi recommends
that the power-off portion of the cycle contain the sequence specified in Section 6.3.6.2, “Required Power-Off
Sequence” on page 30. If this is not done, the emergency unload function is invoked and nontypical stress results.
Travelstar 80GN Hard Disk Drive Specification
30
6.4 Mechanical specifications
6.4.1 Physical dimensions and weight
The following table lists the dimensions of the drive.
The mounting hole locations and size of the drive are shown below.
Figure 2: Mounting hole locations
6.4.3 Connector and jumper description
A jumper is used to designate the drive address as either master or slave. The jumper setting method is described in
Section 7.10, “Drive address setting” on page 55.
Connector specifications are included in Section 7.2, “Interface connector” on page 39.
Travelstar 80GN Hard Disk Drive Specification
32
6.4.4 Mounting orientation
The drive will operate in all axes (six directions) and will stay within the specified error rates when tilted ±5degrees
from these positions.
Performance and error rate will stay within specification limits if the drive is operated in the other permissible orientations from which it was formatted. Thus a drive formatted in a horizontal orientation will be able to run vertically and vice versa.
The recommended mounting screw torque is 3.0±0.5 kgf-cm.
The recommended mounting screw depth is 3.0±0.3 mm for bottom and 3.5±0.5 mm for horizontal mounting.
The user is responsible for using the appropriate screws or equivalent mounting hardware to mount the drive
securely enough to prevent excessive motion or vibration of the drive at seek operation or spindle rotation.
6.4.5 Load/unload mechanism
The head load/unload mechanism is provided to protect the disk data during shipping, movement, or storage. Upon
power down, a head unload mechanism secures the heads at the unload position. See Section 6.5.4, “Nonoperating
shock” on page 35 for additional details.
6.5 Vibration and shock
All vibration and shock measurements in this section are for drives without mounting attachments for systems. The
input level shall be applied to the normal drive mounting points.Vibration tests and shock tests are to be conducted
by mounting the drive to a table using the bottom four mounting holes.
6.5.1 Operating vibration
The drive will operate without a hard error while being subjected to the following vibration levels.
6.5.1.1 Random vibration
The test consists of 30 minutes of random vibration using the power spectral density (PSD) levels below. The
2
vibration test level is 6.57 m/sec
Table 18: Random vibration PSD profile breakpoints (operating)
Random vibration PSD profile breakpoint
Hz(m 2/sec 4)/Hz
51.9 x 10-3
171.1 x 10-1
451.1 x 10-1
487.7 x 10-1
627.7 x 10-1
659.6 x 10-2
1509.6 x 10-2
2004.8x 10-2
5004.8 x 10-2
RMS (Root Mean Square) (0.67 G RMS).
Travelstar 80GN Hard Disk Drive Specification
33
6.5.1.2 Swept sine vibration
Table 19: Swept sine vibration
Swept sine vibration
(zero to peak 5 to 500 to 5 Hz
sine wave)
Sweep rate (oct/min)
9.8 m/sec
2
(1 G) (5-500 Hz)
2.0
6.5.2 Nonoperating vibration
The disk drive withstands the vibration levels described below without any loss or permanent damage.
6.5.2.1 Random vibration
The test consists of a random vibration applied in each of three mutually perpendicular axes for a duration of
15 minutes per axis. The PSD levels for the test simulating the shipping and relocation environment is shown
below.
Table 20: Random Vibration PSD Profile Breakpoints (nonoperating)
Hz(m2/sec4)/Hz
2.50.096
52.88
401.73
5001.73
Note: Overall RMS (root mean square) level of vibration is 3.01 G rms.
6.5.2.2 Swept sine vibration
•49 m/sec2 (5 G) (zero-to-peak), 5 to 500 to 10 Hz sine wave
•0.5 oct/min sweep rate
•25.4 mm (peak-to-peak) displacement, 5 to 10 to 5 Hz
6.5.3 Operating shock
The hard disk drive meets the criteria in the table below while operating under these conditions:
•The shock test consists of 10 shock inputs in each axis and direction for a total of 60.
•There must be a minimum delay of 3 seconds between shock pulses.
•The disk drive will operate without a hard error while subjected to the following half-sine shock pulse
Table 21: Operating shock
Duration of 2 msDuration of 11 ms
2
1960 m/sec
(200 G)147 m/sec2 (15 G)
Travelstar 80GN Hard Disk Drive Specification
34
The input level shall be applied to the normal disk drive subsystem mounting points used to secure the drive in a
normal system.
6.5.4 Nonoperating shock
The drive withstands the following half-sine shock pulse without any data loss or permanent damage.
Table 22: Nonoperating shock
Duration of 1 msDuration of 11 ms
7840 m/sec2 (800 G)1176 m/sec2 (120 G)
The shocks are applied for each direction of the drive for three mutually perpendicular axes, one axis at a time.
Input levels are measured on a base plate where the drive is attached with four screws
6.6 Acoustics
6.6.1 Sound power levels
The criteria of A-weighted sound power level are described below.
Measurements are to be taken in accordance with ISO 7779. The mean of the sample of 40 drives is to be less than
the typical value. Each drive is to be less than the maximum value. The drives are to meet this requirement in both
board down orientations.
Table 23: Weighted sound power
A-weighted sound power
Typical (Bels)Maximum (Bels)
40GB, 30GB, 20GB
models
80GB, 60GB models
The background power levels of the acoustic test chamber for each octave band are to be recorded.
Sound power tests are to be conducted with the drive supported by spacers so that the lower surface of the drive be
located 25±3 mm above from the chamber floor. No sound absorbing material shall be used.
The acoustical characteristics of the disk drive are measured under the following conditions:
• Idle mode: Power on, disks spinning, track following, unit ready to receive and respond to control line com-
mands.
• Operating mode: Continuous random cylinder selection and seek operation of the actuator with a dwell
time at each cylinder. The seek rate for the drive is calculated with the following formula:
Ns= 0.4/(Tt + T1)
where:
Ns = average seek rate in seeks/s
Travelstar 80GN Hard Disk Drive Specification
35
Tt = published seek time from one random track to another without including rotational latency
T1= equivalent time in seconds for the drive to rotate by half a revolution
6.6.2 Discrete tone penalty
Discrete tone penalties are added to the A-weighted sound power (Lw) with the following formula only when
determining compliance.
Lwt(spec) = Lw = 0.1Pt + 0.3 < 4.0 (Bels)
where
Lw = A-weighted sound power level
Pt = Value of desecrate tone penalty = dLt – 6.0(dBA)
dLt = Tone-to-noise ratio taken in accordance with ISO 7779 at each octave band
6.7 Identification labels
The following labels are affixed to every drive:
• A label which is placed on the top of the head disk assembly containing the statement "Made by Hitachi" or
equivalent, part number, EC number, and FRU number.
• A bar code label which is placed on the disk drive based on user request. The location on the disk drive is to
be designated in the drawing provided by the user.
• Labels containing the vendor's name, disk drive model number, serial number , place of manufacture, and UL/
CSA logos.
• Labels containing jumper information if required by the customer.
6.8 Electromagnetic compatibility
When installed in a suitable enclosure and exercised with a random accessing routine at maximum data rate meets
the worldwide EMC requirements listed below:
• United States Federal Communications Commission (FCC) Rules and Regulations (Class B), Part 15
• RFI Japan VCCI, Requirements of IBM products
• EU EMC Directive, Technical Requirements and Conformity Assessment Procedures
6.8.1 CE mark
The product is certified for compliance with EC directive 89/336/EEC. The EC marking for the certification
appears on the drive.
6.8.2 C-TICK mark
The drive complies with the Australian EMC standard "Limits and methods of measurement of radio disturbance
characteristics of information technology equipment, AS/NZS 3548:1995 Class B."
6.8.3 BSMI mark
The product complies with the Taiwan EMC standard"Limits and methods of measurement of radio disturbance
characteristics of information technology equipment, CNS 13438 Class B."
Travelstar 80GN Hard Disk Drive Specification
36
6.8.4 MIC mark
The product complies with the Korea EMC standard. The regulation for certification of information and communication equipment is based on "Telecommunications Basic Act" and "Radio Waves Act." Korea EMC requirment
are based technically on CISPR22:1993-12 measurement standards and limits. MIC standards are likewise based
on IEC standards.
6.9 Safety
The following shows the safety standards for different countries.
6.9.1 UL and CSA approval
The product is qualified per UL (Underwriters Laboratory) 1950 Third Edition and CAN/CSA C22.2 No.950-M95
Third Edition, for use in Information Technology Equipment, including Electric Business Equipment. The UL Recognition or the CSA certification is maintained for the product life. The UL and C-UL recognition mark or the CSA
monogram for CSA certification appears on the drive.
6.9.2 IEC compliance
All models of the Travelstar 80GN comply with IEC 950:1991 +A1-4.
6.9.3 German safety mark
All models of the Travelstar 80GN are approved by TUV on Test Requirement: EN 60950:1992+A1-4, but the GS
mark has not been obtained.
6.9.4 Flammability
The printed circuit boards used in this drive are made of material with a UL recognized flammability rating of V-1
or better. The flammability rating is marked or etched on the board. All other parts not considered electrical components are made of material with a UL recognized flammability rating of V-1 or better. However, small mechanical
parts such as cable ties, washers, screws, and PC board mounts may be made of material with a UL recognized
flammability rating of V-2.
6.9.5 Secondary circuit protection
This product utilizes printed circuit wiring that must be protected against the possibility of sustained combustion
due to circuit or component failures as defined in C-B 2-4700-034 (Protection Against Combustion). Adequate secondary over current protection is the responsibility of the using system.
The user must protect the drive from its electrical short circuit problem. A 10 amp limit is required for safety purposes.
6.10 Packaging
Drives are packed in ESD protective bags and shipped in appropriate containers.
Travelstar 80GN Hard Disk Drive Specification
37
Travelstar 80GN Hard Disk Drive Specification
38
7.0 Electrical interface specification
7.1 Cabling
The maximum cable length from the host system to the hard disk drive plus circuit pattern length in the host system
shall not exceed 18 inches.
7.2 Interface connector
The signal connector for AT attachment is designed to mate with Dupont part number 69764-044 or equivalent.
The figure below and Figure 2: “Mounting hole locations” on page 32 show the connector and pin location.
Pin
43
44
19
22
Pin
1
AC
D
2
B
Figure 1: Interface connector pin assignments
Pin position 20 is left blank for correct connector insertion.
Pin positions A, B, C, and D are used for the drive address setting. (Refer to Figure 3: “Drive address setting” on
page 55 for correct address setting.)
Travelstar 80GN Hard Disk Drive Specification
39
7.3 Signal definitions
The pin assignments of interface signals are listed as follows:Signal definitions
Odesignates an output from the drive
Idesignates an input to the drive
I/Odesignates an input/output common
ODdesignates an Open-Drain output
powerdesignates a power supply to the drive
reserveddesignates reserved pins which must be left unconnected
The signal lines marked with (*) are redefined during the Ultra DMA protocol to provide special functions. These
lines change from the conventional to special definitions at the moment the host decides to allow a DMA burst, if
the Ultra DMA transfer mode was previously chosen via SetFea tures. The drive becomes aware of this change
upon assertion of the DMACK line. These lines revert back to their original definitions upon the deassertion of
DMACK- at the termination of the DMA burst.
Travelstar 80GN Hard Disk Drive Specification
40
Tabl e 25: Special signal definitions for Ultra DMA
Special Definition
(for Ultra DMA)
Conventional
Definition
DDMARDY-IORDY
Write Operation
HSTROBEDIORSTOPDIOWHDMARDY-DIOR-
Read Operation
DSTROBEIORDY
STOPDIOW-
7.4 Signal descriptions
DD00–DD15
A 16-bit bi-directional data bus between the host and the drive. The lower 8 lines, DD00-07, are used for Register and ECC access. All 16 lines, DD00–15, are used for data transfer. These are 3-state lines with 16mA current
sink capability.
DA00–DA02
These are addresses used to select the individual register in the drive.
CS0-
The chip select signal generated from the Host address bus. When active, one of the Command Block Registers
[Data, Error (Features when written), Sector Count, Sector Number, Cylinder Low , Cylinder High, Drive/Head
and Status (Command when written) register] can be selected.
CS1-
The chip select signal generated from the Host address bus. When active, one of the Control Block Registers
[Alternate Status (Device Control when written) and Drive Address register] can be selected.
RESET-
This line is used to reset the drive. It shall be kept at a Low logic state during power up and kept High thereafter.
DIOW-
The rising edge of this signal holds data from the data bus to a register or data register of the drive.
DIOR-
When this signal is low , it enables data from a register or data register of the drive onto the data bus. The data on
the bus shall be latched on the rising edge of DIOR-
INTRQ
The interrupt is enabled only when the drive is selected and the host activates the IEN- bit in the Device Control
Register. Otherwise, this signal is in high impedance state regardless of the state of the IRQ bit. The interrupt is
set when the IRQ bit is set by the drive CPU. The IRQ is reset to zero by a host read of the status register or a
write to the Command Register. This signal is a 3-state line with 16mA of sink capability.
Travelstar 80GN Hard Disk Drive Specification
41
DASP-
This is a time-multiplexed signal which indicates that a drive is active or that device 1 is present. This signal is
driven by an Open-Drain driver and internally pulled up to 5.0 volts through a 10 k. resistor. During a PowerOn initialization or after RESET- is negated, DASP- shall be asserted by device 1 within 400 ms to indicate
that device 1 is present. Device 0 shall allow up to 450 ms for device 1 to assert DASP-. If device 1 is not
present, device 0 may assert DASP- to drive an LED indicator on a host. The DASP- signal shall be negated following acceptance of the first valid command by device 1. Anytime after negation of DASP-, either drive may
assert DASP- to indicate that a drive is active.
Caution
The host doesshall not drive DASP-. If the host connects to DASP- for any purpose, the host shall ensure that
the signal level detected on the interface for DASP- shall maintain VoH and Vo L compatibility, given the IoH
and IoL requirements of the DASP- device drivers.
Caution
When DASP- is negated, the line is in a high impedance state. The signal level may look less than 5.0V even
though the line is pulled up to 5.0V through a resistor."
PDIAG-
This signal shall be asserted by device 1 to indicate to device 0 that it has completed the diagnostics. This line is
pulled up to 3.3 volts in the drive through a 10 kW resistor.
Following a Power On Reset, software reset, or RESET-, drive 1 shall negate PDIAG- within 1 ms (to indicate
to device 0 that it is busy). Drive 1 shall then assert PDIAG- within 30 seconds to indicate that it is no longer
busy and is able to provide status.
Following the receipt of a valid Execute Drive Diagnostics command, device 1 shall negate PDIAG- within 1
ms to indicate to device 0 that it is busy and has not yet passed its drive diagnostics. If device 1 is present then
device 0 shall wait up to 6 seconds from the receipt of a valid Execute Drive Diagnostics command for drive 1
to assert PDIAG-. Device 1 should clear BSY before asserting PDIAG-, as PDIAG- is used to indicate that
device 1 has passed its diagnostics and is ready to post status. If DASP- was not asserted by device 1 during
reset initialization, device 0 shall post its own status immediately after it completes diagnostics and clears the
device 1 Status register to 00h. Device 0 may be unable to accept commands until it has finished its reset procedure and is ready (DRDY=1).
CSEL (Cable Select)
This signal is monitored to determine the drive address (master or slave) when the jumper on the interface connector is at Position-3.
When CSEL is at ground or is at a low level, the drive works as a Master . If CSEL is open or is at a logical high
level, the drive works as a Slave.
The signal level of CSEL to one drive should be different from the signal level to another drive on the same AT
interface cable to avoid master-master or slave-slave configurations.
KEY
Pin position 20 has no connection pin. It is recommended to close the respective position of the cable connector
in order to avoid incorrect insertion.
IORDY
This signal is an indication to the host that the drive is ready to complete the current I/O cycle. This line is
driven low at the falling edge of DIOR- or DIOW- when the drive needs some additional WAIT cycle(s) to
Travelstar 80GN Hard Disk Drive Specification
42
extend the PIO cycle. This line can be connected to the host IORDY signal in order to insert a WAIT state(s)
into the host PIO cycle. This signal is an Open-Drain output with 16mA sink capability.
5V Power
There are two input pins for the +5 V power supply. One is the "+5 V Logic" input pin and the second is the "+5
V Motor" input pin. These two input pins are tied together within the drive.
DMACK-
This signal shall be used by the host in response to DMARQ to either acknowledge that data has been accepted,
or that data is available.
This signal is internally pulled up to 5 Volt through a 15kW resistor with a resistor tolerance value of –50% to
+100%.
DMARQ
This signal is used for DMA data transfers between the host and drive. It shall be asserted by the drive when it
is ready to transfer data to or from the host. The direction of data transfer is controlled by HIOR- and HIOWsignals. This signal is used in a handshake mode with DMACK-. This signal is a 3-state line with 16mA sink
capability and internally pulled down to GND through a 10 kW resistor.
HDMARDY- (Ultra DMA)
This signal is used only for Ultra DMA data transfers between host and drive. The signal HDMARDY- is a flow
control signal for Ultra DMA data in bursts. This signal is held asserted by the host to indicate to the device that
the host is ready to receive Ultra DMA data in transfers. The host may negate HDMARDY- to pause an Ultra
DMA data in transfer.
HSTROBE (Ultra DMA)
This signal is used only for Ultra DMA data transfers between host and drive.
The signal HSTROBE is the data out strobe signal from the host for an Ultra DMA data out transfer. Both the
rising and falling edge of HSTROBE latch the data from DD (15:0) into the device. The host may stop toggling
HSTROBE to pause an Ultra DMA data out transfer.
STOP (Ultra DMA)
This signal is used only for Ultra DMA data transfers between host and drive.
The STOP signal shall be asserted by the host prior to initiation of an Ultra DMA burst. A STOP shall be
negated by the host before data is transferred in an Ultra DMA burst. Assertion of STOP by the host during or
after data transfer in an Ultra DMA mode signals the termination of the burst.
DDMARDY- (Ultra DMA)
This signal is used only for Ultra DMA data transfers between host and drive.
The signal DDMARDY- is a flow control signal for Ultra DMA data out bursts. This signal is held asserted by
the device to indicate to the host that the device is ready to receive Ultra DMA data ou t transfers. The device
may negate DDMARDY- to pause an Ultra DMA data out transfer.
DSTROBE (Ultra DMA)
This signal is used only for Ultra DMA data transfers between host and drive.
The signal DSTROBE is the data in strobe signal from the device for an Ultra DMA data in transfer. Both the
rising and the falling edge of DSTROBE latch the data from DD (15:0) into the host. The device may stop toggling DSTROBE to pause an Ultra DMA data in transfer.
Travelstar 80GN Hard Disk Drive Specification
43
7.5 Interface logic signal levels
The interface logic signals have the following electrical specifications:
Inputs
Outputs:
Current
7.6 Reset timings
RESET–
Voltage input high (ViH)
Voltage input low (ViL)
Voltage output high at
IoH min (VoH)
Voltage output low at
IoL min (VoL)
Driver Sink Current
(IoL)
Driver Source Current
(IoH)
t10
2.0 V min./5.5 V max.
–0.5 V min./0.8 V max.
2.4 V min.
0.5 V max.
16 mA min.
400 µA min.
BUSY
t1
PARAMETER DESCRIPTIONMin (µs)Max (µs)
t1RESET– high to Not BUSY–9.5
t10RESET– low width25–
Figure 2: System reset timings
Travelstar 80GN Hard Disk Drive Specification
44
7.7 PIO timings
The PIO cycle timings meet Mode 4 of the ATA/ATAPI-6 description.
CS(1:0)DA(2:0)
t1
DIOR-,
DIOW -
t2
Write data
DD(15:0)
Read data
DD(15:0)
t7(*)
t0
t3t4
t5
t6
t9
t2i
t6z
t8(*)
IO RDY
Table 26: PIO cycle timings
t0Cycle time120–
t1Address valid to DIOR-/DIOW- setup25–
t2DIOR-/DIOW- pulse width70–
t2iDIOR-/DIOW- recovery time25–
t3DIOW- data setup20–
t4DIOW- data hold10–
t5DIOR- data setup20–
t6DIOR- data hold5–
t6zDIOR- data tristate–30
t9DIOR-/DIOW- to address valid hold10–
tRDRead data valid to IORDY active0–
tAIORDY setup width–35
tBIORDY pulse width–1,250
tA
tB
PARAMETER DESCRIPTIONMIN (ns)MAX (ns)
Travelstar 80GN Hard Disk Drive Specification
45
7.8 Multi word DMA timings
The Multi word DMA timings meet Mode 2 of the ATA/ATAPI-6 description.
DMARQ
tLR /tLW
DMACK-
DIOR-/DIOW-
READ DD(15:0)
WRI TE D D (15:0)
Table 27: Multiword DMA cycle timings
PARAMETER DESCRIPTIONMIN (ns)MAX (ns)
t0Cycle time120–
tDDIOR-/DIOW- asserted pulse width70–
tEDIO R- data access–50
tFDIOR- data hold5–
tGDIOR-/DIOW- data setup20–
tHDIOW- data hold10–
tIDMACK- to DIOR-/DIOW- setup0–
tJDIOR-/DIOW- to DMACK- hold5–
tKR/tKWDIOR- negated pulse width / DIOW- negated pulse width25–
tLR/tLWDIOR- to DMARQ delay / DIOW- to DMARQ delay–35
tZDMACK- to read data released–25
t0
tI
tD
tKR /tK W
tE
tG
tG
tF
tH
tJ
tZ
Travelstar 80GN Hard Disk Drive Specification
46
7.9 Ultra DMA timings
The Ultra DMA timings meet Mode 0, 1, 2, 3, 4 and 5 of the Ultra DMA Protocol.
tUI Unlimited interlock time0–0–0–0–0–0–
tACKSetup time for DMACK-20–20–20–20–20–20–
tENVEnvelope time207020702070205520552050
tZIORDY Minimum time before driv-
Note: When a host does not satisfy the tSR timing, the host should be ready to receive two more data words after
HDMARDY - is negated.
Travelstar 80GN Hard Disk Drive Specification
48
7.9.3 Host Terminating Read DMA
DMARQ
DMACK-
tRP
STOP
tLI
tMLI
tACK
tACK
HDMARDY-
DSTROBE
DD(15:0)
tRFS
tLItIORDYZ
tCH
xxx
tCS
CRC
tAZ
xxxRD Dataxxxxxxxxxxx
xxxxxxxxxxxxxxxxxx
tZAH
Device drives DD
Host drives DD
Table 30: Ultra DMA cycle timings (Host Terminati ng Read)
PARAMETER
DESCRIPTION
tRFSHDMARDY- to final DSTROBE
time
tRPReady to pause time160–125–100–100–100–85–
tLILimited interlock time01500150015001000100075
tAZMaximum time allowed for output
drivers to release
tZAHMinimum delay time required for
output
tMLIInterlock time with minimum20–20–20–20–20–20–
tCS CRC word setup time at device15–10–7–7–5–4–
tCH CRC word hold time at device 5–5–5–5–5–4.6–
tACKHold time for DMACK-20–20–20–20–20–20–
tIORDYZMaximum time before releasing
negation of DMARQ
tLILimited interlock time01500150015001000100075
tAZMaximum time allowed for output
drivers to release
tZAHMaximum delay time required for
output
tMLIInterlock time with minimum20–20–20–20–20–20–
tCSCRC word setup time at device15–10–7–7–5–4–
tCH CRC word hold time at device 5–5–5–5–5–4.6–
tACKHold time for DMACK-20–20–20–20–20–––
tIORDYZMaximum time before releasing
tUIUnlimited interlock time0–0–0–0–0–0–
tACK Setup time for DMACK-20–20–20–20–20–20–
tENVEnvelope time207020702070205520552055
tZIORDYMinimum time before driving
IORDY
tLILimited interlock time01500150015001000100075
tCYCCycle time1 1 2–73–54–39–25–16.8–
t2CYCTwo cycle time230–154–115–86–57–38–
tDSData setup time at device15–10–7–7–5–4–
tDH Data Hold time at device5–5–5–5–5–4.6–
time
tRPReady to pause time160–125–100–100–100–85–
tLILimited interlock time01500150015001000100075
tMLIInterlocking time with minimum20–20–20–20–20–20–
tCSCRC word setup time at device15–10–7–7–5–4–
tCH CRC word hold time at device 5–5–5–5–5–4.6–
tACKHold time for DMACK-negation20–20–20–20–20–20–
tIORDYZMaximum time before releasing
assertion of STOP
tLILimited interlock time01500150015001000100075
tMLIInterlock time with minimum20–20–20–20–20–20–
tCSCRC word setup time at device15–10–7–7–5–4–
tCH CRC word hold time at device 5–5–5–5–5–4.6–
tACKHold time for DMACK-20–20–20–20–20–20–
tIORDYZMaximum time before releasing
IORDY
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
(ns)
(ns)
(ns)
(ns)
(ns)
(ns)
(ns)
(ns)
(ns)
(ns)
(ns)
(ns)
50–50–50–50–50–50–
–20–20–20–20–20–20
Travelstar 80GN Hard Disk Drive Specification
54
7.10 Drive address setting
A jumper placed on the interface connector determines the drive address. Three drive addresses are shown below.
Two addresses require the setting of a jumper.
31
2
4
12
Figure 3: Drive address setting
3
Setting 1—Device 0 (Master) (no jumper is used)
Setting 2—Device 1 (Slave)
Setting 3—Cable Select
Setting 4—Do not attach a jumper here
Setting 5—Do not attach a jumper here
4
5
The default setting at shipment is Setting 1 (no jumper).
When pin C is grounded, the drive does not spin up at POR.
When the drive address is Cable Select, the address depends on the condition of pin 28 of the AT interface cable. If
pin 28 is ground (or low), the drive is a Master. If pin 28 is open (or logic high), the drive is a Slave.
Travelstar 80GN Hard Disk Drive Specification
55
7.11 Addressing of HDD registers
The host addresses the drive through a set of registers called a Task File. These registers are mapped into the host's
I/O space. T wo chip select lines (CS0- and CS1-) and three address lines (DA00–02) are used to select one of these
registers, while a DIOR- or DIOW- is provided at the specified time.
The chip select line CS0- is used to address the Command Block registers while the CS1- is used to address Control Block registers.
This specification describes the host interface of the Travelstar 80GN.
The interface conforms to the Working Document of Information technology, AT Attachment with Packet Interface
Extension (ATA/ATAPI-6) Revision 2, dated 2 August 2001, with certain limitations described in Section 9.0,
“Deviations from standard” on page 61.
The drive supports the following functions as Vendor Specific Functions:
• Address Offset Feature
• Format Unit Function
• SENSE CONDITION command
8.2 Terminology
DeviceThe Travelstar 80GN drive
HostHost indicates the system that the device is attached to.
First CommandThe first command which is executed after the power on reset (also known as a
hard reset) is the Standby mode command.
INTRQInterrupt request (Device or Host)
Travelstar 80GN Hard Disk Drive Specification
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Travelstar 80GN Hard Disk Drive Specification
60
9.0 Deviations from standard
The device conforms to the referenced specifications, with deviations described below.
The interface conforms to the Working Document of Information Technology, AT Attachment with Packet Interface
Extension (ATA/ATAPI-6) Revision 3, dated 30 October 2001, with the following deviation:
Standby TimerStandby timer is enabled by STANDBY command or IDLE command. The
value in the Sector Count register shall be used to determine the time
programmed into the Standby timer. If the Sector Count register is ze ro, the
Standby timer is automatically set to 109 minutes.
Write VerifyWRITE VERIFY command does not include read verification after write
operation. The function is the same as WRITE SECTORS command.
S.M.A.R.T. Return StatusS.M.A.R.T. RETURN STATUS subcommand does not check advisory
attributes. This means that the device will not report a threshold exceeded
condition unless the prefailure attributes exceed their corresponding
thresholds. For example, a Power-On Hours Attribute never results in a
negative reliability status.
Travelstar 80GN Hard Disk Drive Specification
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September 19, 2003 10:28 am
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10.0 Register
Table 37: Register Set
AddressesFunctions
CS0-CS1-DA2DA1DA0READ (DIOR-)WRITE (DIOW-)
NNxxxData bus high impedenceNot used
Control block registers
NA0xxData bus high impedanceNot used
NA10xData bus high impedanceNot used
NA110Alternate StatusDevice Control
NA111Device AddressNot used
Communication to or from the device is through an I/O Register that routes the input or output data to or from the
registers addressed by the signals from the host (CS0-, CS1-, DA2, DA1, DA0, DIOR- and DIOW).
The Command Block Registers are used for sending commands to the device or posting status from the device.
The Control Block Registers are used for device control and to post alternate status.
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10.1 Alternate Status Register
Table 38: Alternate Status Register
76543210
BSYRDYDFDSCDRQCORIDXERR
This register contains the same information as the Status Register. The only difference between this register and the
Status Register is that reading the Alternate Status Register does not imply an interrupt acknowledge or a clear of a
pending interrupt. See Section 10.12, "Status Register," on page 67 for the definition of the bits in this register.
10.2 Command Register
This register contains the command code being sent to the device. Command execution begins immediately after
this register is written. The command set is shown in Table 58: , "Command Set (1 of 2)," on page 97 and Table
59: , "Command Set (2 of 2)," on page 98. All other registers required for the command must be set up before writing to the Command Register.
10.3 Data Register
This register is used to transfer data blocks between the device data buffer and the host. It is also the register
through which sector information is transferred on a Format Track command and the configuration information is
transferred on an Identify Device command.
All data transfers are 16 bits wide, except for ECC byte transfers, which are 8 bits wide. Data transfers are PIO
only.
The register contains valid data only when DRQ = 1 is in the Status Register.
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10.4 DeviceControl Register
Table 39: Device Control Register
76543210
HOB---1SRST-IEN0
BitDefinitions
HOBHOB (high order byte) is defined by the 48-bit Address feature set. A write to any Command
Register shall clear the HOB bit to zero.
SRSTSoftware Reset. The device is held at reset when RST = 1. Setting RST = 0 again enables the
device. To ensure that the device recognizes the reset, the host must set RST = 1 and wait for at
least 5 ms before setting RST = 0.
-IENInterrupt Enable. When IEN = 0, and the device is selected, the device interrupts to the host will
be enabled. When IEN = 1, or the device is not selected, the device interrupts to the host will be
disabled.
10.5 Drive Address Register
Table 40: Drive Address Register
76543210
HIZWTG-H3-H2-H1-H0-DS1-DS0
This register contains the inverted drive select and head select addresses of the currently selected drive.
Bit Definitions
HIZHigh Impedance. This bit is not a device and will always be in a high impedance state.
-WTGWrite Gate. This bit is 0 when writing to the disk device is in progress.
-H3, -H2,-
H1,-H0-
-H3, -H2,-H1,-H0-Head Select. These four bits are the one's complement of the binary coded
address of the currently selected head. Bit -H0 is the least significant.
-DS1Drive Select 1. The Drive Select bit for device 1 is active low. DS1 = 0 when device 1 (slave) is
selected and active.
-DS0Drive Select 0. The Drive Select bit for device 0 is active low. DS0 = 0 when device 0 (master) is
selected and active.
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10.6 Device/Head Register
Table 41: Device Head/Register
76543210
1L1DRVHS3HS2HS1HS0
This register contains the device and head numbers.
Bit Definitions
LBinary encoded address mode select. When L = 0, addressing is by CHS mode. When L = 1,
addressing is by LBA mode.
DRVDevice. When DRV = 0, device 0 (master) is selected. When DRV = 1, device 1 (Slave) is
selected.
HS3, HS2,
HS0
Head Select. These four bits indicate the binary encoded address of the head. Bit HS0 is the least
significant bit. At command completion, these bits are updated to reflect the currently selected
head. The head number may be from zero to the number of heads minus one. In LBA mode, HS3
through HS0 contain bits 24–27 of the LBA. At command completion, these bits are updated to
reflect the current LBA bits 24–27.
10.7 Error Register
Table 42: Error Register
76543210
CRCUNC0IDNF0ABRTTK0NFAMNF
This register contains the status from the last command executed by the device or a diagnostic code. At the completion of any command, except Execute Device Diagnostic, the contents of this register are always valid even if
ERR = 0 is in the Status Register.
Following a power on, a reset, or completion of an Execute Device Diagnostic command, this register contains a
diagnostic code. See Table 46: , "Diagnostic codes," on page 70 for the definitions.
Bit Definitions
ICRCE (CRC)Interface CRC Error. When CRC = 1, it indicates that a CRC error has occurred on the data bus
during a Ultra DMA transfer.
UNCUncorrectable Data Error. When UNC = 1 it indicates that an uncorrectable data error has been
encountered.
IDNF(IDN)ID Not Found. When IDN = 1, it indicates that the requested sector's ID field could not be found.
ABRT
(ABT)
TK0NF (T0N)Track 0 Not Found. When T0N = 1, it indicates that track 0 was not found during a recallibrate
AMNFAddress Mark Not Found. When AMN = 1, it indicates that the data address mark has not been
Aborted Command. When ABT = 1, it indicates that the requested command has been aborted due
to a device status error or an invalid parameter in an output register.
command.
found after finding the correct ID field for the requested sector.
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10.8 Features Register
This register is command specific. This register is used with the Set Features command, the S.M.A.R.T. Function
Set command, and the Format Unit command.
10.9 LBA High Register
This register is command specific. This is used with the Set Features command, S.M.A.R.T. Function Set command and Format Unit command.
When 48-bit addressing commands are used, the "most recently written" content contains LBA Bits 16-23, and the
"previous content" contains Bits 40-47. The 48-bit Address feature set is described in Section 11.15, "48-bit
Address Feature Set," on page 89.
10.10 LBA Mid Register
This register contains Bits 8-15. At the end of the command, this register is updated to reflect the current LBA
Bits 8-15.
When 48-bit addressing commands are used, the "most recently written" content contains LBA Bits 8-15 and the
"previous content" contains Bits 32-39.
10.11 Sector Count Register
This register contains the number of sectors of data requested to be transferred on a read or write operation between
the host and the device. If the value in the register is set to 0, a count of 256 secto rs (in 28-bit addressing) or 65,536
sectors (in 48-bit addressing) is specified.
If the register is zero at command completion, the command was successful. If not successfully completed, the register contains the number of sectors which need to be transferred in order to complete the request.
The contents of the register are defined otherwise on some commands. These definitions are given in the command
descriptions.
10.12 Status Register
Table 43: Status Register
76543210
BSYDRDYDFDSCDRQCORIDXERR
This register contains the device status. The contents of this register are updated whenever an error occurs and at
the completion of each command.
If the host reads this register when an interrupt is pending, it is considered to be the interrupt acknowledge. Any
pending interrupt is cleared whenever this register is read.
If BSY=1, no other bits in the register are valid.
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Bit Definitions
BSYBusy. Bit BSY=1 whenever the device is accessing the registers. The host should not read or write
any registers when BSY=1. If the host reads any register when BSY=1, the contents of the Status
Register will be returned.
DRDY
(RDY)
Device Ready. When bit RDY=1 it indicates that the device is capable of responding to a command. Bit RDY will be set to 0 during power on until the device is ready to accept a command.
DFDevice Fault. It DF=1 it indicates that the device has detected a write fault condition. Bit DF is set
to 0 after the Status Register is read by the host.
DSCDevice Seek Complete. If DSC=1, it indicates that a Seek has completed and the device head is
settled over a track. Bit DSC is set to 0 by the device just before a Seek begins. When an error
occurs, this bit is not changed until the Status Register is read by the host and at that time the bit
again indicates the current Seek complete status. When the device enters into or is in Standby
mode or Sleep mode, this bit is set by device in spite of the drive not spinning up.
DRQData Request. Bit DRQ=1 indicates that the device is ready to transfer a word or byte of data
between the host and the device. The host should not write the Command register when DRQ=1.
CORRCorrected Data. Always 0
IDXIDXIndex. Bit IDX=1 once per revolution. Since IDX=1, only for a very short time during each
revolution, the host may not see it set to 1 even if the host is reading the Status Register continuously . Therefore the host should not attempt to use IDX bit for timing purposes.
ERRError. Bit ERR=1 indicates that an error occurred during execution of the previous command. The
Error Register should be read to determine the error type. The device sets bit ERR=0 when the
next command is received from the host.
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11.0 General
11.1 Reset response
ATA has the following three types of resets:
Power On Reset (POR)
The device executes a series of electrical circuitry diagnostics, spins up the
head disk assembly, tests speed and other mechanical parametric, and sets
default values.
Hard Reset (Hardware Reset)
The RESET signal is negated in the ATA Bus. The device resets the interface
circuitry and sets the default values.
Soft Reset (Software Reset)
The SRST bit in the Device Control Register is set and then is reset. The device
resets the interface circuitry according to the Set Features requirement.
The actions of each reset are shown in the table below.
Table 44: Reset response table
Aborting Host interface
Aborting Device operation
Initialization of hardware
Internal diagnostic
Starting or Spinning Up spindle motor
Initialization of registers (*2)
DASP- handshake
PDIAG- handshake
Reverting programmed parameters to default
Number of CHS (set by Initialize Device Parameters)
Multiple mode
Write Cache
Delayed Write
Read look-ahead
ECC bytes
Volatile max. Address
Address offset mode
Power mode
Reset Standby timer value (*5)
PORhard resetsoft reset
-oo
-(*1)(*1)
oxx
oxx
(*6)xx
ooo
oox
ooo
oo(*3)
(*6)(*4)(*4)
ooo
o – executex – does not execute
Notes:
(*1)Execute after the data in write cache has been written.
(*2)The default value on POR is shown in Table 45: “Default Register Values” on page 70.
(*3)The Set Features command with Feature register = CCh enables the device to revert these parameters
to the power on defaults.
(*4)In the case of sleep mode, the device goes to standby mode. In other cases, the device does not
change current mode.
(*5)After reset the Standby timer value is set to 109 minutes.
(*6)Set according to the initial power mode selection.
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11.2 Register initialization
After a power on, a hard reset, or a software reset, the register values are initialized as shown in the table below.
If an Execute Device Diagnostic comma nd is carried out, if the system is powered on , or if a hard reset occurs, the
system generates an Error Register diagnostic code. See the table below for a description of the codes.
The Set Max password, the Set Max security mode and the Set Max unlock counter are not retained over a Power
On Reset but are retained over a Hard Reset or Soft Reset.
For each Reset and Execute Device Diagnostic, the diagnostic is done as follows:
Power On
Reset, Hard
Reset
DASP– is read by Device 0 to determine if Device 1 is present. If Device 1 is present,
Device 0 shall read PDIAG– to determine when it is valid to clear the BSY bit and
whether Device 1 has powered on or reset without error, otherwise Device 0 clears the
BSY bit whenever it is ready to accept commands. Device 0 may assert DASP– to
indicate device activity. If Device 1 is not present, Device 0 does not Assert DASP– at
POR.
Soft ResetIf Device 1 is present, Device 0 shall read PDIAG– to determine when it is valid to clear
the BSY bit and whether Device 1 has reset without any errors; otherwise, Device 0 shall
simply reset and clear the BSY bit. DASP– is asserted by Device 0 (and Device 1 if it is
present) in order to indicate device active.
Execute Device
Diagnostic
If Device 1 is present, Device 0 shall read PDIAG– to determine when it is valid to clear
the BSY bit and if Device 1 passed or failed the EXECUTE DEVICE DIAGNOSTIC
command; otherwise, Device 0 shall simply execute its diagnostics and then clear the
BSY bit. DASP– is asserted by Device 0 (and Device 1 if it is present) in order to
indicate that the device is active.
In each case – Power On Reset [Hard Reset], Soft Reset, and the Execute Device Diagnostic command – the
Device 0 Error register value is interpreted using the table below.
The "x" indicates the appropriate Diagnostic Code for the Power on, RESET-, Soft Reset, or Device Diagnostic
error.
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11.4 Power-off considerations
11.4.1 Load/Unload
Load/Unload is a functional mechanism of the hard disk drive. It is controlled by the drive microcode. Specifically,
unloading of the heads is invoked by the following commands.
UL= unload
Comp= complete
Rdy= interface ready
(*1)Load/Unload condition is not changed by Soft Reset
Load is also invoked as the idle command.
The specified start/stop life of the product assumes that load/unload is operated normally, NOT in emergency mode.
11.4.2 Emergency unload
When the drive power is interrupted with the heads still loaded, the microcode cannot operate and the normal
5V power is unavailable to unload the heads. In this case, normal unload is not possible, so the heads are unloaded
by routing the back EMF of the spinning motor to the voice coil. The actuator velocity is greater than the normal
case, and the unload process is inherently less controllable without a normal seek current profile.
Emergency unload is intended to be invoked in rare situations. Because this operation is inherently uncontrolled, it
is more mechanically stressful than a normal unload.
A single emergency unload operation is more stressful than 100 normal unloads. Use of emergency unload reduces
the start/stop life of the drive at a rate at least 100 times faster than that of normal unload and may damage the drive.
11.4.3 Required power-off sequence
The following are examples of such problems which can result when power is removed on most drives at an arbitrary
time:
•Data is lost from the write buffer.
•If the drive is writing a sector, a partially-written sector with an incorrect ECC block results,
the sector contents are destroyed, and reading that sector results in a hard error.
•Heads may land in the data zone instead of the landing zone depending on the design of the
drive.
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You may then turn off the drive in the following order:
1. Issue Standby Immediate or sleep command
2. W ait until COMMAND COMPLETE STATUS is returned. (It may take up to 350 ms in a typical case.)
3. Terminate power to drive
This power-down sequence should be followed for entry into any system power-down state, system suspend state,
or system hibernation state. In a robustly designed system, emergency unload is limited to rare scenarios such as
battery removal during operation.
11 .5 Sector Addressing Mode
All addressing of data sectors recorded on the device's media is done by a logical sector address. The logical CHS
address for the drive is different from the actual physical CHS location of the data sector on the disk media.
The drive supports both Logical CHS Addressing Mode and LBA Addressing Mode as the sector addressing mode.
The host system may select either the currently selected CHS translation addressing or LBA addressing on a
command-by-command basis by using the L bit in the DEVICE/HEAD register. A host system must set the L bit to
1 if the host uses LBA Addressing mode.
11.5.1 Logical CHS addressing mode
The logical CHS addressing is made up of three fields: the cylinder number, the head number, and the sector number.
Sectors are numbered from 1 to the maximum value allowed by the current CHS translation mode but cannot exceed
255 (0FFh). Heads are numbered from 0 to the maximum value allowed by the current CHS translation mode but
cannot exceed 15 (0Fh). Cylinders are numbered from 0 to the maximum value allowed by the current CHS
translation mode but cannot exceed 65535 (0FFFFh).
When the host selects a CHS translation mode using the INITIAL IZE DEVICE PARAMETERS command, the host
requests the number of sectors per logical track and the number of heads per logical cylinder. The device then
computes the number of logical cylinders available in requested mode.
The default CHS translation mode is described in the Identify Device Information. The current CHS translation
mode also is described in the Identify Device Information.
11.5.2 LBA addressing mode
Logical sectors on the device shall be linearly mapped with the first LBA addressed sector (sector 0) being the same
sector as the first logical CHS addressed sector (cylinder 0, head 0, sector 1). Irrespective of the logical CHS
translation mode currently in effect, the LBA address of a given logical sector does not change. The following
formula is always true:
LBA = ((cylinder x heads_per_cylinder + heads) x sectors_per_track) + sector – 1
where heads_per_cylinder and sectors_per_track are the current translation mode values.
On LBA addressing mode, the LBA value is set to the following register:
The power management feature set permits a host to modify the behavior in a manner which reduces the power
required to operate. The power management feature set provides a set of commands and a timer that enables a device
to implement low power consumption modes.
The drive implements the following set of functions:
•A Standby timer
•Idle command
•Idle Immediate command
•Sleep command
•Standby command
•Standby Immediate command
11.6.1 Power mode
Sleep ModeThe lowest power consumption when the device is powered on occurs in Sleep Mode. When
in Sleep Mode, the device requires a reset to be activated.
Standby
Mode
Idle ModeRefer to Section 11.7 “Advanced Power Management (ABLE-3) feature” on page 75.
Active
Mode
The device interface is capable of accepting commands, but since the media may not be
immediately accessible, there is a delay while waiting for the spindle to reach operating
speed.
The device is in execution of a command or accessing the disk media with the read lookahead function or the write cache function.
11.6.2 Power management commands
The Check Power Mode command allows a host to determine if a device is currently in, going to, or leaving
standby mode.
The Idle and Idle Immediate commands move a device to idle mode immediately from the active or standby
modes. The idle command also sets the standby timer count and starts the standby timer.
The sleep command moves a device to sleep mode. The device's interface becomes inactive at the completion of
the sleep command. A reset is required to move a device out of sleep mode. When a device exits sleep mode it will
enter standby mode.
The Standby and Standby Immediate commands move a device to standby mode immediately from the active or
idle modes. The standby command also sets the standby timer count.
11.6.3 Standby/Sleep command completion time
1. Confirm the completion of writing cached data in the buffer to media.
2. Unload the heads on the ramp.
3. Set the DRDY bit and the DSC bit in Status Register.
4. Set the INTRQ (completion of the command).
5. Activate the spindle break to stop the spindle motor.
6. Wait until the spindle motor is stopped.
7. Perform the post process.
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11.6.4 Standby timer
The standby timer provides a method for the device to automatically enter standby mode from either active or idle
mode following a host programmed period of inactivity. If the device is in the active or idle mode, the device waits
for the specified time period and if no command is received, the device automatically enters the standby mode.
If the value of the SECTOR COUNT register on Idle command or the Standby command is set to "00h", the device
will automatically set the standby timer to 109 minutes.
11.6.5 Status
In the active, idle, and standby modes, the device shall have the RDY bit of the status register set. If the BSY bit is
not set, the device shall be ready to accept any command.
In sleep mode, the device's interface is not active. A host shall not attempt to read the status of the device or issue
commands to the device.
11.6.6 Interface capability for power modes
Each power mode affects the physical interface as defined in the following table:
Ready (RDY) is not a power condition. A device may post ready at the interface even though the media may not be
accessible.
The interface is inactive in sleep mode, but the access to the interface registers and the validity of INTRQ is
guaranteed for two seconds after the Sleep command is completed. After this period, the contents of interface
registers may be lost. Since the contents of interface registers may be invalid, the host should NOT check the Status
register nor the Alternate Status register prior to issuing a soft reset to wake up a device.
11.6.7 Initial Power Mode at Power On
After power on or hard reset the device goes to IDLE mode or STANDBY mode depending on the option. Refer to
section 4.4.3 “Operating modes” on page 19 for the initial power mode selection.
11 .7 Advanced Power Management (ABLE-3) feature
This feature provides power saving without performance degradation. The Adaptive Battery Life Extender 3
(ABLE-3) technology intelligently manages transition among power modes within the device by monitoring access
patterns of the host.
This technology has three idle modes; Performance Idle mode, Active Idle mode, and Low Power Idle mode.
This feature allows the host to select an advanced power management level. The advanced power management level
is a scale from the lowest power consumption setting of 01h to the maximum performance level of FEh. Device
performance may increase with increasing advan ced power management levels. Device power consumption may
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increase with increasing advanced power management levels. The advanced power management levels contain
discrete bands, described in the section of Set Feature command in detail.
This feature set uses the following functions:
•A SET FEATURES subcommand to enable Advanced Power Management
•A SET FEATURES subcommand to disable Advanced Power Management
The Advanced Power Management feature is independent of the Standby timer setting. If both Advanced Power
Management level and the Standby timer are set, the device will go to the Standby state when the timer times out or
the device's Advanced Power Management algorithm indicates that it is time to enter the Standby state.
The IDENTIFY DEVICE response word 83, bit 3 indicates that Advanced Power Management feature is supported
if set. Word 91, bit 7-0 indicates that Advanced Power Management is enabled if set. Word 91, bits 7-0 contain the
current Advanced Power Management level if Advanced Power Managemen t is enabled.
11.7.1 Performance Idle Mode
This mode is usually entered immediately after Active mode command processing is complete, instead of
conventional idle mode. In Performance Idle mode, all electronic components remain powered and full frequency
servo remains operational. This provides instantaneous response to the next command. The duration of this mode is
intelligently managed as described below.
11.7.2 Active Idle Mode
In this mode, power consumption is 45–55% less than that of Performance Idle mode. Additional electronics are
powered off and the head is parked near the mid-diameter of the disk without servoing. Recovery time to Active
mode is about 20 ms.
11.7.3 Low Power Idle Mode
Power consumption is 60–65% less than that of Performance Idle mode. The heads are unloaded on the ramp but
the spindle is still rotated at the full speed. Recovery time to Active mode is about 300ms.
11.7.4 Transition time
The transition time is dynamically managed by the user's recent access pattern, instead of fixed times. The ABLE-3
algorithm monitors the interval between commands instead of the command frequency of ABLE-2. The algorithm
supposes that the next command will come with the same command interval distribution as the previous access
pattern. The algorithm calculates the expected average saving energy and response delay for next command in
several transition time case based on this assumption. And it selects the most effective transition time with the
condition that the calculated response delay is shorter than the value calculated from the specified level by Set
Feature Enable Advanced Power Management command.
The optimal time to enter Active Idle mode is variable depending on the recent behavior of the user. It is not possible
to achieve the same level of Power savings with a fixed entry time into Active Idle because every user's data and
access pattern is different. The optimum entry time changes over time.
The same algorithm works for entering into Low Power Idle mode and Standby mode, which consumes less power
but needs more recovery time switching from this mode to Active mode.
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11.8 S.M.A.R.T. Function
The intent of Self-monitoring, analysis, and reporting technology (S.M.A.R.T.) is to protect user data and prevent
unscheduled system downtime that may be caused by predictable degradation and/or fault of the device. By
monitoring and storing critical performance and calibration parameters, S.M.A.R.T. devices employ sophisticated
data analysis algorithms to predict the likelihood of near-term degradation or fault condition. By alerting the host
system of a negative reliability status condition, the host system can warn the user of the impending risk of a data
loss and advise the user of appropriate action.
Since S.M.A.R.T. utilizes the internal device microprocessor and other device resources, there may be some small
overhead associated with its operation. However, special care has been taken in the design of the S.M.A.R.T.
algorithms to minimize the impact to host system performance. Actual impact of S.M.A.R.T. overhead is dependent
on the specific device design and the usage patterns of the host system. To further ensure minimal impact to the user,
S.M.A.R.T. capable devices are shipped from the device manufacturer's factory with the S.M.A.R.T. feature
disabled. S.M.A.R.T. capable devices can be enabled by the system OEMs at time of system integration or in the
field by after-market products.
11.8.1 Attributes
Attributes are the specific performance or calibration parameters that are used in analyzing the status of the device.
Attributes are selected by the device manufacturer based on that attribute's ability to contribute to the prediction of
degrading or faulty conditions for that particular device. The specific set of attributes being used and the identity of
these attributes is vendor specific and proprietary.
11.8.2 Attribute values
Attribute values are used to represent the relative reliability of individual performance or calibration attributes.
Higher attribute values indicate that the analysis algorithms being used by the device are predicting a lower probability of a degrading or fault condition existing. Accordingly, lower attribute values indicate that the analysis algorithms being used by the device are predicting a higher probability of a degrading or fault condition existing. There
is no implied linear reliability relationship corresponding to the numerical relationship between different attribute
values for any particular attribute.
11.8.3 Attribute thresholds
Each attribute value has a corresponding attribute threshold limit which is used for direct comparison to the attribute
value to indicate the existence of a degrading or faulty condition. The numerical value of the attribute thresholds are
determined by the device manufacturer through design and reliability testing and analysis. Each attribute threshold
represents the lowest limit to which its corresponding attribute value can be equal while still retaining a positive
reliability status. Attribute thresholds are set at the device manufacturer's factory and cannot be changed in the field.
The valid range for attribute thresholds is from 1 through 253 decimal.
11.8.4 Threshold exceeded condition
If one or more attribute values are less than or equal to their corresponding attribute thresholds, then the device
reliability status is negative, indicating an impending degrading or faulty condition.
11.8.5 S.M.A.R.T. commands
The S.M.A.R.T. commands provide access to attribute values, attribute thresholds and other logging and reporting
information.
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11.8.6 S.M.A.R.T. operation with power management modes
The device saves attribute values automatically on every head unload timing except the emergency unload, even if
the attribute auto save feature is not enabled. The head unload is done not only by Standby, Standby Immediate,
Sleep command, and Hard Reset, but also by the Standby timer. So it is not necessary for a host system to enable
the attribute auto save feature when it utilizes the power management. If the attribute auto save feature is enabled,
attribute values will be saved after 30 minutes have passed since the last saving, besides above condition.
11.9 Security Mode Feature Set
Security Mode Feature Set is a powerful security feature. With a device lock password, a user can prevent
unauthorized access to a device even if it is removed from the computer.
New commands are supported for this feature as listed below:
Device Frozen ModeThe device enables all commands except those which can update the device lock
The device disables media access commands after power on. Media access
commands are enabled by either a Security Unlock command or a Security Erase
Unit command.
The device enables all commands. If a password is not set this mode is entered after
power on, otherwise it is entered by a Security Unlock or a Security Erase Unit
command.
function, set/change password. The device enters this mode via a Security Freeze
Lock command. It cannot quit this mode until power off.
11.9.2 Security level
The following security levels are provided:
High level securityWhen the device lock function is enabled and the User Password is forgotten, the
device can be unlocked via a Master Password.
Maximum level
security
When the device lock function is enabled and the User Password is forgotten,
then only the Master Password with a Security Erase Unit command can unlock
the device. Then user data is erased.
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11.9.3 Password
This function can have two types of passwords as described below.
Master PasswordWhen the Master Password is set, the device does NOT enable the Device Lock
Function, and the device CANNOT be locked with the Master Password, but the
Master Password can be used for unlocking the locked device.
User PasswordThe User Password should be given or changed by a system user. When the User
Password is set, the device enables the Device Lock Function, and then the
device is locked on the next power on reset or hard reset.
The system manufacturer or dealer who intends to enable the device lock function for end users must set the master
password even if only single level password protection is required. Otherwise, the default master password which
is set by Hitachi Global Storage Technologies can unlock a device that is locked with a user password
11.9.4 Master Password Revision Code
This Master Password Revision Code is set by Security Set Password command with the master password. And this
revision code field is returned in the Identify Device command word 92. The valid revision codes are 0001h to
FFFEh. The default value of Master Password Revision Code is FFFEh. Values 0000h and FFFFh are reserved.
11.9.4.1 Master Password setting
The system manufacturer or dealer can set an initial Master Password using the Security Set Password command,
without enabling the Device Lock Function.
11.9.4.2 User Password setting
When a User Password is set, the device will automatically enter lock mode the next time the device is powered on.
Table 50: Initial setting
< Setting password >
POR
Set Password with User Password
Normal operation
Power off
POR
Device locked mode
< No setting password >
POR
Normal operation
Power off
POR
Device unlocked mode
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11.9.4.3 Operation from POR after user password is set
When Device Lock Function is enabled, the device rejects media access command until a Security Unlock command
is successfully completed.
Table 51: Usual operation for POR
POR
Device Locked mode
Unlock CMD
Password
Match ?
N
Enter Device
Unlock mode
Y
Erase Prepare
Erase Unit
Password
Match ?
Y
Complete
Erase Unit
Lock function
Disable
Normal operation : All commands are available
Freeze Lock command
Enter Device Frozen mode
Normal Operation expect Set Password,
Disable Password, Erase Unit, Unlock commands.
N
Media Access
Command (*1)Command (*1)
Reject
Non-media Access
Complete
(*1) — refers to the commands in Table 53: “Command table for device lock operation” on page 82.
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11.9.4.4 User Password lost
If the User Password is forgotten and High level security is set, the system user cannot access any data. However
the device can be unlocked using the Master Password.
If a system user forgets the User Password and Maximum security level is set, data access is impossible. However
the device can be unlocked using the Security Erase Unit command to unlock the device and erase all user data with
the Master Password.
Table 52: Password lost
User Password Lost
LEVEL ? High
Maximum
Erase Prepare Command
Erase Unit Command
with Master Password
Normal operation but data lost
Unlock EMD with Master Password
Normal operation
11.9.4.5 Attempt limit for the SECURITY UNLOCK command
The SECURITY UNLOCK command has an attempt limit the purpose of which is to prevent someone from
attempting to unlock the drive with various passwords numerous times.
The device counts the password mismatch. If the password does not match, the device counts it without
distinguishing the Master password and the User password. If the count reaches 5, EXPIRE bit (bit 4) of Word 128
in Identify Device information is set, and then the SECURITY ERASE UNIT command and the SECURITY
UNLOCK command are aborted until a hard reset or a power off. The count and EXPIRE bit are cleared after a
power on reset or a hard reset.
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11.9.5 Command table
This table shows the device's response to commands when the Security Mode Feature Set (Device lock function) is
enabled.
The head unload is done not only by Standby, Standby Immediate, Sleep command and Hard Reset, but also by the
Standby timer
Table 53: Command table for device lock operation
Command
Check Power Mode
Enable/Disable Delayed
Write
Device Configuration
RESTORE
Device Configuration
FREEZE LOCK
Device Configuration
IDENTIFY
Device Configuration SET
Execute Device Diagnostic
Flush Cache
Flush Cache EXT
Format Track
Format Unit
Identify Device
Idle
Idle Immediate
Initialize Device Parameters
Read Buffer
Read DMA
Read DMA EXT
Read Long
Read Multiple
Read Multiple EXT
Read Native Max ADDRESS
Read Native Max ADDRESS
Protected Area Function provides a protected area which cannot be accessed via conventional methods. This
protected area is used to contain critical system data such as BIOS or system management information. The contents
of the entire system main memory may also be dumped into the protected area to resume after a system power off.
The LBA/CYL changed by the following commands affects the Identify Device Information.
Two commands are defined for this function:
•Read Native Max ADDRESS ('F8'h)
•Set Max ADDRESS ('F9'h)
Four security extension commands are implemented as sub functions of the Set Max ADDRESS:
•Set Max SET PASSWORD
•Set Max LOCK
•Set Max FREEZE LOCK
•Set Max UNLOCK
11.10.1 Example for operation (In LBA Mode)
The following example uses hypothetical values.
Device characteristics:
Capacity (native)536,870,912 bytes (536MB)
Max LBA (native)1,048,575 (0FFFFFh)
Required size for protected area8,388,608 bytes
Required blocks for protected area16,384 (004000h)
Customer usable device size528,482,304 bytes (528MB)
Customer usable sector count1,032,192 (0FC000h)
LBA range for protected area0FC000h to 0FFFFFh
1. Shipping drives from the drive manufacturer
When the drive is shipped from the manufacturer, the device has been tested to have a capacity of 536MB,
flagging the media defects not visible by the system.
2. Preparing drives at system manufacturer
Special utility software is required to define the size of the protected area and to store the data in it. The
sequence is:
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Issue Read Native Max ADDRESS command to get the real device max of LBA/CYL. Returned value shows
that native device Max LBA is 0FFFFFh regardless of the current setting.
Make the entire device accessible, including the protected area, by setting the device Max LBA as 0FFFFFh
via Set Max ADDRESS command. The option could be either nonvolatile or volatile.
Test the sectors for protected area (LBA > = 0FC000h) if required.
Write information data such as BIOS code within the protected area.
Change maximum LBA using Set Max ADDRESS command to 0FBFFFh with nonvolatile option.
From this point, the protected area cannot be accessed until next Set Max ADDRESS command is issued. Any
BIOS, device driver, or application software accesses the drive as if it is a 528 MB device because the device
behaves like a 528 MB device.
3. Conventional usage without system software support:
Since the drive works as a 528 MB device, there is no special care required for normal use of this device.
4. Advanced usage using protected area.
The data in the protected area is accessed by the following steps.
1. Issue Read Native Max ADDRESS command to get the real device max LBA/CYL. Returned value shows
that native device Max LBA is 0FFFFFh regardless of the current setting.
2. Make entire device accessible, including the protected area, by setting device Max LBA as 0FFFFFh via Set
Max ADDRESS command with the volatile option. By using this option, unexpected power removal or reset
will prevent the protected area from remaining accessible.
3. Read information data from protected area.
4. Issue hard reset or POR to inhibit any access to the protected area.
11.10.2 Set Max security extension commands
The Set Max SET PASSWORD command allows the host to define the password to be used during the current
power on cycle. This password is not related to the password used for the Security Mode Feature set. When the
password is set, the device is in the Set Max Unlocked mode.
This command requests a transfer of a single sector of data from the host. The following figure defines the content
of this sector of information. The password is retained by the device until the next power cycle. When the device
accepts this command, the device is in Set Max Unlocked mode.
Table 54: Set Max SET PASSWORD data content
WordContent
0Reserved
1-16Password (32 bytes)
17-255Reserved
The Set Max LOCK command allows the host to disable the Set Max commands (except Set Max UNLOCK and
Set Max FREEZE LOCK) until the next power cycle or the issuance and acceptance of the Set Max UNLOCK
command. When this command is accepted, the device is in the Set Max Locked mode.
The Set Max UNLOCK command changes the device from the Set Max Locked mode to the Set Max Unlocked
mode.
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This command requests a transfer of a single sector of data from the host. The figure shown above defines the
content of this sector of information. The password supplied in the sector of data transferred is compared with the
stored Set Max password. If the password compare fails, then the device returns command aborted and decrements
the unlock counter. On the acceptance of the Set Max LOCK command, this counter is set to a value of five and is
decremented for each password mismatch when Set Max UNLOCK is issued and the device is locked. When this
counter reaches zero, then the Set Max UNLOCK command returns command aborted until a power cycle.
The Set Max FREEZE LOCK command allows the host to disable the SET MAX commands (including Set Max
UNLOCK) until the next power cycle. When this command is accepted the device is in the Set Max Frozen mode.
The password, the Set Max security mode, and the unlock counter do not persist over a power cycle but persist over
a hardware or software reset.
NOTE: If this command is immediately preceded by a Read Native MAX ADDRESS command, it shall be
interpreted as a Set Max ADDRESS command regardless of Feature register value.
Table 55: Set Max security mode transition
11.11 Address Offset Feature (vendor specific)
Computer systems perform initial code loading (booting) by reading from a predefined address on a disk drive. To
allow an alternate bootable operating system to exist in a reserved area on a disk drive this feature provides a Set
Features function to temporarily offset the drive address space. The offset address space wraps around so that the
entire disk drive address space remains addressable in offset mode. The Set Max pointer is set to the end of the
reserved area to protect the data in the user area when operating in offset mode. This protection can be removed by
a Set Max Address command to move the Set Max pointer to the end of the drive. But any commands which access
sectors across the original native maximum LBA are rejected with error, even if this protection is removed by a Set
Max Address command.
11.11.1 Enable/Disable Address Offset Mode
Subcommand code 09h Enable Address Offset Mode offsets address Cylinder 0, Head 0, Sector 1, LBA 0, to the
start of the nonvolatile protected area established using the Set Max Address command. The offset condition is
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cleared by Subcommand 89h Disable Address Offset Mode, Hardware reset or Power on Reset. If Reverting to
Power on Defaults has been enabled by Set Features command, it is cleared by Soft reset as well. Upon entering
offset mode the capacity of the drive returned in the Identify Device data is the size of the former protected area. A
subsequent Set Max Address command with the address returned by the Read Max Address command allows access
to the entire drive. Addresses wrap so the entire drive remains addressable.
If a nonvolatile protected area has not been established before the device receives a Set Features Enable Address
Offset Mode command, the command fails with Abort error status.
Disable Address Offset Feature removes the address offset and sets the size of the drive reported by the Identify
Device command back to the size specified in the last nonvolatile Set Max Address command.
Table 56: Device address map before and after Set Feature
11.11.2 Identify Device Data
Identify Device data, word 83, bit 7 indicates the device supports the Address Offset Feature. Identify Device data,
word 86, bit 7 indicates the device is in Address Offset mode.
11.11.3 Exceptions in Address Offset Mode
Any commands which access sectors across the original native maximum LBA are rejected with error, even if the
access protection is removed by a Set Max Address command.
Read Look Ahead operation is not carried out, even if it is enabled by the Set Feature command.
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11.12 Seek Overlap
The drive provides accurate seek time measurement method. The seek command is usually used to measure the
device seek time by accumulating execution time for a number of seek commands. With typical implementation of
the seek command, this measurement must include the device and host command overhead. To eliminate this
overhead, the drive overlaps the seek command as described below.
The first seek command completes before the actual seek operation is over. Then the device can receive the next
seek command from the host. However, the actual seek operation for the next seek command starts right after
completion of the actual seek operation for the first seek command. The execution of two seek commands overlaps
excluding the actual seek operation.
With this overlap, total elapsed time for a number of seek commands is the total accumulated time for the actual
seek operation plus one pre and post overhead. When the number of seeks is large, this overhead can be ignored.
Table 57: Seek overlap
(1) With overlap
Host process
Device process
Seek operation
Overhead
Total time = (n-1) * (Seek operation) + A + B
A
B
(2) Without overlap
Host process
Device process
Seek operation
Overhead
Total time = n * (Seek operation + A + B)
AB+A
B+A
B
11.13 Write Cache function
Write cache is a performance enhancement whereby the device reports completion of the write command (Write
Sectors and Write Multiple) to the host as soon as the device has received all of the data in its buffer. The device
assumes responsibility to write the data subsequently onto the disk.
•While writing data after completed acknowledgment of a write command, soft reset, or hard
reset does not affect its operation. But power off terminates writing operation immediately and
unwritten data is lost.
•Flush cache, Soft reset, Standby, Standby Immediate, and Sleep are executed after the completion of writing to disk media on enabling write cache function. The host system can confirm
the completion of write cache operation by issuing flush cache command, Soft reset, Standby
command, Standby Immediate command, or Sleep command, and confirming the completion
of the issued command.
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11.14 Reassign Function
The Reassign Function is used with read commands and write commands. The sectors of data for reassignment are
prepared as the spare data sector. The one entry can register 256 consecutive sectors maximum.
This reassignment information is registered internally, and the information is available right after completing the
reassign function. Also the information is used on the next power on reset or hard reset.
If the number of the spare sector reaches 0 sector, the reassign function will be disabled automatically.
The spare tracks for reassignment are located at regular intervals from Cylinder 0. As a result of reassignment, the
physical location of logically sequenced sectors is dispersed.
11.14.1 Auto Reassign Function
The sectors that show some errors may be reallocated automatically when specific conditions are met. The spare
tracks for reallocation are located at regular intervals from Cylinder 0. The conditions for auto-reallocation are
described below.
Nonrecovered write errors
When a write operation can not be completed after the Error Recovery Procedure (ERP) is fully carried out, the
sector(s) are reallocated to the spare location. An error is reported to the host system only when the write cache is
disabled and the auto reallocation fails.
If the number of available spare sectors reaches 16 sectors, the write cache function will be disabled automatically.
Nonrecovered read errors
When a read operation fails after a defined ERP is fully carried out, a hard error is reported to the host system. This
location is registered internally as a candidate for the reallocation. When a registered location is specified as a target
of a write operation, a sequence of media verifications is performed automatically. When the result of this
verification meets the criteria, this sector is reallocated.
Recovered read errors
When a read operation for a sector fails once and then is recovered at the specific ERP step, this sector of data is
reallocated automatically. A media verification sequence may be run prior to the relocation according to the
predefined conditions.
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11.15 48-bit Address Feature Set
The 48-bit Address feature set allows devices with capacities up to 281,474,976,710,655 sectors. This allows device
capacity up to 144,115,188,075,855,360 bytes. In addition, the number of sectors that may be transferred by a single
command are increased by increasing the allowable sector count to 16 bits.
•Commands unique to the 48-bit Address feature set are:
•Flush Cache Ext
•Read DMA Ext
•Read Multiple Ext
•Read Native Max Address Ext
•Read Sector(s) Ext
•Read Verify Sector(s) Ext
•Set Max Address Ext
•Write DMA Ext
•Write Multiple Ext
•Write Sector(s) Ext
The 48-bit Address feature set operates in LBA addressing only. Devices also implement commands using 28-bit
addressing, and 28-bit and 48-bit commands may be intermixed.
In a device, the Features, the Sector Count, the LBA Low/Mid/High registers are a two-byte-deep FIFO. Each time
one of these registers is written, the new content written is placed into the "most recently written" location and the
previous content is moved to "previous content" location.
The host may read the "previous content" of the Features, the Sector Count, the LBA Low/Mid/High registers by
first setting the High Order Bit (HOB, bit 7) of the Device control register to one and then reading the desired
register. If HOB in the Device Control register is cleared to zero, the host reads the "most recently written" content
when the register is read. A write to any Command Block register shall cause the device to clear the HOB bit to zero
in the Device Control register. The "most recently written" content always gets written by a register write regardless
of the state of HOB in the Device Control register.
Support of the 48-bit Address feature set is indicated in the Identify Device response bit 10 word 83. In addition, the
maximum user LBA address accessible by 48-bit addressable commands is contained in Identify Device response
words 100 through 103.
When the 48-bit Address feature set is implemented, the native maximum address is the value returned by a Read
Native Max Address Ext command. If the native maximum address is equal to or less than 268,435,455, a Read
Native Max Address shall return the native maximum address. If the native maximum address is greater than
268,435,455, a Read Native Max Address shall return a value of 268,435,455.
Travelstar 80GN Hard Disk Drive Specification
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Travelstar 80GN Hard Disk Drive Specification
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