HITACHI HD74HCT563, HD74HCT573 User Manual

HD74HCT563

HD74HCT563/HD74HCT573

Octal Transparent Latches (with 3-state outputs)

Description

When the latch enable (LE) input is high, the Q outputs of HD74HCT563 will follow the inversion of the D inputs and the Q outputs of HD74HCT573 will follow the D inputs.

When the latch enable goes low, data at the D inputs will be retained at the outputs until latch enabled returns high again. When a high logic level is applied to the output control input, all outputs go to a high impedance state, regardless of what signals are present at the other inputs and the state of the storage elements.

Features

LSTTL Output Logic Level Compatibility as well as CMOS Output Compatibility

High Speed Operation: tpd (D to Q, Q) = 13 ns typ (CL = 50 pF)

High Output Current: Fanout of 15 LSTTL Loads

Wide Operating Voltage: VCC = 4.5 to 5.5 V

Low Input Current: 1 µA max

Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C)

Function Table

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Outputs

 

Output Control

 

 

 

 

Latch Enable

Data

HD74HCT563

HD74HCT573

 

 

 

 

 

 

 

 

 

L

 

 

 

 

H

H

L

H

 

 

 

 

 

 

 

 

 

L

 

 

 

 

H

L

H

L

 

 

 

 

 

 

 

 

 

L

 

 

 

 

L

X

Q0

Q0

 

 

 

 

 

 

 

 

 

H

 

 

 

 

X

X

Z

Z

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

HD74HCT563/HD74HCT573

Pin Arrangement

HD74HCT563

Output

1

 

 

 

 

20

VCC

Control

 

 

 

 

1D

2

 

 

 

OE

19 1Q

 

 

D

Q

2D

3

 

OE

 

 

18

2Q

D

Q

 

 

3D

4

 

 

 

OE

17

3Q

 

 

D

Q

4D

5

 

OE

 

 

16

4Q

D

Q

 

 

5D

6

 

 

 

OE

15

5Q

 

 

D

Q

6D

7

 

OE

 

 

14

6Q

D

Q

 

 

7D

8

 

 

 

OE

13

7Q

 

 

D

Q

8D

9

 

OE

 

 

12

8Q

D

Q

 

 

GND 10

 

 

 

 

11

Latch

 

 

 

 

Enable

(Top view)

2

HITACHI HD74HCT563, HD74HCT573 User Manual

HD74HCT563/HD74HCT573

HD74HCT573

Output

1

 

 

 

 

20

VCC

Control

 

 

 

 

1D

2

 

 

 

OE

19 1Q

 

 

D

Q

2D

3

 

OE

 

 

18

2Q

D

Q

 

 

3D

4

 

 

 

OE

17 3Q

 

 

D

Q

4D

5

 

OE

 

 

16

4Q

D

Q

 

 

5D

6

 

 

 

OE

15 5Q

 

 

D

Q

6D

7

 

OE

 

 

14

6Q

D

Q

 

 

7D

8

 

 

 

OE

13 7Q

 

 

D

Q

8D

9

 

OE

 

 

12

8Q

D

Q

 

 

GND 10

 

 

 

 

11

Latch

 

 

 

 

Enable

(Top view)

3

HD74HCT563/HD74HCT573

Block Diagram

HD74HCT563

1D

D

1Q

 

C Q

 

C

 

2D

D

2Q

 

C Q

 

C

 

3D

D

3Q

 

C Q

 

C

 

4D

D

4Q

 

C Q

 

C

 

5D

D

5Q

 

C Q

 

C

 

6D

D

6Q

 

C Q

 

C

 

7D

D

7Q

 

C Q

 

C

 

8D

D

8Q

 

C Q

 

C

 

Enable C

 

 

OC

 

 

4

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