Hitachi 20LD2450 Schematic

SERVICE MANUAL MANUEL D'ENTRETIEN WARTUNGSHANDBUCH

CAUTION:

Before servicing this chassis, it is important that the service technician read the “Safety Precautions” and “Product Safety Notices” in this service manual.

ATTENTION:

Avant d’effectuer l’entretien du châssis, le technicien doit lire les «Précautions de sécurité» et les «Notices de sécurité du produit» présentés dans le présent manuel.

No. 0235

20LD2450

Data contained within this Service manual is subject to alteration for improvement.

Les données fournies dans le présent manuel d’entretien peuvent faire l’objet de modifications en vue de perfectionner le produit.

VORSICHT:

Vor Öffnen des Gehäuses hat der Service-Ingenieur die „Sicherheitshinweise“ und „Hinweise zur Produktsicherheit“ in diesem Wartungshandbuch zu lesen.

Die in diesem Wartungshandbuch enthaltenen Spezifikationen können sich zwecks Verbesserungen ändern.

SPECIFICATIONS AND PARTS ARE SUBJECT TO CHANGE FOR IMPROVEMENT

Colour Television

August 2007

TABLE OF CONTENTS

Software Update Procedure

1. INTRODUCTION.......................................................................................................................4

2. TUNER........................................................................................................................................ 4

General description of UV1316:......................... .................................................................... 4

Features of UV1316:............................................................................................................... 4

Pinning: ...................................................................................................................................5

3. AUDIO AMPLIFIER STAGE WITH TDA1905..................................... ... ...............................5

4. POWER STAGE.........................................................................................................................5

5. MICROCONTROLLER (VCTI)................................................................................................ 6

General Features...................................................................................................................... 6

DRX Features.......................................................................................................................... 7

Multistandard Sound Processor (MSP) Features ............................................. .......................7

Video Features.........................................................................................................................8

Controller Features..................................................................................................................9

OSD & Teletext Features...................................................... ..................................................9

Port Allocation ........................................................................................................................9

6. SCALER & DEINTERLACER (MST)....................................................................................13

General Features.................................................................................................................... 13

Display Features................................................................................................................... 13

Auto Detection Features................ ...... .. ...... ..... ..... ... ..... ...... .. ...... ..... ... ..... ..... ... ..... ...... .. ...... ..13

OSD Features...................................... .. ................................................................................13

7. SERIAL 32K I2C EEPROM 24LC32.......................................................................................14

8. CLASS AB STEREO HEADPHONE DRIVER TDA1308........................... ..........................14

9. SAW FILTER ........................................................................................................................... 14

X6966D Standard:.................................................................................................................14

Features:................................................................................................................................ 15

Pin configuration:.................................................................................................................. 15

Frequency response:..............................................................................................................15

10. IC DESCRIPTIONS AND INTERNAL BLOCK DIAGRAM............................................. 16

10.1. LM1117............................................................................................................................ 16

10.1.1. General Description...................................................................................................16

10.1.2. Features.....................................................................................................................16

10.1.3. Applications ..............................................................................................................17

10.1.4. Absolute Maximum Ratings......................................................................................17

10.1.5. Connection Diagrams........................................................... ... ..................................17

10.2. LM1086............................................................................................................................ 17

10.2.1. General Description...................................................................................................17

10.2.2. Features.....................................................................................................................17

10.2.3. Applications ..............................................................................................................18

10.2.4. Absolute Maximum Ratings......................................................................................18

10.2.5. Connection Diagrams........................................................... ... ..................................19

10.3. LM317.............................................................................................................................. 19

10.3.1. General Description...................................................................................................19

10.3.2. Features.....................................................................................................................19

10.3.3. Connection Diagrams........................................................... ... ..................................20

10.4. MP1593............................................................................................................................ 20

10.4.1. General Description...................................................................................................20

10.4.2. Features.....................................................................................................................20

10.4.3. Applications ..............................................................................................................20

10.4.4. Absolute Maximum Ratings......................................................................................21

10.4.5. Electrical Characteristics...........................................................................................21

10.4.6. Pin Functions.............................................................................................................21

10.5. IRF7314-IRF7316............................................................................................................22

10.5.1. Absolute Maximum Ratings......................................................................................22

10.6. FDC642P..........................................................................................................................23

10.6.1. General Description.................................................................................................. 23

10.6.2 . Features .................................................................................................................... 23

10.6.3. Absolute Maximum Ratings......................................................................................24

10.6.4. Connection Diagram .................................................................................................24

10.7. 74HCT4053......................... ... ..........................................................................................24

10.7.1. General Description...................................................................................................24

10.7.2. Features.....................................................................................................................24

10.7.3. Application................................... .............................................................................25

10.7.4. Absolute Maximum Ratings......................................................................................25

10.7.5. Connection Diagram .................................................................................................25

10.8.TEA6420........................................................................................................................... 27

10.8.1 General Description............................... ... ..... ..... ... ..... ...... .. ...... ..... ..... ... ..... ...... .. ...... ..27

10.8.2. Features.....................................................................................................................27

10.8.3. Absolute Maximum Ratings......................................................................................27

10.8.4. Electrical Characteristics...........................................................................................27

10.8.5. Block Diagram ........................................ .. ................................................................28

10.8.6. Connection Diagram ................................................................................................. 28

10.9. PI5V330 ........................................................................................................................... 29

10.9.1. General Description................................................................................................... 29

10.9.2. Features ..................................................................................................................... 29

10.9.3. Absolute Maximum Ratings...................................................................................... 29

10.9.4. Connection Diagram ................................................................................................. 29

10.10. TDA1308........................................................................................................................ 30

10.10.1. General Description................................................................................................. 30

10.10.2 Features .................................................................................................................... 30

10.10.3. Pinning .................................................................................................................... 30

10.11. TDA1905........................................................................................................................ 31

10.11.1. General Description................................................................................................. 31

10.11.2. Absolute Maximum Ratings.................................................................................... 31

10.11.3. Electrical Characteristics......................................................................................... 32

10.11.4. Muting Function...................................................................................................... 33

10.SERVICE MENU SETTINGS................................................................................................. 34

11.Exploded Diagram.................................................................................................................... 37

12.BLOCK DIAGRAM................................................................................................................ 38

Motherboard Block Diagram.............................................................................................. 38

12.1.

12.2. Power Management

12.3.1. DRX (IF Demodulator), MSP & Video Processor Block Diagram........................... 40

12.3.2. MSP Block Diagram................................................................................................... 41

13.Schematic Diagrams ................................................................................................................. 42

14.PWB Main Board....................................................................................................................... 48

Block Diagram.................................................................................. 39

Stand By

0 - 9 Direct Programme

Cursor Up

Cursor Left

Sound

Picture Menu

Feature Menu

Installation Menu

Double Digit

Volume +/ -

Programme +/ -

Cursor Right

Cursor Down

Mute

External Source (TV, EXT1, EXT2, EXT3, SVHS, PC)

TV / Quit Menu

Teletext

1. INTRODUCTION

17MB24 Main Board consists of two major blocks. The first block is analog front-end and this block is handled by VCTI chip that is highly multifunctional. This IC does demodulation of Video & Audio from Tuner IF, CVBS, Audio, RGB, SVHS input selection and processing. It has an audio processor that supports equalizer or tone control, volume control, AVL, surround effect etc and supplies amplifier, headphone and CVBS & audio line outputs. It handles video processing such as colour standard detection and demodulation, picture alignment (brightness, contrast, colour etc.). The IC also does teletext decoding with fastext memory. After video processing, the processed video is applied to MST5*7a-M chip in RGB format.

The TV Tuner is an asymmetrical or a symmetrical IF output type and is PLL controlled. The IF signal is applied single saw filter. After the SAW filter block, IF signal is applied to VCTI IF inputs (Pin 16 and 17).

As VCTI can handle all the audio processing, there is no need for additional audio processor solution on the board. VCTI supports three Audio outputs. These outputs are assigned to Headphone, Speaker and I2C Controlled audio switch. The board employs TDA1905 and TDA1308 to drive speaker and headphone outputs respectively.

The Back End section is handled by MST chip. The RGB input can handle standard interlaced RGB output from VCTI, PC VGA RGB input and YPbPr. There are two set of ADC is present in MST so YPbPr and VGA sources should be multiplexed.

MST chip have an integrated LVDS transmitter and this LVDS transmitter can be activated or deactivated by registers so output of MST chip can be LVDS or TTL format.

Backlight is controlled via MST chip there are two pins to control inverter one of them is used for adjusting backlight the other one is used for backlight on/off control.

2. TUNER

As the thickness of the TV set has a limit, a horizontal mounted tuner is used in the product, which is suitable for CCIR systems B/G, H, L/ L’, I/I’, and D/K. The tuning is available through the digitally controlled I2C bus (PLL). Below you will find info on the Tuner in use.

General description of UV1316:

The UV1316 tuner belongs to the UV 1300 family of tuners, which are designed to meet a wide range of applications. It is a combined VHF, UHF tuner suitable for CCIR systems B/G, H, L, L’, I and I’. The low IF output impedance has been designed for direct drive of a wide variety of SAW filters with sufficient suppression of triple transient.

Features of UV1316:

1. Member of the UV1300 family small sized UHF/VHF tuners

2. Systems CCIR: B/G, H, L, L’, I and I’; OIRT: D/K

3. Digitally controlled (PLL) tuning via I2C-bus

4. Off-air channels, S-cable channels and Hyper band

5. Compact size

6. Complies to “CENELEC EN55020” and “EN55013”

Pinning:

1. Gain control voltage (AGC) : 4.0V, Max: 4.5V

2. Tuning voltage

3. I²C-bus address select : Max: 5.5V

4. I²C-bus serial clock : Min:-0.3V, Max: 5.5V

5. I²C-bus serial data : Min:-0.3V, Max: 5.5V

6. Not connected

7. PLL supply voltage : 5.0V, Min: 4.75V, Max: 5.5V

8. ADC input

9. Tuner supply voltage : 33V, Min: 30V, Max: 35V

10. Symmetrical IF output 1

11. Symmetrical IF output 2

3. AUDIO AMPLIFIER STAGE WITH TDA1905

The TDA1905 is a monolithic integrated circuit in POWERDIP package, intended for use as low frequency power amplifier in a wide range of applications in radio and TV sets. Stereo audio output power (2x3.5W – 16 Ohm at %10 THD), equalizer, FM radio, linear stereo, German-NICAM stereo, 5-Band equalizer control are supported.

4. POWER STAGE

The DC voltages required at various parts of the chassis and inverters are provided by a main power supply unit and power interface board. The main power supply unit is designed for 24V and 12V DC supply. Power stage which is on-chasis generates +12V for audio amplifier, 1.8V and 3.3V stand by voltage and 8V, 12V, 5V and 3.3Vsupplies for other different parts of the chassis.

5. MICROCONTROLLER (VCTI)

General Features

The VCT 49xyI, VCT 48xyI is an IC family of high-quality single-chip TV processors. Modular design and deep-submicron technology allow the economic integration of features in all classes of single-scan TV sets. The VCT 49xyI, VCT 48xyI family is based on functional blocks contained and approved in existing products like DRX 396xA, MSP 34x5G, VSP 94x7B, DDP 3315C, and SDA 55xx. Each member of the family contains the entire IF, audio, video, display, and deflection processing for 4:3 and 16:9 50/60-Hz mono and stereo TV sets. The integrated microcontroller is supported by a powerful OSD generator with integrated Teletext & CC acquisition including on-chip page memory.

– Submicron CMOS technology – Low-power standby mode – Single 20.25 MHz reference crystal – 8-bit 8051 instruction set compatible CPU – Up to 256 kB on-chip program ROM – WST, PDC, VPS, and WSS acquisition – Up to 10 pages on-chip teletext memory – Multi-standard QSS IF processing with single SAW – FM Radio and RDS with standard TV tuner – TV-sound demodulation:

• all A2 standards

• all NICAM standards

• BTSC/SAP with MNR (DBX optional)

• EIA-J – Baseband sound processing for loudspeaker channel:

• volume and balance

• bass/treble or equalizer

• loudness and spatial effect (e.g. pseudo stereo)

• Micronas AROUND (virtual Dolby optional)

• Micronas BASS and Subwoofer output

• further optional and licence requiring sound enhancements as BBE, SRS Wow – CVBS, S-VHS, YCbCr and RGB inputs – ITU656 input – 4H adaptive comb filter (PAL/NTSC) – multi-standard color decoder (PAL/NTSC/SECAM) – Macrovision Detection – Nonlinear horizontal scaling “panorama vision” – Luma and chroma transient improvement (LTI, CTI) – Non-linear color space enhancement (NCE) – Dynamic black level expander (BLE) – Selective Color Enhancer (SCE) – 8/10 bit ITU656 output – Soft start/stop of H-drive

DRX Features

The DRX - Analog TV IF- Demodulator performs the entire multistandard Quasi Split Sound (QSS) TV IF processing, AGC, video demodulation, and generation of the second sound IF (SIF) requiring only one SAW filter. The alignment-free DRX does not need special external components. All control functions and status registers are accessible via I2C bus interface. Therefore, it simplifies the design of high-quality, highly standardized IF stages.

– Multistandard QSS IF processing with a single SAW – Highly reduced amount of external components (no tank circuit, no potentiometers, no SAW switching) – Programmable IF frequency (38.9 MHz, 45.75 MHz, 32.9 MHz, 58.75 MHz, 36.125 MHz) – Digital IF processing for the following standards: B/G, D/K, I, L/L’, and M/N – Standard specific digital post filtering – Standard specific digital video/audio splitting – Standard specific digital picture carrier recovery:

• alignment-free

• quartz-stable and accurate

• stable frequency lock at 100% modulation and overmodulation up to 150%

• quartz-accurate AFC information – Programmable standard specific digital group delay equalization – Automatically frequency-adjusted Nyquist slope, therefore optimal picture and sound performance over complete lock in frequency range – Standard-specific digital AGC and delayed tuner AGC with programmable tuner Take Over Point

Multistandard Sound Processor (MSP) Features

The MSP receives the digital Sound IF signal from the DRX part. The MSP is able to demodulate all TV sound standards worldwide including the digital NICAM system.

Depending on the VCTI version, the following demodulation modes can be performed. TV stereo sound standards that are unavailable for a specific VCTI version are

processed in analog mono sound of the standard. In that case, stereo or bilingual processing will not be possible.

– Sound demodulator and stereo decoder – Audio processing for loudspeaker channels:

• volume

• Automatic Volume Correction (AVC)

• bass/treble or equalizer

• loudness

• balance

• configurable Subwoofer output

– Optional features for loudspeaker channels:

• Virtual Dolby Surround (VDS)

• SRS WOW

• BBE High Definition Sound

– PMQFP144-2 package:

• 6 analog audio inputs

• 4 analog audio outputs

– PSSDIP88-1 package:

• 4 analog audio inputs

• 2 analog audio outputs

• 2 configurable analog audio inputs/outputs

Video Features

The TVT is a Teletext decoder for decoding World System Teletext data, as well as Video Programming System (VPS), Program Delivery Control (PDC), and Wide-Screen Signalling (WSS) data used for PALplus transmissions (line 23). The device also supports Closed Caption acquisition and decoding. The TVT provides an integrated general-purpose, fully 8051-compatible microcontroller with television-specific hardware features. The microcontroller has been enhanced to provide powerful features such as memory banking, data pointer, additional interrupts, etc. The on-chip display unit for displaying Level 1.5 Teletext data can also be used for customer-defined onscreen displays. The TVT has an internal XRAM of 20 KB and an internal ROM of up to 256 KB. ROMless versions can address up to 1 MB of external RAM and ROM. The 8-bit microcontroller runs at 296 ns cycle time. The controller with dedicated hardware does most of the internal TTX acquisition processing, transfers data to/from external memory interface, and receives/transmits data via I2C-bus interface. In combination with dedicated hardware, the slicer stores TTX data in a VBI buffer of 1 KB. The microcontroller firmware performs all the acquisition tasks (hamming and parity checks, page search, and evaluation of header control bits) once per field. Additionally, the firmware can provide high-end Teletext features like Packet-26 handling, FLOF/TOP and list-pages. The interface-to-user software is optimized for minimal overhead. TVT is realized in deep submicron technology with 1.8 V supply voltage and 3.3 V I/O (TTL compatible).

– 11 analog video inputs (CVBS/Y/C/RGB/YCbCr) – 3 analog video outputs – integrated Y+C adder – integrated high-quality A/D converters and associated clamp and AGC circuits – high-performance 4H comb filter (PAL/NTSC) with vertical peaking – multistandard color decoder PAL/NTSC/SECAM including all substandards – macrovision-compliant multistandard sync processing – macrovision detection – RGB/YCbCr component processing and associated contrast, color saturation and tint circuits – high-quality soft mixer controlled by fast blank (alpha blending) – fast blank monitor via I2C – ITU656 input – linear horizontal scaling (0.25 to 4) – nonlinear horizontal scaling “panorama vision” – split screen (OSD and video side by side) – letter box detector (auto-wide) – noise measurement

Controller Features

– Single external 20.25 MHz crystal, all necessary clocks are generated internally – Normal mode: 40.5 MHz CPU clock, Power Save mode: 10.125 MHz – Up to 256 KB on-chip program ROM – 256 byte on-chip program RAM – 128 byte on-chip extended stack RAM – 20 kilobyte on-chip extended data RAM (XRAM) – Memory banking up to 1 MB – Non-multiplexed 8-bit data and 20-bit address bus – Eight 16-bit data pointer registers (DPTR) – 4-level, 24-input interrupt controller – Patch module for 16 ROM locations – Two 16-bit reloadable timers – Capture-compare timer for infrared decoding – Watchdog timer – UART – Real time clock (RTC) – PWM units (2 channels 14-bit, 6 channels 8-bit) – 8-bit ADC (4 channels) – I2C bus master/slave interface – Up to 24 programmable I/O ports – Flash version for PMQFP144 and PSSDIP88 packages (SST39LF020 or compatible) – ROM-less version with 1 MB address space for external program and data memory

OSD & Teletext Features

The on-chip display unit for displaying Level 1.5 Teletext data can also be used for customer-defined onscreen displays. The TVT has an internal XRAM of 20 KB and an internal ROM of up to 256 KB. ROMless versions can address up to 1 MB of external RAM and ROM. In combination with dedicated hardware, the slicer stores TTX data in a VBI buffer of 1 KB. The microcontroller firmware performs all the acquisition tasks (hamming and parity checks, page search, and evaluation of header control bits) once per field. Additionally, the firmware can provide high-end Teletext features like Packet-26 handling, FLOF/TOP and list-pages. The interface-to-user software is optimized for minimal overhead.

Port Allocation

10 11

6. SCALER & DEINTERLACER (MST)

The MST5*7 is total solution graphics processing IC for LCD displays with panel resolutions up to WXGA+/SXGA+. It is configured with a high-speed integrated tripleADC/PLL, a high quality display processing engine, and an integrated multi-purpose output display interface that can support all major panel interface formats. To further reduce system costs, the MST5*7 also integrates intelligent power management control capability for green-mode requirements and spread-spectrum support for EMI management.

General Features

- Two RGB analog input ports support up to 165 MHz (UXGA @ 60Hz)

- Full SOG and composite sync support, including copy protected signals

Display Features

- Patent-pending Hybrid Image Resolution Converter

- Variable sharpness control

- Interlaced to progressive conversion

- Patent-pending Dynamic Frame-Rate generator (DFR) – short line storage frame extension technique eliminates short lines in output frames

- Media Window Enhancement (MWE)

- Peaking and coring functions for sharpness enhancement and noise reduction

- Brightness and contrast control

- Programmable 10-bit gamma correction

- sRGB support

Auto Detection Features

- Auto input signal format (SOG, composite, separated HSYNC, and VSYNC)

- Input mode detection support analyzes input video signal (H/V polarity, H/V frequency, interlace/field detect) – extensive status registers support robust detection of all VESA and IBM modes

- Auto-tuning function including support for phase selection, image position, offset & gain and jitter detection

- Smart screen-fitting

OSD Features

- Built-in OSD generator with 291 character font programmable RAM

- Internal OSD rotation degree of 90 and 270

- Supports 2/4/8 multi-color fonts

- Supports 8/16/256 color palette

- Supports 1K code attributes

- Gradient color function

- Hardware button animation function

- Pattern generator for production test

- Supports OSD MUX and alpha blending capability

7. SERIAL 32K I2C EEPROM 24LC32

24LC32A is a 32 Kbit Electrically Erasable PROM. The device is organized as four blocks of 8K x 8-bit memory with a 2-wire serial interface. Low-voltage design permits operation down to 1.8V, with standby and active currents of only 1 μA and 1 mA, respectively. It has been developed for advanced, lowpower applications such as personal communications or data acquisition. The 24XX32A also has a page write capability for up to 32 bytes of data. Functional address lines allow up to eight devices on the same bus, for up to 256 Kbits address space. The 24XX32A is available in the standard 8-pin (Vcc, WP, SDA (i2c data), SCL (i2c clock), GNDx4). WP pin is critcal pin. If WP is high, writing is not possible to EEPROM. If WP is low, writing is possible to EEPROM.

8. CLASS AB STEREO HEADPHONE DRIVER TDA1308

The TDA1308 is an integrated class AB stereo headphone driver. The device is fabricated in a 1 mm CMOS process and has been primarily developed for portable digital audio applications.

9. SAW FILTER

X6966D Standard:

• B/G

• D/K

• I

+ 35 hidden pages