SERVICE MANUAL
MANUEL D'ENTRETIEN
WARTUNGSHANDBUCH
CAUTION:
Before servicing this chassis, it is important that the service technician read the “Safety
Precautions” and “Product Safety Notices” in this service manual.
ATTENTION:
Avant d’effectuer l’entretien du châssis, le technicien doit lire les «Précautions de sécurité»
et les «Notices de sécurité du produit» présentés dans le présent manuel.
No. 0235
20LD2450
Data contained within this Service
manual is subject to alteration for
improvement.
Les données fournies dans le présent
manuel d’entretien peuvent faire l’objet
de modifications en vue de perfectionner
le produit.
VORSICHT:
Vor Öffnen des Gehäuses hat der Service-Ingenieur die „Sicherheitshinweise“ und „Hinweise
zur Produktsicherheit“ in diesem Wartungshandbuch zu lesen.
Die in diesem Wartungshandbuch
enthaltenen Spezifikationen können sich
zwecks Verbesserungen ändern.
SPECIFICATIONS AND PARTS ARE SUBJECT TO CHANGE FOR IMPROVEMENT
17MB24 Main Board consists of two major blocks. The first block is analog front-end
and this block is handled by VCTI chip that is highly multifunctional. This IC does
demodulation of Video & Audio from Tuner IF, CVBS, Audio, RGB, SVHS input
selection and processing. It has an audio processor that supports equalizer or tone
control, volume control, AVL, surround effect etc and supplies amplifier, headphone and
CVBS & audio line outputs. It handles video processing such as colour standard
detection and demodulation, picture alignment (brightness, contrast, colour etc.). The IC
also does teletext decoding with fastext memory. After video processing, the processed
video is applied to MST5*7a-M chip in RGB format.
The TV Tuner is an asymmetrical or a symmetrical IF output type and is PLL controlled.
The IF signal is applied single saw filter. After the SAW filter block, IF signal is applied to
VCTI IF inputs (Pin 16 and 17).
As VCTI can handle all the audio processing, there is no need for additional audio
processor solution on the board. VCTI supports three Audio outputs. These outputs are
assigned to Headphone, Speaker and I2C Controlled audio switch. The board employs
TDA1905 and TDA1308 to drive speaker and headphone outputs respectively.
The Back End section is handled by MST chip. The RGB input can handle standard
interlaced RGB output from VCTI, PC VGA RGB input and YPbPr. There are two set of
ADC is present in MST so YPbPr and VGA sources should be multiplexed.
MST chip have an integrated LVDS transmitter and this LVDS transmitter can be
activated or deactivated by registers so output of MST chip can be LVDS or TTL format.
Backlight is controlled via MST chip there are two pins to control inverter one of them is
used for adjusting backlight the other one is used for backlight on/off control.
2. TUNER
As the thickness of the TV set has a limit, a horizontal mounted tuner is used in the
product, which is suitable for CCIR systems B/G, H, L/ L’, I/I’, and D/K. The tuning is
available through the digitally controlled I2C bus (PLL). Below you will find info on the
Tuner in use.
General description of UV1316:
The UV1316 tuner belongs to the UV 1300 family of tuners, which are designed to meet
a wide range of applications. It is a combined VHF, UHF tuner suitable for CCIR
systems B/G, H, L, L’, I and I’. The low IF output impedance has been designed for
direct drive of a wide variety of SAW filters with sufficient suppression of triple transient.
Features of UV1316:
1. Member of the UV1300 family small sized UHF/VHF tuners
2. Systems CCIR: B/G, H, L, L’, I and I’; OIRT: D/K
3. Digitally controlled (PLL) tuning via I2C-bus
4. Off-air channels, S-cable channels and Hyper band
5. Compact size
6. Complies to “CENELEC EN55020” and “EN55013”
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Pinning:
1. Gain control voltage (AGC) : 4.0V, Max: 4.5V
2. Tuning voltage
3. I²C-bus address select : Max: 5.5V
4. I²C-bus serial clock : Min:-0.3V, Max: 5.5V
5. I²C-bus serial data : Min:-0.3V, Max: 5.5V
6. Not connected
7. PLL supply voltage : 5.0V, Min: 4.75V, Max: 5.5V
8. ADC input
9. Tuner supply voltage : 33V, Min: 30V, Max: 35V
10. Symmetrical IF output 1
11. Symmetrical IF output 2
3. AUDIO AMPLIFIER STAGE WITH TDA1905
The TDA1905 is a monolithic integrated circuit in POWERDIP package, intended for use
as low frequency power amplifier in a wide range of applications in radio and TV sets.
Stereo audio output power (2x3.5W – 16 Ohm at %10 THD), equalizer, FM radio, linear
stereo, German-NICAM stereo, 5-Band equalizer control are supported.
4. POWER STAGE
The DC voltages required at various parts of the chassis and inverters are provided by a
main power supply unit and power interface board. The main power supply unit is
designed for 24V and 12V DC supply. Power stage which is on-chasis generates +12V
for audio amplifier, 1.8V and 3.3V stand by voltage and 8V, 12V, 5V and 3.3Vsupplies
for other different parts of the chassis.
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5. MICROCONTROLLER (VCTI)
General Features
The VCT 49xyI, VCT 48xyI is an IC family of high-quality single-chip TV processors.
Modular design and deep-submicron technology allow the economic integration of
features in all classes of single-scan TV sets. The VCT 49xyI, VCT 48xyI family is based
on functional blocks contained and approved in existing products like DRX 396xA, MSP
34x5G, VSP 94x7B, DDP 3315C, and SDA 55xx. Each member of the family contains
the entire IF, audio, video, display, and deflection processing for 4:3 and 16:9 50/60-Hz
mono and stereo TV sets. The integrated microcontroller is supported by a powerful
OSD generator with integrated Teletext & CC acquisition including on-chip page
memory.
– Submicron CMOS technology
– Low-power standby mode
– Single 20.25 MHz reference crystal
– 8-bit 8051 instruction set compatible CPU
– Up to 256 kB on-chip program ROM
– WST, PDC, VPS, and WSS acquisition
– Up to 10 pages on-chip teletext memory
– Multi-standard QSS IF processing with single SAW
– FM Radio and RDS with standard TV tuner
– TV-sound demodulation:
• all A2 standards
• all NICAM standards
• BTSC/SAP with MNR (DBX optional)
• EIA-J
– Baseband sound processing for loudspeaker channel:
• volume and balance
• bass/treble or equalizer
• loudness and spatial effect (e.g. pseudo stereo)
• Micronas AROUND (virtual Dolby optional)
• Micronas BASS and Subwoofer output
• further optional and licence requiring sound enhancements as BBE, SRS Wow
– CVBS, S-VHS, YCbCr and RGB inputs
– ITU656 input
– 4H adaptive comb filter (PAL/NTSC)
– multi-standard color decoder (PAL/NTSC/SECAM)
– Macrovision Detection
– Nonlinear horizontal scaling “panorama vision”
– Luma and chroma transient improvement (LTI, CTI)
– Non-linear color space enhancement (NCE)
– Dynamic black level expander (BLE)
– Selective Color Enhancer (SCE)
– 8/10 bit ITU656 output
– Soft start/stop of H-drive
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DRX Features
The DRX - Analog TV IF- Demodulator performs the entire multistandard Quasi Split
Sound (QSS) TV IF processing, AGC, video demodulation, and generation of the
second sound IF (SIF) requiring only one SAW filter. The alignment-free DRX does not
need special external components. All control functions and status registers are
accessible via I2C bus interface. Therefore, it simplifies the design of high-quality, highly
standardized IF stages.
– Multistandard QSS IF processing with a single SAW
– Highly reduced amount of external components (no tank circuit, no potentiometers, no
SAW switching)
– Programmable IF frequency (38.9 MHz, 45.75 MHz, 32.9 MHz, 58.75 MHz, 36.125
MHz)
– Digital IF processing for the following standards:
B/G, D/K, I, L/L’, and M/N
– Standard specific digital post filtering
– Standard specific digital video/audio splitting
– Standard specific digital picture carrier recovery:
• alignment-free
• quartz-stable and accurate
• stable frequency lock at 100% modulation and overmodulation up to 150%
• quartz-accurate AFC information
– Programmable standard specific digital group delay equalization
– Automatically frequency-adjusted Nyquist slope, therefore optimal picture and sound
performance over complete lock in frequency range
– Standard-specific digital AGC and delayed tuner AGC with programmable tuner Take
Over Point
Multistandard Sound Processor (MSP) Features
The MSP receives the digital Sound IF signal from the DRX part. The MSP is able to
demodulate all TV sound standards worldwide including the digital NICAM system.
Depending on the VCTI version, the following demodulation modes can be performed.
TV stereo sound standards that are unavailable for a specific VCTI version are
processed in analog mono sound of the standard. In that case, stereo or bilingual
processing will not be possible.
– Sound demodulator and stereo decoder
– Audio processing for loudspeaker channels:
• volume
• Automatic Volume Correction (AVC)
• bass/treble or equalizer
• loudness
• balance
• configurable Subwoofer output
– Optional features for loudspeaker channels:
• Virtual Dolby Surround (VDS)
• SRS WOW
• BBE High Definition Sound
– PMQFP144-2 package:
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• 6 analog audio inputs
• 4 analog audio outputs
– PSSDIP88-1 package:
• 4 analog audio inputs
• 2 analog audio outputs
• 2 configurable analog audio inputs/outputs
Video Features
The TVT is a Teletext decoder for decoding World System Teletext data, as well as
Video Programming System (VPS), Program Delivery Control (PDC), and Wide-Screen
Signalling (WSS) data used for PALplus transmissions (line 23). The device also
supports Closed Caption acquisition and decoding. The TVT provides an integrated
general-purpose, fully 8051-compatible microcontroller with television-specific hardware
features. The microcontroller has been enhanced to provide powerful features such as
memory banking, data pointer, additional interrupts, etc. The on-chip display unit for
displaying Level 1.5 Teletext data can also be used for customer-defined onscreen
displays.
The TVT has an internal XRAM of 20 KB and an internal ROM of up to 256 KB.
ROMless versions can address up to 1 MB of external RAM and ROM. The 8-bit
microcontroller runs at 296 ns cycle time. The controller with dedicated hardware does
most of the internal TTX acquisition processing, transfers data to/from external memory
interface, and receives/transmits data via I2C-bus interface. In combination with
dedicated hardware, the slicer stores TTX data in a VBI buffer of 1 KB. The
microcontroller firmware performs all the acquisition tasks (hamming and parity checks,
page search, and evaluation of header control bits) once per field. Additionally, the
firmware can provide high-end Teletext features like Packet-26 handling, FLOF/TOP
and list-pages. The interface-to-user software is optimized for minimal overhead. TVT is
realized in deep submicron technology with 1.8 V supply voltage and 3.3 V I/O (TTL
compatible).
– 11 analog video inputs (CVBS/Y/C/RGB/YCbCr)
– 3 analog video outputs
– integrated Y+C adder
– integrated high-quality A/D converters and associated clamp and AGC circuits
– high-performance 4H comb filter (PAL/NTSC) with vertical peaking
– multistandard color decoder PAL/NTSC/SECAM including all substandards
– macrovision-compliant multistandard sync processing
– macrovision detection
– RGB/YCbCr component processing and associated contrast, color saturation and tint
circuits
– high-quality soft mixer controlled by fast blank (alpha blending)
– fast blank monitor via I2C
– ITU656 input
– linear horizontal scaling (0.25 to 4)
– nonlinear horizontal scaling “panorama vision”
– split screen (OSD and video side by side)
– letter box detector (auto-wide)
– noise measurement
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Controller Features
The TVT is a Teletext decoder for decoding World System Teletext data, as well as
Video Programming System (VPS), Program Delivery Control (PDC), and Wide-Screen
Signalling (WSS) data used for PALplus transmissions (line 23). The device also
supports Closed Caption acquisition and decoding. The TVT provides an integrated
general-purpose, fully 8051-compatible microcontroller with television-specific hardware
features. The microcontroller has been enhanced to provide powerful features such as
memory banking, data pointer, additional interrupts, etc.
– Single external 20.25 MHz crystal, all necessary clocks are generated internally
– Normal mode: 40.5 MHz CPU clock, Power Save mode: 10.125 MHz
– Up to 256 KB on-chip program ROM
– 256 byte on-chip program RAM
– 128 byte on-chip extended stack RAM
– 20 kilobyte on-chip extended data RAM (XRAM)
– Memory banking up to 1 MB
– Non-multiplexed 8-bit data and 20-bit address bus
– Eight 16-bit data pointer registers (DPTR)
– 4-level, 24-input interrupt controller
– Patch module for 16 ROM locations
– Two 16-bit reloadable timers
– Capture-compare timer for infrared decoding
– Watchdog timer
– UART
– Real time clock (RTC)
– PWM units (2 channels 14-bit, 6 channels 8-bit)
– 8-bit ADC (4 channels)
– I2C bus master/slave interface
– Up to 24 programmable I/O ports
– Flash version for PMQFP144 and PSSDIP88 packages (SST39LF020 or compatible)
– ROM-less version with 1 MB address space for external program and data memory
OSD & Teletext Features
The on-chip display unit for displaying Level 1.5 Teletext data can also be used for
customer-defined onscreen displays. The TVT has an internal XRAM of 20 KB and an
internal ROM of up to 256 KB. ROMless versions can address up to 1 MB of external
RAM and ROM.
In combination with dedicated hardware, the slicer stores TTX data in a VBI buffer of 1
KB. The microcontroller firmware performs all the acquisition tasks (hamming and parity
checks, page search, and evaluation of header control bits) once per field. Additionally,
the firmware can provide high-end Teletext features like Packet-26 handling, FLOF/TOP
and list-pages. The interface-to-user software is optimized for minimal overhead.
Port Allocation
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6. SCALER & DEINTERLACER (MST)
The MST5*7 is total solution graphics processing IC for LCD displays with panel
resolutions up to WXGA+/SXGA+. It is configured with a high-speed integrated tripleADC/PLL, a high quality display processing engine, and an integrated multi-purpose
output display interface that can support all major panel interface formats. To further
reduce system costs, the MST5*7 also integrates intelligent power management control
capability for green-mode requirements and spread-spectrum support for EMI
management.
General Features
- Two RGB analog input ports support up to 165 MHz (UXGA @ 60Hz)
- Full SOG and composite sync support, including copy protected signals
- Patent-pending Dynamic Frame-Rate generator (DFR) – short line storage frame
extension technique eliminates short lines in output frames
- Media Window Enhancement (MWE)
- Peaking and coring functions for sharpness enhancement and noise reduction
- Brightness and contrast control
- Programmable 10-bit gamma correction
- sRGB support
Auto Detection Features
- Auto input signal format (SOG, composite, separated HSYNC, and VSYNC)
- Input mode detection support analyzes input video signal (H/V polarity, H/V frequency,
interlace/field detect) – extensive status registers support robust detection of all VESA
and IBM modes
- Auto-tuning function including support for phase selection, image position, offset &
gain and jitter detection
- Smart screen-fitting
OSD Features
- Built-in OSD generator with 291 character font programmable RAM
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- Internal OSD rotation degree of 90 and 270
- Supports 2/4/8 multi-color fonts
- Supports 8/16/256 color palette
- Supports 1K code attributes
- Gradient color function
- Hardware button animation function
- Pattern generator for production test
- Supports OSD MUX and alpha blending
capability
7. SERIAL 32K I2C EEPROM 24LC32
24LC32A is a 32 Kbit Electrically Erasable PROM. The device is organized as four
blocks of 8K x 8-bit memory with a 2-wire serial interface. Low-voltage design permits
operation down to 1.8V, with standby and active currents of only 1 μA and 1 mA,
respectively. It has been developed for advanced, lowpower applications such as
personal communications or data acquisition. The 24XX32A also has a page write
capability for up to 32 bytes of data. Functional address lines allow up to eight devices
on the same bus, for up to 256 Kbits address space. The 24XX32A is available in the
standard 8-pin (Vcc, WP, SDA (i2c data), SCL (i2c clock), GNDx4). WP pin is critcal pin.
If WP is high, writing is not possible to EEPROM. If WP is low, writing is possible to
EEPROM.
8. CLASS AB STEREO HEADPHONE DRIVER TDA1308
The TDA1308 is an integrated class AB stereo headphone driver. The device is
fabricated in a 1 mm CMOS process and has been primarily developed for portable
digital audio applications.
The LM1117 is a series of low dropout voltage regulators with a dropout of 1.2V at
800mA of load current. It has the same pin-out as National Semiconductor’s industry
standard LM317. The LM1117 is available in an adjustable version, which can set the
output voltage from 1.25V to 13.8V with only two external resistors. In addition, it is also
available in five fixed voltages, 1.8V, 2.5V, 2.85V, 3.3V, and 5V. The LM1117 offers
current limiting and thermal shutdown. Its circuit includes a zener trimmed bandgap
reference to as-sure output voltage accuracy to within ±1%. The LM1117 series is
available in SOT- 223, TO-220, and TO-252 D-PAK packages. A minimum of 10μF
tantalum capacitor is required at the output to improve the transient response and
stability.
10.1.2. Features
• Available in 1.8V, 2.5V, 2.85V, 3.3V, 5V, and Adjustable Versions
• Space Saving SOT-223 Package
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• Current Limiting and Thermal Protection
• Output Current 800mA
• Line Regulation 0.2% (Max)
• Load Regulation 0.4% (Max)
• Temperature Range
— LM1117 0°C to 125°C
— LM1117I -40°C to 125°C
10.1.3. Applications
• 2.85V Model for SCSI-2 Active Termination
• Post Regulator for Switching DC/DC Converter
• High Efficiency Linear Regulators
• Battery Charger
• Battery Powered Instrumentation
10.1.4. Absolute Maximum Ratings
10.1.5. Connection Diagrams
10.2. LM1086
10.2.1. General Description
The LM1086 is a low dropout three terminal regulator with 1.5A output current capability.
The output voltage is adjustable with the use of a resistor divider. Dropout is guaranteed
at a maximum of 500 mV at maximum output current. It's low dropout voltage and fast
transient response make it ideal for low voltage microprocessor applications. Internal
current and thermal limiting provides protection against any overload condition
that would create excessive junction temperature.
10.2.2. Features
● Low Dropout Voltage 500mV at 1.5A Output Current
● Surface Mount Package SOT-223 & TO-263 (D2 Package)
● 100% Thermal Limit Burn-in
10.2.3. Applications
●Battery Charger
Adjustable Power Supplies
●
Constant Current Regulators
●
Portable Instrumentation
●
High Efficiency Linear Power Supplies
●
High Efficiency "Green" Computer Systems
●
SMPS Post-Regulator
●
Power PC Supplies
●
Powering VGA & Sound Card
●
10.2.4. Absolute Maximum Ratings
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10.2.5. Connection Diagrams
10.3. LM317
10.3.1. General Description
The LM117/LM217/LM317 are monolithic integrated circuit in TO-220, ISOWATT220,
TO-packages intended for use as positive adjustable voltage regulators. They are
designed to supply more than 1.5A of load current with an output voltage adjustable
1.2 to 37V range. The nominal output voltage is selected by means of only a resistive
divider, making exceptionally easy to use and eliminating the stocking of many fixed
regulators.
10.3.2. Features
● Output voltage range: 1.2 to 37V
● Output current in excess of 1.5A
● 0.1% Line and Load Regulation
● Floating Operation for High Voltages
● Complete Series of Protections: Current Limiting, Thermal Shutdown and SOA Control
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10.3.3. Connection Diagrams
10.4. MP1593
10.4.1. General Description
The MP1593 is a step-down regulator with an internal Power MOSFET. It achieves 3A
continuous output current over a wide input supply range with excellent load and line
regulation. Current mode operation provides fast transient response and eases loop
stabilization. Fault condition protection includes cycle-by-cycle current limiting and
thermal shutdown. Adjustable soft-start reduces the stress on the input source at turnon. In shutdown mode the regulator draws 20μA of supply current. The MP1593
requires a minimum number of readily available external components to complete a 3A
step down DC to DC converter solution.
10.4.2. Features
● 3A Output Current
● Programmable Soft-Start
● 100mΩ Internal Power MOSFET Switch
● Stable with Low ESR Output Ceramic Capacitors
● Up to 95% Efficiency
● 20μA Shutdown Mode
● Fixed 385KHz Frequency
● Thermal Shutdown
● Cycle-by-Cycle Over Current Protection
● Wide 4.75 to 28V Operating Input Range
● Output Adjustable from 1.22V
● Under Voltage Lockout
● Available in 8-Pin SOIC Package
10.4.3. Applications
● Distributed Power Systems
● Battery Chargers
● Pre-Regulator for Linear Regulators
● Flat Panel TVs
● Set-Top Boxes
● Cigarette Lighter Powered Devices
● DVD/PVR Devices
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10.4.4. Absolute Maximum Ratings
10.4.5. Electrical Characteristics
10.4.6. Pin Functions
Pin1:BS
High-Side Gate Drive Boost Input. BS supplies the drive for the high-side N-Channel
MOSFET switch. Connect a 10nF or greater capacitor from SW to BS to power the high
side switch.
Pin2:IN
Power Input. IN supplies the power to the IC, as well as the step-down converter
switches. Drive IN with a 4.75V to 28V power source. Bypass IN to GND with a suitably
large capacitor to eliminate noise on the input to the IC.
Pin3:SW
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Power Switching Output. SW is the switching node that supplies power to the output.
Connect the output LC filter from SW to the output load. Note that a capacitor is required
from SW to BS to power the high-side switch
Pin4:GND
Ground.
Pin5:FB
Feedback Input. FB senses the output voltage to regulate that voltage. Drive FB with a
resistive voltage divider from the output voltage. The feedback threshold is 1.222V.
Pin6:COMP
Compensation Node. COMP is used to compensate the regulation control loop. Connect
a series RC network from COMP to GND to compensate the regulation control loop. In
some cases, an additional capacitor from COMP to GND is required.
Pin7:EN
Enable Input. EN is a digital input that turns the regulator on or off. Drive EN high to turn
on the regulator, drive EN low to turn it off. An Under Voltage Lockout (UVLO) function
can be implemented by the addition of a resistor divider from VIN to GND. For complete
low current shutdown its needs to be less than 0.7V. For automatic startup, leave EN
unconnected.
Pin8:SS
Soft-Start Control Input. SS controls the soft-start period. Connect a capacitor from SS
to GND to set the soft-start period. A 0.1μF capacitor sets the soft-start period to 10ms.
To disable the soft-start feature, leave SS unconnected.
.
10.5. IRF7314-IRF7316
Fifth Generation HEXFETs from International Rectifier utilize advanced processing
techniques to achieve extremely low on-resistance per silicon area. This benefit,
combined with the fast switching speed and ruggedized device design that HEXFET
Power MOSFETs are well known for, provides the designer with an extremely efficient
and reliable device for use in a wide variety of applications. The SO-8 has been
modified through a customized leadframe for enhanced thermal characteristics and
multiple-die capability making it ideal in a variety of power applications. With these
improvements, multiple devices can be used in an application with dramatically reduced
board space. The package is designed for vapor phase, infra red, or wave soldering
techniques.
10.5.1. Absolute Maximum Ratings
7314 (TA = 25°C Unless Otherwise Noted)
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7316 (
TA = 25°C Unless Otherwise Noted)
10.6. FDC642P
10.6.1. General Description
This p-channel 2.5V specified MOSFET is produced using Fairchild’s advanced
PowerTrench process that has been especially tailored to minimize on state resistance
and yet maintain low gate charge for superior switching performance.
10.6.2 . Features
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10.6.3. Absolute Maximum Ratings
10.6.4. Connection Diagram
10.7. 74HCT4053
10.7.1. General Description
The 74HC/HCT4053 are high-speed Si-gate CMOS devices and are pin compatible with
the “4053” of the “4000B” series. They are specified in compliance with JEDEC standard
no. 7A.
The 74HC/HCT4053 are triple 2-channel analog multiplexers/demultiplexers with a
common enable input (E). Each multiplexer/demultiplexer has two independent
inputs/outputs (nY0 and nY1), a common input/output (nZ) and three digital select inputs
(S1 to S3).
With E LOW, one of the two switches is selected (low impedance ON-state) by S1 to S3.
With E HIGH, all switches are in the high impedance OFF-state, independent of S1 to
S3.
VCC and GND are the supply voltage pins for the digital control inputs (S1, to S3, and
E). The VCC to GND ranges are 2.0 to 10.0 V for HC and 4.5 to 5.5 V for HCT. The
analog inputs/outputs (nY0 and nY1, and nZ) can swing between VCC as a positive limit
and VEE as a negative limit. VCC - VEE may not exceed 10.0 V.
For operation as a digital multiplexer/demultiplexer, VEE is connected to GND (typically
ground).
10.7.2. Features
●Low “ON” resistance:
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80 W (typ.) at VCC - VEE = 4.5 V
70 W (typ.) at VCC - VEE = 6.0 V
60 W (typ.) at VCC - VEE = 9.0 V
● Logic level translation:to enable 5 V logic to communicate with ± 5 V analog signals
● Typical “break before make” built in
● Output capability: non-standard
● ICC category: MSI
10.7.3. Application
● Analog multiplexing and demultiplexing
● Digital multiplexing and demultiplexing
● Signal gating
10.7.4. Absolute Maximum Ratings
10.7.5. Connection Diagram
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10.8.TEA6420
10.8.1 General Description
The TEA6420 switches 5 stereo audio inputs on 4 stereo outputs. All the switching
possibilities are changed through the I2C bus.
10.8.2. Features
● 5 Stereo Inputs
● 4 Stereo Outputs Gain Control 0/2/4/6dB/ Mute for Each Output
● Cascadable (2 different addresses)
● Serial Bus Controlled
● Very Low Noise & Very Low Distortion
10.8.3. Absolute Maximum Ratings
10.8.4. Electrical Characteristics
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10.8.5. Block Diagram
10.8.6. Connection Diagram
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10.9. PI5V330
10.9.1. General Description
The PI5V330 is well suited for video applications when switching composite or RGB
analog. A picturein- picture application will be described in this brief. The pixel-rate
creates video overlays so two or more pictures can be viewed at the same time. An
inexpensive NTSC titler can be implemented by superimposing the output of a character
generator on a standard composite video background.
10.9.2. Features
• High-performance solution to switch between video sources
• Wide bandwidth: 200 MHz
• Low On-Resistance: 3Ω
• Low crosstalk at 10 MHz: –58dB
• Ultra-low quiescent power (0.1μA typical)
• Single supply operation: +5.0V
• Fast switching: 10ns
• High-current output: 100mA
10.9.3. Absolute Maximum Ratings
10.9.4. Connection Diagram
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10.10. TDA1308
10.10.1. General Description
The TDA1308 is an integrated class AB stereo headphone driver contained in an SO8
or a DIP8 plastic package. The device is fabricated in a 1 mm CMOS process and has
been primarily developed for portable digital audio applications. It gets its input from two
analog audio outputs (DACA_L and DACA_R) of MSP 34x0G. The gain of the output is
adjustable by the feedback resistor between the inputs and outputs.
10.10.2 Features
● Wide temperature range
● No switch ON/OFF clicks
● Excellent power supply ripple rejection
● Low power consumption
● Short-circuit resistant
● High performance
● High signal-to-noise ratio
● High slew rate
● Low distortion
● Large output voltage swing.
10.10.3. Pinning
OUTA
INA(neg)
INA(pos)
V
SS
TDA1308
1
2
3
4
8
7
6
5
MKA779
V
DD
OUTB
INB(neg)
INB(pos)
30
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10.11. TDA1905
10.11.1. General Description
The TDA1905 is a monolithic integrated circuit in POWERDIP package, intended for use
as low frequency power amplifier in a wide range of applications in radio and TV sets:
– muting facility
– protection against chip over temperature
– very low noise
– high supply voltage rejection
– low “switch-on” noise
– voltage range 4V to 30V
The TDA 1905 is assembled in a new plastic package, the POWERDIP, that offers the
same assembly ease, space and cost saving of a normal dual in-line package but with
a power dissipation of upto 6W and a thermal resistance of 15°C/W (junction to pins).
10.11.2. Absolute Maximum Ratings
31
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10.11.3. Electrical Characteristics
32
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10.11.4. Muting Function
33
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10.SERVICE MENU SETTINGS
Remote control code for opening the SERVICE MENU: MENU 4725