Goldstar FFH-565AX, ffh-363ax Service Manual
- 28 -
Pre Out
Ch2
3.3µF
3.3µF
3.3µF
3.3µF
3.3µF
1000µF
1000µF
47µF
47µF
47µF
0.018µF
1000µF
3.3µF
47µF
1.2µF
100
µF
R . R
Vcc
1000
µF
47µF
0.018µF
10kΩ
10kΩ
150kΩ
150kΩ
1MΩ
2.2kΩ
2.2kΩ
Rec IN
Ch2
Rec
IN
Rec IN
Ch1
ALC
Rec Out
Ch2
180kΩ
180kΩ
Gv
Gvo
180kΩ
180kΩ
1kΩ
1kΩ
1kΩ
1kΩ
100kΩ
100Ω
10kΩ
10kΩ
10Ω
300kΩ
9.1kΩ
100Ω
Pre IN
Ch2/B
(Play Rec)
Pre IN
Ch2/A
(Play only)
Pre IN
Ch1/B
(Play Rec)
Pre Out
Ch1
Pre IN
Ch1/A
Ch1/B
NF
Ch2/A
Ch1/A
Ch1/B
Gvo
Gv
Gvo
Gv
Vcc
M
N
NF
NF
Ch1
Ch1
Ch2
Gvc
GV
Ch2
ALC
GND
Rec
15
14
13
12
11
23
24
1
2
161718192122
IN
Vref1
Vref
Vref2
A/B
Metal
Out
Pre
Out
REC
Out
Rec Out
Ch1
Mix
Out
GND1 M/N
6.8kΩ
A
B
1000pF
1000pF
6.8kΩ
9.1kΩ
20
10 9876435
M/N
REC SW REC SWGND P/B SW P/B SWCONT GND GNDV
CC
123456789
■ BA3126N
■ KIA6289N
INTERNAL BLOCK DIAGRAM OF ICs
■ LA1837
- 29 -
■ KIA7805 P/PI ~ KIA7824P/PI
3
1
2
4
R
12
R
1
C
21
R
12
Q
1
Q
7
Q
13
Q
10
Q
6
Q
5
Q
4
Q
3
Q
11
Q
15
Q
14
Q
9
Q
8
Q
16
Q
17
Q
INPUT
OUTPUT
GND
2
Q
1
Z
18
R
8
R
9
R
13
R
11
R
17
R
5
R
6
R
1
R
2
RR
16
R
20
R
19
R
14
R
10
R
7
R
■ LC72723M
+5V
+5V
VREF
CINFLOUTVREF
Vdda
Vssa
MPXIN
TEST
XIN XOUT
Vssd
Vddd
RDCL
RDDA
MODE
RST
RDS-ID
READY
CLK(4.332MHz)
SMOOTHING
FILTER
OSC
PLL
(57kHz)
DATA
DECODER
RAM
(128bit)
RDS-ID
DETECT
CLOCK
RECOVERY
(1187.5Hz)
ANTIALIASING
FILTER
REFERENCE
VOLTAGE
57kHz
BPF
(SCF)
TEST
- 30 -
Control circuit
12-bit shift register
Latch
Output buffer
(open drain)
1Vss
2DATA
3CLOCK
4Q0
5Q1
6 Q2
7Q3
8Q4
16 VDD
15 Q11
14 Q10
13 Q9
12 Q8
11 Q7
10 Q6
9 Q5
Pin No.
Pin name Function
BU2090/F/FS BU2092/F BU2092/FV
1 1 1 Vss GND
2 2 2 DATA Serial data input
3 3 3 CLOCK Data shift clock input
- 4 4 LCK Data latch clock input
4 5 5 Q0 parallel data output
5 6 6 Q1 parallel data output
6 7 7 Q2 parallel data output
7 8 8 Q3 parallel data output
8 9 9 Q4 parallel data output
9 10 10 Q5 parallel data output
10 11 11 Q6 parallel data output
- - 12 N.C. Not connected
- - 13 N.C. Not connected
11 12 14 Q7 parallel data output
12 13 15 Q8 parallel data output
13 14 16 Q9 parallel data output
14 15 17 Q10 parallel data output
15 16 18 Q11 parallel data output
- 17 19 OE Output Enable
16 18 20 V
DD Power supply
PIN DESCRIPTION
■ BU2090F
Block diagram
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