Page 1
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REC SW REC SWGND P/B SW P/B SWCONT GND GNDV
CC
123456789
■ BA3126N
■ KIA6225P/S
INTERNAL BLOCK DIAGRAM OF ICs
■ LA1837
Page 2
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■ KIA7805 P/PI ~ KIA7815 P/PI
■ BU1923(FOR RDS/RBDS)
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Control circuit
12-bit shift register
Latch
Output buffer
(open drain)
1Vss
2DATA
3CLOCK
4Q0
5Q1
6 Q2
7Q3
8Q4
16 VDD
15 Q11
14 Q10
13 Q9
12 Q8
11 Q7
10 Q6
9 Q5
Pin No.
Pin name Function
BU2090/F/FS BU2092/F BU2092/FV
1 1 1 Vss GND
2 2 2 DATA Serial data input
3 3 3 CLOCK Data shift clock input
- 4 4 LCK Data latch clock input
4 5 5 Q0 parallel data output
5 6 6 Q1 parallel data output
6 7 7 Q2 parallel data output
7 8 8 Q3 parallel data output
8 9 9 Q4 parallel data output
9 10 10 Q5 parallel data output
10 11 11 Q6 parallel data output
- - 12 N.C. Not connected
- - 13 N.C. Not connected
11 12 14 Q7 parallel data output
12 13 15 Q8 parallel data output
13 14 16 Q9 parallel data output
14 15 17 Q10 parallel data output
15 16 18 Q11 parallel data output
- 17 19 OE Output Enable
16 18 20 V
DD Power supply
PIN DESCRIPTION
■ BU2090F
Block diagram
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■ TDA7265
■ BA3308
+5V
18K15K
IN (L)
1µF
15K 1µF
MUTE/
ST-BY
GND
IN (R)
1µF
4.7Ω
4.7Ω
100nF
100nF
OUT (L)
OUT (R)
1000µF
1000µF
+V
S
3
5
7
9
6
11
2
4+
+
-
-
D94AU085
RL (L)
RL (R)
-V
S
µP
560Ω
18K
IN- (L)8
10 IN- (R)
1
560Ω
18K
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B01 B02 B03 B04 I01 I02
XIN
PD
AIN
AOUT
IFIN
XOUT
FMIN
AMIN
CE
DI
CL
D0
VDD
VSS
REFERENCE
DIVIDER
PHASE DETECTOR
CHARGE PUMP
UNLOCK
DETECTOR
UNIVERSAL
COUNTER
DATA SHIFT REGISTER
LATCH
12bits PROGRAMMABLE
DIVIDER
SWALLOW COUNTER
1/16. 1/17 4bits
POWER
ON
RESET
CCB
I/F
1
2
■ LC72131, 72131M
■ TDA7440D
L-IN1
100K
100K
100K
100K
100K
100K
100K
100K
48918
27
21
22
20
26
24
25
LOUT
SCL
SDA
DIG_GND
ROUT
V
S
AGND
R
B
R
B
14 15
10 11 19 12 13 23
5
G
G
6
7
3
2
INPUT MULTIPLEXER
+GAIN
MUXOUTR INR TREBLE(R) BIN(R) BOUT(R) CREF D98AU883
0/30dB
2dB STEP
MUXOUTL
VOLUME TREBLE
I CBUS DECODER + LATCHES
BASS
SPKR ATT
LEFT
VOLUME TREBLE BASS
SUPPLY
V
REF
SPKR ATT
RIGHT
INL TREBLE(L) BOUT(L)BIN(L)
1
28
L-IN2
L-IN3
L-IN4
R-IN1
R-IN2
R-IN3
R-IN4
2
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