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J361Y
Schematics
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Fujitsu J361Y Schematics

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5
J361Y-SB Rev_V3.06(06/16/2005)
91.3H801.001
4
3
http://hobi-elektronika.net
J
2
1
D D
C C
B B
A A
Sheet
Cover pageSheet 1 Sheet 2 Sheet 3 Sheet 4 GPIO Table Sheet 5 Sheet 6 Sheet 7 Sheet 8 Sheet 9 Sheet 10 Sheet 11 Sheet 12 Sheet 13 Sheet 14 Sheet 15
Sheet 17 TMDS Transmitter & conn Sheet 18 Sheet 19
Sheet 21 M1573 PCI/RTC/AC97/LPC/MISC Sheet 22 Sheet 23 Sheet 24 Clock GEN Sheet 25
5
Block Diagram
POWER DELIVERY CHART
Rev Notes
Althon64/64FX HT I/F
Althon64/64FX DDR I/F
Athlon64/64FX Misc
Althon64/64FX PWR & GND
Unbuffered DDR 1,2
SSTL-2 Termination Res
RS482M-HT LINK & DVO I/F
RS482M-DAC/LVDS/MIS/CLK/PM
RS482M-PCIE & A-Link
RS482M-POWER and Ground
LVDS ConnSheet 16
TV OUT Conn
VGA FILTER/CRT CONN
M1573 ALinkSheet 20
M1573 SATA & IDE I/F
M1573 USB/AC97/RESUME
IDE and SATA CONN
4
Sheet
Sheet 26 Sheet 27 Sheet 28 Sheet 29 Sheet 30 Sheet 31 Sheet 32 Sheet 33 Sheet 34 Sheet 35 Sheet 36 Sheet 37 Sheet 38 Sheet 39 Sheet 40 Sheet 41 Sheet 42 Sheet 43 Sheet 44 Sheet 45 Sheet 46 Sheet 47 Sheet 48 Sheet 49 Sheet 50
3
USB CONN BIOS /Battery RTC SIO DM1737 & FDD Conn KB/MS PS2 CONN COM & PARALLEL PORT TPM R5C842-PCI I/F and 1394 R5C842-MDIO I/F and CB I/F CardBUS Slot and 1394 Conn MS/SD/xD CARD Conn PCI Riser Slot LAN AUDIO CODEC AUDIO CONN Front Board Header & Buzzer LED/FAN/PWRBTN USBPOWER&PWRCTL Dual_5V_3.3V_1.8V & 3.3VSB VDDIO and DDRVTT Regulator VCC18_RUN & VCC12_RUN VCC_Core(ISL6559) PWR Sequence controller ATX 24Pin conn Screw Hole CLK MAP
2
<Core Design>
Wistron Incorporated
21F, 88, HsinTai WuRd
Title
Cover Page
Size DocumentNumber Rev
Custom
J361Y RS48 2 + M 1 5 7 3
Date: Sheet
Hsichih, Taipei
1
of
150Thursday, June 16, 2005
1A
PDF created with pdfFactory trial version www.pdffactory.com
5
Block Diagram
4
3
2
1
http://hobi-elektronika.net
B
ExternalClock Gen
D D
CLK GEN ICS951412
VRM ISL6559 4Phase
VCORE
AMD Althon64/64FX (Socket uF CBGA939) Processor
DDR266/333/400
DDR266/333/400
HyperTransport
- 16x16/1GHz
OUT
BW:2000MT/s or
RS482M only
LVDS
TMDS
C C
CH7301C-T
Parallel ATA Devices
12 bits DVO I/F
1 Channel
IDE I/F
4000Mbyte/s
ATI NB RS482/482M(LVDS)
HyperTransportLIN0 CPU I/F Integrated Graphics -CRT/TV-out/LVDS ExternalGraphics-DVO 1 16x PCIE I/F
A-Link1X2 Lanes (Up to 4 Lanes)
PCI-E 4X1 Lanes
South Bridge - ULi M1573
IN
A-LinkExpress I/F 1X2 Lanes
Canextendup to 1X4 Lans
RGB
Y/C/COMP S-Video out andY/Pr/Pb HDTV
PCI2.3 - 33MHz
Serial ATA Devices
3Channel
SATA 1.0
8Ports
REAR 2*2
B B
Front 1*2 Internal 2*1
USB Port
USB 1.1/2.0 I/F
A-Link1X2 Lanes(Up to 4 Lanes) SATA 1.0 4 ports IDE Bus 2-Channel
AC'97/HD Aud i o I/F
USB2.0-8 ports LPC I/F INT RTC PCI I/F
AC'97 2.3/HD Audio I/F
Ricoh ­R5C842
Channel A
-DIMM1
Channel B
-DIMM2
CRT
TV-OUT
PCIRiser Slot
PCMCIA/PCcard-2 Slots
SD/MMC/MS/MS Pro/xD
1394 *2
BCM4401/5705M/5788M 10/100 and GigaLAN dual-layout
LPC BUS
TPM
SMSC LPC SIO DM1737
FLASH BIOS
AC'97 Codec ALC655/ALC250
A A
5
FDD
LPT
PS2 KB/MS
Serial Port*2
Port A : Line_OUT(Orange/Consumer)
Port A : Line_OUT(Lime/Corporate)
4
RiserMR Slot
Port B : Line_IN(Light Blue)
Port C : SPDIF (Black)
HD Codec ALC880/ALC260
MIC IN : Pink
Front Audio
Rear
port 1 Audio port
3
HEADPHONE OUT : BLACK
Front Audio port 2
<CoreDesign>
Title
Block Dia gram
Size Document Numbe r Rev
Custom
J361YRS482+M1573
2
Date: Sheet
1
Wistron Inc orporate d
21F, 88, HsinTai WuRd Hsichih,Taipei
of
250Thursday,June 16, 2005
PDF created with pdfFactory trial version www.pdffactory.com
1A
5
Power Delivery
AcBel Power Supply ACPI4PC49
VCC3_3
VCC5
VCC5SB
+/-5%
+/-5%
10.7A
2.5A
D D
+/-5%
7.46A
Total 54.8W Max
VCC-12V +/-5%
0.1A
VCC12/+12Vcore +/-5% 10.7A
Total 180W Max
+12VL +/-5%
4.0A
VCC12VL (S0, S1)
VCC5 (S0, S1)
VCC5SB (S0,1,3,5)
6Pins Panel power conn
VCC12VL
4.0A
+12Vcore (S0,S1)
NMOS PHD45N03LTA PMOS AP20P02J
4
DDR_VCC5_DUAL (S0,1,3,5)
3
http://hobi-elektronika.net
P
VDDIO 2.6V SW REGULATOR APW7057KC
VCC5 (S0, S1)
33mA
VRM SW REGULATOR ISL6559
VCC2.5V_SUS (S0,S1,S3)
12.27A
2.5V LDO APL1087
VCC_CORE(S0,S1)
80A
DDRVTT 1.3V APL5331U5C
VDDA (S0,S1)
DDR_VTT (S0,S1,S3)
VCC2.5V_SUS (S0,S1,S3)
1.25A
VLDT (S0, S1)
DDR_VTT (S0,S1,S3)
VCC2.5V_SUS (S0,S1,S3)
8.52A
0.19A
0.5A
2.31A
ATHLON64 CP U
VDDA 2.5V 33mA
VDDCORE 0.8-1.55V 80A
DDR400 MEM I/F VTT 1.3V
0.19A, VDDIO 2.6V 1.25A VLDT 1.2V 0.5A
DDR400DIMMs
VTT 1.3V 2.31A, VDDIO 2.6V 8.52A
2
VCC3_3(S0,S1)
400mA
CLK GEN ICS953803-LF
CLK_3.3V 400mA
1
VCC3_3 (S0, S1)
C C
B B
A A
5
VCC5 (S0, S1) 2A
VCC5SB (S0,1,3,5)
VCC3_3 (S0, S1) 2A
VCC3_3SB (S0,1,3,5)
VCC5SB (S0,1,3,5)
VCC5 (S0, S1)
VCC5SB (S0,1,3,5)
CEM9939A
CEM9939A
VCC3_3SB APL1085
VCC5_ Dual_842 (S0,1,3, 5) VCC3_ 3Dual_842 (S0, 1,3,5)
CEM9939A
CEM9939A
R5534V
VCC3_3SB (S0,1,3,5)
AVPP
BVPP
PCMCIAx2Slot
xVCC Min
2.0A
VCC3_3Dual
CEM9939A
(S0,1,3,5)
VCC5_USB_R
2A
(S0,1,3)
AVCC
BVCC
USB x4 Rear
VCC5_USB_R VCC5_USB_F
2.0A
4
VCC5_USB _F (S0,1,3)
VCC5 (S0, S1)
2A
VCC3_3 (S0,1)
USB x2 Front & x2Header
2.0A
VCC12_RUN 1.2V SW REGULATOR APW7057KC
VCC18_RUN 1.8V SW REGULATOR APW7057KC
VCC 1.8_DUAL APL1087
VCC12 (S0,1)
VCC3_3(S0,S1) 0.3A
VCC3_3Dual (S0,1,3,5)
VCC5 (S0, S1)
VCC-12 (S0,1)
PCI Slot Max25W
5V
3.3V 12V
3.3Vaux
-12V
8.25A
VDD_CORE_N B( S0,S1) 5A
4.75A
VDD18 (S0, S1)
AVDDQ(S0,S1) LPVDD(S0,S1 )
LVDDR18A(S0,S1)
PLLVDD/HTPVDD (S0,S 1)
1.3A
SBVCORE_1D8V(S0, S1)
PCI E_1D8V(S0,S1) PCIE_VDDA(S0,S1)
SATA_1D8V(S0,S1)
VCC3_3Dual (S0,1,3,5) VCC_CORE(S0,S1) VCC3_3(S0,S1) 200mA
3V_DUAL_IO(S0,1,3,5)
5.0A
7.6A
0.5A
0.375A
0.1A
3
VLDT (S0, S1)
VDDR3(S0,S1) AVDD(S0,S1)
NB ATI-RS480M (Max ?mW)
0.5A
VDDHT 1.2V/0.5AI/O Power for HT I/F VDD_CORE 1.0~1.2V/5A for NB ASIC core power
2.25AVDDA12(S0, S1)
VDDA12 1.2V/2.25A for PCIEI/Fmain power
2AVDD_DVO (S0, S1)
VDD_DVO 1.8V/2A for DVOI/FIO power
0.2A
VDD_18 1.8V/0.2A for CORE transform power
0.75AVDDA18(S0, S1)
VDDA_18 1.8V/0.75A for PCIEI/F output driver I/O POWER and PLL
AVDDQ1.8V for Band gap ref voltage for DAC AVDDDI 1.8V Digital power for DAC
LPVDD 1.8V for LVDS PLL LVDDR18D 1.8Vfor LVDS Digital POWER LVDDR18A 1.8V for LVDS Analog POWER PLLVDD/HTPVDD 1.8V for PLL&HT PLL
VDDR3 3.3V for 3.3VI/O POWER AVDD 2.5V or 3.3V for DACAnalog power
SB ULi-M1573 (Max 3.6W)
0.6A
VDD18M_CORE1.8V/0.6A for main cor e power
0.4A
PCE_VDD/PCE_VTT1.8V/0.4A for PCI-EPHYpower
0.15A
PCE_VDDA 1.8V/0.15A for PCI-E PLL analogpower
0.15A
SATA_18M1.8V/150mA for SATA analog power VDD33R_RTC 3.3V RESUME power f or RTCPOKcircuit
10mA
VDD_CPU 1.2V/10mA post driver power for CPU I/F VDD33M_IO3.3V/0.2A for 3.3V Driving I/Fpower
100mAVCC18_DUAL(S0,1,3,5)
VDD18R_CORE 1.8V/0.1A for 1.8V RESUMEpower
100mA
VDD33RUSB 3.3V/0.1A for RESUME power forUSBPHY
10mA
VDD33R_IO 3.3V/ 10mA f or RESUME power for 3.3V driving I/F
Ricoh R5C842
VCC3_3(S0,S1)
2
160mA
Power Supply Current, operating Max 160mA
<Core Design>
Title
Power Delivery
Size Document Number Rev
Custom
J361Y RS482+M1573 1A
Date: Sheet
1
Wistron Incorporated
21F, 88, Hsin TaiWu Rd Hsichih, Taipe i
of
350Thursday, June 16, 2005
PDF created with pdfFactory trial version www.pdffactory.com
PME event output
5
PCI
Device
R5C842
PCI RISER
D D
PCI LAN
IDSEL
AD21
AD19 AD20
AD22
GNTJ/REQJ
PREQJ3/PGNTJ3
PREQJ0/PGNTJ0 PREQJ1/PGNTJ1
PREQJ4/PGNTJ4
IRQ
PIRQJD,A,B,C
PIRQJA,B,C,D PIRQJB,C,D,A
PIRQJE
SMSC DM1737
GPIO #
GP10 GP11
C C
GP12 GP13 GP14 GP21
GP22
GP27
GP33 GP36 GP37 GP40 GP42 GP43 GP50
B B
GP51 GP52 GP53 GP54 GP55 GP56 GP57 GP60 GP61
Mux Function
RST_IDE*
LAN_DISJPCIRST_OUT1
SLP_S1_S5_L*
SUSLED*PCIRST_OUT4 KBDATA KBCLK
MSDATA MSCLK KBRST*
A20GATE
IO_PMES3# IO_PMES5# RI*2 DCD*2 RXD2 TXD2 DSR*2 RTS*2 CTS*2 DTR*2
TVLED*
LCDONJ_SIO
4
Active Status
LOW
LOW
LOW
I/O
O
MAIN (VCC) AUX (VTR)
O O
AUX (VTR) AUX (VTR)
O O
AUX (VTR) MAIN (VCC)
I
MAIN (VCC)
I I
MAIN (VCC) MAIN (VCC)
IGP32 I
MAIN (VCC)
I
MAIN (VCC) MAIN (VCC)
I
MAIN (VCC)
O
AUX (VTR)
O O
AUX (VTR) MAIN (VCC)
I
MAIN (VCC)
I
MAIN (VCC)
I I
MAIN (VCC)
I
MAIN (VCC)
I
MAIN (VCC) MAIN (VCC)
I I
MAIN (VCC) AUX (VTR)
O O
AUX (VTR)
3
2
1
http://hobi-elektronika.net
ATI RS482/482M
GPIO #
DFT_GPIO0 DFT_GPIO1 DFT_GPIO2 DFT_GPIO3
Mux Function
LOAD_ROM_STRAPS#
GPIO Function
TV_SWITCH
D_PLUGDET DFT_GPIO4 DFT_GPIO5
ULi M1573
GPIO #
RUNGPIO0
LOAD_MEM_STRAPS#
Mux Function
GPIO Function
RUNGPIO1 RUNGPIO2 RUNGPIO3
POWERGPIO Function
Active Status
Low Low/Default high
RUNGPI18 ACB_BITCLK BOARD_ID_0 I VDD33M_IO RUNGPI11 VOL_UP# BOARD_ID_1 I VDD33M_IO RUNGPI12 VOL_DOWN# BOARD_ID_2 I VDD33M_IO
MO_DET
RUNGPI13 VOL_MUTE# BOARD_ID_3 I VDD33M_IO
Low@S0/ S1/ S3 / High@S4/ S5
Low
RUNGPI9 CLKRUN# CRT_TMDS_DISJ O VDD33M_IO HIGH RUNGPO[13] CPUHI# Blueled* O VDD33M_IO HIGH RUNGPO[16] IGNNE# Blueled02* O VDD33M_IO HIGH
RUNGPO[19] NMI HDDLED O VDD33M_IO HIGH
RUNGPO[21] SMI# Blueled03* O VDD33M_IO HIGH
LCD_VID0
Low
SATA_GPI1 SATA_GPI2
LCD_VID1 VDD33M_IO LCD_VID2
SATA_GPI3
PME event output PME event output
SATA_GPO0 SATA_GPO1
FlashROM_WP SATA_GPO2 SATA_GPO3 RSMGPIO0
PWRLED* USBPWR_Ctrl
RSMGPIO1
ACPI_S3 842HWSPNDJ IO_PMES3#SMBALERT#
High / push-pull Low/ S5 wake up event
RSMGPIO3 RSMGPI10
SLPBTN# IO_PMES5#
I/O
I I O I I I
I/O
I O
POWER
VDDR3 VDDR3 VDDR3 VDDR3 VDDR3 VDDR3
POWER
VDD33M_IOIDE_P VDD33M_IO VDD33M_IO
I
VDD33M_IO
I
VDD33M_IOSATA_GPI0 I I
VDD33M_IO I
VDD33M_IO
VDD33M_IO
O O
VDD33M_IO
VDD33M_IO
O
VDD33M_IO
O
VDD33R_IO
O
VDD33R_IO
OACPILED* O
VDD33R_IO O
VDD33R_IO
VDD33R_IO
I IRSMGPIL[0] VDD33R_IO
Active Status
Low
1:D-Video 0:S-Video
0: HDTV connected 1: HDTV unconnected
Low
Active Status
High LOW
0: MO connected 1: MO unconnected
LOW
High/Default L OW
LOW LOW
Consumer: S3->H, S4/S5->L Corporate: S3/S4->H, S5->L
HIGH S3:HighRSMGPIO2
High
PME event input PME event input
A A
5
4
3
2
<Core Design>
Wistron Incorporated
21F, 88, HsinTaiWu Rd
Title
GPIO Table
Size Document Number Rev
Custom
J361Y RS482+M1573
Date: Sheet
Hsichih, Taipei
450Thursday,June 16, 2005
1
of
1A
PDF created with pdfFactory trial version www.pdffactory.com
8
Rev. Notes
R
7
6
5
4
3
2
1
http://hobi-elektronika.net
Rev Description PageDATE
3/10 SA_V1.0
SA_V1.1 Add Board_ID_[3..0] setting 22
D D
3/15 Modify VDD_DVO power for RS482 revA11 15
SA_V1.2 Change L33 223/15
SA_V1.33/16 Modify DLINE circuit 18
SA_V1.43/16 MoveR664 and R97 to Page17. Delete R665 and R666 13,17,19
Twocopper pure for VTT fill - at least 100mils wide/Change DDR_VTT_CPUas DDR_VTT 7,8
C C
SA_V1.63/21 SWAP USB Port 26
SA_V1.8 Modify LAN Disable circuit 373/22
3/23 Add 6559_Common Ground 46SA_V1.9
SA_V1.10
SA_V1.11 Net Swap3/24 SA_V1.123/25 Add Twocapaci tors for EMI 38 SA_V1.13 Change Q70 to 3904 NPN BJT 42 SA_V1.163/30 Rename Reference and swap nets
3/31 SA_V1.17 Connect H7 to AGND
SA_V1.184/06 Add CLOCK MAP 50
B B
NOTE :
Release Schematic
Add PIRQ#[E:H] pullhigh 36 Add CN41 28 HW strapping setting 13,21,22,23 Modify Front HP OUT Mute circ uit 39
24Modify Net REFCLK0_1 and REFCLK0_2
Change R92 to 2.4K ohm 17 Modify DVO_IDCKN and DVO_IDCKP 17 ModifyTMDSHotPlugcircuit 17 Modify TV-out I2C circuit 18
Modify DVO_VREF circuit 17
Modify VRMCircuit (Vendor suggestion) 46 Change M1573 HW strapping resistors to 1K ohm 21 Change R536 and R538 to 1K ohm and change R554 to 5.1K (Vendor suggestion) 46 Modify SB&NBPOWER Good circuit 47
ModifyTMDSHotplug circuit 15
Delete R669 and R670 18 DeleteTC86 32 Modify DLINE circuit 18 Change M1573 to RevA1D 20-23 Add LAN Disable circuit 37 Delete TC39 for Extra 4 CPU FANSINK screw hole3/19 SA_V1.5 46 Change C763 to a small size 40 Modify FJ's checklist items
SMBCLK and SMBDATA (SIO Page) 28SA_V1.7 Modify SUSLED* circuit 41
Modify NB_RST*circ uit 20
Change PCI RST circuit from VC C3_3D UAL driven to VCC3_3SB USE CLKRUN# of M1573(RUNGPO9) to disable CRT and TMDS Modify GPIO arrangement Add another pair of SM bus dedicate for CLK GEN and DDR
47Connect ASIC8M_CPU_RSTto LDTREST#3/14
14Change R74 and R75 to 8.25K and 82.5 ohm (ATI PA_RS4X0F4.pdf
Rev Description PageDATE
SB_V2.0
0422 Modify All SA P/R rework items and FJ GFX_Feedback
SB_V2.10426 Modify R354 and R744 and FJ GFX Feedback ver.0427 47
0427 Swap ACZ_SDIN0and ACZ_SDIN1 at SB side 23
SB_V2.2 LO_Rcan't be connected with Mute_LO. 39
Add R746/R747/R748 23 Change C267 to 0.018uF and R418 to 60.4 ohm 44 Add R749 27 Modify LAN_RSTJsignal 37 RemoveJP2 and around circuit Change Pin assignment of CN39 Modify LCD PW RON cir cuit 37 Add USB ESD IC 26 Add COMMON GND fo r SW r egulator 44,45 Change TC35 to 220uF
Modify SUSLED circuit 41 ModifyFAN Tach circuit 41 Modify GPIOassignment forLED function Modify PCI Riser IDSEL 36 Add FlashRom_write protect functi on
0508 SB_V2.5 Modify USBPWR control circuit 42
0509 SB_ V2.6 Modify VDDA_2.5V_CPU Enable circuit 08
SB_V2.70510 Remove Q73 and ACZ_RST_CRL* 40
0511 SB_V2.8 Add SLP_S4_H to control USB power 23/42
SB_V2.10 USE CRT_TMDS_DISJ to do mute func ti on 40
SB_V2.110512 Modify VLDT_EN circuit 45
0517 SB_V2.13 Change Q105 to FET(2N7002)
0524 R129 unmount, L66 change to 63.R0004.151 0525 R59 R777 change to 0 ohm, Q103 Q15 change to 2N7002 41
Add Two more GPIO pin for IO_PMES3# and IO_PMES5#
Modify SUSLED circuit 41 Modify TVON_Plugcircuit 41 Modify All LED circuit 41 ModifyBIOS write protection circuti 27 Add a pull-up resistor on Mute# 40 Change R557 to 100K ohm
1394 port 0 and port1 swap
Modify All LED circuit 41 Modify USBPOWERcontrollercircuit 42 Add two 1K ohm between VCC5_USB_F"/VCC5USB_R" and GND 42 RemoveD31 and R517. Then change R518 from 1k-ohm to 0ohm and unmount as default. [ESD for DDC]
Change R775.1 to VCC5 08
Change Q55 to 2N7002 and r emove R768SB_V2.9 41
Change BOM opti on for Audio function 40 Reserve3.3V pull-up forFansink 41
Modify USB power control circuit 42
Unmount R8SB_V2.120513 41
Change Boar d ID
Change C67 to X7R Change R512 for Consumer/LCDPC ,Change R508 for Corpor ate Change C88 and C413 to X5R mount C691 and C692 24 R13 R14 change to 1Kohm , RN1change to 1K ohm 28 U58 U59 U60 change to 83.01293.0AE 26
Consuemr M/B: Board_ID[3..0] = "0001" Corporate M/B: Board_ID[3..0] = "1000" Small Qty M/B: Board_ID[3..0] = "0010"
21 40
46Add commonground near VRD low side MOSSB_V2.30505
29 17/19
28/41Modify TVON_PLUSE3.jpg
40 21
16 29
32 26
32 38
A A
PDF created with pdfFactory trial version www.pdffactory.com
8
7
6
<CoreDes ign>
Title
Rev Notes
Size Document Number Rev
Custom
J361Y RS482+M1573
Date: Sheet
5
4
3
2
Wistron Incorporated
21F, 88, Hsin Tai WuRd Hsichih, Taipei
of
550Thursday,June 16,2005
1
1A
8
Processor HyperTransport Interface
7
6
5
4
http://hobi-elektronika.net
P
VLDT
3
2
1
D D
12
12
C170
C179
SC4D7U10V-U
SCD22U10V3KX
C C
12
12
C172
SCD22U10V3KX
L0_CADIN_L[0..15]12 L0_CADIN_H[0..15]12
12
C171
C168
SCD22U10V3KX
SCD22U10V3KX
L0_CADIN_L[0..15]
L0_CADIN_H[0..15]
20/5/5/5/20 1"<x<12"
B B
At least 200mils for pure and 20mils to pin
VLDT
L0_CADIN_H15 L0_CADIN_L15 L0_CADIN_H14
L0_CADIN_H13 L0_CADIN_L13 L0_CADIN_H12 L0_CADIN_L12 L0_CADIN_H11 L0_CADIN_L11 L0_CADIN_H10 L0_CADIN_L10 L0_CADIN_H9 L0_CADIN_L9 L0_CADIN_H8 L0_CADIN_L8 L0_CADIN_H7 L0_CADIN_L7 L0_CADIN_H6 L0_CADIN_L6 L0_CADIN_H5 L0_CADIN_L5 L0_CADIN_H4 L0_CADIN_L4 L0_CADIN_H3 L0_CADIN_L3 L0_CADIN_H2 L0_CADIN_L2 L0_CADIN_H1 L0_CADIN_L1 L0_CADIN_H0 L0_CADIN_L0
L0_CLKIN_H112
L0_CLKIN_L112 L0_CLKIN_H012
L0_CLKIN_L012 L0_CTLIN_H012
L0_CTLIN_L012
L0_CLKIN_H1 L0_CLKIN_L1
L0_CLKIN_H0 L0_CLKIN_L0
L0_CTLIN_H0 L0_CTLIN_L0
20/5/5/5/20 1"<x<12"
VDD_HT0_IN
U34A
E2
VLDT_06
E1
VLDT_05
F1
VLDT_02
F2
VLDT_01
R5
L0_CADIN_H15
T5
L0_CADIN_L15
P3
L0_CADIN_H14
P4
L0_CADIN_L14
N5
L0_CADIN_H13
P5
L0_CADIN_L13
M3
L0_CADIN_H12
M4
L0_CADIN_L12
K3
L0_CADIN_H11
K4
L0_CADIN_L11
J5
L0_CADIN_H10
K5
L0_CADIN_L10
H3
L0_CADIN_H9
H4
L0_CADIN_L9
G5
L0_CADIN_H8
H5
L0_CADIN_L8
R3
L0_CADIN_H7
R2
L0_CADIN_L7
N1
L0_CADIN_H6
P1
L0_CADIN_L6
N3
L0_CADIN_H5
N2
L0_CADIN_L5
L1
L0_CADIN_H4
M1
L0_CADIN_L4
J1
L0_CADIN_H3
K1
L0_CADIN_L3
J3
L0_CADIN_H2
J2
L0_CADIN_L2
G1
L0_CADIN_H1
H1
L0_CADIN_L1
G3
L0_CADIN_H0
G2
L0_CADIN_L0
L5
L0_CLKIN_H1
M5
L0_CLKIN_L1
L3
L0_CLKIN_H0
L2
L0_CLKIN_L0
R1
L0_CTLIN_H0
T1
L0_CTLIN_L0
SKT-K8-2
VLDT_08 VLDT_07 VLDT_04 VLDT_03
L0_CADOUT_H15 L0_CADOUT_L15 L0_CADOUT_H14 L0_CADOUT_L14 L0_CADOUT_H13 L0_CADOUT_L13 L0_CADOUT_H12 L0_CADOUT_L12 L0_CADOUT_H11 L0_CADOUT_L11 L0_CADOUT_H10 L0_CADOUT_L10
L0_CADOUT_H9 L0_CADOUT_L9 L0_CADOUT_H8 L0_CADOUT_L8 L0_CADOUT_H7 L0_CADOUT_L7 L0_CADOUT_H6 L0_CADOUT_L6 L0_CADOUT_H5 L0_CADOUT_L5 L0_CADOUT_H4 L0_CADOUT_L4 L0_CADOUT_H3 L0_CADOUT_L3 L0_CADOUT_H2 L0_CADOUT_L2 L0_CADOUT_H1 L0_CADOUT_L1 L0_CADOUT_H0 L0_CADOUT_L0
L0_CLKOUT_H1 L0_CLKOUT_L1
L0_CLKOUT_H0 L0_CLKOUT_L0
L0_CTLOUT_H0
L0_CTLOUT_L0
At least 100mils to Capacitor and 20mils to pin
VDD_HT0_OUT
AG4 AG3 AG1 AG2
V4 V3 Y5 W5 Y4 Y3 AB5 AA5 AD5 AC5 AD4 AD3 AF5 AE5 AF4 AF3 V1 U1 W2 W3 Y1 W1 AA2 AA3 AC2 AC3 AD1 AC1 AE2 AE3 AF1 AE1
AB4 AB3
AB1 AA1
U2 U3
L0_CADOUT_H15 L0_CADOUT_L15 L0_CADOUT_H14 L0_CADOUT_L14L0_CADIN_L14 L0_CADOUT_H13 L0_CADOUT_L13 L0_CADOUT_H12 L0_CADOUT_L12 L0_CADOUT_H11 L0_CADOUT_L11 L0_CADOUT_H10 L0_CADOUT_L10 L0_CADOUT_H9 L0_CADOUT_L9 L0_CADOUT_H8 L0_CADOUT_L8 L0_CADOUT_H7 L0_CADOUT_L7 L0_CADOUT_H6 L0_CADOUT_L6 L0_CADOUT_H5 L0_CADOUT_L5 L0_CADOUT_H4 L0_CADOUT_L4 L0_CADOUT_H3 L0_CADOUT_L3 L0_CADOUT_H2 L0_CADOUT_L2 L0_CADOUT_H1 L0_CADOUT_L1 L0_CADOUT_H0 L0_CADOUT_L0
L0_CLKOUT_H1 L0_CLKOUT_L1
L0_CLKOUT_H0 L0_CLKOUT_L0
L0_CTLOUT_H0 L0_CTLOUT_L0
VLDT-
12
C202
SC4D7U10V-U
L0_CLKOUT_H1 12 L0_CLKOUT_L1 12
L0_CLKOUT_H0 12 L0_CLKOUT_L0 12
L0_CTLOUT_H0 12 L0_CTLOUT_L0 12
20/5/5/5/20 1"<x<12"
L0_CADOUT_H[0..15]
L0_CADOUT_L[0..15]
20/5/5/5/20 1"<x<12"
L0_CADOUT_H[0..15] 12 L0_CADOUT_L[0..15] 12
A31A1
uPGA939 Top View
<Core Design>
A A
Title
Althon64/64FXHT I/F
Size Docume nt Number Rev
Custom
J361Y RS482+M1573
Date: Sheet
8
7
6
5
4
3
AL1
Wistron Incorporated
21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei
of
650Thursday, June 16, 2005
2
1
1A
PDF created with pdfFactory trial version www.pdffactory.com
8
Processor DDR Memory Interface
P
7
6
5
http://hobi-elektronika.net
4
3
2
1
D D
MEM_DATA[63..0]10, 11
MEM_DATA[63..0]
C C
To DIMM Channel-A
MEM_CHECK _LO[7.. 0]10,11
MEM_CHECK _LO[7.. 0]
B B
MEM_DM_LO[8..0]10,11
MEM_DQS_LO[8..0]10, 11
MEM_DM_LO[8..0]
MEM_DQS_LO[8..0]
MEM_DATA63 MEM_DATA62 MEM_DATA61 MEM_DATA60 MEM_DATA59 MEM_DATA58 MEM_DATA57 MEM_DATA56 MEM_DATA55 MEM_DATA54 MEM_DATA53 MEM_DATA52 MEM_DATA51 MEM_DATA50 MEM_DATA49 MEM_DATA48 MEM_DATA47 MEM_DATA46 MEM_DATA45 MEM_DATA44 MEM_DATA43 MEM_DATA42 MEM_DATA41 MEM_DATA40 MEM_DATA39 MEM_DATA38 MEM_DATA37 MEM_DATA36 MEM_DATA35 MEM_DATA34 MEM_DATA33 MEM_DATA32 MEM_DATA31 MEM_DATA30 MEM_DATA29 MEM_DATA28 MEM_DATA27 MEM_DATA26 MEM_DATA25 MEM_DATA24 MEM_DATA23 MEM_DATA22 MEM_DATA21 MEM_DATA20 MEM_DATA19 MEM_DATA18 MEM_DATA17 MEM_DATA16 MEM_DATA15 MEM_DATA14 MEM_DATA13 MEM_DATA12 MEM_DATA11 MEM_DATA10 MEM_DATA9 MEM_DATA8 MEM_DATA7 MEM_DATA6 MEM_DATA5 MEM_DATA4 MEM_DATA3 MEM_DATA2 MEM_DATA1 MEM_DATA0
MEM_CHECK_LO7 MEM_CHECK_LO6 MEM_CHECK_LO5 MEM_CHECK_LO4 MEM_CHECK_LO3 MEM_CHECK_LO2 MEM_CHECK_LO1 MEM_CHECK_LO0
MEM_DM_LO8 MEM_DM_LO7 MEM_DM_LO6 MEM_DM_LO5 MEM_DM_LO4 MEM_DM_LO3 MEM_DM_LO2 MEM_DM_LO1 MEM_DM_LO0
MEM_DQS_LO8 MEM_DQS_LO7 MEM_DQS_LO6 MEM_DQS_LO5 MEM_DQS_LO4 MEM_DQS_LO3 MEM_DQS_LO2 MEM_DQS_LO1 MEM_DQS_LO0
AE16 AG17 AG18 AE18
AG16 AE17
AE20 AE23 AG24 AG19 AE19
AE24 AG25 AE25 AD25 AC25 AF25
AE27 AD29 AB25 AB27 AA28
AC26 AB29 AA27
AF17 AG21 AH27 AA25
AH17 AG20 AG26 AA26
AJ16
AJ18 AJ20
AJ24
AJ26
Y25
Y27 N25 M25 K27 K25 M29 M27 K29
H27 G27 D27 F25 H29 G26 E26 G25 G23 F23 C20 F19 E24 C24 G19 E19 E18 G17 E16 E15 G18 C18 G16 C16
Y29
W27
P27 R25
W26
V25 R28 P29
V29
L26 F27 G20 E17
U26
L25 E27 E20 F17
J27
U34C
MEMDATA63 MEMDATA62 MEMDATA61 MEMDATA60 MEMDATA59 MEMDATA58 MEMDATA57 MEMDATA56 MEMDATA55 MEMDATA54 MEMDATA53 MEMDATA52 MEMDATA51 MEMDATA50 MEMDATA49 MEMDATA48 MEMDATA47 MEMDATA46 MEMDATA45 MEMDATA44 MEMDATA43 MEMDATA42 MEMDATA41 MEMDATA40 MEMDATA39 MEMDATA38 MEMDATA37 MEMDATA36 MEMDATA35 MEMDATA34 MEMDATA33 MEMDATA32 MEMDATA31 MEMDATA30 MEMDATA29 MEMDATA28 MEMDATA27 MEMDATA26 MEMDATA25 MEMDATA24 MEMDATA23 MEMDATA22 MEMDATA21 MEMDATA20 MEMDATA19 MEMDATA18 MEMDATA17 MEMDATA16 MEMDATA15 MEMDATA14 MEMDATA13 MEMDATA12 MEMDATA11 MEMDATA10 MEMDATA9 MEMDATA8 MEMDATA7 MEMDATA6 MEMDATA5 MEMDATA4 MEMDATA3 MEMDATA2 MEMDATA1 MEMDATA0
MEMCHECK 7 MEMCHECK 6 MEMCHECK 5 MEMCHECK 4 MEMCHECK 3 MEMCHECK 2 MEMCHECK 1 MEMCHECK 0
MEMDM_LO8 MEMDM_LO7 MEMDM_LO6 MEMDM_LO5 MEMDM_LO4
MDM_LO3
ME MEMDM_LO2 MEMDM_LO1 MEMDM_LO0
MEMDQS_LO8 MEMDQS_LO7 MEMDQS_LO6 MEMDQS_LO5 MEMDQS_LO4 MEMDQS_LO3 MEMDQS_LO2 MEMDQS_LO1 MEMDQS_LO0
SKT-K8-2
MEMDATA127 MEMDATA126 MEMDATA125 MEMDATA124 MEMDATA123 MEMDATA122 MEMDATA121 MEMDATA120 MEMDATA119 MEMDATA118 MEMDATA117 MEMDATA116 MEMDATA115 MEMDATA114 MEMDATA113 MEMDATA112 MEMDATA111 MEMDATA110 MEMDATA109 MEMDATA108 MEMDATA107 MEMDATA106 MEMDATA105 MEMDATA104 MEMDATA103 MEMDATA102 MEMDATA101 MEMDATA100
MEMDATA99 MEMDATA98 MEMDATA97 MEMDATA96 MEMDATA95 MEMDATA94 MEMDATA93 MEMDATA92 MEMDATA91 MEMDATA90 MEMDATA89 MEMDATA88 MEMDATA87 MEMDATA86 MEMDATA85 MEMDATA84 MEMDATA83 MEMDATA82 MEMDATA81 MEMDATA80 MEMDATA79 MEMDATA78 MEMDATA77 MEMDATA76 MEMDATA75 MEMDATA74 MEMDATA73 MEMDATA72 MEMDATA71 MEMDATA70 MEMDATA69 MEMDATA68 MEMDATA67 MEMDATA66 MEMDATA65 MEMDATA64
MEMCHECK 15 MEMCHECK 14 MEMCHECK 13 MEMCHECK 12 MEMCHECK 11 MEMCHECK 10
MEMCHECK 9 MEMCHECK 8
MEMDM_UP8 MEMDM_UP7 MEMDM_UP6 MEMDM_UP5 MEMDM_UP4 MEMDM_UP3 MEMDM_UP2 MEMDM_UP1 MEMDM_UP0
MEMDQS_UP8 MEMDQS_UP7 MEMDQS_UP6 MEMDQS_UP5 MEMDQS_UP4 MEMDQS_UP3 MEMDQS_UP2 MEMDQS_UP1 MEMDQS_UP0
MEM_DATA127
AJ15
MEM_DATA126
AL16
MEM_DATA125
AL18
MEM_DATA124
AL19
MEM_DATA123
AL15
MEM_DATA122
AK15
MEM_DATA121
AK17
MEM_DATA120
AJ17
MEM_DATA119
AH19
MEM_DATA118
AL21
MEM_DATA117
AJ23
MEM_DATA116
AL25
MEM_DATA115
AK19
ME
AJ19
MEM_DATA113
AL24
MEM_DATA112
AK25
MEM_DATA111
AJ25
MEM_DATA110
AL26
MEM_DATA109
AG29
MEM_DATA108
AF31
MEM_DATA107
AH25
MEM_DATA106
AL27
MEM_DATA105
AJ31
MEM_DATA104
AG31
MEM_DATA103
AE31
MEM_DATA102
AD31
MEM_DATA101
AB31
MEM_DATA100
AA29
MEM_DATA99
AE29
MEM_DATA98
AC28
MEM_DATA97
AC31
MEM_DATA96
AA30
MEM_DATA95
M31
MEM_DATA94
L30
MEM_DATA93
H31
MEM_DATA92
G31
MEM_DATA91
L31
MEM_DATA90
L29
MEM_DATA89
J28
MEM_DATA88
G30
MEM_DATA87
E30
MEM_DATA86
C31
MEM_DATA85
C27
MEM_DATA84
D25
MEM_DATA83
E31
MEM_DATA82
C30
MEM_DATA81
B27
MEM_DATA80
A27
MEM_DATA79
C23
MEM_DATA78
B23
MEM_DATA77
A20
MEM_DATA76
B19
MEM_DATA75
A25
MEM_DATA74
A24
MEM_DATA73
C19
MEM_DATA72
A19
MEM_DATA71
D17
MEM_DATA70
B17
MEM_DATA69
C15
MEM_DATA68
A15
MEM_DATA67
A18
MEM_DATA66
C17
MEM_DATA65
D15
MEM_DATA64
B15
MEM_CHECK _UP7
AA31
MEM_CHECK _UP6
W29 N31
MEM_CHECK _UP5 MEM_CHECK _UP4
N29
MEM_CHECK_UP3
W28
MEM_CHECK _UP2
W31
MEM_CHECK _UP1
R29
MEM_CHECK_UP0
P31 V31
MEM_DM_UP8 MEM_DM_UP7
AL17
MEM_DM_UP6
AK21 AK27
MEM_DM_UP5 MEM_DM_UP4
AC29
MEM_DM_UP3
J30
MEM_DM_UP2
B29
MEM_DM_UP1
B21
MEM_DM_UP0
A16 U30
MEM_DQS_UP8 MEM_DQS_UP7
AH15
MEM_DQS_UP6
AL20 AJ27
MEM_DQS_UP5 MEM_DQS_UP4
AC30
MEM_DQS_UP3
J29
MEM_DQS_UP2
A28
MEM_DQS_UP1
A21
MEM_DQS_UP0
A17
M_DATA114
MEM_DATA[127..64]
MEM_CHECK _UP[7. .0]
MEM_DM_UP[8..0]
MEM_DQS_UP[8..0]
MEM_DATA[127. .64] 10, 11
MEM_CHECK _UP[7. .0] 10,11
MEM_DM_UP[8. .0] 10,11
MEM_DQS_UP[ 8..0] 10,11
To DIMM Channel-B
MEMZN,MEMZP with 5/10/5,<1000 mils
VCC2.5V_SUS
12
R364
34D8R3F-1
12
R355
34D8R3F-1
DDR_VTT
DDRVREF_CPU
VCC2.5V_SUS
12
C206
R301
12
100R3F
SCD01U16V3KX
12
R313
C214
12
100R3F
SCD01U16V3 KX
SC10 00P50V3KX
Two copper pure for VTT fill - at least 100mils wide
12
12
C231
C231, C229, C228, C234, C223 are the decoupling for VTT pins near Processor
MEMZN MEMZP
R340 51R3
1 2
20/15/20
DDRVREF_CPU
C205
C213
12
12
(R)
(R)
SCD1U16V3KX
TP70 TPAD28
SC4D7U10V-U
SCD22U10V3 KX
DDR_VTT
12
12
C228
SC4D7U10V-U
MEM_ADDA[13..0]10,11 MEM_ADDB[13. .0] 10,11
12
C234
C223
SCD22U10V3 KX
SCD22U10V3 KX
MEM_CS_1H_L110,11 MEM_CS_1H_L010,11
MEM_CS_1L_L110,11 MEM_CS_1L_L010,11
10/10/10
VTT_DDR_SUS_SENSE
MEM_CKEC10,11 MEM_CKEA10,11
MEM_BANKA110,11 MEM_BANKA010,11
MEM_RASA_L10,11 MEM_CASA_L10,11
MEM_WEA_L10,11
DDR_VTT
C229
DDRVREF_CPU
VTT_DDR_SUS_SE NSE
MEM_CS_1H_L1 MEM_CS_1H_L0 MEM_CS_1L_L1 MEM_CS_1L_L0
MEM_CKEC MEM_CKEA MEM_ADDA13
MEM_ADDA12 MEM_ADDA11 MEM_ADDA10 MEM_ADDA9 MEM_ADDA8 MEM_ADDA7 MEM_ADDA6 MEM_ADDA5 MEM_ADDA4 MEM_ADDA3 MEM_ADDA2 MEM_ADDA1 MEM_ADDA0
MEM_BANKA1 M
MEM_RASA_L MEM_CASA_L MEM_WEA_L
MEMZN MEMZP
EM_BANKA0
AG14 AK14
AH14
AF13 AF15
AE15
AG28 AF29
AG27 AE26
AF23
AC27 AD27
AF27 AE28
B14 C14 D14 E14
AJ14
F15
AL29 AJ29
AL28 AJ30
C25 B25 E25 G24
C26 E28 V27 F29 H25 G28
L27 L28 N26 P25 U25
W25
J26 J25
U34B
VTT6 VTT7 VTT8 VTT1
VTT5 VTT4 VTT3 VTT2
MEMVREF VTT_SENSE MEMZN
MEMZP MEMCS_1H_L1
MEMCS_1H_L0 MEMCS_1L_L1 MEMCS_1L_L0
MEMCS_2H_L1 MEMCS_2H_L0 MEMCS_2L_L1 MEMCS_2L_L0
MEMCKED MEMCKEC MEMCKEB MEMCKEA
MEMADDA13 MEMADDA12 MEMADDA11 MEMADDA10 MEMADDA9 MEMADDA8 MEMADDA7 MEMADDA6 MEMADDA5 MEMADDA4 MEMADDA3 MEMADDA2 MEMADDA1 MEMADDA0
MEMBANKA1 MEMBANKA0
MEMRASA_L MEMCASA_L MEMWEA_L
SKT-K8-2
Clock group Layout rule :20/5/5/5/20 (Target Impedance 93 ohm)
MEMCLK_1H_H2
MEMCLK_1H_L2
MEMCLK_1H_H1
MEMCLK_1H_L1
MEMCLK_1H_H0
MEMCLK_1H_L0 MEMCLK_1L_H2 MEMCLK_1L_L2 MEMCLK_1L_H1 MEMCLK_1L_L1 MEMCLK_1L_H0 MEMCLK_1L_L0
MEMCLK_2H_H2
MEMCLK_2H_L2
MEMCLK_2H_H1
MEMCLK_2H_L1
MEMCLK_2H_H0
MEMCLK_2H_L0 MEMCLK_2L_H2 MEMCLK_2L_L2 MEMCLK_2L_H1 MEMCLK_2L_L1 MEMCLK_2L_H0 MEMCLK_2L_L0
MEMADDB13 MEMADDB12 MEMADDB11 MEMADDB10
MEMADDB9 MEMADDB8 MEMADDB7 MEMADDB6 MEMADDB5 MEMADDB4 MEMADDB3 MEMADDB2 MEMADDB1 MEMADDB0
MEMBANKB1 MEMBANKB0
MEMRASB_L MEMCASB_L
MEMWEB_L
MEMRESET_L
MEM_CLK_1H_L2 MEM_CLK_1H_L1 MEM_CLK_1H_L0 MEM_CLK_1L_L2 MEM_CLK_1L_L1 MEM_CLK_1L_L0
AL22 AL23 A22 A23 R31 R30 AH23 AG23 D23 E23 R27 R26
AJ21 AH21 C21 D21 T31 U31 AF21 AE21 G21 G22 T27 U27
AK23 A26 A29 W30 C29 E29 D31 G29 F31 J31 K31 N28 N30 U29
Y31 AE30
AG30 AK29 AH31
D19
MEM_CLK_1H_H2 MEM_CLK_1H_L2 MEM_CLK_1H_H1 MEM_CLK_1H_L1 MEM_CLK_1H_H0 MEM_CLK_1H_L0 MEM_CLK_1L_H2 MEM_CLK_1L_L2 MEM_CLK_1L_H1 MEM_CLK_1L_L1 MEM_CLK_1L_H0 MEM_CLK_1L_L0
MEM_CLK_2H_H2 MEM_CLK_2H_L2 MEM_CLK_2H_H1 MEM_CLK_2H_L1 MEM_CLK_2H_H0 MEM_CLK_2H_L0 MEM_CLK_2L_H2 MEM_CLK_2L_L2 MEM_CLK_2L_H1 MEM_CLK_2L_L1 MEM_CLK_2L_H0 MEM_CLK_2L_L0
MEM_ADDB13 MEM_ADDB12 MEM_ADDB11 MEM_ADDB10 MEM_ADDB9 MEM_ADDB8 MEM_ADDB7 MEM_ADDB6 MEM_ADDB5 MEM_ADDB4 MEM_ADDB3 MEM_ADDB2 MEM_ADDB1 MEM_ADDB0
MEM_BANKB1 MEM_BANKB0
MEM_RASB_L MEM_CASB_L MEM_WEB_L
MEM_RESET_L
R430 120R3
1 2
R434 120R3
1 2
R484 120R31 2 R439 120R3
1 2
R435 120R3
1 2
R493 120R3
1 2
MEM_CLK_1H_H2 10 MEM_CLK_1H_L2 10 MEM_CLK_1H_H1 10 MEM_CLK_1H_L1 10 MEM_CLK_1H_H0 10 MEM_CLK_1H_L0 10 MEM_CLK_1L_H2 10 MEM_CLK_1L_L2 10 MEM_CLK_1L_H1 10 MEM_CLK_1L_L1 10 MEM_CLK_1L_H0 10 MEM_CLK_1L_L0 10
Unused cloc k pairs Place tes t points on thebottom layer
MEM_BANKB1 10,11 MEM_BANKB0 10,11
MEM_RASB_L 10,11 MEM_CASB_L 10,11 MEM_WEB_L 10,11
MEM_RESET_L 10
MEM_CLK_1H_H2 MEM_CLK_1H_H1 MEM_CLK_1H_H0 MEM_CLK_1L_H2 MEM_CLK_1L_H1 MEM_CLK_1L_H0
TP25TPAD28 TP26TPAD28 TP28TPAD28 TP27TPAD28 TP30TPAD28 TP29TPAD28 TP80TPAD28 TP79TPAD28 TP83TPAD28 TP84TPAD28 TP86TPAD28 TP85TPAD28
A1
A31
Data/DM/CHECKgroup Layout rule : (Target Impedance 45 ohm)
Break in/out : 15/5/15
A A
DQS group Layout rule : (Target Impedance 35 ohm)
Motherboard trace routing : 10/10/10
Break in/out : 20/5/20 Motherboard trace routing : 20/15/20
8
7
Address/Command group Layout rule : (Target Impedance 45 ohm)
Break in/out : 15/5/15 Motherboard trace routing : 10/10/10
6
5
4
3
<Core Design>
Titl e
Althon64/64FX DDR I/F
Size DocumentNumber Rev
Custom
J361Y RS482+M1573
Date: Sheet
2
AL1
uPGA939 Top View
Wistron Incorporated
21F, 88, Hsin Tai Wu Rd Hsichih,Taipei
of
750Thursday, June 16, 2005
1
1A
PDF created with pdfFactory trial version www.pdffactory.com
P
Processor MISC Signals
U
VDDA2.5V_CPU
1 2
12
TC27
L32
MLB201209-GP
D D
E100U16VM-L11-GP
8
CORE_SENSE COREFB_H COREFB_L
VDDIOFB_H
VDDIOFB_L
VDD_2.5_SUS_SENSE
VDDA CPU_PWRGD
C C
LDTSTOP_L LDTREST#
VCC2.5V: for pull-ups., no sequenceissue
B B
VCC2.5V_SUS
PUT IN BOTTOM
COREFB_H46
COREFB_L46 THERMDA_CPU28 THERMDC_CPU28
LDTREST#47
CPU_PWRGD47
LDTSTOP_L13,47
VCC2.5V_SUS
VCC12
1
D
Q60 2N7002-L1
PUT INTOP
G
23
S
TP52TPAD28 TP34TPAD28 TP35TPAD28 TP81TPAD28 TP82TPAD28 TP76TPAD28
TP36TPAD28 TP54TPAD28 TP51TPAD28 TP45TPAD28
COREFB_H COREFB_L THERMDA_CPU THERMDC_CPU LDTREST# CPU_PWRGD LDTSTOP_L
R339 51R3
1 2
VCC2.5V
12
C245
7
Imax: 300mA Rdc: 50m ohm 100-300nH
12
C183
SCD22U10V3KX
SC3300P16V3KX
Place close CPU
CPUCLK0_H24
CPUCLK0_L24
VDDA2.5V_CPU: for PLL
12
12
C190
C188
SC4D7U10V-U
VDD_2.5_SUS_SENSE
Width:5mil, Spacing:10mil,
VLDT
Long:<1000mil
R264 44D2R3F
1 2
R265 44D2R3F
1 2
C177
SC1000P50V3KX
CPUCLK0_H CPUCLK0_L
20/5/5/5/20
VCC2.5V_SUS
12
R296
820R3
CPU_STRAP_HI_E11 CPU_STRAP_LO_F11
12
R290
820R3
layout out with5/5/5 from CPU, thenfan out to 8/5/8, 20 mils spacing, < 1000 mils
ASIC8M_VDDA_EN(5V) High:Enable L:Disable
6
http://hobi-elektronika.net
LAYOUT: Route VDDA trace approx. 50mils wide (use 2x25 mil traces to exit ballfield) and 500 mils long.
VDDA
L0_REF1 L0_REF0
12
12
C176
SC1000P50V3KX
1 2
SC3900P50V2KX
169R3F
1 2
SC3900P50V2KX
C195
C191
VLDT
10/10/5/10/10
10/10/5/10/10
12
CLKIN_H
R289
CLKIN_L
20/5/5/5/20, length<500 mils
VCC2.5V
R322 680R3
1 2
R323 680R3
1 2
R250 49D9R3F
1 2
R254 49D9R3F
1 2
U24 APL1087
5
COREFB_H COREFB_L
10/10/10
10/10/10
TP44 TPAD28 TP43 TPAD28
TP39 TPAD28 TP41 TPAD28 TP40 TPAD28 TP42 TPAD28
TP53 TPAD28 TP49 TPAD28
LDTREST# CPU_PWRGD
CORE_SENSE
VDDIOFB_H VDDIOFB_L VDD_2.5_SUS_SENSE
CPU_STRAP_HI_E11 CPU_STRAP_LO_F11
CPU_NC_C5 CPU_NC_A5
P_DBRDY P_TMS
P_TCK P_TRST_L P_TDI
CPU_STRAP_HI_AJ12 CPU_STRAP_HI_AF12
CPU_STRAP_HI_T3 CPU_STRAP_LO_T4
CPU_NC_A4 CPU_NC_D4 CPU_NC_B4 CPU_NC_C4
CPU_NC_C7 CPU_NC_C6
AA24 AE13
AJ12 AF12
AE22
AG22 AH29
AJ22 AJ28
AK10 AK12
AG6 AG7
AH8
AK3 AK4 AK6 AK8
C3 B3
A3
F8 E8 B6
D1 C1
E5 E6 E7
Y24
A8 B8
E11 F11
C5
A5
B11
AF8 AJ9
T3 T4
A4 D4 B4 C4
C7 C6
AL8 AL7
AJ4 AJ5 AJ6 AJ7 AJ8
AL3 AL4 AL5 AL6
4
U34D
VDDA3 VDDA2 VDDA1
RESET_L PWROK LDTSTOP_L
L0_REF1 L0_REF0
COREFB_H COREFB_L CORESENSE
VDDIOFB_H VDDIOFB_L VDDIOSENSE
CLKIN_H CLKIN_L
BYPASSCLK_H BYPASSCLK_L
PLLCHRZ_H PLLCHRZ_L
DBRDY TMS
TCK TRST_L TDI
SINGLECHAIN BURNIN_L
SCANIN_H SCANIN_L
ANALOG3 ANALOG2 ANALOG1 ANALOG0
DIG_T ANALOG_T
RSVD_SMBUSC RSVD_SMBUSD
FREE1 FREE2 FREE3 FREE4 FREE5 FREE6 FREE7 FREE8 FREE9 FREE10 FREE11 FREE12 FREE13 FREE14 FREE15 FREE16 FREE17 FREE18 FREE19 FREE20 FREE21
THERMTRIP_L
FBCLKOUT_H
FBCLKOUT_L
SCANCLK2 SCANCLK1
SCANSHIFTENB
SCANSHIFTEN
SCANOUT_H
SCANOUT_L
PROGEN1_L PROGEN0_L
SKT-K8-2
THERMDA
THERMDC
VID4 VID3 VID2 VID1 VID0
DBREQ_L
SCANEN
TDO
FREE22 FREE23 FREE24 FREE25 FREE26 FREE27 FREE28 FREE29 FREE30 FREE31 FREE32 FREE33 FREE34 FREE35 FREE36 FREE37 FREE38 FREE39 FREE40 FREE41
3
THERMTRIP_CPU_L
AG10
THERMDA_CPU
AJ2
THERMDC_CPU
AJ1
10/10/10/10/10 place Sensor within 4"
VID4
A13
VID3LDTSTOP_L
A12
VID2
C12
VID1
A11
VID0
A10
CPU_NC_C13
C13
BP3
CPU_NC_E9
E9
BP2
B13
BP1 BP0
CPU_STRAP_LO_B13
C10
CPU_STRAP_LO_C10
2.5V differential output
FBCLKOUT_H
F13
FBCLKOUT_L
E13
P_DBREQ_L
A6
CPU_STRAP_LO_AG9
AG9
CPU_STRAP_LO_AH6
AH6
CPU_STRAP_LO_AF10
AF10
CPU_STRAP_LO_AH10
AH10
CPU_STRAP_LO_AJ10
AJ10
P_TDO
AG8
CPU_NC_V5
V5
CPU_NC_U5
U5
AL14 A14
AL9 AL10 AL11 AL12 C22 C28 D8 D11 D12 D29 E21 E22 G15 N27 T25 T29 U28 C11 AG15 AH12
DDR_VTT DDR_VTT
TP62TPAD28 TP38TPAD28
TP37TPAD28
THERMTRIP_CPU_L
TP57TPAD28 TP56TPAD28 TP55TPAD28 TP50TPAD28 TP48TPAD28
TP69TPAD28 TP59TPAD28 TP68TPAD28
R329 680R3
1 2
R286 680R3
1 2
TP61TPAD28
R325
Layout rule: 20/8/5/8/20 within 1" Zdiff=80ohm
80D6R2F
0402
1 2
R305 680R3
1 2
R303 680R3
1 2
R309 680R3
1 2
R316 680R3
1 2
R315 680R3
1 2
TP47TPAD28 TP46TPAD28
VID[0..4]
2
VID[0..4] 46
VCC2.5V VCC3_3
12
Place Near CP
R350 1KR3
12
1
Q59
3
2
R348 1KR3
2N3904-L1-U
THERMDA_CPU THERMDC_CPU
10/10/10/10/10 place Sensor within 4"
12
R341 10KR3
H_THERMTRIP# 20
THERMDA_CPU 28 THERMDC_CPU 28
1
Place Near
M1573
SC4D7U10V-U
VCC5
12
HDT Connector
J4
1
2
3
A A
4 6
8 10 12 14 16 18 20 22 24 26
SMC-CONN26A-FP
8
5
P_DBREQ_L
7
P_DBRDY
9
P_TCK
11
P_TMS
13
P_TDI
15
P_TRST_L
17
P_TDO
19 21 23
(R)
VCC2.5V
12
C147
SC1U16V3KX
SC10U10V5ZY
VCC5
ASIC8M_VDDA_EN47
Modify 0511 /J361Y Tracking (Item:other
065)
R776 1KR3
7
C149
1 2
Q50
R775 10KR3
1 2
1
2N3906-L-U2
1 12
Q102
3
2N3904-L1-U
2
6
32
RA1 1KR3
6/9
U2_5VIN
100R3F
100R3F
R243
R244
VIN
12
ADJ/GND
VOUT
123
12
C173
VDDA_2.5V_ADJ
SC1U10V3KX
12
12
C181
(R)
SCD1U
SC1U10V3KX
5
VDDA2.5V_CPU
12
C174
SC10U10V5ZY
12
C180
(R)
<Core Design>
Wistron Incorp orated
21F, 88, Hsin Tai WuRd
Title
Althon64/64FX Miscellany
Size Document Number Rev
Custom
J361Y RS482+M1573
Date: Sheet
4
3
2
Hsichih, Taipei
850Thursday, June 16, 2005
1
of
PDF created with pdfFactory trial version www.pdffactory.com
1A
8
Processor POWER & Ground
P
VCC_CORE
D D
R11
R13
R15
R17
R19
R21T2T6T8T10
T12
T14
T16
T18
T20U4U7U9U11
U13
U15
U17
U19
U21V6V8
VDD109
VDD110
VDD111
VDD112
VDD113
VDD114
VDD115
VDD116
VDD117
VDD118
VDD119
VDD120
VDD121
VDD122
VDD123
VDD124
VDD125
VDD126
VDD127
VDD128
VDD129
VDD130
VDD131
VDD132
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
VDD19
VDD20
VDD21
VDD22
VDD23
AA4
AA7
AA9
AA11
AA13
AA15
AA17
AA19
AA21
AB6
AB8
AB10
AB12
AB14
AB16
AB18
VDD24
AB20
AC9
AC11
AC13
AC15
AC17
AC19
AD2
7
6
5
4
3
2
1
http://hobi-elektronika.net
VCC2.5V_SUS
V10
V12
V14
V16
V18
V20W7W9
W11
W13
W15
W17
W19
W21Y2Y6Y8Y10
Y12
Y14
Y16
Y18
Y20
AA23
AB22
AB24
AB30
AC21
AC23
AD20
AD22
AD24
AD30
AF30
AH30
AK16
AK18
AK20
AK22
AK24
AK26
AK28
AK30
B16
B18
B20
B22
B24
B26
B28
B30
D30
F30
H20
H22
H24
H30
J21
J23
K22
K24
K30
L23
M22
M24
M30
N23
P22
P24
P30
R23
T22
T24
T30
U23
V22
V24
V30
W23
Y22
Y30
U34E
DD136
VDD133
VDD134
VDD135
V
VDD137
VDD138
VDD139
VDD140
VDD141
VDD142
VDD143
VDD144
VDD145
VDD146
VDD147
VDD148
VDD149
VDD150
VDD151
VDD25
VDD26
VDD27
VDD28
VDD29
VDD30
VDD31
VDD32
VDD33
VDD34
VDD35
VDD36
VDD37
VDD38
VDD39
VDD40
VDD41
VDD42
AD6
AD8
AD10
AD12
AD14
AD16
AD18
AE4
AE7
AE9
AE11
VDD43
AJ11
AK5
AK7
AK9
AK11B5B10
B12
VCC_CORE
VDD152
VDD44
D10G7G9
VDDIO1
VDDIO2
VDDIO3
VDDIO4
VDDIO5
VDDIO6
VDDIO7
VDDIO8
VDD153
VDD154
VDD155
VDD156
VDD157
VDD45
VDD46
VDD47
VDD48
VDD49
VDD50
VDD51
G11
G13H2H6H8H10
VDDIO9
VDDIO10
VDDIO11
VDDIO12
VDDIO13
VDDIO14
VDDIO15
VDDIO16
VDDIO17
VDDIO18
VDDIO19
VDDIO20
VDDIO21
VDDIO22
VDDIO23
VDDIO24
VDDIO25
VDDIO26
VDDIO27
VDDIO28
VDDIO29
VDDIO30
VDDIO31
VDDIO32
VDDIO33
VDDIO34
VDDIO35
VDDIO36
VDDIO37
VDDIO38
VDDIO39
VDDIO40
VDDIO41
VDDIO42
VDDIO43
VDDIO44
VDDIO45
VDDIO46
VDDIO47
VDDIO48
VDDIO49
VDDIO50
VDDIO51
VDD52
VDD53
VDD54
VDD55
VDD56
VDD57
VDD58
VDD59
VDD60
VDD61
VDD62
VDD63
VDD64
VDD65
VDD66
VDD67
VDD68
VDD69
VDD70
VDD71
VDD72
VDD73
VDD74
VDD75
VDD76
VDD77
VDD78
VDD79
VDD80
VDD81
VDD82
VDD83
VDD84
VDD85
VDD86
VDD87
VDD88
VDD89
VDD90
VDD91
VDD92
VDD93
VDD94
VDD95
VDD96
VDD97
VDD98
VDD99
VDD100
H12
H14
H16
H18J4J7J9J11
J13
J15
J17
J19K6K8
K10
K12
K14
K16
K18
K20L7L9
L11
L13
L15
L17
L19
L21M2M6M8M10
M12
M14
M16
M18
M20N4N7N9N11
VDD101
N13
N15
N17
N19
N21P6P8
P10
P12
SKT-K8-2
VDDIO52
VDDIO53
VDDIO54
VDDIO55
VDDIO56
VDDIO57
VDDIO58
VDD102
VDD103
VDD104
VDD105
VDD106
VDD107
VDD108
P14
P16
P18
P20R7R9
C C
H23
H26
H28J6J8
J10
J12
J14
J16
J18
J20
J22
J24K2K7K9K11
K13
K15
K17
K19
K21
K23
K26
K28L4L6L8L10
L12
L14
L16
L18
L20
L22
L24M7M9
M11
M13
M15
M17
M19
M21
M23
M26
M28N6N8
N10
N12
N14
N16
N18
N20
N22
N24P2P7P9P11
P13
P15
P17
P19
P21
P23
P26
P28R4R6R8R10
R12
R14
R16
R18
R20
R22
R24T7T9
T11
T13
T15
T17
T19
T21
T23
T26
T28U6U8
U10
U12
U14
U16
U18
U20
U22
U24V2V7V9V11
V13
V15
V17
V19
V21
V23
V26
V28W4W6W8W10
W12
W14
W16
W18
W20
W22
W24Y7Y9
Y11
Y13
Y15
Y17
Y19
Y21
Y23
Y26
Y28
VSS136
VSS1
A7A9AA6
VSS137
VSS2
VSS138
VSS3
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172
VSS173
VSS174
VSS175
VSS176
VSS177
VSS178
VSS179
VSS180
VSS181
VSS182
VSS183
VSS184
VSS185
VSS186
VSS187
VSS188
VSS189
VSS190
VSS191
VSS192
VSS193
VSS194
VSS195
VSS196
VSS197
VSS198
VSS199
VSS200
VSS201
VSS202
VSS203
VSS204
VSS205
VSS206
VSS207
VSS208
VSS209
VSS210
VSS211
VSS212
VSS213
VSS214
VSS215
VSS216
VSS217
VSS218
VSS219
VSS220
VSS221
VSS222
VSS223
VSS224
VSS225
VSS226
VSS227
VSS228
VSS229
VSS230
VSS231
VSS232
VSS233
VSS234
VSS235
VSS236
VSS237
VSS238
VSS239
VSS240
VSS241
VSS242
VSS243
VSS244
VSS245
VSS246
VSS247
VSS248
VSS249
VSS250
VSS251
VSS252VSS253
VSS254
VSS255
VSS256
VSS257
VSS258
VSS259
VSS260
VSS261
VSS262
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
AA8
AA10
AA12
AA14
AA16
AA18
AA20
AA22
AB2
AB7
AB9
AB11
AB13
AB15
AB17
AB19
AB21
AB23
AB26
AB28
AC4
AC6
AC10
AC12
AC14
AC16
AC18
AC20
AC22
AC24
AD7
AD9
AD11
AD13
AD15
AD17
AD19
AD21
AD23
AD26
AD28
AE6
AE8
AE10
AE12
AE14
AF2
AF6
AF7
AF9
AF11
AF14
AF16
AF20
AF22
AF24
AF26
AF28
AG5
AG11
AG13
AG12
AH1
AH2
AH3
AH4
AH5
AH7
AH9
AH11
AH13
AH16
AH18
AH20
AH22
AH24
AH26
AH28
AJ3
AJ13
AK13
AL13B7B9C2C8C9D2D3D5D6D7D9D13
D16
D18
D20
D22
D24
D26
D28E3E4
E10
E12
G12F5F6F7F9
F10
F12
F14
F16
F18
VSS126VSS127
F22
F24
F26
F28G4G6G8G10
G14H7H9
U34F
VSS263
VSS264
VSS265
VSS266
VSS267
VSS268
VSS269
VSS270
SKT-K8-2
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
H11
H13
H15
H17
H19
H21
B B
VCC_CORE
VCC_Core decoupling ­Bottom Layer under CPU socket
12
12
C641
SC10U10V6KX
12
12
C624
C631
SCD22U10V3KX
SCD22U10V3KX
12
C645
SC10U10V6KX
12
C639
SCD22U10V3KX
12
C617
C636
SC10U10V6KX
SC10U10V6KX
12
12
C614
C606
(R)
SCD22U10V3KX
SCD22U10V3KX
TOP Layer between CPU and DIMMs
C365
12
12
12
12
C619
C625
C644
SC10U10V6KX
12
C616
(R)
SCD22U10V3KX
(R)
SC10U10V6KX
SC10U10V6KX
12
C623
C637
(R)
SC10U10V6KX
VCC2.5V_SUS VCC2.5V_SUS
(R)
SC10U10V6KX
Bottom Layer between CPU and DIMMs
VCC2.5V_SUS
C356
C354
C366
C367
C355
A A
8
7
6
VDDIO Decoupling
1 2
SC4D7U10VMX-U
1 2
SC4D7U10VMX-U
1 2
SC4D7U10VMX-U
1 2
SC4D7U10VMX-U
1 2
(R)
SC4D7U10VMX-U
1 2
(R)
SC4D7U10VMX-U
TOP Layer near CPU socket side
C286
1 2
SCD22U10V3KX
C278
1 2
SCD22U10V3KX
Bottom Layer under CPU socket
C321
1 2
SCD22U10V3KX
C648
1 2
VCC2.5V_SUS
SCD22U10V3KX
C647
SCD22U10V3KX
C285
SCD22U10V3KX
1 2
1 2
5
A1 A31
uPGA939 Top View
<Core Design>
Title
Althon64/64FX Power a nd Ground
Size Do cument Numb er Rev
Custom
J361Y RS482+M1573
Date: Sheet
4
3
2
AL1
Wistron Incorporated
21F, 88, Hsin Tai Wu Rd Hsichih, Taipei
950Thursday, June 16, 2005
of
1
1A
PDF created with pdfFactory trial version www.pdffactory.com
8
DIMM Slots
D D
MEM_BANKA07,11 MEM_BANKA17,11
C C
B B
MEM_BANKA0 MEM_BANKA1
MEM_RASA_L7,11 MEM_CASA_L7,11
MEM_WEA_ L7,11
7
MEM_ADDA0 MEM_ADDA1MEM_ADDA1 MEM_ADDA2 MEM_ADDA3MEM_ADDA3 MEM_ADDA4 MEM_ADDA5 MEM_ADDA6MEM_ADDA6 MEM_ADDA7MEM_ADDA7 MEM_ADDA8 MEM_ADDA9
MEM_BANKA0 MEM_BANKA1
MEM_ADDA11MEM_ADDA11 MEM_ADDA12 MEM_DAT A0 MEM_DAT A1MEM_DATA1 MEM_DAT A2MEM_DATA2 MEM_DAT A3 MEM_DAT A4 MEM_DAT A5MEM_DATA5 MEM_DAT A6MEM_DATA6 MEM_DAT A7 MEM_DAT A8 MEM_DAT A9 MEM_DAT A10MEM_DATA10 MEM_DAT A11MEM_DATA11 MEM_DAT A12MEM_DATA12 MEM_DAT A13MEM_DATA13 MEM_DAT A14MEM_DATA14 MEM_DAT A15MEM_DATA15 MEM_DAT A16MEM_DATA16 MEM_DAT A17MEM_DATA17 MEM_DAT A18MEM_DATA18 MEM_DAT A19MEM_DATA19 MEM_DAT A20MEM_DATA20 MEM_DAT A21MEM_DATA21 MEM_DAT A22MEM_DATA22 MEM_DAT A23MEM_DATA23 MEM_DAT A24 MEM_DAT A25MEM_DATA25 MEM_DAT A26MEM_DATA26 MEM_DAT A27 MEM_DAT A28 MEM_DAT A29MEM_DATA29 MEM_DAT A30MEM_DATA30 MEM_DAT A31MEM_DATA31 MEM_DAT A32 MEM_DAT A33 MEM_DAT A34MEM_DATA34 MEM_DAT A35MEM_DATA35 MEM_DAT A36MEM_DATA36 MEM_DAT A37 MEM_DAT A38MEM_DATA38 MEM_DAT A39MEM_DATA39 MEM_DAT A40MEM_DATA40 MEM_DAT A41MEM_DATA41
M_DATA42MEM_DATA42
ME MEM_DAT A43MEM_DATA43 MEM_DAT A44MEM_DATA44 MEM_DAT A45MEM_DATA45 MEM_DAT A46 MEM_DAT A47 MEM_DAT A48 MEM_DAT A49 MEM_DAT A50MEM_DATA50 MEM_DAT A51MEM_DATA51 MEM_DAT A52MEM_DATA52 MEM_DAT A53MEM_DATA53 MEM_DAT A54MEM_DATA54 MEM_DAT A55MEM_DATA55 MEM_DAT A56MEM_DATA56 MEM_DAT A57 MEM_DAT A58MEM_DATA58 MEM_DAT A59MEM_DATA59 MEM_DAT A60MEM_DATA60 MEM_DAT A61MEM_DATA61 MEM_DAT A62
MEM_DAT A62
MEM_DAT A63 MEM_CHECK_ LO0 MEM_CHECK_ LO1 MEM_CHECK_ LO2 MEM_CHECK_ LO3 MEM_CHECK_ LO4 MEM_CHECK_ LO5 MEM_CHECK_ LO6 MEM_CHECK_ LO7
MEM_RESET_L7
MEM_ADDA137,11
MEM_ADDA[13..0]7,11
MEM_DATA[63..0]7,11
MEM_CHECK_LO[7..0]7,11
MEM_DQS_LO[8..0]7,11 MEM_DM_LO[8..0]7,11
CN35
48
A0
43
A1
41
A2
130
A3
37
A4
32
A5
125
A6
29
A7
122
A8
27
A9
141
A10
59
BA0
52
BA1
113
BA2
118 119
A11 DM2
115
A12
2
DQ0
4
DQ1
6
DQ2
8
DQ3
94
DQ4
95
DQ5
98
DQ6
99
DQ7
12
DQ8
13
DQ9
19
DQ10
20
DQ11
105
DQ12
106
DQ13
109
DQ14
110
DQ15
23
DQ16
24
DQ17
28
DQ18
31
DQ19
114
DQ20
117
DQ21
121
DQ22
123
DQ23
33
DQ24
35
DQ25
39
DQ26
40
DQ27
126
DQ28
127
DQ29
131
DQ30
133
DQ31
53
DQ32
55
DQ33
57
DQ34
60
DQ35
146
DQ36
147
DQ37
150
DQ38
151
DQ39
61
DQ40
64
DQ41
68
DQ42
69
DQ43
153
DQ44
155
DQ45
161
DQ46
162
DQ47
72
DQ48
73
DQ49
79
DQ50
80
DQ51
165
DQ52
166
DQ53
170
DQ54
171
DQ55
83
DQ56
84
DQ57
87
DQ58
88
DQ59
174
DQ60
175
DQ61
179
DQ63
44
CB0
45
CB1
49
CB2
51
CB3
134
CB4
135
CB5
142
CB6
144
CB7
154
/RAS
65
/CAS
63
/WE
SKT-DIMM184-U
(22.10244.291)
MEM_RESET_L
MEM_ADDA13
/CS0
/CS1 CKE0 CKE1
DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS8
DM0
DM1
DM3
DM4
DM5
DM6
DM7
DM8
VDDID
CK1
/CK1
CK0
/CK0
CK2
/CK2
SCL SDA SA0 SA1 SA2
WP VDD VDD VDD VDD
DIMM Slot A
VDD VDD VDD
VDD
VDD
VDDQ
VDDQ
VSDQ VDDQ VDDQ VDDQ
VDDQ VDDQ
VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ
VDDQ
VDDQ
VREF
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSSDQ 62 VSS VSS VSS
V33
NC/C S2 NC/C S3
NC NC NC NC
RESET_N
FETEN
A13
10
103
167
6
MEM_ADDA[13. .0] MEM_DAT A[63..0]
MEM_CHECK_LO[7..0]
MEM_DQS_LO[8..0] MEM_DM_LO[8..0]
157 158 21 111 5 14 25 36 56 67 78 86 47 97 107
129 149 159 169 177 140 82 16 17 137 138 76 75 92 91 181 182 183
MEMWPA
90 108 120 148 70 85 168 38 7 46 54 96 62 128 104 136 30 143 77 112 156 164 172 180 15 22 1 3 145 18 58 50 100 160 139 132 152 116 11 34 26 66 93 124 74 176178 42 81 89 184
71 163
9 101 102 173
MEM_DQS_LO0MEM_DQ S_LO0 MEM_DQS_LO1MEM_DQ S_LO1 MEM_DQS_LO2MEM_DQ S_LO2 MEM_DQS_LO3MEM_DQ S_LO3 MEM_DQS_LO4MEM_DQ S_LO4 MEM_DQS_LO5MEM_DQ S_LO5 MEM_DQS_LO6MEM_DQ S_LO6MEM_ADDA10MEM_ADDA10 MEM_DQS_LO7MEM_DQ S_LO7 MEM_DQS_LO8 MEM_DM_LO0MEM_DM_LO0 MEM_DM_LO1MEM_DM_LO1 MEM_DM_LO2MEM_DM_LO2 MEM_DM_LO3MEM_DM_LO3 MEM_DM_LO4MEM_DM_LO4 MEM_DM_LO5MEM_DM_LO5 MEM_DM_LO6MEM_DM_LO6 MEM_DM_LO7MEM_DM_LO7 MEM_DM_LO8
MEM_CLK _1L_ H1 MEM_CLK_1L_L1 MEM_CLK _1L_ H0 MEM_CLK_1L_L0 MEM_CLK _1L_ H2 MEM_CLK_1L_L2 SMBCLK SMBDAT
R569 4K7R3
1 2
DDRVREF
12
CA5 SCD1U
MEM_CS_1L_L0 7,11 MEM_CS_1L_L1 7,11
MEM_CKEA 7,11
MEM_CLK _1L_ H1 7 MEM_CLK_1L_L1 7 MEM_CLK _1L_ H0 7 MEM_CLK_1L_L0 7 MEM_CLK _1L_ H2 7 MEM_CLK_1L_L2 7 SMBCLK 24,28 SMBDAT 24 ,28
VCC2.5V_SUS
VCC3_3
6/14
5
4
http://hobi-elektronika.net
MEM_BANKB0 MEM_BAN KB0
VCC3_3
6/14
MEM_BANKB07,11 MEM_BANKB17,11
3
MEM_ADDB[13. .0]7,11
MEM_DAT A[127..6 4]7,11
MEM_CHECK_UP[7..0]7,11
MEM_DQS_UP[8..0]7,11 MEM_DM_UP[ 8..0 ]7,11
MEM_ADDB0 MEM_ADDB1MEM_ADDB1 MEM_ADDB2 MEM_ADDB3MEM_ADDB3 MEM_ADDB4 MEM_ADDB5 MEM_ADDB6MEM_ADDB6 MEM_ADDB7 MEM_ADDB8 MEM_ADDB9MEM_ADDB9 MEM_ADDB10MEM_ADDB10
MEM_BANKB1MEM_BANKB1 MEM_ADDB11MEM_ADDB11
MEM_ADDB12 MEM_DAT A64 MEM_DAT A65MEM_DATA65 MEM_DAT A66MEM_DATA66 MEM_DAT A67MEM_DATA67 MEM_DAT A68MEM_DATA68 MEM_DAT A69MEM_DATA69 MEM_DAT A70MEM_DATA70 MEM_DAT A71MEM_DATA71 MEM_DAT A72 MEM_DAT A73 MEM_DAT A74 MEM_DAT A75 MEM_DAT A76MEM_DATA76 MEM_DAT A77MEM_DATA77 MEM_DAT A78MEM_DATA78 MEM_DAT A79MEM_DATA79 MEM_DAT A80MEM_DATA80 MEM_DAT A81MEM_DATA81 MEM_DAT A82MEM_DATA82 MEM_DAT A83MEM_DATA83 MEM_DAT A84MEM_DATA84 MEM_DAT A85 MEM_DAT A86 MEM_DAT A87 MEM_DAT A88 MEM_DAT A89 MEM_DAT A90 MEM_DAT A91 MEM_DAT A92 MEM_DAT A93 MEM_DAT A94 MEM_DAT A95 MEM_DAT A96 MEM_DAT A97 MEM_DAT A98 MEM_DAT A99 MEM_DAT A100 MEM_DAT A101 MEM_DAT A102 MEM_DAT A103 MEM_DAT A104 MEM_DAT A105 MEM_DAT A106MEM_DAT A106 MEM_DAT A107MEM_DAT A107 MEM_DAT A108MEM_DAT A108 MEM_DAT A109MEM_DAT A109
M_DAT A110
ME MEM_DAT A111 MEM_DAT A112MEM_DAT A112 MEM_DAT A113 MEM_DAT A114 MEM_DAT A115MEM_DAT A115 MEM_DAT A116MEM_DAT A116 MEM_DAT A117 MEM_DAT A118MEM_DAT A118 MEM_DAT A119MEM_DAT A119 MEM_DAT A120MEM_DAT A120 MEM_DAT A121MEM_DAT A121 MEM_DAT A122MEM_DAT A122 MEM_DAT A123MEM_DAT A123 MEM_DAT A124MEM_DAT A124 MEM_DAT A125MEM_DAT A125 MEM_DAT A126MEM_DAT A126 MEM_DAT A127 MEM_CHECK_ UP0 MEM_CHECK_ UP1 MEM_CHECK_ UP2 MEM_CHECK_ UP3 MEM_CHECK_ UP4 MEM_CHECK_ UP5 MEM_CHECK_ UP6
MEM_RASB_L7,11 MEM_CASB_L7,11
MEM_WEB_ L7,11
MEM_CHECK_ UP7
MEM_RESET_L7
MEM_ADDB137,11
MEM_ADDB[13. .0] MEM_DATA[127..64]
MEM_CHECK_ UP[7.. 0]
MEM_DQS_UP[8..0] MEM_DM_UP[ 8..0 ]
CN38
48
A0
43
A1
41
A2
130
A3
37
A4
32
A5
125
A6
29
A7
122
A8
27
A9
141
A10
59
BA0
52
BA1
113
BA2
118 119
A11 DM2
115
A12
2
DQ0
4
DQ1
6
DQ2
8
DQ3
94
DQ4
95
DQ5
98
DQ6
99
DQ7
12
DQ8
13
DQ9
19
DQ10
20
DQ11
105
DQ12
106
DQ13
109
DQ14
110
DQ15
23
DQ16
24
DQ17
28
DQ18
31
DQ19
114
DQ20
117
DQ21
121
DQ22
123
DQ23
33
DQ24
35
DQ25
39
DQ26
40
DQ27
126
DQ28
127
DQ29
131
DQ30
133
DQ31
53
DQ32
55
DQ33
57
DQ34
60
DQ35
146
DQ36
147
DQ37
150
DQ38
151
DQ39
61
DQ40
64
DQ41
68
DQ42
69
DQ43
153
DQ44
155
DQ45
161
DQ46
162
DQ47
72
DQ48
73
DQ49
79
DQ50
80
DQ51
165
DQ52
166
DQ53
170
DQ54
171
DQ55
83
DQ56
84
DQ57
87
DQ58
88
DQ59
174
DQ60
175
DQ61
179
DQ63
44
CB0
45
CB1
49
CB2
51
CB3
134
CB4
135
CB5
142
CB6
144
CB7
154
/RAS
65
/CAS
63
/WE
RESET_N
SKT-DIMM184-U
(22.10244.291)
MEM_RESET_L
MEM_ADDB13
FETEN
10
103
167
2
157
/CS0
158
/CS1
21
CKE0
111
CKE1 DQS0
DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS8
DM0 DM1
DM3 DM4 DM5 DM6 DM7 DM8
VDDID
/CK1 /CK0 /CK2
VDD VDD VDD VDD VDD VDD VDD
VDD VDDQ VDDQ
DIMM Slot B
VSDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ
VREF
NC/C S2 NC/C S3
A13
MEM_DQS_UP0
5
MEM_DQS_UP1
14
MEM_DQS_UP2MEM_DQS_UP2
25
MEM_DQS_UP3
36
MEM_DQS_UP4MEM_DQS_UP4
56
MEM_DQS_UP5MEM_DQS_UP5
67
MEM_DQS_UP6MEM_DQS_UP6
78
MEM_DQS_UP7MEM_DQS_UP7
86
MEM_DQS_UP8
47
MEM_DM_UP0
97
MEM_DM_UP1MEM_ DM_UP1
107
MEM_DM_UP2 MEM_DM_UP3
129
MEM_DM_UP4
149
MEM_DM_UP5MEM_ DM_UP5
159
MEM_DM_UP6
169
MEM_DM_UP7MEM_ DM_UP7
177
MEM_DM_UP8
140 82
MEM_CLK_1H_H1
16
CK1
MEM_CLK_1H_L1
17
MEM_CLK_1H_H0
137
CK0
MEM_CLK_1H_L0
138
MEM_CLK_1H_H2
76
CK2
MEM_CLK_1H_L2
75
SMBCLK
92
SCL
SMBDAT
91
SDA
181
SA0
182
SA1
183
SA2
MEMWPB
90
WP
108 120 148 70 85 168 38 7
VDD
46 54 96 62 128 104 136 30 143 77 112 156 164 172 180 15 22 1 3
VSS
145
VSS
18
VSS
58
VSS
50
VSS
100
VSS
160
VSS
139
VSS
132
VSS
152
VSS
116
VSS
11
VSS
34
VSS
26
VSS
66
VSS
93
VSS
124
VSS
74
VSS
176178
VSSDQ 62
42
VSS
81
VSS
89
VSS
184
V33
71 163
9
NC
101
NC
102
NC
173
NC
MEM_CS_1H_L0 7,11 MEM_CS_1H_L1 7,11
MEM_CKEC 7, 11
MEM_CLK_1H_H1 7 MEM_CLK_1H_L1 7 MEM_CLK_1H_H0 7 MEM_CLK_1H_L0 7 MEM_CLK_1H_H2 7 MEM_CLK_1H_L2 7 SMBCLK 2 4,28 SMBDAT 24 ,28
VCC3_3
R570 4K7R3
1 2
VCC2.5V_SUS
DDRVREF
VCC3_3
6/14
12
CA6 SCD1U
6/14
1
VCC3_3
Data/DM/CH E CKgrou pLayo utrule :
Break in/out : 15/5/15 Motherboard trace routing : 10/10/10
A A
93
2
145
143
52
DDR Socke t
Top View
54
8
DQS group Layout rule :
Break in/out : 20/5/20 Motherboard trace routing : 20/15/20
183
92
7
6
Address/Command group Layout r ule :
Break in/out : 15/5/15 Motherboard trace routing : 10/10/10
Clock group Layout rule :20/5/5/5/20
5
VCC2.5V_SUS
12
R572
12
C434
20/15/20
100R3F
12
R571
100R3F
4
DDRVREF
SCD01U16V3KX
(R)
12
12
C430
C435
SCD01U16V3KX
(R)
12
C678
SCD047U10V2KX
SCD1U16V3KX
(R)
12
C677
(R)
(R)
12
12
C432
C433
SC39P
SC1000P50V3KX
SC1000P50V3KX
3
<Core Design>
Title
Unbuffered DDR 1,2
Size D ocume nt Number Rev
Custom
J361Y RS482+M1573 1A
Date: Sheet
2
Wistron Incorporated
21F, 88, Hsin TaiWu Rd Hsichih, Taipe i
1
of
10 50Thursday, June 16, 2005
PDF created with pdfFactory trial version www.pdffactory.com
8
DDR Termination
D D
Channel A
MEM_AD DA[1 3.. 0]7,10 MEM_DATA[63..0]7,10
MEM_CHECK_ LO[7..0]7,10
MEM_DQS_LO[8..0 ]7,10 MEM_DM_LO[8..0]7,10
C C
MEM_AD DB [13 ..0]7,10
MEM_DATA[127..64]7,10
B B
MEM_CHECK_UP[7..0]7,10
MEM_DQS_UP[8..0]7,10 MEM_DM_UP[8..0]7,10
MEM_C S_ 1H_L 07,10 MEM_C S_ 1H_L 17,10
A A
MEM_AD DA[1 3.. 0] MEM_D ATA[6 3..0 ]
MEM_CHECK_LO[7..0]
MEM_DQS_LO[8..0 ] MEM_DM_LO[8..0]
MEM_R ASA_ L7,10 MEM_C ASA_ L7,10
MEM_W EA_L7,10 MEM_B ANKA07,10 MEM_B ANKA17,10
MEM_C S_ 1L_L17,10 MEM_C S_ 1L_L07,10
MEM_C KEA7,10
Channel B
MEM_AD DB [13 ..0] MEM_DATA[127..64]
MEM_CHECK_UP[7..0]
MEM_DQS_UP[8..0] MEM_DM_UP[8..0]
MEM_RASB_L
MEM_R ASB_ L7,10
MEM_C ASB_ L
MEM_C ASB_ L7,10
MEM_W EB_ L
MEM_W EB_ L7,10 MEM_BANKB07,10 MEM_BANKB17,10
MEM_BANKB0 MEM_BANKB1
MEM_C KEC7,10
8
MEM_R ASA_ L MEM_C ASA_ L MEM_W EA_L MEM_B ANKA0 MEM_B ANKA1
MEM_C S_ 1L_L 1 M
EM_CS_1L_L0
MEM_C KEA
MEM_C S_ 1H_L 1 MEM_C KEC
MEM_CKB unused
MEM_CKD unused
MEM_DATA64 MEM_DATA68 MEM_DATA69 MEM_DATA65
MEM_DM_UP0 MEM_D QS_ UP0 MEM_D ATA70 MEM_D ATA66
MEM_D ATA67 MEM_D ATA71 MEM_D ATA76 MEM_D ATA72
MEM_D ATA73 MEM_D ATA77 MEM_DM_UP1 MEM_DQS_UP1
MEM_D ATA78 MEM_D ATA79 MEM_D ATA74
MEM_D ATA75 MEM_C KEC
MEM_D ATA84
7
RN50
SRN47-1
0402
RN46
SRN47-1
0402
RN45
SRN47-1
0402
RN44
SRN47-1
0402
RN49
SRN47-1
0402
RN53
SRN47-1
0402
MEM_D QS_ LO2 MEM_D ATA21
3456
MEM_D ATA17
2 1
MEM_D ATA16
MEM_D ATA18 MEM_AD DA9
3456 2
MEM_D M_L O2
1
MEM_AD DA1 1
3456
MEM_AD DA7
2 1
MEM_D ATA22
MEM_AD DA6
3456
MEM_AD DA5
2
MEM_D ATA19 MEM_D ATA23
1
MEM_D ATA25 MEM_D ATA29
3456 2
MEM_D ATA28
1
MEM_D ATA24
MEM_AD DA3
3456
MEM_AD DA4
2
MEM_D M_L O3 MEM_D QS_ LO3
1
MEM_AD DB 12
8
MEM_DATA80
7
MEM_DATA81
6
MEM_DATA85
8
MEM_DQS_UP2 MEM_AD DB 11
7
MEM_DM_UP2
6
MEM_AD DB 9
8
MEM_DATA82 MEM_DATA86
7 6
MEM_AD DB 7 MEM_AD DB 8
MEM_DATA87
8
MEM_DATA83
7
MEM_AD DB 5
6
MEM_AD DB 6
8
MEM_DATA88 MEM_DATA92
7
MEM_DATA93
6
MEM_DATA89
MEM_DQS_UP3
8 7
MEM_AD DB 4
6
MEM_D M_U P3 MEM_AD DB 3
MEM_D ATA1 MEM_D ATA5 MEM_D ATA0
7 8
MEM_D ATA4
MEM_D ATA2 MEM_D ATA6
7
MEM_DQS_LO0 MEM_DM_LO0
8
MEM_D ATA12 MEM_DATA8 MEM_ADDA8
7
MEM_D ATA3
8
MEM_D ATA7
MEM_D M_L O1 MEM_DQS_LO1
7
MEM_DATA13 MEM_D ATA9
8
MEM_D ATA11 MEM_D ATA10 MEM_DATA15
7 8
MEM_D ATA14
MEM_AD DA1 2 MEM_DATA20
7 8
MEM_CKEA
RN40
1 2 3 4 5
SRN47-1
0402
RN39
1 2 3 4 5
SRN47-1
0402
RN38
1 2 3 4 5
SRN47-1
0402
RN43
1 2 3 4 5
SRN47-1
0402
RN42
1 2 3 4 5
SRN47-1
0402
RN37
1 2 3 4 5
SRN47-1
0402
7
Data/DM/CHECK group Layout rule :
DQS group Layout rule :
Break in/out : 15/5/15 Motherboard trace routin g : 10/10/10
Break in/out : 20/5/20 Motherboard trace routin g : 20/15/20
RN48
6 7 8
SRN47-1
0402
RN47
6 7 8
SRN47-1
0402
RN52
6 7 8
SRN47-1
0402
RN54
6 7 8
SRN47-1
0402
RN51
6 7 8
SRN47-1
0402
RN56
6 7 8
SRN47-1
0402
RN36
1 2 3 4 5
SRN47-1
0402
RN35
1 2 3 4 5
SRN47-1
0402
RN34
1 2 3 4 5
SRN47-1
0402
RN33
1 2 3 4 5
SRN47-1
0402
RN32
1 2 3 4 5
SRN47-1
0402
RN31
1 2 3 4 5
SRN47-1
0402
MEM_D ATA31
45
MEM_D ATA27
3 2
MEM_D ATA26
1
MEM_D ATA30
45
MEM_C HE CK_ LO5 MEM_AD DA1
3
MEM_CHECK_LO4
2
MEM_AD DA2
1
MEM_AD DA0
45 3
MEM_D QS_ LO8 MEM_CHECK_LO1
2 1
MEM_CHECK_LO0
MEM_C HE CK_ LO6
45 3
MEM_CHECK_LO2
2
MEM_AD DA1 0 MEM_D M_L O8
1
45
MEM_D ATA32
3
MEM_CHECK_LO7
2
MEM_B ANKA1
1
MEM_CHECK_LO3
45
MEM_D QS_ LO4 MEM_D ATA33
3 2
MEM_D ATA37
1
MEM_D ATA36
DDR_VTT DDR_VTTDDR_VTT DDR_VTTDDR_VTT
MEM_DATA90
8
MEM_D ATA94
7
MEM_DATA91
6
MEM_DATA95 MEM_ ADD B13
8
MEM_AD DB 2 ME M_BAN KB0
7
MEM_CHECK_UP4
6
MEM_CHECK_UP5 MEM_AD DB 1
8
MEM_CHECK_UP0 MEM_CHECK_UP1MEM_CS_1H_L0
7 6
MEM_DQS_UP8 MEM_AD DB 0
8
MEM_D M_U P8 MEM_CHECK_UP2
7
MEM_AD DB 10
6
MEM_CHECK_UP6
MEM_BANKB1 MEM_D ATA12 6
8
MEM_CHECK_UP3
7 6
MEM_CHECK_UP7 MEM_D ATA96
MEM_DATA100
8 7
MEM_DATA101 MEM_DATA97
6
MEM_D QS_ UP4
RN67
6 7 8
SRN47-1
0402
RN55
6 7 8
SRN47-1
0402
RN58
6 7 8
SRN47-1
0402
RN57
6 7 8
SRN47-1
0402
RN66
6 7 8
SRN47-1
0402
RN65
6 7 8
SRN47-1
0402
RN30
1 2 3 4 5
SRN47-1
0402
RN29
1 2 3 4 5
SRN47-1
0402
RN28
1 2 3 4 5
SRN47-1
0402
RN27
1 2 3 4 5
SRN47-1
0402
RN26
1 2 3 4 5
SRN47-1
0402
RN25
1 2 3 4 5
SRN47-1
0402
45 3 2 1
45 3 2 1
45 3 2 1
45 3 2 1
45 3 2 1
45 3 2 1
8 7 6
8 7 6
8 7 6
8 7 6
8 7 6
8 7 6
6
6
5
http://hobi-elektronika.net
Address/Command group Layout rul e :
4
Break in/out : 15/5/15 Motherboard trace routin g : 10/ 10/ 10
MEM_D ATA39 MEM_D ATA38 MEM_D ATA34 MEM_D M_L O4
MEM_DATA40 MEM_DATA44 MEM_D ATA35 MEM_B ANKA0
MEM_D ATA41 MEM_W EA_L MEM_D ATA45 MEM_RASA_L
MEM_CS_1L_L1 MEM_C ASA_ L MEM_CS_1L_L0
unsed MEM_CS_2L_L1 MEM_CS_2L_L0
ME
M_DAT A42 MEM_D M_L O5 MEM_D QS_ LO5
MEM_DATA48 MEM_DATA47 MEM_DATA43 MEM_DATA46
MEM_D M_U P4 MEM_D ATA10 2 MEM_D ATA98 MEM_D ATA10 3
MEM_D ATA99 MEM_D ATA10 8 MEM_D ATA10 4
MEM_R ASB_ L MEM_DATA109 MEM_W EB_ L MEM_D ATA10 5
MEM_CS_1H_L0 MEM_C ASB_ L MEM_CS_1H_L1
unsed MEM_CS_2H_L1 MEM_CS_2H_L0
MEM_D QS_ UP5 MEM_D M_U P5 MEM_D ATA10 6
MEM_D ATA10 7 MEM_D ATA11 0 MEM_D ATA11 1 MEM_D ATA11 2
RN64
6 7 8
SRN47-1
0402
RN63
6 7 8
SRN47-1
0402
RN62
6 7 8
SRN47-1
0402
RN72
6 7 8
SRN47-1
0402
RN71
6 7 8
SRN47-1
0402
RN61
6 7 8
SRN47-1
0402
RN24
1 2 3 4 5
SRN47-1
0402
RN23
1 2 3 4 5
SRN47-1
0402
RN15
1 2 3 4 5
SRN47-1
0402
RN41
1 2 3 4 5
SRN47-1
0402
RN22
1 2 3 4 5
SRN47-1
0402
RN21
1 2 3 4 5
SRN47-1
0402
DDR_VTTDDR_VTT DDR_VTTDDR_VTTDDR_VTT
45
MEM_AD DA1 3
3
MEM_DATA53 MEM_DATA49
2
MEM_DATA52
1
45
MEM_DATA55 MEM_DQS_LO6
3 2
MEM_DATA54
1
MEM_DM_LO6
45
MEM_DATA61
3
MEM_DATA60 MEM_DATA51
2 1
MEM_DATA50
MEM_DATA62
45 3
MEM_DM_LO7 MEM_DATA57
2 1
MEM_DATA56
MEM_DATA59
45
MEM_D ATA58
3
MEM_DATA63
2 1
MEM_D QS_ LO7
45 3 2 1
MEM_DATA116
8 7
MEM_D ATA11 3 MEM_DATA117
6
8
MEM_D ATA11 8 MEM_DM_UP6
7
MEM_D ATA11 9
6
MEM_DQS_UP6
MEM_D ATA11 4
8
MEM_D ATA11 5
7 6
MEM_DATA124 MEM_DATA125
MEM_DATA120
8
MEM_D ATA12 1
7
MEM_DM_UP7
6
MEM_DQS_UP7
8 7
MEM_DATA127 MEM_DATA122
6
MEM_DATA123
8 7 6
RN60
6 7 8
SRN47-1
0402
RN59
6 7 8
SRN47-1
0402
RN68
6 7 8
SRN47-1
0402
RN70
6 7 8
SRN47-1
0402
RN69
6 7 8
SRN47-1
0402
RN20
1 2 3 4 5
SRN47-1
0402
RN19
1 2 3 4 5
SRN47-1
0402
RN18
1 2 3 4 5
SRN47-1
0402
RN17
1 2 3 4 5
SRN47-1
0402
RN16
1 2 3 4 5
SRN47-1
0402
45 3 2 1
45 3 2 1
45 3 2 1
45 3 2 1
45 3 2 1
8 7 6
8 7 6
8 7 6
8 7 6
8 7 6
5
MEM_C KEA
MEM_B ANKA0
MEM_B ANKA1
MEM_CS_1L_L1
MEM_CS_1L_L0
MEM_CASA_L
MEM_RASA_L
MEM_W EA_L
MEM_C KEC
MEM_BANKB1
MEM_BANKB0
MEM_R ASB_ L
MEM_C ASB_ L
MEM_W EB_ L
MEM_CS_1H_L0
MEM_CS_1H_L1
4
Place between CPU and DIMMs
C334 SC22P
1 2
(R)
C351 SC22P
1 2
(R)
C335 SC22P
1 2
(R)
C344 SC22P
1 2
(R)
C364 SC22P
1 2
(R)
C345 SC22P
1 2
(R)
C362 SC22P
1 2
(R)
C363 SC22P
1 2
(R)
Place between CPU and DIMMs
C388 SC22P
1 2
(R)
C380 SC22P
1 2
(R)
C389 SC22P
1 2
(R)
C390 SC22P
1 2
(R)
C383 SC22P
1 2
(R)
C385 SC22P
1 2
(R)
C384 SC22P
1 2
(R)
C343 SC22P
1 2
(R)
MEM_AD DA0
MEM_AD DA1
MEM_AD DA2
MEM_AD DA3
MEM_AD DA4
MEM_AD DA5
MEM_AD DA6
MEM_AD DA7
MEM_AD DA8
MEM_AD DA9
MEM_AD DA1 0
MEM_AD DA1 1
MEM_AD DA1 2
MEM_AD DA1 3
MEM_AD DB 0
MEM_AD DB 1
MEM_AD DB 2
MEM_AD DB 3
MEM_AD DB 4
MEM_AD DB 5
MEM_AD DB 6
MEM_AD DB 7
MEM_AD DB 8
MEM_AD DB 9
MEM_AD DB 10
MEM_AD DB 11
MEM_AD DB 12
MEM_AD DB 13
3
C336 SC22P
1 2
C342 SC22P
1 2
C332 SC22P
1 2
C329 SC22P
1 2
C330 SC22P
1 2
C339 SC22P
1 2
C338 SC22P
1 2
C341 SC22P
1 2
C340 SC22P
1 2
C331 SC22P
1 2
C337 SC22P
1 2
C347
1 2
C333 SC22P
1 2
C386 SC22P
1 2
C377 SC22P
1 2
C381 SC22P
1 2
C379 SC22P
1 2
C370 SC22P
1 2
C372 SC22P
1 2
C373 SC22P
1 2
C371 SC22P
1 2
C374 SC22P
1 2
C376 SC22P
1 2
C375 SC22P
1 2
C378 SC22P
1 2
C369
1 2
C382 SC22P
1 2
C346 SC22P
1 2
3
(R)
(R)
(R)
(R)
(R)
(R)
(R)
(R)
(R)
(R)
(R)
SC22P
(R)
(R)
(R)
(R)
(R)
(R)
(R)
(R)
(R)
(R)
(R)
(R)
(R)
(R)
SC22P
(R)
(R)
(R)
2
VCC2.5V_SUS
12
C447
1 2
SCD1U
C461
1 2
SCD1U
C450
1 2
SCD1U
C460
1 2
SCD1U
C463
1 2
SCD1U
C451
1 2
SCD1U
C452
1 2
SCD1U
C438
1 2
SCD1U
C454
1 2
SCD1U
C437
1 2
SCD1U
C455
1 2
SCD1U
C453
1 2
SCD1U
C448
1 2
SCD1U
C456
1 2
SCD1U
C442
1 2
SCD1U
C443
1 2
SCD1U
C445
1 2
SCD1U
C439
1 2
SCD1U
C444
1 2
SCD1U
C464
1 2
SCD1U
C440
1 2
SCD1U
C459
1 2
SCD1U
C446
1 2
SCD1U
C431
1 2
SCD1U
C462
1 2
SCD1U
C449
1 2
SCD1U
C441
1 2
SCD1U
C458
1 2
SCD1U
C457
1 2
SCD1U
TC65
1 2
E22 0U 10VM-2
(R)
DDR_VTT
12
C488 SC10U10V5KX
Place at either end of VTT island
<Cor e De sign>
Title
Size DocumentNum ber Rev
Date: Sheet
2
DDR_VTT
C501 SC10U10V5KX
DDR termination
Custom
J361Y RS482+M1573
12
1 2
SCD1U
1 2
SCD1U
1 2
SCD1U
1 2
SCD1U
1 2
SCD1U
1 2
SCD1U
1 2
SCD1U
1 2
SCD1U
1 2
SCD1U
1 2
SCD1U
1 2
SCD1U
1 2
SCD1U
1 2
SCD1U
1 2
SCD1U
1 2
SCD1U
1 2
SCD1U
1 2
SCD1U
1 2
SCD1U
1 2
SCD1U
1 2
SCD1U
1 2
SCD1U
1 2
SCD1U
1 2
SCD1U
1 2
SCD1U
1 2
SCD1U
1 2
SCD1U
1 2
SCD1U
1 2
SCD1U
1 2
SCD1U
C497
C485
C475
C484
C483
C429
C487
C499
C491
C473
C492
C489
C472
C493
C474
C490
C498
C479
C476
C478
C495
C486
C482
C477
C480
C494
C471
C481
C496
C500 SC10U10V5KX
1
Wistron Incorporated
21F, 88, Hsin Tai WuRd Hsichih,Taipei
of
11 50Thursday,June 16, 2005
1
1A
PDF created with pdfFactory trial version www.pdffactory.com
5
NB/RS482M HT IF & DVO Bus
NB_MD Q4P
NB_MD Q4N
VDD18
AC25 AC24 AD26 AC26
AC29 AC28
AA25 AA24 AB26 AA26
AB29 AA29
T26 R26 U25 U24 V26
U26 W25 W24
R29
R28
T30
R30
T28
T29
V29
U29
Y30 W30
Y28
Y29
Y26 W26
W29 W28
P29
N29
D27
E27
U28A
HT_RXCAD 15P HT_RXCAD 15N HT_RXCAD 14P HT_RXCAD 14N HT_RXCAD 13P HT_RXCAD 13N HT_RXCAD 12P HT_RXCAD 12N HT_RXCAD 11P HT_RXCAD 11N HT_RXCAD 10P HT_RXCAD 10N HT_RXCAD 9P HT_RXCAD 9N HT_RXCAD 8P HT_RXCAD 8N
HT_RXCAD 7P HT_RXCAD 7N HT_RXCAD 6P HT_RXCAD 6N HT_RXCAD 5P HT_RXCAD 5N HT_RXCAD 4P HT_RXCAD 4N HT_RXCAD 3P HT_RXCAD 3N HT_RXCAD 2P HT_RXCAD 2N HT_RXCAD 1P HT_RXCAD 1N HT_RXCAD 0P HT_RXCAD 0N
HT_RXCLK1P HT_RXCLK1N
HT_RXCLK0P HT_RXCLK0N
HT_RXCT LP HT_RXCT LN
HT_RXCAL N HT_RXCAL P
RS482M
(L/71.RS482.D0U,S/71.RS482.E0U)
L0_CADOUT_H15 L0_CADOUT_L15 L0_CADOUT_H14 L0_CADOUT_L14 L0_CADOUT_H13
L0_CADOUT_H[0..15]6
D D
L0_CADOUT_L[0..15]6
C C
R658 49D9R3F
1 2
VLDT
R656 49D9R3F
1 2
B B
A A
L0_CADOUT_H[0..15] L0_CADOUT_L[0..15]
L0_CLKOUT_H16 L0_ CL KIN_H1 6 L0_CLKOUT_L16
L0_CLKOUT_H06
L0_CLKOUT_L06
L0_CTLOUT_H06 L0_CTLOUT_L06
LDT_RXCALN LDT_RXCALP
DVO_IDCKP17
DVO_IDCKN17
5
L0_CADOUT_L13 L0_CADOUT_H12 L0_CADOUT_L12 L0_CADOUT_H11 L0_CADOUT_L11 L0_CADOUT_H10 L0_CADOUT_L10 L0_CADOUT_H9 L0_CADOUT_L9 L0_CADOUT_H8 L0_CADOUT_L8
L0_CADOUT_H7 L0_CADOUT_L7 L0_CADOUT_H6 L0_CADOUT_L6 L0_CADOUT_H5 L0_CADOUT_L5 L0_CADOUT_H4 L0_CADOUT_L4 L0_CADOUT_H3 L0_CADOUT_L3 L0_CADOUT_H2 L0_CADOUT_L2 L0_CADOUT_H1 L0_CADOUT_L1 L0_CADOUT_H0
ADOUT_L0
L0_C
L0_CLKOUT_H1 L0_CLKOUT_L1
L0_CLKOUT_H0 L0_CLKOUT_L0
L0_CTLOUT_H0 L0_CTLOUT_L0
LDT_RXCALN LDT_RXCALP
R410 33R3
1 2
20/5/7/5/20 Z=100ohm
R409 33R3
1 2
SSPCOnly
4
PART 1OF6
U28C
AF17
NC#A F17
AK17
PART 3 OF 6
NC#AK17
AH16
NC#A H16
AF16
NC#A F16
AJ22
NC#A J22
AJ21
NC#A J21
AH20
NC#A H20
AH21
NC#A H21
AK19
NC#AK19
AH19
NC#A H19
AJ17
NC#A J17
AG16
NC#A G16
AG17
NC#A G17
AH17
NC#A H17
AJ18
NC#A J18
AG26
NC#A G26
AJ29
NC#A J29
AE21
NC#AE21
AH24
NC#A H24
AH12
NC#A H12
AG13
NC#A G13
AH8
NC#A H18
AE8
NC#AE8
AF25
NC#A F25
AH30
NC#A H30
AG20
NC#A G20
AJ25
NC#A J25
AH13
DVO_IDCKP
AF14
NC#A F14
AJ7
NC#A J7
AG8
NC#A G8
AG25
NC#A G25
AH29
NC#A H29
AF21
NC#A F21
AK25
NC#AK25
AJ12
DVO_IDCKN
AF13
NC#A F13
AK7
NC#AK7
AF9
NC#A F9
AE17
NC#AE17
AH18
NC#A H18
AE18
NC#AE18
AJ19
NC#A J19
AF18
NC#A F18
AK16
NC#AK16
AJ16
NC#A J16
AE28
NC#AE28
AJ4
NC#A J4
AJ20
NC#A J20
AK20
NC#AK20
AJ15
VDD_18
AJ14
VSS
(L/71.RS482.D0U,S/71.RS482.E0U)
4
HYPER TRANSPORT CPU
I/F
MEM_A I/F
RS482 ver.A12 PB_P/N 71.RS482.E0U RS482 ver.A12 LF_P/N 71.RS482.B0U RS482M ver.A12 PB_P/N 71.RS482.D0U RS482M ver.A12 LF_P/N 71.RS482.C0U
HT_TXCAD15 P HT_TXCAD15 N HT_TXCAD14 P HT_TXCAD14 N HT_TXCAD13 P HT_TXCAD13 N HT_TXCAD12 P HT_TXCAD12 N HT_TXCAD11 P HT_TXCAD11 N HT_TXCAD10 P HT_TXCAD10 N
HT_TXCAD9P HT_TXCAD9N HT_TXCAD8P HT_TXCAD8N
HT_TXCAD7P HT_TXCAD7N HT_TXCAD6P HT_TXCAD6N HT_TXCAD5P HT_TXCAD5N HT_TXCAD4P HT_TXCAD4N HT_TXCAD3P HT_TXCAD3N HT_TXCAD2P HT_TXCAD2N HT_TXCAD1P HT_TXCAD1N HT_TXCAD0P HT_TXCAD0N
HT_TXCLK1P HT_TXCLK1N
HT_TXCLK0P HT_TXCLK0N
HT_TXCT LP HT_TXCT LN
HT_TXCALP HT_TXCALN
AF28
NC#A F28
AF27
NC#A F27
AG28
NC#A G28
AF26
NC#A F26
AE25
NC#A E25
AE24
NC#A E24
AF24
NC#A F24
AG23
NC#A G23
AE29
NC#A E29
AF29
NC#A F29
AG30
NC#A G30
AG29
NC#A G29
AH28
NC#A H28
AJ28
NC#A J28
AH27
NC#A H27
AJ27
NC#A J27
AE23
NC#A E23
AG22
NC#A G22
AF23
NC#A F23
AF22
NC#A F22
AE20
NC#A E20
AG19
NC#A G19
AF20
NC#A F20
AF19
NC#A F19
AH26
NC#A H26
AJ26
NC#A J26
AK26
NC#A K26
AH25
NC#A H25
AJ24
NC#A J24
AH23
NC#A H23
AJ23
NC#A J23
AH22
NC#A H22
AK14
NC#A K14
AH14
DVO_D11
AK13
DVO_D10
AJ13
DVO_D9
AJ11
DVO_D8
AH11
DVO_D7
AJ10
DVO_D6
AH10
DVO_D4
AE15
NC#A E15
AF15
NC#A F15
AG14
NC#A G14
AE14
NC#A E14
AE12
NC#A E12
AF12
NC#A F12
AG11
NC#A G11
AE11
NC#A E11
AJ9
DVO_D5
AH9
DVO_D1
AJ8
DVO_D2
AK8
DVO_D3
AH7
DVO_D0
AJ6
DVO_DE
AH6
DVO_HSYNC
AJ5
DVO_VSYNC
AG10
NC#A G10
AF11
#AF11
NC
AF10
NC#A F10
AE9
NC#AE9
AG7
NC#A G7
AF8
NC#A F8
AF7
NC#A F7
AE7
NC#AE7
AH5
NC#A H5
AD30
NC#A D30
RS482M
http://hobi-elektronika.net
L0_CADIN_H15
R24
L0_CADIN_L15
R25
L0_CADIN_H14
N26
L0_CADIN_L14
P26
L0_CADIN_H13
N24
L0_CADIN_L13
N25
L0_CADIN_H12
L26
L0_CADIN_L12
M26
L0_CADIN_H11
J26
L0_CADIN_L11
K26
L0_CADIN_H10
J24
L0_CADIN_L10
J25
L0_CADIN_H9
G26
L0_CADIN_L9
H26
L0_CADIN_H8
G24
L0_CADIN_L8
G25
L0_CADIN_H7
L30
L0_CADIN_L7
M30
L0_CADIN_H6
L28
L0_CADIN_L6
L29
L0_CADIN_H5
J29
L0_CADIN_L5
K29
L0_CADIN_H4
H30
L0_CADIN_L4
H29
L0_CADIN_H3
E29
L0_CADIN_L3
E28
L0_CADIN_H2
D30
L0_CADIN_L2
E30
L0_CADIN_H1
D28
L0_CADIN_L1
D29
L0_CADIN_H0
B29
L0_CADIN_L0
C29
L0_CLKIN_H1
L24
L0_CLKIN_L1
L25
L0_CLKIN_H0
F29
L0_CLKIN_L0
G29
L0_CTLIN_H0
M29
L0_CTLIN_L0
M28
LDT_TXCALP
B28
LDT_TXCALN
A28
<0.5" 15/5/15
NB_MD A33 NB_MD A34 NB_MD A35 NB_MD A36 NB_MD A37 NB_MD A38 NB_MD A39
<0.5" 15/5/15
NB_MD A48 NB_MD A49 NB_MD A50 NB_MD A51 NB_MD A52 NB_MDA53 DVO_DE NB_MD A54 NB_MD A55
L0_CADIN_L[0..15] L0_CADIN_H[0..15]
L0_CLKIN_L1 6 L0_ CL KIN_H0 6
L0_CLKIN_L0 6 L0_ CT LIN_ H0 6
L0_CTLIN_L0 6
R651 100R3F
1 2
R411 33R3
1 2
R375 33R3
1 2
R376 33R3
1 2
R383 33R3
1 2
R408 33R3
1 2
R382 33R3
1 2
R407 33R3
1 2
SSPC Only
R381 33R3
1 2
R406 33R3
1 2
R380 33R3
1 2
R379 33R3
1 2
R405 33R3
1 2
R378 33R3
1 2
R404 33R3
1 2
R377 33R3
1 2
3
DVO_D11 DVO_D10 DVO_D9 DVO_D8 DVO_D7 DVO_D6 DVO_D4
DVO_D5 DVO_D1 DVO_D2 DVO_D3 DVO_D0
DVO_HSYNC DVO_VSYNC
3
L0_CADIN_L[0..15] 6 L0_CADIN_H[0..15] 6
DVO_D[0..11] 17 DVO_DE 17 DVO_HSYNC 1 7 DVO_VSYNC 17
2
Title
RS482M-HTLINK I/F & DVO I/F
Size Doc ument Number Re v
Custom
Date: Sheet
2
J361YRS482 + M1573
1
1
Wistron Incorporated
21F, 88, Hsin Tai Wu Rd Hsichih, Taipei
of
12 50Thursday, June 16, 2005
1A
PDF created with pdfFactory trial version www.pdffactory.com
5
Dedicated for DAC POWER
L27
1 2
VCC3_3
MLB-201209-9-GP
D D
VCC18_RUN
C C
VCC18_RUN
VCC18_RUN
B B
VCC3_3
VCC3_3
A A
DFT_GPIO1(LOAD_ROM_STRAPS#): High-notconnected EEPROM(Defaul t )
G10
1 2
COPPER-CLOSE
L19
1 2
MLB-201209-9-GP
G6
1 2
COPPER-CLOSE
L31
1 2
MLB-201209-9-GP
G8
1 2
COPPER-CLOSE
L79
1 2
MLB-201209-9-GP
G15
1 2
COPPER-CLOSE
L80
1 2
MLB-201209-9-GP
R224 4K7R3
1 2
R225 4K7R3
1 2
12
C161
SC1U10V3ZY
DAC Bandgap ReferenceVoltage
12
C135
SC1U10V3ZY
12
C167
SC2D2U10V3ZY
POWER for HT I/F PLL
12
C570
SC1U10V3ZY
12
SC1U10V3ZY
HW Strapping Setti ng
DFT_GPIO2(HT_Width_Override): High-8 bit link(default)
DFT_GPIO[4..3](Overrides HT Freq): 11-200MHz(Default) DFT_GPIO5(LOAD_MEM_STRAPS#): 0-captureDVO pinsfor debug bus straps.
5
AVDD
12
C689
SC10U10V5ZY
AVDDQ
12
C690
SC10U10V5ZY
AVSSQ
POWER for PLL
PLLVDD
PLLVSS
HTPVDD
HTPVSS
3.3V I/O Power
VDDR3
C560
I2C_SCL I2C_SDA
AVSSN
Modify 0506
R654 715R3F
VCC3_3
R237 3KR3
1 2
Low-load strap valuesfrom EEPROM
Low-for testing only
1-Use Default Values
GuardTrace for TV-out and RGB signals
1 2
R609 4K7R3
1 2
R608 4K7R3
1 2
(R)
4
VDD18
12
C544
SC1U10V3ZY
10/10/10
NB_DDC_DATA19
TVCLKIN18
LOAD_ROM_STRAPS#
Internal pull high
BMREQ#21
R661 0R3-U
4
C_OUT18 Y_OUT18
COMP_OUT18
ROUT19 GOUT19 BOUT19
DAC_VSYNC19 DAC_HSYNC19
NB_DDC_CLK19
NB_DDC_DATA NB_DDC_CLK
RS482_RST#20
NB_PWRGD16,47
LDTSTOP_L8,47
ALLOW_LDTSTOP20
NB_OSCIN24
TP32
TPAD28
R239 10KR3
1 2
1 2
I2C_SCL17,18
I2C_SDA18 NB_THRMDA28 NB_THRMDC28
3
http://hobi-elektronika.net
NB/RS482M DAC/LVDS/CLK/PM
AVDD AVSSN AVDDDI
AVSSDI AVDDQ
AVSSQ
DAC_RSET NB_DDC_CLK NB_DDC_DATA
PLLVDD PLLVSS
HTPVDD HTPVSS
VDDR3
NB_OSCOUT
(R)
TVCLKIN
DFT_GPIO218
BMREQb
I2C_SCL
(R)
I2C_SDA
NB_THRMDA
NB_THRMDC
NOTE: Provide access to STRAP_DATA and I2C_SCL pins is MANDATORY.
U28D
B27
AVDD1
C27
AVDD2
D26
AVSSN1
D25
AVSSN2
C24
AVDDDI
B24
AVSSDI
E24
AVDDQ
D24
AVSSQ
B25
C
A25
Y
A24
COMP
C25
RED
A26
GREEN
B26
BLUE
A11
DAC_VSYNC
B11
DAC_HSYNC
C26
RSET
E11
DAC_SCL
F11
DAC_SDA
A14
PLLVDD
B14
PLLVSS
M23
HTPVDD
L23
HTPVSS
D14
SYSRESET#
B15
POWERGOOD
B12
LDTSTOP#
C12
ALLOW_LDTSTOP
AH4
NC
H13
VDDR3_1
H12
VDDR3_2
A13
OSCIN
B13
OSCOUT
B9
TVCLKIN
F12
DFT_GPIO0
E13
DFT_GPIO1
D13
DFT_GPIO2
F10
BMREQ#
C10
I2C_CLK
C11
I2C_DATA
AF4
THERMALDIODE_P
AE4
THERMALDIODE_N
(L/71.RS482.D0U,S/71.RS482.E0U)
U22
1
A0
2
A1
3
A2
4 5
GND SDA
AT24C04N-10SC
(R)
VCC SCL
WP
PART 4 OF 6
CRT/TVOUT
PLL PWR
PM
CLOCKs
MIS.
8
R204 10KR3(R)
7
I2C_SCL
6
STRP_DATA
3
TXOUT_U0P TXOUT_U0N TXOUT_U1P TXOUT_U1N TXOUT_U2P TXOUT_U2N TXOUT_U3P TXOUT_U3N
TXOUT_L0P TXOUT_L0N TXOUT_L1P TXOUT_L1N TXOUT_L2P TXOUT_L2N TXOUT_L3P TXOUT_L3N
TXCLK_UP TXCLK_UN
TXCLK_LP
LVDS
TXCLK_LN
LPVDD
LPVSS
LVDDR18D LVDDR18A_1 LVDDR18A_2
LVSSR1 LVSSR2 LVSSR3 LVSSR4 LVSSR5 LVSSR6 LVSSR7 LVSSR8
LVDS_DIGON
LVDS_BLON
LVDS_BLEN
GFX_CLKP
GFX_CLKN
HTTSTCLK HTREFCLK
SB_CLKP
SB_CLKN
DFT_GPIO3 DFT_GPIO4 DFT_GPIO5
TMDS_HPD
STRP_DATA
DDC_DATA
TESTMODE
RS482M
1 2
R216 2KR3
1 2
R223 2KR3(R)
1 2
D18
20/5/7/5/20
C18 B19 A19 D19 C19 D20 C20
B16 A16 D16 C16 B17 A17 E17 D17
B20 A20 B18 C17
LPVDD
E18
LPVSS
F17
LVDDR18D
E19
LVDDR18A
G20
LVDDR18A
H20 G19
E20 F20 H18 G18 F19 H19 F18
E14 F14 F13
B8 A8
R665 10KR3
P23 N23
E8 E7
DFT_GPIO3
C13 C14
LOAD_MEM_STRAPS#
C15
TMDS_HPD
A10
STRP_DATA
E10 B10 E12
1 2
R236 4K7R3
VCC3_3
2
LVDS_TXU0P 16 LVDS_TXU0N 16 LVDS_TXU1P 16 LVDS_TXU1N 16 LVDS_TXU2P 16 LVDS_TXU2N 16 LVDS_TXU3P 16 LVDS_TXU3N 16
LVDS_TXL0P 16 LVDS_TXL0N 16 LVDS_TXL1P 16 LVDS_TXL1N 16 LVDS_TXL2P 16 LVDS_TXL2N 16 LVDS_TXL3P 16 LVDS_TXL3N 16
LVDS_TXUCKP 16 LVDS_TXUCKN 16 LVDS_TXLCKP 16 LVDS_TXLCKN 16
LVDS_DIGON 16 LVDS_BLON 16 LVDS_BLEN
GFX_CLKP 24 GFX_CLKN 24
HTREFCLK 24 SB_CLKP 24
SB_CLKN 24
DFT_GPIO3 18
R240 33R3
1 2
DDC_DATA 17
1 2
SSPC
2
1
ForLVDSPLL
LPVDD
12
C134 SCD1U
LPVSS
For LVDS Analog power
LVDDR18A
12
C150 SCD1U
For LVDS Digital power
LVDDR18D
12
C553 SCD1U
PCIE 16X diff CLK
HT 66MHz Ref Clk
A-Link diff CLK
R238 3KR3
1 2
DVO_HTPLG 17
(R)
Title
RS482M-DAC/LVDS/MIS/CLK/PM
Size Document Number Rev
Custom
Date: Sheet
L20
1 2
MLB-201209-9-GP
12
C136
G7
1 2
SCD01U25V2KX
COPPER-CLOSE
L24
1 2
MLB-201209-9-GP
12
C153
SCD01U25V2KX
L30
1 2
MLB-201209-9-GP
12
C540
SCD01U25V2KX
J361Y RS482+M1573
VCC18_RUN
VCC18_RUN
1
VCC18_RUN
Wistron Incorporated
21F, 88, Hsin Tai Wu Rd Hsichih,Taipei
of
13 50Thursday, June 16, 2005
1A
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5
4
3
2
1
http://hobi-elektronika.net
U28B
PART 2 OF 6
D8
GFX_RX0P
D7
GFX_RX0N
D5
GFX_RX1P
D D
C C
B B
TP8 TP7
TP3 TP4
TP14 TP16
TP10 TP12
R373 10KR3
1 2
R374 8K25R3F
1 2
TPAD28 TPAD28
TPAD28 TPAD28
TPAD28 TPAD28
TPAD28 TPAD28
A_RX_P2 A_RX_N2
A_RX_P3 A_RX_N3
A_RX_P220 A_RX_N220
A_RX_P320 A_RX_N320
A_RX_P0 A_RX_N0
A_RX_P1 A_RX_N1
A_RX_P020 A_RX_N020
A_RX_P120 A_RX_N120
A_RX_P2 A_RX_N2
A_RX_P3 A_RX_N3
A_RX_P0 A_RX_N0
A_RX_P1 A_RX_N1
PCE_ISET PCE_TXISET
D4
GFX_RX1N
E4
GFX_RX2P
F4
GFX_RX2N
G5
GFX_RX3P
G4
GFX_RX3N
H4
GFX_RX4P
J4
GFX_RX4N
H5
GFX_RX5P
H6
GFX_RX5N
G1
GFX_RX6P
G2
GFX_RX6N
K5
GFX_RX7P
K4
GFX_RX7N
L4
GFX_RX8P
M4
GFX_RX8N
N5
GFX_RX9P
N4
GFX_RX9N
P4
GFX_RX10P
R4
GFX_RX10N
P5
GFX_RX11P
P6
GFX_RX11N
P2
GFX_RX12P
R2
GFX_RX12N
T5
GFX_RX13P
T4
GFX_RX13N
U4
GFX_RX14P
V4
GFX_RX14N
W1
GFX_RX15P
W2
GFX_RX15N
AE1
GPP_RX0P/SB_RX2P
AE2
GPP_RX0N/SB_RX2N
AB2
GPP_RX1P/SB_RX3P
AC2
GPP_RX1N/SB_RX3N
AB5
GPP_RX2P
AB4
GPP_RX2N
Y4
GPP_RX3P
AA4
GPP_RX3N
AG1
SB_RX0P
AH1
SB_RX0N
AC5
SB_RX1P
AC6
SB_RX1N
AH3
PCE_ISET
AJ3
PCE_TXISET
PCIE I/F TO
PCIE I/F TO SLOT
PCIE I/F TO SB
(L/71.RS482.D0U,S/71.RS482.E0U)
GFX_TX0P
GFX_TX0N
GFX_TX1P
GFX_TX1N
GFX_TX2P
GFX_TX2N
GFX_TX3P
GFX_TX3N
GFX_TX4P
GFX_TX4N
GFX_TX5P
GFX_TX5N
GFX_TX6P
GFX_TX6N
GFX_TX7P
GFX_TX7N
GFX_TX8P
GFX_TX8N
GFX_TX9P
GFX_TX9N GFX_TX10P GFX_TX10N GFX_TX11P
VIDEO
GFX_TX11N GFX_TX12P GFX_TX12N GFX_TX13P GFX_TX13N GFX_TX14P GFX_TX14N GFX_TX15P GFX_TX15N
GPP_TX0P/SB_TX2P GPP_TX0N/SB_TX2N
GPP_TX1P/SB_TX3P GPP_TX1N/SB_TX3N
GPP_TX2P
GPP_TX2N
GPP_TX3P
GPP_TX3N
SB_TX0P
SB_TX0N
SB_TX1P
SB_TX1N
PCE_PCAL
PCE_NCAL
RS482M
A7 B7 B6 B5 A5 A4 B3 B2 C1 D1 D2 E2 F2 F1 H2 J2 J1 K1 K2 L2 M2 M1 N1 N2 R1 T1 T2 U2 V2 V1 Y2 AA2
AD2 AD1
AA1 AB1
Y5 Y6
W5 W4
AF2 AG2
AC4 AD4
AH2 AJ2
A_NB_TX_P2 A_NB_TX_N2
A_NB_TX_P3 A_NB_TX_N3
A_NB_TX_P0 A_NB_TX_N0
A_NB_TX_P1 A_NB_TX_N1
PCE_PCAL PCE_NCAL
Modify 0422
C208 SCD1U16V3KX (R)
1 2
C210 SCD1U16V3KX (R) C197 SCD1U16V3KX (R)
C201 SCD1U16V3KX (R)
C222 SCD1U16V3KX C232 SCD1U16V3KX
C215 SCD1U16V3KX C219 SCD1U16V3KX
R351 150R3F
1 2
R363 82D5R2F
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
VDDA12
A_TX_P2 20 A_TX_N2 20
A_TX_P3 20 A_TX_N3 20
A_TX_P0 20 A_TX_N0 20
A_TX_P1 20 A_TX_N1 20
Wistron Incorporated
A A
Title
21F, 88,HsinTai Wu Rd Hsichih, Taipei
RS482M-DAC/LVDS/MIS/CLK/PM
Size Document Number Rev
Custom
Date: Sheet
5
4
3
J361Y RS482+M1573
2
1A
14 50Thursday, June 16, 2005
of
1
PDF created with pdfFactory trial version www.pdffactory.com
5
NB HeatSink Clip
VSSA14
VSS14
F16
VSSA15
VSSA16
VSS15
VSS16
G30
AB28
VSSA17
VSSA18
VSSA19
VSSA20
VSS17
VSS18
VSS19
VSS20
AB25
D12
AD24
VSSA22
AA3A2AB3P8J6C8AD3V8F3
VSSA21
VSSA22
VSSA23
VSS21
VSS22
VSS23
AA28
G17
Y23
(R)
CN19
1
2
FOX-CON2-5 CN20
1
D D
2
FOX-CON2-5 CN30
1
2
FOX-CON2-5 CN31
1
2
FOX-CON2-5
(R)
R5
AE5V5N3F7F5R3AA6T3M6C5F8M8Y8V3C3W3K8D3C6
VSSA1
VSSA2
VSSA3
VSSA4
VSSA5
VSSA6
VSSA7
VSSA8
VSSA9
VSSA10
VSSA11
VSSA12
VSSA13
PAR 6 OF 6
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
G14
Y24
G13E9D15D9AD9
VSS13
G11
G10
G12
AD29
AD27
AC27
G15
4
AE3
AF3M5AB7G3B4P7AA5C9C7J5R6J3AD5D6C4K3AB8T7Y7
VSSA24
VSSA25
VSSA26
VSSA27
VSSA28
VSSA29
VSSA30
VSSA31
VSSA32
VSSA33
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
AC9
R19
VSS33
Y27
C28
G16
F25
B30
T24
F26
W27
D11
3
2
1
http://hobi-elektronika.net
VSSA59
AD6K7H7M3V6H8C2
AG3L6AJ1M7V7F6E6U5U6E5L5
VSSA34
VSSA35
VSSA36
VSSA37
VSSA38
VSSA39
VSSA40
VSSA41
VSSA42
VSSA43
VSSA44
VSSA45
VSSA46
VSSA47
VSSA48
VSSA49
VSSA50
VSSA51
VSSA52
VSSA53
VSSA54
VSSA55
VSSA56
VSSA57
VSSA58
VSSA59
VSSA60
T8
F28
H28
M24
J28
N19
K28
T23
L27
M27
H24
N28
P25
P28
E26
K25
U28
V25
V28
R23
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSSA61
VSSA62
VSSA63
VSSA64
VSSA65
VSSA66
VSSA67
VSSA68
VSS132
GROUND
04
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
H11
AD25
H17
H10
H16
H14
E16
D10
E15
F15
U15
V14
R15
T14
N15
V12
N13
P14
U17
T16
R17
P12
T12
R13
W13
W17
P18
V18
M18
U13
N17
W15
V16
T18
M14
M12
M16
P16
U19
AC16
AG18
AC23
AD8
AD11
AD13
AD16
AD19
AD23
AG5
AG6
AG21
AD17
AG15
AG12
AF30
AG24
AG9
AC19
AG27
AC11
AD7
AJ30
AC21
VSS1
AK5
AK10
AC13
AD21
AK22
AK29
W19
AE26
AE27
VSS112
T27
R27
AD28
F24
F27
G28
NB RS482M POWER STATES
Power Signal
VDDHT
RS482M
VDDR,VDDRCK VDD18 VDDC VDDA18
U28F
VDDA12 AVDD AVDDDI
HTPVDD VDDR3 LPVDD LVDDR18D LVDDR18A
S1
S4/S5
S3
S0
ON
ON
OFF
ON OFF
ON
ON ON
ON ON ON ON ON ON OFF ON ONONOFF
ON ON ON
OFF
OFF OFF
ON
OFF
ON
OFF
OFF
ON
OFF
OFF OFF
ON
OFF
ON
OFF OFF
OFF
ON ON
OFF OFF
OFF
ON ON
OFF
OFF OFF
ON
OFF
ON
OFF
OFF
G3
OFFOFF OFF OFF OFF OFF OFF OFF OFF OFFPLLVDD OFF OFF OFF OFF OFF
12
C599 SCD1U
VDD18
12
VDD_DVO
C251 SCD1U
12
C584 SCD1U
VSS30
U28E
PART 5 OF 6
N27
VDD_HT1
U27
VDD_HT2
V27
VDD_HT3
G27
VDD_HT4
V24
VDD_HT5
H27
VDD_HT6
K24
VDD_HT7
AB24
VDD_HT8
P27
VDD_HT9
J27
VDD_HT10
AA27
VDD_HT11
K27
VDD_HT12
P24
VDD_HT13
AB27
VDD_HT14
AB23
VDD_HT15
V23
VDD_HT16
G23
VDD_HT17
E23
VDD_HT18
W23
VDD_HT19
K23
VDD_HT20
J23
VDD_HT21
H23
VDD_HT22
U23
VDD_HT23
AA23
VDD_HT24
D23
VDD_HT25
F23
VDD_HT26
C23
VDD_HT27
B23
VDD_HT28
A23
VDD_HT30 VDD_HT31
12
C254
SC10U10V5KX
4
AC30 AK23
AK28 AK11
AE30 AC14 AD12 AC18 AC20 AD10 AD14 AD15 AD20 AC10 AD18 AC12 AD22 AC22 AH15
AC17 AC15
A29
AK4
H15
B21
C21
A22
B22
C22
F21
F22
E21
G21
VDD_HT29 VDD_HT30 VDD_HT31
VDD_DVO_1 VDD_DVO_2 VDD_DVO_3 VDD_DVO_4 VDD_DVO_5 VDD_DVO_6 VDD_DVO_7 VDD_DVO_8 VDD_DVO_9 VDD_DVO_10 VDD_DVO_11 VDD_DVO_12 VDD_DVO_13 VDD_DVO_14 VDD_DVO_15 VDD_DVO_16 VDD_DVO_17 VDD_DVO_18 VDD_DVO_19
VDD_18_1 VDD_18_2 VDD_18_3
VDD_CORE47 VDD_CORE46 VDD_CORE45 VDD_CORE44 VDD_CORE43 VDD_CORE42 VDD_CORE41 VDD_CORE40 VDD_CORE39
VDDA_12_14
VDDA_12_1 VDDA_12_2 VDDA_12_3 VDDA_12_4 VDDA_12_5 VDDA_12_6 VDDA_12_7 VDDA_12_8
VDDA_12_9 VDDA_12_10 VDDA_12_11 VDDA_12_12 VDDA_12_13
VDDA_18_1
VDDA_18PLL_1
VDDA_18_2
VDDA_18_3
VDDA_18_4
VDDA_18_5
VDDA_18PLL_2 VDDA_18PLL_3
VDDA_18_6
VDDA_18_7
VDDA_18_8
VDDA_18_9 VDDA_18_10 VDD_CORE1 VDD_CORE2 VDD_CORE3 VDD_CORE4 VDD_CORE5 VDD_CORE6 VDD_CORE7 VDD_CORE8 VDD_CORE9
VDD_CORE10 VDD_CORE11 VDD_CORE12 VDD_CORE13 VDD_CORE14 V
DD_CORE15
VDD_CORE16 VDD_CORE17 VDD_CORE18 VDD_CORE19 VDD_CORE20 VDD_CORE21 VDD_CORE22 VDD_CORE23 VDD_CORE24 VDD_CORE25 VDD_CORE26 VDD_CORE27 VDD_CORE28 VDD_CORE29 VDD_CORE30 VDD_CORE31 VDD_CORE32 VDD_CORE33 VDD_CORE34 VDD_CORE35 VDD_CORE36
POWER
VDD_CORE37 VDD_CORE38
RS482M
VDDA12
H9 AA7 G9 U8 N7 N8 U7 F9 AA8 G8 G7 J8 J7 B1 AG4 R8 AC8 AC7 AF6 AE6 L8 W8 W7 L7 R7 AF5 AK2 N16 M13 M15 W16 N18 P19 N12 P15 N14 M17 T19 G22 R12 P13 R14 V19 R18 U16 U12 T13 U14 T17 U18 E22 R16 V13 T15 P17 W18 D22 W12 V15 W14 V17 M19 H22 H21 D21
VDDA12_13 VDDA18
VDDA18_13
VDD_CORE_NB
3
12
C189
SC1U10V3ZY
12
C634
SC10U10V5KX
12
12
C572
C557
SCD1U
SCD1U
12
12
C615
C565
SCD1U
SCD1U
12
C539
SC10U10V5KX
THE CAPS SHOULD PLACE UNDER NB,ALL GND USE COPPER FLOOD T OGETHER,AND NB POWER VIA TREAT AS SAME.
C C
VCC12_RUN
L43 L42
B B
MLB-201209-8-GP
RS482 A11 DNI
VCC18_RUN
VCC3_3
L26
1 2
RS482 A12 and later
Mount
L43
1 2
MLB-201209-9-GP L42
1 2
MLB-201209-9-GP
(R)
DNIMount
12
C155 SC10U10V5KX
12
C256 SC10U10V5KX
VLDT
Imin 1A(NB+CPU)
12
12
C166
C160
SCD1U
SCD1U
Modify 0422
12
C233 SCD1U
12
C253 SCD1U
12
C562 SCD1U
VDD_DVO
12
C255 SCD1U
12
C227 SCD1U
12
C602 SCD1U
12
C598 SCD1U
12
C601 SCD1U
12
C593 SCD1U
I/OTransformPowerfor CPUan d G P IO
L38
1 2
VCC18_RUN
MLB-201209-9-GP
A A
5
12
C552 SCD1U
12
C626 SCD1U
12
C600 SCD1U
12
C591 SCD1U
12
C588 SCD1U
12
C603 SCD1U
12
C582 SCD1U
VDDA18
12
C575 SCD1U
12
C589 SCD1U
VSS89
12
C585 SCD1U
MLB-201209-8-GP
12
C620 SCD1U
VDDA12
12
C186
SC10U10V5ZY
L39
1 2
12
C577 SCD1U
12
C590 SCD1U
L34
1 2
MLB-201209-8-GP
VCC18_RUN
VCC12_RUN
12
C578 SCD1U
12
Modify 0504
12
C576 SCD1U
2
VCC12_RUN
TC35 E220U16VM-L6-GP
VDDA12_13
12
C162 SC4D7U10V5ZY
VSSA22
VDDA18_13
12
C250 SC4D7U10V5ZY
VSSA59
VDD_HT30
12
C169 SC4D7U10V5ZY
VSS30
VDD_HT31
12
C238 SC4D7U10V5ZY
VSS89
PUT DECOUPLING CAPS ON THETOP, CLOSE TO BALLS. CONNECT VSSA22,VSSA59,VSS30 ,VSS89 to the ground.
Wistr on I ncorporated
21F, 88, Hsin Tai Wu Rd
Title
RS482M-POWER & GND
Size DocumentNumber Rev
Custom
Date: Sheet
J361Y RS482+M1573
Hsichih, Taipei
1
1A
of
15 50Thursday, June 16, 2005
PDF created with pdfFactory trial version www.pdffactory.com
5
LVDS header (LCDPC
D D
Only)
4
http://hobi-elektronika.net
VCC3_3_LCD VCC5_LCD
VCC12_LCD
LVDS_TXL0N13 LVDS_TXL1N13
LVDS_TXL2N13
LVDS_TXLCKN13
LVDS_TXL3N13
LVDS_TXU0N13 LVDS_TXU1N13
LVDS_TXU2N13
LVDS_TXUCKN13 LVDS_T XU CKP 13
LVDS_TXL0N LVDS_TXL1N
LVDS_TXL2N LVDS_TXLCKN LVDS_TXL3N
VCC12_LCD LCD_VID0
LCD_VID022
LCD_VID1
LCD_VID122
LCD_VID2
LCD_VID222
LVDS_TXU0N LVDS_TXU1N
LVDS_TXU2N LVDS_TXU3N
LVDS_TXUCKN VCC5_LCD
3
CN16
1 3
5 7 9
11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49
JST-CONN50A-U
2
51
VCC3_3_LCD
2 4
6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52
VCC5_LCD
VCC12_LCD LVDS_TXL0P LVDS_TXL1P
LVDS_TXL2P LVDS_TXLCKP LVDS_TXL3P
VCC12_LCD
LVDS_TXU0P LVDS_TXU1P
LVDS_TXU2P LVDS_TXU3P
LVDS_TXUCKP
VCC5_LCD
VCC5_LCD
LVDS_TXL0P 13 LVDS_TXL1P 13
LVDS_TXL2P 13 LVDS_TXLCKP 13 LVDS_TXL3P 13
LVDS_TXU0P 13 LVDS_TXU1P 13
LVDS_TXU2P 13 LVDS_TXU3P 13LVDS_TXU3N13
1
LCD_VDD Power Enable
LCD_ENAVDD : High- Enable VCC1 2_LCD , VCC3_3_LC D , V C C5 _L CD
1
D
Q30 2N7002-L1
VCC5
12
R110
1KR3
NB_PWRGD_5V
3
G
1
23
S
LCD_ENAVDD : Low- disable VCC12_LCD, VCC3_3_LCD, VCC5_LCD
G
23
S
LVDS_BLON_Header 40
R127
2KR3
1 2
D
Q29
LCD_ENAVDD
R140
2KR3
1 2
1
G
2N7002-L1
2 3
S
VCC5
12
R101 10KR3
1
G
LCD_ENAVDD_GATE1
4
VCC12
12
R128 22KR3
D
S
12
Q21
2N7002-L1
2 3
Modify 0517 /J361Y Tracking (Item other -071)
G
C67 SCD1U25V3KX
R121
1 2
D
10KR3
Q23
2N7002-L1
1
2 3
S
C C
U11
CRT_TMDS_DISJ,21,40
LVDS_BLON13
B B
A A
1
A
VCC
2
B
3 4
GND Y
NC7SZ08M5X-NL-GP
NB_PW RGD13,47
LVDS_DIGON13
5
VCC3_3
5
VCC3_3
2
2N3904-L1-U
NB_PW RGD_5V
12
R107
1KR3
1
Q20
D
Q24 2N7002-L1
LVDS_DI GON : active High
VCC3_3
LCD_ENAVDD_GATE2
VCC5
1
12
TC15
E100U16VM-L11-GP
VCC12VCC12
Q25
E100U25VM-L1
3 2
2N3906-L-U2
LCD_ENAVDD_GATE3
3
12
TC17
Q26 SI3456DV-U1
6 5 4
D
2 1
G
3
Q36 SI3456DV-U1
6 5 4
D
2 1
G
3
Q37 SI3443DV
4
S
C95
1 2
SC1U16V3KX
S
G
3
12
S
1 2
R161 100KR3
VCC3_3_LCD
VCC5_LCD
6
D
5 2 1
RA2
150KR3J-L-GP
6/9
VCC12_LCD
VCC12
12
C56 SC1U25V5ZY
12
C91 SC1U25V5ZY
12
C94 SC1U25V5ZY
12
R114
220R3
D
Q22
2N7002-L1
1
G
2 3
S
12
R165
220R3
D
Q42
2N7002-L1
1
G
2 3
S
R160
12
12*12V/2.7K=0.053W
2K7R3
D
Q38
2N7002-L1
1
G
S
2
<Core Design>
2 3
Title
LVDS conn
Size Doc ument Number Rev
J361Y RS482+M1 5 7 3
Custom Date: Sheet
1
Wistron Incorporated
21F,88, Hsin Tai WuRd Hsichih,Taipei
16 50T hursday, June 16, 2005
of
1A
PDF created with pdfFactory trial version www.pdffactory.com
3
TMDS Tran s m i t er & Conn (SSPC Only)
TMDS_TX1+ TMDS_TX1-
TMDS_TXC+ TMDS_TXC-
F1
1 2
FUSE-1D5A6V-2
21222425272830
TDC0
TDC0#
TDC1#
XI/FIN
42
DVO_AGND
1 2
3 4 5 6 7 8
9 10 11 12 13 14
AOM-CONN28-4R-U
DVO_D[0..11]12
C C
DVO_IDCKN12 DVO_IDCKP12
DVO_DE12
DVO_HSYNC12 DVO_VSYNC12
R71 33KR3
PCIRST#_DVO47
12
S
1 2
S
1 2
1 2
DDC_DATA13
(R)
I2C_SCL13,18
DVO_VREF
VCC3_3
R72 10KR3
VCC3_3
B B
1 2
C22 SCD1U
1 2
R73 0R3-U
1 2
R111 140R3F
1 2
R83 2K4R3F
R77 10KR3F R76 10KR3F
Modify 0427
VCC5
TMDS Conn & PS conn (6 pins)
F2
Overlap
FUSE-D75A6V
1 2
R69 0R5J
1 2
L2
1 2
MLB-201209-8-GP
(R)
12
C16 SCD1U
(R)
A A
VCC12VL
12
TMDS_HPDET
C4 SCD1U
R85 330R3
1 2
R97 330R3
1 2
12
C20 SCD1U
(R)
PBTNJ_LCD41 USB1P_EXT23,26 USB1N_EXT23,26
CN6
MH1
4 5
6
MH2
DVD-CONN6F-1S-U1
3
DVO_D11 DVO_D10 DVO_D9 DVO_D8 DVO_D7 DVO_D6 DVO_D5 DVO_D4 DVO_D3 DVO_D2 DVO_D1 DVO_D0
PCIRST#_DVO
(R)
DVO_AS DVO_ISET DVO_SWING
DVDDV_7301
The VREF pin in p uts a reference voltage of DVDDV/2.
+5VLCDDDC
12
C18
SC10U10V6ZY-U
1 2
3
PBTNJ_LCD
SP_OUT_L_CON40
VCC5SB
50
D11
51
D10
52
D9
53
D8
54
D7
55
D6
58
D5
59
D4
60
D3
61
D2
62
D1
63
D0
56
XCLK#
57
XCLK
2
DE
46
P-OUT/TLDET#
4
H
5
V
13
RESET#
14
SPD
15
SPC
8
GPIO0
7
GPIO1/TLDET#
10
AS
35
ISET
19
VSWING
3
VREF
TDC1
TDC2#
Modify 0427
CN10
TDC2
TLC
31
TLC#
TMDS_TX0­TMDS_TX0+
TMDS_TX1­TMDS_TX1+
TMDS_TX2­TMDS_TX2+
TMDS_TXC+ TMDS_TXC-
HPDET
BCO
C/HSYNC
CVBS
Y/G C/R
CVBS/B
DVDD DVDD DVDD
DGND DGND DGND
DVDDV
TVDD
TVDD TGND TGND TGND
AVDD
AVDD
AGND
AGND
AGND
VDD GND GND
XO
CH7301C-T
43
29 30
TMDS_TX2+
15
TMDS_TX2-
16 17 18
TMDS_TX0+
19
TMDS_TX0-
20 21 22 23 24 25 26 27 28 31
32
L1
1 2
MLB-201209-8-GP
http://hobi-elektronika.net
U6
9 47 48 36 37 38 39 1
12 49
6 11 64
45 23
29 20 26 32
18 44 16 17 41 33 34 40
2
DVO_HTPLG
DVO_DVDD
DVDDV_7301
DVO_TVDD
DVO_AVDD DVO_AGND DVO_VDD
TMDS_HPDET G_DVIDATA_LCD G_DVICLK_LCD VCC5SBTMDS
SP_OUT_R_CON 40
VCC12VL
12
TC2
E470U16VM-L
2
1
DVO_DVDD
SC2D2U10V3ZY
DVO_TVDD
SC2D2U10V3ZY
DVO_AVDD
C52
SCD1U16V3KX-3GP
DVO_AGND
6/10
DVO_VDD
SC2D2U10V3ZY
VDD_DVO
R91 330R3
12
R79 330R3
SLP_S5*_CON
VCC5SBTMDSPW20_15_TMDS
12
12
C10 SCD1U
L75
1 2
MLB-201209-8-GP
12
12
C46
C45 SCD1U
L6
1 2
MLB-201209-8-GP
12
12
C62
C53 SCD1U
L5
1 2
MLB-201209-8-GP
12
12
12
C54
C61 SC2200P50V5KX
1 2
MLB-201209-8-GP
12
1 2
COPPER-CLOSE
L4
C55 SCD1U
G1
Hot Plug detectcir cuit
Modify 0427
DDC_DATA13
I2C_SCL13,18
1
BAV99
3
R67 4K7R3
TMDS_HPDET
1 2
12
OFFPWRS4_S5#23,28
VCC3_3
VCC3_3
Modify 0510 /J361Y_Tracking (Item
VCC3_3
VCC3_3
VCC3_3
12
R745
4K7R3
S
2 3
Q89 2N7002-L1
+5VLCDDDC
2
D37
1
R68 100KR3
CRT_TMDS_DISJ16,19,21,40
<Core Design>
Title
TMDS Transmitter & conn
Size Document Number Rev
Custom
J361Y RS482+M1573
Date: Sheet
G
S
2 3
Q90 2N7002-L1
G
1
Q18
2N3906-L-U2
3 2
G
12
R48 2K7R3
(R)
S
2 3
Q8 2N7002-L1
other-064)
1
D
D
Modify 0427
R57 4K7R3
1 2
1
D
1
G_DVIDATA_LCD G_DVICLK_LCD
2
3
U64
AZ23C6V2
1
VCC5
D9
D8
2 1
2 1
1N4148W
1N4148W
12
12
R607
R610
6K8R3
6K8R3
VCC3_3
12
Q11
1
3 2
R41 10R3
1 2
Wistron Incorporated
21F, 88, Hsin Tai WuRd
Hsichih, Taipei
17 50Thursday, June 16, 2005
G_DVIDATA_LCD
G_DVICLK_LCD
R66 47KR3
DVO_HTPLG 13
2N3906-L-U2
VCC5SBVCC3_3SB
12
SLP_S5*_CON
of
R51 2K2R3
1A
PDF created with pdfFactory trial version www.pdffactory.com
5
RA5
0R3J-3-GP
TVCLKIN13
DFT_GPIO213
D D
C C
S-video OUT
B B
1 2
0R3J-3-GP
1 2
6/9
SW_STV_Y
SW_STV_COMP
SW_STV_C
RA6
(R)
COMP_OUT13
Y_OUT13
12
C92
SC82P50V
SC82P50V
Default
12
C100
TV_SWITCH
R191 15KR3
1 2
COMP_OUT
Y_OUT
1 2
1 2
1 2
12
C99
SC82P50V
HDTV OUT
1 0
12
R199
75R3F
VCC3_3
1
L7
L1D8UH-6-GP
L11
L1D8UH-6-GP
L12
L1D8UH-6-GP
VCC3_3
1
BAV99
3
OUTPUT DVIDEO SVIDEO
R190 10KR3
1 2
SW_STV_COMP SW_HDTV_Pb
SW_STV_Y SW_HDTV_Y
12
R205
75R3F
2
D39
BAV99
3
STV_Y
12
C79
SC82P50V
1
2
D42
HDTV_Pb
4
12
R189
2KR3
1 2 3 4 5 6 7 8 9
NEAR Analog Switch IC
1
2
D38
BAV99
3
STV_COMP
12
C81
SC82P50V
2
D43
BAV99
3
HDTV_Pr
U21
VCC
IN
EN#
S1A
S1D
S2A
S2D
DA
DD
S1B S2B
S1C
DB
S2C
GND DC
PI5V330
1
BAV99
3
STV_COMP
12
C80
SC82P50V
1
2
D41
BAV99
3
HDTV_Y
2
D40
STV_C
STV_Y
STV_C
3
http://hobi-elektronika.net
16 15 14 13 12 11 10
VCC5
SW_STV_C SW_HDTV_Pr
C_OUT
12
R203
NEAR Analog Switch IC
75R3F
C_OUT 13
R620 0R3-U R621 0R3-U
VCC5
I2C_SDA13
I2C_SCL13,17
DLINE2 DLINE1
R152 10KR3
R119
1 2
10KR3
G_TVDATA_HDTV G_TVCLK_HDTV
1 2 1 2
1 2
VCC5
S
2 3
Q39 2N7002-L1
TV-OUT Header
CN15
10 11 12 13 14
U9
SDA SCL
INT# A2
A1 A0
PCA9554PW
1
15 16 17 18 9
JST-CONN18B
DLINE2_CON
15 14
13
3 2 1
12
C89 SCD1U
VCC3_3 VCC5
G
S
2 3
Q43 2N7002-L1
G
1
D
1 2 3 4 5 6 7 8
4
I/O0
5
I/O1
6
I/O2
7
I/O3
9
I/O4
10
I/O5
11
I/O6
12
I/O7
816
VSSVDD
12
R155
6K8R3
D
2
STV_COMPTV_SWITCH
STV_Y STV_C HDTV_Y HDTV_Pb
HDTV_Pr DLINE1_CON DLINE3_CON D_PLUGDET
12
R156
6K8R3
R617 10KR3 R113 10KR3
2 1
D17 1N4148W
R618 1KR3 (R)
1 2
R616 1KR3 (R)
1 2
R614 1KR3 (R)
1 2
R612 1KR3
1 2
R613 1KR3 (R)
1 2
DLINE3
DLINE2
DLINE1
G_TVDATA_HDTV
G_TVCLK_HDTV
1 2 1 2
DLINE1 DLINE2 DLINE3
DLINE3
DFT_GPIO3 13
R166 10KR3
1 2
Default setting : 480P
VCC5
12
12
R619
R120
2K2R3
2K2R3
R615
R117
2KR3
2KR3
1 2
1 2
1
Modify 0422
VCC3_3
12
R118
2K2R3
R122
2KR3
1 2
SW_HDTV_Pb
SW_HDTV_Pr
A A
SW_HDTV_Y
12
C93
12
C97
L8 IND-D47UH-3-GP
1 2
L9 IND-D47UH-3-GP
1 2
L10 IND-D47UH-3-GP
1 2
12
C98
12
C78
12
C76
12
C77
HDTV_Pb
HDTV_Pr
HDTV_Y
<Core Design>
Title
Wistron Incorporated
21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei
TV OUT
SC47P
5
SC47P
SC47P
SC47P
SC47P
4
SC47P
3
Size DocumentNumber Rev
Custom
J361Y RS482+M1573
Date: Sheet
2
18 50Thursday,June 16, 2005
1
of
1A
PDF created with pdfFactory trial version www.pdffactory.com
8
Video Filter & CRT CONN
D D
Z=37.5ohm 20/12/20
ROUT13
GOUT13
BOUT13
12
12
R202 75R3F
12
R194 75R3F
R221 75R3F
7
Z=75ohm 20/4/20
12
C126 SC39P
6
5
4
3
2
1
http://hobi-elektronika.net
F3
VCC5
FUSE-1D1A6V-4GP
L25
1 2
BLM11B750S
L22
1 2
BLM11B750S
L18
1 2
BLM11B750S
12
12
C152
C143
SC39P
SC39P
RED_CONN_SW
GREEN_ CONN_SW
BLUE_CON N_SW
12
C125 SC22P
12
12
C141
C151
SC22P
SC22P
12
VGA_VCC5
RED_CONN GREEN_CONN BLUE_CON N
L16
1 2
MLB-201209-8-GP
SC1U10V3KX
VGA_PWR
12
C121
16
6 1 7 2 8 3 9 4
10
5
17
CN18
VIDEO-15-32
Modify 0422
11
5VDDCDA
12
HSYNC
13
VSYNC
14
5VDDCCLK
15
R150 33R3
1 2
R162 33R3
1 2
CRT_5VDDCDA
CRT_5VDDCCLK
NEARDub Connector
R741 0R3-U
DAC_VSYNC13
Corporate
1 2
C C
VCC5
D10
2 1
1N4148W
12
R151
6K8R3
D12
2 1
1N4148W
12
R163
6K8R3
CRT_5VDDCDA
CRT_5VDDCCLK
VCC3_3
G
B B
NB_DDC_DATA13
NB_DDC_CLK13
G
S
2 3
Q40 2N7002-L1
1
S
2 3
Q35 2N7002-L1
1
D
D
CRT_TMDS_DIS_5V BLUE_CON N_SW BLUE_CON N
VCC5
CRT_TMDS_DIS_5V
14
1
2 3
7
VCC5
CRT_TMDS_DIS_5V
14
13
12 11
7
U12A
SOHCT 125
U12D
SOHCT 125
ESD PROTECTION
BAV99
3
A A
SOT-23
12
8
RED_CONN BLUE_CON N GREEN _CONN
1
2
1
2
1
D23
BAV99
3
7
D20
BAV99
3
2
BAV99
3
VCC3_3
2
BAV99
VCC5
D19
Modify 0510 /J361Y_Tracking (Item other-064)
D21
2
BAV99
1
D18
3
5
6
VSYNC HSYNC
1
3
CRT_VSYNC
4
U56
1
1OE#
2
1A
3
1B
4
GND2B2A
SNCB3Q3306APWR
Consumer
R167 33R3
1 2
R133 33R3
1 2
Modify 0427
VCC3_3 VCC3_3
VCC
2OE#
8 7 6 5
VSYNC
2
3
1
Corporate
DAC_HSYNC13
CRT_5VDDCDA
CRT_5VDDCCLK
U63
AZ23C6V2
R742 0R3-U
1 2
3
CRT_TM DS_DIS_5V RED_CONN_SW RED_CONN
VCC5
CRT_TM DS_DIS_5V
14
4
5 6
7
VCC5
CRT_TM DS_DIS_5V
14
10
9 8
7
1 2 3 4
SNCB3Q3306APWR
U12B
SOHCT125
U12C
SOHCT125
Modify 0427
R177 33R3
CRT_HSYNC
R134 33R3
1 2
CRT_TMDS_DISJ16,17,21,40
<Core Design>
Title
VGA CONN
Size Doc ument Number Rev
Custom
Date: Sheet
U55
8
VCC
1OE#
2OE#
1A 1B GND2B2A
Consumer
1 2
7 6 5
HSYNC
1 2
CRT_TM DS_DIS_5V GREEN_ CONN GREEN_ CONN_SW
R132
1KR3
J361Y RS482+M1 5 7 3
2
VCC5
12
R124
4K7R3
CRT_TMDS_DIS_5V
3
Q28
1
2
Wistron Incorporated
21F, 88, HsinTai WuRd Hsichih,Taipei
R743 0R3-U
1 2
Corporate
47KR3
2N3904-L1-U
1 2
19 50Thursday, June 16, 2005
1
R131
1A
of
PDF created with pdfFactory trial version www.pdffactory.com
8
D D
TPAD28 TPAD28
TPAD28 TPAD28
TPAD28 TPAD28
TPAD28 TPAD28
A_TX_P0 A_TX_N0
A_TX_P1 A_TX_N1
A_TX_P2 A_TX_N2
A_TX_P3 A_TX_N3
A_TX_N014 A_TX_P014
C220 SCD1U1 6V3KX
A_RX_N014
C218
A_RX_P014 A_TX_N114
A_TX_P114
C212 SCD1U1 6V3KX
A_RX_N114
C209
A_RX_P114 A_TX_N214
A_TX_P214
C203 SCD1U1 6V3KX
A_RX_N214
C207
A_RX_P214 A_TX_N314
A_TX_P314
C196 SCD1U1 6V3KX
A_RX_N314
C194
A_RX_P314
TP17 TP18
TP13 TP15
TP9 TP11
TP5 TP6
C C
R131 Change to 2.21K+/ - 1% (M1573 DG110.pdf)
B B
SB Heat Sink Clip
CN21
1 2
FOX-CON2-5
(R)
CN29
1 2
FOX-CON2-5
(R)
A A
8
7
SBS RC_CLKP24 SBS RC_CLKN24
1 2
1 2
SCD1U16V3KX
1 2
1 2
SCD1U16V3KX
1 2
1 2
SCD1U16V3KX
1 2
(R)
(R)
SCD1U16V3KX
(R)
(R)
1 2
1 2
R669 2K21R3F
Modify 0508
7
A_SB_RX_N0
A_SB_RX_P0
A_SB_RX_N1 A_SB_RX_P1
A_SB_RX_N2
A_SB_RX_P2
A_SB_RX_N3 A_SB_RX_P3
PCE_REF
U29D
M1573A1D
AA28 AA29 AA26 AA25
W28 W29 W26 W25
M25 M26 M27 M28 M29
W27 W30
PCIE_1D8V
F28 F29
U28 U29 U26 U25
R28 R29 R26 R25
V29
G25 G26 G28 G29 H25 H26 H27 H28 H29
J25 J26 J27 J28 J29
J30 K25 K26 K27 K28 K29
L25
L26
L27
L28
L29
L30
N25 N26 N27 N28 N29 N30
U27 U30 V25 V26 V27 V28
6
AC27
AC26
AC25
AC28
AC29
AC30
PCE_VTT
PCE_VTT
PCE_VTT
PCE_VTT
PCE_VTT
PCE_VTT
REFCLK_P REFCLK_N
SB_RAN SB_RAP SB_TAN SB_TAP
SB_RBN SB_RBP SB_TBN SB_TBP
SB_RCN SB_RCP SB_TCN SB_TCP
SB_RDN SB_RDP SB_TDN SB_TDP
REF
NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC
NC CPU
NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC
PCE_GND PCE_GND PCE_GND PCE_GND PCE_GND PCE_GND PCE_GND PCE_GND
PCE_GND
PCE_GND
PCE_GND
Y26
Y27
Y28
6
T25
Y25
PCE_VTT
PCE_VTT
AD25
V20
P20
N20
T20
U20
R20
PCE_VDDA
PCE_VDDA
PCE_VDDA
PCE_VDDA
PCE_VDDA
PCE_VDDA
PCE_VDDA
PCI-Express
PCE_GND
PCE_GND
PCE_GND
PCE_GND
PCE_GND
PCE_GND
PCE_GND
PCE_GND
PCE_GND
PCE_GND
PCE_GND
Y29
AA27
AA30
AB25
AB26
AB27
AB28
AB29
T29
T28
T27
5
http://hobi-elektronika.net
AD27
AD28
AD26
AD29
AE24
AE25
AE28
AE27
AE26
AE30
AE29
PCE_VDDA
PCE_VDDA
PCE_VDDA
PCE_VDDA
PCE_VDDA
PCE_VDDA
PCE_VDDA
PCE_VDDA
PCE_VDDA
PCE_VDDA
PCE_VDDA
PCE_VDD PCE_VDD PCE_VDD PCE_VDD PCE_VDD PCE_VDD
VDD18M_CORE VDD18M_CORE VDD18M_CORE VDD18M_CORE VDD18M_CORE VDD18M_CORE VDD18M_CORE VDD18M_CORE VDD18M_CORE VDD18M_CORE VDD18M_CORE VDD18M_CORE VDD18M_CORE VDD18M_CORE VDD18M_CORE VDD18M_CORE VDD18M_CORE VDD18M_CORE VDD18M_CORE VDD18M_CORE VDD18M_CORE VDD18M_CORE VDD18M_CORE
VDD_CPU
A20M#
CPUPWG
FERR#
CPURST#
IGNNE#
STPCLK#
SMI#
NMI
INTR
DSLEEP#
CPUHI#
SLEEP#
INIT#
THRM#
VRHI#
DSPV RHI
VRMPWG
THRMTRIP
HTTPWROK
HTTRESET#
HTTSTOP#
VDD33R_IO VDD33R_IO
GND GND GND GND
PCE_GND
PCE_GND
PCE_GND
PCE_GND
PCE_GND
PCE_GND
PCE_GND
PCE_GND
PCE_GND
PCE_GND
PCE_GND
T26
R30
R27
P29
P28
P27
P26
P25
G30
F27
G27
5
N19 P19 R19 T19 U19 V19
N12 P12 R12 T12 U12 V12 M12 M13 M18 M19 M20 W12 W13 W14 W15 W16 W17 W18 W19 W20 Y17 Y18 Y19
Y20
AK28 AJ27 AH29 AH26 AH30 AG26 AJ29 AG29 AG28 AH27 AJ28 AG27 AK27 AG25 AG24 AE23 AJ26 AH25
AF28 AF29 AG30
F25 F26
AJ30 AK30 AK29 AH28
4
PCIE_V DDA
12
C586 SCD1U
SB_VDD_CPU
H_FERR#
ALLOW_LDTSTOP
H_THERMTRIP#
SB_CPUPWRGD
SB_LDTREST# SB_LDTSTOP_L
4
12
C621 SCD1U
12
C592 SCD1U
SBVCORE_1D8V
12
R353 56R3
BLUEL E D02* 41 BLUEL E D03* 41
HDDLED 41
BLUEL ED* 41
3V_DUA L_IO
12
C608
SCD01U16V3KX
12
C594 SCD1U
12
C564
SCD01U16V3KX
SCD01U16V3KX
12
TP23 TPAD28 TP71 TPAD28
TP74 TPAD28 TP78 TPAD28
TP75 TPAD28 TP24 TPAD28 TP72 TPAD28 TP77 TPAD28 TP67 TPAD28
ALLOW_LDTSTOP 13 H_THERMTRIP# 8
12
C558
SCD01U25V2KX
3
12
12
C580
C618
SCD01U16V3KX
SC4D7U10V5ZY
PCIE_1D8V
12
12
C583
C607
SCD1U
SC2D2U16V5ZY
12
C563
C241 SCD1U
12
12
C581
C573
SCD01U16V3KX
SCD01U16V3KX
For K8, connect V DD_CPU to 3.3V
VCC_CORE VCC3_3
12
R371
0R3-U
(R) 12
C247 SC10U6D3V6KX
Modify 0505
SB_CPUPWRGD 47 SB_LDTREST# 47 SB_LDTSTOP_L 47
12
C559 SCD1U
3
2
R678 0R5J
1 2
L84
1 2
MLB-201209-8-GP
(R) 12
C642
SC4D7U10V5ZY
R343 0R5J
1 2
L82
1 2
MLB-201209-8-GP
(R)
12
12
C613
C609
SCD1U
SCD1U
12
R347
0R3-U
SB_LDTREST#
NB_RST#47
ALLOW_LDTSTOP
<Core Design>
Title
ULi-M1573 ALink & MIS
Size Document Number Rev
Custom
Date: Sheet
VCC18_RUN
VCC18_RUN
12
C230
SC10U10V5ZY
SBVCORE_1D8V
12
12
C596
C595
SCD1U
SCD1U
U10
1
A
2
B
3 4
GND Y
NC7SZ0 8 M5X-NL-GP
R235 1K R3
1 2
J361Y RS482+M1573
VCC
SC10U10V5ZY
12
C587
5
VCC3_3
R135 33R3
R640 0R5J
1 2
L76
1 2
MLB-201209-8-GP
(R)
VCC3_3DUAL
1 2
Wistron Incorporated
21F, 88, HsinTai Wu Rd Hsichih, Taipei
20 50Thursday,June 16, 2005
2
1
VCC18_RUN
RS482_RST# 13
of
1
1A
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8
7
6
3V_SYS1
5
http://hobi-elektronika.net
1D8V_DUAL_IO
4
PATA Freq Select : H-133MHz L-125MHz
THRMTRIP EN: H-DisableL-Enabl e
3
VCC3_3
CorePLLDebugMode:H-ENL-DIS
F7G6J6
L6
AA6W6T6
N6
R11
P11
U29C
D D
AD[0..31]32,36,37
C C
C_BEJ[0..3]32,36,37
B B
R232 0R5J
1 2
L29
MLB-201209-9-GP
COPPER-CLOSE
VCC3_3
1 2
MLB-201209-9-GP
(R)
G9
1 2
COPPER-CLOSE
L28
1 2
G12
1 2
R218 10K R3
1 2
CRT_TMDS_DISJ16,17,19,40
Active Low
VCC18_RUN
VCC18_RUN
A A
8
SC4D7U10V5ZY
12
C157
12
VDD18COREPLL
C163 SCD1U
VSSCOREPLL
AVDD18COREPLL
12
C165
SCD1U
AVSSCOREPLL
7
C_BEJ[0..3]
CRT_TMDS_DISJ
PGNTJ036 PGNTJ136 PGNTJ236 PGNTJ332,36 PGNTJ436,37 PGNTJ536 PGNTJ636
PREQJ036 PREQJ136 PREQJ236 PREQJ332,36 PREQJ436,37 PREQJ536 PREQJ636
PIRQJA32,36
PIRQJB32,36 PIRQJC32,36 PIRQJD32,36
PIRQJE36,37
PIRQJF36 PIRQJG36 PIRQJH36
FRAMEJ32,36,37
IRDYJ32,36,37
TRDYJ32,36,37
DEVSELJ32,36,37
SERRJ32,36,37
PAR32,36,37
STOPJ32,36,37
VDD18COREPLL VSSCOREPLL AVDD18COREPLL AVSSCOREPLL
M1573A1D
AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31
C_BEJ0 C_BEJ1 C_BEJ2 C_BEJ3
PGNTJ0 PGNTJ1 PGNTJ2 PGNTJ3 PGNTJ4 PGNTJ5 PGNTJ6
PREQJ0 PREQJ1 PREQJ2 PREQJ3 PREQJ4 PREQJ5 PREQJ6
PIRQJA
RQJB
PI PIRQJC PIRQJD PIRQJE PIRQJF PIRQJG PIRQJH
FRAMEJ IRDYJ TRDYJ DEVSELJ SERRJ PAR
STOPJ
CRT_TMDS_DISJ
6
P3
AD0
P2
AD1
P6
AD2
P5
AD3
N4
AD4
P4
AD5
N5
AD6
N1
AD7
N2
AD8
M3
AD9
M2
AD10
M6
AD11
M5
AD12
L4
AD13
L5
AD14
K6
AD15
H6
AD16
J4
AD17
J1
AD18
J2
AD19
H2
AD20
J3
AD21
H3
AD22
G4
AD23
F6
AD24
F5
AD25
G1
AD26
F4
AD27
G2
AD28
G3
AD29
F3
AD30
F2
AD31
N3
CBE0#
L1
CBE1#
H5
CBE2#
G5
CBE3#
A5
PCIGNT0#
E1
PCIGNT1#
C2
PCIGNT2#
D4
PCIGNT3#
C5
PCIGNT4#
B3
PCIGNT5#
B5
PCIGNT6#
A3
PCIREQ0#
B2
PCIREQ1#
C3
PCIREQ2#
C4
PCIREQ3#
C6
PCIREQ4#
B4
PCIREQ5#
B6
PCIREQ6#
D5
PIRQA#
D6
PIRQB#
C1
PIRQC#
E3
PIRQD#
D2
PIRQE#
E2
PIRQF#
E5
PIRQG#
E6
PIRQH#
K4
FRAME#
K5
IRDY#
J5
TRDY#
K3
DEVESEL#
L3
SERR#
L2
PAR
K2
STOP#
D3
CLKRUN#
C7
VDD18COREPLL
D7
VSSCOREPLL
B7
AVDD18COREPLL
A7
AVSSCOREPLL
VDD33M_IO
AC6
VDD33M_IO
VDD33M_IO
VDD33M_IO
VDD33M_IO
VDD33M_IO
VDD33M_IO
VDD33M_IO
VDD33M_IO
VDD33M_IO
PCI
AC4
5
AE1
AE2
AE3
W11
VDD33M_IO
GND
VDD33M_IO
RTC
AC97
LPC
MISC
GND
GND
GND
VDD18R_CORE
VDD18R_CORE
VDD18R_CORE
GND
GND
GND
A1A2B1H4M4R4U4
E4
AE4
AE7
AE6
AE5
VDD18R_CORE
VDD18R_CORE
VDD18R_CORE
VDD18R_CORE
PCICLKFBO
PCICLKFBI
VDD33R_RTC
X32K_OSC_MODE
ACZ_BITCLK ACZ_SDOUT
ACZ_SYNC ACB_BITCLK ACB_SDOUT
ACB_SYNC
VOLUME_UP#
VOLUME_MUTE#
VOLUME_DOWN#
CLK48M /2 4M
AGPSTOP#
AGPBUSY#
RUNGPIO_0 RUNGPIO_1 RUNGPIO_2 RUNGPIO_3
GND
D8
PCICLK
PCICLK0 PCICLK1 PCICLK2 PCICLK3 PCICLK4 PCICLK5 PCICLK6 PCICLK7 PCICLK8 PCICLK9
VDDSW
VDDBAT
X32KI
X32KII
RTCRST#
LAD0 LAD1 LAD2
LAD3 LDRQ0# LDRQ1# SERIRQ
LFRAME#
CLK14M
PCISTP#
CPUSTP#
KBCRC#
A20GATE
SPKR
NC NC NC
E7
PCICLKFBO
F8
PCICLKFBI
E8
R1 U5 R6 R5 R2 T3 U6 T4 R3 T2
V5 V3
VDD33R_RTC
V6 U1
U2 V4 V2
ACZ_BITCLK_SB
W1
ACZ_SDOUT
W2
ACZ_SYNC
W3 Y2 Y3 Y6 W4 Y5 W5
AA1 AB3 AB2 AC3 AD3 AD2 AC2 AA2
AB4 AC1 AC5 AD4 AD6 AD5 AF3 AA3 AA5
Y4 AF2 AB5 AB6
T5 U3 AF5
PCICLK0 PCICLK1 PCICLK2 PCICLK3 PCICLK4 PCICLK5 PCICLK6 PCICLK7 PCICLK8 PCICLK9
X32KI X32KII
X32K_OSC_MODE
12/5/12
BOARD_ID_0 ACB_SDOUT ACB_SYNC BOARD_ID_1 BOARD_ID_3 BOARD_ID_2
LAD0 LAD1 LAD2 LAD3
LDRQ0# SERIRQ
LFRAME#
SPKR_OUT
MO_DET
MO_DET
T11
V11
U11
VDD33M_IO
VDD33M_IO
VDD33M_IO
GND
GND
GND
AA4
4
CLK48M/24MFreq select : high-48M low-24M(default)
CPU MODE select : Low-K8High-P4
Tester Mode EN: L-EN H-DIS
PCICLK_SB 24
R662 0R3-U
1 2
R288 33R3
1 2
R671 33R3 (R)
1 2
R666 33R3 (R)
1 2
R670 33R3
1 2
R293 33R3
1 2
R295 33R3
1 2
R667 33R3 (R)
1 2
R668 33R3
1 2
R664 33R3
1 2
R298 33R3
1 2
Modify 0422
VBAT
R672 0R3-U
1 2
R304 0R3-U
1 2
RTCRSTJ 27
R310 22R3
1 2
ACZ_BITCLK_Codec 38 ACZ_SDOUT 36,38 ACZ_SYNC 36,38
LAD0 27,28,31 LAD1 27,28,31 LAD2 27,28,31 LAD3 27,28,31 LDRQ0# 28
TP63
TP58 TP60 TP64 TP66
TPAD28
TPAD28 TPAD28 TPAD28 TPAD28
SERIRQ 28,31,32 LFRAME# 27,28,31
SB_OSCIN 24
BMREQ# 13 KRST# 28 A20GATE 28 SPKR_OUT 40
IDE_P 25
MO_DET 26
Modify 0503
R352 10KR3
12
3
CLK33_842 32
CLK33_SIO 28 CLK33_SLOT1 36 CLK33_SLOT2 36
Modify 0422
CLK33_LAN 37 CLK33_BIOS 27 CLK33_TPM 31
VCC3_3DUAL
(LCDPC/Consumer)
<Core Design>
VCC3_3
Title
Size Do c ument Number Rev
Custom
Date: Sheet
HW Strapping Setting
2
R331 1KR3
1 2
R321 1K R3
1 2
(R)
R334 1K R3
1 2
(R)
R308 1K R3
1 2
(R)
R306 1K R3
1 2
(R)
R336 1K R3
1 2
RTC Xtal
VCC3_3
12
R392
12
R389
Corporate
10KR3
(R)
12
12
R390
R391
1KR3
1KR3
Consuemr M/B: Board_ID[3..0] = "0001" Corporate M/B: Board_ID[3..0] = "1000" Small Qty M/B: Board_ID[3..0] = "0010"
Modify 0517 /J361Y_Tracking (Item other-069)
R324 1K R3
ACB_SDOUT
R330 1K R3
ACB_SYNC
SPKR_OUT
ACZ_SYNC
ACZ_SDOUT
LFRAME#
X32KI X32KII
6/16
C192
SC8P50V3CN
12
12
R319
LCDPC
10KR3
10KR3
12
12
R328
R338
1KR3
1KR3
(Corporate/LCDPC)
(Corporate/Consumer)
1 2
1 2
R342 1KR3
1 2
R314 1KR3
1 2
R311 1KR3
1 2
R345 1KR3
1 2
R297 10MR3
1 2
XTAL-32D768KHZ-L
12
SC8P50V3CN
Put closed to 96X CHIP
R332
Consume r
10KR3
BOARD_ID_0 BOARD_ID_1 BOARD_ID_2 BOARD_ID_3
Wistron Incorporated
21F, 88, HsinTai Wu Rd Hsichih, Taipei
ULi-M1573 PCI/RTC/AC97/LPC/MISC
J361Y RS482+M1573
2
1
(R)
(R)
(R)
X2
12
12
C200
21 50Thursday,June 16, 2005
1A
of
1
PDF created with pdfFactory trial version www.pdffactory.com
8
VCC18_RUN
D D
R388 Change to 13K+/-1% (M1573 DG110.pdf)
C C
Modify 0505
VCC3_3
B B
VCC3_3
7
R675 0R5J
1 2
L83
1 2
MLB-201209-8-GP
(R)
C261 SC22P
1 2
6/16
C260 SC22P
1 2
Modify 0506
L45
1 2
MLB-201209-9-GP
L46
1 2
MLB-201209-9-GP
SATA_1D8V
12
12
C610
C611
SCD1U
SCD1U
SATACLK1
12
R400
12
X4
1MR3F
XTAL-25MHZ-6
SATACLK2
R387 10KR3F
1 2
R388 13KR3F
1 2
Intern a lPull hig h
FlashROM_WP27
SATA_LED41
For SATA Analog
SATA_AVDDPLL0
12
12
C265
C263 SCD1U
SC4D7U10V5ZY
For SATAAnalog
SATA_AVDDPLL1
12
12
C264
C262 SCD1U
SC4D7U10V5ZY
12
C605 SCD1U
LCD_VID016 LCD_VID116 LCD_VID216
PWRLED*41
12
SC2D2U6D3V3KX
SATA_TXP025 SATA_TXN025 SATA_RXP025 SATA_RXN025
SATA_TXP125 SATA_TXN125 SATA_RXP125 SATA_RXN125
SATA_TXP225 SATA_TXN225 SATA_RXP225 SATA_RXN225
SATA_TXP3 SATA_TXN3 SATA_RXP3 SATA_RXN3
6
C604
SATACLK1 SATACLK2
SATA0_REXT
SATA1_REXT
LCD_VID0 LCD_VID1 LCD_VID2
SATA_GPO0 SATA_GPO1 SATA_GPO2 SATA_GPO3
SATA_LED SATA_AVDDPLL0 SATA_AVDDPLL1
U29A
M1573A1D
AK3 AE9
AH6 AG6 AG4 AH4
AK7
AK5
AF12 AF11
AH10 AG10
AG8 AH8
AK11
AJ11
AK9
AH2 AH1
AH12
AJ12
AG3 AH3 AG2 AG1
AE8 AE11 AE10
AJ3
AF9
AJ7 AJ5
AJ9
AJ2 AF7
Y11
X25M1 X25M2
NC SATA0_REXT
SATA0_TX+ SATA0_TX­SATA0_RX+ SATA0_RX-
SATA1_TX+ SATA1_TX­SATA1_RX+ SATA1_RX-
NC SATA1_REXT
SATA2_TX+ SATA2_TX­SATA2_RX+ SATA2_RX-
SATA3_TX+ SATA3_TX­SATA3_RX+ SATA3_RX-
SATA_GPI[0] SATA_GPI[1] SATA_GPI[2] SATA_GPI[3] SATA_GPO[0] SATA_GPO[1] SATA_GPO[2] SATA_GPO[3]
SATA_LED NC SATA_AVDDPLL0 NC SATA_AVDDPLL1
SATA PLL
SATA_GND
SATA_GND
SATA_GND
Y16
AJ4
AJ6
AJ8
5
Y12
SATA_18M
SATA_18M
SATA_GND
SATA_GND
AJ10
http://hobi-elektronika.net
Y13
Y14
Y15
AF26
AF25
AF24
AF27
SATA_18M
SATA_18M
SATA_18M
SATA_18M
SATA_18M
SATA_18M
SATA_18M
SATA0
Primary
SATA1
Secondary
SATA_GND
SATA_GND
SATA_GND
SATA_GND
SATA_GND
SATA_GND
SATA_GND
SATA_GND
SATA_GND
SATA_GND
SATA_GND
AH5
AH7
AH9
AH11
AG5
SATA_GND
AG7
AG9
AG11
AG12
AF4
AF6
AF8
AF10
3V_SYS1
3V_SYS1
12
12
12
C556 SCD1U
AE21
AE20
AE18
AE17
AE15
AE13
VDD33M_IO
VDD33M_IO
VDD33M_IO
VDD33M_IO
VDD33M_IO
VDD33M_IO
AF22
PIDEA0
AF21
PIDEA1
AE22
PIDEA2
AG18
PIDEDRQ
AF23
PIDECS1#
AG23
PIDECS3#
AE19
PIDEIOR#
AF19
PIDEIOW#
AF20
PIDERDY
AG20
PIDEDAK#
AG21
PIDEIRQ
AJ25
PIDED0
AH24
PIDED1
AJ23
PIDED2
AJ22
PIDED3
AK21
PIDED4
AH21
PIDED5
AH20
PIDED6
AJ19
PIDED7
AK19
PIDED8
AJ20
PIDED9
AJ21
PIDED10
AH22
PIDED11
AH23
PIDED12
AK23
PIDED13
AJ24
PIDED14
AK25
PIDED15
AF16
SIDEA0
AE16
SIDEA1
AG17
SIDEA2
AE14
SIDEDRQ
AF17
SIDECS1#
AF18
SIDECS3#
AF14
SIDEIOR#
AF13
SIDEIOW#
AG14
SIDERDY
AG15
SIDEDAK#
AF15
SIDEIRQ
AJ18
SIDED0
AK17
SIDED1
AH17
SIDED2
AH16
SIDED3
AJ15
SIDED4
AJ14
SIDED5
AK13
SIDED6
AH13
SIDED7
AJ13
SIDED8
AH14
SIDED9
AH15
SIDED10
AK15
SIDED11
AJ16
SIDED12
AJ17
SIDED13
AH18
SIDED14
AH19
SIDED15
SATA_GND
SATA_GND
AE12
GND
GND
GND
GND
AG13
GND
GND
GND
GND
AG16
AG19
AG22
M16
AJ1
AK1
AK2
C569 SCD1U
PIDEA0 PIDEA1 PIDEA2
PIDEDRQ PIDECS1J PIDECS3J PIDEIORJ PIDEIOWJ PIDERDY PIDEDAKJ PIDEIRQ
PIDED0 PIDED1 PIDED2 PIDED3 PIDED4 PIDED5 PIDED6 PIDED7 PIDED8 PIDED9 PIDED10 PIDED11 PIDED12 PIDED13 PIDED14 PIDED15
SIDED7
C574 SCD1U
4
3
12
C612 SCD1U
PIDEA0 25 PIDEA1 25 PIDEA2 25
PIDEDRQ 25 PIDECS1J 25 PIDECS3J 25 PIDEIORJ 25 PIDEIOWJ 25 PIDERDY 25 PIDEDAKJ 25 PIDEIRQ 25
PIDED[0..15] 25
R393
1 2
10KR3
R663 0R5J
1 2
MLB-201209-8-GP
12
C597
SC2D2U6D3V3KX
2
12
L78
(R)
VCC3_3
1
A A
Chip Debug Mode: 00-NormalFuntion
TLBDebugModeEN:0-Dis1-En
PCI Bus0/BusN: 0-Bus0/1-BusN
PDF created with pdfFactory trial version www.pdffactory.com
8
VCC3_3
HW Strapping Setting
R368 1KR3
1 2
(R)
R385 1KR3
1 2
(R)
R346 1KR3
1 2
(R)
R361 1KR3
1 2
SATA_GPO0
SATA_GPO1
SATA_GPO2
SATA_GPO3
R372 1KR3
1 2
R386 1KR3
1 2
R349 1KR3
1 2
R365 1KR3
1 2
7
<Core D esign>
Title
ULi-M1573 SATA & IDEI/F
Size Document Number Rev
Custom
J361Y RS482+M1573
(R)
6
5
4
3
Date: Sheet
2
Wistron Incorporated
21F, 88, HsinTaiWuRd Hsichih, Taipei
of
22 50Thursday,June 16, 2005
1
1A
8
VCC3_3SB
R653 0R5J
1 2
L77
1 2
MLB-201209-9-GP
12
C543
(R)
SC10U10V5ZY
D D
VCC18_DUAL
L81
1 2
MLB-201209-9-GP
12
C571
G14
SC10U10V5ZY
C C
COPPER-CLOSE
VCC5_USB_F
B B
3V_DUAL_IO 3V_DUAL_IO
12
12
C546
C542
12
C561
SC4D7U10V5ZY
1 2 1 2
R630 0R5J
1 2
L21
1 2
MLB-201209-9-GP
(R)
G13
COPPER-CLOSE
SCD1U
VSSUSBBGR
12
SC2D2U10V3ZY
12
R245 47KR3 R241 56KR3
VCC3_3SB
12
C137
(R)
SC10U10V5ZY
Modify 0503
ACZ_SDIN2 ACZ_SDIN136 ACZ_SDIN038
12
12
R747
R746
8K2R3
8K2R3
A A
8
20/7.5/7.5/7.5/20
AVDD18RUSBPLL
12
C554 SCD1U
AVSSUSBPLL
OC*02
(R) (R)
12
SCD01U25V2KX
(R)
12
R748
8K2R3
7
12
C551 SCD1U
12
48MHz_USB24
12
C547 SCD1U
6/14
OC*1326 OC*4526
OC*6726
Modify 0427
R634 13K3R3F
1 2
R633 13K3R3F
1 2
VDD33RUSBBG R
12
C538
C537
SCD1U
(R)
VSSUSBBGR
ACZ_RST*36,40 ACB_SDIN
7
C549 SCD1U
USBP0P17,26 USBP0N17,26
USBP1P26 USBP1N26
USBP2P26 USBP2N26
USBP3P26 USBP3N26
USBP4P26 USBP4N26
USBP5P26 USBP5N26
USBP6P26 USBP6N26
USBP7P26 USBP7N26
OC*02
AVSSUSBPLL AVDD18RUSBPLL
VSSUSBBGR VDD33RUSBBG R
USB_TX_CS USB_RX_TXEM
ACZ_SDIN2 ACZ_SDIN1 ACZ_SDIN0 ACZ_RST* ACB_SDIN
USBP0P USBP0N
USBP1P USBP1N
USBP2P USBP2N
USBP3P USBP3N
USBP4P USBP4N
USBP5P USBP5N
USBP6P USBP6N
USBP7P USBP7N
6
U29B
M1573A1D
6
F24
USBCLK
C24
USB_D0+
D24
USB_D0-
C22
USB_D1+
D22
USB_D1-
A25
USB_D2+
B25
USB_D2-
A23
USB_D3+
B23
USB_D3-
C20
USB_D4+
D20
USB_D4-
C18
USB_D5+
D18
USB_D5-
A21
USB_D6+
B21
USB_D6-
A19
USB_D7+
B19
USB_D7-
D27
USBOV0#
E26
USBOV1#
B26
USBOV2#
E27
USBOV3#
A27
USBOV4#
C26
USBOV5#
D26
USBOV6#
E25
USBOV7#
F23
AVSSUSBPLL
F22
AVDD18RUSBPLL
F18
AVSSUSBBGR
F19
AVDD33RUSBBG R
C17
USB_TX_CS
B17
USB_RX_TXEM
C27
GND
C25
GND
D25
GND
B24
GND
E24
GND
C23
GND
D23
GND
B22
GND
E22
GND
C21
GND
D21
GND
B20
GND
E20
GND
C19
GND
D19
GND
B18
GND
E18
GND
D17
GND
E10
ACZ_SDATAIN2
D10
ACZ_SDATAIN1
E11
ACZ_SDATAIN0
F11
ACZ_RST#
E9
ACB_SDATAIN
F9
ACB_RST#
D11
GND
D9
GND
N13
GND
N14
GND
N15
GND
N16
GND
N17
GND
N18
GND
5
http://hobi-elektronika.net
E19
F20
E21
F21
E23
L18
L19
L17
VDD33RUSB
USB
GND
GND
GND
GND
GND
P15
P13
P14
P18
P16
P17
VDD33RUSB
VDD33RUSB
VDD33RUSB
AC97
GND
GND
GND
R13
R14
R15
VDD33RUSB
GND
VDD33RUSB
VDD33RUSB
VDD33RUSB
M17
VDD33RUSB
F14
F13
VDD33R_IO
VDD33R_IO
TXCLK
LAN
RXCLK
VDD33R_IO VDD33R_IO VDD33R_IO VDD33R_IO VDD33R_IO VDD33R_IO
VDD18R_COR E VDD18R_COR E VDD18R_COR E VDD18R_COR E VDD18R_COR E VDD18R_COR E
RESUME
SMBCLK
SMBDATA
SMBALERT # OFFCLKS1#
OFFPW RS3#
OFFPWRS4_S5#
PCIEX_WAKEUP#
SUSPEND#
PWRBTN#
PCIRST#
RSMRST#
SUSLED
CLK32KO
LOWBAT#
SLPBTN#
DFTSE DFTTM
ACPWR RSMGPIO_0 RSMGPIO_1 RSMGPIO_2 RSMGPIO_3
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
R18
R16
R17
T15
T13
T14
T18
T16
T17
U13
U16
U14
U15
U17
V14
U18
V13
5
EECS EECK
EEDO
MDIO
TXEN TXD0 TXD1 TXD2 TXD3
RXER RXDV RXD0 RXD1 RXD2 RXD3
PME#
PWG
GND
V15
EEDI
MDC
CRS COL
GND GND
GND GND GND GND GND GND GND
RI
LID
4
12
C545
SC2D2U10V3ZY
D13 A13
R642 0R3-U
B13 C13
A15
R641 0R3-U
B15 C16 A17
F15 D14 C14 B14 E14 E13
B16 E17 F17 D16 E16 E15 C15
D15 F16
F10 F12 L14 L15 M14 M15
1D8V_DUAL_IO
L11 L12 L13 L20 N11 M11
ALERT_CLK
B12
ALERT_DATA
C12
SMBALERT
D12 E12
C8 B9
PCIEX_WAKEUP#
B11
RI#
C11
PME#
B10 C30 A9
PCIRST#_SB
C10
RSMRST#
A11
SB_SUSLED
A28
CLK32_KO_SIO
E30 D28 C28
SLPBTN#
B8 C9
DFTSE
B28
DFTTM
B29 B27 E28 E29 C29 D29
A29 B30 A30 V17 V18 L16 V16
4
12
12
C568 SCD1U
1 2
1 2
SC2D2U10V3ZY
1D8V_DUAL_IO
12
C566 SCD1U
ALERT_CLK 28,36,37 ALERT_DATA 28,36,37 IO_PMES3# 28
OFFPW RS3# 28,42,47 OFFPWRS4_S5# 17,28
SB_PWRBTN#
PCIRST#_SB 47
R275 0R3-U
1 2
IO_PMES5# 28
R260 0R3-U
1 2
R268 0R3-U
1 2
USBPWR_Ctrl 42 ACPILED* 41 ACPI_S3 47 842HWSPNDJ 32
C555 SCD1U
12
12
C548
12
C622 SCD1U
TP33
PME# 32,36,37 SUSPEND# 31
SB_PWRBTN# 41
TP2 TP1
TP31
12
C541 SCD1U
C550 SCD1U
R673 0R5J
TPAD28
(R)
TPAD28 TPAD28
TPAD28
3
NAND TREE TEST EN: 0-Disable
32K Test Mode EN: 0-Disable
12
12
C579
C567
SCD1U
SCD1U
1 2
VCC18_DUAL
Modify 0506
RSMRST# 28 CLK32_KO 28
SB_PWRGD 47
ACPI _S3: Act ive high to indicate the system is in S3
3
2
HW Strapping Setting
R215 1KR3
VCC3_3SB
3V_DUAL_IO
VCC3_3SB
VCC3_3SB VCC3_3SB
VCC3_3SB
VCC3_3SB
<Core Design>
Title
ULi-M1573 USB&AC97&RESUME I/ F
Size Doc ument Number Rev
Custom
J361Y RS482+M1573
Date: Sheet
1 2
R253 1KR3
1 2
R644 8K2R3
1 2
R645 8K2R3
1 2
R646 8K2R3
1 2
R643 8K2R3
1 2
R233 8K2R3
1 2
R234 8K2R3
1 2
R647 2K2R3
1 2
RI#
RI#: High-Normal
Low-Ring up
(R)
(R)
(R)
(R) (R)
R648 2K2R3
ACB_RST*
SB_SUSLED
ALERT_DATA ALERT_CLK SMBALERT
RSMRST# SLPBTN#
PCIEX_WAKEUP#
1 2
(R)
2
1
R217 1KR3
1 2
R256 1KR3
1 2
Wistron Incorporated
21F, 88, Hsin TaiWuRd Hsichih, Taipei
23 50Thursday, June 16, 2005
1
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8
L52
1 2
VCC3_3
MLB-201209-9-GP
D D
VCC3_3
L86
1 2
MLB-201209-9-GP
G16
1 2
COPPER-CLOSE
C C
12
CLK_VDD48
CLK_VDDA
12
C674 SCD1U
CLK_GNDA
R464 1MR3
1 2
(R)
X5
12
X-14D31818M-9-U
C301 SC22P
12
C305 SCD1U
12
C673 SCD 01U50V3KX
CLK_X1 CLK_X2
12
C302 SC22P
7
Modify 0506
12
C691
SC10U10V5ZY
HTREFCLK13
R480 49D9R3F
6
48MHz_USB23
1 2
PCICLK_SB21
Ioh= 5 * Iref (2.32mA) Voh = 0.71V @ 60 ohm
http://hobi-elektronika.net
CLK_VDD48 CLK_VDDA
CLK_3.3V
CLK_X1
R471 33R3
1 2
R486 33R3
1 2
R703 33R3
1 2
R495 475R3F
1 2
CLK_X2 48MHz_CLK
SMBCLK10,28
SMBDAT10,28
R478 0R3-U
1 2
R481 0R3-U
1 2
FS2 FS1 FS0
CLK_REF2 CLK_HTTCLK
PCICLK_CLKG
CLKG_IREF
3 39 32
21 14 35
56 51 43 48
1
2
4
7
8 10
11
9 53 54
52 47
50 37
6
U46
VDD48 VDDA VDDATI
VDDSRC VDDSRC VDDSRC
VDDREF VDDPCI VDDCPU VDDHTT
X1 X2
USB_48MHZ SCLK SDATA
CLKREQA# CLKREQB#
FS2 FS1/REF1 FS0/REF0
REF2 HTTCLK0
PCICLK0 IREF NC#6
ICS951412
5
4
SRCCLKC0
SRCCLKT0
SRCCLKC3
SRCCLKT3
SRCCLKC4
SRCCLKT4
SRCCLKC5
SRCCLKT5
SRCCLKC6
SRCCLKT6
SRCCLKC7
SRCCLKT7
CPUCLK8C1
CPUCLK8T1
CPUCLK8C0
CPUCLK8T0
ATIGCLKC0
ATIGCLKT0
ATIGCLKC1
ATIGCLKT1
GNDSRC GNDSRC GNDSRC GNDSRC
GNDCPU
GNDPCI
GNDHTT
GNDATI
GNDA
GND GND
33 34 25 24 23 22 19 18 17 16 13 12
40 41 44 45
29 30 28 27
36 20 15 26
42 49 46 31 38 5 55
3
SRCCLKC0 SRCCLKT0 SRCCLKC3 SRCCLKT3
ATIGCLKC0 ATIGCLKT0 ATIGCLKC1 ATIGCLKT1
R712 33R3
1 2
R710 33R3
1 2
R499 33R3
1 2
R497 33R3
1 2
20/5/5/5/20, length<500 mils 20/5/5/5/20,
CPUCLK8C0 CPUCLK8T 0
R716 33R3
1 2
R715 33R3
1 2
R511 33R3 (R)
1 2
R509 33R3 (R)
1 2
PCIE16X_Riser_N
CLK_GNDA
PCIE16X_Riser_P SBSRC_CLKN
SBSRC_CLKP
SB_CLKN SB_CLKP
SBSRC_CLKN SBSRC_CLKP
R492 15R3F
1 2
R489 15R3F
1 2
GFX_CLKN
GFX_CL K P PCIE16X_Riser_N PCIE16X_Riser_P
SB_CLKN SB_CLKP
GFX_CLKN GFX_CLKP
R713 49D9R3F R709 49D9R3F
R717 49D9R3F R714 49D9R3F
R513 49D9R3F(R) R510 49D9R3F
R502 49D9R3F R496 49D9R3F
SB_CLKN 13 SB_CLKP 13
1 2 1 2
1 2 1 2
1 2 1 2
(R) 1 2 1 2
2
SBSRC_CLKN 20 SBSRC_C LKP 20
CPUCLK0_L 8 CPUCLK0_H 8
GFX_CLKN 13 GFX_CL K P 13 PCIE16X_Riser_N PCIE16X_Riser_P
1
CLK_3.3V
12
R700
2K2R3
12
R698
(R)
0R3-U
12
R696
2K2R3
12
R695
(R)
0R3-U
12
R490
2K2R3
12
R482
(R)
0R3-U
12
C368 SCD1U
12
C326 SCD1U
CLK_3.3V
12
C328 SCD1U
12
C304 SCD1U
Modify 0506
12
C692
SC10U10V5ZY
FS2
R472 8K2R3
FS1
R699 8K2R3
FS0
R694 8K2R3
1 2 1 2 1 2
L87
VCC3_3
B B
1 2
MLB-201209-8-GP
12
12
C319 SCD1U
12
C324 SCD1U
12
C352 SCD1U
12
C311 SCD1U
C676
SC10U10V5ZY
EXT CLK FREQUENCYSELECT TABLE(MHZ)
FS2
0 0 0
A A
0 0 1 0 1 0
0 1 1 1 0 0 1 0 1 1 1 1
8
CPU
Hi-Z X
180.00
SRCCLKFS1
[2:1]
100.00
100.00
100.00
FS0
220.00
100.00
100.00 48.00
133.33
100.00 NormalATHLON6 4operation
200.00
7
HTT
Hi-Z X/3
60.00
36.56
66.66
66.66
66.66
PCI
Hi-Z X/6
30.00
73.12100.00
33.33
33.33100.00
33.33
USB
48.00
48.00
48.00
48.00
48.00
48.00
COMMENT
Reserved Reserve d Reserve d Reserve d Reserved Reserved
6
5
4
3
REFCLK0_x : 14.31818MHz forAC97_OSCINand SIO REFCL K1 : 14.31 818MHz for RS482M REFCL K2 : 14.31 818MHz for M1573
FS0 FS1 CLK_REF2
REFCLK0_2
REFCLK0_1
REFCLK1
REFCLK2
<Core Design>
6/15
R692 15R3F
1 2
R693 15R3F
1 2
R697 33R3 R470 33R3
C663 SC10P
1 2
C665 SC10P
1 2
C667 SC10P
1 2
C317 SC10P
1 2
REFCLK0_2 REFCLK0_1
REFCLK1
12
REFCLK2
12
(R) (R) (R) (R)
SIO_CLKIN 28 AC97_OSCIN 38 NB_OSCIN 13 SB_OSCIN 21
Wistron Incorporated
21F, 88, Hsin Tai Wu Rd
Title
CLOCK GENERATOR
Size Documen tNumber Rev
Custom
J361Y RS482+M1573
Date: Sheet
2
Hsichih, Taipei
24 50Thursday, June 16, 2005
1
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8
D D
VCC3_3
C C
7
SCD047U25V3ZY
PCBLID
12
C21
PIDED[0..15]
PIDED[0..15]22
R25 10KR3
1 2
R27 10KR3
1 2
R29 10KR3
1 2
R28 10KR3
1 2
12
R74
100KR3
PIDED7
6
PIDERDY PIDEIRQ PIDEDRQ
VCC5
5
http://hobi-elektronika.net
R26 1KR3
1 2
RST_IDE*28
PIDEDRQ22
PIDEIOWJ22
PIDEIORJ22
PIDERDY22
PIDEDAKJ22
PIDEIRQ22
PIDEA022
PIDECS1J22
IDEACT_LED*41
IDE Connector
IDERST­PIDED7 PIDED6
PIDED4 PIDED3 PIDED2 PIDED1 PIDED0
PIDEDRQ PIDEIOWJ PIDEIORJ PIDERDY PIDEDAKJ PIDEIRQ PIDEA1 PIDEA0 PIDECS1J IDEACT_LED*
4
CN8
1 3 5 7 9
11 13 15 17 19 21 23 25 27 29 31 33 35 37 39
DVD-CONN40A-1
3
2 4 6 8 10 12 14 16 18
X
22 24 26 28 30 32 34 36 38 40
PIDED8 PIDED9 PIDED10PIDED5 PIDED11 PIDED12 PIDED13 PIDED14 PIDED15
PCBLID PIDEA2 PIDECS3J
IDE_P 21PIDEA122 PIDEA2 22 PIDECS3J 22
2
1
CN4
B B
TCN-CON7
CN12
A A
TCN-CON7
8 1 2
3 4 5 6 7
9
8 1 2
3 4 5 6 7
9
8
SRX0+_C SRX0-_C
STX0-_C STX0+_C
SRX2+_C SRX2-_C
STX2-_C STX2+_C
C5 SCD01U25V2KX
1 2
C6 SCD01U25V2KX
1 2
C9 SCD01U25V2KX
1 2
C11 SCD01U25V2KX
1 2
C33 SCD01U25V2KX
1 2
C35 SCD01U25V2KX
1 2
C39 SCD01U25V2KX
1 2
C40 SCD01U25V2KX
1 2
7
SATA_RXP0 22 SATA_RXN0 22
SATA_TXN0 22 SATA_RXP1 22 SATA_TXP0 22
SATA_RXP2 22 SATA_RXN2 22
SATA_TXN2 22 SATA_TXP2 22
6
5
SATA Connector
CN34
TCN-CON7
4
8 1 2
3 4 5 6 7
9
SRX1+_C SRX1-_C
STX1-_C STX1+_C
<Core Design>
Title
IDE and SATA CONN
Size Document Number Rev
Custom
J361YRS482+M1573
Date: Sheet
3
C358 SCD01U25V2KX
1 2
C359 SCD01U25V2KX
1 2
C360 SCD01U25V2KX
1 2
C361 SCD01U25V2KX
1 2
Wistron Incorporated
21F, 88, HsinTaiWu Rd Hsichih, Taipei
2
SATA_RXN1 22 SATA_TXN1 22
SATA_TXP1 22
25 50Thursday, June 16, 2005
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1A
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8
USB CONN
Rear U SB CONN 1(Port 4 and Port6)
VCC5_USB_R
D D
F4
1 2
FUSE-1D5A6V-2
12
USBVCC46_L
C184 SCD1U
12
R274 47KR3
12
1 2
MLB-201209-8-GP
OC*13 23
R280 56KR3
L33
6/14
USBVCC46
12
TC30 E470U16VM-L
7
Rear USB CONN 2(Port5 and Port7) Front USB CONN(Port 0 and Port2)
VCC5_USB_R
12
C178 SCD1U
F5
1 2
FUSE-1D5A6V-2
6
http://hobi-elektronika.net
12
R318 47KR3
12
R317 56KR3
L35
1 2
MLB-201209-8-GP
OC*45 23
6/14
12
USBVCC57_L
C217 SCD1U
USBVCC57
12
TC38 E470U16VM-L
5
12
C216 SCD1U
VCC5_USB_F
4
F6
1 2
FUSE-1D5A6V-2
12
USBVCC02_L
C310 SCD1U
12
R469 47KR3
12
R468 56KR3
L51
1 2
MLB-201209-8-GP
OC*67 23
6/14
USBVCC02
12
TC44 E470U16 VM-L
3
2
1
Modify 0504
12
C306 SCD1U
USBP0N_CN
USBP0P_CN
U58
1
CH4
CH1
2
VN
3 4
CH2 CH3
CM1293-04SO-GP
(R)
USBP2N_CN
6
USBVCC02
5
VP
USBP2P_CN
6/146/146/14
123
RNA2
SRN15KJ-1-GP
6/96/9
USBVCC57 USBP7N_CN
USBP5N_CN USBP7P_CN USBP5P_CN
XF2
1
2 3
4
L220UH-U (R)
11
9 5
1 6 2 7 3 8 4
10 12
8
7 6
5
CN25
PWR-USB-5
RNA3
SRN15KJ-1-GP
6/9
CN28
UP
PWR-USB-5
XF3
1
2 3
4
L220UH-U (R)
DOWN
USBP0P_CN USBP0N_CN USBVCC02
USBP2P_CN USBP2N_CN USBVCC02
USBP0N_CN
USBP0P_CN USBP2P_CN
USBP2N_CN
5 4 3 2 1
5 4 3 2 1
CN27
JST-CON5-4
(R)
CN26
JST-CON5-4
(R)
SMART CARD CIRCUIT
VCC3_3SB
12
SMC_ON
12
C19
SLP_S1_S5_L*: High@S4,S5
SLP_S1_S5_L*28
R61
1 2
10KR3
SC1000P50V3KX
USB Layout Rule : 20/7.5/7.5/7.5/20
R60 1KR3
R49 100KR3
3
2
1
Q16 2N3904-L1-U
PBTNJ_CON 29,40,41
3
Q17 2N3904-L1-U
2
12
1
8
7 6
5
Modify 0422
USBP5N_CN
USBP5P_CN USBP7P_CN
USBP7N_CN
UP
DOWN
USBP7N23
USBP7P23 USBP6P23
USBVCC02 USBP2N_CN
USBP0N_CN
USBP2P_CN USBP0P_CN
123
45
678
11
9 5
1 6 2 7 3 8 4
10 12
XF1
123
RNA1
SRN15KJ-1-GP
Modify 0504
USBVCC46 USBP4N_CN
USBP6N_CN USBP4P_CN USBP6P_CN
1
2 3
4
USBP3N23
USBP3P23
USBP1P23
USBP1N23
C C
B B
USBVCC46
USBP4N_CN
6
5
VP
CH4
CH1VNCH2 CH3
123 4
USBP6N_CN
45
678
USBP4P_CNUSBP6P_C N
U60 CM1293-04SO-GP
(R)
L220UH-U (R)
11
9 5
1 6 2 7 3 8 4
10 12
8
7 6
5
CN23
PWR-USB-5
USBP6N_CN
USBP6P_CN USBP4P_CN
USBP4N_CN
UP
DOWN
USBP5N23
USBP5P23 USBP4P23
USBP4N23 USBP6 N23
45
678
Modify 0504
USBP5N_CN
USBVCC57
USBP5P_CN
U59
6
5
CM1293-04SO-GP
(R)
VP
CH4
CH1VNCH2 CH3
123 4
USBP7N_CN
USBP7P_CN
VCC5SB
6/14
USBP2N23 USBP2P23
PBTNJ_REMOTE29,40,41
TVONJ_ RMT41
VCC5_USB_F
12
R19
15KR3
RST1
12
R564 1KR3
RSTJ
3
Q78
1
2N3904-L1-U
2
7
VCC3_3SB
A A
VCC3_3SB
12
R549 20KR3
147
12
1 2
C413 SC1U10V3KX
Modify 0518 /J361Y tracking (item other : 058)
8
U48A
SOLVC14
RSTRSTJ1
R550
1 2
4K7R3
12
R20
15KR3
VCC5_USB_F
TVONJ_ RMT
USB Header
RSTJ
6
CN7
1
X
3 5 7 9
11
X
ARC-CONN12A-FP
CN2
1
X
3 5 7 9
11
X
ARC-CONN12A-FP
2 4
6 8 10 12
2 4
6 8 10 12
RSTJ
SMC_ON
USBP1N_CON USBP1P_CON
VCC5SB
PBTNJ_WIRLESS 29,40,41 MO_DET 21
6/9
VCC5SB
R602 0R3-U
1 2
R601 0R3-U
1 2
Place near TMDSconnecotr
5
TMDSUSBPORT for TMDS only
12
12
6/9
R603
6/14
USBP0N 1 7 ,2 3 USB1P_EXT 17,23 USBP0P 17,23
4
R600
15KR3
15KR3
USBP0P17,23
USBP0N17,23
USB1P_EXT
USB1N_EXT
USB1N_EXT 17,2 3
3
<Core Design>
Title
USB CNT
Size Docu ment Number Rev
Custom
J361YRS482+M1573
Date: Sheet
2
Wistron Incorporated
21F, 88, HsinTai Wu Rd Hsichih, Taipei
26 50Thursday, June 16, 2005
of
1
1A
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8
7
6
5
4
3
2
1
http://hobi-elektronika.net
LPC FLASH ROM
16
28
27
26
22
D D
R707 4K7R3
VCC3_3
6/13
FlashROM_WP22
corporate
R773
1 2
S
1KR3
Modify 0508
consumer: unmount R773 ,Q101 corporate: mount R773 ,Q101
C C
R475 1KR3
1 2
RN13
1 2 3 4 5
SRN1K
12
FlashROM_WP#
3
Q101
2N3904-L1-U
2
corporate
1
8 7 6
LFRAME#21,28,31
VCC3_3
CLK33_BIOS21
PCIRST#_BIOS47
30
A10/GPI4
3
A9/GPI3
4
A8/GPI2
5
A7/GPI1
6
A6/GPI0
7
A5/WP#
8
A4/TBL#
9
A3/ID3
10
A2/ID2
11
A1/ID1
12 13
A0/ID0 DQ0/LAD0
VCC3_3
12
C675
C670
SCD1U
SC10U10V5ZY
R507 4K7R3
12
R485 33KR3
1 2
NC
VSS
VDD
25
NC
VSS
OE#/INIT#
WE#/LFRAME#
VDD
24
23
32
31
49LF004B334CNH
NC
DQ7/RES DQ6/RES DQ5/RES
DQ4/RES DQ3/LAD3 DQ2/LAD2 DQ1/LAD1
MODE
R/C#/CLK
RST# NC
29
2 1
U47
21 20 19 18
LAD3
17
LAD2
15
LAD1
14
LAD0
RN14
1 2 3 4 5
8 7 6
SRN1K
LAD[0..3] 21,28,31
BIOS SCOKET P/N : 62.10061.001
RTC Battery
B B
A A
Modify 0422
VBAT
Close to ULi M1573
12
C536
SC1U16V3KX
RTCRSTJ21
D45
3
BAV70-1
PWR_BAT2
12
C534
SC1U16V3KX
Modify 0508
1
VCC3_3DUAL
2
R628 10KR3
1 2
JP1
1 2 3
DVD-CON3-5
Consumer
JP1
2-3
I(R627) must be less than 4.566uA
R627 100R3
1 2
C535 SCD1U
1 2
COMS setup NORMAL (Default)1-2 CLEAR CMOS
Battery P/N-23.20023.L01 200mAH
RTCD2
1 2
CR2032-1
BT1
<Core Design>
Wistron Incorporated
21F, 88, Hsin Tai Wu Rd Hsichih, Taipei
Title
BIOS/Battery RTC
Size Document Number Rev
Custom
J361Y RS482+M1573
Date: Sheet
8
7
6
5
4
3
2
of
27 50Thursday, June 16, 2005
1A
1
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5
SIO SMSC DM1737/FDD Header
D D
SMBus to DDR/CLK GEN
R487 3K3R3
VCC3_3
C C
OFFPWRS4_S5# OFFPWRS3# SM
B B
SE_TDP
SE_TDN
VCC3_3DUAL
VCC5 VCC12 VCC5 VCC5SB
BDAT
RA24 0R3-U
1 2
RA20 0R3-U
(R)
1 2
RA21 0R3-U
(R)
1 2
RA22 0R3-U
1 2
2 4
6 8
10
System Sensing Diode 10mil trace
1 2
R479 3K3R3
1 2
CN11
1 3
5 7 9
DVD-CONN10D-3-GP
VCC3_3
NB_THRMDA 13
SE_ZONE_TDP
12
C43
SE_ZONE_TDN
SC100P25V2JN
NB_THRMDC 13
SMBCLK
R81 10KR3
1 2
R84 10KR3
1 2
R86 10KR3
1 2
R87 10KR3
1 2
R90 10KR3
1 2
1
6/13
VCC5
5
VCC5
12
C2 SCD1U
12
C49 SCD1U
RPM
A A
RPM
12
RA7 1MR3J-1-GP
For FDD detect 1: FDD 0: non FDD
SMBDAT SMBCLK
Modify 0512 /J361Y Tracking(Item:other051)
3
Q19
2N3904-L1-U
2
VCC_CORE
VCC5SB
FDD Connector
CN1
1 3 5 7 9 11 13 15 17 19 21 23 25
MOLEX-CON N26A
VCC3_3
CLK32_KO23
If 32.768KHzclk isn't used by SIO, thenit needs pull-low externally.
VID_SIO_4 VID_SIO_3 VID_SIO_2 VID_SIO_1 VID_SIO_0
VCC12
VCC5
2 4 6
8 10 12 14 16 18 20 22 24 26
4
R103 10KR3
1 2
VCC3_3DUAL
10KR3
1 2
SMBUSADD2Eh
G2
1 2
COPPER-CLOSE
G3
1 2
COPPER-CLOSE
G4
1 2
COPPER-CLOSE
G5
1 2
COPPER-CLOSE
INDEX* DR0* DSKCHG*
MTR0* FDIR* STEP* WDATA* WGATE* TRK0* WRTPRT* RDATA*
4
SIO_CLKIN24
LFRAME#21,27,31
LDRQ0#21
PCIRST#_SIO47
CLK33_SIO21
CLKI32_SIO
12
R740
10KR3
R75
HM_VCC5SB
HM_VCC12
HM_VCC5
Modify 0519 / follow UPF05_P4 mode
IO_PMES3#23 IO_PMES5#23
LCDONJ_SIO41
ALERT_CLK23,36,37
ALERT_DATA23,36,37
R70 10KR3
1 2
REAR_FAN2_CTRL41
REAR_FAN _ CTRL41
CPU_FAN_CTRL41
REAR_FAN 2 _TACH41
REAR_FAN _ TACH41
CPU_FAN_TACH41
THER MDC_CPU8
THERMDA _CP U8
RN5
6 7 8
SRN680-U
WDATA*
DSKCHG*
RDATA* WRTPRT* TRK0* INDEX*HDSEL *
R14
1 2
R13
1 2
RN1
1 2 3 4 5
SRN1K
SMBDAT10,24
SMBCLK10,24
45 3 2 1
3
http://hobi-elektronika.net
RPM INDEX*
MTR0* DR0* FDIR*
STEP* WDATA* WGATE* TRK0* WRTPRT* RDATA* HDSEL* DSKCHG*
SIO_CLKIN LAD0
LAD021,27,31
LAD1
LAD121,27,31
LAD2
LAD221,27,31
LAD3
LAD321,27,31
LFRAME# LDRQ0#
CLK33_SIO SERIRQ
SERIRQ21,31,32
TVLED*41
SMBDAT SMBCLK
HWM_SMI*
VID_SIO_4 VID_SIO_3 VID_SIO_2 VID_SIO_1 VID_SIO_0 SE_TDN
SE_TDP THER MDC_CPU THER MDA_CPU
HM_VCCP_RHM_VCCP HM_VCC5SB_R HM_VCC12_R HM_VCC5_R
VCC3_3
1KR3
1KR3
8 7 6
SMI#
102 103 104 105 106 107
108 109 110 111 112 113 114 115 116 117 118 119 120 123 124 125 126 127 128
SYSOPYStrap Pull High-0X04E
Pull Low-0X02E
3
3
GP40/DRVDEN0
14
INDEX~
5
MTR0~
7
DS0~
9
DIR~
10
STEP~
11
WDATA~
12
WGATE~
15
TRK0~
16
WRTPRT~
17
RDATA~
13
HDSEL~
6
DSKCHG~
18
CLOCKI
19
LAD0
20
LAD1
21
LAD2
22
LAD3
23
LFRAME~
24
LDRQ~
25
PCIRST~
26
PCICLK
27
SERIRQ
36
GP27/IO_SMI~/P17
99
CLKI32
90
GP42/IO_PME_S3~
92
IO_PME_S5~/GP43
93
GP61/LED2~/MS_LED~
94
GP60/LED1~/WDT
SDA2 SCLK2 SDA1 SCLK1 SCLK SDA
HWM_INT~ PWM3/ADDR_EN# PWM2 PWM1/XTESTOU T FANTACH 4/ADDR _ SEL VID5/FANTACH3 FANTAC H2 FANTACH1 VID4 VID3 VID2 VID1 VID0 REMOTE2­REMOTE2+ REMOTE1­REMOTE1+ VCCP_IN +5VTR_IN
1
+12V_IN
2
+5V_IN
PQFP128H134
RTS*1
VCC3_3SB
VCC3_3
VCC3_3
12
R55 10KR2
(R)
12
R56 270R3
4
72
122
VCC
VCC
VCC
VCC
VCC
HVCC
LPC Interface FloppyInterface
SMBus
Hardware Monitoring
and FAN Control
VSS
VSS
VSS
VSS#55
VSS
8
31294335554474
101
VSS
VBAT
91
VTR
SerialPort 2
System Signals
HVSS
121
2
C51 SCD1U
1 2
32
U5 DM E1737-1
VBAT
Parallel Port Interface
TXD1/SIO_XNOR_OUT
SerialPort 1
GP57/DTR2~/PWM4
GP56/CTS2~/FANTACH5
GP55/RTS2~/PWM5
GP54/ DSR2~/FANTACH6
GP53/TXD2/IRTX
GP52/RXD2/IRRX
Mouse
Keyboard/
IDE_RSTDRV~/GP10 PCIRST_OUT1~/GP11 PCIRST_OUT2~/GP12 PCIRST_OUT3~/GP13 PCIRST_OUT4~/GP14
AVSS
Delta Spec. Rev 0.2 1/06/04
34
2
1
SLCT
56
SLCT
57
PE
58
BUSY
59
ACK~
54
PD7
53
PD6
52
PD5
51
PD4
50
PD3
49
PD2
48
PD1
47
PD0
46
SLCTIN~
45
INIT~
60
ERROR~
61
ALF~
62
STRO BE~
64
DCD1~
67
DSR1~
65
RXD1
RTS1~/SYSOPT
GP36/KBDRST~
PWRGD_CPU 3VSB_GATE~
68 66 69
CTS1~
70
DTR1~
63
RI1~
80 79 78 77 76 75 73
GP51/DCD2~
71
GP50/RI2~
KBCLK
38
KCLK/GP22 KDAT/GP21 MCLK/ GP33 MDAT/GP32
GP37/A20M
SPEAKER
INTRD_IN~
FPRST~
PWRGD_PS PWRGD_3V
3V_GATE~
SLP_S5~ SLP_S3~
PB_IN~
RSMRST~
<Core Design>
Title
Size Document Number Rev
Custom
Date: Sheet
KBDAT
37
PMCLK
40
PMDAT
39
KRST#
41
A20GATE
42
28 97 96 95 87
30
INTRUDER
33
FPRST#
81
PWRGD_PS
82 83 84 85 86
OFFPWRS4_S5#
88 89
PB_IN
98 100
consumer: mount R102 ,unmount RA19 corporate: mount RA19, unmount R102
SIO DM1737 & FDD Conn
J361Y RS482+M1573 1A
PE BUSYP PACK* PP7 PP6 PP5 PP4 PP3 PP2 PP1 PP0 SLIN* PINIT*
ERRORP* AUTO FD*
STRO B*
DCD*1 DSR*1 RXD1 RTS*1 TXD1 CTS*1 DTR*1 RI*1
DTR*2 CTS*2 RTS*2 DSR*2 TXD2 RXD2 DCD*2 RI*2
OFFPW RS3#
6/13
INTRUDER
KBCLK 29 KBDAT 29 PMCLK 29 PMDAT 29 KRST# 21 A20GATE 21
RST_IDE* 25 LAN_DISJ 37
SLP_S1_S5_L* 26 SUSLED* 41
SLCT 30 PE 30 BUSYP 30 PACK* 30
PP[0..7]
PP[0..7] 30
SLCTIN* 30 PINIT* 30 ERRORP* 30 AUTO FD* 30 STRO B* 30
DCD*1 30 DSR*1 30 RXD1 30 RTS*1 30 TXD1 30 CTS*1 30 DTR*1 30 RI*1 30
DTR*2 30 CTS*2 30 RTS*2 30 DSR*2 30 TXD2 30 RXD2 30 DCD*2 30 RI*2 30
INTRUDER 36
R772
1 2
1KR3
OFFPWRS4_S5# 17,23 OFFPWRS3# 23,42,47
1 2
R54 220R2J
VBATVCC3_3SB
12
12
RA19 1MR3
Wistron Incorporated
21F, 88, HsinTaiWu Rd Hsichih, Taipei
1
Modify 0506
ATX_PWOK 42,47,48
R102
1MR3
28 50Thursday, June 16, 2005
VCC3_3DUAL
RSMRST# 23
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Modify 0510 /J361Y_Tracking (Item other-063)
D D
C C
PBTNJ_CON26,40,41
R518 0R3-U
1 2
KBDAT28
KBCLK28
(R)
KB_ON
4
12
R537
4K7R3
VCC5_KBMS
12
R530
4K7R3
L67
1 2
MLB1608080070BGP L69
1 2
MLB1608080070BGP
3
http://hobi-elektronika.net
Modify 0517 /J361Y_Tracking (Item other-070)
L62
1 2
MLB-201209-8-GP
Keyboard PS/2 Conn
CN36
8 6 2 7 1 5 9
MINIDIN-6P-7
KBDATACN
KBCLKCN
12
C401 SC47P
12
C398 SC47P
KB_ON
2
L59
1 2
FUSE-1D1A6V-4GP
VCC5_KBMS_CN
4
3
VCC5
12
R508
0R5J
(Corporate)
VCC5_KBMS_FVCC5_KBMSVCC5_KBMS_CN
12
C392
SC1U10V3KX
1
VCC5_USB_R
12
R512
0R5J
(Consumer/LCDPC)
VCC5_KBMS
12
R483
B B
PMDAT28
PMCLK28
4K7R3
12
R473
4K7R3
L53
1 2
MLB1608080070BGP L58
1 2
MLB1608080070BGP
MSDATACN
MSCLKCN
12
C322 SC47P
12
C312 SC47P
Mouse PS/2 Conn
CN33
8 6 2 7 1 5 9
MINIDIN-6P-6
4
3
VCC5_KBMS_CN
12
C307
SC1U10V3KX
Modify 0422
<Core Design>
Wistron Incorporated
A A
Title
21F, 88, Hsin Tai WuRd Hsichih, Taipei
KB/MS PS2 Conn
Size Document Number Rev
A
J361Y RS482+M1573
5
4
3
Date: S heet
2
29 50Thursday, June 16, 2005
of
1
1A
PDF created with pdfFactory trial version www.pdffactory.com
5
D D
Parallel Port
PP[0..7]
PP[0..7]28
STROB*
STROB*28
AUTOFD*
AUTOFD*28
ERRORP*
ERRORP*28
PINIT*
PINIT*28
SLCTIN*
SLCTIN*28
PACK*
PACK*28
BUSYP
BUSYP28
PE
PE28
SLCT
SLCT28
C C
DCD*1
DCD*128
RI*1
RI*128
CTS*1
CTS*128
DTR*1
DTR*128
RTS*1
RTS*128
DSR*1
DSR*128
TXD1
TXD128
RXD1
RXD128
B B
Serial Port 1
VCC-12
STROB* AUTOFD* PP7 PP6
ERRORP*
PP1 PP0 SLCTIN* PINIT*
PP5 PP4 PP3 PP2
PACK* BUSYP PE SLCT
1 2 3 4 5
1 2 3 4 5
1 2 3 4 5
D26 1N4148W
2 1
S
RN2
SRN33
RN4
SRN33 RN3
SRN33
4
8 7 6
8 7 6
8 7 6
C175 SCD1U
1 2
VCC_COM1-
RI*1 DTR*1 CTS*1 TXD1 RTS*1 RXD1 DSR*1 DCD*1
678
123
123
678
RC2
SRC100P50V-U
10 11
12 13 14 15 16 17 18 19
VCC5PRINT
RN74
SRN1K
4 5
45
U23
-12V GND
RY5 DA3 RY4 DA2 DA1 RY3 RY2 RY1
ST75185CT S
1N4148W
RC4 SRC100P50V-U
3
VCC5
http://hobi-elektronika.net
D2
S
C12 SCD1U
2 1
1 2
12
123
123
1 20
9 8 7 6 5 4 3 2
RN76
SRN1K
VCC_COM1+
678
4 5
45
678
RC3 SRC100P50V-U
123
678
SRC100P50 V-U
678
4 5
45
678
12V
5V
RA5 DY3 RA4 DY2 DY1 RA3 RA2 RA1
123
123
45
RC7
RN75
SRN1K
D24
1N4148W
2 1
C159 SCD1U
1 2
123
SRC100P50 V-U
678
123
4 5
123
45
678
RC1
SRC100P50V-U
S
45
RC8
678
RN73
SRN1K
VCC12
RRI*1 RDTR*1 RCTS*1 RTXD1 RRTS*1 RRXD1 RDSR*1 RDCD*1
R604 1KR3
RPSTROB* RAUTOFD* RPP7 RPP6
RPP1 RPP0 RSLCTIN* RPINIT*
RPP5 RPP4 RPP3 RPP2
12
C17 SC180P25V2JN
D25
1N4148W
2 1
C164 SCD1U
1 2
S
VCC5
2
RPSTROB* RPP0
RPP1 RPP2 RSLCTIN* RPP3 RPP4 RPP5 RPP6 RPP7 PACK* BUSYP PE SLCT
COM1 Header
RDCD*1 RRXD1
RTXD1 RDTR*1
CN22
1 3
5 7 9
ARC-CONN10A-FP3
LPT Header
1 3
5 7
9 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26
ARC-CONN26A-FP
2 4
6 8 10
X
CN9
RDSR*1 RRTS*1
RCTS*1 RRI*1
1
RAUTOFD*
2
ERRORP*
4
RPINI T*
6 8 10
X
X
COM2 Header
CN17
1
RRXD2
3
D15
1N4148W
C529 SCD1U
1 2
D44 1N4148W
VCC_COM2-
2 1
DCD*2
DCD*228
*2
RI
RI*228
CTS*2
CTS*228
DTR*2
DTR*228
RTS*2
RTS*228
DSR*2
DSR*228
TXD2
A A
TXD228
RXD2
RXD228
VCC-12
S
RI*2 DTR*2 CTS*2 TXD2 RTS*2 RXD2 DSR*2 DCD*2
U14
10
-12V
11
GND
12
RY5
13
DA3
14
RY4
15
DA2
16
DA1
17
RY3
18
RY2
19
RY1
ST75185CT S
1
12V
20
5V
9
RA5
8
DY3
7
RA4
6
DY2
5
DY1
4
RA3
3
RA2
2
RA1
Serial Port 2
5
4
VCC_COM2+
45
678
SRC100P50V-U
123
RC5
2 1
C102 SCD1U
1 2
SRC100P50V-U
VCC12
RRI*2 RDTR*2 RCTS*2 RTXD2 RRTS*2 RRXD2 RDSR*2 RDCD*2
D13
1N4148W
2 1
S
C103 SCD1U
1 2
VCC5
S
123
45
RC6
678
3
RTXD2 RDTR*2
5 7 9
ARC-CONN10A-FP3
2
RDSR*2RDCD*2
2
RRTS*2
4
RCTS*2
6
RRI*2
8 10
X
<Core Design>
Title
COM/PRINTER PORT
Size Document Number Rev
C
J361Y RS482+M1573 1A
Date: Sheet
1
Wistron Incorporated
21F, 88, Hsin TaiWu Rd Hsichih, Taipe i
of
30 50Thursday, June 16, 2005
PDF created with pdfFactory trial version www.pdffactory.com
5
4
3
2
1
http://hobi-elektronika.net
D D
VCC3_3
CN32
1
PCIRST#_TPM47
LAD321,27,28
LAD221,27,28
C C
CLK33_TPM21
LFRAME#21,27,28
LAD121,27,28
LAD021,27,28
SERIRQ21,28,32
SUSPEND#23
12
R437
2 3 4 5 6 7 8
9 10 11 12 13 14 15
JAE-CONN30B
16 17
18 19 20 21 22 23 24 25 26 27 28 29 30
10KR3
B B
VCC3_3
R459
12
10KR3
12
R463
10KR3
(R)
<Core Design>
Wistron Incorporated
A A
Title
21F, 88, Hsin Tai WuRd Hsichih, Taipei
TPM Header
Size Document Number Rev
A
J361Y RS482+M1573
5
4
3
2
Date: S heet
31 50Thursday, June 16, 2005
of
1
1A
PDF created with pdfFactory trial version www.pdffactory.com
1
PAVCC
VCC3_3DUAL_842VCC18_DUAL_842
PREQJ3/PGNTJ3
http://hobi-elektronika.net
IRQ : PIRQJD,A,B,C
VCC_PCI1 VCC_PCI2 VCC_PCI3
VCC_RIN1 VCC_RIN2 VCC_ROUT1 VCC_ROUT2 REG_EN#
VCC_3V1 VCC_3V2 VCC_3V3 VCC_3V4
VCC_MD
AD31 AD30 AD29 AD28 AD27 AD26 AD25 AD24 AD23 AD22 AD21 AD20 AD19 AD18 AD17 AD16 AD15 AD14 AD13 AD12 AD11 AD10 AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0 PAR C/BE3# C/BE2# C/BE1# C/BE0# IDSEL
REQ# GNT# FRAME# IRDY# TRDY# DEVSEL# STOP# PERR# SERR#
GBRST# PCIRST# PCICLK
CLKRUN#
12
C47 SCD1U
12
C86 SCD1U
IDSEL : AD21
AVCC_PHY2/NC#E13 AVCC_PHY3/NC#A18 AVCC_PHY4/NC#B18
PCI / MISC / 1394_OHCI PORTION
12
12
C101
C520
SCD1U
SCD1U
DVCC2_1DVCC2_2
12
12
C519
C26
SCD1U
SCD1U
U7B
AVCC_PHY1/NC#11
TPBIAS0/NC#C13
TPBN0/NC#A14 TPBP0/NC#B14 TPAN0/NC#A13 TPAP0/NC#B13
TPBIAS1/NC#C11
TPBN1/NC#A12 TPBP1/NC#B12 TPAN1/NC#A11 TPAP1/NC#B11
CPS/NC#C12
VREF/NC#C14
REXT/NC#B15
FIL0/NC#A15
XO/NC#B17
XI/NC#A17
AGND1/GN D AGND2/GN D AGND3/GN D AGND4/GN D AGND5/GN D AGND6/GN D
RI_OUT#-PME#
SPKROU T
HWSPND#
UDIO0-SRIRQ#
UDIO1 UDIO2 UDIO3 UD UDIO5
TEST
INTA#
INTB# INTC# INTD#
GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
GND9
R5C842-1-GP
VCC3_3
12
C522 SCD1U
12
C27 SCD1U
IO4
6/13
E11 E13 A18 B18
C13 A14 B14 A13 B13
C11 A12 B12 A11 B11
C12 C14 B15 A15
B17 A17
A10 B10 C10 A16 B16 C15
P5 P6 N1 R1 R2 R3 R5 P1 P2 N2 T3
T2 T1 U3
F1 V9 W9 M19 K9 K10 K11 J10 L10
PAVCC
TPBIAS0
1394_TPBN0 1394_TPBP0 1394_TPAN0 1394_TPAP0
TPBIAS1
1394_TPBN1 1394_TPBP1 1394_TPAN1 1394_T
PAP1
PAVCC_STATUS 842VREF 842REXT
FIL0
842XOAD22 842XI
PCI_PMEJ SPKROU T 842HWSPNDJ_1394
SERIRQ 21,28,31
842_SCL 842_SDA
PIRQJD PIRQJA PIRQJB PIRQJC
842HWSPNDJ23
1
Cable power status
12
C29 SCD1U
12
RA9 0R3-U
12
C28 SC1U10V3ZY
DVCC2_1 DVCC2_2
DVCC1
DVCC3
DVCC3
AD31 AD30 AD29 AD28 AD27 AD26 AD25
AD23 AD21
AD20 AD19 AD18 AD17 AD16 AD15 AD14 AD13 AD12 AD11 AD10 AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0
PAR C_BEJ3 C_BEJ2 C_BEJ1 C_BEJ0
IDSEL_842
PREQJ3 PGNT J3
FRAMEJ IRDYJ TRDYJ DEVSELJ
STOPJ PERRJ SERRJ
GBRSTJ
PCIRST#_842
CLK33_842 CLKRUN#
C50
SC1U10V3ZY
C523
SC1U10V3ZY
W7 P10 P11
F19 G14
E19
K19
J19
W3
W4
W5
W6
R11 U11 V11
W11
P12 R12 U12 V12 P13 R13 U13 V13
W13
U14 V14
W14
V10
W10 W12
W2
W8
R10 U10
DVCC1
12
12
M6 H1
F8
F7
A8
V3 U4
V4 U5
V5 V6 P7
R7 U7 V7 P8 R8
R6 U8
U6
V2 V8
P9 R9 U9
P3 U1 V1
U2
12
RA12 0R3-U
(R)
12
RA13 100KR3
VCC3_3DUAL_842
DVCC3
12
C113
SC1U10V3ZY
1 1
12
C128 SCD1U
AD[0..31]21,36,37
C_BEJ[0..3]21,36,37
PGNT J321,36 PREQJ321,36
FRAMEJ21,36,37
DEVSELJ21,36,37
PCIRST#_84247
CLK33_84221
Modify 0422
R108 33R3
1 2
PIRQJA21,36 PIRQJB21,36 PIRQJC21,36 PIRQJD21,36
RA10
RA11
0R3-U
0R3-U
(R)
(R)
6/13
12
12
C525
C524
SCD1U
SCD1U
AD[0..31] AD24
C_BEJ[0..3]
PGNT J3 PREQJ3 PAR
PAR21,36,37
FRAMEJ IRDYJ
IRDYJ21,36,37
TRDYJ
TRDYJ21,36,37
DEVSELJ STOPJ
STOPJ21,36,37
PERRJ
PERRJ36,37
SERRJ
SERRJ21,36,37
PCIRST#_842
CLK33_842 PCI_PMEJ
PME#23,36,37
PIRQJA PIRQJB PIRQJC PIRQJD
IDSEL_842AD21
12
12
PowerOnReset for VccCore
*An option is available that GBRESET# is wired directly to PCIRST# when not using "wakeup from D3" power-management scheme.
VCC3_3DUAL_842
12
R146 100KR3
S
C88
1 2
SC1U10V3KX
CoreLogic CLOCKRUN#
*When do not use, please pull down it thru 100k.
GBRSTJ
Modify 0518 /J361Y tracking (item other : 058)
R149
1 2
CLKRUN#
100KR3
S
PAVCC
12
C515
SC1000P50V3KX
*Layout as close as possible to AVCC_PHY pins.
1394_TPBN0 1394_TPBP0 1394_TPAN0 1394_TPAP0
1394_TPBN1 34 1394_TPBP1 34 1394_TPAN1 34 1394_TPAP1 34
R611 0R3-U
1 2
C521
S
SCD1U
C25
S
SCD1U
PAVCC
C518
S
SCD1U
5/24
R129 0R3-U
(R)
1 2
RA3
1 2
1KR3J-L1-GP
(R)
842HWSPNDJ : 'H' , disabl e R5C842
PHON EIN 36,38
12
RA8 1KR3J-L1-GP
842HWSPNDJ_1
VCC3_3DUAL_842VCC3_3
1
L17
1 2
MLB201209-1-GP C514
S
SCD1U
12
R145 1KR3J-L1-GP
(R)
842HWSPNDJ_1394
3
QA1
2N3904-L1-U
(R)
2
VCC3_3DUAL_842
1394 OHCI
110ohm differential impedence
TPBIAS1 1394_TPAP1
1394_TPAN1
1394_TPBN1
1394_TPBP1
TPBIAS0 1394_TPAP0
1394_TPAN0
1394_TPBN0
1394_TPBP0
*TPA/TPA#,TPB/TPB# pair trace closely as possible *TPA/TPA#,TPB/TPB# pair trace must be the same length electrically *TPBIAS traces from pin to the filiter capacitors short and wide. *Termination resistor for TPA+/- TPB+/- must be located as close as
possible to its cable driver (device pin out).
6/13
R98 56R3
12
S
R94 56R3
12
S
R89 56R3
1 2
S
1 2
S
R92 56R3
R125 56R3
12
S
R115 56R3
12
S
R99 56R3
1 2
S
1 2
S
R109 56R3
1394 control signal
842VREF
842REXT
FIL0
SCD01U50V3KX
842XI
R80
12
1MR3
(R)
S
842XO
SCD33U16V C44
C41
S
1 2
SCD01U50V3KX
S
1394_TPB1
SCD33U16V C60
SC270P50V3JN
1 2
R88 5K1R3 S
Modify 0509
C36
S
1394 Header
C66
S
1 2
SCD01U50V3KX
S
1394_TPB0
R104 5K1R3 S
C37 SCD01U50V3KX
R82
1 2
10KR3FS
C34
X-24D576MHZ-L2
C48
S
SC270P50V3JN
1 2
S
S
X1
1 2
12
C24 SC30P
1 2
6/16
C23 SC30P
1394_TPAP0 1394_TPAN0 1394_TPBP0 1394_TPBN0
SPKROU T
*SPKROUT# should be weakly pulled low externally when using EEPROM. Alternatively, pull up is required for no SROM activity.
SPKROU T
IF EEPROM IS UNMOUNT SPKROUT NEED PULL HIGH
R123 4K7R3
(R)
6 5 4 3 2 1
1 2
R116 100KR3
Serial EEPROM
VCC3_3DUAL_842
C87
12
12
R147
10KR3
842_SCL 842_SDA
<Core Design>
Title
Ricoh R5C842-PCI I/F and 1394
Size Document Number Rev
Custom
J361Y RS482+M1573 1A
Date: Sheet
R148
S
S
10KR3
SCD1U
S
U13
8
VCC
7
WP
6
SCL
AT24C02N-10SI
Wistron Incorporated
21F, 88, HsinTaiWu Rd
Hsichih, Taipei
32 50Thursday, June 16, 2005
GNDSDA
CN24
JST-CON6-4
VCC3_3DUAL_842
12
1
A0
2
A1
3
A2
45
of
PDF created with pdfFactory trial version www.pdffactory.com
1
BCAD1334 BCAD1534 BCAD1134 BCGNTJ34 BCAD1034 BCCBEJ034 BCCBEJ334 BCRSTJ34
BCSERRJ34
BCCLKRUNJ34
BCINTJ34 BCAUDIO34
BCSTSCHG34
BCVS234 BCVS134
BCCD2J34 BCCD1J34 BCREQJ34
BCAD[0..31]34 ACAD[0..31]34
1 1
U16 APL1087
ADJ/GND
123
VCC18_DUAL_842_ADJ
(R)
VOUT
VIN
BCAD13 BCAD15 BCAD11 BCGNTJ BCAD10 BCCBEJ0 BCCBEJ3 BCRSTJ BCSERRJ BCCLKRUNJ BCINTJ BCAUDIO BCSTSCHG BCVS2 BCVS1 BCCD2J BCCD1J BCREQJ
BCAD[0..31] ACAD[0..31]
VCC18_DUAL_842
VCC3_3DUAL_842
12
SC10U10V5ZY
VCC18_DUAL_842
12
R192
(R)
124R3F R197
12
(R)
54D9R3F
C72 SC33P
S
S
C116
12
C118
SC10U10V5ZY
C69 SC33P
ACAD1334
ACAD13
ACAD15
ACAD1534 ACAD1134
ACAD11
ACGNTJ34
ACGNTJ
ACAD1034
ACAD10
ACCBEJ034
ACCBEJ0
ACCBEJ334
ACCBEJ3 ACRSTJ
ACRSTJ34
ACSERRJ34
ACCLKRUNJ34
ACINTJ34 ACAUDIO34
ACSTSCHG34
ACCD1J34 ACREQJ34
S
ACVS234 ACVS134 ACCD2J34
12
C108 SCD1U
BCAD13BCAD15BCAD11BCGNTJ
C85 SC33P
ACSERRJ ACCLKRUNJ ACINTJ ACAUDIO ACSTSCHG ACVS2 ACVS1 ACCD2J ACCD1J ACREQJ
C84 SC33P
S
BCAD1934 BCAD1734
BCFRAMEJ34
BCTRDYJ34
BCDEVSELJ34
BCSTOPJ34
BCBLOCKJ34
BRSVD334
BCAD1634
BCIRDYJ34
BCPERRJ34
BCCBEJ234
BCAD1234 BCAD1434
BCCBEJ134
BCAD1834 BCAD2034 BCAD2134 BCAD2234 BCAD2334 BCAD2434 BCAD2534 BCAD2634
BCAD19 BCAD17 BCFRAMEJ BCTRDYJ BCDEVSELJ BCSTOPJ BCBLOCKJ BRSVD3 BCAD16
BCCLK
BCCLK34
BCPAR34
BCAD934
BCAD834
BRSVD134
BCAD634 BCAD434
BCAD234 BCAD3134 BCAD3034 BCAD2834
BCAD734
BCAD534
BCAD334
BCAD134
BCAD034
BRSVD234
BCAD2934 BCAD2734
1 2
BCIRDYJ BCPERRJ BCPAR BCCBEJ2 BCAD12 BCAD9 BCAD14 BCCBEJ1 BCAD18 BCAD20 BCAD21 BCAD22 BCAD23 BCAD24 BCAD25
BCAD26
BCAD8 BRSVD1 BCAD6 BCAD4 BCAD2 BCAD31 BCAD30 BCAD28 BCAD7 BCAD5 BCAD3 BCAD1 BCAD0 BRSVD2 BCAD29 BCAD27
BVCC5_EN*34 BVCC3_EN*34
BVPP034 BVPP134
MDIO035 MDIO135 MDIO235 MDIO335 MDIO435 MDIO535
MDIO835 MDIO935
http://hobi-elektronika.net
H3
BCADR25
H5
BCADR24
G3
BCADR23
G6
BCADR22
G1
BCADR21
F3
BCADR20
E1
BCADR19
E3
BCADR18
D2
R144
22R3S
BCAD11 BCGNTJ BCAD10 BCCBEJ0 BCCBEJ3 BCRSTJ BCSERRJ
BCINTJ BCAUDIO BCSTSCHG BCVS2 BCVS1 BCCD2J BCCD1J BCREQJ
BCAD13 BCAD15
BCCLK1
BCADR17
G2
BCADR1
G5 E2 D1 H6 A2 C3 B1 D3 H2
J6 J3
J1 K5 K2 L6 L3
B4 C4 C5 E5 E6 N6 M2 M5 B5 A5 C6 F6 E7 M1 M3 L1
A3 F5 B3 A4 K1
J2 K6 N5 F2 L5 L2
J5 B2 N3 C7 K3
C2 C1
B6 A6
R15 P15 R14 V15 P14
A7 B7 B8 C8 E8 B9 A9
C9 E9 F9
6 BCADR15 BCADR14 BCADR13 BCADR12 BCADR11 BCADR10 BCADR9 BCADR8 BCADR7 BCADR6 BCADR5 BCADR4 BCADR3 BCADR2 BCADR1 BCADR0
BCDATA15 BCDATA14 BCDATA13 BCDATA12 BCDATA11 BCDATA10 BCDATA9 BCDATA8 BCDATA7 BCDATA6 BCDATA5 BCDATA4 BCDATA3 BCDATA2 BCDATA1 BCDATA0
BOE# BWE# BCE2# BCE1# BREG# BRESET BWAIT# BWP BRDY BBVD2 BBVD1 BVS2# BVS1# BCD2# BCD1# BINPACK#
BIORD# BIOWR#
BUSBDP BUSBDM
BVCC5EN# BVCC3EN# BVPPEN0 AVCC3EN# BVPPEN1
MDIO00 MDIO01 MDIO02 MDIO03 MDIO04 MDIO05 MDIO06
MDIO07 MDIO08 MDIO09
R5C842-1-GP
1
CARDBUS / MEDIA CARD PORTION
U7A
ACADR25 ACADR24 ACADR23 ACADR22 ACADR21 ACADR20 ACADR19 ACADR18 ACADR17 ACADR16 ACADR15 ACADR14 ACADR13 ACADR12 ACADR11 ACADR10
ACADR9 ACADR8 ACADR7 ACADR6 ACADR5 ACADR4 ACADR3 ACADR2 ACADR1 ACADR0
ACDATA15 ACDATA14 ACDATA13 ACDATA12 ACDATA11 ACDATA10
ACDATA9 ACDATA8 ACDATA7 ACDATA6 ACDATA5 ACDATA4 ACDATA3 ACDATA2 ACDATA1 ACDATA0
AOE#
AWE# ACE2# ACE1# AREG#
ARESET
AWAIT#
AWP
ARDY ABVD2 ABVD1
AVS2#
AVS1# ACD2# ACD1#
AINPACK#
AIORD#
AIOWD#
AUSBDP AUSBDM
AVPPEN1 AVPPEN0
AVCC5EN#
MDIO10 MDIO11 MDIO12 MDIO13
MDIO14/NC MDIO15/NC MDIO16/NC MDIO17/NC MDIO18/NC MDIO19/NC
J17 J14 K17 K14 L18 L15 M18 M15 N15 L19 K15 M17 M14 K18 P18 R18 P19 N14 J15 J18 H15 H18 G15 G18 F15 F18
R17 T18 U19 V19 V18 C18 D19 D17 T17 U18 W18 W17 U17 C17 D18 E18
P17 L14 R19 T19 G19 H17 H19 C19 L17 F17 E17 H14 N17 B19 V17 G17
N18 N19
V16 W16
U16 W15
U15
E10 F10 F11 E12
F12 F13 E14 F14 E15 C16
ACCLK1
ACAD11 ACGNTJ ACAD10 ACCBEJ0 ACCBEJ3 ACRSTJ ACSERRJ ACCLKRUNJBCCLKRUNJ ACINTJ
ACAUDIO ACSTSCHG ACVS2 ACVS1 ACCD2J ACCD1J ACREQJ
ACAD13 ACAD15
AVPP0
R78
1 2
22R3S
ACAD19 ACAD17 ACFRAMEJ ACTRDYJ ACDEVSELJ ACSTOPJ ACBLOCKJ ARSVD3 ACAD16
ACCLK
ACIRDYJ ACPERRJ ACPAR ACCBEJ2 ACAD12 ACAD9 ACAD14 ACCBEJ1 ACAD18 ACAD20 ACAD21 ACAD22 ACAD23 ACAD24 ACAD25 ACAD26
ACAD8 ARSVD1 ACAD6 ACAD4 ACAD2 ACAD31 ACAD30 ACAD28 ACAD7 ACAD5 ACAD3 ACAD1 ACAD0 ARSVD2
9
ACAD2 ACAD27
AVPP1 34 AVPP0 34
AVCC3_EN* 34
AVCC5_EN* 34
MDIO10 35 MDIO11 35 MDIO12 35 MDIO13 35
MDIO14 35 MDIO15 35 MDIO16 35 MDIO17 35 MDIO18 35 MDIO19 35
ACAD19 34 ACAD17 34 ACFRAMEJ 34 ACTRDYJ 34 ACDEVSELJ 34 ACSTOPJ 34 ACBLOCKJ 34 ARSVD3 34 ACAD16 34 ACCLK 34 ACIRDYJ 34 ACPERRJ 34 ACPAR 34 ACCBEJ2 34 ACAD12 34 ACAD9 34 ACAD14 34 ACCBEJ1 34 ACAD18 34 ACAD20 34 ACAD21 34 ACAD22 34 ACAD23 34 ACAD24 34 ACAD25 34 ACAD26 34
ACAD8 34 ARSVD1 34 ACAD6 34 ACAD4 34 ACAD2 34 ACAD31 34 ACAD30 34 ACAD28 34 ACAD7 34 ACAD5 34 ACAD3 34 ACAD1 34 ACAD0 34 ARSVD2 34 ACAD29 34 ACAD27 34
VCC3_3DUAL_842
R93 100KR3
S
AVPP0
1 2
For xD function - Strapping pin
<Core Design>
Wistron Incorporated
21F, 88, HsinTaiWu Rd
Title
Ricoh R5C842-MDIO I/F and CB I/F
Size Document Number Rev
Custom
J361Y RS482+M1573
Date: Sheet
Hsichih, Taipei
33 50Thursday,June 16, 2005
of
1A
PDF created with pdfFactory trial version www.pdffactory.com
5
BCAD[0..31]33
D D
ACAD[0..31]33
C C
B B
A A
BCAD0 BCAD1 BCAD2 BCAD3 BCAD4 BCAD5 BCAD6 BCAD7 BCAD8 BCAD9 BCAD10 BCAD11 BCAD12 BCAD13 BCAD14
BCAD16 BCAD17 BCAD18 BCAD8 BCAD19 BCAD20 BCAD21 BCAD22 BCAD23 BCAD24 BCAD25 BCAD26 BCAD27 BCAD28 BCAD29 BCAD30 BCAD31
ACAD0 ACAD1 ACAD2 ACAD3 ACAD4 ACAD5 ACAD6 ACAD7 ACAD8 ACAD9 ACAD10 ACAD11 ACAD12 ACAD13 ACAD14 ACAD15 ACAD16 ACAD17 ACAD18 ACAD19 ACAD20 ACAD21 ACAD22 ACAD23 ACAD24 ACAD25 ACAD26 ACAD27 ACAD28 ACAD29
AD30
AC ACAD31
VCC3_3DUAL_842 VCC3_3DUAL_842VCC5_DUAL_842 BVPPAVPPAVCCBVCC
12
C133 SCD1U
CARDBUS
Ricoh --> Slot A B (lower) B A (upper)
BCCD1J33
BVCC
12
BCRSTJ33 ACRSTJ 33
R606 47KR3
S
(R)
BCRSTJ
12
C127
SC1000P50V3KX
5
12
C132 SCD1U
SC220P S
C96 SC220P
S
BRSVD133
BCCBEJ033
BCVS133
BCCBEJ133 BRSVD333 BCPAR33 BCBLOCKJ33 BCPERRJ33 BCSTOPJ33
BCGNTJ33 BCDEVSEL J33 BCINTJ33
BCCLK33 BCTRDYJ33 BCIRDYJ33
BCFRAMEJ33 BCCBEJ233
BCVS233
BCRSTJ
C513
BCSERR J33 BCREQJ33
BCCBEJ333 BCAUDIO33 BCSTSCHG33
BRSVD233 BCCLKRUNJ33
BCCD2J33
12
C145
SC1000P50V3KX
12
C140 SCD1U
BCAD0 BCAD2 BCAD1 BCAD4 BCAD3
BCAD6 BCAD5BCAD15
BCAD7
BCAD10 BCAD9 BCAD11
BCAD13 BCAD12 BCAD15 BCAD14
BCAD16
BVCC BVPP
BCAD17 BCAD18 BCAD19 BCAD20
BCAD21 BCAD22 BCAD23 BCAD24
BCAD25 BCAD26 BCAD27
BCAD28 BCAD29
BCAD30 BCAD31
C8 SC220P
S
12
C144 SC10U10V5ZY
158
GND
150
A35
149
A1
148
A36
147
A2
146
A37
145
A3
144
A38
143
A4
142
G
141
A39
140
A5
139
A4
0
138
A6
137
A41
136
A7
135
A42
134
G
133
A8
132
A43
131
A9
130
A44
129
A10
128
A45
127
A11
126
G
125
A46
124
A12
123
A47
122
A13
121
A48
120
A14
119
A49
118
G
117
A15
116
A50
115
A16
114
A51,A17
113
NONE
112
A52,A18
111
A19
110
A53
109
A20
108
G
107
A54
106
A21
105
A55
104
A22
103
A56
102
A23
101
A57
100
G
99
A24
98
A58
97
A25
96
A59
95
A26
94
A60
93
A27
92
G
91
A61
90
A28
89
A62
88
A29
87
A63
86
A30
85
A64
84
G
83
A31
82
A65
81
A32
80
A66
79
A33
78
A67
77
A34
76
A68
GND
154
4
CNA1
155
156
157
PCMCIA-8-U
(62.10024.571)
GND
GND
GND
75
B35
74
B1
73
B36
B2
B37
B3
B38
B4
B39
B5
B40
B6
B41
B7
B42
B8
B43
B9 B44 B10 B45 B11
B46 B12 B47 B13 B48 B14 B49
B15 B50 B16
B51,B17
NONE
B52,B18
B19 B53 B20
B54 B21 B55 B22 B56 B23 B57
B24 B58 B25 B59 B26 B60 B27
B61 B28 B62 B29 B63 B30 B64
B31 B65 B32 B66 B33 B67 B34 B68
GND
GND
GND
151
152
153
ACAD0
72 71
ACAD2
70
ACAD1
69
ACAD4 ACAD3
68 67
G
66
ACAD6 ACAD5
65 64 63
ACAD7 ACAD8
62 61 60
ACAD10
59
G
ACAD9
58 57 56
ACAD11 ACAD13
55
ACAD12
54 53
ACAD15 ACAD14
52 51
G
ACAD16
50 49 48 47 46 45 44 43
G
42 41 40 39 38 37 36 35 34 33
G
32 31 30
ACAD17
29
ACAD18 ACAD19
28 27
ACAD20
26 25
G
ACAD21
24 23
ACAD22
22 21
ACAD23
20 19
ACAD24
18 17
G
16
ACAD25
15 14 13
ACAD26
12 11
ACAD27
10
ACAD28
9
G
ACAD29
8 7
ACAD30
6
ACAD31
5 4 3 2 1
http://hobi-elektronika.net
ACCD1J 3 3
C104 SC220P
S
ARSVD1 33
ACCBEJ0 33
ACVS1 33
ACCBEJ1 33 ARSVD3 33 ACPAR 33 ACBLOCKJ 33 ACPERRJ 33 ACSTOPJ 33
ACGNTJ 33 ACDEVSELJ 33 ACINTJ 33
AVCC AVPP
ACCLK 33 ACTRDY J 33 ACIRDY J 3 3
ACFRAMEJ 33 ACCBEJ2 33
ACVS2 33
ACSERRJ 33 ACREQJ 33
ACCBEJ3 33 ACAUDIO 33 ACSTSCHG 33
ARSVD2 33 ACCLK RUNJ 33
C7 SC220P
S
ACCD2J 3 3
ACRSTJ
C512 SC220PS
ACRSTJ
12
C117 SCD1U
AVCC
12
R605 47KR3
S
(R)
6/16
12
12
C42 SCD1U
4
C517 SCD1U
12
12
C38
C516
SCD1U
SCD1U
3
Front 1394 connector
1394_TPAP132 1394_TPAN132 1394_TPBP132 1394_TPBN 132
(4pins)
1394_TPAP1 1394_TPAN1 1394_TPBP1 1394_TPBN 1
Modify 0509
6 4 3 2 1 5
CNB1 SKT-1394-4P-7
HAT(34.91A15.001)
*TPA/TPA#,TPB/TPB# pair trace closely as poss ible *TPA/TPA#,TPB/TPB# pair trace must be the same lengt h elect rically *TPBIAS traces from pin to the filiter capacitors short and wide. *Termination resistor for TPA+/- TPB+/- must be loca ted as close a s possible to its cable driver (device pin out).
APM9932CKC-TRL : 84.09932.C37 AP4502GM : 84.04502.A37
VCC3_3DUAL_842
U19
1
VCC3_3
DUAL_ V42,43
VCC3_ 3SB
S1
D1
2
G1
D1
3
S2
D2
4 5
G2 D2
APM9932CKC-1-GP
8 7 6
VCC5_DUAL_842
U20
1
S1
D1
2
G1
D1
3
S2
D2
4 5
G2 D2
APM9932CKC-1-GP
BVCCOUT BVCCOUT
BV PPOUT AV PPOUT
BEN0 BEN1
AEN0
TST
GND
8 7 6
Min 1AMin 1AMin 2A
BVCC
14 13
12 9
17
BV PP0 33
18
BV PP1 33
4
AV PP0 33 AV PP1 33
5
VCC5_ DUAL_ 842
16
Min 2A
VCC5_ DUAL_ 842
C107
12
SCD1U
AV CC5_EN*33 AV CC3_EN*33
BVCC5 _EN*33 BVCC3 _EN*33
DUAL_ V42, 43
VCC5S B
AVCCVCC3_3DUAL_842
12
C112 SCD1U
3
VCC5
U15
7
AV CCOUT
8
AV CCOUT
15
VCC5IN
6
VCC5IN
11
VCC3IN
10
VCC3IN
1
AVCC5_EN
2 3
AVCC3_EN AEN1
20
BVCC5 _EN
19
BVCC3 _EN
R5534V-GP
VCC3_3DUAL_842
12
VCC5_ DUAL_ 842
12
12
C115 SCD1U
C130 SCD1U
C139 SCD1U
12
12
AVPP
TC25 E220U10VM-2
TC26 E220U10VM-2
12
C114 SCD1U
2
BVPP
12
C119 SCD1U
2
1
<CoreDesign>
Title
CardBUSSlot and 1394 Conn
Size Doc umen t Numbe r Rev
Cust om
J361YRS482+M1573
Date: Sheet
1
Wistr on Incorporat e d
21F, 88, HsinTaiWuRd Hsichih,Taipei
of
34 50Thursday, June 16, 2005
1A
PDF created with pdfFactory trial version www.pdffactory.com
A
MDIO1033 MDIO1133
4 4
3 3
MDIO1233 MDIO1333
MDIO933
R231 33R3
MDIO833
MDIO333
MDIO033
MDIO133
MDIO1433 MDIO1533 MDIO1633 MDIO1733
R655 33R2 (R) R657 33R2 (R) R659 33R2 (R) R660 33R2 (R)
1 2
R632 33R3
1 2
SD_CD* XDCD0*
MSCDJ XDCD1*
1 2 1 2 1 2 1 2
R247 33R2 R226 33R2 R635 33R2
B
RN78
1 2 3 4 5
SRN33
R650 33R2
1 2
R652 33R2
1 2
R206 33R2
1 2
R222 33R2
1 2
RN77
1 2 3 4 5
SRN33
1 2 1 2 1 2
XD_DAT4 XD_DAT5 XD_DAT6 XD_DAT7
SDCMD MSBS XDWE*
SDWP* XDR_B*
D46
2
1
BAV70-1
(R)
(R)
8 7 6
8 7 6
(R)
MSCDAT0 MSCDAT1 MSCDAT2 MSCDAT3
SD0 SD1 SD2 SD3
XD_DAT3 XD_DAT2 XD_DAT1 XD_DAT0
SDCLK MSCCLK XDRE*
XDCD_CON*
3
C
http://hobi-elektronika.net
VCC3_3DUAL_842
R637 470KR3
(R)
1 2
XDCE*
SDCLK
12
R242 1MR3
R631 33KR3 (R)
1 2
VCC3_3
D
MH1
MH2
25
26
SKT1
SKT-MSD01920-U
(62.10068.031)
23 1
2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 24
6/9
SD_CD* SDWP*
SD1 SD0
MSBS
SDCLK MSCDAT1 MSCDAT0
VCC3_3SD MSCDAT2
MSCDJ MSCDAT3
SDCMD MSCCLK VCC3_3MS
SD3
SD2
E
R638 33R2 (R)
MDIO1833
2 2
MDIO1933 MDIO533 MDIO233
1 2
R639 33R2 (R)
1 2
R649 33R2 (R)
1 2
R636 33R2 (R)
1 2
xD/SD/MS card power control
1 1
MDIO433
CR_PWCTL CR_PWCTL_R
A
R186
1 2
S
1KR3
XDCLE XDALE XDWP XDCE*
SD_CD*
B
1
(R)
1 2
3
2
2N3904-L1-U
R188 0R3-U
CR_PWCTL_J
Q48
VCC3_3DUAL_842
R180 1KR3
1 2
VCC3_3DUAL_842
23
S
1
G
D
12
C106
SCD01U25V2KX
C
Q45 BSH205
VCC3_3SD VCC3_3MS VCC3_3XD
<Core Design>
Wistron Incorporated
21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei
Title
MS/SD/xD CARD Connector
Size Document Number Rev
Custom
J361Y RS482+M1573
Date: Sheet
D
35 50Thursday, June 16, 2005
of
E
1A
PDF created with pdfFactory trial version www.pdffactory.com
8
ACZ_SDOUT
ACZ_SDOUT21,38
ACZ_SYNC21,38
ACZ_SDIN123
ACZ_RST_CODEC*40
VCC5
12
AC_BITCLK_PCI38
AD19
AD20
ACZ_RST *23,40
VCC3_3
12
E220U16VM-L6-GP
12
C83 SC47P
1 2
R764 33R3
1 2
R765 33R3
ACZ_RST *
TC10
C105 SCD1U
D D
C C
B B
A A
R170 0R3-U
ACZ_SDIN1
AC_BITCLK_PCI
IDSEL_PCI1
IDSEL_PCI2
R173 0R3-U
1 2
R172 0R3-U
1 2
12
C73 SCD1U
Arround PCI slots
8
1 2
R171
1 2
22R3S
R179
1 2
22R3S
S (R) S
12
C71 SCD1U
7
S
ACZ_SDOUT_PCI
ACZ_SYNC_PCI
ACZ_RST*_RISER
Modify 0505
VCC12
12
C387 SC47P
VCC-12
12
C533 SC47P
12
C110 SCD1U
7
12
12
12
VCC-12
ACZ_SDIN1_PCI
PHONEOUT38
PHONEIN32,38
12
C74 SC27P
C111 SC47P
C526 SCD1U
C75 SCD1U
CLK33_SLOT2 CLK33_SLOT1
12
C109 SCD1U
IDSEL_PCI1
PIRQJB PIRQJD
IDSEL_PCI2
PREQJ0 AD31
AD29 AD27
AD25 C_BEJ3
AD23 AD21
AD19 AD17
C_BEJ2
IRDYJ DVSLJ LOCKJ
PERRJ SERRJ C_BEJ1
AD14 AD12
AD10
AD8 AD7
AD5 AD3
AD1 PGNTJ1
6
VCC3_3
6
VCC5
PCI1
2
-12V
4
B2
6
GND
8
B4
10
VCC
12
B6
14
B7
16
B8
18
B9
20
B10
22
B11
24
B12
26
B13
28
B14
30
B15
32
B16
34
B17
36
B18
38
B19
40
B20
42
B21
44
B22
46
B23
48
B24
50
B25
52
B26
54
B27
56
B28
58
B29
60
B30
62
B31
64
B32
66
B33
68
B34
70
B35
72
B36
74
B37
76
B38
78
B39
80
B40
82
B41
84
B42
86
B43
88
B44
90
B45
92
B46
94
B47
96
B48
98
B49
100
B52
102
B53
104
B54
106
B55
108
B56
110
B57
112
B58
114
B59
116
B60
118
B61
120
B62
PCISLT120
PREQJ0,1/PGNTJ0,1 IDSEL:AD19/AD20 PIRQJA,B,C,D
5
VCC3_3
http://hobi-elektronika.net
+12V
TDI
A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49
A52 A53 A54 A5 A56 A57 A58 A59 A60 A61 A62
VCC5
1
A1
3 5
A3
7 9
A5
11
A6
13
A7
15
A8
17
A9
19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97
99 101 103 105
5
107 109 111 113 115 117 119
5
ACZ_RST*_RISER
VCC12
ACZ_SYNC_PCI
PIRQJA PIRQJC
ACZ_SDOUT_PCI
PREQJ1
PCIRST#_SLOT
J0
PGNT PME#
AD30 AD28
AD26 AD24
AD22 AD20
AD18 AD16
FRAMEJ TRDYJ STOPJ PCI_SMBCLK
PCI_SMBDAT PAR
AD15 AD13
AD11 AD9
C_BEJ0 AD6
AD4 AD2
AD0 INTRUDER
VCC3_3DUAL
Modify 0422
4
AC_BITCLK_PCI
12
PCIRST#_SLOT 47
VCC5SB
12
12
C528
C527
SC27P
SC27P
INTRUDER 28
4
R176 10KR3
(R)
12
C532 SC22P
(R)
12
C531 SC22P
(R)
R626 0R3-U
1 2
R625 0R3-U
1 2
CLK33_SLOT121 CLK33_SLOT221
3
ALERT_CLK 23,28,37 ALERT_DATA 23,28,37
C_BEJ[0..3]21,32,37
AD[31..0]21,32,37
<CoreDesign>
PGNTJ021 PGNTJ121 PGNTJ221 PGNTJ321,32 PGNTJ421,37 PGNTJ521 PGNTJ621 PREQJ021 PREQJ121 PREQJ221 PREQJ321,32 PREQJ421,37 PREQJ521 PREQJ621
DEVSELJ21,32,37
TRDYJ21,32,37
FRAMEJ21,32,37
IRDYJ21,32,37
SERRJ21,32,37 PERRJ32,37
STOPJ21,32,37
CLK33_SLOT1 CLK33_SLOT2
C_BEJ[0..3]
AD[31..0]
PIRQJA21,32 PIRQJB21,32 PIRQJC21,32 PIRQJD21,32
PIRQJF21 PIRQJE21,37 PIRQJG21 PIRQJH21
DVSLJ
PGNTJ0 PGNTJ1ACZ_SYNC PGNTJ2 PGNTJ3 PGNTJ4 PGNTJ5 PGNTJ6 PREQJ0 PREQJ1 PREQJ2 PREQJ3 PREQJ4 PREQJ5 PREQJ6
DEVSELJ TRDYJ FRAMEJ IRDYJ
SERRJ PERRJ LOCKJ STOPJ
2
PIRQJA PIRQJB PIRQJC PIRQJD
R137 0R3-U
R174
1 2
8K2R3 R139
1 2
8K2R3 R629
1 2
8K2R3 (R) R208
1 2
8K2R3 R210
1 2
8K2R3 R207
1 2
8K2R3 (R) R212
1 2
8K2R3 (R) R141
1 2
8K2R3 R175
1 2
8K2R3 R138
1 2
8K2R3 R209
1 2
8K2R3 R214
1 2
8K2R3 R211
1 2
8K2R3 R213
1 2
8K2R3
RN8
1 2 3 4 5
SRN8K2-U
RN9
1 2 3 4 5
SRN8K2-U
RN7
12
1 2 3 4 5
SRN8K2-U
RN6
1 2 3 4 5
SRN8K2-U
PME#23,32,37
PAR21,32,37
PGNTJ[2,5..6], NC if not be used
8 7 6
8 7 6
8 7 6
8 7 6
VCC3_3DUAL
PME#
PAR
VCC5
1
VCC3_3
12
R169 10KR3
S
12
R624 2K7R3
(R)
Wistron Incorporated
21F, 88, Hsin Tai Wu Rd Hsichih, Taipei
Title
PCI Riser Slot
Size DocumentNumber Rev
Custom
J361Y RS482+M 1573
Date: Sheet
3
2
of
36 50Thursday, June 16,2005
1
VCC3_3
1A
PDF created with pdfFactory trial version www.pdffactory.com
5
 
BCM4401/BCM5788M/BCM5705M Triple-layout
PREQJ4/PGNTJ4 IDSEL:AD22 PIRQJE
D D
E12H5H6H7H8J5J6J7J8J9J10K5K6K7K8K9K10L5L10
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
PME# PERRJ
TRDYJ
PAR AD0
AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31
C_BEJ0 C_BEJ1 C_BEJ2 C_BEJ3
DEVSELJ FRAMEJ
IDSEL_BCM
IRDYJ
STOPJ
LANCHIP_RSTJ
SERRJ
12
12
C653 S CD1U16V3KX
C650 SCD01U16V3KX
A6 J2
C3 G3
J1
N7 M7 P6 P5 N5 M5 P4 N4 P3 N3 N2 M1 M2 M3
L1
L2 K1 E3 D1 D2 D3 C1 B1 B2 B4
A5 B5 B6 C6 C7
A8 B8
M4
L3
F3 C4
H3
F2
J3
A4 H2
F1
F4 H1 C2
A2
A3
Modify 0503
12
C659 SCD01U16V3KX
C660 SCD01U16V3KX
PME_L PERR_L
REQ_L TRDY_L
PAR AD0
AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31
CBE_0_L CBE_1_L CBE_2_L CBE_3_L
DEVSEL_L FRAME_L GNT_L IDSEL INTA_L IRDY_L M66E N STOP_L PCI_RST_L SERR_L
PCI_CLK
R426 10KR3
1 2
(BCM5705M/BCM5788M)
12
12
C630 SCD01U16V3KX
PME#23,32,36
PERRJ32,36
PREQJ421,36
TRDYJ21,32,36
PAR21,32,36
AD[0..31]21,32,36
C C
C_BEJ[0..3]
C_BEJ[0..3]21,32,36
DEVSELJ21,32,36
PGNTJ421,36
Modify 0422
PIRQJE21,36
R682
1 2
0R3-U
(BCM5705M/BCM5788M)
CLK33_LAN21
B B
U37
LAN_DISJ28
PCIRST#_LAN47
VAUX_1 2
1
A
2
B
3 4
GND Y
NC7SZ08M5X-NL-GP
12
12
12
12
12
C235 S CD1U16V3KX
C288 S CD1U16V3KX
C629 SC10U10V5KX
C657 S CD1U16V3KX
FRAMEJ21,32,36
R443
1 2
AD22
33R3
IRDYJ21,32,36
STOPJ21,32,36
SERRJ21,32,36
5
VCC3_3DUAL
VCC
LANCHIP_RSTJ
12
12
12
12
C635 S CD1U16V3KX
C643 S CD1U16V3KX
C638 S CD1U16V3KX
C654 S CD1U16V3KX
Place caps. as close to power pins as possible.
A A
VCC3_3DUALVAU X_2 5
VDDC
VSS
VSS
VSS
VSS
VSS
B7D4D5D6D7D8D9E2E5E6E7E8E9F5F6F7F8F9F10G4G5G6G7G8G9
VCC3_3DUAL
12
R428
1KR3
3
Q64
1
2N3904-L1-U
2
12
12
C633 SCD01U16V3KX
C632 SCD01U16V3KX
C243 SCD01U16V3KX
4
Populated for BCM 5788M/5705M
R442 R420
Populated for BCM 4401
M14
N14P8P12
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
R429 0R3-U
12
(BCM5705M/BCM5788M)
LOW POWER : ActiveHigh
VCC3_3DUAL
P13
P14
VDDC
VDDC
VDDC
VSS
VSS
VSS
VSS
LOW_POWER
A11
F11
K12
VDDIO
VDDIO
VDDIO
VSS
VSS
VSS
G10H9K2L6L9M6M12
VAUX_1 2
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
Populate 1K and depopulate 0ohm when CLKRUN# is not required. M part support CLKRUN# function.
(BCM5705M/BCM5788M)
LAN_RST_GigaLAN
(BCM5705M/5788M)
VCC3_3
VCC3_3DUAL
12
12
R442 0R3-U
(BCM5705M/5788M)
L12A7B3C5E1E4G1K3L4N6P2
VDDIO
VDDIO-PCI
VDDIO-PCI
VDDIO-PCI
VDDIO-PCI
VDDIO-PCI
VDDIO-PCI
VDDIO-PCI
VDDIO-PCI
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
M13N1N12
N13
VAUX_2 5
1 2
1 2
(BCM4401)
R420 0R3-U
K14
VDDP
VDDIO-PCI
VDDIO-PCI
CLKRUN#
NC#H10
H4
H10J4J11K4K11L7L8M8M9
12
R680
1KR3
3
L44
1 2
C249
SCD1U16V3KX
1 2
RDAC
TRD0-
TRD0+
TRD1-
TRD1+
TRD2-
TRD2+
TRD3-
TRD3+
LINKLEDB
SCLK CS_L
EECLK
EEDATA
GPIO0 GPIO1 GPIO2
SMB_CLK
SMB_DATA
REGCTL12
REGCTL2 5
TRST_L
VESD3 VESD2 VESD1
CSTSCHG
XTALO
XTALI
(BCM4401)
SI
SO
TCK
TDI TDO TMS
C275
SCD1U16V3KX
1 2
VAUX_2 5
U38
1.24K 1% for BCM57xx
1.27K 1% for BCM4401
D10
B14
TRDM0 TRDP0
B13
TRDM1
C14
TRDP1
C13
TRDM2
D14 D13
TRDP2
E14
TRDM3
E13
TRDP3
H13
SPEED_100*_L
G12
SPEED_1000*_L SPEED_10*_L
G13
LINK*_ACTIVITY_L
G14
E10 G11 E11 H11 M10
EECLK
P10
EEDATA
H12
EEWP#
K13 J13
A10 C9
B10 A9 B9
C11 C10 B11
C12 D12 B12 A12 D11
A1 G2 P1
J12
N10 N11
BCM4401KFB
(5705/71.05705.C0U)
BLM11A601S
(BCM4401/1K27R3F,BCM5788M5705M/1K24R3F)
SMBCLK_LAN SMBDATA_LAN
VAUX_12_CTL VAUX_1 2 VAUX_2 5
VAUX_25_CTL VAUX_2 5 VCC3_3DUAL
http://hobi-elektronika.net
L48 BLM11A601S
C277SCD1U16V3KX
1 2
L40 BLM11A601S
C259SCD1U16V3KX
1 2
VAUX_1 2
C655
SCD1U16V3KX
L85
BLM11A601S
1 2
1 2
L13
P11
A13
F14
F12
F13
A14C8H14
P7
J14
NC
AVDD
AVDD
VDDP
VDDP
AVDDL
AVDDL
PLLVDD2
BIASVDD
XTALVDD
SPD100LEDB
SPD1000LEDB
TRAFFICLEDB
REGSEN12 REGSUP12
REGSEN25 REGSUP25
VAUXPR SN T
NC#J4
NC#J11
NC#K4
NC#K11
NC#L7
NC#L8
NC#M8
NC#M9
LOW_POWER
NC#N8
NC#N9
NC#P9
NC#L11
NC#L14
M11N8N9P9L11
L14
R326 0R3-U
R327 0R3-U
LAN_RSTJ_4401
SPROMDOUT
SPROMDIN
LOW_POWER
(BCM4401)
1 2
1 2
12
(R)
R432 0R3-U
VAUX_2 5
C269
SCD1U16V3KX
1 2
R686
1 2
1K27R3F
Diff. pair signals shouldreference GND plane to get better EMIresults.
VCC3_3DUAL
R687 4K7R3
1 2 VCC3_3DUAL
R679 1KR3
1 2
R674 200R3F
1 2
12
XTAL- 25MH Z-6
12
C257
SC4D7U10V-U
Place PLLVDD filters as close to chip as possible.
VCC3_3DUAL
LINK*_ACTIVITY_L
VCC3_3DUAL
6/9
RA4
SPEED_10*_L
1 2
0R3J-3-GP
SPEED_100*_L SPEED_1000*_L
R690
R688
12
12
4K7R3
4K7R3
(BCM5705M-SPI)
(BCM5705M-SPI)
For BCM5705M,
Note a serial FLASH can be used in stead of the serial EEPROM. Here are the configurations R690 R688 Descripton OFF OFF EEPROM Mode OFF ON Illegal Configuration ON ON Flash Mode (AT45DB011B)
VCC3_3DUAL
C627 SC27P
1 2
X3
1 2
C628 SC27P
POWER MODULE (For BCM5705M and BCM5788M only)
VAUX_2 5_ CTL
VAUX_2 5
VAUX_2 5
R4461KR3
1 2
VAUX_1 2_ CTL
(BCM5705M/5788M)
VAUX_1 2
1 2
R445
470R5
2
L37
VAUX_1 2 1 2 BLM11A601S
C252
SCD1U16V3KX
1 2
10/100 LAN: 22.10245.E41/(W/LED YELLOW/GREEN) Giga LAN: 22.10245.721/(W/LED GREEN/GREEN/YELLOW)
12
12
12
R683
R685
R684
330R3
330R3
330R3
RJ1
15 MH1 1
11
12
13 14
RJ45+FILT+LED-6
(BCM4401/22.10245.E41,BCM5705M/5788M/22.10245.721)
U42
1
SO
SI
2
GND
SCK
3
VCC
RESET#
4
WP#
CS#
AT45DB011B
(BCM5705M-SPI)
R689 4K7R3
1 2 (BCM5705M-SPI)
8 7 6 5
2 3 4 5 6 7 8 9 10 MH2 16
VCC3_3DUAL
1 2
R462 1KR3
(BCM5705M-SPI)
TRDP0 TRDM0
TRDP1 TRDM1
TRDP2 TRDM2 TRDP3 TRDM3
C666
SCD1U16V3KX
1 2
(BCM5705M-SPI)
R431
SMBCLK_LAN
SMBDATA_LAN
VCC3_3DUAL
1
1
(R)
(BCM5705M)
R436
(BCM5705M)
3
Q71
MMJT9 435
(BCM5705M/5788M)
2
4
3
Q69
MMJT9 435
(BCM5705M/5788M)
2
4
0R3-U
0R3-U
ALERT_CLK
12
12
ALERT_DATA
12
C350
SC10U10V5KX
(BCM5705M/5788M)
12
C298
SC10U10V5KX
(BCM5705M/5788M)
12
C296
SC10U10V5KX
(BCM5705M/5788M)
ALERT_CLK 23,28,36
ALERT_DATA 23,28,36
12
C349
SCD01U16V3KX (BCM5705M/5788M)
12
C309
SCD1U16V3KX
(BCM5705M/5788M)
12
C293
SCD1U16V3KX
(BCM5705M/5788M)
12
C303
SCD01U16V3KX
(BCM5705M/5788M)
12
C297
SCD01U16V3KX
(BCM5705M/5788M)
TRDM0 TRDP0
TRDM1 TRDP1
R447
1 2
VAUX_2 5
49D9R3F
R451
1 2
49D9R3F
R441
1 2
VAUX_2 5
49D9R3F
R444
1 2
49D9R3F
L47
1 2
BLM11A601S
12
12
12
12
C272 SCD01U16V3KX
C271 SCD01U16V3KX
C279 SCD01U16V3KX
C280 SCD01U16V3KX
AT24C512 should operate at 400 KHz
12
12
12
Modify 0426
R358 4K 7R3
R357 4K 7R3
R356 4K 7R3
U36
8
(BCM5705M/BCM5788M-SEEPROM)
(BCM5705M/BCM5788M-SEEPROM)
(BCM5705M/BCM5788M-SEEPROM)
EEWP# EECLK EEDATA
SPROMDOUT SPROMDIN
12
(BCM5705M/5788M)
12
(BCM5705M/5788M)
C348
SCD01U16V3KX
C295
SCD01U16V3KX
7 6
AT24C512N-10SI
(BCM5705M/BCM5788M-SEEPROM)
1 2 3 4
M93C46-W-U (BCM4401 )
Need 16-bit R/W data width
TRDM2 TRDP2
TRDM3 TRDP3
VAUX_2 5
VCC3_3DUAL
VCC WP SCL
U31
CS SK DI DO
1
(BCM5705M/5788M)
R416
1 2
49D9R3F
R417
1 2
49D9R3F (BCM5705M/5788M) (BCM5705M/5788M)
R395
1 2
49D9R3F
R403
1 2
49D9R3F (BCM5705M/5788M)
1
A0
2
A1
3
NC
45
GNDSDA
8
VCC
7
DC
6
ORG
5
GND
VAUX_2 5
VAUX_2 5
1 2
C240
SCD1U16V3KX
12
12
12
12
C242 SCD1U16V3K X
C658 SCD1U16V3K X
C651 SC10U10V5KX
C649 SCD1U16V3K X
Place caps. as close to power pins as possible.
12
12
12
12
C646 SCD1U16V3K X
C652 SCD1U16V3K X
C640 SCD1U16V3K X
C270 SC10U10V5KX
12
12
12
12
C268 SCD01U16V3KX
C662 SCD01U16V3KX
C237 SCD01U16V3KX
C661 SCD01U16V3KX
Place caps. as close to power pins as possible.
5
4
PDF created with pdfFactory trial version www.pdffactory.com
<CoreDes ign>
Title
BCM 4401/BCM5705/BCM5788
Size Document Number Rev
Custom
J361Y RS482+M1573
3
2
Date: Sheet
1
Wistron Incorporated
21F, 88, Hsin TaiWu Rd Hsichih, Taipei
37 50Thursday,June 16,2005
of
1A
U51 78M05
1
IN
12
C679 SC1U25V5ZY
Pin35,36:
D D
AC97->HPOUT/SPKOUT/LINEOUT HD_Audio->SPKROUT
C511 SC1U10V3KX
AZ_SPK_R
C509 SC1U10V3KX
AZ_SPK_L
TC73
1 2
E10U25VM-1-GP TC66
1 2
E10U25VM-1-GP
5
VCCA_5VCC12
3
OUT
GND
2
HDAudio-SPKROUT(FrontBoardHeader/DFP) AC97-SPKROUT(FrontBoard Header/DFP)
12
12
12
TC60
E47U25VM-L2
SPKRO_R 39
SPKRO_L 39
AC_OUT_L 39
AC_OUT_R 39
AC97
C C
Pin 39,41 : HD_Audio->Lin eO UT(REAR)
AZ_LO_L AZ_LO_R
TC72 E10U25VM-1-GP
1 2
TC67 E10U25VM-1-GP
1 2
HD Audio
(R) (R)
AZ_HO_L39 AZ_HO_R39
Pin 37 : RiserPHONEOUT
ALC260&ALC655
MONO_OUT_R
B B
C467 SC1U10V3KX
12
(R)
12
R578
47KR3
(R)
PHONEOUT 36
4
3
http://hobi-elektronika.net
AC97 Audio Codec :ALC250/ALC655 HD Audio Codec: ALC260/ALC880
Pin 34 : HD_Aud io->SEN SEB
AZ_JD_FP
AC_FMIC2
AC_AFILT4
27
28
323334
VREF
VRDA
VRAD
VREFOUT
FRONT-MIC
MONO-OUT-R
CEN-OUT
LFE-OUT
37
43
44
ALC260
12
R56720KR3F
(R)
40
NC#33
PC-BEEP
PHONE
12
13
SENSE_B
SENSE_B
VCCA_5
VCC3_3
1925
38
VDD
VDD
AVDD
AVDD
NC#40
SPDIFI/EAPD
GND
AGND
AGND
4726
42
AZ_JD_BP
S
AZ_HO_L AZ_HO_R
AZ_MIN_L AZ_MIN_R
AZ_LO_L AZ_LO_R
AZ_LI_L AZ_LI_R
AZ_SPK_L AZ_SPK_R
MIC_MONO
MIC2
AC97
S
12
SCD1U
(R)
C505SC1000P50V3KX
C503
12
TC69
12
E10U25VM-1-GP
1 2
1 2
AZ_MIC_VREFO
C506SC1000P50V3K X
12
AZ_LIN1_VREFO_L
U52
14
AUX-L
15
AUX-R
16
JD2
17
JD1/GPIO1
39
SURR-OUT-L
41
SURR-OUT-R
23
LINE-L
24
LINE-R
35
FRONT-OUT-L
36
FRONT-OUT-R
21
MIC1
22
MIC2
ALC655-U
CD_L CD_R CD_GND MONO_OUT_R
AC97
12
AC97
C504SC1U10V3KX
C508SC1U10V3KX
C507SC1U10V3KX
293031
AFILT1
CD-L
18
20
AFILT2
CD-R
19
AC_VREFO
AZ_VREF
CD-GND
R583 39K2R3F
1 2
R584 20KR3F
1 2
XTL-IN
XTL-OUT
SPDIFO
SDIN
SDOUT
JD0/GPIO0
XTLSEL
BITCLK
SYNC
RESET#
GND
HD Audio
(R)
(R)
C468 SCD1U C428 SCD1U
C404 SCD1U C416 SCD1U
2 3
48 47
8 5
45 46
6 10
11
JD_HP 39,40
JD_MIC 39,40
1 2 1 2
1 2 1 2
R542 33R3
R539 33R3 R566 0R3-USPDIF R560 0R3-U
1 2
AZ_BCLK
AC97
R556 0R3-U
1 2
R545 0R3-U
1 2
R538 0R3-U
1 2
SPDIF 39
1 2 1 2
12
R544 0R3-U R543 0R3-U
12
C406
(R)
SC22P50V2JN-1
(R)
HD Audio
(R)
1 2 1 2
ACZ_SYNC 21,36 RST_ACZ# 40
2
Pin 23,24 : LINE_IN(REAR)
AZ_LI_L
AZ_LI_R
Pin13 :
HD_Audio-> SENSEA
AZ_JD_BP
AC97_OSCIN 24
ACZ_SDIN0 23 ACZ_SDOUT 21,36
AC97-pull low to Enable SPDIF Function AC97-pull low to select 14.318M CLK source
AC_BITCLK_PCI 36 ACZ_BITCLK_Codec 21
12
C402
SC22P50V2JN-1
C436 SC1U10V3KX
1 2
C465 SC1U10V3KX
1 2
AC97- >PH ON EIN
HD Audio
SENSE_A
SENSE_A
SENSE_A
SPKR DETECT For LCDPC
C395 SC1U10V3KX
1 2
LINEIN_L
LINEIN_R
12
12
R734
R729
10KR3
10KR3
R528 10KR3F
1 2
(R)
R529 39K2R3F
1 2
(R)
R527 5K1R3F
1 2
(R)
For Audio noise
-> 5/24
AC97_PHONEIN
AC97_PHONEIN
R524 0R3-U
1 2
1 2 1 2
(R)
(R) (R)
C290 SCD1U C291 SCD1U
For EMI
CA7 SCD1U
1 2
6/16
1
HD Audio : 0ohm AC97 : 6.8K ohm
R733 6K8R3
1 2
R728 6K8R3
1 2
AC97
JD_LIN 39
JD_LOUT 39,40
L66 BK1608LL680
1 2
R526 10KR3
1 2
AC97
(63.R0004.151)
LIN_L 39
LIN_R 39
PHONEIN 32,36
AZ_MIC_VREFO
Pin 16,17 :HD_Audio->MIC2IN
AC97
MIC2
MIC_MONO
A A
AZ_MIN_R
AZ_MIN_L
C683 SC1U10V3KX
12
C424 SC1U10V3KX
12
HD Audio
C680 SC1U10V3KX
12
(R)
C682 SC1U10V3KX
12
(R)
5
AZ_MIN_R_1
AZ_MIN_L_1
2K2R3
R735 0R3-U
1 2
12
R730 0R3-U
(R)
R736
(R)
HD Audio
3
D47
BAW56
2
1
(R)
12
12
R725 2K2R3
(R)
MIC_IN_R 39,40
FRONT I/O MIC-IN
MIC_IN_L 39,40
Pin 18,19,20 : CD-in
C423 SC1U10V3KX
CD_R
CD_GND CD_GND_CON
4
12
(R)
C419 SC1U10V3KX
12
(R)
C417 SC1U10V3KX
12
(R)
Modify 0422
12
R719
6K8R3
(R)
12
R721
3K3R3
(R)
R722 6K8R3
1 2
(R)
R720 3K3R3
1 2
(R)
R718 6K8R3
1 2
(R)
12
R723
6K8R3
(R)
C410
(R)
3
CD_R_CON
CD_L_CONCD_L
12
S
SC1000P50V3KX
C409
12
(R)
S
SC1000P50V3KX
C408
12
(R)
S
CN37
4 3 2 1
CON4-CD
(R)
SC1000P50V3KX
2
<Core Design>
Wistron Incorporated
21F, 88, HsinTaiWuRd
1
Hsichih, Taipei
38 50Thursday,June 16, 2005
of
Title
Audio Codec
Size Document Number Rev
Custom
J361Y RS482+M1573
Date: Sheet
1A
PDF created with pdfFactory trial version www.pdffactory.com
12
C671
1 2
SCD22U10V3K X
+5VA_MIC
12
C353
SC1000P50V3KX
JD_MIC_CON
12
(R)
HDAudio: 0 ohm AC97 : 33kohm
R546 33KR3
1 2
R536 33KR3
1 2
U49
1
AOUTPUT
2
A-INPUT
3
A+INPUT
4
V-
R547
NJM4565V
47KR3
JD_LOUT38,40
5
Modify 0422
R704
C325
10KR3
SC330P50V3JN
1 2
R491 33KR3
1 2
6/15
L61
1 2
MLB-160808-01-GP
D30
R501
2
1 2
3
R505
1
1 2
BAW56
6/15
HDAudio: 0 ohm AC97 : 68kohm
R548 68KR3
SPKRO_L_1
(Consumer)
R534 68KR3
(Consumer)
B+INPU T
B-INPUT
BOUTPUT
V+
G1 A1
LOJK_L JCK_IN_L
B1
A2
B2
A3
JD_LOUT JD_LIN
B3
LOJK_R
A4
B4
JCK_IN_R
G2
(Consumer/22.10263.091,Corporate/22.10263.051)
Port A : Line_OUT(Orange)
Port B : Line_IN(Light Blue)
Port C : SPDIF (Grey_Black)
5
1 2
MIC_IN_R _3
2K2R3
2K2R3
1 2
1 2
5 6 7 8
JK3
PHONE- JK2 06
R711
47KR3
12
R504 1KR3
C357
1 2
SCD22U10V3KX
SPKRO_R_1 SP_OUT_R
12
(Consumer)
R540 47KR3
R498 0R3-U
1 2
HD Audio
U45
4 5
V- B _+INPUT
3
A_+ INPUT
B_-INPUT
2
A_- INPUT
B_OUTPUT
1
A_OUTPUT
NJM2115V-GP
12
R503 47KR3
6/15
(R)
JK1
AUDIO- JK45- U-GP
MIC IN : Pink
SP_OUT_L
SP_OUT_L 40
SP_OUT_RSPKRO_R_1
SP_OUT_R 40
12
C407 SC39P
(Consumer)
VCC12 VA
12
C412 SCD1U
(Consumer)
22.10263.091W/ SPDIF (C o n s u m e r )
22.10088.A91 W/ SPDIF (Consumer)RoHS
22.10263.051 W/O SPDIF (Corporate)
22.1 0088.A51 W/O SPDIF (Corporate) RoHS
G3
C1 C2 MH1 C0
SPDIF
C3
12
R561
G4
10KR3
SPDIF
VCC12
VCC- 12
VCC5
12
C418 SCD1U
SPDIF
V+
2115_B+
6 7 8
12
C318 SCD1U
1 5 4
3 2
L89
1 2
MLB-201209-8-GP
L88
1 2
MLB-201209-8-GP
SPDIF
1 2
VCCA _5
+5VA_MIC
JD_MIC_CON
MIC_IN_J C
AC97 AMP PWR
12
1 2
SPDIF 38
FRONT MIC IN
AC97
VCCA _5
Modify 0325
12
R506
82R3
12
R706
12
TC50
D D
C C
470R3
E100U16VM-L11-G P
12
12
R705
C672 SCD1U
560R3
R500 0R3-U
JD_MIC38,40
HD Audio
INTERNAL SPKR (FrontBoardHeader/DFP)
SPKRO_L38
(Consumer)
SPKRO_R38
(Consumer)
AC97 : SPKR OUTAMP
12
C411 SC39P
(Consumer)
SP_OUT_L SPKRO_L_1
B B
12
VCC- 12V A
C397 SCD1U
(Consumer)
12
(Consumer)
REAR AUDIO JACK : Line_IN+Line_OUT+SPDIF
LO_CON_240
LO_CON_2 LIN_CON_2
12
A A
12
R731
R737
0R3-U
0R3-U
HD Audio
(R)
(R)
R467
47KR3
R460 1KR3
1 2
C669
12
SC330P50V3JN
6/15
MIC_IN_L38,40MIC_IN_R 38,40
TC61
E100U25VM-L1
TC54
E100U25VM-L1
VCC12 VA
VCC- 12V A
12
Modify 0422
4
C299 SCD22U10V3KX
1 2
12
R701
R702
10KR3
33KR3
C668
1 2
SCD22U10V3K X
R452 0R3-U
1 2
HD Audio
AC97: L INE_OUT/HP_OUT
AC_LO_L
12
R580 68KR3
12
C470 SCD1U
VCC- 12V A
4
12
R455 47KR3
6/15
L50
1 2
(R)
MLB-160808-01-GP
AC_OUT_R38
12
C510 SC39P
AC_OUT_L_1
REAR IO/LINE IN
3
http://hobi-elektronika.net
AZ_HO_L38
AZ_HO_R38
AC97
MIC_IN_J C
12
C292
SC1000P50V3K X
R581 33KR3
AC_OUT_L
AC_OUT_L38
R582 33KR3
AC_OUT_R
U54
1
AOUTPUT
2
A-INPUT
3
A+INPUT
4
V-
12
R586
NJM4565V
47KR3
JD_LIN
JD_LIN38
1 2
LIN_R38
MLB-201209-3-GP
1 2
LIN_L38
MLB-201209-3-GP
1 2
1 2
L72
L71
AZ_HO_L38
AZ_HO_R38
B+INPU T
B-INPUT
BOUTPUT
HP_OUT_L40
C414 SC2D2U16V5ZY
1 2
HD audio
C403 SC2D2U16V5ZY
1 2
HP_OUT_R40
AC_OUT_L_1
AC_OUT_R_1
5 6 7 8
V+
12
C415
SC1000P50V3KX
(R)
(R)
AC_OUT_R_1 AC_LO_R
12
R587 47KR3
SC1000P50V3K X
AC_LO_L
AC_LO_R
JCK_IN_R
JCK_IN_L
12
C422
R576 20KR3
1 2
R577 20KR3
1 2
VCCA _5
12
TC53 E100U25VM-L1
HP_L
HP_R
12
12
R573
R574
4K7R3
4K7R3
12
12
C502
R579
68KR3
SC39P
VCC12 VA
12
C469 SCD1U
3
HDAudio
R555 0R3-U
1 2
(R)
R541 0R3-U
1 2
(R)
L65
1 2
MLB-201209-8-GP
C426 SC2D2U16V5ZY
1 2
C427 SC2D2U16V5ZY
1 2
MUTE#40
6/15
Modify 0503 /J361Y_Tracking(ItemA15)
2
Front I/O HeadPhone
8
3 5
2
U50
VCC
IN1 IN2
MUTE
BH3544F-GP
1 2
MLB-160808-01-GP
1 2
MLB-160808-01-GP
R563 47KR3
1 2
R562
1 2
MUTE#
1KR3 (R)
Active L ow
L64
L68
VCC5S B
6/13
AC97
12
12
C399
C391
SC1000P50V3K X
SC1000P50V3K X
1
OUT1
7
OUT2
3544_BIAS
6
BIAS
4
GND
12
R724
47KR3
1
1 2
1 2
TC62
E470U10V-2-GP
TC57
E470U10V-2-GP
12
R531
150R3
12
R514
HPOUT_L
HPOUT_R
150R3
1 2
(AC/0R3-U,HD/100R 3)
R533 0R3-U
1 2
(AC/0R3-U,HD/100R 3)
BH3544F_Out2 HP_OUT_L _CON
BH3544F_Out1
R515 0R3-U
AC97
12
2
1
C405 SC1U10V3ZY
HPMUTE
12
C396 SCD1U
6/14
HPIN_R HPIN_L
HPMUTE
5VAHP
D33
3
BAV99
MUTE#
Modify 0508
D32
2
3
1
BAV99
HPIN_L
HPIN_R
R557 100KR3
1 2
REAR IO- LINE OUT
VCC5S B
12
R588 10KR3
Q84
1
2N3906-L-U2
3 2
R558 1KR3
1 2
R575 1KR3
1 2
AC97
6/15
2
MUTE_LO 40
LO_R
LO_L
LOMT_R*
LOMT_L*
JD_LOUT38,40
3
Q79
1
2N3904-L1-U
2
3
Q82
1
2
2N3904-L1-U
MUTE_LO #40
AC_LO_R
AC_LO_L
AC97
R589 4K7R3
1 2
R565
1 2
R568
1 2
AC97
1KR3
1KR3
HP_OUT_R_CO N
BH3544F_Out1 BH3544F_Out2
12
Active High
Q80 2N3906-L-U2
3 2
R559 4K7R3
1 2
JD_LOUT
L73
1 2
MLB-201209-3-GP
L74
1 2
MLB-201209-3-GP
6/9
TC12 E47U16VM-5-GP
MUTE_CON 40
R726 10KR3
1 2
1
AC97
JD_HP_CON
HD audio
12
R739
47KR3
(R)
(R)
12
12
C466
C425
SC1000P50V3K X
SC1000P50V3K X
R519
1 2
10KR3
(R)
JD_HP_CON
HP_OUT_L_ CON JD_HP_GND
JD_HP_CON HP_OUT_R_CO N
12
R516
0R3-U
Modify 0511 /J361Y Tracking (Item A14)
VCC5S B
Q92 2N3906-L-U2
1
(R) 3 2
JS_LO# 40
12
R738
4K7R3
(R)
LOJK_R
LOJK_L
<CoreDesign>
Title
Size DocumentNumber Rev
Date: Sheet
Cust om
12
R520
47KR3
(R)
1
HDaudio
R523
0R3-U
FRONT HP OUT
2 3
4 5 1
HEADPHONE OUT : BLACK
AUDIOCONN
J361Y RS482+M1573
VCC5S B
Q74 2N3906-L-U2
(R) 3 2
JS_HP# 40
12
R532 4K7R3
(R)
Modify 0511 /J361Y Tracking (Item A14)
12
JD_HP 38,40
JK2
AUDIO- JK50- GP-U
1
Wistron Incorporated
21F, 88, Hsin TaiWuRd
Hsichih, Taipei
of
39 50Thursday, June 16, 2005
1A
PDF created with pdfFactory trial version www.pdffactory.com
5
SP_OUT_L_CON17 SP_OUT_R_CON17
SP_OUT_L39
SP_OUT_R39
D D
MUTE_LO39
SP_OUT_L_CON SP_OUT_R_CON
AC97/1KR3
R596 1KR3
(Consumer)
1 2
R593 1KR3
(Consumer)
1 2
HD_SSPC/(R) HD_LCDPC/0R3
AC97
R592 1KR3
1 2
R597 1KR3
1 2
1
6/15
BUZZER
C C
SPKR from SB
R62 2K2R3
SPKR_OUT21
B B
1 2
1
Q10
3
2N3904-L1-U
2
Q86
3
2
BZ_ON
2N3904-L1-U
1
VCC5
R595 0R3-U
Q87
3
2
1
R594
0R3-U
1 2
(Corporate)
2N3904-L1-U
2
D7
BAW56
3
R53 75R3
1 2
R52 75R3
1 2
12
(Corporate)
LVDS_BLON_Header16
JD_LOUT 38,39
PBTNJ_REMOTE26,29,41
HP_OUT_L39
HP_OUT_R39
VCC5
LO_CON_2 39
MIC_IN_L38,39 MIC_IN_R38,39
FB_Header_JS_HP
BZ1
HY-05
1
+
2
-
4
SP_OUT_L_CON SP_OUT_R_CON
FB_Header_JS_HP
MUTE_SPK#
BUZZER
FRONT Board Header
CN39
2
1
4
3
6
5
8
7
10
9
12
11
14
13
16
15
18
17
20
19
22
21
24
23
26
25
DVD-CONN26D-5
(R)
R591 0R3-U
1 2
R590 0R3-U
1 2
3
http://hobi-elektronika.net
Modify 0503 Modify 0508
JD_MIC 38,39
VCCA_5
MUTE_CON 39
VCC5SB VCC5
VCC12
JD_HP 38,39
JS_HP# 39
Modify 0511 /J361Y Tracking (Item A14)
Modify 0510 /J361Y_Tracking(Item A17)
ACZ_RST*23,36
AC/AZ Reset
SC10U10V5ZY
12
R521
100R3
ACZ_RST_CODEC*
R551 1KR3
1 2
12
C420
R554 200KR3
1 2
2
JS_LO#
JS_LO#39
JS_HP#
JS_HP#39
VCC5SB
AC97
VCC3_3SB
147
3 4
R774 10KR3
1 2
U48B
SOLVC14
R585 4K7R3
1 2
R552 10KR3
1 2
Azalia SSPC:unmount
VCC3_3SB
SOLVC14
VCC3_3SB VCC3_3SB
147
U48D
9 8
SOLVC14
R522 0R3-U
(R)
12
LCDPC:mount
AC97 :mount
U48C
147
56
Azalia SSPC:mount only
ACZ_RST_CODEC* 36
D35 BAW56
2
1
D36 BAW56
2
1
R553 10KR3
1 2
Q105
2N3904-L1-U
147
U48E
11 10
SOLVC14
Modify 0511 /J361Y_Tracking(Item Other_061)
Modify 0517 /J361Y_Tracking(Item Other_068)
3
3
3
1
2
3
2
R535 10KR3
1 2
MUTE_SPK#
Q85
2N3904-L1-U
1
1 2
1
6/13
MUTE_LO# 39
Q832N3904-L1-U
3
2
RA18 10KR3
1
MUTE# 39
CRT_TMDS_DISJ 16,17,19,21
RST_ACZ# 38
12
C400
SC1000P50V3KX
A A
<Core Design>
Wistron Incorporated
21F, 88, HsinTaiWu Rd
Title
Front Audio Header & Buzzer& AC RESET
Size Document Number Rev
Custom
J361Y RS482+M1573
5
4
3
2
Date: Sheet
Hsichih, Taipei
40 50Thursday,June 16, 2005
1
1A
of
PDF created with pdfFactory trial version www.pdffactory.com
POWER BUTTON
D D
8
PBTNJ_REMOTE26,29,40
PBTNJ_WIRLESS26,29,40
PBTNJ_CON26,29,40
VCC3_3SB
PBTNJ_CON
6/13
VCC5SB
VCC3_3SB
R751
1 2 12
10KR3
C685 SCD1U
147
3 4
VCC3_3SB
147
3 4
R755
1 2
PBTNJ_LCD17
1KR3
C C
SOLVC14
U57B
SOLVC14
U2B
R752 150KR3
1 2
D48
(R)
1N4148W
R756 100KR3
R757 0R3-U
1 2
6/13
12
VCC3_3SB
R39
147
4K7R3
9 8
(R)
R753 10KR3
1 2
21
1 2
(R)
SC3D3U10V5KX-LGP
7
U2D
PBT_2 PBT_1
SOLVC14
(R)
12
C694
(R)
SC1U10V3KX
12
C686
(R)
VCC3_3SB
U2A
147
1 2
SOLVC14
VCC3_3SB
147
U57A
SOLVC14
U57C
SOLVC14
1
G
1 2
VCC3_3SB
147
5 6
Modify 0511 /J361Y_Tracking (Item other-051)
R10
1 2
330R3
S
D
Q94
2N7002-L1
2 3
(R)
S
PBTNJ_LCD2
6
12
C1
(R)
SC1U10V3KX
U62 BAT54C-U-GP
(R)
SB_PWRBTN# 23
12
3
R598 4K7R3
1 2
G
VCC3_3SB
1
PBTNJ_CON
5
http://hobi-elektronika.net
12
R750
10KR3
(R)
D
Q93
2N7002-L1
2 3
(R)
S
PBTNJ_BASE
TVONJ_RMT
D
Q95
1
G
2N7002-L1
2 3
(R)
S
3
Q88
1
2N3904-L1-U
2
VCC3_3SB VCC3_3SB VCC3_3SB
147
U57E
11 10
SOLVC14
TVONJ_RMT
TVONJ_RMT26
TVONJ_BTN
1 2
13 12
R35
1 2
R778
0R3-U
6/12
147
U57F
SOLVC14
R34
0R3-U
1 2
0R3-U
SIO_GPI_S5 wakeup event
147
U57D
9 8
SOLVC14
LCDONJ_SIO 28
4
SATA_LED22
3
CPU FAN
CPU_FAN_CTRL28
6/13
12
RA16 10KR3
6/13
FOR4PINFAN : MountR494,TC19
VCC3_3
FOR3PINFAN : MountQ44,TC20
12
R157 2K2R3
1
E10U25VM-1-GP
DUAL LAYOUT
VCC3_3VCC3_3
QA3 2N3904-L1-U
IDE
12
LED
RA17 10KR3
312
IDEACT_LED*25
SATA_LED_1
R24 1KR3
1 2
R21 1KR3
1 2
CN3
JST-CON2-4
3
Q44 BSR14
2
S
S
2
(R)
TC19
1 2
Option for3PIN CTRL
CPU_FAN_PIN1
VCC12
12
12
TC20
(R)
E220U16VM-L6-GP
VCC5
12
R23
10KR3
1
R22 10KR3
1 2
IDE_LED_CON_P
1 2
3 4 MH1
VCC3_3
Q4
2N3906-L-U2
3 2 12
R43
S
75R5
R178
1 2
0R5J
J2
FOX-CON4-3
12
R782
10KR3
(R)
1
Modify 0511 /J361Y Tracking(Item:other066)
VCC12
12
R187
4K7R3
R758 27KR3
1 2
HDD_LED
Modify 0510 /J361Y_Tracking (Item other-052)
12
R759 10KR3
CPU_FAN_TACH 28
SMBUS ADD ENABLE
VCC3_3SB
12
R488 2K2R3
R154
1 2
1
2K2R3
1 2
R164 0R3-U
B B
REAR_FAN2_CTRL28
VCC3_3
2nd FAN
A A
REAR_FAN_CTRL28
12
R105 2K2R3
(R)
8
3rd FAN
6/13
R168
1 2
220R3
3
(R)
Q41
2N3904-L1-U
2
REAR_FAN2_CTRL_1
E10U25VM-1-GP
Option for 3PINCTRL
3
Q27
1
2
2N3904-L1-U
(R)
REAR_FAN_CTRL
Option for3PIN CTRL
3
Q72 BSR14
1
2
12
TC48
DUAL LAYOUT
REAR_FAN_PIN1
12
FOR 4 PIN FAN : M ountR142,TC8 FOR 3 PIN FAN : M ountR105, Q27,TC9
FOR 4 PIN FAN : M ountR154,Q41,TC48,R178,R164 FOR 3 PIN FAN : MountR168,Q72,TC49
R494
1 2
REAR_FAN2_PIN1
0R5J
(R)
VCC12
12
TC49 E220U16VM-L6-GP
(R)
VCC12
R142 0R5J
12
TC9
(R)
E220U16VM-L6-GP
DUAL LAYOUT
7
12
TC8
E10U25VM-1-GP
VCC3_3
12
R783
10KR3
(R)
J3
1 2
Modify 0511 /J361Y
3
Tracking(Item:other066)
4 MH1
VCC12
FOX-CON4-3
J1
1
VCC3_3 2 3
12
4 MH1
R784
FOX-CON4-3
10KR3
(R)
12
R474
4K7R3
R760 27KR3
1 2
Modify 0511 /J361Y Tracking(Item:other066)
VCC12
12
R106
4K7R3
R762 27KR3
1 2
6
REAR_FAN2_TACH 28
12
R761 10KR3
12
R763 10KR3
REAR _FAN _TAC H 28
VCC5SB
R15
12
130R5
S
HDDLED20
11: SUSLED_P
12. PWRLED_P 13: IDE_LED_GND 14: POWER Botton 15: MAIL_LED­16: BLUE_LED­17:TV_LED_P 18:TVONJ_BTN 19:BLUE02_LED­20:BLUE03_LED-
SUSLED_CON_P PWRLED_CON_P
IDE_LED _GND PBTNJ_CON ACPILED_CON_N BLUELED_CON_N TV_LED_CON_P TVONJ_BTN BLUELED02_CON_N BLUELED03_CON_N
6/13
RA15
1 2
0R3-U
(R)
5
11 12 13 14 15 16 17 18 19 20
JST-CONN20B-U
1
G
CN5
D
2 3
S
1: SUS_PWR_CON_N
2. SUS_PWR_CON_N 3: IDE_LED_CON_P 4: GND 5: MAIL_LED+ 6: BLUE_LED+ 7: GND 8:GND 9:BLUE02_LED+ 10:BLUE03_LED+
1
SUS_PWR_CON_N
2
IDE_LED_CON_P
3 4
ACPILED_CON_P
5
BLUELED_CON_P
6
TV_LED_CON_N
7 8 9
BLUELED02_CON_P BLUELED03_CON_P
10
IDE_LED _GND
12
RA14
QA2
0R5J
2N7002-L1
(R)
VCC5SB
BLUELED02*20
BLUELED03*20
12
R44
130R5
BLUELED*20
S
TVLED*28
4
VCC5
VCC5 VCC5
12
12
12
R46
R45
R47
S
S
S
130R5
130R5
130R5
Modify 0510 /J361Y_Tracking (Item other-052)
R63
1 2
S
1KR3
R64
1 2
S
1KR3
R65
1 2
S
1KR3
VCC3_3SB
12
R8
10KR3
1 2
(R)
SUSLED*28
BLUELED_CON_N
3
Q14
1
BLUELEDJ1
2N3904-L1-U
2
BLUELED02_CON_N
3
BLUELEDJ2
BLUELEDJ3
Modify 0512 - J361Y Tracking(Item: other052)
R9
S
1KR3
1
1
1
Q13 2N3904-L1-U
2
BLUELED03_CON_N
3
Q12
2N3904-L1-U
2
TV_LED_CON_N
3
Q1
2N3904-L1-U
2
3
12
R5 10KR3
R6
4K7R3
VCC3_3SBVCC3_3SB
Q3
SUSLEDJ1
1
12
2N3906-L-U2
3 2 12
R12 130R5
S
SUSLED_CON_P
ASIC8M_VDDIO_EN44,47
Modify 0525 "ASIC8M_VDDIO_EN" turn on level issue
(1/10W)
6/9
PWRLED*22
1
G
Modify 0510
ACPI LED *23
2
VCC3_3
R7
1 2
S
1KR3
SUS_PWR_CON_N
D
Q103 2N7002-L1
2 3
S
PWRLEDJ1
1
Q2
2N3906-L-U2
3 2
(1/10W)
12
R16 130R5
S
PWRLED_CON_P
MAIL LED ( B LINKINGS0/S3)
ACPILED_CON_N
D
Q15 2N7002-L1
ASIC8M_VDDIO_EN44,47
1
G
2 3
S
1
LED/FAN/PWRBTN
J361Y RS482+M1573
3
Q96
2N3904-L1-U
2
R58
1 2
1KR3
<CoreDes ign>
Title
Size DocumentNum ber Rev
Custom
Date: Sheet
Wistron Incorporated
21F, 88, Hsin Tai WuRd
Hsichih,Taipei
41 50Thursday,June 16, 2005
1
1A
of
PDF created with pdfFactory trial version www.pdffactory.com
8
ATX_PWOK
OFFPWRS3#
S0,S1 S3 S4
D D
S5
C C
1 0 0 00
USBPWR_Ctrl
Consumer
0
1
1
0
0
0
0
Corporate
0
1 1 0
7
DUAL_V
1 0 0 0
USB_DUAL#
1 0
0:Corporate 1:Consumer
1
6
http://hobi-elektronika.net
ATX_PWOK28,47,48
OFFPWRS3#23,28,47
5
R299 2KR3
1 2
R767
1 2
1KR3
4
VCC5SB VCC12
12
R287 10KR3
3
Q98
1
2N3904-L1-U
2
3
Q54
1
2N3904-L1-U
2
USBPWR_Ctrl23
Consumber: S3->H, S4/S5->L Corporate: S3/S4->H, S5->L
Modify 0512 /J361Y_Tracking (Item other-014)
12
D
Q57
1
G
2N7002-L1
2 3
S
1 2
R294 10KR3
DUAL_V
R781
1KR3
12
DUAL_V
DUAL_V 34,43
C211 SCD1U
(R)
3
VCC12
6/14
DA1 1N4148W-7-F-GP
2 1 12
RA23
10KR3
G
1
1
VCC5SB
D
S
12
R279 10KR3
USB_DUAL#
Q55
2N7002-L1
2 3
3
Q104
2N3904-L1-U
2
2
USB_DUAL#
1
B B
APM9932CKC-TRL : 84.09932.C37 AP4502GM : 84.04502.A37
FRONT USB POWER
Modify 0510
VCC5
VCC5SB
USB_DUAL#
A A
8
6/14
U43
1
S1
D1
2
G1
D1
3
S2
D2
4 5
G2 D2
APM9932CKC-1-GP
7
VCC5_USB_F
8 7 6
12
C294 SCD1U
12
TC43
E220U16VM-L6-GP
6
12
R780
1KR3
Modify 0510 /J361Y_Tracking (Item other-014,057)
5
REAR USB/ PS2 KB POWER
Modify 0510
VCC5 VCC5SB
USB_DUAL#
U30
1
S1
D1
2
G1
D1
3
S2
D2
4 5
G2 D2
APM9932CKC-1-GP
8 7 6
VCC5_USB_R
12
C193 SCD1U
6/14
4
3
12
TC34 E220U16VM-L6-GP
12
R779
1KR3
<Core Design>
Wistron Incorporated
21F, 88, Hsin Tai Wu Rd
Title
USB POWER & PWR CTL
Size Document Number Rev
Custom
J361Y RS482+M1573
Date: Sheet
2
Hsichih,Taipei
42 50Thursday, June 16, 2005
1
of
1A
PDF created with pdfFactory trial version www.pdffactory.com
8
DDR_VCC5_DUAL FOR
DDR & Card bus
VCC3_3S B
U26 APL1085
7
6
U3 APL1087
5
http://hobi-elektronika.net
VCC1.8_DUAL for SB
4
Resume Power
VCC3_3DUAL
3
2
1
D D
ADJ
VOUT
VIN
123
VCC3_3SB
C C
VCC3_3SBADJ
12
12
B B
APM9932CKC-TRL : 84.09932.C37 AP4502GM : 84.04502.A37
VCC3_3
DUAL_V34,42
VCC3_3SB
VCC5SB
12
TC31 E220U16VM-L6-GP
R248 100R3F
R249 165R3F
12
C158 SCD1U
12
TC33 E220U16VM-L6-GP
VCC3_3 DU A L
U4
1
S1
2
G1
3
S2
4 5
G2 D2
D1 D1 D2
8 7 6
ADJ/GND
123
VCC18_DUALADJ
VOUT
VIN
12
R33 124R3F
12
R32 54D9R3F
VCC3_3DUAL
12
C530 SCD1U
12
TC3
E220U16VM-L6-GP
VCC18_DUAL
12
12
TC5 E220U16VM-L6-GP
12
C15 SCD1U
TC1 E220U16VM-L6-GP
D
VCC5SB
S
32
Q75
AP20P02GJ-GP
D
D
Q77
3 2
AP60T03GH-GP
S
DDR_VCC5_DUAL
21
D34
1N5817M-L
(R)
12
C421 SCD1U
Wistron Incorporated
TC63
12
E220U16VM-L6-GP
DUAL_V34,42
<Core Design>
VCC5
1
G
G
1
21F, 88, Hsin Tai WuRd
A A
APM9932CKC-1-GP
Title
Hsichih, Taipei
Dual 5V, 3.3V, 1.8V, and 3.3VSB
Size Document Number Rev
A
J361Y RS482+M1573
Date: S heet
of
43 50Thursday, June 16, 2005
1A
PDF created with pdfFactory trial version www.pdffactory.com
8
D D
ASIC8M_VDDIO_EN41,47
C C
Active High
7
VCC5SB
R412
8K2R3
1 2
D
Q65
1
G
ASIC8M_VDDIO_E N#
2N7002-L1
2 3
S
6
VDDIO (2.6V)
12
G
C273 SC10U10V5KX
VDDIO_GN D
1
6/15
VDDIO_VCC
D
Q63
2N7002-L1
2 3
S
http://hobi-elektronika.net
R424 10R3
1 2
VDDIO_OCSET
Modify 0427
VDDIO_PHASE
(FB)Vref=0.8V Vout=0.8*(1+R1/R2)
U39
SCD1U
8
PHASE
7
OCSET
6
FB
APW7057 KC-TR
C258
12
VDDIO_BOO T
BOOT
UGATE
GND
LGATEVCC
DDR_VCC5_DUAL
2
BAS16-3-GP
3
1
UGATE_M
2 3
LGATE_M
45
5
1
D28
1 2
1 2
VDDIO_FB
4
R691 12KR3
0R3-U
R453
0R3-U
R681
R2
1 2
C664
1 2
SC470P50V3JN
UGATE_M1
VDDIO_PHASE
LGATE_M1
(R)
1 2
SCD018U50V3KX
12
R425 2K4R3F
VDDIO_GND
G
G
C267
D
Q68
1
3 2
S D
Q67
1
3 2
S
VDDIO_FB_C
G17
1 2
COPPER-CLOSE
3
DDR_VCC5_DUAL_IN
12
TC45
E680U10VM-L2-GP
RDSon=12m ohm
AP60T03GH-GP
L49
1 2
COIL-4UH-4
AP60T03GH-GP
R418 60D4R3F
(R)
1 2
R421 5K36R3F
1 2
R1
12
TC46
SC1U10V3KX
E680U10VM-L2-GP
12
Modify 0503
Modify 0504
L60
1 2
COIL-1UH-10
12
C320
VCC2.5V_SU S
TC52 E1000U6D3V-6-GP
2
DDR_VCC5_DUAL
12
12
C327
SC1U10V3KX
6/15
TC47 E2200U6D3V-GP
1
VCC2.5V_SUS
DDRVTT (VDDIO/2=1.3V)
B B
(R)
A A
ASIC8M_VDDIO_E N#
8
VCC3_3SB
12
12
TC68
E220U16VM-L6-GP
12
C681 SCD1U
R732 1KR3F
12
R727 649R3F
D
Q91
1
G
2N7002-L1
2 3
S
DDRVTT_REF
7
DDR_VTT
12
E1500U10VM-L 1
6
TC71
12
TC70 E1000U6D3V-6-GP
U53
1
VIN
2
GND
3 6
VREF VCNTL
4
VOUT
GND
APL5331KAC-TRLGP
9
5
NC#8 NC#7
NC#5
8 7
5
DDR_VCC5_DUAL
12
TC58 E100U16VM-L11-GP
6/13
<Core Design>
Wistron Incorporated
21F, 88, Hsin Tai Wu Rd
Title
DDR VDDIO & DDRVTT Regulator
Size Documen tNumber Rev
B
J361Y RS482+M1573
Date: Sheet
4
3
2
Hsichih, Taipei
44 50Thursday, June 16, 2005
1
of
1A
PDF created with pdfFactory trial version www.pdffactory.com
8
VCC18_RUN (1.8V)
12
C308
VCC1D8_ GND
SC1U10V3KX
D D
7
VCC18SW_VCC
VCC18_PHASE
R466 10R3
VCC18_OCS E T
Modify 0427
C300 SCD1U
U44
8
PHASE
7
OCSET
6
FB
APW7057KC-TR
1 2
VCC18_BOOT
12
BOOT
UGATE
GND
LGATEVCC
6
VCC5
2
1
UGATE_VCC18
2
VCC1D8_GND
3
LGATE_VCC18
45
1
BAS16-3-GP
3
D29
http://hobi-elektronika.net
5
R525 8K2R3
1 2
C394
0R3-U
1 2
R476
0R3-U
1 2
R477
1 2
SC470P50V3JN
UGATE_VCC 18_1
VCC18_PHASE
LGATE_VCC18_1
D
Q81
G
1
3 2
AP60T03GH-GP
L63
1 2
S D
Q76
COIL-4UH-4
G
1
3 2
AP60T03GH-GP
S
VCC5_IN
12
TC59
E680U10VM-L2-GP
4
12
12
C393
TC64
SC1U10V3KX
E680U10VM-L 2 -G P
VCC18_RUN
12
TC56
E1000U6D3V-6-GP
L70
1 2
COIL-1UH-10
12
TC51
E1000U6D3V-6-GP
VCC5
3
12
C323
SC1U10V3KX
12
C687
SC10U10V5ZY
SC10U10V5ZY
Modify 0506
12
C688
2
1
(FB)Vref=0.8V Vout=0.8*(1+R1/R2)
VCC18_FB
C C
VCC12_RUN (1.2V)
VCC12SW_VCC
12
C123
SC1U10V3KX
VCC1D2_GND
B B
Modify 0512 : modify for VLDT to VDD power sequence failure
VCC3_3SB
U2C
12
C695
147
5 6
SOLVC14
R785 75R3
1 2
7
G
A A
ASIC8M_VLDT_EN47
Active High
SC1U10 V3ZY
8
1
VCC12_PHASE
D
Q49
2N7002-L1
2 3
S
(FB)Vref=0.8V Vout=0.8*(1+R1/R2)
6
R184 10R3
VCC12_OCSET
Modify 0427
C146 SCD1U
U18
8
PHASE
7
OCSET
6
FB
APW7057 KC-TR
12
R2
1 2
VCC12_BOOT
12
BOOT
UGATE
GND
LGATEVCC
C289
1 2
(R)
SCD1U16V3KX
R449 3K74R3F
VCC1D8_GND
2
1 2 3 45
VCC18_FB_C
G18
1 2
COPPER-CLOSE
VCC5
1
D22
BAS16- 3-GP
3
UGATE_VC C12 VCC1D2_GND LGATE_VCC1 2
5
R450 0R3-U
(R)
1 2
R458 4K75R3F
1 2
R1
R181 8K2R3
1 2
C120
1 2
SC470P50V3JN
0R3-U
R185
0R3-U
1 2
R196
SCD1U16 V3KX
12
R2
UGATE_VCC 12_1
C131
1 2
R201 2KR3F
VCC1D2_GND
1 2
Modify 0504
G
VCC12_PHASE
LGATE_VCC12_1
(R)
VCC12_FB_CVCC12_F B
G19
1 2
COPPER-CLOSE
G
R195 1KR3F
D
S D
S
R193 0R3-U
1 2 1 2
4
Q46
AP60T03GH -G P13 2
1 2
Q47
AP60T03GH-GP13 2
(R)
R1
L23
COIL-4UH-4
Modify 0504
VCC3_3_IN
12
TC16
E1500U10VM-L1
3
SC1U10V3KX
12
TC39
E2200U6D3V-GP
L13
1 2
COIL-1UH-10
12
C122
VCC12_RUN
VCC3_3
12
C148
SC1U10V3KX
<Core Design>
Wistron Incorporated
21F, 88, Hsin Tai Wu Rd
Title
VCC18_RUN & VCC12_RUN
Size Documen tNumber Rev
Custom
J361Y RS482+M1573
Date: Sheet
2
Hsichih, Taipei
45 50Thursday, June 16, 2005
1
of
1A
PDF created with pdfFactory trial version www.pdffactory.com
8
R285 300R5
1 2
+12V_CORE
R251 0 R3-U
6559_GND
VID0
R300 1KR3
VID1
R302 1KR3
VID2
R307 1KR31 2
VID3
R312 1KR3
VID4
R320 1KR3
VID[0..4]
VID[0..4]8
D D
C C
C182
1 2
SCD01U50V3KX
Use 20 mil trace
ASI C8M_VCO RE_EN47
ISL6 559_IOUT ISL6559_VDIFF
12
R284 1KR3
R276 5K1R3
ISL6 559_CFB
VCC5
VCC5
VCC5
VCC5
VCC5
D27 S1A
Put near ISL6559
ISL6 559_VCC
12
C187 SCD1U25V5KX
CPU_VCORE_ OFS
1 2 1 2
1 2 1 2
1 2
ISL6559_COMP
ASI C8M_VCO RE_EN
Put near ISL6559
C185 SC33P
1 2
ISL6559_COMP
1 2
R228 10KR3
1 2
R227 10KR3
1 2
R262 10KR3
1 2
R270 10KR3
1 2
R258 10KR3
1 2
ISEN1 ISEN2 ISEN3 ISEN4
12
VID0_R VID1_R VID2_R VID3_R VID4_R
(R)
(R)
(R)
(R)
(R)
4 pin POWER Connector
+12V_CORE
DVD-CONN4- GP
Output Capacitors
B B
A A
CHOKE C OIL 1 .5UHRT5018*1R5MB
CN13
341
2
L3 C OIL -1D5UH-2
1 2
19.40117.321
VCC_CO RE
12
C224
SC1 0U6 D3V6KX
VCC12_IN
12
C138
SC1 0U6 D3V6KX
VCC_CORE
12
TC21
E560U4VM-L4-G P
VCC_CORE
12
TC24
E560U4VM-L4-GP
8
7
IC PWM C TRL ISL6559CR MLFP 32P
U25
15
VCC
29
OVP
5
OFS
3
VID0
2
VID1
1
VID2
32
VID3
30
VID4
22
ISEN1
18
ISEN2
17
ISEN3
23
ISEN4
6
COMP
27
EN
NCNCNC
ISL6 559CR
4831
4 Pha se: u nmountR246,R263 3 Pha se: u nmount R263, mountR246 2 Pha se: mo untR263, R246
R246 1KR3
PWM4 PWM3
R263 1KR3
VID4
SC1 0U6 D3V6KX
VCC_CO RE
E560U4VM-L4-G P
VID3
VID2
VID1
VID0
Put near ISL6559
12
C199
SC1 0U6 D3V6KX
12
TC18
E2200U6D3V-GP
12
TC22
12
TC28
E560U4VM-L4-GP
0R3-U
(R)
0R3-U
(R)
0R3-U
(R)
0R3-U
(R)
0R3-U
(R)
12
C198
SCD1U16V3KX
12
TC32
E2200U6D3V-GP
12
TC23
E560U4VM-L4-G P
12
TC36
E560U4VM-L4 -G P
7
IDROOP
VDIFF VSEN
RGND PWM1
PWM2 PWM3 PWM4
FS/DIS
PGOOD
GND GND GND GND GND
1 2 1 2
R220
12
R219
12
R261
12
R269
12
R257
12
12
C226
12
TC29
E560U4VM-L4 -G P
12
TC40
E560U4VM-L4-GP
6
ISL6559_IOUT
7
FB
9
ISL6559_VDIFF
10
COREFB_H
R281 1KR3
11
COREFB_L
R282 1KR3
12
PWM1
21
PWM2
Use 20 mil trace
20
PWM3
16
PWM4
24
ISL6 559_DIS
R229 121KR3F1 2
26
ISL6559_PWG
25 13
14 19
6559_GND
28 33
VCC5
(R)
VCC5
(R)
12
12
C156
C225
SCD1U16V3KX
SC1000P50V3KX
SC1000P50V3KX
Modify 0422
12
TC42
E560U4VM-L4-GP
1 2 1 2
Put near ISL6559
12
C239
10/10/5/10/10
COREFB_H COREFB_L
1 2
R230 0R 3-U
VCC_CORE
6559_GND
COREFB_H 8 COREFB_L8
G11
COPP ER-CLOSE
VCC_ CORE_PG 47
12
6
5
PHASE1 and PHASE2
+12V_CORE
SCD 22U5 0V5KX
http://hobi-elektronika.net
R198
VCC_PH1 _2
1 2
12
C142
2D2R3
BOOT1 BOOT2
PWM1 PWM2
U17
14
VCC
3
PVCC
11
BOOT1
10
BOOT2
5
NC
8
NC
15
PWM1
16 17
PWM2 GND
ISL6 614CR-T
PHASE3
UGATE3 BOOT3 PWM3
U32
1
UGATE
PHASE
2
BOOT
3
PWM
4 5
GND LGATE
PHASE4
UGATE4 BOOT4 PWM4
U41
1
UGATE
PHASE
2
BOOT
3
PWM
4 5
GND LGATE
5
PVCC
PVCC
4
Use 15-20 mil trace Put near MOS
R622 0 R3-U
UGATE1
1 2
Place Near Gate Driver
R182
BOOT1
1 2
2D2R3
LGATE1
Use 25 mil trace Put Near MOS
LGATE1
2
LGATE1
LGATE2
6
LGATE2
UGATE1
12
UGATE1
UGATE2
9
UGATE2
PHASE1
13
PHASE1
PHASE2
7
PHASE2
4
PGND
1
GND
PHASE3
8
VCC_PH3
7 6
VCC
LGATE3
C236
PHASE4
8
VCC_PH4
7 6
VCC
LGATE4
C284
UGATE2
Place Near Gate Driver
BOOT2
+12V_CORE
12
R360 4D7R3
12
Place Near Gate Driver
SCD1U25V5KX
BOOT3
+12V_CORE
12
R448 4D7R3
UGATE4
12
Place Near Gate Driver
SCD1U25V5KX
BOOT4
Use 15-20 mil trace Put near MOS
R153 0 R3-U
1 2
R183
1 2
2D2R3
LGATE2
Use 25 mil trace Put Near MOS
Use 15-20 mil trace Put near MOS
R292 0 R3-U
UGATE3
1 2
R333
1 2
2D2R3
LGATE3
Use 25 mil trace Put Near MOS
Use 15-20 mil trace Put near MOS
R676 0 R3-U
1 2
R438
1 2
2D2R3
LGATE4
Use 25 mil trace Put Near MOS
R623
10KR3
1 2
BOOT1_RC
C70 SC D47U16V3C
1 2
R126 2K2R5
1 2
R159
10KR3
1 2
BOOT2_RC
C68 SC D47U16V3C
1 2
R130 2K2R5
1 2
UGATE3_ R
R291
10KR3
1 2
BOOT3_RC
C248 SCD47U16V3C
1 2
R359 2K2R5
1 2
UGATE4_ R
R677
10KR3
1 2
BOOT4_RC
C283 SCD47U16V3C
1 2
R440 2K2R5
1 2
UGATE1_ R
R255 3K9 R3F
ISEN1
1 2
C129 SCD1U16V3KX
1 2
LGATE1_R
UGATE2_R
R259 3K9 R3F
ISEN2
1 2
C124 SCD1U16V3KX
1 2
LGATE2_R
R267 3K9 R3F
ISEN3
1 2
C221 SCD1U16V3KX
1 2
LGATE3_R
R252 3K9 R3F
ISEN4
1 2
C282 SCD1U16V3KX
1 2
LGATE4_R
4
3
VCC12_IN
PHASE1
PHASE2
PHASE3
PHASE4
LD1010DA-GP
LD1010DA-GP
LD1010DA-GP
LD1010DA-GP
12
C64
12
TC7
SC10U25V6KX
E1500U25VM-3-GP
L14 COIL- D5UH-1-U
1 2
12
R158 2D2R5
12
C90 SC4700P50V3KX
12
G20
COP PER-CLOSE
12
12
C65
TC14
SC10U25V6KX
E150 0U25VM-3-GP
L15 COIL- D5UH-1-U
1 2
12
R143 2D2R5
12
C82 SC4700P50V3KX
12
G21
COP PER-CLOSE
12
12
C204
TC37
SC10U25V6KX
E1500U25VM-3-GP
L36 COIL- D5UH-1-U
1 2
12
R362 2D2R5
12
C244 SC4700P50V3KX
12
G22
COP PER-CLOSE
12
12
TC41
C274
SC10U25V6KX
E1500U25VM-3-GP
L41 COIL- D5UH-1-U
1 2
12
R433 2D2R5
12
C281 SC4700P50V3KX
12
G23
COP PER-CLOSE
Modify 0422
Modify 0505
Modify 0422
Modify 0505
Modify 0422
Modify 0505
Modify 0422
Modify 0505
D
Q31
1
G
PHD66NQ03LT
3 2
S
23
Q32
1
VCC12_IN
D
Q33
1
G
PHD66NQ03LT
3 2
S
23
Q34
1
VCC12_IN
D
Q56
1
G
PHD66NQ03LT
3 2
S
23
Q58
1
VCC12_IN
D
Q62
1
G
PHD66NQ03LT
3 2
S
23
Q66
1
3
VCC_CORE
VCC_CORE
VCC_CORE
VCC_CORE
2
1
VID Codes
CORE (V)
1.550
1.525 0
1.500
1.475
1.450
1.425
1.400
1.375
1.350
1.325
1.300
1.275
1.250
1.225 .200
1
1.175
1.125
1.100
1.075
1.050
1.025
1.000
0.975
0.950
0.925
0.900
0.875
0.850
0.825
OFF
<Cor eDesign>
Title
VCORE(ISL6559)
Size Document Number Re v
Custom
J361Y RS482+M1573
Date : Sh eet
VID3
VID4
0
0
0
0 0
0 0
0 0
0 0
0 0
0 0
0
1
00 0
1
0
1
0
1 1
0 0
1 01 0
1
01.150
1 1
0
0
1 1
0 1
0
0
1 1
0
0
1 1
1
1
1
1
1 1
1
1
1
1
1 1
1 1
1
2
VID1
VID2
0
0 0
1
0
1
0 1
0
1
0 1
1 1
1
0
0
0
1
0 0 10
0
1 1
110 1
1 0
0 0
0 0
1 1
0
0
1 1
0 1
1 1
1 0
0 0
0
0
1 1
0 1
0 0
1 1
1 1
1
Wistron Incorporated
21F, 88, Hsin Tai Wu Rd Hsichih, Taipei
46 50Thur sday, June 16, 2005
1
VID0 0 1 0 1 0 1 0 1 0 1 0 1 0 1
1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
00.800 1
1A
of
PDF created with pdfFactory trial version www.pdffactory.com
8
VCC12_RUN and VCC18_RUN PWG
VCC12_RUN_PW G
VCC12_RUN
12
C656 SCD1U
D D
VCC18_RUN_REF
VCC12_RUN_REF
R419
3K3R3F
R423
1K13R3F
C C
SB_CPUP WRGD20
SB_LDTREST#20
ForDebug only
1R2P-2
VCC5SB
12
12
VCC2.5V
JP3
U40
1
1OUT
2
1IN-
3
1IN+
4 5
GND 2IN+
LM393ADR
12
R427
3K74R3F
R422
1KR3F
1 2
VCC2.5V
12
R335
680R3
ASIC8M_CP U_PWRGD
12
R402
680R3
12
ASIC8M_CP U_PWRGD
(R)
2OUT
VCC
2IN-
VCC5
8 7 6
R344 0R3-U
1 2
VCC2.5V_SUS
147
4 5
VCC2.5V_SUS
9
10
VCC18_RUN_PW GVCC12_RUN_RE F
VCC18_RUN_REF
12
C266 SCD1U
TSLCX08MTC-U
(R)
R396 0R3-U
1 2
B B
12
R401
680R3
R397 0R3-U
1 2
VCC2.5V_SUS
12 13
VCC2.5V_SUS
1 2
147
U33D
TSLCX08MTC-U
(R)
147
U33A
TSLCX08MTC-U
(R)
11
3
VCC2.5V
SB_ LDTSTO P_L20
ASIC8M_CP U_PWRGD
A A
8
C276
1 2
VCC18_RUN
U33B
6
147
TSLCX08MTC-U
(R)
VCC2.5V
U33C
12
SCD1U
VCC2.5V
8
R399 680R3
(R)
7
12
R337 680R3
(R)
CPU_PWRG D 8
VCC2.5V
12
LDTREST#
LDTSTOP_L 8,13
7
R398 680R3
(R)
LDTREST# 8
6
NB&SB PWRGD PCIRST#
VCC5
VCC5 V CC3_3
12
12
R3
R17
8K2R3
VCC12_RUN_PW G VCC18_RUN_PW G ASIC8M_CP U_PWRGD_5V
8K2R3
2 1
D1 1N4148W
2 1
D3 1N4148W
2 1
D5 1N4148W
SB_PWRGDis35msAfterNB_PWRGD
1N4148W
ASIC8M_CP U_PWRGD_5V
NB_PWRG D
R37 270K R3
1 2
D6
2 1
1
12
12
C14
R36220KR3
SCD47U16V3ZY
ASIC8M_CP U_PWRGD
VCC5SB
PWR Sequence controller
OFFPWRS3#23,28, 42
6
12
R38
20KR3F
3
Q9
2N3904-L1-U
2
R42
1 2
1KR3
http://hobi-elektronika.net
5
12
R4
4K7R3
12
R40
47KR3
1
G
1
12
C13
SCD1U
VCC3_3SB
12
R31
4K7R3
SB_PWRGD_1
D
2 3
S
VCC5
12
R50
4K7R3
3
Q7
2N3904-L1-U
2
VCC_CORE_PG46
VDDA2.5V_CPU
ACPI_S323
ATX_PWOK28,42,48
R414 1KR3
1 2
147
11 10
Q5
2N7002-L1
G
VLDT
U2E
SOLVC14
1
12
R413
8K2R3
VCC3_3SB
1 2
VCC5
12
R30
8K2R3
D
2 3
S
G
VCC3_3SBVCC3_3SB
U2F
147
13 12
SOLVC14
147
U1A
SOLVC14
ASIC8M_CP U_PWRGD_5V
Q6
2N7002-L1
VCC2.5V_SUS
VCC5SB
12
12
R370
R367
1KR3
4K7R3
D
Q61
1
2N7002-L1
2 3
S
5
NB_PWRG D
VCC3_3SB
147
U1B
3 4
SOLVC14
Modify 0425
VCC5
12
R354
1KR3
NB_PWRG D 13 ,16
Modify 0315
SB_PWRGD 23
U35
1
VCORE_GD
2
VLDT
3
VDDA
4
VDIMM_DUAL
5
PSON#/PSON
6
ACPI_S3
7
ATX_PWRGD/GND
8
GND
ASIC8M
VDIMM_DUAL_EN_OD
ATX_PSON#_OD/GND
4
VLDT_EN_OD
VDDA_EN_OD
VCORE_EN_OD
CPU_PWRG D_OD
RESETBTN#/VCC
4
3
VCC3_3SB
147
U48F
12
R384
8K2R3
PCIRST_SB
SOLVC14
VCC2.5V
12
12
R394
R415
8K2R3
8K2R3
R744 8K2R3
C246 SCD1U
1 2
ASIC8M_VLDT_EN 45 ASIC8M_V DDA_EN 8 ASIC8M_VCORE_EN 46 ASIC8M_VDDIO_EN 41,44
1 2
Modify 0425
PCIRST#_SB
VCC5SB
13 12
12
12
R366
R369
8K2R3
8K2R3
ASIC8M_CP U_PWRGD ASIC8M_RS T#
ATX_PSON# 48
PCIRST#_SB23
16
SB5V
15 14 13 12 11 10 9
3
These resistors loactions are
VCC3_3SB
close the branch points
147
U1C
5 6
SOLVC14
VCC3_3SB
147
U1D
9 8
SOLVC14
VCC3_3SB
147
U1E
11 10
SOLVC14
VCC3_3SB
147
U1F
13 12
SOLVC14
VCC5SB
PCIRST#_4
PCIRST#_3
PCIRST#_2
PCIRST#_1
R599 33R3
1 2
RA25 33R3
1 2
RA26 33R3
1 2
RA27 33R3
1 2
R1 33R3
1 2
RA28 33R3
1 2
R2 33R3
1 2
R95 33R3
1 2
2
PCIRST#_LAN 37
12
CA1 SC22P
(R)
PCIRST#_DVO 17
12
PCIRST#_842 32
CA2 SC22P
(R)
NB_RST# 20
PCIRST#_SIO 28
PCIRST#_BIOS 27
12
CA3 SC22P
(R)
PCIRST#_TPM 31
12
CA4 SC22P
(R)
PCIRST#_SLOT 36
6/16
<Core Design>
Titl e
PWRSequence and PCIRST#
Size DocumentNumber Rev
Custom
J361Y RS482+M1573
Date: Sheet
2
1
Wistron Incorporated
21F, 88, Hsin Tai Wu Rd Hsichih,Taipei
of
47 50Thursday, June 16, 2005
1
1A
PDF created with pdfFactory trial version www.pdffactory.com
8
7
PWR CONN
6
5
http://hobi-elektronika.net
4
3
2
1
PIN 1
D D
PIN 13
VCC12
C C
12
TC4
(R)
E100U16VM-L11-GP
B B
ATX PWR CONN
(R)
E1000U6D3V-6-GP
12
C59 SCD1U
12
TC6
SC1000P50V3KX
C32 SCD1U
1 2
12
C58
VCC-12 VCC5SB
C63 SCD1U
1 2
C287 SCD1U
1 2
PIN 12
PIN 24
ATX_PSON#47
VCC3_3VCC5
12
TC11
E1000U6D3V-6-GP
12
C31
SC1000P50V3KX
C57 SCD1U
1 2
VCC5SB
R112
12
5K1R3
VCC5
ATX_PSON#
VCC5
VCC-12 VCC3_3
CN14
MH1
13 14
15 16 17 18 19 20 21 22 23 24
FOX-CONN24F-1-U
VCC3_3VCC-12 VCC5VCC12
11 12 13 14 15 16 17 18 19
1 2
3 4 5 6 7 8 9 10 11 12
CNA2
1 2 3 4 5 6 7 8 9 1020
DAVID-CONN20B-GP
consumer
VCC12
VCC5
VCC5SB
VCC3_3
ATX_PWOK
C30 SCD1U
1 2
ATX_PWOK 28,42,47
6/13
OVERLAP with CN14
6/9
ATX_PWOK
VCC5SB
<Core Design>
Wistron Incorpor ated
21F, 88, Hsin Tai WuRd
A A
Title
Hsichih, Taipei
ATX 24Pin conn
Size Document Number Rev
A
J361Y RS482+M1 5 7 3
Date: S heet
48 50Thursday, June 16, 2005
of
1A
PDF created with pdfFactory trial version www.pdffactory.com
5
GEN315R158-8-A
4
GEN315R158-8-A
3
http://hobi-elektronika.net
GEN315R158-8-A
2
1
H7
2
3
4
D D
5
6
1 8
7
4
5
GEN315R158-8-A
H4
2
C C
3
4
5
6
1 8
7
4
5
H1
2
3
1 8
6
7
GEN315R158-8-A
H3
2
3
1 8
6
7
4
5
4
5
H5
2
3
6
7
GEN315R158-8-A
H6
2
3
6
7
1 8
4
5
GEN315R158-8-A
H2
2
3
1 8
6
7
1 8
B B
<Core Design>
Wistron Incorporated
A A
Title
21F, 88, Hsin Tai WuRd Hsichih, Taipei
Screw Hole
Size Document Number Rev
A
J361Y RS482+M1573
5
4
3
2
Date: S heet
49 50Thursday, June 16, 2005
of
1
1A
PDF created with pdfFactory trial version www.pdffactory.com
5
4
3
2
1
http://hobi-elektronika.net
U34
AMD Althon64/64FX
U46
D D
ICS951412
CPUCLK8C0
CPUCLK8T0
SRCCLKC0
SRCCLKT0 ATIGCLKC0
ATIGCLKT0
HTTCLK0
C C
SRCCLKC3 SRCCLKT3
X5
Crystal
14.318MHz
B B
X1 X2
48MHz_USB
PCICLK0
ATIGCLKC1 ATIGCLKT1
( SocketuFCBGA939 ) Processor
CLKIN_L CLKIN_H
U28
ATI NB RS482/482M(LVDS)
SB_CLKN SB_CLKP GFX_CLKN GFX_CLKP HTREFCLK
U29
South Bri dg e ULi M1573
REFCLK_N REFCLK_P USBCLK PCICLK
reserved reserved
X2
RTC Crystal
32.768KHz
X32KI X32KII
PCICLK0 PCICLK3 PCICLK4 PCICLK5 PCICLK6 PCICLK7 PCICLK8 PCICLK9
X25M1 X32M2
X4
Crystal
25MHz
U7
Ricoh­R5C842
PCICLK
XO
U5
SMSC DM1737
PCICLK
PCI1
PCI RiserSlot
CLK33_SLOT1 CLK33_SLOT2 CLK33_SLOT3
U38
BCM 4401/5705M/5788M
PCI_CLK
XTALI XTALO
U47
FLASH BIOS
CLK
X1
CrystalXI
24.576MHz
X3
Crystal
25MHz
CN32
TPM
(7 )
EXT CLK FREQUENCY SELECT TABLE(MHZ)
FS2
0 0 0 0 0 1
A A
0 1 0
0 1 1 1 0 0 1 0 1 1 1 1
FS0
5
SRCCLKFS1
CPU
[2:1]
Hi-Z
100.00
X
100.00
100.00
180.00
220.00
100.00
100.00 48.00
133.33
100.00 Normal ATHLON64 operation
200.00
HTT
Hi-Z X/3
60.00
36.56
66.66
66.66
66.66
PCI
Hi-Z X/6
30.00
73.12100.00
33.33
33.33100.00
33.33
USB
48.00
48.00
48.00
48.00
48.00
48.00
COMMENT
Reserved Reserved Reserved Reserved Reserved Reserved
4
ATIGCLK Divider Selection ATIG_Div(3:0)
001 1 TBD
3
ATIGCLK(1:0) (MHz)
100.00100 0
114.29
133.33
160.00001 0
<Core Design>
Wistron Incorporated
21F, 88, HsinTaiWu Rd
Title
CLOCK MAP
Size Document Numbe r Rev
Custom
J361Y RS 4 8 2 +M1573
Date: Sheet
2
Hsichih, Taipei
50 50Thursday, June 16, 2005
1
of
1A
PDF created with pdfFactory trial version www.pdffactory.com
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