5
4
3
2
1
CPU-LGA775
Note:
D D
Do not include the schematic
when create netlist.
Host Bus
SiS661GX
PCI Slot 1
AGP SLOT
VGA
AGP BUS
AGP BUS
/661FX
/648FX/
648C
DDR SDRAM
DIMM1
DIMM2
C C
PCI Slot 2
MuTIOL 1G
LAN PHY
PCI Slot 3
AC'97
Audio Codec
SiS964/
IDE 1
IDE 2
B B
SATAX2
KEYBOARD
/MOUSE
FAN 1
FAN 2
SPI ROM
LPC
ROM
PS/2
FAN CONTROL
SPI Bus
LPC Bus
964L
LPC Bus
LPC Super I/O
Back Panel
VOLTAGE MONITOR
TEMPERATURE MONITOR
USB 0
USB 1
USB 2
USB 3
Front Panel
USB 4
USB 5
USB 6
USB 7
A A
IR
5
4
PARALLEL
3
COM
FLOPPY
TECHNOLOGY COPR.
TECHNOLOGY COPR.
Title
Title
Title
Document Number Rev
Document Number Rev
Document Number Rev
Date: Sheet
Date: Sheet
2
Date: Sheet
Topology
Topology
Topology
661M08
661M08
661M08
TECHNOLOGY COPR.
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144Monday, August 01, 2005
of
144Monday, August 01, 2005
of
144Monday, August 01, 2005
1
A
A
A
5
4
3
2
1
Foxconn Precision Co. Inc.
661M08 Schematic
D D
Page Index
00. Index Page
01. Topology
02. Rest Map
03. Clock Distribution
04. Power Delivery Map
C C
05. LGA775-1
06. LGA775-2
07. Voltage regulator Down 10.1
08. Output CAP
09. 661FX-1 HOST & AGP
10. 661FX-2 DDR
11. 661FX Mutiol & VGA
12. 661FX Power
B B
13. 964/L-1 PCI/IDE/Link
14. 964/L-2 PC/MIL/CPU/GPIO
15. 964-3 USB/SATA
16. 964-4 Power
17. 952017/18AF Clock GEN
18. DDR Clock Buffer
19. AGP
20. VGA CON
A A
21. DIMM1 & DIMM2
22. DECOUPLE & EMI
23. Termination
24. PCI 1&2
25. PCI3
26. IDE CONN
27. USB & LAN PORT
28. SI/O_ITE8712F/JX
29. K/B & MS CONN
30. COM/PRT/GAME PORT
31. LPC/SPI BIOS_FLOPPY
32. FAN
33. 653/655 AC97 CODEC
34. AC97 I/O
35. LAN PHY AC131KML
36. Power BTN/RTC Batt
37. DDR 2.5V DDRVTT
38. Power CONN
39. SB3V, SB1.8V, VCC1.8V, VDDQ
40. TI1394(NA)
41. USB
42. Modification
43. Jumper Setting/Option Table
Fab.A
Data: 2005/06/28
FOXCONN PCEG
FOXCONN PCEG
FOXCONN PCEG
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
Index Page
Index Page
Index Page
661M08
661M08
661M08
AB
AB
AB
144Monday, August 01, 2005
144Monday, August 01, 2005
144Monday, August 01, 2005
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of
1
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5
4
3
2
1
VCCP
VCCP
Prescott
VRD10.1/VRM9.X
D D
VRMPWRGD
CPUPWRGD
CPURST_
&
PWOK
CPUPWRGD
ATX
Power
C C
PSON_
NBPWRGD
SiS648FX
SiS661FX
CPURST_
NBRST_
AGP 8X SLOT
SiS964/SiS964L
SBPWRGD
NBRST_
PCIRST_
Front Panel
PSON_
B B
RSTSW_
PWRBTN_
PWRBTN_
SIORST_
PCI Slot 1
PCI Slot 2
PCI Slot 3
IDE CONN 1
IDE CONN 2
SIORST_
Super IO
8712F/JX
SIORST_
Media
Interface
A A
TECHNOLOGY COPR.
TECHNOLOGY COPR.
Title
Title
Title
Document Number Rev
Document Number Rev
Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet
Reset Map
Reset Map
Reset Map
661M08
661M08
661M08
TECHNOLOGY COPR.
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244Monday, August 01, 2005
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A
A
A
5
14.318MHz
4
3
2
1
CPU
D D
CLOCK GENERATOR
C C
CPUCLK0
CPUCLK1
AGPCLK1
ZCLK0
AGPCLK0
100/133/200 MHz
100/133/200 MHz
66 MHz
133 MHz
66 MHz
AGP 8x
SiS648FX
/661FX
DDR CLOCK BUFFER
DIMM 1-2
DDRCLKFWDSDCLK0
33 MHz
96XPCLK
133 MHz
ZCLK1
48 MHz
UCLK48M
REFCLK
964L
SiS964/
PCICLK1-3
33 MHz
B B
PCI Slot 1-3
TXCLK
RXCLK
LAN PHY
AUDIO_CLK
32.768KHz
AC'97
24.576MHz/NC
SIO48M
48 MHz
A A
5
4
3
Super I/O
TECHNOLOGY COPR.
TECHNOLOGY COPR.
Title
Title
Title
Document Number Rev
Document Number Rev
Document Number Rev
Date: Sheet
Date: Sheet
2
Date: Sheet
Clock Distribution
Clock Distribution
Clock Distribution
661M08
661M08
661M08
TECHNOLOGY COPR.
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1
A
A
A
5
4
3
2
1
VCC3:
3.3V
>
DDR 2 DIMMS:
2.5V +/-100mv
6.00A
DDR VTT
1.25V
2A
SIS964
CLK_GEN
3.3V
>
300mA
SUPER I/O
>
VCC5_DUAL
5V
>
VCC3_DUAL
>
FWH
>
VCC1.8V
1.8V
VCCPRTCVDD
ATX
ATX SPS
+
3
5
V
D D
S
B
1
.
5
2
3
V
V
V
12V
P/S
Â+
1
1
2
2
V
V
LGA775
VCCP
1.1V~1.85V 119A
>
VCC_VID
1.2V 30mA
>
>
+12V
MIC5258
>
VRD 10.1
CORE_CPU_SYS
VCCVID
SIS648FX/ 661FX
PWRG_ATX
5V_DUAL
>
VCC3
>
C C
B B
SB5V
SB3V
AIC1086
VCC3 VCC1.8V
PWRG_ATX
AIC1084
VCC3_DUAL
>
>
VCC3
VCC5
+12V
-12V
VCC3_DUAL
VCC3:
3.3V
108mA
VCC3_DUAL
33.4mA
VCC2.5_MEM
2.5V
501.3mA
>
>
>
>
PCI PER SLOT:
3.3V 7.6A
5V 5.0A
12V 0.5A
-12V 0.1A
3.3Vaux
0.375A
VCC1.8V
1.8V
1389.5mA
VDDQ:
AGP
1.5V 35.1/21.7mA
SB1.8V
1.8V
10mA
VCCP
VCC3
SB5V
3 VOLTS
BATTERY
>
>
SB3V
2.5V
REGULATOR
REGULATOR
>
>
VCC3
VCC5_DUAL
5V_SYS
VCC3_DUAL
VCC2.5_MEM
S3AUXSW-
VCC2.5_MEM
DDR_VTT_STR
1.25V
> >
REGULATOR
VCC3
VCC3_DUAL
VCC1.8V
VCCP
>
>
>
>
OR
VCC_RTC
VCC_RTC
>
VCC5
VCC3_DUAL
>
USB POWER
>
5V
PS2 KB/MS POWER
>
5V
VCC3_DUAL
>
LAN PHY
VCC5
SB5V
VCC5_DUAL
PWRG_ATX
VCC5_DUAL
+12V
VCC3
VCC3
+12V
A A
VCC5
VCC3_DUAL
AIC1084
VDDQ 1.5V
>
>
>
>
AGP
VCC3
AUDIO
VREG
>
5
4
3
2
VCC5A
Title
Title
Title
Document Number Rev
Document Number Rev
Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
AC' 97 AUDIO CODEC
>
A5V 70mA
3.3V 10mA
>
Power Delivery Map
Power Delivery Map
Power Delivery Map
661M08
661M08
661M08
TECHNOLOGY COPR.
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444Monday, August 01, 2005
1
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A
A
A
5
2 OF 7
U33B
U33B
HDJ0
HDJ1
D D
C C
TBD
Pin D23
CRB 0.7: test point TP_VCCPLL
Pin AM5
CRB 0.7: test point TP_VID6
B B
A A
HDJ2
HDJ3
HDJ4
HDJ5
HDJ6
HDJ7
HDJ8
HDJ9
HDJ10
HDJ11
HDJ12
HDJ13
HDJ14
HDJ15
HDBIJ09
HDSTBNJ09
HDSTBPJ09
HDJ16
HDJ17
HDJ18
HDJ19
HDJ20
HDJ21
HDJ22
HDJ23
HDJ24
HDJ25
HDJ26
HDJ27
HDJ28
HDJ29
HDJ30
HDJ31
HDBIJ19
HDSTBNJ19
HDSTBPJ19
SMIJ14
A20MJ14
FERRJ14
INTR14
NMI14
IGNNEJ14
STPCLKJ14
HVCCA6
HVSSA6
HVCCIOPLL6
VID07
VID17
VID27
VID37
VID47
VID57
TP16TP16
CPUCLK017
CPUCLK-017
THERMDA32
THERMDC32
TP17TP17
TP18TP18
VCC_SENSE7
VSS_SENSE7
TP_VCCPLL
TP_VID6
TP_VCCSENSE
TP_VSSSENSE
B4
D00#
C5
D01#
A4
D02#
C6
D03#
A5
D04#
B6
D05#
B7
D06#
A7
D07#
A10
D08#
A11
D09#
B10
D10#
C11
D11#
D8
D12#
B12
D13#
C12
D14#
D11
HDBIJ0
HDBIJ1 HDBIJ3
VID0
VID1
VID2
VID3
VID4
VID5
D15#
A8
DBI0#
C8
DSTBN0#
B9
DSTBP0#
G9
D16#
F8
D17#
F9
D18#
E9
D19#
D7
D20#
E10
D21#
D10
D22#
F11
D23#
F12
D24#
D13
D25#
E13
D26#
G13
D27#
F14
D28#
G14
D29#
F15
D30#
G15
D31#
G11
DBI1#
G12
DSTBN1#
E12
DSTBP1#
CPU_Socket
CPU_Socket
P2
K3
R3
K1
L1
N2
M3
A23
B23
D23
C23
AM2
AL5
AM3
AL6
AK4
AL4
AM5
F28
G28
AE8
AL1
AK1
AN3
AN4
AN5
AN6
F29
5
2 OF 7
D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#
D41#
D42#
D43#
D44#
D45#
D46#
D47#
DBI2#
DSTBN2#
DSTBP2#
D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63#
DBI3#
DSTBN3#
DSTBP3#
3 OF 7
3 OF 7
U33C
U33C
SMI#
A20M#
FERR#/PBE#
LINT0
LINT1
IGNNE#
STPCLK#
VCCA
VSSA
RSVD5
VCCIOPLL
VID0
VID1
VID2
VID3
VID4
VID5
RSVD6
BCLK0
BCLK1
SKTOCC#
THERMDA
THERMDC
VCCSENSE
VSSSENSE
VCC_MB_REG
VSS_MB_REG
Changed pin name
Changed pin name
from RSV
from RSV
RSVD9
CPU_Socket
CPU_Socket
THERMTRIP#
BOOTSELECT
G16
E15
E16
G18
G17
F17
F18
E18
E19
F20
E21
F21
G21
E22
D22
G22
D19
G20
G19
D20
D17
A14
C15
C14
B15
C18
B16
A17
B18
C21
B21
B19
A19
A22
B22
C20
A16
C17
TESTHI00
TESTHI01
TESTHI11
TESTHI12
TESTHI02
TESTHI03
TESTHI04
TESTHI05
TESTHI06
TESTHI07
RSVD10
RSVD11
SLP#
RSVD12
PWRGOOD
PROCHOT#
COMP0
COMP1
COMP2
COMP3
RSVD13
RSVD14
RSVD15
RSVD16
RSVD17
RSVD18
RSVD19
RSVD20
RSVD21
RSVD22
RSVD23
RSVD24
LL_ID0
LL_ID1
HDJ32
HDJ33
HDJ34
HDJ35
HDJ36
HDJ37
HDJ38
HDJ39
HDJ40
HDJ41
HDJ42
HDJ43
HDJ44
HDJ45
HDJ46
HDJ47
HDBIJ2
HDJ48
HDJ49
HDJ50
HDJ51
HDJ52
HDJ53
HDJ54
HDJ55
HDJ56
HDJ57
HDJ58
HDJ59
HDJ60
HDJ61
HDJ62
HDJ63
TBD
Pin AL2 PROCHOT#
CRB 0.7: pull up to VTT_OUT_RIGHT
DG/611A: example VR thermal monitor circuit
TESTHI_0
F26
TESTHI_1
W3
TESTHI_11
P1
TESTHI_12
W2
F25
G25
G27
G26
G24
F24
AK6
G6
L2
AH2
N1
AL2
M2
A13
T1
G2
R1
N5
AE6
C9
G10
D16
A20
E23
E24
F23
H2
J2
J3
Y1
V2
AA2
4
HDJ[63..0]
HDBIJ2 9
HDSTBNJ2 9
HDSTBPJ2 9
HDBIJ3 9
HDSTBNJ3 9
HDSTBPJ3 9
TESTHI_0 6
TBD
Pin AK6, G6
refer to CRB 0.7
TESTHI_2_7
RSVD_AK6
RSVD_G6
CPUSLPJ 14
CPU_PWRG 14
PROCHOTJ 14
THERMTRIPJ 14
HCOMP0
HCOMP1
HCOMP2
HCOMP3
TBD
Pin N5 ~ Pin J3
CRB 0.7: connections ok?
TP_RSVD_CPU_N5
TP_RSVD_CPU_AE6
TP_RSVD_CPU_C9
TP_RSVD_CPU_G10
TP_RSVD_CPU_D16
TP_RSVD_CPU_A20
CPU_BOOT
LL_ID0
TP_LL_ID1
4
TP22TP22
TP23TP23
TP24TP24
TP25TP25
LL_ID0
HDJ[63..0] 9
HAJ[31..3]9
FSB_VTT
VTT_OUT_LEFT
VTT_OUT_RIGHT
HREQJ[4..0]9
HAJ[31..3]
R817 62 DummyR817 62 Dummy
R818 62R818 62
RN80
RN80
1
*
*
3
5
7 8
R825 62R825 62
R826 62R826 62
R827 100R827 100
R828 62R828 62
R829 62R829 62
R830 62 DUMMYR830 62 DUMMY
R831 62R831 62
R837 680
R837 680
RN81
RN81
6
4
2
680
680
R841 680
R841 680
+/-5%
+/-5%
R842
R842
HAJ[31..3]9
8P4R0603
8P4R0603
*
*
+/-5%
+/-5%
*
*
+/-5%
+/-5%
*
*
3
HAJ[31..3]
U33A
L5
A03#
P6
A04#
M5
A05#
L4
A06#
M4
A07#
R4
A08#
T5
A09#
U6
A10#
T4
A11#
U5
A12#
U4
A13#
V5
A14#
V4
A15#
W5
A16#
N4
RSVD1
P5
RSVD2
K4
REQ0#
J5
REQ1#
M6
REQ2#
K6
REQ3#
J6
REQ4#
R6
ADSTB0#
G5
PCREQ#
AB6
A17#
W6
A18#
Y6
A19#
Y4
A20#
AA4
A21#
AD6
A22#
AA5
A23#
AB5
A24#
AC5
A25#
AB4
A26#
AF5
A27#
AF4
A28#
AG6
A29#
AG4
A30#
AG5
A31#
AH4
A32#
AH5
A33#
AJ5
A34#
AJ6
A35#
AC4
RSVD3
AE4
RSVD4
AD5
ADSTB1#
CPU_Socket
CPU_Socket
FSB_VTT
U33A
DEFER#
EDRDY#
MCERR#
TESTHI08
TESTHI09
TESTHI10
GTLREF
RESET#
VTT_OUT_LEFT
VTT_OUT_RIGHT
INTEL THERMTRIPJ, FERRJ PULL HIGH FSB_VTT
R832 56R832 56
R833 56R833 56
R834 56R834 56
R835 56R835 56
R836 56R836 56
R838 56R838 56
R839 56R839 56
R840 56R840 56
NEAR CPU
HAJ3
HAJ4
HAJ5
HAJ6
HAJ7
HAJ8
HAJ9
HAJ10
HAJ11
HAJ12
HAJ13
HAJ14
HAJ15
HAJ16
HREQJ0
HREQJ1
HREQJ2
HREQJ3
HADSTBJ09
HAJ17
HAJ18
HAJ19
HAJ20
HAJ21
HAJ22
HAJ23
HAJ24
HAJ25
HAJ26
HAJ27
HAJ28
HAJ29
HAJ30
HAJ31
TP11TP11
TP12TP12
TP13TP13
TP14TP14
HADSTBJ19
62
62
2
4
6
78
5
3
*
*
1
+/-5%
+/-5%
Dummy
Dummy
3
HREQJ4
TP_LAG775_PIN_AH4
TP_LAG775_PIN_AH5
TP_LAG775_PIN_AJ5
TP_LAG775_PIN_AJ6
TESTHI_0
TESTHI_2_7
TESTHI_9
TESTHI_8
TESTHI_10
TESTHI_1
TESTHI_11
TESTHI_12
CPU_PWRG
HCPURSTJ
HBR0J
RSVD_G6
CPU_BOOT
VID0
VID3
VID2
VID4
VID1
VID5
RSVD_AK6
ADS#
BNR#
HIT#
RSP#
BPRI#
DBSY#
DRDY#
HITM#
IERR#
INIT#
LOCK#
TRDY#
BINIT#
AP0#
AP1#
BR0#
DP0#
DP1#
DP2#
DP3#
RS0#
RS1#
RS2#
1 OF 7
1 OF 7
2
D2
C2
D4
H4
G8
B2
C1
E4
AB2
P3
C3
E3
AD3
G7
F2
AB3
U2
U3
F3
G3
G4
H5
J16
H15
H16
J17
H1
G23
B3
F5
A3
10 mils width
7 mils spacing
R815 100R815 100
R816 100R816 100
R819 60.4R819 60.4
R820 60.4R820 60.4
10 mils width
7 mils spacing
R821 62R821 62
R822 62R822 62
R823 130R823 130
R824 62R824 62
A20MJ
STPCLKJ
CPUSLPJ
SMIJ
INITJ
IGNNEJ
INTR
NMI
2
1
HADSJ 9
HBNRJ 9
TP_RSPJ
HIERRJ
TP_BINITJ
TP_EDRDYJ
TP_MCERRJ
TP_APJ0
TP_APJ1
HBR0J
TESTHI_8
TESTHI_9
TESTHI_10
TP_DPJ0
TP_DPJ1
TP_DPJ2
TP_DPJ3
HGTLREF
Title
Title
Title
Document Number Rev
Document Number Rev
Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
HITJ 9
TP1TP1
HBPRIJ 9
HDBSYJ 9
HDRDYJ 9
HITMJ 9
INITJ 14
HLOCKJ 9
HTRDYJ 9
HDEFERJ 9
TP3TP3
TP4TP4
TP5TP5
TP6TP6
HBR0J 9
HCPURSTJ 9
HRSJ0 9
HRSJ1 9
HRSJ2 9
TBD
HCOMP2
HCOMP3
HCOMP0
HCOMP1
HIERRJ
THERMTRIPJ
PROCHOTJ
FERRJ
VTT_OUT_LEFT
*
*
TP2TP2
GTLREF voltage should be 0.67*FSB_VTT
12 mils width, 15 mils spacing
divider should be within 1.5" of the GTLREF pin
caps should be placed near CPU pin
VTT_OUT_RIGHT
*
BC938
BC938
*
*
1uF
1uF
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
C0603
C0603
Place at CPU end of route
HBR0J
CRB 0.7: 220 ohm, 5%
DG 0.51: 62 ohm, 5%
VTT_OUT_RIGHT
FSB_VTT
BC6
BC6
0.1uF
0.1uF
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
C0603
C0603
Clock Distribution
Clock Distribution
Clock Distribution
661M08
661M08
661M08
*
*
*
*
*
*
*
BC939
BC939
220pF
220pF
50V, X7R, +/-10%
50V, X7R, +/-10%
C0603
C0603
HCPURSTJ
BC4
BC4
0.1uF
0.1uF
*
*
C0603
C0603
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
BC8
BC8
0.1uF
0.1uF
*
*
C0603
C0603
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
TECHNOLOGY COPR.
TECHNOLOGY COPR.
TECHNOLOGY COPR.
544Monday, August 01, 2005
544Monday, August 01, 2005
544Monday, August 01, 2005
1
R813
R813
100
100
+/-1%
+/-1%
R0603
R0603
R814
R814
210
210
+/-1%
+/-1%
R0603
R0603
BC5
BC5
0.1uF
0.1uF
C0603
C0603
BC7
BC7
1uF
1uF
C0805
C0805
16V, X7R, +/-10%
16V, X7R, +/-10%
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
BC940
BC940
22pF
22pF
*
*
C0603
C0603
A
A
of
of
of
A
5
4
3
2
1
VCCP VCCP
D D
C C
B B
A A
U33E
AG22
K29
AM26
AL8
AE12
AE11
W23
W24
W25
T25
Y28
AL18
AC25
W30
Y30
AN14
AD28
Y26
AC29
M29
U24
J23
AC27
AM18
AM19
AB8
AC26
J8
J28
T30
AM9
AF15
AC8
AE14
N23
W29
U29
AC24
AC23
Y23
AN26
AN25
AN11
AN18
Y27
Y25
AD24
AE23
AE22
AN19
V8
K8
AE21
AM30
AE19
AC30
AE15
M30
K27
M24
AN21
T8
AC28
N25
AE18
W26
AD25
M8
N30
AD26
AJ26
AM29
M25
M26
L8
U25
Y8
AJ12
AD27
U23
M23
AG29
N27
AM22
U28
K28
U8
AK18
AD8
K24
AH28
AH21
CPU_Socket
CPU_Socket
U33E
VCCP1
VCCP2
VCCP3
VCCP4
VCCP5
VCCP6
VCCP7
VCCP8
VCCP9
VCCP10
VCCP11
VCCP12
VCCP13
VCCP14
VCCP15
VCCP16
VCCP17
VCCP18
VCCP19
VCCP20
VCCP21
VCCP22
VCCP23
VCCP24
VCCP25
VCCP26
VCCP27
VCCP28
VCCP29
VCCP30
VCCP31
VCCP32
VCCP33
VCCP34
VCCP35
VCCP36
VCCP37
VCCP38
VCCP39
VCCP40
VCCP41
VCCP42
VCCP43
VCCP44
VCCP45
VCCP46
VCCP47
VCCP48
VCCP49
VCCP50
VCCP51
VCCP52
VCCP53
VCCP54
VCCP55
VCCP56
VCCP57
VCCP58
VCCP59
VCCP60
VCCP61
VCCP62
VCCP63
VCCP64
VCCP65
VCCP66
VCCP67
VCCP68
VCCP69
VCCP70
VCCP71
VCCP72
VCCP73
VCCP74
VCCP75
VCCP76
VCCP77
VCCP78
VCCP79
VCCP80
VCCP81
VCCP82
VCCP83
VCCP84
VCCP85
VCCP86
VCCP87
VCCP88
VCCP89
VCCP90
VCCP91
VCCP92
5 OF 7
5 OF 7
VCCP93
VCCP94
VCCP95
VCCP96
VCCP97
VCCP98
VCCP99
VCCP100
VCCP101
VCCP102
VCCP103
VCCP104
VCCP105
VCCP106
VCCP107
VCCP108
VCCP109
VCCP110
VCCP111
VCCP112
VCCP113
VCCP114
VCCP115
VCCP116
VCCP117
VCCP118
VCCP119
VCCP120
VCCP121
VCCP122
VCCP123
VCCP124
VCCP125
VCCP126
VCCP127
VCCP128
VCCP129
VCCP130
VCCP131
VCCP132
VCCP133
VCCP134
VCCP135
VCCP136
VCCP137
VCCP138
VCCP139
VCCP140
VCCP141
VCCP142
VCCP143
VCCP144
VCCP145
VCCP146
VCCP147
VCCP148
VCCP149
VCCP150
VCCP151
VCCP152
VCCP153
VCCP154
VCCP155
VCCP156
VCCP157
VCCP158
VCCP159
VCCP160
VCCP161
VCCP162
VCCP163
VCCP164
VCCP165
VCCP166
VCCP167
VCCP168
VCCP169
VCCP170
VCCP171
VCCP172
VCCP173
VCCP174
VCCP175
VCCP176
VCCP177
VCCP178
VCCP179
VCCP180
VCCP181
VCCP182
VCCP183
VCCP184
AK12
AH22
T29
AM14
AM25
AE9
Y29
AK25
AK19
AG15
J22
T24
AG21
AM21
J25
U30
AL21
AG25
AJ18
J19
AH30
J15
AG12
AJ22
J20
AH18
AH26
W27
AL25
AN8
AH14
U27
T23
R8
AK22
AN29
AG11
AK26
J10
AJ15
AG26
AN9
AH15
AF18
AL15
J26
J18
J21
AG27
AK15
AF11
AD23
AM15
AF8
AK21
AG30
AJ21
AM11
AL11
AJ11
K30
AL14
AN30
AH25
AL12
AJ9
AK11
AG14
N29
AL30
AJ25
AH9
J29
J11
K25
P8
K23
AL19
AM8
T26
N28
AH12
AL22
AN15
AJ8
U26
AJ19
T27
AK8
AN12
AG9
N26
VCCP
VCC3
FSB_VTT
BSEL117 BSEL0 17
5
FSBSEL0
R341
R341
470
470
+/-5%
+/-5%
R0603
R0603
*
*
R338
R338
220
220
+/-5%
+/-5%
R0603
R0603
R271
R271
*
*
1K
1K
+/-5%
+/-5%
R0603
R0603
Q34
Q34
B
MMBT3904
MMBT3904
E C
R272
R272
*
*
2.7K
2.7K
+/-5%
+/-5%
R0603
R0603
R942
R942
Q35
Q35
4.7K
4.7K
B
MMBT3904
MMBT3904
+/-5%
+/-5%
*
*
R0603
R0603
E C
AF9
AF22
AH11
AJ14
AH19
AH29
AH27
AG28
AL26
AM12
J24
J13
T28
W28
J12
J27
AG19
AL9
AD30
AF21
Y24
AK14
J9
M27
AF14
J30
AG18
AA8
AG8
AL29
AD29
W8
AH8
N24
AN22
J14
K26
AF19
N8
AF12
M28
AK9
C10
D12
AM7
C24
K2
C22
AN1
B14
K7
AE16
B11
AL10
AK23
H12
AF7
AK7
H7
E14
L28
Y5
E11
AL16
AL24
AK13
AL3
D21
AL20
D18
AN2
AK16
AK20
AM27
AM1
AL13
AL17
C19
E28
AH7
AK30
D24
CPU_Socket
CPU_Socket
U33F
U33F
VCCP185
VCCP186
VCCP187
VCCP188
VCCP189
VCCP190
VCCP191
VCCP192
VCCP193
VCCP194
VCCP195
VCCP196
VCCP197
VCCP198
VCCP199
VCCP200
VCCP201
VCCP202
VCCP203
VCCP204
VCCP205
VCCP206
VCCP207
VCCP208
VCCP209
VCCP210
VCCP211
VCCP212
VCCP213
VCCP214
VCCP215
VCCP216
VCCP217
VCCP218
VCCP219
VCCP220
VCCP221
VCCP222
VCCP223
VCCP224
VCCP225
VCCP226
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
U33G
6 OF 7
6 OF 7
AL23
VSS41
A12
VSS42
L25
VSS43
J7
VSS44
AE28
VSS45
AE29
VSS46
K5
VSS47
J4
VSS48
AE30
VSS49
AN20
VSS50
AF10
VSS51
AE24
VSS52
AM24
VSS53
AN23
VSS54
H9
VSS55
H8
VSS56
H13
VSS57
AC6
VSS58
AC7
VSS59
AH6
VSS60
C16
VSS61
AM16
VSS62
AE25
VSS63
AE27
VSS64
AJ28
VSS65
AJ7
VSS66
F19
VSS67
AH13
VSS68
AD7
VSS69
AH16
VSS70
AK17
VSS71
E17
VSS72
AH17
VSS73
AH20
VSS74
AE5
VSS75
AH23
VSS76
AE7
VSS77
AM13
VSS78
AH24
VSS79
AJ30
VSS80
AJ10
VSS81
AF3
VSS82
AK5
VSS83
AJ16
VSS84
AF6
VSS85
AK29
VSS86
AJ17
VSS87
F22
VSS88
AH3
VSS89
AK10
VSS90
AM10
VSS91
F16
VSS92
AJ23
VSS93
F13
VSS94
AG7
VSS95
F10
VSS96
L26
VSS97
AD4
VSS98
H11
VSS99
L24
VSS100
L23
VSS101
AM23
VSS102
A15
VSS103
AH10
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
ICH_SYS_RSTJ
NBRST-11,13
FSBSEL0
FSBSEL1
4
H29
B24
L3
H27
A21
AE2
AJ29
A24
AK27
AK28
B20
AM20
H26
B17
H25
H24
AA3
AA7
H23
AA6
H10
HTCK
HTDI
HTDO
HTMS
HTRSTJ
HBPM0J
HBPM1J
HBPM2J
HBPM3J
HBPM4J
HBPM5J
R931
R931
1K
1K
+/-1%
+/-1%
R0603
R0603
DUMMY
DUMMY
GTLREF_SEL
AE1
AD1
AF1
AC1
AG1
AJ2
AJ1
AD2
AG2
AF2
AG3
AC2
AK3
AJ3
G29
H30
G30
U33D
U33D
TCK
TDI
TDO
TMS
TRST#
BPM0#
BPM1#
BPM2#
BPM3#
BPM4#
BPM5#
DBR#
ITPCLKOUT0
ITPCLKOUT1
BSEL0
BSEL1
BSEL2
CPU_Socket
CPU_Socket
GTLREF_SEL 9
4 OF 7
4 OF 7
VTT1
VTT2
VTT3
VTT4
VTT5
VTT6
VTT7
VTT8
VTT9
VTT10
VTT11
VTT12
VTT13
VTT14
VTT15
VTT16
VTT17
VTT18
VTT19
VTT20
VTT21
VTT22
VTT23
VTT24
VTTPWRGD
VTT_OUT1
VTT_OUT2
VTT_SEL
A29
B25
B29
B30
C29
A26
B27
C28
A25
A28
A27
C30
A30
C25
C26
C27
B26
D27
D28
D25
D26
B28
D29
D30
AM6
AA1
J1
F27
U33G
H22
VSS126
H21
VSS127
H20
VSS128
H19
VSS129
H18
VSS130
AB7
VSS131
H17
VSS132
AJ24
VSS133
AM17
VSS134
AC3
VSS135
H14
VSS136
P28
VSS137
V6
VSS138
AK2
VSS139
P27
VSS140
P26
VSS141
AM28
VSS142
AJ13
VSS143
W4
VSS144
P25
VSS145
AJ20
VSS146
W7
VSS147
P23
VSS148
AG13
VSS149
AG16
VSS150
AG17
VSS151
C7
VSS152
Y2
VSS153
L30
VSS154
L29
VSS155
D15
VSS156
AL27
VSS157
Y7
VSS158
L27
VSS159
AA29
VSS160
N6
VSS161
N7
VSS162
AA28
VSS163
AN13
VSS164
AA27
VSS165
AA26
VSS166
P4
VSS167
AA25
VSS168
AA24
VSS169
P7
VSS170
E26
VSS171
V30
VSS172
R2
VSS173
V29
VSS174
V28
VSS175
R5
VSS176
V27
VSS177
R7
VSS178
E20
VSS179
AN10
VSS180
V25
VSS181
T3
VSS182
V24
VSS183
V23
VSS184
T6
VSS185
AL7
VSS186
E25
VSS187
U1
VSS188
R29
VSS189
R28
VSS190
R27
VSS191
R26
VSS192
R25
VSS193
U7
VSS194
R24
VSS195
R23
VSS196
P30
VSS197
V3
VSS198
P29
VSS199
AF16
VSS200
AE10
VSS201
AF13
VSS202
H6
VSS203
A18
VSS204
A2
VSS205
E2
VSS206
D9
VSS207
C4
VSS208
A6
VSS209
D6
VSS210
CPU_Socket
CPU_Socket
FSB_VTT
VTT_OUT_RIGHT
VTT_OUT_LEFT
R859 DummyR859 Dummy
1 2
7 OF 7
7 OF 7
VSS211
VSS212
VSS213
VSS214
VSS215
VSS216
VSS217
VSS218
VSS219
VSS220
VSS221
VSS222
VSS223
VSS224
VSS225
VSS226
VSS227
VSS228
VSS229
VSS230
VSS231
VSS232
VSS233
VSS234
VSS235
VSS236
VSS237
VSS238
VSS239
VSS240
VSS241
VSS242
VSS243
VSS244
VSS245
VSS246
VSS247
VSS248
VSS249
VSS250
VSS251
VSS252
VSS253
VSS254
VSS255
VSS256
VSS257
VSS258
VSS259
VSS260
VSS261
VSS262
VSS263
VSS264
VSS265
VSS266
VSS267
VSS268
VSS269
VSS270
VSS271
VSS272
VSS273
VSS274
VSS275
VSS276
RSVD25
RSVD26
RSVD27
RSVD28
RSVD29
RSVD30
RSVD31
RSVD32
RSVD33
RSVD34
RSVD35
RSVD36
GTLREF_SEL
VTT_PWRGD 38
3
D5
A9
D3
B1
B5
B8
AJ4
AE26
AH1
E29
V7
C13
AK24
AB30
L6
L7
AB29
M1
AB28
E8
AG20
AN17
AB27
AB26
AN16
M7
AB25
AB24
AB23
N3
AA30
F4
AG10
AE13
AF30
H28
F7
AF29
AF28
G1
AF27
AF26
AF25
AN28
AN27
AF24
AF23
AG24
AF17
AN24
H3
AN7
P24
AE20
AE17
E27
T7
R30
AJ27
AB1
AM4
V26
AA23
AL28
AF20
AG23
V1
F6
T2
Y3
AE3
W1
E7
B13
D14
E6
D1
E5
TESTHI_05
VTT_OUT_RIGHT
VTT_OUT_LEFT
VCC3
+12V
*
*
TESTHI_0
BC960
0.1uF
BC960
0.1uF
Place at CPU end of route
R855
R855
10K
10K
+/-5%
+/-5%
R0603
R0603
G
note: 7/6-change termination 49.9 to RN702 47
VTT_OUT_RIGHT
R843 62
R843 62
R844 62
R844 62
R845 62
R845 62
R846 62
R846 62
R847 62
R847 62
R848 62
R848 62
Intel Pull High RES 49.9Ohm.
VTT_OUT_RIGHT
R849 49.9
R849 49.9
R850 49.9
R850 49.9
R851 49.9
R851 49.9
R852 49.9
R852 49.9
R853 49.9
R853 49.9
FSB_VTT
12
L12
L12
L0805 10uH
L0805 10uH
0805
0805
+/-10%
+/-10%
HVCCIOPLL
HVCCIOPLL5
?
VCC3
R856
R856
*
*
249
249
+/-1%
+/-1%
R0603
R0603
DS
Q95
Q95
2N7002
2N7002
R857
R857
*
*
110
110
+/-1%
+/-1%
R0603
R0603
*
*
R858
R858
62
62
+/-5%
+/-5%
R0603
R0603
2
HVCCA5
HVSSA5
BC959
BC959
1uF
1uF
*
*
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
C0603
C0603
HVCCA
HVSSA
VTT_OUT_RIGHT
*
*
BC1025
BC1025
1uF
1uF
*
*
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
C0603
C0603
Place BPM termination near CPU
HBPM5J
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
PLL Supply Filter
R854
R854
0
0
+/-5%
+/-5%
R0603
R0603
HBPM4J
HBPM3J
HBPM2J
HBPM1J
HBPM0J
HTDO
HTMS
HTDI
HTCK
HTRSTJ
12
125mA125mA
L13
L13
L0805 10uH
L0805 10uH
0805
0805
+/-10%
+/-10%
Notes:
1. Cap. should be within 600 mils of the VCCA and VSSA pins
2. VCCA route should be parallel and next to VSSA route
3. Min. 12 mils trace from the filter to the processor pins
4. The inductors should be close to the cap.
EC98
EC98
33uF
33uF
*
*
16V, +/-20%
16V, +/-20%
CE20D50H110
CE20D50H110
ESL <= 5 nH, ESR < 0.3 ohm
FOXCONN PCEG
FOXCONN PCEG
Title
Title
Title
LGA775 -2
LGA775 -2
LGA775 -2
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
FOXCONN PCEG
661M08
661M08
661M08
1
A
A
A
of
of
of
644Monday, August 01, 2005
644Monday, August 01, 2005
644Monday, August 01, 2005
5
D D
VRM_EN
VRM_EN8
VID_OUT0
VID05
VID_OUT1
VID15
VID_OUT2
VID25
VID_OUT3
VID35
VID_OUT4
VID45
VID_OUT5
VID55
C C
Select pull high
voltage by chipset
VRMPWRGD17,38
12V_VRM
Place close to MOSFET
*
*
RT2
RT2
T
T
100K
100K
+/-1%
+/-1%
R0603
R0603
Dummy
B B
A A
Dummy
50V, NPO, +/-5%
50V, NPO, +/-5%
7/20
7/20
R960
R960
8.2K
8.2K
+/-5%
+/-5%
R0603
R0603
R963
R963
8.2K
8.2K
+/-5%
+/-5%
R0603
R0603
Dummy
Dummy
R965
R965
+/-5%
+/-5%
R0603
R0603
BC1045
BC1045
47pF
47pF
C0603
C0603
7/20
*
*
0
0
*
*
R955
R0603
R955
R0603
Dummy
Dummy
100K
+/-1%
100K
+/-1%
BC1033
C0603
BC1033
C0603
Dummy
Dummy
10nF 25V, X7R, +/-10%
10nF 25V, X7R, +/-10%
*
*
R9520R0603
R9520R0603
Reserved
Reserved
+/-5%
+/-5%
BC1034
C0603
BC1034
C0603
Dummy
Dummy
10nF 25V, X7R, +/-10%
10nF 25V, X7R, +/-10%
*
*
R954 127K
R954 127K
R0603+/-1%
R0603+/-1%
R959
R0603
R959
R0603
150K
+/-1%
150K
+/-1%
R964
R0603
R964
R0603
5.1K
5.1K
50V, X7R, +/-10%
50V, X7R, +/-10%
C0603
C0603
18K
18K
+/-1% R967
+/-1%
R0603
R0603
VCCP
+/-5%
+/-5%
*
*
BC1044470pF
BC1044470pF
R967
BC1047
BC1047
4.7nF
4.7nF
*
*
50V, X7R, +/-10%
50V, X7R, +/-10%
C0603
C0603
4
Preliminary OVP Protection
R943
R943
10
10
+/-5%
+/-5%
R0805
R0805
BC1
BC1
1uF
1uF
*
*
16V, X7R, +/-10%
16V, X7R, +/-10%
C0805
C0805
U40
U40
5
4
35
OUTEN
VID0
VID1
VID2
VID3
VID4
VID5
VID_SEL
OVP
TC
CS_SEL
OFFSET
OSC/FAULT
SGND
SS_END
VSEN
FB
COMP
FBR
11
SGND
BC1049
BC1049
0.1uF
0.1uF
C0603
C0603
VCC
12
*
*
L6711TR
L6711TR
FBG
R973
R973
0
0
R0603
R0603
+/-5%
+/-5%
Dummy
Dummy
13
24
25
26
27
28
23
29
20
21
22
31
30
10
9
6
8
7
R971
R971
0
0
R0603
R0603
+/-5%
+/-5%
Dummy
Dummy
*
*
PGND3
VSS_SENSE 5VCC_SENSE5
optional
BC2
BC2
1uF
1uF
16V, X7R, +/-10%
16V, X7R, +/-10%
C0805
C0805
38
39
PGND2
VCCDR3
R944
R944
0
0
+/-5%
+/-5%
R0805
R0805
41
3
PGND1
VCCDR2
NC37
NC484849
37
3
BC3
BC3
1uF
1uF
16V, X7R, +/-10%
16V, X7R, +/-10%
C0805
C0805
*
*
1
BOOT1
VCCDR1
UGATE1
PHASE1
LGATE1
CS1+
BOOT2
UGATE2
PHASE2
LGATE2
CS2+
BOOT3
UGATE3
PHASE3
LGATE3
CS3+
49
D43
D43
BAT54C
BAT54C
CS1-
CS2-
CS3-
2
1
45
46
47
2
14
15
44
43
42
40
16
17
34
33
32
36
18
19
BC1029
BC1029
1uF
1uF
*
*
16V, X7R, +/-10%
16V, X7R, +/-10%
C0805
C0805
D44
D44
1N4148W
1N4148W
VBOOT
2 1
BC10360.1uF
BC10360.1uF
25V, Y5V, +80%/-20%C0603
25V, Y5V, +80%/-20%C0603
*
*
R946 2.2
R946 2.2
R0805 +/-5%
R0805 +/-5%
R947 2.2
R947 2.2
R0805 +/-5%
R0805 +/-5%
R950 3K +/-1%R950 3K +/-1%
D45
D45
1N4148W
1N4148W
2 1
BC10350.1uF
BC10350.1uF
25V, Y5V, +80%/-20%C0603
25V, Y5V, +80%/-20%C0603
*
*
R953 2.2
R953 2.2
R0805 +/-5%
R0805 +/-5%
R957 2.2
R957 2.2
R0805 +/-5%
R0805 +/-5%
R961 3K +/-1%R961 3K +/-1%
D46
D46
1N4148W
1N4148W
VBOOT
2 1
BC10420.1uF
BC10420.1uF
25V, Y5V, +80%/-20%C0603
25V, Y5V, +80%/-20%C0603
*
*
R966 2.2
R966 2.2
R0805 +/-5%
R0805 +/-5%
R969 2.2
R969 2.2
R0805 +/-5%
R0805 +/-5%
R972 3K R0603+/-1%R972 3K R0603+/-1%
JS1 SHORTJS1 SHORT
3
12V_VRM
SB5V
12V_VRM
R945
R945
2.2
2.2
R0805
R0805
+/-5%
+/-5%
phase1
R951 1.2K
R951 1.2K
1 2
VBOOT
R962 1.2K
R962 1.2K
1 2
R974
R974
1 2
+/-1%
+/-1%
r0805h6
r0805h6
12
12V_VIN
12V_VIN 8
DS
Q109
Q109
G
AOD452L
AOD452L
DS
DS
Q110
Q110
Q111
G
AOD456L
AOD456L
12V_VIN 8
Q108
Q108
AOD452L
AOD452L
Q112
Q112
G
AOD456L
AOD456L
12V_VIN 8
Q114
Q114
AOD452L
AOD452L
Q115
Q115
G
AOD456L
AOD456L
HS1
HS1
MOSFET Heatsink
MOSFET Heatsink
PHC539C01012
PHC539C01012
mosfet_hsh180
mosfet_hsh180
Dummy
Dummy
AOD456L
AOD456L
DS
AOD456L
AOD456L
DS
AOD456L
AOD456L
Q111
Q113
Q113
Q116
Q116
G
12V_VIN
+/-1%
+/-1%
DS
G
phase2
DS
G
12V_VIN
+/-1%
+/-1%
r0805h6
r0805h6
DS
G
phase3
DS
G
1.2K
1.2K
Note: Put on Power
Mosfet surface.
R948
R948
2.2
2.2
R0805
R0805
+/-5%
+/-5%
BC1032
BC1032
1.5nF
1.5nF
*
*
50V, X7R, +/-10%
50V, X7R, +/-10%
C0603
C0603
R956
R956
2.2
2.2
R0805
R0805
+/-5%
+/-5%
BC1040
BC1040
1.5nF
1.5nF
*
*
50V, X7R, +/-10%
50V, X7R, +/-10%
C0603
C0603
R968
R968
2.2
2.2
R0805
R0805
+/-5%
+/-5%
BC1048
BC1048
1.5nF
1.5nF
*
*
50V, X7R, +/-10%
50V, X7R, +/-10%
C0603
C0603
BC1030
BC1030
4.7uF
4.7uF
*
*
16V, Y5V, +80%/-20%
16V, Y5V, +80%/-20%
C1206
C1206
R949 1.8K
R949 1.8K
R0603+/-1%
R0603+/-1%
BC1038
BC1038
4.7uF
4.7uF
*
*
16V, Y5V, +80%/-20%
16V, Y5V, +80%/-20%
C1206
C1206
R958 1.8K
R958 1.8K
R0603+/-1%
R0603+/-1%
BC1043
BC1043
4.7uF
4.7uF
*
*
16V, Y5V, +80%/-20%
16V, Y5V, +80%/-20%
C1206
C1206
R970
R970
1.8K
1.8K
R0603+/-1%
R0603+/-1%
L14
L14
*
*
0.6uH
0.6uH
BC1031 0.33uF
BC1031 0.33uF
16V, X7R, +/-10%
16V, X7R, +/-10%
L15
L15
*
*
0.6uH
0.6uH
BC1039 0.33uF
BC1039 0.33uF
16V, X7R, +/-10%
16V, X7R, +/-10%
L16
L16
*
*
0.6uH
0.6uH
BC1046 0.33uF
BC1046 0.33uF
16V, X7R, +/-10%
16V, X7R, +/-10%
2
0.33uF
0.33uF
C0805
C0805
Dummy
Dummy
0.33uF
0.33uF
C0805
C0805
Dummy
Dummy
0.33uF
0.33uF
C0805
C0805
Dummy
Dummy
16V, X7R, +/-10%C0805
16V, X7R, +/-10%C0805
*
*
BC1037
BC1037
16V, X7R, +/-10%C0805
16V, X7R, +/-10%C0805
*
*
BC1041
BC1041
16V, X7R, +/-10%C0805
16V, X7R, +/-10%C0805
*
*
BC1050
BC1050
1
*
*
VCCP
*
*
*
*
TECHNOLOGY COPR.
TECHNOLOGY COPR.
Title
Title
Title
Document Number Rev
Document Number Rev
Document Number Rev
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet
VRD
VRD
VRD
661M08
661M08
661M08
1
TECHNOLOGY COPR.
of
744Monday, August 01, 2005
744Monday, August 01, 2005
744Monday, August 01, 2005
A
A
A
5
4
PWM Controller Enable schematics
3
2
1
D D
VTT_OUT_RIGHT
R88
R88
R92
R92
BC1067
22.1K
22.1K
+/-1%
+/-1%
R0603
R0603
Dummy
Dummy
BC1067
*
*
1uF
1uF
16V, X5R, +/-10%
16V, X5R, +/-10%
C0603
C0603
Dummy
Dummy
4.7K
4.7K
R0603
R0603
+/-5%
+/-5%
Dummy
Dummy
C C
SB5V
R91
R91
10K
10K
+/-5%
+/-5%
R0603
R0603
Dummy
Dummy
Q24
Q24
B
MMBT3904
MMBT3904
SOT23_BEC
SOT23_BEC
E C
Dummy
Dummy
G
12V_VRM
R90
R90
10K
10K
+/-5%
+/-5%
R0603
R0603
DS
Dummy
Dummy
Q23
Q23
2N7002
2N7002
Dummy
Dummy
R89
R89
4.7K
4.7K
+/-5%
+/-5%
R0603
R0603
Dummy
Dummy
VRM_EN
BC1066
BC1066
1nF
1nF
*
*
50V, X7R, +/-10%
50V, X7R, +/-10%
C0603
C0603
Dummy
Dummy
VRM_EN 7
BC1059
BC1059
22uF
22uF
*
*
6.3V, X5R, +/-10%
6.3V, X5R, +/-10%
C1206
C1206
Dummy
Dummy
BC1060
BC1060
22uF
22uF
*
*
6.3V, X5R, +/-10%
6.3V, X5R, +/-10%
C1206
C1206
Dummy
Dummy
VRM Output MLCC
VCCP
BC1061
BC1061
22uF
22uF
*
*
6.3V, X5R, +/-10%
6.3V, X5R, +/-10%
C1206
C1206
Dummy
Dummy
place in socket
VCCP
BC1062
BC1062
22uF
22uF
*
*
6.3V, X5R, +/-10%
6.3V, X5R, +/-10%
C1206
C1206
Dummy
Dummy
EC4
EC4
560uF
560uF
*
*
4V, +/-20%
4V, +/-20%
CE35D80H90
CE35D80H90
Dummy
Dummy
BC1063
BC1063
22uF
22uF
*
*
6.3V, X5R, +/-10%
6.3V, X5R, +/-10%
C1206
C1206
Dummy
Dummy
EC5
EC5
560uF
560uF
*
*
4V, +/-20%
4V, +/-20%
CE35D80H90
CE35D80H90
Dummy
Dummy
BC1064
BC1064
22uF
22uF
*
*
6.3V, X5R, +/-10%
6.3V, X5R, +/-10%
C1206
C1206
Dummy
Dummy
EC6
EC6
560uF
560uF
*
*
4V, +/-20%
4V, +/-20%
CE35D80H90
CE35D80H90
Dummy
Dummy
VRM Input LC schematics
TC2
EC8
EC7
EC7
560uF
560uF
*
*
4V, +/-20%
4V, +/-20%
CE35D80H90
CE35D80H90
Dummy
Dummy
12V_VRM
12V_VIN7
B B
12V_VIN
*
*
EC11
EC11
1500uF
1500uF
16V, +/-20%
16V, +/-20%
CE50D100H300
CE50D100H300
EC22
EC22
1500uF
1500uF
*
*
16V, +/-20%
16V, +/-20%
CE50D100H300
CE50D100H300
EC38
EC38
1500uF
1500uF
*
*
16V, +/-20%
16V, +/-20%
CE50D100H300
CE50D100H300
*
*
L4
L4
EC23
EC23
1500uF
1500uF
16V, +/-20%
16V, +/-20%
CE50D100H300
CE50D100H300
*
*
Choke Coil 1.2uH
Choke Coil 1.2uH
BC1065
BC1065
0.1uF
0.1uF
*
*
25V, X7R, +/-10%
25V, X7R, +/-10%
C0603
C0603
Dummy
Dummy
3
4
PWR2
PWR2
1
ATX12V_P1_2X2
ATX12V_P1_2X2
PWR4NWP1
PWR4NWP1
5
2
*
*
EC8
560uF
560uF
4V, +/-20%
4V, +/-20%
CE35D80H90
CE35D80H90
Dummy
Dummy
EC9
EC9
560uF
560uF
*
*
4V, +/-20%
4V, +/-20%
CE35D80H90
CE35D80H90
Dummy
Dummy
*
*
TC1
TC1
100uF
100uF
2V,+30/-20%
2V,+30/-20%
ctdh16
ctdh16
Dummy
Dummy
*
*
7/20
TC2
100uF
100uF
2V,+30/-20%
2V,+30/-20%
ctdh16
ctdh16
Reserved
Reserved
VRM Output filter schematics
VCCP
A A
5
EC17
EC17
3300uF
3300uF
**
**
6.3V, +/-20%
6.3V, +/-20%
CE35_50D100H300
CE35_50D100H300
EC32
EC32
3300uF
3300uF
**
**
6.3V, +/-20%
6.3V, +/-20%
CE35_50D100H300
CE35_50D100H300
EC36
EC39
EC37
EC37
3300uF
3300uF
**
**
6.3V, +/-20%
6.3V, +/-20%
CE35_50D100H300
CE35_50D100H300
4
EC39
3300uF
3300uF
**
**
6.3V, +/-20%
6.3V, +/-20%
CE35_50D100H300
CE35_50D100H300
EC36
3300uF
3300uF
**
**
6.3V, +/-20%
6.3V, +/-20%
CE35_50D100H300
CE35_50D100H300
3
TECHNOLOGY COPR.
TECHNOLOGY COPR.
Title
Title
Title
Document Number Rev
Document Number Rev
Document Number Rev
Date: Sheet
Date: Sheet
2
Date: Sheet
Output CAP
Output CAP
Output CAP
661M08
661M08
661M08
TECHNOLOGY COPR.
of
844Monday, August 01, 2005
of
844Monday, August 01, 2005
of
844Monday, August 01, 2005
1
A
A
A
8 7 6 5 4 3 2 1
A
AAD[0..31]
HDBIJ[0..3]5
HDJ[0..63]5
D D
C C
HAJ[31..3]5
HREQJ[4..0]5
CPUCLK117
CPUCLK-117
HLOCKJ5
HDEFERJ5
HTRDYJ5
HCPURSTJ5
CPUPWRGD_NB14
HBPRIJ5
HBR0J5
HRSJ25
HRSJ15
HRSJ05
HADSJ5
HITMJ5
HITJ5
HDRDYJ5
HDBSYJ5
HBNRJ5
HADSTBJ15
HADSTBJ05
B B
GTLREF_SEL6
G
R54 change from 100 to 149
HDBIJ[0..3]
HDJ[0..63]
HAJ[31..3]
HREQJ[4..0]
CPUCLK1
CPUCLK-1
HLOCKJ
HDEFERJ
HTRDYJ
HCPURSTJ
CPUPWRGD_NB
HBR0J
HADSJ
HITMJ
HITJ
HDRDYJ
HDBSYJ
HBNRJ
HREQJ4
HREQJ3
HREQJ2
HREQJ1
HREQJ0
VCCP
R803
R803
*
*
619
619
+/-1%
+/-1%
R0603
R0603
DS
Q91
Q91
2N7002
2N7002
HBPRIJ
HRSJ2
HRSJ1
HRSJ0
HADSTBJ1
HADSTBJ0
HAJ31
HAJ30
HAJ29
HAJ28
HAJ27
HAJ26
HAJ25
HAJ24
HAJ23
HAJ22
HAJ21
HAJ20
HAJ19
HAJ18
HAJ17
HAJ16
HAJ15
HAJ14
HAJ13
HAJ12
HAJ11
HAJ10
HAJ9
HAJ8
HAJ7
HAJ6
HAJ5
HAJ4
HAJ3
FSB_VTT
*
*
*
*
U6A
U6A
AJ31
CPUCLK
AJ33
CPUCLK#
T33
HLOCK#
T35
DEFER#
V32
HTRDY#
B23
CPURST#
F22
CPUPWRGD
R34
BPRI#
U31
BREQ0#
R33
RS#2
T32
RS#1
U35
RS#0
V35
ADS#
R35
HITM#
U34
HIT#
W34
DRDY#
U33
DBSY#
V33
BNR#
W35
HREQ4#
Y33
HREQ3#
W31
HREQ2#
W33
HREQ1#
Y35
HREQ0#
AG31
HASTB1#
AA33
HASTB0#
R36
DPWR#
AH33
HA31#
AG33
HA30#
AJ35
HA29#
AF32
HA28#
AJ34
HA27#
AH32
HA26#
AG35
HA25#
AE31
HA24#
AH35
HA23#
AF35
HA22#
AE35
HA21#
AE33
HA20#
AE34
HA19#
AF33
HA18#
AG34
HA17#
AC33
HA16#
AD32
HA15#
AD33
HA14#
AC35
HA13#
AD35
HA12#
AC31
HA11#
AC34
HA10#
AB35
HA9#
AB32
HA8#
AB33
HA7#
AA35
HA6#
AA31
HA5#
Y32
HA4#
AA34
HA3#
661FX
661FX
R52 change from 49.9 to 100
R52
R52
49.9
49.9
+/-1%
+/-1%
Rds-on(p) = 56 ohm
HPCVERF = 2/3 VCCP
R54
R54
100
100
+/-1%
+/-1%
BC50
BC50
10nF
10nF
*
*
*
*
place this capacitor
C1XAVSS
C4XAVSS
C4XAVDD
C1XAVDD
AK34
C1XAVSS
C1XAVDD
AJ36
AK35
C4XAVSS
AA26
C4XAVDD
AL36
HOST
HD63#
HD62#
HD61#
HD60#
HD59#
HD58#
HD57#
HD56#
HD55#
F24
E23
B24
B25
C24
HDJ63
HDJ62
HDJ61
HVREF
BC51
BC51
0.1uF
0.1uF
B26
D23
D25
C26
HDJ60
D27
HDJ57
HDJ56
HDJ59
HDJ58
HDJ55
SBA-2
AAD14
AAD7
AAD8
AAD0
AAD1
HNCOMP
W26
HVREF1
HPCOMP
U26
R26
L20
C22
B22
D22
HVREF2
HVREF3
HVREF4
HCOMP_P
HCOMP_N
HCOMPVREF_N
HVREF
HVREF0
AAD2
ST0
ST1
ST2
B5
ST0B6ST1F7ST2
AAD0Y5AAD1W4AAD2V2AAD3W6AAD4V4AAD5U2AAD6V5AAD7U4AAD8R2AAD9
AAD3
AAD9
AAD4
AAD5
AAD6
T4
AAD15
AAD16
AAD11
AAD10
AAD12
AAD13
AAD10R3AAD11T5AAD12P2AAD13R4AAD14N2AAD15R6AAD16L3AAD17L4AAD18K2AAD19L6AAD20J2AAD21J3AAD22K4AAD23J4AAD24J6AAD25H4AAD26G3AAD27H5AAD28F2AAD29G4AAD30E2AAD31
AAD22
AAD23
AAD24
AAD25
AAD26
AAD27
AAD28
AAD29
AAD19
AAD20
AAD21
AAD17
AAD18
AAD30
AAD31
SBA-7
G6
SBA7E3SBA6F4SBA5D2SBA4F5SBA3E4SBA2B2SBA1E6SBA0
AGP
661FX-1
HD54#
HD53#
HD52#
HD51#
HD50#
HD49#
HD48#
HD47#
HD46#
HD45#
HD44#
HD43#
HD42#
HD41#
HD40#
HD39#
HD38#
HD37#
HD36#
HD35#
HD34#
HD33#
HD32#
HD31#
HD30#
HD29#
HD28#
HD27#
HD26#
HD25#
HD24#
HD23#
HD22#
HD21#
HD20#
HD19#
HD18#
HD17#
HD16#
HD15#
HD14#
HD13#
HD12#
HD11#
HD10#
HD9#
HD8#
J34
J33
J31
J35
L31
L33
B27
F28
B28
E29
B29
B30
B31
B33
B35
B34
D28
C28
C30
C32
HDJ49
HDJ48
HDJ51
HDJ50
HDJ47
HDJ46
D29
HDJ45
HDJ44
HDJ41
HDJ40
HDJ43
HDJ42
under 661 solder side
E31
C33
D32
HDJ37
HDJ36
HDJ35
HDJ34
HDJ39
HDJ38
E27
D26
HDJ53
HDJ52
HDJ54
F33
F32
E35
F35
H35
G34
HDJ25
HDJ24
HDJ21
HDJ20
HDJ23
HDJ22
BC54
BC54
0.1uF
0.1uF
*
*
K32
H33
G35
HDJ17
HDJ16
HDJ19
HDJ18
HDJ15
HDJ14
D31
HDJ33
E33
D33
D35
C35
D34
G31
HDJ32
HDJ29
HDJ28
HDJ27
HDJ26
HDJ31
HDJ30
C1XAVDD C4XAVDD
C1XAVSS
L35
K33
K35
N33
HDJ13
HDJ12
HDJ9
HDJ8
HDJ11
HDJ10
SBA-6
HD7#
M35
M33
HDJ7
SBA-5
SBA-4
HD6#
HD5#
P32
HDJ5
HDJ6
SBA-1
SBA-3
HD4#
HD3#
HD2#
L34
P33
N34
HDJ4
HDJ3
HDJ2
C4XAVSS
SBA-0
B3
ADBIH/PIPE#
AGPCOMP_P
AGPCOMP_N
AGPVSSREF
HD1#
HD0#
P35
N35
HDJ1
HDJ0
VCC3VCC3
*
*
AC/BE3#
AC/BE2#
AC/BE1#
AC/BE0#
AREQ#
AGNT#
AFRAME#
AIRDY#
ATRDY#
ADEVSEL#
ASERR#
ASTOP#
APAR
RBF#
WBF#
GC_DET#
ADBIL
SB_STB
SB_STB#
AD_STB0
AD_STB0#
AD_STB1
AD_STB1#
AGPCLK
A1XAVDD
A1XAVSS
A4XAVDD
A4XAVSS
AGPVREF
HDSTBN3#
HDSTBN2#
HDSTBN1#
HDSTBN0#
HDSTBP3#
HDSTBP2#
HDSTBP1#
HDSTBP0#
DBI3#
DBI2#
DBI1#
F26
B32
E34
R31
HDBIJ2
HDBIJ1
HDBIJ3
BC53
BC53
0.1uF
0.1uF
K5
M5
P4
U6
C6
E8
N6
M4
N4
L2
P5
M2
N3
D7
B4
C7
C4
D6
C2
D3
T2
U3
G2
H2
D8
W2
Y2
B8
C8
A7
B7
W3
Y4
D24
F30
G33
N31
E25
D30
H32
M32
DBI0#
HDBIJ0
AC-BE3
AC-BE2
AC-BE1
AC-BE0
GCDETÂDBI_HI
DBI_LOW
ADSTBF0
ADSTBS0
ADSTBF1
ADSTBS1
AGPCLK0
AGPRCOMP
AGPRCOMN
A1XAVDD
A1XAVSS
A4XAVDD
A4XAVSS
HDSTBNJ3
HDSTBNJ2
HDSTBNJ1
HDSTBNJ0
HDSTBPJ3
HDSTBPJ2
HDSTBPJ1
HDSTBPJ0
SBA-[0..7]
AC-BE[0..3]
ST[0..2]
ADSTBF[0..1]
ADSTBS[0..1]
AREQ 19
AGNT 19
AFRAME 19
AIRDY 19
ATRDY 19
ADEVSEL 19
ASERR 19
ASTOP 19
APAR 19
RBF 19
WBF 19
GCDET- 19
DBI_HI 19
DBI_LOW 19
SBSTBF 19
SBSTBS 19
AGPCLK0 17
AVREFGC 19
HDSTBNJ3 5
HDSTBNJ2 5
HDSTBNJ1 5
HDSTBNJ0 5
HDSTBPJ3 5
HDSTBPJ2 5
HDSTBPJ1 5
HDSTBPJ0 5
Title
Title
Title
Document Number Rev
Document Number Rev
Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
661FX-1 HOST & AGP
661FX-1 HOST & AGP
661FX-1 HOST & AGP
AAD[0..31] 19
SBA-[0..7] 19
AC-BE[0..3] 19
ST[0..2] 19
ADSTBF[0..1] 19
ADSTBS[0..1] 19
FSB_VTT
R48 14
R48 14
*
*
R49 change from 100 to 120
R49 100
R49 100
*
*
HNCOMP
HPCOMP
R48 R49
648 10 1% 113 1%
648FX
661FX
AGPRCOMN
AGPRCOMP
BC48, BC49 Change to 0.1uF?
661M08
661M08
661M08
14 1%
14 1%
AGP3.0 = 50 ohm
R50 51
R50 51
*
*
R51 43.2
R51 43.2
*
*
VCC3
A1XAVDD
BC48
BC48
10nF
10nF
*
*
A1XAVSS
VCC3
A4XAVDD
BC49
BC49
10nF
10nF
*
*
A4XAVSS
TECHNOLOGY COPR.
TECHNOLOGY COPR.
TECHNOLOGY COPR.
944Monday, August 01, 2005
944Monday, August 01, 2005
944Monday, August 01, 2005
100 1%
100 1%
VDDQ
of
of
of
A
A
A
A
8 7 6 5 4 3 2 1
A
MD[0..63]
DQM[0..7]
DQS[0..7]
MA[0..14]
CS-[0..3]
CKE[0..3]
D D
VCC2.5_MEM
BC590
*
C0603
C0603
C0603
C0603
*
*
BC590
BC589
BC589
0.1uF
0.1uF
0.1uF
0.1uF
*
*
*
BC591
BC591
0.1uF
0.1uF
C0603
C0603
BC592
BC592
0.1uF
0.1uF
*
*
C0603
C0603
C C
VCC2.5_MEM
BC596
BC596
BC595
BC595
BC594
BC594
0.1uF
0.1uF
0.1uF
0.1uF
*
*
C0603
C0603
*
*
*
*
C0603
C0603
0.1uF
0.1uF
C0603
C0603
BC597
BC597
0.1uF
0.1uF
*
*
C0603
C0603
B B
BC593
BC593
0.1uF
0.1uF
*
*
C0603
C0603
*
*
MD[0..63] 21,23
DQM[0..7] 21,23
DQS[0..7] 21,23
MA[0..14] 21,23
CS-[0..3] 21,23
CKE[0..3] 21
BC598
BC598
0.1uF
0.1uF
C0603
C0603
MD0
MD1
MD2
MD3
MD4
MD5
MD6
MD7
DQM0
DQS0
MD8
MD9
MD10
MD11
MD12
MD13
MD14
MD15
DQM1
DQS1
MD16
MD17
MD18
MD19
MD20
MD21
MD22
MD23
DQM2
DQS2
MD24
MD25
MD26
MD27
MD28
MD29
MD30
MD31
DQM3
DQS3
MD32
MD33
MD34
MD35
MD36
MD37
MD38
MD39
DQM4
DQS4
MD40
MD41
MD42
MD43
MD44
MD45
MD46
MD47
DQM5
DQS5
MD48
MD49
MD50
MD51
MD52
MD53
MD54
MD55
DQM6
DQS6
MD56
MD57
MD58
MD59
MD60
MD61
MD62
MD63
DQM7
DQS7
AN35
AP36
AK33
AM33
AN34
AK32
AR34
AN33
AR35
AP34
AM32
AL31
AR31
AL30
AN32
AR33
AN31
AM31
AR32
AP32
AP30
AR30
AM29
AL27
AN30
AN29
AL28
AN28
AL29
AR29
AP26
AN25
AR24
AL24
AL25
AR26
AM25
AN24
AP24
AR25
AN21
AP20
AN20
AL18
AM21
AR21
AL19
AM19
AL20
AR20
AL15
AL14
AN15
AR15
AN16
AM15
AN14
AL13
AP16
AR16
AM13
AL12
AL11
AR12
AP14
AR14
AN13
AP12
AN12
AR13
AL10
AR11
AM9
AR9
AM11
AN11
AP10
AN9
AN10
AR10
U6B
U6B
MD0
MD1
MD2
MD3
MD4
MD5
MD6
MD7
DQM0
DQS0/CSB0#
MD8
MD9
MD10
MD11
MD12
MD13
MD14
MD15
DQM1
DQS1/CSB1#
MD16
MD17
MD18
MD19
MD20
MD21
MD22
MD23
DQM2
DQS2/CSB2#
MD24
MD25
MD26
MD27
MD28
MD29
MD30
MD31
DQM3
DQS3/CSB3#
MD32
MD33
MD34
MD35
MD36
MD37
MD38
MD39
DQM4
DQS4/CSB4#
MD40
MD41
MD42
MD43
MD44
MD45
MD46
MD47
DQM5
DQS5/CSB5#
MD48
MD49
MD50
MD51
MD52
MD53
MD54
MD55
DQM6
DQS6/CSB6#
MD56
MD57
MD58
MD59
MD60
MD61
MD62
MD63
DQM7
DQS7/CSB7#
661FX
661FX
661FX-2
MA0
MA1
MA2
MA3
MA4
MA5
MA6
MA7
MA8
MA9
MA10
MA11
MA12
MA13
MA14
SRAS#
SCAS#
SWE#
CS0#
CS1#
CS2#
CS3#
CS4#
CS5#
CKE0
CKE1
CKE2
CKE3
CKE4
CKE5
S3AUXSW#
FWDSDCLKO
DRAMTEST
DLLAVDD
DLLAVSS
DDRAVDD
DDRAVSS
DDRVREFA
DDRVREFB
TRAP2
DDRCOMP_P
DDRCOMP_N
put bottom side
DDRVREFA
MA0
AR23
MA1
AN23
MA2
AN22
MA3
AM23
MA4
AL23
MA5
AL26
MA6
AN26
MA7
AN27
MA8
AR27
MA9
AR28
MA10
AP22
MA11
AN18
MA12
AR22
MA13
AP28
MA14
AM27
AT14
NC
AL17
AR19
AN19
AM17
AL16
AN17
AR17
AP18
AR18
AP4
AT3
AR3
AP3
AR2
AN4
AP2
AL21
AL22
AL35
AL34
AM35
AN36
AF16
AF23
AP1
AR8
AP8
SRASÂSCASÂSWE-
CS-0
CS-1
CS-2
CS-3
R60 22
R60 22
DLLAVDD
DLLAVSS
DDRAVDD
DDRAVSS
DDRVREFA
DDRVREFB
DDRCOMP
DDRCOMN
/RSRAS- 21,23
/RSCAS- 21,23
/RSWE- 21,23
SB3V
CKE0
CKE1
CKE2
CKE3
*
*
FWDSDCLKO
DDRCOMN
DDRCOMP
FWDSDCLKO 18
R61 40.2
R61 40.2
R62 40.2
R62 40.2
*
*
*
*
R785
R785
*
*
4.7K
4.7K
+/-5%
+/-5%
R0603
R0603
S3AUXSW- 28,37
VCC2.5_MEM
DDRAVDD
DDRAVSS
DLLAVDD
DLLAVSS
DDRVREFB
FWDSDCLKO
BC58
BC58
0.1uF
0.1uF
*
*
BC59
BC59
0.1uF
0.1uF
*
*
FB21 BLM18BB470SN1DFB21 BLM18BB470SN1D
FB22 BLM18BB470SN1DFB22 BLM18BB470SN1D
VCC2.5_MEM
R56
R56
*
*
150
150
R57
21
21
R57
*
*
150
150
VCC2.5_MEM
*
*
*
*
BC57
BC57
10pF
10pF
*
*
VCC3
VCC3
R58
R58
150
150
R59
R59
150
150
BC55
BC55
10nF
10nF
*
*
BC56
BC56
10nF
10nF
*
*
A
TECHNOLOGY COPR.
TECHNOLOGY COPR.
Title
Title
Title
Document Number Rev
Document Number Rev
Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
661FX-2 DDR
661FX-2 DDR
661FX-2 DDR
661M08
661M08
661M08
TECHNOLOGY COPR.
A
A
of
10 44Monday, August 01, 2005
of
10 44Monday, August 01, 2005
of
10 44Monday, August 01, 2005
A
8 7 6 5 4 3 2 1
A
Enable Disable
RSYNC
U6C
D D
ZCLK0
ZUREQ
ZDREQ
ZSTB0
ZSTB-0
ZSTB1
ZSTB-1
ZVREF
ZCMP_N
ZCMP_P
Z1XAVDD
Z1XAVSS
Z4XAVDD
Z4XAVSS
ZAD0
ZAD1
ZAD2
ZAD3
ZAD4
ZAD5
ZAD6
ZAD7
ZAD8
ZAD9
ZAD10
ZAD11
ZAD12
ZAD13
ZAD14
ZAD15
ZAD16
ZCLK017
ZUREQ13
ZDREQ13
ZSTB013
ZSTB-013
ZSTB113
ZSTB-113
NBPWRGD38
ZAD[0..16]13
VCC1.8V VCC3
R65
R65
*
*
150
150
ZVREF
BC60
R70
R70
*
*
51.1
51.1
BC60
0.1uF
0.1uF
*
*
ZAD[0..16]
C C
VCC3
Z4XAVDD
BC64
BC64
0.1uF
0.1uF
*
*
Z4XAVSS
U6C
AL6
ZCLK
AL4
ZUREQ
AK5
ZDREQ
AJ2
ZSTB0
AJ3
ZSTB0#
AE3
ZSTB1
AF2
ZSTB1#
AH5
ZAD0
AK2
ZAD1
AJ4
ZAD2
AJ6
ZAD3
AH2
ZAD4
AH4
ZAD5
AG3
ZAD6
AG6
ZAD7
AF4
ZAD8
AG2
ZAD9
AF5
ZAD10
AG4
ZAD11
AD2
ZAD12
AE6
ZAD13
AE2
ZAD14
AE4
ZAD15
AL3
ZAD16
AK4
ZVREF
AD5
ZCOMP_N
AD4
ZCOMP_P
AN1
Z1XAVDD
AM2
Z1XAVSS
AL2
Z4XAVDD
AL1
Z4XAVSS
661FX
661FX
NBRST-6,13
AUXOK14,36
NBPWRGD
AUXOK ENTEST
661FX-3
HyperZip
PCIRST#
PWROK
AUXOK
TRAP1F9TRAP0
AN2
AN3
AM4
D10
TESTMODE2C9TESTMODE1B9TESTMODE0
B10
VGA
DLLEN#
ENTEST
D9
E10
DACAVDD1
DACAVSS1
DACAVDD2
DACAVSS2
DCLKAVDD
DCLKAVSS
ECLKAVDD
ECLKAVSS
VOSCI
ROUT
GOUT
BOUT
HSYNC
VSYNC
VGPIO0
VGPIO1
INT#A
CSYNC
RSYNC
LSYNC
VCOMP
VRSET
VVBWN
A15
B12
B13
A13
A11
B11
E13
C11
C10
D12
E12
D11
E15
D15
E14
D13
C12
D14
C13
B15
C15
B14
C14
*
*
*
*
VCOMP
VRSET
VVBWN
DACAVDD
DACAVSS
DACAVDD
DACAVSS
DCLKAVDD
DCLKAVSS
ECLKAVDD
ECLKAVSS
R6433*R6433
R6633*R6633
R67100*R67100
R68100*R68100
REFCLK2 17
ROUT 20
GOUT 20
BOUT 20
HSYNC 20
VSYNC 20
DDC1CLK 20
DDC1DATA 20
INT-A 13,19,24,25
CSYNC
RSYNC
LSYNC
B B
VCC1.8V
*
*
BC70
BC70
0.1uF
0.1uF
DUMMY
DUMMY
R72 56
R72 56
R73 56
R73 56
U6_1
U6_1
+/-5%
+/-5%
*
*
R0603
R0603
+/-5%
+/-5%
*
*
R0603
R0603
ZCMP_N
ZCMP_P
VCC3
*
*
Z1XAVDD
BC71
BC71
0.1uF
0.1uF
Z1XAVSS
LSYNC
CSYNC VB
DCLKAVDD
DCLKAVSS
ECLKAVDD
ECLKAVSS
VVBWN
BC66 0.1uF
BC66 0.1uF
VCOMP
BC67 0.1uF
BC67 0.1uF
DACAVDD
DACAVSS
Put the cap bottom side
panel link
RSYNC
ENTEST
LSYNC
CSYNC
RSYNC
NBPWRGD
AUXOK
*
*
*
*
BC68
BC68
*
*
0.1uF
0.1uF
VGA
RN6 4.7K
RN6 4.7K
R69 4.7KDUMMY
R69 4.7KDUMMY
BC61 0.1uF
BC61 0.1uF
BC62 0.1uF
BC62 0.1uF
BC69
BC69
1uF
1uF
*
*
8P4R0603
8P4R0603
1
*
*
3
5
7 8
*
*
*
*
*
*
BC63
BC63
0.1uF
0.1uF
*
*
BC65
BC65
0.1uF
0.1uF
*
*
VRSET
1
1
1
+/-5%
+/-5%
2
4
6
VCC1.8V
VCC3
VCC3
0
0
0
R71
R71
*
*
130
130
U6_C
U6_A
U6_A
Clip_2P
Clip_2P
Heatsink
Heatsink
U6_C
Clip_2P
Clip_2P
TECHNOLOGY COPR.
TECHNOLOGY COPR.
Title
Title
Title
Document Number Rev
Document Number Rev
Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
661FX-3 VGA & MUTIOL
661FX-3 VGA & MUTIOL
661FX-3 VGA & MUTIOL
661M08
661M08
661M08
TECHNOLOGY COPR.
of
11 44Monday, August 01, 2005
of
11 44Monday, August 01, 2005
of
11 44Monday, August 01, 2005
A
A
A
A
8
A
FSB_VTT
A17
A18
A19
A20
A21
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
PVDDM
PVDDM
PVDDM
PVDDM
PVDDM
PVDDM
PVDDM
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
B17
VTT
VTT
VTT
VTT
VTT
VSS
VSS
VSS
VSS
VSS
VSS
Y14
Y15
Y16
Y17
Y18
Y19
Y20
L25
L26
M18
M19
M20
M21
M22
D D
VCC2.5_MEM
C C
B B
M23
M24
M25
M26
N25
P25
R25
T25
U25
V25
W25
Y25
AA25
AL7
AL8
AL9
AM6
AM7
AM8
AN5
AN6
AN7
AN8
AP5
AP6
AP7
AR4
AR5
AR6
AR7
AT4
AT5
AT6
AT7
AB25
AC25
AD12
AD25
AE11
AE12
AE13
AE14
AE15
AE16
AE17
AE18
AE19
AE20
AE21
AE22
AE23
AE24
AE25
AE26
AF11
AF12
AF25
AF26
AB24
AC13
AD14
AD16
AD18
AD20
AD22
P14
P15
P16
P17
P18
P19
P20
P21
P22
P23
R14
R15
R16
R17
R18
R19
R20
R21
R22
R23
T14
T15
T16
T17
T18
T19
T20
T21
T22
T23
U14
U15
U16
U17
U18
U19
U20
U21
U22
U23
V14
V15
V16
V17
V18
V19
V20
V21
V22
V23
W14
W15
W16
W17
W18
W19
W20
W21
W22
W23
7
VCC1.8V
B18
B19
B20
B21
C17
C18
C19
C20
C21
D17
D18
D19
D20
D21
E17
E18
E19
E20
E21
F17
F18
F19
F20
F21
N13
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
IVDD
661FX-4
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
Y21
Y22
Y23
AA14
AA15
AA16
AA17
AA18
AA19
AA20
AA21
AA22
AA23
AB14
AB15
AB16
VSS
AB17
AB18
AB19
AB20
AB21
AB22
AB23
AC14
AC15
VCC1.8V
N20
N22
N14
N16
N18
N19
N21
N23
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
PVDD
PVDD
Power
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AC16
AC17
AC18
AC19
AC20
AC21
AC22
AC23
6
R24
T13
U24
V13
W24
N24
P13
P24
IVDD
IVDD
IVDD
VSS
VSS
AC32
AC36
Y13
T24
V24
W13
Y24
AA24
AB13
AC24
AD13
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
AG36
IVDD
PVDD
PVDD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AJ32
AH34
AM10
AM12
AM14
AM16
AM18
PVDD
PVDD
PVDD
PVDD
VSS
VSS
VSS
VSS
VSS
AF34
AE32
AE36
AD34
AG32
5
VCC1.8V
N15
AD15
AD17
AD19
IVDD
IVDD
IVDD
VSS
VSS
VSS
AM20
AM22
AM24
AH3
AD21
AD23
AD24
R13
U13
AA13
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
PVDD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AP9
AP11
AP13
AP15
AP17
AP19
AM26
AM28
AM30
VDDZ
VSS
AD3
AE1
AF3
VDDZ
VSS
AG1
W11
W12
Y11
Y12
AA12
VDDZ
VDDZ
VDDZ
VDDZ
VDDZ
VDDZ
VDDZ
VDDZ
VDDZ
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AT8
AT10
AT12
AT16
AP27
AP29
AT18
AP31
AP33
AP35
AJ1
AK3
AM3
VDDZ
VDDZ
VSS
VSS
AP21
AP23
AP25
AM5
NC1D4NC2D5NC3
VSS
VSS
AT20
AT22
4
VCC3
SB1.8V
U6D
L17
VSS
VSS
AT24
AT26
U6D
M17
N17
AB12
AUX_IVDD
AC12
AA1
AA2
AA3
AA4
AA5
AA6
AB1
AB2
AB3
AB4
AB5
AB6
AC1
AC2
AC3
AC4
AC5
AC6
L11
L12
L13
M11
M12
M13
M14
M15
M16
N11
N12
P12
R12
T12
U12
V12
B16
C16
D16
E16
F15
E11
F11
F13
AL33
AM34
A9
A3
A5
C1
C3
C5
E1
E5
E7
E9
F3
G1
G5
H3
J1
J5
K3
L1
L5
M3
N1
N5
P3
R1
R5
T3
U1
U5
V3
W1
W5
Y3
AE5
AG5
AJ5
AL5
A22
A24
A26
A28
A30
A32
A34
C23
C25
C27
C29
C31
C34
C36
E22
E24
E26
E28
E30
E32
E36
F34
G32
G36
H34
J32
J36
K34
L32
L36
M34
N32
N36
P34
R32
T34
U32
U36
V34
W32
W36
Y34
AA32
AA36
AB34
661FX
661FX
SB3V
VDDQ
VCC1.8V
AUX3.3
VDD3.3
VDD3.3
VDD3.3
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
IVDD
IVDD
IVDD
IVDD
IVDD
NC4
NC5
NC6
NC7
NC8
NC9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AL32
AT28
AT30
AT32
AT34
3
2
IVDD, AUX_IVDD 1.8V
SB1.8V SB3V
*
*
*
*
BC72
BC72
BC73
BC73
0.1uF
0.1uF
1uF
1uF
FSB_VTT
BC74
BC74
10uF
10uF
*
*
*
*
*
C1206
C1206
Place these capacitors under 660 solder side
VCC1.8V VDDQ VCC2.5_MEM
*
*
*
BC75
BC75
BC76
BC76
1uF
1uF
1uF
1uF
VDDQ VCC2.5_MEM
*
*
*
*
BC82
BC82
10uF
10uF
DUMMY
DUMMY
*
*
*
*
BC93
BC93
BC94
BC94
0.1uF
0.1uF
0.1uF
0.1uF
*
*
*
*
BC83
BC83
1uF
1uF
*
*
BC95
BC95
0.1uF
0.1uF
BC77
BC77
1uF
1uF
*
*
BC96
BC96
10uF
10uF
Reserved
Reserved
BC102
BC102
1uF
1uF
*
*
*
BC84
BC84
1uF
1uF
*
BC85
BC85
1uF
1uF
*
*
*
*
BC98
BC98
BC97
BC97
0.1uF
0.1uF
0.1uF
0.1uF
*
*
BC86
BC86
10uF
10uF
DUMMY
DUMMY
1
VCC1.8V
BC78
BC78
10uF
10uF
*
*
*
*
C1206
C1206
*
*
BC103
BC103
1uF
1uF
*
*
*
*
BC99
BC99
0.1uF
0.1uF
BC105
BC105
4.7uF
4.7uF
C0805
C0805
*
*
*
*
BC88
BC88
BC89
BC87
BC87
1uF
1uF
BC89
0.1uF
0.1uF
0.1uF
0.1uF
*
*
*
*
BC91
BC91
BC90
BC90
0.1uF
0.1uF
0.1uF
0.1uF
*
*
*
*
BC81
BC106
BC106
4.7uF
4.7uF
C0805
C0805
BC92
BC92
0.1uF
0.1uF
BC1027
BC1027
10uF
10uF
BC81
BC80
BC80
0.1uF
0.1uF
0.1uF
0.1uF
*
*
BC1028
BC1028
1uF
1uF
BC79
BC79
1uF
1uF
*
*
*
*
*
*
A
TECHNOLOGY COPR.
TECHNOLOGY COPR.
Title
Title
Title
Document Number Rev
Document Number Rev
Document Number Rev
Date: Sheet
Date: Sheet of
Date: Sheet of
661FX-4 Power
661FX-4 Power
661FX-4 Power
661M08
661M08
661M08
TECHNOLOGY COPR.
of
12 44Monday, August 01, 2005
12 44Monday, August 01, 2005
12 44Monday, August 01, 2005
A
A
A
8
A
VCC3
RN68
INT-A
INT-B
INT-C
INT-D
D D
C/BE-[0..3]24,25
C C
RN68
2
4
6
8.2K
8.2K
+/-5%
+/-5%
8P4R0603
8P4R0603
VCC1.8V
1
*
*
3
5
78
C/BE-[0..3]
INT-C24,25
INT-D24,25
FRAME-24,25
IRDY-24,25
TRDY-24,25
STOP-24,25
SERR-24,25
DEVSEL-24,25
PLOCK-24,25
96XPCLK17
PCIRST-19,24,25,26,35
SIORST-28
NBRST-6,11
PCIRSTAJ31
ZCLK117
ZSTB011
ZSTB-011
ZSTB111
ZSTB-111
ZUREQ11
ZDREQ11
INT-A11,19,24,25
INT-B19,24,25
PAR24,25
B B
R304
R304
*
*
150
150
+/-1%
+/-1%
R0603
R0603
BC880
R305
R305
*
*
49.9
49.9
+/-1%
+/-1%
R0603
R0603
BC880
0.1uF
0.1uF
*
*
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
C0603
C0603
7
AD[0..31]24,25
VCC3
R334
R334
*
*
4.7K
4.7K
+/-5%
+/-5%
R0603
R0603
Dummy
Dummy
PREQ-4
PREQ-3
PREQ-225
PREQ-124
PREQ-024
PGNT-3
PGNT-225
PGNT-124
PGNT-024
INT-A
INT-B
INT-C
INT-D
FRAMEÂIRDY-
STOPÂSERR-
PAR
DEVSELÂPLOCK-
PCIRST-
ZCLK1
ZSTB0
ZSTB-0
ZSTB1 IDEDA9
ZSTB-1
ZUREQ
ZDREQ
SZVREF
PREQ-3
PREQ-2 ICHRDYA
PREQ-1
PREQ-0
PGNT-3
PGNT-2
PGNT-1
PGNT-0
C/BE-3
C/BE-2
C/BE-1
R301 33
R301 33
R302 33
R302 33
*
*
R303 33
R303 33
*
*
R309 33
R309 33
*
*
*
*
SZCMP_P
SZ1XAVDD
SZ1XAVSS
SZ4XAVDD
SZ4XAVSS IDEDB11
SZVREF
ZAD16
AB26
V24
W26
R25
Y24
Y23
AA24
AA25
AC26
AB25
Y22
AA23
AA26
Y26
F1
F2
F3
F4
E1
H4
G1
G2
G3
G4
K3
M2
P1
U4
F5
E4
E3
E2
M1
N4
N3
P4
P3
P2
N2
N1
W3
B3
T26
6
AD[0..31]
AD27 ZAD4
AD29
AD30
AD28
AD26
AD24 ZAD7
AD23
AD22
PREQ4#
PREQ3#
PREQ2#
PREQ1#
PREQ0#
PGNT4#
PGNT3#
PGNT2#
PGNT1#
PGNT0#
C/BE3#
C/BE2#
C/BE1#
C/BE0#
INTA#
INTB#
INTC#
INTD#
FRAME#
IRDY#
TRDY#
STOP#
SERR#
PAR
DEVSEL#
PLOCK#
PCICLK
PCIRST#
ZCLK
ZSTB0
ZSTB0#
ZSTB1
ZSTB1#
ZUREQ
ZDREQ
ZCMP_N
ZCMP_P
Z1XAVDD
Z1XAVSS
Z4XAVDD
Z4XAVSS
ZVREF
ZAD16
AD31H3AD30H2AD29H1AD28J4AD27J3AD26J2AD25J1AD24K4AD23K2AD22K1AD21L4AD20L3AD19L2AD18L1AD17M4AD16M3AD15R4AD14R3AD13R2AD12R1AD11T4AD10
PCI
964/964L -1
HyperZip
ZAD0
ZAD1
ZAD2
ZAD3
ZAD4
ZAD5
ZAD6
ZAD7
ZAD8
T22
V22
V23
V26
U22
U25
U24
ZAD3
ZAD5
ZAD6AD25
ZAD8
U26
ZAD9
W24
ZAD0AD31
W25
ZAD1
ZAD2
ZAD9
T23
AD20
AD21
ZAD10
R22
ZAD10
ZAD11
ZAD11
AD19
ZAD12
T24
ZAD12
AD18 ZAD13
ZAD13
R24
AD17
ZAD14
P22
R26
ZAD14
5
AD15
AD16
ZAD15
ZAD15
AD14
AD13
AD12
AD11
AD10
AD8
AD9
AD7
AD6
T3
AD9T2AD8T1AD7U3AD6U2AD5U1AD4V4AD3V3AD2V2AD1V1AD0
IDE
AD5
AD4
AD3
AD2
AD1
4
AD0
W4
IDEAVDD
IDEAVSS
ICHRDYA
IDREQA
IIRQA
CBLIDA
IIORA#
IIOWA#
IDACKA#
IDSAA2
IDSAA1
IDSAA0
IDECSA1#
IDECSA0#
ICHRDYB
IDREQB
IIRQB
CBLIDB
IIORB#
IIOWB#
IDACKB#
IDSAB2
IDSAB1
IDSAB0
IDECSB1#
IDECSB0#
IDA0
IDA1
IDA2
IDA3
IDA4
IDA5
IDA6
IDA7
IDA8
IDA9
IDA10
IDA11
IDA12
IDA13
IDA14
IDA15
IDB0
IDB1
IDB2
IDB3
IDB4
IDB5
IDB6
IDB7
IDB8
IDB9
IDB10
IDB11
IDB12
IDB13
IDB14
IDB15
U25A
U25A
W1
W2
AE15
AD14
AC15
AE16
AF15
AC14
AD15
AC16
AF16
AD16
AE17
AF17
AE22
AD21
AC22
AE23
AF22
AC21
AD22
AF24
AF23
AD23
AF25
AE24
AF14
AD13
AF13
AD12
AF12
AD11
AF11
AF10
AE10
AE11
AC11
AE12
AC12
AE13
AC13
AE14
AF21
AD20
AF20
AD19
AF19
AD18
AF18
AD17
AC17
AE18
AC18
AE19
AC19
AE20
AC20
AE21
964
964
3
IDESAA2
IDESAA1
IDESAA0
IDECS-A1C/BE-0
IDECS-A0
IDESAB2
IDESAB1
IDESAB0
IDECS-B196XPCLK
IDECS-B0
IDEDA0
IDEDA1
IDEDA2
IDEDA3
IDEDA4
IDEDA5
IDEDA6
IDEDA7
IDEDA8
IDEDA10
IDEDA11
IDEDA12
IDEDA13
IDEDA14
IDEDA15
IDEDB0
IDEDB1SZCMP_N
IDEDB2
IDEDB3
IDEDB4
IDEDB5
IDEDB6
IDEDB7
IDEDB8
IDEDB9
IDEDB10
IDEDB12
IDEDB13
IDEDB14
IDEDB15
BC879
BC879
0.1uF
0.1uF
*
*
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
C0603
C0603
IDESAA[0..2]
IDECS-A[0..1]
IDESAB[0..2]
IDECS-B[0..1]
IDEREQA
IDEIRQA
CBLIDA
IDEIOR-A
IDEIOW-A
IDACK-A
ICHRDYB
IDEREQB
IDEIRQB
CBLIDB
IDEIOR-BTRDYÂIDEIOW-B
IDACK-B
2
VCC1.8V
ICHRDYA 26
IDEREQA 26
IDEIRQA 26
CBLIDA 26
IDEIOR-A 26
IDEIOW-A 26
IDACK-A 26
IDESAA[0..2] 26
IDECS-A[0..1] 26
ICHRDYB 26
IDEREQB 26
IDEIRQB 26
CBLIDB 26
IDEIOR-B 26
IDEIOW-B 26
IDACK-B 26
IDESAB[0..2] 26
IDECS-B[0..1] 26
IDEDA[0..15] 26
IDEDB[0..15] 26
1
ZAD[0..16]11
Analog Power supplies of Transzip function for 96X Chip.
VCC1.8V
BC882
BC882
0.1uF
0.1uF
*
*
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
C0603
C0603
SZ1XAVDD SZ4XAVDD
SZ1XAVSS
VCC1.8V
BC883
BC883
0.1uF
0.1uF
*
*
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
C0603
C0603
SZ4XAVSS
VCC1.8V
JP24
JP24
SHORT/NA
SHORT/NA
R306
R306
56
12
BC881
BC881
0.1uF
0.1uF
*
*
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
C0603
C0603
56
+/-5%
+/-5%
*
*
R0603
R0603
R307
R307
56
56
+/-5%
+/-5%
*
*
R0603
R0603
SZCMP_N
SZCMP_P
TECHNOLOGY COPR.
TECHNOLOGY COPR.
Title
Title
Title
Document Number Rev
Document Number Rev
Document Number Rev
Date: Sheet
Date: Sheet of
Date: Sheet of
964_I
964_I
964_I
661M08
661M08
661M08
TECHNOLOGY COPR.
of
13 44Monday, August 01, 2005
13 44Monday, August 01, 2005
13 44Monday, August 01, 2005
0.6
A
A
A
A
8
A
INITJ5
A20MJ5
SMIJ5
INTR5
NMI5
IGNNEJ5
FERRJ5
STPCLKJ5
D D
CPUSLPJ5
PROCHOTJ5
LAD[0..3]28,31
LFRAME-28,31
LDRQ-28
SIRQ28
BATOK36
SBPWRGD17,38
VCC3
STHERMTRIP-
C C
SMBDAT17,18,21
SMBCLK17,18,21
SDATI033
SDATO33
SYNC33
AC_RESET-33
BIT_CLK33
REFCLK117
SPKR33,38
PWRBTN-28,36
B B
PME-19,24,25,28
PSON-28,38
AUXOK11,36
ACPILED36
KBDAT29
KBCLK29
PMDAT29
PMCLK29
VCC3
R299
R299
470
470
*
*
+/-5%
+/-5%
R0603
Dummy
Dummy
R0603
GPWAK-
7
INITJ
AB23
Dummy
Dummy
AD26
AE25
AC24
AD25
AD24
AE26
AB22
AC23
AF26
AC25
AB24
AC4
AC3
AE1
AF1
AD3
AE2
AF2
C2
C1
D4
D2
C3
D3
AB1
AB2
E6
B4
AB3
AC1
B5
AC2
AD2
D1
AD1
D5
A7
D8
A3
B6
B2
A5
B8
A8
C8
D6
EC
MMBT3904
MMBT3904
Q31
Q31
INIT#
A20M#
SMI#
INTR
NMI
IGNNE#
FERR#
STPCLK#
CPUSLP#
APICCK/LDTREQ#
APICD0/THERM2#
APICD1/GPIOFF#
LAD0
LAD1
LAD2
LAD3
LFRAME#
LDRQ#
SIRQ
OSC32KHI
OSC32KHO
BATOK
PWROK
RTCVDD
RTCVSS
GPIO20
GPIO19
AC_SDIN0
AC_SDIN1
AC_SDOUT
AC_SYNC
AC_RESET#
AC_BIT_CLK
OSCI
ENTEST
SPK
PWRBTN#
PME#
PSON#
AUXOK
ACPILED
GPIO13
GPIO14
GPIO15/KBDAT
GPIO16/KBCLK
GPIO17/PMDAT
GPIO18/PMCLK
R2503
R2503
0
0
+/-5%
+/-5%
R0603
R0603
A20MJ
SMIJ
INTR
NMI
IGNNEJ
FERRJ
STPCLKJ
CPUSLPJ
R290
R290
10K
10K
+/-5%
+/-5%
*
*
R0603
R0603
LAD0
LAD1
LAD2
LAD3
LDRQÂSIRQ
OSC32KHI
OSC32KHO RXD0
BATOK
SBPWRGD
RTCVDD
BC875
BC875
0.1uF
0.1uF
*
*
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
C0603
C0603
SMBDAT
SMBCLK
SDATI0
SYNC
AC_RESET-
BIT_CLK
REFCLK1
SENTEST
SPKR
PWRBTNÂPMEÂPSON-
AUXOK
ACPILED
BC878
BC878
0.1uF
0.1uF
*
*
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
C0603
C0603
KBDAT
KBCLK
PMDAT
PMCLK
R300 1K
R300 1K
*
*
Dummy
Dummy
B
6
CPUPWRGD_NB 9
7/28
CPU_PWRG 5
5
OSC25MHO
GPIO0/SPDIF
GPIO1/LDRQ1#
GPIO2/THERM#
GPIO3/EXTSMI#
GPIO4/CLKRUN#
GPIO5/PREQ5#
GPIO6/PGNT5#
GPIO8/RING
GPIO9/AC_SDIN2
GPIO10/AC_SDIN3
GPIO11/OSC25M/STP_PCI#
GPIO12/CPUSTP#
R311 0
R311 0
+/-5% R0603
+/-5% R0603
*
*
Dummy
R312 0
R312 0
Dummy
+/-5% R0603
+/-5% R0603
*
*
Dummy
Dummy
OSC25MHI
TXCLK
TXEN
TXD0
TXD1
TXD2
TXD3
NC34
NC31
NC32
NC30
RXCLK
RXDV
RXER
RXD0
RXD1
RXD2
RXD3
NC36
NC35
NC38
NC37
NC33
MDC
MDIO
MIIAVDD
MIIAVSS
GPIO7
GPIO9
LAN_RESETJGPWAK-
COL
CRS
U25B
U25B
964
964
D7
C7
D10
E10
E11
D12
C12
E13
D13
E14
C14
D15
C13
A12
A13
B12
A11
B11
C11
A10
C10
A9
B9
A14
B14
C15
C9
E9
B7
A6
Y3
AE3
Y4
AA1
AA2
AA3
AA4
A4
C6
C5
C4
F6
E5
MCLK25I
MCLK25O
STXEN
STXD0
STXD1
STXD2
STXD3
RXCLKLFRAME-
RXDV
RXER
RXD1
RXD2
RXD3
COL
CRS
SMDC
SMDIO
LAN_RESETJ
GPIO9
GPIO11
4
TXCLK
MDC
MDIO
MIIAVDDSDATO
MIIAVSS
ID2
ID3
THERM-
INTR-
ID1
ID0
-KEYLOCK
TXCLK 35
TXEN
TXEN 35
TXD0
TXD0 35
TXD1
TXD1 35
TXD2
TXD2 35
TXD3
TXD3 35
RXCLK 35
RXDV 35
RXER 35
RXD0 35
RXD1 35
RXD2 35
RXD3 35
COL 35
CRS 35
MDC 35
MDIO 35
LAN_RESETJ 35
RING 30
BIOS_TBL_PROTECT 31
3
RN66 22
RN66 22
STXEN
1
*
*
STXD0
3
STXD1
5
STXD2
7 8
RN67
RN67
SMDIO MDIO
1
*
*
SMDC
3
STXD3
5
7 8
THERMTRIPJ5
INTR-
THERM- 28
*
*
BAT
R332
R332
*
*
1M
1M
+/-5%
+/-5%
R0603
R0603
7/28
7/28
R337
R337
4.7K
4.7K
+/-5%
+/-5%
R0603
R0603
2
1
INTRINTR
+/-5%
+/-5%
2
4
6
22
22
+/-5%
+/-5%
2
4
6
B
2
TXEN
TXD0
TXD1
TXD2
MIIAVDD
MDC
TXD3
VCC3 VCC3
R335
R335
*
*
*
*
1K
1K
+/-5%
+/-5%
R0603
R0603
B
Q33
Q33
MMBT3904
MMBT3904
E C
VCC3 VCC3VCC3
*
*
ID0 ID3ID2
*
*
Title
Title
Title
Document Number Rev
Document Number Rev
Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
R336
R336
300
300
+/-5%
+/-5%
R0603
R0603
STHERMTRIP-
Q32
Q32
MMBT3904
MMBT3904
E C
-KEYLOCK37
R340
R340
4.7K
4.7K
+/-1%
+/-1%
R0603
R0603
Dummy
Dummy
R339
R339
4.7K
4.7K
+/-1%
+/-1%
R0603
R0603
Dummy
Dummy
MIIAVSS
X5_1
X5_1
Crystal Retainer
Crystal Retainer
LAN_RESETJ
PME-
VCC3
*
*
ID1
*
*
THERMÂGPIO11
SMBDAT
SMBCLK
SENTEST
964_2
964_2
964_2
BC872
BC872
0.1uF
0.1uF
*
*
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
C0603
C0603
MCLK25O
MCLK25I
*
*
OSC32KHO
OSC32KHI
*
*
R308 4.7K
R308 4.7K
R293 4.7K
R293 4.7K
R776 4.7K
R776 4.7K
R345
R333
R333
4.7K
4.7K
+/-1%
+/-1%
R0603
R0603
Dummy
Dummy
R331
R331
4.7K
4.7K
+/-1%
+/-1%
R0603
R0603
Dummy
Dummy
R295 4.7K
R295 4.7K
R296 4.7K
R296 4.7K
R297 4.7K
R297 4.7K
R298 4.7K
R298 4.7K
R345
*
*
4.7K
4.7K
+/-1%
+/-1%
R0603
R0603
Dummy
Dummy
R344
R344
*
*
4.7K
4.7K
+/-1%
+/-1%
R0603
R0603
Dummy
Dummy
*
*
*
*
*
*
*
*
R294
R294
0
0
+/-5%
+/-5%
*
*
R0603
R0603
661M08
661M08
661M08
R291
R291
1M
1M
+/-5%
+/-5%
*
*
R0603
R0603
X4
X4
1 2
XTAL-25MHz
XTAL-25MHz
BC873
BC873
15pF
15pF
50V, NPO, +/-5%
50V, NPO, +/-5%
C0603
C0603
R292
R292
10M
10M
*
*
X5 XTAL-32.768kHzX5 XTAL-32.768kHz
1 2
BC876
BC876
3
4
15pF
15pF
50V, NPO, +/-5%
50V, NPO, +/-5%
C0603
C0603
Dummy
Dummy
*
*
*
*
*
*
*
*
*
*
VCC3
R343
R343
4.7K
4.7K
+/-1%
+/-1%
R0603
R0603
Dummy
Dummy
R342
R342
4.7K
4.7K
+/-1%
+/-1%
R0603
R0603
Dummy
Dummy
TECHNOLOGY COPR.
TECHNOLOGY COPR.
TECHNOLOGY COPR.
14 44Monday, August 01, 2005
14 44Monday, August 01, 2005
14 44Monday, August 01, 2005
1
SB1.8V
BC874
BC874
15pF
15pF
*
*
50V, NPO, +/-5%
50V, NPO, +/-5%
C0603
C0603
BC877
BC877
22pF
22pF
*
*
50V, NPO, +/-5%
50V, NPO, +/-5%
C0603
C0603
SB3V
of
of
of
A
A
A
A
8
A
VCC1.8V
FB12
FB12
21
FB L0603 80 Ohm
FB L0603 80 Ohm
BC912
BC912
10nF
10nF
*
*
C0603
C0603
D D
SB1.8V
*
*
C C
VCC1.8V
VCC1.8V
VCC1.8V
B B
FB13
FB13
FB L0603 80 Ohm
FB L0603 80 Ohm
FB9
FB9
FB L0603 80 Ohm
FB L0603 80 Ohm
FB10
FB10
21
FB L0603 80 Ohm
FB L0603 80 Ohm
21
BC864
BC864
10nF
10nF
*
*
C0603
C0603
21
*
*
BC870
BC870
10nF
10nF
C0603
C0603
BC867
BC867
10nF
10nF
*
*
*
*
C0603
C0603
CLK_SATAJ17
CLK_SATA17
SATARXAVDD
BC871
BC871
1uF
1uF
*
*
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
C0603
C0603
SATARXAVSS
7
SATACMPAVDD
BC858
BC858
0.1uF
0.1uF
*
*
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
C0603
C0603
SATACMPAVSS
UV0+41
UV0-41
UV1+41
UV1-41
UV2+27
UV2-27
UV3+27
UV3-27
UV4+27
UV4-27
UV5+27
UV5-27
UV6+27
UV6-27
UV7+27
UV7-27
OC0123-27
OC4567-27
BC862
BC862
BC863
BC863
10nF
10nF
0.1uF
0.1uF
*
*
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
C0603
C0603
C0603
C0603
BC865
BC865
1uF
1uF
*
*
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
C0603
C0603
SATATXAVDD
BC868
BC868
1uF
1uF
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
C0603
C0603
SATATXAVSS
SATACMPAVSS
SATACLKÂSATACLK
0728 For SATA Eye.
Change Value from 374 to 332
SATA_1
SATA_1
SATA_2
SATA_2
UV0+
UV0ÂUV1+
UV1ÂUV2+
UV2ÂUV3+
UV3ÂUV4+
UV4ÂUV5+
UV5ÂUV6+
UV6ÂUV7+
UV7-
OC0123-
OC4567-
SATARXAVDD
SATARXAVSS
SATATXAVDD
SATATXAVSS
SATACMPAVDD
SATACMPAVSS
R2504
R2504
8
9
SATA
SATA
8
9
SATA
SATA
6
G26
UV0+
G25
UV0-
H24
UV1+
H23
UV1-
C21
UV2+
D21
UV2-
A22
UV3+
B22
UV3-
C19
UV4+
D19
UV4-
A20
UV5+
B20
UV5-
C17
UV6+
D17
UV6-
A18
UV7+
B18
UV7-
C26
OC0#
C24
OC1#
D26
OC2#
D25
OC3#
D24
OC4#
E24
OC5#
E23
OC6#
F22
OC7#
E18
UVDD18
E20
UVDD18
E22
UVDD18
F17
UVDD18
F18
UVDD18
F19
UVDD18
F20
UVDD18
F21
UVDD18
G22
UVDD18
H22
UVDD18
AA6
IVDD
AA7
IVDD
AA8
IVDD
AA9
IVDD
AA10
IVDD
AB6
IVDD
AF3
IVDD
AD4
VSS
Y2
IVDD
Y1
VSS
AB5
IVDD
AD5
VSS
332
332
AC5
AE4
AF4
NC
NC
NC
STX1P
STX1N
SRX1N
SRX1P
STX2P
STX2N
SRX2N
SRX2P
R0603+/-1%
R0603+/-1%
1
2
3
4
5
6
7
1
2
3
4
5
6
7
964-3
5
USB
SATA
SB1.8V
OSC12MHI
OSC12MHO
USBREF
USBPVDD18
USBPVSS18
USBCMPAVDD18
USBCMPAVSS18
USBCMPAVDD33
USBCMPAVSS33
UVDD33
UVDD33
UVDD33
IVDD_AUX
IVDD_AUX
GPIO21/EESK
GPIO22/EEDI
GPIO23/EEDO
GPIO24/EECS
IPB_OUT0/PLLENN
IPB_OUT1/ZCLKSEL
TRAP0
TRAP1
NC
NC
NC
NC
NC
NC
NC
NC
NC
4
U25C
U25C
964
964
R0603
R0603
GPIO24
GPIO21
GPIO22
GPIO23
USBCMPAVDD1.8
BC859
BC859
0.1uF
0.1uF
*
*
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
C0603
C0603
USBCMPAVSS1.8
E25
E26
A24
F24
F23
A25
B24
USBCMPAVDD3.3
D23
C23
G16
G18
H20
G21
H21
AD7
AC7
AF6
AE6
AD9
AC9
AF8
AE8
AB4
A16
A15
B16
B15
IPB_OUT0
A26
IPB_OUT1
B25
B26
C25
R284
R284
22
22
+/-5%
+/-5%
*
*
SB3V
R2497
R2497
4.7K
4.7K
+/-5%
+/-5%
R0603
R0603
Dummy
Dummy
OSC12MHI
OSC12MHO
USBREF
USBPVDD1.8
USBCMPAVDD1.8
USBCMPAVSS1.8
IVDD_AUX
IVDD_AUX
STX1P
STX1N
SRX1P
SRX1N
STX2P
STX2N
SRX2P
SRX2N
SATA_LED
GPIO21
GPIO22
GPIO23
GPIO24
R282
R282
R283
R283
*
*
*
*
R285
R285
22
22
+/-5%
+/-5%
*
*
R0603
R0603
U43
U43
1
CS
2
SK
3
DI
4
DO
AT93C46-2.7V
AT93C46-2.7V
Dummy
Dummy
BC860
BC860
0.1uF
0.1uF
*
*
C0603
C0603
FDLL4148
FDLL4148
2 1
4.7K Dummy
4.7K Dummy
4.7K Dummy
4.7K Dummy
15 mils
VCC
NC
ORG
GND
D15
D15
SB3V
R277
R277
127
127
+/-1%
+/-1%
*
*
R0603
R0603
*
*
8
7
6
5
3
BC861
BC861
0.1uF
0.1uF
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
C0603
C0603
HDDLED 26,36
SB3V
R10
R10
0
0
R0603
R0603
+/-5%
+/-5%
2
USB12M 17
SB3V
FB11
FB11
21
FB L0603 80 Ohm
FB L0603 80 Ohm
R278
R278
IPB_OUT0
R279
R279
IPB_OUT1
IVDD_AUX
USBPVDD1.8
*
*
OSC12MHO
OSC12MHI
Title
Title
Title
Document Number Rev
Document Number Rev
Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
964_3
964_3
964_3
4.7K Dummy
4.7K Dummy
*
*
4.7K Dummy
4.7K Dummy
*
*
BC866
BC866
0.1uF
0.1uF
*
*
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
C0603
C0603
BC869
BC869
0.1uF
0.1uF
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
C0603
C0603
BC913
BC913
10pF
10pF
*
*
C0603
C0603
Dummy
Dummy
661M08
661M08
661M08
SB3V
*
*
X3
X3
Dummy
Dummy
1 2
XTAL-12MHz
XTAL-12MHz
Dummy
Dummy
R286
R286
1M
1M
+/-5%
+/-5%
R0603
R0603
TECHNOLOGY COPR.
TECHNOLOGY COPR.
TECHNOLOGY COPR.
1
SB1.8V
Dummy
Dummy
15 44Monday, August 01, 2005
15 44Monday, August 01, 2005
15 44Monday, August 01, 2005
SB1.8V
BC914
BC914
10pF
10pF
*
*
C0603
C0603
0.6
A
A
A
A
8
A
D D
FSB_VTT
BC918
BC918
0.1uF
0.1uF
*
*
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
C0603
C0603
VCC3
C C
B B
VCC1.8V
7
*
*
*
*
*
*
*
*
*
*
BC835
BC835
0.1uF
0.1uF
*
*
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
C0603
C0603
Put under 96X solder side
BC843
BC843
0.1uF
0.1uF
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
C0603
C0603
BC846
BC846
0.1uF
0.1uF
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
C0603
C0603
Dummy
Dummy
BC849
BC849
0.1uF
0.1uF
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
C0603
C0603
BC852
BC852
0.1uF
0.1uF
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
C0603
C0603
Dummy
Dummy
BC855
BC855
0.1uF
0.1uF
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
C0603
C0603
VCC1.8V
VCC3
6
BC847
BC847
0.1uF
0.1uF
*
*
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
C0603
C0603
BC850
BC850
0.1uF
0.1uF
*
*
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
C0603
C0603
Dummy
Dummy
BC853
BC853
0.1uF
0.1uF
*
*
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
C0603
C0603
BC856
BC856
0.1uF
0.1uF
*
*
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
C0603
C0603
Dummy
Dummy
BC831
BC831
0.1uF
0.1uF
*
*
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
C0603
C0603
BC833
BC833
0.1uF
0.1uF
*
*
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
C0603
C0603
BC836
BC836
0.1uF
0.1uF
*
*
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
C0603
C0603
BC840
BC840
0.1uF
0.1uF
*
*
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
C0603
C0603
FSB_VTT
SB3V
SB3V
5
SB1.8V
FSB_VTT
BC842
BC842
0.1uF
0.1uF
*
*
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
C0603
C0603
BC848
BC848
0.1uF
0.1uF
*
*
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
C0603
C0603
Dummy
Dummy
BC851
BC851
0.1uF
0.1uF
*
*
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
C0603
C0603
BC854
BC854
0.1uF
0.1uF
*
*
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
C0603
C0603
Dummy
Dummy
BC857
BC857
0.1uF
0.1uF
*
*
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
C0603
C0603
BC830
BC830
0.1uF
0.1uF
*
*
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
C0603
C0603
BC832
BC832
0.1uF
0.1uF
*
*
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
C0603
C0603
BC837
BC837
0.1uF
0.1uF
*
*
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
C0603
C0603
BC841
BC841
0.1uF
0.1uF
*
*
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
C0603
C0603
SB3V
4
BC844
BC844
10nF
10nF
*
*
C0603
C0603
VCC3
FSB_VTT
SB1.8V
BC845
BC845
0.1uF
0.1uF
*
*
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
C0603
C0603
VCC1.8V
W21
M21
AB18
AB16
AB14
AB11
AA5
AA21
AB19
AB13
AB20
AB17
AB15
AB12
AB10
AA22
AB21
W22
M26
M25
M24
M23
M22
P26
P21
R21
T25
V25
V21
Y25
Y21
N21
T21
U21
L21
K21
J21
F12
F15
B10
B13
E12
E15
F10
F11
F13
G20
F14
P25
P24
P23
N26
N25
N24
N23
N22
L26
L25
L24
L23
L22
Y5
T5
R5
L5
G5
U5
M5
H5
W5
V5
P5
N5
K5
J5
F9
E7
F7
E8
3
VDDZ
VDDZ
VDDZ
VDDZ
VDDZ
VDDZ
VDDZ
VDDZ
VDDZ
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
PVDD
PVDD
PVDD
PVDD
PVDD
PVDD
PVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
VTT
VTT
IVDD_AUX
IVDD_AUX
IVDD_AUX
OVDD_AUX
OVDD_AUX
OVDD_AUX
OVDD_AUX
OVDD_AUX
OVDD_AUX
OVDD_AUX
OVDD_AUX
OVDD_AUX
OVDD_AUX
PVDD_AUX
PVDD_AUX
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9
NC10
NC11
NC12
NC13
NC14
NC15
NC16
NC17
NC18
NC19
K26
NC20
K25
NC21
K24
NC22
NC23
K23
J26
964-4
Power
NC24
NC25
NC26
NC27
NC28
NC29
J25
J22
F16
K22
E16
VSSD9VSS
D11
D14
VSS
2
VSSZ
R23
U23
VSSZ
W23
VSSZ
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSZ
VSSZ
VSSZ
VSSZ
VSSZ
VSSZ
VSSZ
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
AVSSSATA
AVSSSATA
AVSSSATA
AVSSSATA
AVSSSATA
AVSSSATA
AVSSSATA
AVSSSATA
AVSSSATA
AVSSSATA
AVSSSATA
AVSSSATA
AVSSSATA
AVSSSATA
AVSSSATA
AVSSSATA
AVSSSATA
AVSSSATA
AVSSSATA
U25D
U25D
L10
L11
L12
M10
M11
M12
N10
N11
N12
N13
N14
N15
N16
P10
P11
P12
P13
P14
R10
R11
R12
R13
R14
T10
T13
T14
U10
U13
U14
U15
P15
P16
R15
R16
T15
T16
U16
F25
F26
G23
G24
H25
H26
J23
J24
A23
B23
C22
D22
A21
B21
E21
C20
D20
A19
B19
E19
C18
D18
A17
B17
E17
C16
D16
L13
L14
L15
L16
M13
M14
M15
M16
AD10
AC10
AF9
AE9
AB9
AD8
AC8
AB8
AF7
AE7
AB7
AD6
AC6
AF5
AE5
T11
T12
U11
U12
964
964
1
A
TECHNOLOGY COPR.
TECHNOLOGY COPR.
Title
Title
Title
Document Number Rev
Document Number Rev
Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
964_4
964_4
964_4
661M08
661M08
661M08
TECHNOLOGY COPR.
0.6
A
A
16 44Monday, August 01, 2005
16 44Monday, August 01, 2005
16 44Monday, August 01, 2005
A
8 7 6 5 4 3 2 1
A
VCC3
21
FB1
3D3V_CLKM
FB1
FB L0805 300 Ohm
FB L0805 300 Ohm
D D
BC807
BC807
BC808
BC806
BC803
BC803
4.7uF
4.7uF
C0805
C0805
6.3V, X5R, +/-10%
6.3V, X5R, +/-10%
BC804
BC804
1uF
1uF
*
*
*
*
VCCP
C C
*
*
Dummy
Dummy
*
*
R260
R260
220
220
VRMPWRGD7,38
BC805
BC805
10nF
10nF
B
*
*
VCC3
*
*
BC806
1uF
1uF
E C
BC808
10nF
10nF
1uF
1uF
*
*
*
*
R38
R38
1K
1K
+/-5%
+/-5%
R0603
R0603
Dummy
Dummy
B
Q30
Q30
MMBT3904
MMBT3904
Dummy
Dummy
VCC3
FB2 BLM18BB470SN1DFB2 BLM18BB470SN1D
BC823
BC823
4.7uF
4.7uF
*
*
6.3V, X5R, +/-10%
6.3V, X5R, +/-10%
C0805
C0805
*
*
VCC3
*
*
SBPWRGD14,38
BC809
BC809
10nF
10nF
R253
R253
1K
1K
+/-5%
+/-5%
R0603
R0603
Dummy
Dummy
E C
BC810
BC810
1uF
1uF
*
*
Q29
Q29
MMBT3904
MMBT3904
Dummy
Dummy
21
BC811
BC811
10nF
10nF
*
*
R4
R4
0
0
+/-5%
+/-5%
R0603
R0603
R261 475
R261 475
CLK_PLLVCC
*
*
*
*
BC824
BC824
0.1uF
0.1uF
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
C0603
C0603
B B
Co-lay with ICS952018
ICS952018 ICS952017
SiS964/964L SiS964L
U24
U24
1
VDD_REF
11
VDDZ
13
VDD_PCI
19
VDD_PCI
28
VDD48
29
VDDAGP
42
VDDCPU
48
VDDSRC
5
VSSREF
8
VSSZ
18
VSSPCI
23
VSSPCI
24
VSS48
32
VSSAGP
41
VSSCPU
45
VSSSRC
33
VttPWR_GD/PD#
38
IREF
4
Reset#
36
VDDA
37
VSSA
ICS952017
ICS952017
**FS_3/PCICLK6
**FS_4/PCICLK7
~**Sel24_48#/24_48MHz
12_48MHz/SEL12_48#**
X1
6
X2
X2
1 2
XTAL-14.318MHz
XTAL-14.318MHz
BC828
BC828
22pF
22pF
*
*
C0603
C0603
50V, NPO, +/-5%
50V, NPO, +/-5%
CPUCLK0
CPUCLK#0
CPUCLK1
CPUCLK#1
AGPCLK0
AGPCLK1
ZCLK0
ZCLK1
PCICLK0
PCICLK1
PCICLK2
PCICLK3
PCICLK4
*FS2/PCICLK5
**FS0/REF0
**FS1/REF1
SCLK
SDATA
SRCCLK
SRCCLK#
48MHz
X2
7
BC829
BC829
22pF
22pF
*
*
C0603
C0603
50V, NPO, +/-5%
50V, NPO, +/-5%
R241 33
R241 33
40
R242 33
R242 33
39
44
43
31
30
9
10
14
15
16
17
20
21
22
12
2
3
26
35
34
47
46
27
25
*
*
*
*
R243 33
R243 33
R244 33
R244 33
*
*
*
*
R249 22
R249 22
R250 22
R250 22
*
*
*
*
R251 22
R251 22
R252 22
R252 22
*
*
*
*
FS3
FS4
RN55 33 8P4R0603 +/-5%
RN55 33 8P4R0603 +/-5%
33_PCI3
33_PCI1
33_PCI2
33_964 96XPCLK
33M_FWH CK_33M_FWH
FS2
FS0
FS1 AUDIO_CLK
USB_12M
CK_48M
7 8
5
3
*
*
1
R784
R784
R783 33
R783 33
*
*
*
*
R262 22
R262 22
R263 22
R263 22
*
*
R264 33
R264 33
*
*
*
*
R265 0
R265 0
USB_12M
Note: Select USB 12MHz Note: Select ICS952018 when low
*
*
R266 33
R266 33
R267 33
R267 33
*
*
*
*
R9 33 R0603 +/-5%R9 33 R0603 +/-5%
R270 22
R270 22
*
*
VCC3
R254
R254
*
*
1K
1K
+/-5%
+/-5%
R0603
R0603
Reserved
Reserved
6
4
2
33
33
R245
R245
*
*
49.9
49.9
+/-1%
+/-1%
R0603
R0603
CK_48M_SIO
CK_48M
R246
R246
*
*
*
*
49.9
49.9
+/-1%
+/-1%
R0603
R0603
R255
R255
*
*
1K
1K
+/-5%
+/-5%
R0603
R0603
Dummy
Dummy
CPUCLK0 5
CPUCLK-0 5
CPUCLK1 9
R247
R247
R248
R248
*
*
49.9
49.9
49.9
49.9
+/-1%
+/-1%
+/-1%
+/-1%
R0603
R0603
R0603
R0603
AGPCLK0
AGPCLK1
ZCLK0
ZCLK1
SIOPCLK
PCICLK3
PCICLK1
PCICLK2
REFCLK2
REFCLK1
USB12M 15
CK_48M_SIO 28
Change R273 and R274
from 2.7K to 10K
CPUCLK-1 9
AGPCLK0 9
AGPCLK1 19
ZCLK0 11
ZCLK1 13
SIOPCLK 28
PCICLK3 25
PCICLK1 24
PCICLK2 24
96XPCLK 13
CK_33M_FWH 31
REFCLK2 11
REFCLK1 14
AUDIO_CLK 33
*
*
R269
R269
49.9
49.9
+/-1%
+/-1%
R0603
R0603
R268
R268
*
*
49.9
49.9
+/-1%
+/-1%
R0603
R0603
?
SMBCLK 14,18,21
SMBDAT 14,18,21
CLK_SATA 15
CLK_SATAJ 15
By-Pass Capacitors
Place near to the Clock Outputs
AGPCLK0
AGPCLK1
ZCLK0
ZCLK1
AUDIO_CLK
REFCLK2
REFCLK1
AUDIO_CLK
CK_48M_SIO
BC813
BC813
10pF
10pF
*
*
50V, NPO, +/-5%
50V, NPO, +/-5%
C0603
C0603
Dummy
Dummy
BC815
BC815
10pF
10pF
*
*
50V, NPO, +/-5%
50V, NPO, +/-5%
C0603
C0603
Dummy
Dummy
BC816 10pF
BC816 10pF
BC822
BC822
10pF
10pF
*
*
50V, NPO, +/-5%
50V, NPO, +/-5%
C0603
C0603
Dummy
Dummy
BC826
BC826
10pF
10pF
*
*
50V, NPO, +/-5%
50V, NPO, +/-5%
C0603
C0603
Dummy
Dummy
*
*
BC812
BC812
10pF
10pF
*
*
50V, NPO, +/-5%
50V, NPO, +/-5%
C0603
C0603
Dummy
Dummy
BC814
BC814
10pF
10pF
*
*
50V, NPO, +/-5%
50V, NPO, +/-5%
C0603
C0603
Dummy
Dummy
BC821
BC821
10pF
10pF
*
*
50V, NPO, +/-5%
50V, NPO, +/-5%
C0603
C0603
Dummy
Dummy
BC827
BC827
10pF
10pF
*
*
50V, NPO, +/-5%
50V, NPO, +/-5%
C0603
C0603
Dummy
Dummy
FS3
FS2BSEL0
A
TECHNOLOGY COPR.
TECHNOLOGY COPR.
Title
Title
Title
Document Number Rev
Document Number Rev
Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Clock Gen
Clock Gen
Clock Gen
661M08
661M08
661M08
TECHNOLOGY COPR.
A
A
of
17 44Monday, August 01, 2005
of
17 44Monday, August 01, 2005
of
17 44Monday, August 01, 2005
A
R273 10K R0603
BSEL06
BSEL16
BSEL1
*
*
R273 10K R0603
R274 10K R0603
R274 10K R0603
R275
R275
10K
10K
+/-5%
+/-5%
R0603
R0603
Dummy
Dummy
*
*
*
*
8 7 6 5 4 3 2 1
A
VCC2.5_MEM
FB14
FB14
21
D D
FB L0603 47 Ohm
FB L0603 47 Ohm
BC143
BC143
0.1uF
0.1uF
*
*
DUMMY
DUMMY
BC146
BC146
10nF
10nF
*
*
BC144
BC144
10nF
10nF
*
*
*
*
BC147
BC147
0.1uF
0.1uF
BC145
BC145
0.1uF
0.1uF
*
*
BC148
BC148
0.1uF
0.1uF
*
*
CBVDD
DDRCLK[0..5] 21
DDRCLK-[0..5] 21
Clock Buffer (DDR)
U9
12
23
10
11
3
U9
ICS93732
ICS93732
VDD
VDD
VDD
AVDD
AGND
CLK0
CLK1
CLK2
CLK3
CLK4
CLK5
2
4
13
17
24
26
DDRCLK0
DDRCLK1
DDRCLK2
DDRCLK3
DDRCLK4
DDRCLK5
DDRCLK0 21
DDRCLK1 21
DDRCLK2 21
DDRCLK3 21
DDRCLK4 21
DDRCLK5 21
VCC2.5_MEM
BC150
BC150
0.1uF
0.1uF
*
*
CBVDD
BC151
BC151
10nF
10nF
C C
21
BC149
BC149
10uF
10uF
*
*
DUMMY
DUMMY
FB7
FB7
FB L0603 47 Ohm
FB L0603 47 Ohm
*
*
SMBCLK14,17,21
SMBDAT14,17,21
FWDSDCLKO10
SMBDAT
FWDSDCLKO
*
DUMMY
DUMMY
*
*
R1150 DUMMY*R1150 DUMMY
R1160
R1160
B B
7
22
8
18
20
9
SCLK
SDATA
CLK_IN
NC1
FB_IN
NC2
SSOP28FB
SSOP28FB
GND6GND28GND
15
CLK#0
CLK#1
CLK#2
CLK#3
CLK#4
CLK#5
FB_OUT
NC3
1
5
14
16
25
27
R117 0
R117 0
19
21
*
*
close to clock buffer
DDRCLK-0SMBCLK
DDRCLK-1
DDRCLK-2
DDRCLK-3
DDRCLK-4
DDRCLK-5
BC152
BC152
10pF
10pF
*
*
FB_OUT
DDRCLK-0 21
DDRCLK-1 21
DDRCLK-2 21
DDRCLK-3 21
DDRCLK-4 21
DDRCLK-5 21
TECHNOLOGY COPR.
TECHNOLOGY COPR.
Title
Title
Title
Document Number Rev
Document Number Rev
Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
DDR Clock Buffer
DDR Clock Buffer
DDR Clock Buffer
661M08
661M08
661M08
TECHNOLOGY COPR.
of
18 44Monday, August 01, 2005
of
18 44Monday, August 01, 2005
of
18 44Monday, August 01, 2005
A
A
A
A
8 7 6 5 4 3 2 1
A
SBA-[0..7]9
ST[0..2]9
AC-BE[0..3]9
AAD[0..31]9
ADSTBF[0..1]9
ADSTBS[0..1]9
SBA-[0..7]
ST[0..2]
AC-BE[0..3]
AAD[0..31]
ADSTBF[0..1]
ADSTBS[0..1]
VDDQ
SB3V
VCC3
VCC5
+12V
VDDQ
VCC3
NOTE: This AGP slot support
both AGP3.0 display card
and SiS301 video bridge
card.
GCDET- on card
GND
OPEN
GCDET- AVREFCG APERR
0V
1.47V
0.35V
0.75V0V1.5V
D D
AGP
AGP
B1
OVRCNT#
B2
+5V
B3
+5V
B4
USB+
B5
GND
B6
INTB#
B7
CLK
B8
REQ#
B9
VCC3.3
B10
ST0
B11
ST2
B12
RBF#
B13
GND
B14
RESERVEDB14
B15
SBA0
B16
VCC3.3
B17
SBA2
B18
SB_STB
B19
GND
B20
SBA4
B21
SBA6
B22
DBI_LO
B23
GND
B24
VCC3_AUX
B25
VCC3.3
B26
AD31
B27
AD29
B28
VCC3.3
B29
AD27
B30
AD25
B31
GND
B32
AD_STB1
B33
AD23
B34
VDDQ
B35
AD21
B36
AD19
B37
GND
B38
AD17
B39
C/BE#2
B40
VDDQ
B41
IRDY#
B46
DEVEL#
B47
VDDQ
B48
PERR#
B49
GND
B50
SERR#
B51
C/BE1#
B52
VDDQ
B53
AD14
B54
AD12
B55
GND
B56
AD10
B57
AD8
B58
VDDQ
B59
AD_STB0
B60
AD7
B61
GND
B62
AD5
B63
AD3
B64
VDDQ
B65
AD1
B66
VREF_CG
AGP_SLOT_124P
AGP_SLOT_124P
ST0
ST2
SBA-0
SBA-2
SBSTBF
SBA-4
SBA-6
AAD31
AAD29
AAD27
AAD25
ADSTBF1
AAD23
AAD21
AAD19
AAD17
AC-BE2
APERR
AC-BE1
AAD14
AAD12
AAD10
AAD8
ADSTBF0
AAD7
AAD5
AAD3
AAD1
AVREFCG
INT-B
AGPCLK1
AREQ
RBF
AIRDY
INT-B13,24,25
AGPCLK117
AREQ9
RBF9
DBI_LOW9
SBSTBF9
C C
AIRDY9
ADEVSEL9
ASERR9
B B
TYPEDET#
GC_AGP8X_DET
MB_AGP8X_DET
RESERVEDA24
AD_STB1#
AD_STB0#
11223
3
AGP CONNECTOR DECOUPLING
put CAP close to AGP slot each POWER PIN
VDDQ
*
*
BC155
BC155
10nF
10nF
BC156
BC156
10nF
10nF
BC157
BC157
10nF
10nF
*
*
*
*
*
*
*
*
BC158
BC158
BC159
BC159
10nF
10nF
10nF
10nF
+12V
USB-
GND
INTA#
RST#
GNT#
VCC3.3
ST1
PIPE#
GND
WBF#
SBA1
VCC3.3
SBA3
SB_STB#
GND
SBA5
SBA7
DBI_HI
GND
VCC3.3
AD30
AD28
VCC3.3
AD26
AD24
GND
C/BE3#
VDDQ
AD22
AD20
GND
AD18
AD16
VDDQ
FRAME#
TRDY#
STOP#
PME#
GND
PAR
AD15
VDDQ
AD13
AD11
GND
AD9
C/BE0#
VDDQ
AD6
GND
AD4
AD2
VDDQ
AD0
VREF_GC
VCC3
*
*
BC160
BC160
10nF
10nF
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A46
A47
A48
A49
A50
A51
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
A63
A64
A65
A66
+12V SB3VVCC5
*
*
BC161
BC161
10nF
10nF
*
*
WBF
BC162
BC162
10nF
10nF
GCDET-
INT-A
PCIRST-
AGNT
ST1
DBI_HI
SBA-1
SBA-3
SBSTBS
SBA-5
SBA-7
AAD30
AAD28
AAD26
AAD24
ADSTBS1
AC-BE3
AAD22
AAD20
AAD18
AAD16
ATRDY
ASTOP
PMEÂAPAR
AAD15
AAD13
AAD11
AAD9
AC-BE0
ADSTBS0
AAD6
AAD4
AAD2
AAD0
AFRAME
*
*
BC163
BC163
10nF
10nF
GCDET- 9
INT-A 11,13,24,25
PCIRST- 13,24,25,26,35
AGNT 9
DBI_HI 9
WBF 9
SBSTBS 9
AFRAME 9
ATRDY 9
ASTOP 9
PME- 14,24,25,28
APAR 9
AVREFGC 9
BC154
BC154
0.1uF
0.1uF
*
*
close to 660
VDDQ
*
*
EC13
EC13
1000uF
1000uF
6.3V, +/-20%
6.3V, +/-20%
ce35d80h140
ce35d80h140
GCDET-
close to AGP SLOT
VCC5VCC3 VDDQ
R118
R118
*
*
124
124
+/-1%
R121
R121
54.9
54.9
Q10
Q10
2N7002
2N7002
R124
R124
8.2K
8.2K
Q12
Q12
2N7002
2N7002
R125
R125
1K
1K
+/-1%
R0603
R0603
AVREFCG
R122
R122
*
*
124
124
*
*
APERR
TECHNOLOGY COPR.
TECHNOLOGY COPR.
TECHNOLOGY COPR.
19 44Monday, August 01, 2005
19 44Monday, August 01, 2005
19 44Monday, August 01, 2005
R120
R119
R119
*
*
10K
10K
R123 4.3K
R123 4.3K
*
*
Title
Title
Title
Document Number Rev
Document Number Rev
Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
R120
*
*
10K
10K
*
*
DS
G
Q11
Q11
B
MMBT3904
MMBT3904
E C
VDDQ
*
*
DS
G
*
*
AGP
AGP
AGP
661M08
661M08
661M08
BC153
BC153
10nF
10nF
of
of
of
A
A
A
A
5
4
3
2
1
D D
VCC5
BC1100
BC1100
0.1uF
0.1uF
*
*
Dummy
Dummy
C C
ROUT11
GOUT11
BOUT11
B B
ROUT
GOUT
BPUT
21
D482
D482
BAV99
BAV99
3
Dummy
Dummy
R128
R128
*
*
75
75
BC165
BC165
6.8pF
6.8pF
*
*
21
D483
D483
BAV99
BAV99
3
Dummy
Dummy
FB15 FB L0603 75 OhmFB15 FB L0603 75 Ohm
FB16 FB L0603 75 OhmFB16 FB L0603 75 Ohm
FB17 FB L0603 75 OhmFB17 FB L0603 75 Ohm
R130
*
6.8pF
6.8pF
75
75
*
*
BC166
BC166
R129
R129
*
R130
*
*
75
75
*
*
21
3
ET1206L
19ohm@100MHz?
BC167
BC167
6.8pF
6.8pF
VGA CONNECTOR
D484
D484
BAV99
BAV99
Dummy
Dummy
*
*
135
Dummy
Dummy
21
21
21
BC168
BC168
6.8pF
6.8pF
*
*
*
*
close to GND gap
642
RN77
RN77
0
0
8P4R0603
8P4R0603
+/-5%
+/-5%
7 8
BC164
BC164
0.1uF
0.1uF
*
*
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
C0603
C0603
BC170
BC170
BC169
BC169
6.8pF
6.8pF
6.8pF
6.8pF
*
*
VCC5
F3
F3
F1210_1.1A
F1210_1.1A
1 2
Reserved
Reserved
CONNECTOR
TOP VIEW
VGA
VGA
VGA15P
VGA15P
*
*
BC171
BC171
470pF
470pF
Reserved
Reserved
*
*
BC172
BC172
470pF
470pF
Reserved
Reserved
*
*
BC173
BC173
470pF
470pF
Reserved
Reserved
*
*
BC174
BC174
470pF
470pF
Reserved
Reserved
R126
R126
*
*
2.2K
2.2K
For EMI.
VCC5
*
*
R127
R127
2.2K
2.2K
DDC1DATA
HSYNC
VSYNC
DDC1CLK
DDC1DATA 11
HSYNC 11
VSYNC 11
DDC1CLK 11
VCC5
21
D485
D485
BAV99
BAV99
3
Dummy
Dummy
A A
Title
Title
Title
Document Number Rev
Document Number Rev
Document Number Rev
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
VGA
VGA
VGA
661M08
661M08
661M08
21
D486
D486
BAV99
BAV99
3
Dummy
Dummy
1
BC1104
BC1104
0.1uF
0.1uF
*
*
Dummy
Dummy
TECHNOLOGY COPR.
TECHNOLOGY COPR.
TECHNOLOGY COPR.
A
A
of
20 44Monday, August 01, 2005
of
20 44Monday, August 01, 2005
of
20 44Monday, August 01, 2005
A
8 7 6 5 4 3 2 1
A
MD[0..63]10,23
MA[0..14]10,23
DQM[0..7]10,23
DQS[0..7]10,23
D D
NOTE:
VDDID IS A TRAP ON THE DIMM
MODULE TO INDICATE:
VDDID
OPEN
GND
C C
REQUIRED POWER
VDD=VDDQ
VDD!=VDDQ
MEMORY MUX TABLE:
SDR
CS0
CS1
CS2
CS3
CS4
CS5 CS5
CSB0
CSB1
CSB2
CSB3
CSB4
CSB5
CSB6
CSB7
B B
DDRCLK[0..5]18
DDRCLK-[0..5]18
MD[0..63] MD[0..63]
MA[0..14] MA[0..14]
DQM[0..7]
DQS[0..7] DQS[0..7]
DDR
CS0
CS1
CS2
CS3
CS4
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
/RSRAS-10,23
/RSCAS-10,23
/RSWE-10,23
CS-[0..3]10,23
CKE[0..3]10
CS-[0..3]
CKE[0..3]
VCC2.5_MEM VCC2.5_MEM
DIMM1
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
VREF
VDDID
SCL
SDA
SA0
SA1
SA2
WP
DIMM1
VDDQ15VDDQ22VDDQ30VDDQ54VDDQ62VDDQ77VDDQ96VDDQ
2
4
6
8
94
95
98
99
12
13
19
20
105
106
109
110
23
24
28
31
114
117
121
123
33
35
39
40
126
127
131
133
53
55
57
60
146
147
150
151
61
64
68
69
153
155
161
162
72
73
79
80
165
166
170
171
83
84
87
88
174
175
178
179
1
82
90
92
91
181
182
183
VSS3VSS11VSS18VSS26VSS34VSS42VSS50VSS58VSS66VSS74VSS81VSS89VSS93VSS
DDR_DIMM
DDR_DIMM
DDRVREF DDRVREF
000
104
112
128
136
143
156
164
172
VSS
160
VSS
152
VSS
145
VSS
139
VSS
132
VDD7VDD38VDD46VDD70VDD85VDD
VSS
180
124
VDDQ
VSS
116
VDDQ
VSS
VDDQ
100
VDDQ
VDDQ
VDDQ
addr =
1010000b
VDDQ
VDDQ
108
120
VDD
148
VDD
168
VDD
184
130
125
122
141
118
115
103
113
107
119
129
149
159
169
177
140
134
135
142
144
101
102
173
167
154
157
158
163
111
137
138
48
43
41
37
32
29
27
59
52
97
5
14
25
36
56
67
78
86
47
44
45
49
51
9
10
65
63
71
21
16
76
17
75
VDDSPD
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
NC9
BA0
BA1
BA2
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DM8
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8
CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
NC1
NC5(RESET#)
NC2
NC3
NC4
A13
RAS#
CAS#
WE#
S0#
S1#
NC6(S2#)
NC7(S3#)
CKE0
CKE1
CK0
CK1
CK2
CK0#
CK1#
CK2#
176
MA0
MA1
MA2
MA3
MA4
MA5
MA6
MA7
MA8
MA9
MA10
MA13
MA14
MA11
MA12
DQM0
DQM1
DQM2
DQM3
DQM4
DQM5
DQM6
DQM7
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
/RSRAS- /RSRASÂ/RSCAS- /RSCASÂ/RSWE- /RSWE-
CS-0 CS-2
CS-1 CS-3
CKE0 WP CKE2
CKE1 SMBCLK CKE3 SMBCLK
DDRCLK0 DDRCLK5
DDRCLK3 DDRCLK4
DDRCLK2 DDRCLK1
DDRCLK-0 DDRCLK-5
DDRCLK-3 DDRCLK-4
DDRCLK-2 DDRCLK-1
DQM[0..7]
DIMM2
108
120
MD4
MD2
MD3
MD5
MD0
MD1
MD7
MD6
MD8
MD9
MD10
MD11
MD12
MD13
MD14
MD15
MD16
MD17
MD18
MD19
MD20
MD21
MD22
MD23
MD24
MD25
MD26
MD27
MD28
MD29
MD30
MD31
MD32
MD33
MD34
MD35
MD36
MD37
MD38
MD39
MD40
MD41
MD42
MD43
MD44
MD45
MD46
MD47
MD48
MD49
MD50
MD51
MD52
MD53
MD54
MD55
MD56
MD57
MD58
MD63
MD60
MD61
MD62
MD59
SMBDAT SMBDAT
DQM0
DQM1
DQM2
DQM3
DQM4
DQM5
DQM6
DQM7
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
MA0
MA1
MA2
MA3
MA4
MA5
MA6
MA7
MA8
MA9
MA10
MA13
MA14
MA11
MA12
148
168
184
130
125
122
141
118
115
103
113
107
119
129
149
159
169
177
140
134
135
142
144
101
102
173
167
154
157
158
163
111
137
138
48
43
41
37
32
29
27
59
52
97
5
14
25
36
56
67
78
86
47
44
45
49
51
9
10
65
63
71
21
16
76
17
75
VDD
VDD
VDD
VDDSPD
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
NC9
BA0
BA1
BA2
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DM8
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8
CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
NC1
NC5(RESET#)
NC2
NC3
NC4
A13
RAS#
CAS#
WE#
S0#
S1#
NC6(S2#)
NC7(S3#)
CKE0
CKE1
CK0
CK1
CK2
CK0#
CK1#
CK2#
176
180
VDD7VDD38VDD46VDD70VDD85VDD
VDDQ
VDDQ
VDDQ
Swap DATA for Layout
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
100
116
124
132
139
145
152
160
VDDQ
VDDQ
VDDQ
addr =
1010001b
VDDQ
VDDQ
104
112
128
136
143
156
164
172
DIMM2
VDDQ15VDDQ22VDDQ30VDDQ54VDDQ62VDDQ77VDDQ96VDDQ
MD4
2
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
VREF
VDDID
WP
SCL
SDA
SA0
SA1
SA2
VSS3VSS11VSS18VSS26VSS34VSS42VSS50VSS58VSS66VSS74VSS81VSS89VSS93VSS
Title
Title
Title
Document Number Rev
Document Number Rev
Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
4
6
8
94
95
98
99
12
13
19
20
105
106
109
110
23
24
28
31
114
117
121
123
33
35
39
40
126
127
131
133
53
55
57
60
146
147
150
151
61
64
68
69
153
155
161
162
72
73
79
80
165
166
170
171
83
84
87
88
174
175
178
179
1
82
90
92
91
181
182
183
DDR_DIMM
DDR_DIMM
MD2
MD3
MD5
MD0
MD1
MD7
MD6
MD8
MD9
MD10
MD11
MD12
MD13
MD14
MD15
MD16
MD17
MD18
MD19
MD20
MD21
MD22
MD23
MD24
MD25
MD26
MD27
MD28
MD29
MD30
MD31
MD32
MD33
MD34
MD35
MD36
MD37
MD38
MD39
MD40
MD41
MD42
MD43
MD44
MD45
MD46
MD47
MD48
MD49
MD50
MD51
MD52
MD53
MD54
MD55
MD56
MD57
MD58
MD63
MD60
MD61
MD62
MD59
8.2K
8.2K
WP
R132
R132
*
*
100
DIMM1, 2
DIMM1, 2
DIMM1, 2
VCC2.5_MEM
R131
R131
*
*
4.7K
4.7K
SMBCLK 14,17,18
SMBDAT 14,17,18
VCC2.5_MEM
661M08
661M08
661M08
DDRVREF 22
WP
TECHNOLOGY COPR.
TECHNOLOGY COPR.
TECHNOLOGY COPR.
A
A
of
21 44Monday, August 01, 2005
of
21 44Monday, August 01, 2005
of
21 44Monday, August 01, 2005
A
A
8
D D
7
6
5
4
3
2
1
DDRVREF GEN. & DECOUPLING
VCC2.5_MEM
R133
R133
BC175
75
75
+/-1%
+/-1%
R0603
R0603
R134
R134
75
75
+/-1%
+/-1%
R0603
R0603
*
*
*
*
*
*
BC179
BC179
0.1uF
0.1uF
BC175
10nF
10nF
BC176
BC176
10nF
10nF
*
*
*
*
BC180
BC180
0.1uF
0.1uF
DDRVREF
BC177
BC177
10nF
10nF
*
*
BC181
BC181
0.1uF
0.1uF
DDRVREF 21
*
*
*
*
*
*
*
*
BC182
BC182
0.1uF
0.1uF
BC183
BC183
0.1uF
0.1uF
BC184
BC184
0.1uF
0.1uF
BC185
BC185
0.1uF
0.1uF
*
*
C C
*
*
VCC2.5_MEM
B B
*
*
BC178
BC178
0.1uF
0.1uF
EMI
VCC5 VCC5 VCC5 VCC5 VCC5 VCC5
*
*
*
*
*
*
*
VCC3 VCC3 VCC3 VCC3
*
*
*
*
BC326
BC326
0.1uF
0.1uF
Reserved
Reserved
BC320
BC320
0.1uF
0.1uF
Reserved
Reserved
BC327
BC327
0.1uF
0.1uF
Reserved
Reserved
BC321
BC321
0.1uF
0.1uF
Reserved
Reserved
*
BC322
BC322
BC323
BC323
0.1uF
0.1uF
0.1uF
0.1uF
Reserved
Reserved
Reserved
Reserved
*
*
BC329
BC329
0.1uF
0.1uF
Reserved
Reserved
*
*
*
*
VCC5
BC324
BC324
0.1uF
0.1uF
Reserved
Reserved
BC331
BC331
0.1uF
0.1uF
Reserved
Reserved
*
*
VCC3
*
*
SB5V VDDQ
*
*
BC325
BC325
0.1uF
0.1uF
Reserved
Reserved
-12V +12V
*
*
BC341
BC341
0.1uF
0.1uF
Reserved
Reserved
BC342
BC342
0.1uF
0.1uF
Reserved
Reserved
BC344
BC344
0.1uF
0.1uF
Reserved
Reserved
VCC5 VCC5
*
BC328
BC328
0.1uF
0.1uF
Reserved
Reserved
*
BC332
BC332
0.1uF
0.1uF
Reserved
Reserved
*
*
*
BC343
BC343
0.1uF
0.1uF
Reserved
Reserved
*
*
BC345
BC345
0.1uF
0.1uF
Reserved
Reserved
*
A A
TECHNOLOGY COPR.
TECHNOLOGY COPR.
Title
Title
Title
Document Number Rev
Document Number Rev
Document Number Rev
Date: Sheet
Date: Sheet
8
7
6
5
4
3
Date: Sheet
Decouple
Decouple
Decouple
2
661M08
661M08
661M08
TECHNOLOGY COPR.
A
A
of
22 44Monday, August 01, 2005
of
22 44Monday, August 01, 2005
of
22 44Monday, August 01, 2005
1
A
8 7 6 5 4 3 2 1
A
SSTL-2 Termination Resistors
MD[0..63]
DQM[0..7]
DQS[0..7]
MA[0..14]
CS-[0..3]
D D
MD[0..63] 10,21
DQM[0..7] 10,21
DQS[0..7] 10,21
MA[0..14] 10,21
CS-[0..3] 10,21
MD/DQM(/DQS)
MA/Control
CS
CKE
SDR
LV-CMOS
LV-CMOS
LV-CMOS
OD 3.3V OD 2.5V
Rs
0/10/- 33
10
0
DDR
SSTL-2
SSTL-2
SSTL-2
Rs
10
0
0
Rtt
33
47
Termination change 56ohm
RN14
RN13
MD2
MD1
MD0
MD4
MD7
MD3
DQS0
DQM0
MD9
MD8
MD5
MD6
DQM1
MD13
DQS1
C C
B B
/RSRAS-10,21
/RSWE-10,21
MD12
MD11
MD10
MD15
MD14
MA7 DQM6
MD22
MD18
MA9 MD52
MD17 MD55
MD16 MD50
MA14 MD54
MD20 DQS6
MA4 MD62
DQM3 DQS7
DQS3 DQM7
MD25 MD57
MA0 MD61
MA1 MD56
MA2 MD60
MD31 MD51
MD27
MD30
MD26 MD59
MA3 MD58
MD36 MD46
MD32 MD42
MA12 DQS5
MA10 DQM5
MD29
MD28
MA6
MD24
MA5
MD23
MD19
MA8
DQM2
MA13
DQS2
MD21
/RSRAS-
/RSWE-
RN15
RN15
2
4
6
47
47
RN19
RN19
2
4
6
47
47
RN22
RN22
2
4
6
47
47
RN26
RN26
2
4
6
47
47
RN30
RN30
2
4
6
47
47
RN34
RN34
2
4
6
47
47
RN38
RN38
2
4
6
47
47
RN13
47
47
RN17
RN17
47
47
RN21
RN21
47
47
RN24
RN24
47
47
RN28
RN28
47
47
1
*
*
3
5
78
1
*
*
3
5
78
1
*
*
3
5
78
1
*
*
3
5
78
1
*
*
3
5
78
DDR_VTT DDR_VTT
1
*
*
3
5
78
/RSCAS-10,21
1
*
*
3
5
78
R13547*R13547
R13747*R13747
2
4
6
1
*
*
3
5
78
2
4
6
1
*
*
3
5
78
2
4
6
1
*
*
3
5
78
2
4
6
1
*
*
3
5
78
2
4
6
1
*
*
3
5
78
RN32
RN32
2
4
6
47
47
1
*
*
3
5
78
RN36
RN36
2
4
6
47
47
1
*
*
3
5
78
*
*
MD34
DQS4
MD33
MD37
MD39
MA11
MD38
DQM4
MD40
MD44
MD35
MD49
MD48
MD47
MD43
MD53
MD63
/RSCASÂCS-0
MD41
MD45
CS-3
CS-2
CS-1
RN14
47
47
2
4
6
RN23
RN23
47
47
RN27
RN27
47
47
RN31
RN31
47
47
RN35
RN35
47
47
RN18
RN18
47
47
1
*
*
3
5
78
RN16
RN16
2
4
6
47
47
1
*
*
3
5
78
RN20
RN20
2
4
6
47
47
1
*
*
3
5
78
RN25
RN25
2
4
6
47
47
1
*
*
3
5
78
RN29
RN29
2
4
6
47
47
1
*
*
3
5
78
RN33
RN33
2
4
6
47
47
1
*
*
3
5
78
RN37
RN37
2
4
6
56
56
2
4
6
2
4
6
2
4
6
2
4
6
2
4
6
DDR_VTT
1
*
*
3
5
78
DECOUPLING CAPACITOR FOR SSTL-2 END TERMIANTION VTT ISLAND
1
*
*
3
5
78
DDR_VTT
1
*
*
3
5
78
1
*
*
3
5
78
1
*
*
3
5
78
1
*
*
3
5
78
DDR_VTT
0603 Package placed within 200mils of VTT Termination R-packs
*
*
*
*
*
*
*
*
*
BC186
BC186
0.1uF
0.1uF
BC195
BC195
0.1uF
0.1uF
BC187
BC187
0.1uF
0.1uF
*
*
BC196
BC196
0.1uF
0.1uF
*
*
*
*
*
*
BC188
BC188
0.1uF
0.1uF
BC197
BC197
0.1uF
0.1uF
BC189
BC189
0.1uF
0.1uF
*
*
BC198
BC198
0.1uF
0.1uF
*
BC190
BC190
0.1uF
0.1uF
*
*
*
*
BC199
BC199
0.1uF
0.1uF
Title
Title
Title
Document Number Rev
Document Number Rev
Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
BC191
BC191
0.1uF
0.1uF
BC200
BC200
0.1uF
0.1uF
*
*
BC192
BC192
0.1uF
0.1uF
*
*
BC201
BC201
0.1uF
0.1uF
Termination
Termination
Termination
*
*
BC193
BC193
0.1uF
0.1uF
*
*
BC202
BC202
0.1uF
0.1uF
661M08
661M08
661M08
*
*
BC194
BC194
0.1uF
0.1uF
*
*
BC203
BC203
0.1uF
0.1uF
TECHNOLOGY COPR.
TECHNOLOGY COPR.
TECHNOLOGY COPR.
A
A
of
23 44Monday, August 01, 2005
of
23 44Monday, August 01, 2005
of
23 44Monday, August 01, 2005
A
A
8 7 6 5 4 3 2 1
A
C/BE-[0..3]13,25
AD[0..31]13,25
D D
TCK25
INT-C13,25
INT-A11,13,19,25
PCICLK117
PREQ-013 PREQ-113
C C
IRDY-13,25
DEVSEL-13,25
PLOCK-13,25
PERR-25
SERR-13,25
B B
RN39
STOP- FRAME- PREQ-0
PLOCK- IRDYÂPERR- TRDY- PREQ-1
SERR- DEVSEL-
SDONE2 PREQ64-2
SBO-2 PACK64-2
SDONE1 PACK64-1
SBO-1 PREQ64-1
RN39
2
4
6
4.7K
4.7K
RN42
RN42
2
4
6
4.7K
4.7K
Reserved
Reserved
VCC5 VCC3
1
*
*
3
5
78
1
*
*
3
5
78
C/BE-[0..3]
AD[0..31]
PCIRST-13,19,25,26,35
TCK
INT-C
PCICLK1
PREQ-0
AD31
AD29
AD27
AD25
C/BE-3
AD23
AD21
AD19
AD17
C/BE-2
IRDYÂDEVSELÂPLOCK-
PERRÂSERRÂC/BE-1
AD14
AD12
AD10
AD8
AD7
AD5
AD3
AD1
PACK64-1
VCC5 VCC5 VCC5 VCC5
-12V +12V -12V +12V
VCC3 VCC3 VCC3
INT-A
2
4
6
RN40
RN40
2.7K
2.7K
2
4
6
*
*
RN43
RN43
4.7K
4.7K
Reserved
Reserved
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49
A50
A51
B52
B53
B54
B55
B56
B57
B58
B59
B60
B61
B62
B1
B2
B3
B4
B5
B6
B7
B8
B9
1
3
5
78
1
*
*
3
5
78
PCI1 PCI_SLOTPCI1 PCI_SLOT
-12V
TCK
GND1
TDO
+5V1
+5V3
INTB#
INTD#
PRSNT1#
RSV2
PRSNT2#
GND2
GND4
RSV4
GND6
CLK
GND7
REQ#
+5V7
AD(31)
AD(29)
GND9
AD(27)
AD(25)
+3.3V2
C/BE#(3)
AD(23)
GND11
AD(21)
AD(19)
+3.3V4
AD(17)
C/BE#(2)
GND13
IRDY#
+3.3V6
DEVSEL#
GND16
LOCK#
PERR#
+3.3V8
SERR#
+3.3V9
C/BE#(1)
AD(14)
GND18
AD(12)
AD(10)
GND20
A50
A51
AD(8)
AD(7)
+3.3V12
AD(5)
AD(3)
GND22
AD(1)
+5V8
ACK64#
+5V10
+5V12
VCC5
TRST#
RESET#
PCI_PME#
AD(30)
+3.3V1
AD(28)
AD(26)
GND10
AD(24)
+3.3V3
AD(22)
AD(20)
GND12
AD(18)
AD(16)
+3.3V5
FRAME#
GND14
TRDY#
GND15
STOP#
+3.3V7
SDONE
GND17
AD(15)
+3.3V10
AD(13)
AD(11)
GND19
C/BE#(0)
+3.3V11
GND21
REQ64#
X1X1X2
X2
+12V
TMS
TDI
+5V2
INTA#
INTC#
+5V4
RSV1
+5V5
RSV3
GND3
GND5
SB3V
+5V6
GNT#
GND8
IDSEL
SBO#
PAR
AD(9)
B50
B51
AD(6)
AD(4)
AD(2)
AD(0)
+5V9
+5V11
+5V13
TDI
TMS
TCK
TRST-
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
B50
B51
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
R140 8.2KDUMMY
R140 8.2KDUMMY
R141 8.2KDUMMY
R141 8.2KDUMMY
6
4
2
TRSTÂTMS
TDI
INT-B
INT-D
SB3V SB3V
PCIRSTÂPGNT-0
PME-
AD30
AD28
AD26
AD24
*
*
AD22
AD20
AD18
AD16
FRAMEÂTRDYÂSTOPÂSDONE1
SBO-1
PAR
AD15
AD13
AD11
AD9
C/BE-0
AD6
AD4
AD2
AD0
PREQ64-1
*
*
*
*
RN41
RN41
78
5
3
*
*
1
2.7K
2.7K
+/-5%
+/-5%
8P4R0603
8P4R0603
TRST 25
TMS 25
TDI 25
INT-B 13,19,25
INT-D 13,25
PGNT-0 13 PGNT-1 13
PME- 14,19,25,28
R138
R138
AD19 AD20
100
100
+/-5%
+/-5%
R0603
R0603
FRAME- 13,25
TRDY- 13,25
STOP- 13,25
PAR 13,25
VCC5
PCI Slot 1 & 2
PCICLK217
TCK
INT-D
INT-B
PCICLK2
PREQ-1
AD31
AD29
AD27
AD25
C/BE-3
AD23
AD21
AD19
AD17
C/BE-2
IRDYÂDEVSELÂPLOCK-
PERRÂSERRÂC/BE-1
AD14
AD12
AD10
AD8
AD7
AD5
AD3
AD1
PACK64-2
VCC3
PCI2 PCI_SLOTPCI2 PCI_SLOT
B1
-12V
B2
TCK
B3
GND1
B4
TDO
B5
+5V1
B6
+5V3
B7
INTB#
B8
INTD#
B9
PRSNT1#
B10
RSV2
B11
PRSNT2#
B12
GND2
B13
GND4
B14
RSV4
B15
GND6
B16
CLK
B17
GND7
B18
REQ#
B19
+5V7
B20
AD(31)
B21
AD(29)
B22
GND9
B23
AD(27)
B24
AD(25)
B25
+3.3V2
B26
C/BE#(3)
B27
AD(23)
B28
GND11
B29
AD(21)
B30
AD(19)
B31
+3.3V4
B32
AD(17)
B33
C/BE#(2)
B34
GND13
B35
IRDY#
B36
+3.3V6
B37
DEVSEL#
B38
GND16
B39
LOCK#
B40
PERR#
B41
+3.3V8
B42
SERR#
B43
+3.3V9
B44
C/BE#(1)
B45
AD(14)
B46
GND18
B47
AD(12)
B48
AD(10)
B49
GND20
A50
A50
A51
A51
B52
AD(8)
B53
AD(7)
B54
+3.3V12
B55
AD(5)
B56
AD(3)
B57
GND22
B58
AD(1)
B59
+5V8
B60
ACK64#
B61
+5V10
B62
+5V12
TRST#
+12V
TMS
+5V2
INTA#
INTC#
+5V4
RSV1
+5V5
RSV3
GND3
GND5
SB3V
RESET#
+5V6
GNT#
GND8
PCI_PME#
AD(30)
+3.3V1
AD(28)
AD(26)
GND10
AD(24)
IDSEL
+3.3V3
AD(22)
AD(20)
GND12
AD(18)
AD(16)
+3.3V5
FRAME#
GND14
TRDY#
GND15
STOP#
+3.3V7
SDONE
SBO#
GND17
PAR
AD(15)
+3.3V10
AD(13)
AD(11)
GND19
AD(9)
C/BE#(0)
+3.3V11
AD(6)
AD(4)
GND21
AD(2)
AD(0)
+5V9
REQ64#
+5V11
+5V13
X1X1X2
X2
Title
Title
Title
Document Number Rev
Document Number Rev
Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
TDI
B50
B51
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
B50
B51
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
PREQ64-2
PCI 1, 2
PCI 1, 2
PCI 1, 2
TRSTÂTMS
TDI
INT-C
INT-A
PCIRSTÂPGNT-1
PME-
AD30
AD28
AD26
AD24
AD22
AD20
AD18
AD16
FRAMEÂTRDYÂSTOPÂSDONE2
SBO-2
PAR
AD15
AD13
AD11
AD9
C/BE-0
AD6
AD4
AD2
AD0
661M08
661M08
661M08
R139
R139
100
100
+/-5%
+/-5%
*
*
R0603
R0603
TECHNOLOGY COPR.
TECHNOLOGY COPR.
TECHNOLOGY COPR.
A
A
of
24 44Monday, August 01, 2005
of
24 44Monday, August 01, 2005
of
24 44Monday, August 01, 2005
A
A
8 7 6 5 4 3 2 1
A
PCI Slot 3
C/BE-[0..3]13,24
AD[0..31]13,24
C/BE-[0..3]
AD[0..31]
D D
TCK24
INT-A11,13,19,24
PCICLK317
PREQ-213
C C
IRDY-13,24
DEVSEL-13,24
PLOCK-13,24
PERR-24
SERR-13,24
B B
TCK
INT-A INT-B
INT-C13,24
PCICLK3
PREQ-2
AD31 AD30
AD29
AD27 AD26
AD25
C/BE-3
AD23
AD21 AD20
AD19
AD17 AD16
C/BE-2
IRDYÂDEVSELÂPLOCK-
PERR- SDONE3
SERRÂC/BE-1 AD15
AD14
AD12 AD11
AD10
AD8 C/BE-0
AD7
AD5 AD4
AD3
AD1 AD0
PACK64-3 PREQ64-3
VCC5 VCC5
-12V +12V
VCC3 VCC3
PCI3 PCI_SLOTPCI3 PCI_SLOT
INT-C
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49
A50
A51
B52
B53
B54
B55
B56
B57
B58
B59
B60
B61
B62
B1
B2
B3
B4
B5
B6
B7
B8
B9
-12V
TCK
GND1
TDO
+5V1
+5V3
INTB#
INTD#
PRSNT1#
RSV2
PRSNT2#
GND2
GND4
RSV4
GND6
CLK
GND7
REQ#
+5V7
AD(31)
AD(29)
GND9
AD(27)
AD(25)
+3.3V2
C/BE#(3)
AD(23)
GND11
AD(21)
AD(19)
+3.3V4
AD(17)
C/BE#(2)
GND13
IRDY#
+3.3V6
DEVSEL#
GND16
LOCK#
PERR#
+3.3V8
SERR#
+3.3V9
C/BE#(1)
AD(14)
GND18
AD(12)
AD(10)
GND20
A50
A51
AD(8)
AD(7)
+3.3V12
AD(5)
AD(3)
GND22
AD(1)
+5V8
ACK64#
+5V10
+5V12
PCI_PME#
X1X1X2
X2
TRST#
+12V
TMS
+5V2
INTA#
INTC#
+5V4
RSV1
+5V5
RSV3
GND3
GND5
SB3V
RESET#
+5V6
GNT#
GND8
AD(30)
+3.3V1
AD(28)
AD(26)
GND10
AD(24)
IDSEL
+3.3V3
AD(22)
AD(20)
GND12
AD(18)
AD(16)
+3.3V5
FRAME#
GND14
TRDY#
GND15
STOP#
+3.3V7
SDONE
SBO#
GND17
PAR
AD(15)
+3.3V10
AD(13)
AD(11)
GND19
AD(9)
B50
B51
C/BE#(0)
+3.3V11
AD(6)
AD(4)
GND21
AD(2)
AD(0)
+5V9
REQ64#
+5V11
+5V13
A1
A2
A3
A4
TDI
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
B50
B51
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
TRSTÂTMS
TDI
INT-D
SB3V
PCIRSTÂPGNT-2
PME-
AD28
AD24
AD22
AD18
FRAMEÂTRDYÂSTOP-
SBO-3
PAR
AD13
AD9
AD6
AD2
INT-D 13,24
INT-B 13,19,24
PGNT-2 13
PME- 14,19,24,28
R142
R142
100
100
+/-5%
+/-5%
*
*
R0603
R0603
FRAME- 13,24
TRDY- 13,24
STOP- 13,24
TRST 24
TMS 24
TDI 24
AD21
PAR 13,24
PCIRST- 13,19,24,26,35
VCC5 VCC3
RN44
PACK64-3
PREQ64-3
SDONE3
SBO-3
2
4
6
RN44
4.7K
4.7K
Reserved
Reserved
PREQ-2
R143 8.2K
1
*
*
3
5
78
R143 8.2K
*
*
DUMMY
DUMMY
TECHNOLOGY COPR.
TECHNOLOGY COPR.
Title
Title
Title
Document Number Rev
Document Number Rev
Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
PCI 3
PCI 3
PCI 3
661M08
661M08
661M08
TECHNOLOGY COPR.
of
25 44Monday, August 01, 2005
of
25 44Monday, August 01, 2005
of
25 44Monday, August 01, 2005
A
A
A
A
8 7 6 5 4 3 2 1
A
IDERST-
IDEDA[0..15]13
IDEDA[0..15]
D D
IDEREQA13
IDEIOW-A13
IDEIOR-A13
ICHRDYA13
IDACK-A13
IDEIRQA13
IDESAA113
IDESAA013
IDECS-A013
C C
HDDLED15,36
R8
R8
*
*
0
0
+/-5%
+/-5%
R0603
R0603
R150
R150
4.7K
PCIRST-13,19,24,25,35
4.7K
+/-5%
+/-5%
*
*
R0603
R0603
Dummy
Dummy
HDDLED
VCC3 VCC5
R146
R146
*
*
4.7K
4.7K
+/-5%
+/-5%
R0603
R0603
Dummy
Dummy
Q14
Q14
B
MMBT3904
MMBT3904
Dummy
Dummy
E C
R147
R147
*
*
4.7K
4.7K
+/-5%
+/-5%
R0603
R0603
Dummy
Dummy
Q13
Q13
B
MMBT3904
MMBT3904
Dummy
Dummy
E C
B B
IDEREQB13
IDEIOW-B13
IDEIOR-B13
ICHRDYB13
IDACK-B13
IDEIRQB13
IDEREQB
IDEIOW-B
IDEIOR-B
ICHRDYB
IDACK-B
IDEIRQB
R144 33
R144 33
*
*
IDEDA7
IDERST-
?
+/-5%
+/-5%
R145 5.6K+/-5%
R145 5.6K+/-5%
R148
R148
33
33
+/-5%
+/-5%
*
*
R0603
R0603
*
*
IDECS-A0 MIDECS-A0
D4
D4
21
FDLL4148
FDLL4148
IDEDB7
R149 5.6K
R149 5.6K
+/-5%
+/-5%
*
*
IDESAB1
IDESAB0 IDESAB2
IDECS-B0 IDECS-B1
PIDE
PIDE
1
IDEDA7
IDEDA6
IDEDA5 IDEDA10
IDEDA4 IDEDA11
IDEDA3
IDEDA2
IDEDA1
MIDESAA1IDESAA1
MIDESAA0IDESAA0
IDEDB7 IDEDB8
IDEDB6 IDEDB9
IDEDB5 IDEDB10
IDEDB4 IDEDB11
IDEDB3 IDEDB12
IDEDB2
IDEDB1 IDEDB14
IDEDB0 IDEDB15
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
X
X
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
Header_2X20_20 (IDE)
Header_2X20_20 (IDE)
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
IDEDB[0..15]13
SIDE
SIDE
2
4
6
8
10
12
14
16
18
X
X
22
24
26
28
30
32
34
36
38
40
Header_2X20_20 (IDE)
Header_2X20_20 (IDE)
IDEDA8
IDEDA9
IDEDA12
IDEDA13
IDEDA14
IDEDA15IDEDA0
IDEDB[0..15]
CBLIDA
IDEDB13
CBLIDB
IDESAA2
IDECS-A1
CBLIDA 13
IDESAA2 13
IDECS-A1 13
CBLIDB 13
IDESAB2 13
IDECS-B1 13
IDESAB113
IDESAB013
IDECS-B013
HDDLED15,36
HDDLED
D5
D5
FDLL4148
FDLL4148
21
A
TECHNOLOGY COPR.
TECHNOLOGY COPR.
Title
Title
Title
Document Number Rev
Document Number Rev
Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
IDE
IDE
IDE
661M08
661M08
661M08
TECHNOLOGY COPR.
A
A
of
26 44Monday, August 01, 2005
of
26 44Monday, August 01, 2005
of
26 44Monday, August 01, 2005
A
8 7 6 5 4 3 2 1
A
MDI3+
MDI2-
MDI2+
R2421
R2421
R2420
R2420
49.9
49.9
49.9
49.9
+/-1%
+/-1%
+/-1%
+/-1%
R0603
R0603
R0603
R0603
Dummy
Dummy
Dummy
Dummy
BC1072
D D
BC1072
0.1uF
0.1uF
*
*
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
C0603
C0603
Dummy
Dummy
*
*
MDI3-
R2423
R2423
R2422
R2422
49.9
49.9
49.9
49.9
+/-1%
+/-1%
+/-1%
+/-1%
R0603
R0603
R0603
R0603
Dummy
Dummy
Dummy
Dummy
BC1073
BC1073
0.1uF
0.1uF
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
C0603
C0603
Dummy
Dummy
*
*
MDI0-
MDI0+
R2424
R2424
49.9
49.9
+/-1%
+/-1%
R0603
R0603
BC1074
BC1074
0.1uF
0.1uF
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
C0603
C0603
Reserved
Reserved
R2425
R2425
49.9
49.9
+/-1%
+/-1%
R0603
R0603
MDI1-
MDI1+
R2427
R2427
R2426
R2426
49.9
49.9
49.9
49.9
+/-1%
+/-1%
+/-1%
+/-1%
R0603
R0603
R0603
R0603
BC1075
BC1075
0.1uF
0.1uF
*
*
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
C0603
C0603
Reserved
Reserved
Place Resistors close to PHY
Can be change to cost down conn
VGMII
R2429
R2429
330
330
+/-5%
+/-5%
R0603
R0603
Reserved
R2431 0 R0603+/-5%
R2431 0 R0603+/-5%
R2432 0 R0603+/-5%
R2432 0 R0603+/-5%
BC1078
BC1078
470pF
470pF
*
*
50V, X7R, +/-10%
50V, X7R, +/-10%
C C
C0603
C0603
Reserved
Dummy
Dummy
ACTIVITYJ35
VCC5_DUAL
Dummy
Dummy
R0603
R0603
R2418 0
R2418 0
R2419 0
R2419 0
Reserved
Reserved
R0603
R0603
LED1
LED2
+/-5%
+/-5%
+/-5%
+/-5%
LED1
LED2
R_USBPOWER
MDI0+35
MDI0-35
MDI1+35
MDI1-35
MDI2+
MDI2-
MDI3+
MDI3-
LINKJ35
P/N = JFM31U13-01U5W For GIGA LAN
VGMII
*
*
DEL R91.. HERE
R2430
R2430
330
330
+/-5%
+/-5%
R0603
R0603
BC1080
BC1080
470pF
470pF
C060350V, X7R, +/-10%
C060350V, X7R, +/-10%
LED1
LED2
LAN_POWER
R2433
R2433
0
0
+/-5%
+/-5%
R0603
R0603
BC1081
BC1081
C0603
C0603
Dummy
Dummy
22
21
9
10
11
12
13
14
15
16
17
18
20
19
*
*
50V, X7R, +/-10%
50V, X7R, +/-10%
NIC_USB
NIC_USB
GRN_LED
GRN_LED
1nF
1nF
USBX2_RJ45 Gigabit LAN
USBX2_RJ45 Gigabit LAN
USB4X2_RJ45P10_LED
USB4X2_RJ45P10_LED
YLW_LED
YLW_LED
GRN_LED
GRN_LED
RJ45-MJ2
RJ45-MJ2
USB-2
USB-2
USB-1
USB-1
VCC5_DUAL
*
*
27
28
29
30
1
5
2
6
3
7
4
8
23
24
25
26
U42
U42
AIC1084CE
AIC1084CE
VIN3VOUT
TO252_123 Reserved
TO252_123 Reserved
BC1076
BC1076
10uF
10uF
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
C1206
C1206
Reserved
Reserved
R_USBPOWER
BC1079
BC1079
0.1uF
0.1uF
*
*
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
C0603
C0603
Reserved
Reserved
2
ADJ
1
LAN LED: Left is GREEN,Right is Yellow(Orange).
Reserved
Reserved
Reserved
Reserved
R_USBPOWER 41
BC1082
BC1082
1nF
1nF
*
*
C0603
50V, X7R, +/-10%
C0603
50V, X7R, +/-10%
R2444
R2444
124
124
+/-1%
+/-1%
R0603
R0603
R2445
R2445
124
124
+/-1%
+/-1%
R0603
R0603
*
*
16V, +/-20%
16V, +/-20%
CE35D80H200
CE35D80H200
G-bit
100M
10M
No Connect
UV2ÂUV3-
UV2+
UV3+
EC125
EC125
470uF
470uF
LAN LED: Left is GREEN,Right is
Yellow(Orange).
VGMII
2 1
FB L0805 100 Ohm
FB L0805 100 Ohm
BC1090
BC1090
BC1077
BC1077
10uF
10uF
0.1uF
C1206
C1206
Reserved
Reserved
0.1uF
*
*
C0603
C0603
Reserved
Reserved
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
SB3V
*
*
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
LINK2- LINK1Â00
01
10
11
UV2- 15
UV3- 15
UV2+ 15
UV3+ 15
FB27
FB27
LAN_POWER
Close to Lan Conn
BC1088
BC1088
10nF
10nF
BC1089
BC1089
10nF
10nF
*
*
*
*
2.2uF
2.2uF
SPD1000M SPD100M
Hi Low
Low Hi
HiLow
Low Low
RN5
RN5
0
0
8P4R0603
8P4R0603
+/-5%
+/-5%
1
*
*
3
5
78
Dummy
Dummy
2
4
6
BC1092
BC1092
*
*
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
LED Color
Green
Yellow
Yellow
OFF
VGMII
C0805
C0805
BC1087
BC1087
1uF
1uF
*
*
C0805
C0805
16V, X7R, +/-10%
16V, X7R, +/-10%
RN4
RN4
+/-5%
+/-5%
0
0
7 8
Dummy
Dummy
642
B B
8P4R0603
8P4R0603
*
*
135
12
F1
F1
F1813_2.6A
F1813_2.6A
Reserved
Reserved
F_USBPOWER
BC909
BC909
0.1uF
0.1uF
*
*
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
C0603
C0603
CIS
F_USBPOWER
F_USB1
F_USB1
1 2
3
5
7 8
X
X
Header_2X5_9
Header_2X5_9
R326
R326
4
6
10
*
*
F_USBPOWER
10K
10K
*
*
R327
R327
560K
560K
+/-5%
+/-5%
R0603
R0603
BC908
BC908
0.1uF
0.1uF
*
*
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
C0603
C0603
OC4567- 15
UV6- 15
UV6+ 15
UV7- 15
UV7+ 15
EC110
EC110
470uF
470uF
*
*
16V, +/-20%
16V, +/-20%
CE35D80H200
CE35D80H200
Dummy
Dummy
R_USBPOWER
EC12
EC12
470uF
470uF
*
*
16V, +/-20%
16V, +/-20%
CE35D80H200
CE35D80H200
R328
R328
BC911
BC911
0.1uF
0.1uF
*
*
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
C0603
C0603
F_USBPOWER
F_USB2
F_USB2
1 2
3
5
7 8
Header_2X5_9
Header_2X5_9
*
*
BC819
BC819
0.1uF
0.1uF
*
*
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
C0603
C0603
4
6
10
X
X
10K
10K
R329
R329
*
*
560K
560K
+/-5%
+/-5%
R0603
R0603
*
*
OC0123- 15
BC910
BC910
0.1uF
0.1uF
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
C0603
C0603
Title
Title
Title
Document Number Rev
Document Number Rev
Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
USB & LAN PORT
USB & LAN PORT
USB & LAN PORT
661M08
661M08
661M08
UV5- 15
UV5+ 15
UV4- 15
UV4+ 15
TECHNOLOGY COPR.
TECHNOLOGY COPR.
TECHNOLOGY COPR.
of
27 44Monday, August 01, 2005
of
27 44Monday, August 01, 2005
of
27 44Monday, August 01, 2005
A
A
A
A
5 4 3 2 1
A
VCC5
?
D D
Note:Default LPC ROM
C C
Make sure that the pins
(INDEX#,TRK0#,WPT#,
RDATA#,DSKCHG#)
are pulled high, if Floppy is used.
B B
R2446 4.7K R0603+/-5% ReservedR2446 4.7K R0603+/-5% Reserved
R2447 4.7K R0603+/-5% DummyR2447 4.7K R0603+/-5% Dummy
R2449 4.7K R0603+/-5% DummyR2449 4.7K R0603+/-5% Dummy
R2450 4.7K R0603+/-5% DummyR2450 4.7K R0603+/-5% Dummy
R2453 4.7K R0603+/-5% DummyR2453 4.7K R0603+/-5% Dummy
R2454 4.7K R0603+/-5% DummyR2454 4.7K R0603+/-5% Dummy
R2461 10K +/-5% ReservedR2461 10K +/-5% Reserved
R2459 10K +/-5% DummyR0603R2459 10K +/-5% DummyR0603
R2495 10K +/-5% ReservedR0603R2495 10K +/-5% ReservedR0603
R2488 10K +/-5% ReservedR0603R2488 10K +/-5% ReservedR0603
R2463
680 R0603+/-5%
680 R0603+/-5%
R2464
680 R0603+/-5%
680 R0603+/-5%
R2465
680 R0603+/-5%
680 R0603+/-5%
R2466
680 R0603+/-5%
680 R0603+/-5%
R2467
680 R0603+/-5%
680 R0603+/-5%
R2468
680 R0603+/-5%
680 R0603+/-5%
SOUT1 TD1
SOUT2 TD2
SI31
SCLK31
SCLK
SPI I/F
SO231
LAD[0..3]14,31
SB3V
R2473 10K +/-5%R2473 10K +/-5%
R2474 10K +/-5%
R2474 10K +/-5%
SI
DummyR2463
Dummy
ReservedR2464
Reserved
DummyR2465
Dummy
ReservedR2466
Reserved
ReservedR2467
Reserved
ReservedR2468
Reserved
BEEP_SIO38
FWH_WPJ31
THERM-14
CK_48M_SIO17
Dummy
Dummy
DCDJ130
DSRJ130
DCDJ230
DSRJ230
R2469
0 R0603
0 R0603
Dummy
Dummy
RWCJ31
INDEXJ31
MOAJ31
DSBJ31
DSAJ31
MOBJ31
DIRJ31
STEPJ31
WDJ31
WGATEJ31
TRK0J31
WPJ31
RDATAJ31
HEADJ31
DSKCHGJ31
SIORST-13
LDRQ-14
LFRAME-14,31
SIOPCLK17
PME-14,19,24,25
PME-
SIO_RSMRSTJ
SW1
SW2
SW3
SW4
SW5
SW6
RIJ130
CTSJ130
DTRJ130
RTSJ130
TD130
RD130
RIJ230
CTSJ230
DTRJ230
RTSJ230
TD230
RD230
+/-5% DummyR2469
+/-5% Dummy
SIRQ14
DTRJ1
RTSJ1
SOUT1
DTRJ2
RTSJ2
SOUT2
VIN7
IDERSTJ_R
CE_N
ATXPG
DTRJ1
RTSJ1
SOUT1
DTRJ2
RTSJ2
SOUT2
DTRJ1
RTSJ1
TD1
DTRJ2
RTSJ2
TD2
+/-5%
+/-5%
0 R0603
0 R0603
LDRQÂSIRQ
LFRAME-
PCIRSTEJ_R
CK_48M_SIO
PME-
LAD0
LAD1
LAD2
LAD3
R2470
R2470
118
119
120
121
122
123
124
125
126
127
128
1
2
3
5
6
20
21
22
23
24
25
26
27
28
29
51
63
52
55
54
53
57
58
56
60
62
64
61
59
65
37
38
39
40
41
42
43
44
47
48
49
73
45
46
80
81
82
83
VCC3
DCD1#
RI1#
CTS1#
DTR1#/JP1
RTS1#/JP2
DSR1#
SOUT1/JP3
SIN1
DCD2#/GP67
RI2#/GP66
CTS2#/GP65
DTR2#/JP4
RTS2#/JP5
DSR2#/GP64
SOUT2/JP6
SIN2/GP63
FAN_CTL4/JSBB2/GP27
FAN_CTL5/JSBB1/GP26
FAN_TAC4/JSBCY/GP25
FAN_TAC5/JSBCX/GP24
JSAB2/GP23/SI
JSAB1/GP22/SCLK
JSACY/GP21
JSACX/GP20
MIDI_OUT/GP17
MIDI_IN/GP16/SO2
DENSEL#
INDEX#
MTRA#
DRVB#
DRVA#
MTRB#/THRMO#
DIR#
STEP#
WDATA#
WGATE#
TRK0#
WPT#
RDATA#
HDSEL#
DSKCHG#
LRESET#
LDRQ#
SERIRQ
LFRAME#
LAD0
LAD1
LAD2
LAD3
PCICLK
PCIRST5#/GP50
CLKIN
PME#/GP54
KRST#/GP62
GA20
KDAT/GP61
KCLK/GP60
MDAT/GP57
MCLK/GP56
R2448 10K +/-5% DummyR2448 10K +/-5% Dummy
R2452 10K +/-5% DummyR2452 10K +/-5% Dummy
R2451 10K +/-5% DummyR2451 10K +/-5% Dummy
R2456 10K +/-5% DummyR2456 10K +/-5% Dummy
R2455 10K +/-5%R2455 10K +/-5%
R2458 10K +/-5%R2458 10K +/-5%
R2460 10K +/-5%R2460 10K +/-5%
R2462 4.7K+/-5%R2462 4.7K+/-5%
VCC5
SB5V
*
4
35
VCC
VCC
Serial Port 1/2Gameport/MIDI
Serial Port 1/2Gameport/MIDI
IT8712F/JX
IT8712F/JX
Floppy I/F
Floppy I/F
LPC I/FKB/MS
LPC I/FKB/MS
GNDD
GNDD
GNDD
GNDD
15
50
74
117
FB L0805 26 Ohm
FB L0805 26 Ohm
*
99
67
VCC
VCCH
MISC.
MISC.
RESETCON#/CIRTX/GP15/CE_N
SCR I/F
SCR I/F
PCIRST4#/SCRPSNT#/GP10
PWROK1/SCRPFET#/GP13
FB26
FB26
21
GND_SIO
PCIRSTEJ_R
PCIRSTCJ_R
PCIRSTBJ_R
PCIRSTAJ_R
SIRQ
LFRAME-
LDRQÂPWRBTNJ
EC126
EC126
BC1093
BC1093
100uF
100uF
0.1uF
0.1uF
*
*
Parallel Port
Parallel Port
Power-on Control
Power-on Control
PWROK2/GP41
SUSC#/GP53
PSON#/GP42
PANSWH#/GP43
PWRON#GP44
SUSB#/GP45
RSMRST#/CIRRX/GP55
PCIRST3#/SCRCLK/GP11
PCIRST2#/SCRIO/GP12
PCIRST1#/SCRRST/GP14
VIN3/ATXPG
Hardware Monitoring
Hardware Monitoring
VIN7/PCIRSTIN#
TMPIN3/SO1
FAN_CTL3/GP36
FAN_TAC3/GP37
FAN_CTL2/GP51
FAN_TAC2/GP52
GNDA
86
CHECK
*
*
16V, +/-20%
16V, +/-20%
CE20D50H110
CE20D50H110
PD7
PD6
PD5
PD4
PD3
PD2
PD1
PD0
STB#
AFD#
ERR#
INIT#
SLIN#
ACK#
BUSY
SLCT
GP40
IRTX/GP47
IRRX/GP46
COPEN#
VIN0
VIN1
VIN2
VIN4
VIN5
VIN6
VREF
TMPIN1
TMPIN2
FAN_CTL1
FAN_TAC1
GP30/VID0
GP31/VID1
GP32/VID2
GP33/VID3
GP34/VID4
GP35/VID5
VBAT
VIDVCC
PE
?
BC208
BC208
0.1uF
0.1uF
U10
U10
VCC5
*
*
116
115
114
113
112
111
110
109
108
107
106
105
104
103
102
101
100
79
78
77
76
75
72
71
30
85
66
70
68
84
34
33
32
31
98
97
96
95
94
93
92
91
90
89
88
87
12
11
10
9
8
7
19
18
17
16
14
13
69
36
BC209
BC209
0.1uF
0.1uF
*
*
PRPD7
PRPD6
PRPD5
PRPD4
PRPD3
PRPD2
PRPD1
PRPD0
PSTB#
PAFD#
PRERR#
PINIT#
PSLIN#
PACK#
PBUSY
PE
R156 22
R156 22
PWRBTNJ
CE_N
SIO_RSMRSTJ
IDERSTJ_R
PCIRSTCJ_R
PCIRSTBJ_R
PCIRSTAJ_R
VIN7
SIOVREF
VBAT
Power On Strapping Options
Flashseg1_ENSW1
SW21SerFlh_SO_SEL
CHIP_SEL
BUF_SEL
SW4
BC210
BC210
0.1uF
0.1uF
FAN_CTL_SEL
SW5
SW6
PSTBJ 30
PAFDJ 30
PRERRJ 30
PINITJ 30
PSLINJ 30
PACKJ 30
PBUSY 30
PE 30
PSLCT
+/-5% R0603
+/-5% R0603
*
*
?
R2481 0 +/-5% DummyR2481 0 +/-5% Dummy
R2483 0 +/-5% DummyR2483 0 +/-5% Dummy
R2482 0 +/-5% DummyR2482 0 +/-5% Dummy
R2487 0 +/-5% DummyR2487 0 +/-5% Dummy
IRTX
IRRX
CE_N 31
R346
R346
*
*
1M
1M
R0603
R0603
+/-5%
+/-5%
VIN0
VIN1
VIN2
ATXPG
VIN5
SIOVREF 32
TMPIN1 32
TMPIN3 32
SO1 31
VBAT
Dummy
Dummy
SPI I/F
FAN_TAC2 32
FAN_CTL1 32
FAN_TAC1 32
2 1
D481 1N4148WD481 1N4148W
R155 0 +/-5% DummyR155 0 +/-5% Dummy
BC207
BC207
0.1uF
0.1uF
*
*
close to ITE8712
R2476 0 +/-5% DummyR2476 0 +/-5% Dummy
for Socket478 socket
R2475 0 +/-5%R2475 0 +/-5%
for LGA775 socket
PRPD[0..7]
VIN0 32
VIN1 32
VIN2 32
VIN4 32
VIN5 32
valueSymbol Description
Disabled.
1
Flash I/F Address Segment 1 (FFFE_0000h~FFFF_FFFFh,000F_0000h~000F_FFFFh)
0
is enabled
FLH_SO1 is selected as the Serial Flash I/F SO pin.
FLH_SO2 is selected as the Serial Flash I/F SO pin.
0
Chip selection in configuration.
--SW3
The output buffers of PCIRST1#, PCIRST2#, PCIRST3#, PCIRST4# and
1
PCIRST5# are enhanced open-drain. It drives high about 10~20 ns when the
signal transits from low to high, and then Hi-Z.
The output buffers are push-pull.
0
The default value of EC Index 15h / 16h / 17h is 00h
1
The default value of EC Index 15h / 16h / 17h is 40h
0
The threshold voltage of VID is 2.0 / 0.8V
1VID_ISEL
The threshold voltage of VID is 0.8 / 0.4V
0
PRPD[0..7] 30
IR CONNECTOR
PSLCT 30
*
PSONÂPBTNJ_SIOPBTNJSIO
S3AUXSW-S3AUXSW
SPI I/F
VCC3
VTT_OUT_RIGHT
SUSCJ 36
PSON- 14,38
PBTNJ_SIO 36
PWRBTN- 14,36
S3AUXSW- 10,37
PBTNJSIO
PBTNJ_SIO
RBAT 36
?
BAT
SB5V
R2484
R2484
4.7K
4.7K
+/-5%
+/-5%
R0603
R0603
Dummy
Dummy
R2485
R2485
4.7K
4.7K
+/-5%
+/-5%
R0603
R0603
Dummy
Dummy
SIOVREF
Title
Title
Title
Document Number Rev
Document Number Rev
Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
*
*
*
SIO ITE8712F/JX
SIO ITE8712F/JX
SIO ITE8712F/JX
VCC5
BC211
BC211
0.1uF
0.1uF
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
C0603
C0603
Reserved
Reserved
IRRX
IRTX
BC251
BC251
1uF
1uF
16V, X7R, +/-10%
16V, X7R, +/-10%
C0805
C0805
661M08
661M08
661M08
SB3V
*
*
S3AUXSW-VIN4
TECHNOLOGY COPR.
TECHNOLOGY COPR.
TECHNOLOGY COPR.
Select
IR
IR
1
3
4
5
Header_1X5_2
Header_1X5_2
Reserved
Reserved
R2496
R2496
4.7K
4.7K
+/-5%
+/-5%
R0603
R0603
Dummy
Dummy
of
28 44Monday, August 01, 2005
of
28 44Monday, August 01, 2005
of
28 44Monday, August 01, 2005
V
V
V
V
V
A
A
A
A
8 7 6 5 4 3 2 1
A
D D
SB5V
SB5V
642
RN47
RN47
Dummy
Dummy
BC216
BC216
470pF
470pF
Reserved
Reserved
*
*
135
For EMI.
642
RN78
7 8
RN78
0
0
8P4R0603
8P4R0603
+/-5%
+/-5%
F4
F4
F1210_1.1A
F1210_1.1A
Reserved
Reserved
1 2
BC212
BC212
0.1uF
0.1uF
*
*
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
C0603
C0603
1
2
3
4
5
6
7
8
9
10
11
12
KB/MS
KB/MS
1
2
3
4
5
6
7
8
9
10
11
12
PS2-KBMS-2
PS2-KBMS-2
13
13
14
14
15
15
16
16
17
17
CONNECTOR VIEW
12 11
. .
10 9
. .
8 7
. .
56
..
4 3
. .
2 1
. .
NOTE:
SIS IS NOT RESPONSIBLE FOR
ANY ERRORS OR OMISSIONS IN
THESE SCHEMATICS. THIS IS
AN EXAMPLE ONLY.
TOP VIEW
12 11
. .
. . . .
10 8 7 9
6 5
. .
. . . .
4 2 1 3
*
*
135
7 8
10K
10K
+/-5%
+/-5%
8P4R0603
8P4R0603
KBDAT14
C C
KBCLK14
PMDAT14
PMCLK14
KBDAT
KBCLK
PMDAT
PMCLK
B B
BC215
BC215
BC214
Reserved
Reserved
BC214
470pF
470pF
470pF
470pF
*
*
*
*
*
Reserved
Reserved
*
Reserved
Reserved
BC213
BC213
470pF
470pF
*
*
A
TECHNOLOGY COPR.
TECHNOLOGY COPR.
Title
Title
Title
Document Number Rev
Document Number Rev
Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Keyboard Mouse
Keyboard Mouse
Keyboard Mouse
661M08
661M08
661M08
TECHNOLOGY COPR.
A
A
of
29 44Monday, August 01, 2005
of
29 44Monday, August 01, 2005
of
29 44Monday, August 01, 2005
A
A
VCC5
D7
D7
FDLL4148
FDLL4148
B
21
C
D
E
4 4
PRPD[0..7]28
PSTBJ28
PSLINJ28
PAFDJ28
PINITJ28
change pin
3 3
PRERRJ28
PACKJ28
PBUSY28
PE28
PSLCT28
NRIA RING
XRIJ2
2 2
RTSJ128
DTRJ128
TD128
RIJ128
CTSJ128
DSRJ128
RD128
DCDJ128
BC234 0.1uF
1 1
BC234 0.1uF
Reserved
Reserved
A
D41
D41
FDLL4148
FDLL4148
D42
D42
FDLL4148
FDLL4148
*
*
PRPD3
1
*
*
PRPD2
3
PRPD1
5
PRPD0
7 8
1
*
*
3
5
7 8
PRPD7
1
*
*
PRPD6
3
PRPD5
5
PRPD4
7 8
R939
R939
21
560K
560K
R941
R941
+/-1%
+/-1%
21
560K
560K
R0603
R0603
+/-1%
+/-1%
U11
U11
20
VCC
16
DA1
15
DA2
13
DA3
19
RY1
18
RY2
17
RY3
14
RY4
12
RY5
11
GND
GD75232
GD75232
R0603
R0603
+12V
RA9
RA3
RA4
DY1
DY3
RA2
DY2
RA1
-12V
RN86
RN86
2
33
33
4
+/-5%
+/-5%
6
8P4R0603
8P4R0603
RN87
RN87
2
33
33
4
+/-5%
+/-5%
6
8P4R0603
8P4R0603
RN88
RN88
2
33
33
4
+/-5%
+/-5%
6
8P4R0603
8P4R0603
1
9
4
7
5
8
3
6
2
10
Reserved
Reserved
R940
R940
113K
113K
+/-1%
+/-1%
R0603
R0603
+12V
*
*
-12VVCC5
BC239
BC239
0.1uF
0.1uF
*
*
*
*
Reserved
Reserved
BC1026
BC1026
100pF
100pF
50V, NPO, +/-5%
50V, NPO, +/-5%
C0603
C0603
BY EXPERIENCED
NDCDA
NDSRA
NSINA
NRTSA
NSOUTA
NCTSA
NDTRA
NRIA
BC240
BC240
0.1uF
0.1uF
B
*
*
BC241
BC241
150pF
150pF
*
*
Reserved
Reserved
Reserved
Reserved
R159
R159
4.7K
4.7K
+/-5%
+/-5%
R0603
R0603
BC235
BC235
150pF
150pF
*
*
Reserved
Reserved
RN48
RN48
BC242
BC242
150pF
150pF
Reserved
Reserved
*
*
135
78
642
1K
1K
BC217
BC217
150pF
150pF
*
*
BC226
BC226
*
*
150pF
150pF
Reserved
Reserved
Reserved
Reserved
RING 14
BC237
BC237
BC236
BC236
150pF
150pF
150pF
150pF
*
*
*
*
BC243
BC243
150pF
150pF
*
*
*
*
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
BC218
BC218
*
*
150pF
150pF
Reserved
Reserved
*
*
BC244
BC244
150pF
150pF
Reserved
Reserved
*
*
135
78
RN49
RN49
642
1K
1K
BC219
BC219
150pF
150pF
*
*
BC227
BC227
*
*
150pF
150pF
Reserved
Reserved
BC238
BC238
150pF
150pF
Reserved
Reserved
11
1
6
2
7
3
8
4
9
5
10
*
*
Reserved
Reserved
RS232-9
RS232-9
COM1
COM1
BC228
BC228
150pF
150pF
Serial Port
RN50
RN50
BC220
BC220
150pF
150pF
*
*
Reserved
Reserved
78
1K
1K
BC229
BC229
*
*
150pF
150pF
Reserved
Reserved
DCDJ228
DSRJ228
RTSJ228
CTSJ228
DTRJ228
C
*
*
135
642
BC221
BC221
150pF
150pF
*
*
*
*
Reserved
Reserved
Reserved
Reserved
VCC5 +12V
BC927
BC927
0.1uF
0.1uF
*
*
Reserved
Reserved
RD228
TD228
RIJ228
RN51
RN51
*
*
BC230
BC230
150pF
150pF
Reserved
Reserved
20
19
18
17
16
15
14
13
12
11
78
1K
1K
BC222
BC222
150pF
150pF
*
*
Reserved
Reserved
U32
U32
VCC
ROUT1
ROUT2
ROUT3
DIN1
DIN2
ROUT4
DIN3
ROUT5
GND
GD75232
GD75232
642
BC231
BC231
150pF
150pF
Reserved
Reserved
COM2
*
*
135
PRINT PORT
PRNT25-M
PRNT25-M
PRN15
PRN14
PRN16
PRN17
PRN1
PRN2
PRN3
PRN4
PRN5
PRN6
PRN7
PRN8
PRN9
PRN10
PRN11
PRN12
PRN13
BC224
BC232
BC232
*
*
150pF
150pF
Reserved
Reserved
V+
RIN1
RIN2
RIN3
RIN4
RIN5
V-
BC224
150pF
150pF
*
*
Reserved
Reserved
1
2
3
4
5
6
7
8
9
10
-12V
BC223
BC223
150pF
150pF
*
*
DOUT1
DOUT2
DOUT3
BC233
BC233
*
*
150pF
150pF
Reserved
Reserved
*
*
*
*
BC225
BC225
150pF
150pF
*
*
Reserved
Reserved
BC928
BC928
0.1uF
0.1uF
Reserved
Reserved
DCD2J
DSR2J
RXD2
RTS2J
TXD2
CTS2J
DTR2J
XRIJ2
BC931
BC931
0.1uF
0.1uF
Reserved
Reserved
D
PRN1
PRN14
PRN2
PRN15
PRN3
PRN16
PRN4
PRN17
PRN5
PRN6
PRN7
PRN8
PRN9
PRN10
PRN11
PRN12
PRN13
BC924 150pF
BC924 150pF
Reserved
Reserved
*
*
BC925 150pF
BC925 150pF
Reserved
Reserved
*
*
BC926 150pF
BC926 150pF
Reserved
Reserved
*
*
BC929 150pF
BC929 150pF
Reserved
Reserved
*
*
BC930 150pF
BC930 150pF
Reserved
Reserved
*
*
BC932 150pF
BC932 150pF
Reserved
Reserved
*
*
BC933 150pF
BC933 150pF
Reserved
Reserved
*
*
BC934 150pF
BC934 150pF
Reserved
Reserved
*
*
Title
Title
Title
Document Number Rev
Document Number Rev
Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
1
14
2
15
3
16
4
17
5
18
6
19
7
20
8
21
9
22
10
23
11
24
12
25
13
PRT
PRT
RTS2J
XRIJ2
COM/PRT
COM/PRT
COM/PRT
Parallel Port
28
27
26
COM2
DCD2J
TXD2
661M08
661M08
661M08
COM2
1
3
5
7
9
HEADER_2X5_K10
HEADER_2X5_K10
E
RXD2
2
DTR2J
4
DSR2J
6
CTS2J
8
TECHNOLOGY COPR.
TECHNOLOGY COPR.
TECHNOLOGY COPR.
of
30 44Monday, August 01, 2005
of
30 44Monday, August 01, 2005
of
30 44Monday, August 01, 2005
A
A
A
8 7 6 5 4 3 2 1
A
SPI Interface
R2477
R2477
4.7KR0603
4.7KR0603
D D
R2478 0 R0603+/-5%
R2478 0 R0603+/-5%
Dummy
Dummy
R2480 0 R0603+/-5%
SO228
R2480 0 R0603+/-5%
Dummy
Dummy
CE_N28SO128
CE_N
1
VCC3
WPJ
HOLDJ
SI
CE#
2
SO
3
WP#
4
GND
SOP8JG
SOP8JG
Dummy
Dummy
8
7
6
5
HOLD#
SST25LF040A
SST25LF040A
CN3
CN3
VCC
HOLD#
SCK
SI
SPI-SOCKET
SPI-SOCKET
SPIS8H65
SPIS8H65
Dummy
Dummy
SO
VCC
SCK
+/-5%
+/-5%
Dummy
Dummy
U41
U41
SI
CE#
SO
WP#
GND
VCC3
R2479
R2479
4.7K
4.7K
+/-5%
+/-5%
R0603
R0603
Dummy
HOLDJ
SCLK
SI
1
2
3
4
CE_N
SO
WPJSCLK
Dummy
?
SCLK 28
SI 28
FLOPPY
FLOPPY
1
1
2
X
X
4
5
5
6
7
7
8
9
9
10
11
11
12
13
13
14
15
15
16
17
17
18
19
19
20
21
21
22
23
23
24
25
25
26
27
27
28
29
29
30
31
31
32
33
33
34
Header_2X17_3 (FDD)
Header_2X17_3 (FDD)
FDD34MZO3
FDD34MZO3
FDC
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
8
7
6
5
R164
R164
330
330
+/-5%
+/-5%
*
*
R0603
R0603
RN57
RN57
VCC5
330
330
*
*
135
642
7 8
RWCJ 28
INDEXJ 28
MOAJ 28
DSBJ 28
DSAJ 28
MOBJ 28
DIRJ 28
STEPJ 28
WDJ 28
WGATEJ 28
TRK0J 28
WPJ 28
RDATAJ 28
HEADJ 28
DSKCHGJ 28
C C
VCC3
Default LPC ROM BIOS
"Dummy" or "Reserved"
according to the type of GPIO
selected.
B B
FWH_WPJ28
BIOS_TBL_PROTECT14
TBL_EN
Connect with GPIO
TBL_EN
Header_1X3
Header_1X3
TBL_EN_(1-2)
TBL_EN_(1-2)
Reserved
Reserved
Jumper_2P-Blue
Jumper_2P-Blue
1
2
3
Reserved
Reserved
1
2
3
VCC3
R986
R986
R985
R985
4.7K
4.7K
4.7K
4.7K
+/-5%
+/-5%
+/-5%
+/-5%
R0603
R0603
R0603
R0603
R989 100 R0603+/-5%
R989 100 R0603+/-5%
R990 100 R0603+/-5%
R990 100 R0603+/-5%
R992 100 R0603+/-5%
R992 100 R0603+/-5%
R991 100 R0603+/-5%
R991 100 R0603+/-5%
Dummy
Dummy
Dummy
Dummy
Dummy
Dummy
Dummy
Dummy
WPJ
RN85
RN85
1
*
*
3
5
7 8
LAD014,28
LAD114,28
LAD214,28
LAD314,28
2
8.2K
8.2K
4
8P4R0603
8P4R0603
6
+/-5%
+/-5%
78
FWH_ID0
FWH_ID1
FWH_ID2
FWH_ID3
642
*
*
135
RN84
RN84
8.2K
8.2K
8P4R0603
8P4R0603
+/-5%
+/-5%
Dummy
Dummy
5
FGPI1(A7)
6
FGPI0(A6)
7
WP#(A5)
8
TBL#(A4)
9
ID3(A3)
10
ID2(A2)
11
ID1(A1)
12
ID0(A0)
13
FWH0(DQ0)
SST49LF004B
SST49LF004B
32
3
2
1
VPP
RST#
FGPI2(A8)4FGPI3(A9)
FWH
FWH
FWH1(DQ1)14FWH2(DQ2)15GND16FWH3(DQ3)17RFU(DQ4)18RFU(DQ5)19RFU(DQ6)
VCC
R984 8.2K +/-5%R984 8.2K +/-5%
U12
U12
30
31
IC_VIL(IC_VIH)
CLK(R/C#)
FGPI4(A10)
GNDa
VCCa
GND
VCC
INIT#(OE#)
FWH4(WE#)
RFU(RY/BY#)
RFU(DQ7)
20
29
28
27
26
25
24
23
22
21
PCIRSTAJ 13
VCC3
CK_33M_FWH 17
R987 8.2K +/-5%R987 8.2K +/-5%
FWH_INITJ
R988
R988
U12_1
U12_1
47K R0603+/-5%
47K R0603+/-5%
LFRAME- 14,28
PLCC
PLCC
32pin
32pin
Socket
Socket
VCC3
VCC3
VCC3
VCC3
BC1099
*
*
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
BC1098
BC1098
0.1uF
0.1uF
C0603
C0603
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
BC1095
*
*
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
BC1095
0.1uF
0.1uF
C0603
C0603
BC1094
BC1094
0.1uF
0.1uF
*
*
C0603
C0603
*
*
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
BC1096
BC1096
0.1uF
0.1uF
C0603
C0603
Dummy
Dummy
*
*
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
BC1097
BC1097
0.1uF
0.1uF
C0603
C0603
Dummy
Dummy
*
*
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
BC1099
0.1uF
0.1uF
C0603
C0603
Dummy
Dummy
Note: CAP are close to BIOS chip.
VCC3
EC127
EC127
470uF
470uF
*
*
16V, +/-20%
16V, +/-20%
CE35D80H200
CE35D80H200
Dummy
Dummy
TECHNOLOGY COPR.
TECHNOLOGY COPR.
Title
Title
Title
Document Number Rev
Document Number Rev
Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
BIOS/FLOPPY
BIOS/FLOPPY
BIOS/FLOPPY
661M08
661M08
661M08
TECHNOLOGY COPR.
of
31 44Monday, August 01, 2005
of
31 44Monday, August 01, 2005
of
31 44Monday, August 01, 2005
A
A
A
A
8 7 6 5 4 3 2 1
A
Voltage Monitor
FAN Input and Output
R165
R165
6.8K
6.8K
+/-1%
+/-1%
R0603
R0603
*
*
BC286
BC286
0.1uF
0.1uF
C0603
C0603
DUMMY
DUMMY
+12V
BC247
BC247
0.1uF
0.1uF
C0603
C0603
DUMMY
DUMMY
VCC2.5_MEM
R166
R166
*
*
30K
30K
+/-1%
+/-1%
R0603
R0603
RN58
RN58
1
*
*
3
5
7 8
10K
10K
+/-5%
+/-5%
8P4R0603
8P4R0603
R805
R805
BC248
BC248
0.1uF
0.1uF
*
*
C0603
C0603
DUMMY
DUMMY
R170
R170
*
*
30K
30K
+/-1%
+/-1%
R0603
R0603
10K
10K
+/-5%
+/-5%
R0603
R0603
2
4
6
*
*
FAN_CTL128
VCCP VCC3
+12V
R167
R167
*
*
4.7K
4.7K
+/-5%
+/-5%
R0603
R0603
R933 27K
G
Dummy
Dummy
R933 27K
*
*
R0603 +/-5%
R0603 +/-5%
R934
R934
22K
22K
+/-5%
+/-5%
*
*
R0603
R0603
R795
R795
*
*
R796 4.7K
R796 4.7K
R797 1K
R797 1K
DS
Q40
Q40
2N7002
2N7002
check
Please note R797 change from 4.7K
to 1K. Because the resister is
current limit resister.
100
100
R0603
R0603
+/-5%
+/-5%
Reserved
Reserved
Dummy
Dummy
Dummy
Dummy
R0603
R0603
Header_1X4 (FAN4P)
Header_1X4 (FAN4P)
B
EC97
EC97
22uF
22uF
*
*
25V, +/-20%
25V, +/-20%
CE20D50H110
CE20D50H110
+12V
CPU FAN
Q90
Q90
BCP69T1
BCP69T1
Dummy
Dummy
EC
4
5
FAN_TAC228
VCC5
R794
R794
*
*
4.7K
4.7K
+/-5%
+/-5%
R0603
R0603
R799 51
R799 51
Dummy
Dummy
+/-5%
+/-5%
R0805
R0805
4
3
2
1
CPU_FAN
CPU_FAN
21
D40
D40
1N4148W
1N4148W
R7
R7
0
0
1A
+12V
+12V
21
D35
D35
1N4148W
1N4148W
Add 0 ohm 0805 resister
*
*
R800
R800
4.7K
4.7K
+/-5%
+/-5%
R0603
R0603
R801 27K
R801 27K
Fan Header 2
For System
*
*
R0603 +/-5%
R0603 +/-5%
Header_1X3 (FAN3P)
Header_1X3 (FAN3P)
1 4
2
3
SYS_FAN
SYS_FAN
R802
R802
22K
22K
+/-5%
+/-5%
*
*
R0603
R0603
FAN_TAC1 28
VCC5
D D
*
*
VIN028
VIN128
VIN228
VIN428
VIN528
BC246
BC245
C C
BC245
0.1uF
0.1uF
*
*
C0603
C0603
DUMMY
DUMMY
BC246
0.1uF
0.1uF
*
*
C0603
C0603
DUMMY
DUMMY
*
*
B B
Temperature Monitor
Choosing method of measuring temperature by either thermistor or diode
SIOVREF28
R171
BC249
BC249
0.1uF
0.1uF
*
*
C0603
C0603
R171
*
*
10K
10K
+/-1%
+/-1%
R0603
R0603
TMPIN328
TMPIN128
BC250
BC250
0.1uF
0.1uF
C0603
C0603
R0603
R0603
*
*
+/-1%
*
*
+/-1%
T
T
10K
10K
RT1
RT1
*
*
For CPUFor System
BC252
BC252
3.3nF
3.3nF
50V, X7R, +/-10%
50V, X7R, +/-10%
C0603
C0603
JP3
JP3
SHORT/NA
SHORT/NA
JP4
JP4
SHORT/NA
SHORT/NA
12
12
THERMDA 5
THERMDC 5
TECHNOLOGY COPR.
TECHNOLOGY COPR.
Title
Title
Title
Document Number Rev
Document Number Rev
Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
FAN
FAN
FAN
661M08
661M08
661M08
TECHNOLOGY COPR.
of
32 44Monday, August 01, 2005
of
32 44Monday, August 01, 2005
of
32 44Monday, August 01, 2005
A
A
A
A
8 7 6 5 4 3 2 1
A
DUMMY
DUMMY
EC34
EC34
22uF
22uF
25V, +/-20%
25V, +/-20%
CE20D50H110
CE20D50H110
*
*
*
*
*
*
BC269
BC269
*
*
1nF
1nF
VCC5
*
*
*
*
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
BC270
BC270
0.1uF
0.1uF
1
BC266
BC266
10uF
10uF
C1206
C1206
*
*
U13
U13
OUT
BC271
BC271
1uF
1uF
2
*
*
GND
LM78L05
LM78L05
R173
R173
5.6K
5.6K
Dummy
Dummy
+12V
3
IN
*
*
LINE_OUT_L 34
LINE_OUT_R 34
F_MIC 34
JD0 34
VREFOUT 34
BC257
BC257
1uF
1uF
D D
BC255
BC255
0.1uF
0.1uF
*
*
C0603
C0603
FRONT_OUT_L
FRONT_OUT_R
MONO_OUT
Front-MIC1
SURR-OUT-L
SURR-OUT-R
CEN-OUT
LFE-OUT
JD0(GPIO0)
XTLSEL
VREFOUT
Front-MIC2
ALC655
ALC655
VCC5A
BC256
BC256
0.1uF
0.1uF
*
*
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
C0603
C0603
U14
U14
35
36
37
33
NC_33
34
39
40
NC_40
41
43
44
45
46
28
27
VREF
29
AFILT1
30
AFILT2
31
VRDA
32
*
*
VCC3
BC254
BC254
BC253
BC253
0.1uF
0.1uF
0.1uF
0.1uF
*
*
*
*
R2491 22
R2491 22
*
*
R2492 22
R2492 22
*
*
XTL-IN
AUDIO_CLK17
AC_RESET-14
BIT_CLK14
SYNC14
SDATI014
C C
SDATO14
AUX_L34
AUX_R34
JD234
JD134
CD_L34
CD_GND34
CD_R34
MIC134
MIC234
LINE_IN_L34
LINE_IN_R34
SPDIF_OUT34
PC_BEEP
AC_RESETÂBIT_CLK
SYNC
SDATI0
SDATO
BC284 1uF
BC284 1uF
BC285 1uF
BC285 1uF
BC259 1uF
BC259 1uF
BC260 1uF
BC260 1uF
BC261 1uF
BC261 1uF
BC262 1uF
BC262 1uF
BC263 1uF
BC263 1uF
BC264 2.2uF
BC264 2.2uF
BC265 2.2uF
BC265 2.2uF
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
Note: Close to Chip
C0603
C0603
11
10
12
13
14
15
16
17
18
19
20
21
22
23
24
47
48
C0603
C0603
3
2
6
8
5
XTL_OUT
XTL_IN
RESET#
BIT_CLK
SYNC
SDATA_IN
SDATA_OUT
PC_BEEP
PHONE
AUX_L
AUX_R
JD2
JD1
CD_L
CD_GND
CD_R
MIC1
MIC2
LINE_IN_L
LINE_IN_R
SPDIFI(EAPD)
SPDIFO
1
9
25
38
AVdd1
DVdd1
DVdd2
ALC655
ALC655
DVss1
DVss2
4
7
26
AVdd2
AVss1
AVss2
42
NC_49
49
R172
R172
FB
FB L0805 80 Ohm
FB L0805 80 Ohm
2 1
*
*
EC14 100uF CE25D60H110 16V, +/-20%
EC14 100uF CE25D60H110 16V, +/-20%
EC15 100uF CE25D60H110 16V, +/-20%
EC15 100uF CE25D60H110 16V, +/-20%
BC258 1uF
BC258 1uF
BC267
BC267
1uF
1uF
BC268
BC268
*
*
1nF
1nF
655/653
B B
BIT_CLK
BC346
BC346
22pF
22pF
*
*
JP1
JP1
SHORT/NA
SHORT/NA
12
PC_BEEP SPKR
BC272
BC272
1uF
1uF
*
*
BC273
BC273
*
*
100pF
100pF
*
*
R176
R176
1K
1K
R175
R175
10K
10K
*
*
SPKR 14,38
TECHNOLOGY COPR.
TECHNOLOGY COPR.
Title
Title
Title
Document Number Rev
Document Number Rev
Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
653/655 AC97 CODEC
653/655 AC97 CODEC
653/655 AC97 CODEC
661M08
661M08
661M08
TECHNOLOGY COPR.
33 44Monday, August 01, 2005
33 44Monday, August 01, 2005
33 44Monday, August 01, 2005
A
A
of
of
of
A
A
8 7 6 5 4 3 2 1
A
LINE IN
AUDIOC
AUDIOC
D D
40
JACK_AUDX3 Vertical
JACK_AUDX3 Vertical
*
32
33
34
35
10K
10K
+/-5%
+/-5%
R0603
R0603
*
*
*
*
6.3V, X5R, +/-10%
6.3V, X5R, +/-10%
C0805
C0805
FB23 BLM18BB470SN1DFB23 BLM18BB470SN1D
FB24 BLM18BB470SN1DFB24 BLM18BB470SN1D
BC276
BC276
BC275
BC275
100pF
100pF
100pF
100pF
*
*
C0603
C0603
C0603
C0603
BC274
BC274
3.3uF
3.3uF
R177
R177
*
JD2 33
21
21
R180
R180
*
*
22K
22K
R0603
R0603
LINE_IN_L 33
R181
R181
*
*
22K
22K
R0603
R0603
LINE_IN_R 33
F_MIC33
LINE_OUT_R33
LINE_OUT_L33
LINE_OUT_R FRONT_OUT_R
LINE_OUT_L
R975
R975
0
0
*
*
+/-5%
+/-5%
*
*
R0603
R0603
Dummy
Dummy
R2493
R2493
10K
10K
F_AUDIO_(5-6)
F_AUDIO_(5-6)
VCC5A
*
*
R179
R179
10K
10K
F_AUDIO_(9-10)
F_AUDIO_(9-10)
F_AUDIO
F_AUDIO
1 2
3
5
7
X
X
9
Header_2X5_8
Header_2X5_8
VCC5A
4
6
10
*
*
FRONT_OUT_L
BC277
BC277
0.1uF
0.1uF
VREFOUT 33
R183
R183
R182
R182
4.7K
4.7K
4.7K
4.7K
*
*
*
JD0 33
BC278
BC278
3.3uF
R184
R184
10K
10K
*
*
3.3uF
*
*
6.3V, X5R, +/-10%
6.3V, X5R, +/-10%
C0805
C0805
BC280
BC280
BC279
BC279
100pF
100pF
100pF
100pF
*
*
*
C C
*
MIC IN
AUDIOA
AUDIOA
37
36
JACK_AUDX3 Vertical
JACK_AUDX3 Vertical
1
2
3
4
5
B B
*
SPDIF_OUT33
JST-CON4-2-Black
JST-CON4-2-Black
5
CD_IN
CD_IN
RN59
RN59
1
*
*
3
5
7 8
22K
22K
+/-5%
+/-5%
8P4R0603
8P4R0603
2
4
6
MIC1 33
MIC2 33
VCC5
Jumper_2P-Blue
Jumper_2P-Blue
SPDIF_OUT
SPDIF_OUT
1
1
3
3
4
4
Header_1X4_2
Header_1X4_2
1
2
3
4
Reserved
Reserved
Jumper_2P-Blue
Jumper_2P-Blue
CD_L 33
CD_GND 33
CD_R 33
LINE OUT
JD1 33
BC281
BC281
3.3uF
R185
R185
10K
10K
3.3uF
*
*
FRONT_OUT_R
FRONT_OUT_L
*
*
AUDIOB
AUDIOB
25
38
39
24
23
22
AUX_L33
AUX_R33
AUX_IN
AUX_IN
1
2
3
4
Header_1X4
Header_1X4
Reserved
Reserved
5
JACK_AUDX3 Vertical
JACK_AUDX3 Vertical
BC282
BC282
100pF
100pF
*
*
BC283
BC283
100pF
100pF
*
*
TECHNOLOGY COPR.
TECHNOLOGY COPR.
Title
Title
Title
Document Number Rev
Document Number Rev
Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
AC97 I/O
AC97 I/O
AC97 I/O
661M08
661M08
661M08
TECHNOLOGY COPR.
of
34 44Monday, August 01, 2005
of
34 44Monday, August 01, 2005
of
34 44Monday, August 01, 2005
A
A
A
A
A
4 4
COL14
CRS14
VGMII
AC131_VREG
3 3
AC131_VREG
AC131_VREG
FB L0805 100 Ohm
FB L0805 100 Ohm
MDI0+27
MDI0-27
MDI1-27
MDI1+27
AC131_VREG
R2434 4.7K+/-5%R2434 4.7K+/-5%
R2435 4.7K+/-5%
R2435 4.7K+/-5%
FB25
FB25
Dummy
Dummy
2 1
BC1091
BC1091
2.2uF
2.2uF
XTAL2
XTAL1
BC1058
BC1058
R2442 1.24K +/-1%R2442 1.24K +/-1%
0.1uF
0.1uF
*
*
*
*
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
BC1055
BC1055
0.1uF
0.1uF
C0805
C0805
BC1056
BC1056
0.1uF
0.1uF
*
*
*
*
U15
U15
1
2
3
4
5
6
7
8
XTALI
XTALO
TD+
TDÂRDÂRD+
AVDD
RDAC
32
REGOUT
B
30
31
28
29
REGIN
CRS/STANDBY
COL/ENGYDET
TXD025TXD126TXD227TXD3
RXD0/PHY0
RXD1/ANEN
TXEN
TXC
OVDD
RXER
RXC
RXDV
24
23
R2437 4.7K DummyR2437 4.7K Dummy
22
21
R2438 4.7K
R2438 4.7K
R2439 22 R0603+/-5%R2439 22 R0603+/-5%
20
19
18
17
Dummy
Dummy
Dummy
Dummy
C
TXD3 14
TXD2 14
TXD1 14
TXD0 14
D
XTAL1
XTAL2
50V, NPO, +/-5%
50V, NPO, +/-5%
R2436
R2436
1M
1M
+/-1%
+/-1%
R0603
R0603
Dummy
Dummy
BC1054
BC1054
27pF
27pF
C0603
C0603
*
*
X6
X6
XTAL-25MHz
XTAL-25MHz
+/-50PPM
+/-50PPM
X2O
X2O
1 2
BC1057
BC1057
27pF
27pF
C0603 50V, NPO, +/-5%
C0603 50V, NPO, +/-5%
*
*
E
Place crystal circuit
close to PHY
TXEN 14
TXCLK 14
VGMII
RXD0
RXDV 14
RXD0 14
RXD1 14
R24414.7K
R24414.7K
RXCLK 14
RXER 14
RXD0
R2440 4.7KR2440 4.7K
Phy Address
TBD
VGMII
OVDD9RESET10LED211LED112MDIO13MDC14RXD3/ISOLATE15RXD2/F100
VGMII
LAN_RESETJ14
ACTIVITYJ27
2 2
1 1
LINKJ27
PCIRST-13,19,24,25,26
R2443 4.7K R0603+/-5%R2443 4.7K R0603+/-5%
R310 0
R310 0
Dummy
Dummy
A
+/-5% R0603
+/-5% R0603
*
*
B
16
33
GND
AC131KML
AC131KML
Reserved
Reserved
RXD2 14
RXD3 14
MDC 14
MDIO 14
R24571.5K
R24571.5K
VGMII
TECHNOLOGY COPR.
TECHNOLOGY COPR.
Title
Title
Title
Document Number Rev
Document Number Rev
Document Number Rev
Date: Sheet
Date: Sheet
C
D
Date: Sheet
LAN PHY
LAN PHY
LAN PHY
661M08
661M08
661M08
TECHNOLOGY COPR.
of
35 44Monday, August 01, 2005
of
35 44Monday, August 01, 2005
of
35 44Monday, August 01, 2005
E
A
A
A
8 7 6 5 4 3 2 1
A
VCC5 SB3V
VCC5
D D
*
R191
R191
*
*
330
330
FP1
FP1
1 2
HDDLED15,26
RSTSW-38
BC294
BC294
0.1uF
0.1uF
*
*
3
5
7 8
9
Header_2X5_10
Header_2X5_10
*
R190
R190
220
220
4
6
X
X
R192
R192
*
*
4.7K
4.7K
+/-5%
+/-5%
R0603
R0603
DUMMY
DUMMY
R2501
R2501
BC295
BC295
0.1uF
0.1uF
*
*
0 +/-5%
0 +/-5%
12
SB3V SB3V
R2498
R2498
*
*
4.7K
4.7K
+/-5%
+/-5%
R0603
R0603
Reserved
Reserved
R2500 2K +/-5%R2500 2K +/-5%
B
MMBT3904
MMBT3904
E C
Q117
Q117
Reserved
Reserved
SOT23_BEC
SOT23_BEC
R0603Dummy
R0603Dummy
R2486 0 +/-5%R2486 0 +/-5%
BC1085
BC1085
0.1uF
0.1uF
*
*
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
C0603
C0603
dummy
dummy
ACPILED 14
R2499
R2499
*
*
4.7K
4.7K
+/-5%
+/-5%
R0603
R0603
Reserved
Reserved
12
D8
D8
2 1
FDLL4148
FDLL4148
R193 1K
R193 1K
*
*
ACPILED 14
0 +/-5%
0 +/-5%
R0603Dummy
R0603Dummy
+/-5%
+/-5%
R0603
R0603
*
*
R194
R194
100K
100K
+/-1%
+/-1%
R0603
R0603
SUSCJ 28
EC16
EC16
22uF
22uF
*
*
25V, +/-20%
25V, +/-20%
CE20D50H110
CE20D50H110
AUXOK
R2502
R2502
SB3V
PWRBTN- 14,28 AUXOK 11,14
PBTNJ_SIO 28
C C
For EMI close to connector
RTC
NOTE!
1.The RTCVDD is 3V
2.Decoupling capacitor must be close to 96X RTCVDD pin.
SB3V
B B
RBAT28
BAT1
BAT1
3.RTC circuit must strictly follow SiS's recommended design
SiS is not responsible for RTC problems from foreign designs.
R196
R196
*
*
1K
1K
+/-5%
+/-5%
R0603
R0603
2 1
Battery Holder
Battery Holder
D9
BAT54CD9BAT54C
2
3
1
BC296
BC296
1uF
1uF
*
*
BAT1_1
BAT1_1
LITHIUM BATT
LITHIUM BATT
CR2032
CR2032
Battery
Battery
BAT
2-3: NORMAL
1-2: Clear CMOS
CLR_CMOS_(2-3)
CLR_CMOS_(2-3)
Jumper_2P-Blue
Jumper_2P-Blue
CLR_CMOS
CLR_CMOS
3
3
2
2
1
1
Header_1X3
Header_1X3
RTCVDD
BC297
BC297
1uF
1uF
*
*
*
*
Decoupling Capacitor
Place close to 96X
2 1
BC298
BC298
10nF
10nF
D10
D10
FDLL4148
FDLL4148
R195
R195
10K
10K
+/-5%
+/-5%
*
*
R0603
R0603
BC299
BC299
10uF
10uF
*
*
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
C1206
C1206
BATOK 14
A
TECHNOLOGY COPR.
TECHNOLOGY COPR.
Title
Title
Title
Document Number Rev
Document Number Rev
Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
BTN/RTC Batt
BTN/RTC Batt
BTN/RTC Batt
661M08
661M08
661M08
TECHNOLOGY COPR.
A
A
of
36 44Monday, August 01, 2005
of
36 44Monday, August 01, 2005
of
36 44Monday, August 01, 2005
A
8 7 6 5 4 3 2 1
A
5V DUAL CIRCUIT
Q105
Q105
MMBT3904
MMBT3904
E C
*
*
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
SB5V
BC1083
BC1083
10uF
10uF
C1206
C1206
VCC5
Q83
Q83
1
S2 G2 S1 G1
S2 G2 S1 G1
2
3
4 5
AO4600
AO4600
VCC5
1
*
*
3
5
7 8
G
Q38
Q38
AP9916H
AP9916H
SB5V
DDR 2.5V CIRCUIT
*
*
R937
R937
4.7K
4.7K
Dummy
Dummy
+12V
2
1
D33
D33
BAT54C
BAT54C
3
R774
R774
*
*
220
220
+/-5%
+/-5%
R0603
R0603
G
R775
R766
R766
2 3
R775
1
*
*
562
562
R0603
R0603
*
*
+/-1%
+/-1%
U30
U30
LM431ACZ
LM431ACZ
10K
10K
8
7
6
D1D1D2D2
D1D1D2D2
2
4
6
DS
RN79
RN79
0
0
+/-5%
+/-5%
8P4R0603
8P4R0603
Dummy
Dummy
VCC3
D S
DS
*
*
Q77
Q77
AP15N03H
AP15N03H
G
Q80
Q80
AP9916H
AP9916H
VCC5_DUAL
*
*
EC94
EC94
1000uF
1000uF
6.3V, +/-20%
6.3V, +/-20%
ce35d80h140
ce35d80h140
SB3V
EC18
EC18
1000uF
1000uF
*
*
6.3V, +/-20%
6.3V, +/-20%
ce35d80h140
ce35d80h140
BC1020
BC1020
1uF
1uF
16V, X7R, +/-10%
16V, X7R, +/-10%
*
*
C0805
C0805
Dummy
Dummy
D34
D34
B120
B120
2 1
*
*
BC330
BC330
0.1uF
0.1uF
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
C0603
C0603
+12V
*
*
DS
Q78
Q78
2N7002
2N7002
(2.64V)
EC19
EC19
1000uF
1000uF
6.3V, +/-20%
6.3V, +/-20%
ce35d80h140
ce35d80h140
*
*
R770
R770
4.7K
4.7K
+/-5%
+/-5%
R0603
R0603
G
Q79
Q79
MMBT3904
MMBT3904
VCC2.5_MEM
EC20
EC20
470uF
470uF
16V, +/-20%
16V, +/-20%
CE35D80H200
CE35D80H200
DUMMY
DUMMY
VCC2.5_MEM
SB5V
R771
R771
*
*
4.7K
4.7K
+/-5%
+/-5%
R0603
R0603
E C
VCC3
U17
U17
1
3
VIN
REFEN
RT9173
RT9173
R199
R199
100K
100K
*
*
BC301
BC301
0.1uF
R768
R768
*
*
1K
1K
R0603
R0603
+/-5%
+/-5%
0.1uF
*
*
DUMMY
DUMMY
PWOK 38
R200
R200
100K
100K
*
*
B
8
VCNTL
7
VCNTL
6
VCNTL
5
VCNTL
4
VOUT
2
GND
Title
Title
Title
Document Number Rev
Document Number Rev
Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
BC302
BC302
EC21
EC21
0.1uF
0.1uF
470uF
470uF
*
*
*
*
DDR 2.5V DDRVTT
DDR 2.5V DDRVTT
DDR 2.5V DDRVTT
661M08
661M08
661M08
DDR_VTT
TECHNOLOGY COPR.
TECHNOLOGY COPR.
TECHNOLOGY COPR.
A
A
of
37 42Monday, August 01, 2005
of
37 42Monday, August 01, 2005
of
37 42Monday, August 01, 2005
A
SB5V +12V
R780
R780
*
*
4.7K
D D
PWOK
R777 4.7K
PWOK38
S3AUXSW-10,28
R777 4.7K
*
*
R778 4.7K
R778 4.7K
Dummy
Dummy
*
*
R779
R779
*
*
4.7K
4.7K
+/-5%
+/-5%
R0603
R0603
Q85
Q85
B
MMBT3904
MMBT3904
E C
R782
R782
*
*
1K
1K
+/-5%
+/-5%
R0603
R0603
C C
SB5V
R935
R935
*
*
4.7K
4.7K
+/-5%
+/-5%
R0603
R0603
B B
S3AUXSW-10,28
R938 4.7K
R938 4.7K
B
*
*
-KEYLOCK14
Q107
Q107
MMBT3904
MMBT3904
E C
R767
R767
1K
1K
R0603
R0603
+/-5%
+/-5%
Dummy
Dummy
*
*
R904
R904
*
*
1K
1K
R0603
R0603
+/-5%
+/-5%
SB5V
R769
R769
*
*
4.7K
4.7K
+/-5%
+/-5%
R0603
R0603
Dummy
Dummy
Q82
Q82
B
MMBT3904
MMBT3904
Dummy
Dummy
E C
4.7K
+/-5%
+/-5%
R0603
R0603
Q84
Q84
B
MMBT3904
MMBT3904
E C
SB5V
R781
R781
*
*
4.7K
4.7K
+/-5%
+/-5%
R0603
R0603
Q86
Q86
B
MMBT3904
MMBT3904
E C
B
R773
R773
*
*
220
220
+/-5%
+/-5%
R0603
R0603
DS
Q81
Q81
G
2N7002
2N7002
Dummy
Dummy
A
8 7 6 5 4 3 2 1
A
SB5V VCC5
R201
R201
*
*
2.7K
2.7K
D D
PSON-14,28
PSON-
*
*
BC303
BC303
0.1uF
0.1uF
DUMMY
DUMMY
C C
PWOK
B B
VRMPWRGD7,17
VRMPWRGD
FSB_VTT
R206 4.7K
R206 4.7K
R208 4.7K
R208 4.7K
R5
R5
4.7K
4.7K
+/-5%
+/-5%
R0603
R0603
Reserved
Reserved
R793 4.7K
R793 4.7K
R0603
R0603
+/-5%
+/-5%
Dummy
Dummy
+/-5%
+/-5%
*
*
R0603
R0603
*
*
+/-5%
+/-5%
*
*
R0603
R0603
*
*
*
*
BC1019
BC1019
0.1uF
0.1uF
Dummy
Dummy
VCC3 +12VSB5VVCC5 -12V VCC5
PWR1
PWR1
11
12
13
14
15
16
17
18
19
20
BC305
BC305
0.1uF
0.1uF
BC306
BC306
0.1uF
0.1uF
B
3.3V*
-12V
COM
PS-ON
COM
COM
COM
-5V
5V
5V
ATX_2X10
ATX_2X10
B
B
SB5V
*
*
3.3V*
3.3V*
COM
5V
COM
5V
COM
PW-OK
5VSB
12V
21
21
SB5V VCC3
R204
R204
*
*
4.7K
4.7K
+/-5%
+/-5%
R0603
R0603
Q17
Q17
MMBT3904
MMBT3904
E C
Q18
Q18
MMBT3904
MMBT3904
E C
R791
R791
4.7K
4.7K
+/-5%
+/-5%
R0603
R0603
Dummy
Dummy
Q89
Q89
MMBT3904
MMBT3904
Dummy
Dummy
E C
H3
H1
H1
Mounting Hole
Mounting Hole
mh40x80_8
R202
R202
8.2K
1
2
3
4
5
6
7
8
9
10
R203
R203
*
*
1K
1K
+/-5%
+/-5%
R0603
R0603
DS
Q16
Q16
G
2N7002
2N7002
VCC3
R207
R207
*
*
1K
1K
+/-5%
+/-5%
R0603
R0603
DS
Q19
Q19
G
2N7002
2N7002
FSB_VTT
R792
R792
*
*
4.7K
4.7K
+/-5%
+/-5%
R0603
R0603
Dummy
Dummy
DS
Q103
Q103
G
2N7002
2N7002
Dummy
Dummy
8.2K
*
*
PWOK
*
*
BC304
BC304
0.1uF
0.1uF
DUMMY
DUMMY
TO south-bridge
SBPWRGD 14,17
R205
R205
100
100
RSTSW- 36
+/-5%
+/-5%
*
*
R0603
R0603
TO north-bridge
NBPWRGD 11
VTT_PWRGD 6 VTT_PWRGD 6
PWOK 37
VTT_OUT_RIGHT
R215
R215
mh40x80_8
7
8
9
SPKR14,33
BEEP_SIO28
620
620
R0603
R0603
+/-5%
+/-5%
H2
H2
Mounting Hole
Mounting Hole
mh40x80_8
mh40x80_8
5
6
4
7
3
8
2
9
1
VCC5
FAB B R231 Dummy for Beep volume.
R0603
R0603
R231
R231
10K
10K
+/-5%
+/-5%
Dummy
Dummy
1 2
D11
D11
1
BAT54C
BAT54C
2
H3
Mounting Hole
Mounting Hole
mh40x80_8
mh40x80_8
5
6
VCC5
*
*
7
4
8
3
9
2
1
R233
R233
1 2
3
2.7K R0603
2.7K R0603
Change R33 from 100 to 2.7K
BC817
BC817
0.1uF
0.1uF
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
C0603
C0603
H4
H4
Mounting Hole
Mounting Hole
mh40x80_8
mh40x80_8
5
6
4
3
2
1
Add speaker header
+/-5%
+/-5%
Title
Title
Title
Document Number Rev
Document Number Rev
Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
6
7
8
9
VCC5
Change R232 from
0603 to 0805
R232 33
Q26
Q26
B
MMBT3904
MMBT3904
E C
VCC3
*
*
5
4
3
2
1
1 2
BC818
BC818
0.1uF
0.1uF
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
C0603
C0603
Dummy
Dummy
POWER Con
POWER Con
POWER Con
+/-5%R232 33
+/-5%
R0603
R0603
BC313
BC313
12
22pF
22pF
50V, NPO, +/-5%
50V, NPO, +/-5%
C0603
C0603
661M08
661M08
661M08
H6
H6
Mounting Hole
Mounting Hole
mh40x80_8
mh40x80_8
5
6
7
8
9
1
1
2
SPKJ
SPKJ
TECHNOLOGY COPR.
TECHNOLOGY COPR.
TECHNOLOGY COPR.
4
3
2
+
+
-
-
38 44Monday, August 01, 2005
38 44Monday, August 01, 2005
38 44Monday, August 01, 2005
BUZ
BUZ
Buzzer
Buzzer
BZ2
BZ2
1
3
4
BUZZER
BUZZER
Reserved
Reserved
SPEAKER
SPEAKER
1
3
4
Header_1X4_2
Header_1X4_2
Dummy
Dummy
of
of
of
A
A
A
A
5
4
3
2
1
VCC1.8V and VDDQ FSB_VTT
SB3V
R209
R209
*
*
806
*
*
*
*
*
*
806
+/-1%
+/-1%
R0603
R0603
R212
R212
698
698
+/-1%
+/-1%
R0603
R0603
1.81V
R213
R213
330
330
+/-1%
+/-1%
R0603
R0603
1.48V
R216
R216
R0603
R0603
+/-1%
+/-1%
1.5K
1.5K
U16B
U16B
411
5
+
+
-
-
+12V
+
+
-
-
+12V
+
+
-
-
411
411
LM324
LM324
LM324
LM324
LM324
LM324
7
U16C
U16C
8
U16D
U16D
14
6
10
9
12
13
BC316
BC316
1nF
1nF
*
*
50V, X7R, +/-10%
50V, X7R, +/-10%
C0603
C0603
BC317
BC317
1nF
1nF
*
*
50V, X7R, +/-10%
50V, X7R, +/-10%
C0603
C0603
BC318
BC318
1nF
1nF
*
*
50V, X7R, +/-10%
50V, X7R, +/-10%
C0603
C0603
R85
R85
*
*
2.2
2.2
R0805
R0805
+/-5%
+/-5%
R86
R86
*
*
2.2K
2.2K
R0603
R0603
+/-5%
+/-5%
R87
R87
*
*
2.2
2.2
R0805
R0805
+/-5%
+/-5%
R174
R174
*
*
2.2K
2.2K
R0603
R0603
+/-5%
+/-5%
R234
R234
*
*
2.2
2.2
R0805
R0805
+/-5%
+/-5%
R235
R235
*
*
2.2K
2.2K
R0603
R0603
+/-5%
+/-5%
D D
C C
B B
VCC3+12V
EC24
DS
Q20
Q20
G
AP15N03H
AP15N03H
DS
Q21
Q21
G
AP15N03H
AP15N03H
VCC3
DS
Q22
Q22
G
AP15N03H
AP15N03H
*
*
*
*
*
*
*
*
VCC1.8V
EC24
470uF
470uF
EC27
EC27
470uF
470uF
EC28
EC28
1000uF
1000uF
6.3V, +/-20%
6.3V, +/-20%
ce35d80h140
ce35d80h140
EC31
EC31
1000uF
1000uF
6.3V, +/-20%
6.3V, +/-20%
ce35d80h140
ce35d80h140
*
*
*
*
*
*
VDDQ
*
*
BC307
BC307
1uF
1uF
DUMMY
DUMMY
BC309
BC309
1uF
1uF
DUMMY
DUMMY
EC30
EC30
1000uF
1000uF
*
*
6.3V, +/-20%
6.3V, +/-20%
ce35d80h140
ce35d80h140
BC310
BC310
1uF
1uF
DUMMY
DUMMY
EC33
EC33
1000uF
1000uF
6.3V, +/-20%
6.3V, +/-20%
ce35d80h140
ce35d80h140
SB1.8V for 964
SB3V SB1.8V
U27
U27
1
ADJ
Vout
4
Vin
AME1117
AME1117
2
3
A A
BC100
BC100
0.1uF
0.1uF
*
*
C0603
C0603
5
4
R136
R136
*
*
105
105
+/-1%
+/-1%
R0603
R0603
R214
R214
*
*
47
47
+/-1%
+/-1%
R0603
R0603
BC101
BC101
10uF
10uF
*
*
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
C1206
C1206
4
SB3V
R790
R790
1K
1K
+/-1%
+/-1%
R0603
R0603
R788
R788
1K
1K
+/-1%
+/-1%
R0603
R0603
R786
R786
1.13K
1.13K
+/-1%
+/-1%
R0603
R0603
BC920
BC920
0.1uF
0.1uF
*
*
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
C0603
C0603
BC921
BC921
0.1uF
0.1uF
*
*
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
C0603
C0603
+12V
U31A
U31A
84
LM358M
LM358M
3
+
+
-
-
+12V
+
+
-
-
1
-12V
U31B
U31B
84
LM358M
LM358M
7
-12V
ADD Q1 FOR SINK Current.
2
5
6
SB3.3V
U18
U18
AMS1085
AMS1085
3
VIN
3
DUMMY
DUMMY
Vref=1.25V
1
2
Vin
ADJ
Vout
U19
U19
4
AMS1117
AMS1117
4
VOUT
ADJ
1
+
Vref
-
2
R210
R210
124
124
*
*
*
*
R211
R211
205
205
*
*
2
SB5V
EC25
EC25
10uF
10uF
*
*
3
VCC3
EC95
EC95
BC919
BC919
1000uF
1000uF
0.1uF
0.1uF
*
*
*
R787
R787
1K
1K
+/-5%
+/-5%
R0603
R0603
R789
R789
1K
1K
+/-5%
+/-5%
R0603
R0603
G
G
SB3V
DS
DS
B
*
Q87
Q87
AP15N03H
AP15N03H
Q88
Q88
AP15N03H
AP15N03H
EC
Q1
Q1
MMBT2907A
MMBT2907A
sot23_bech16
sot23_bech16
C0603
C0603
EC29
EC29
470uF
470uF
*
*
**
**
CE35_50D100H300
CE35_50D100H300
6.3V, +/-20%
6.3V, +/-20%
ce35d80h140
ce35d80h140
FAB C: Add EC29 470uF
5A
BC922
EC96
EC96
3300uF
3300uF
6.3V, +/-20%
6.3V, +/-20%
BC922
0.1uF
0.1uF
*
*
C0603
C0603
FSB_VTT
*
*
BC923
BC923
0.1uF
0.1uF
C0603
C0603
SB3.3V
BC308
BC308
EC26
EC26
0.1uF
0.1uF
470uF
470uF
*
*
TECHNOLOGY COPR.
TECHNOLOGY COPR.
Title
Title
Title
Document Number Rev
Document Number Rev
Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
SB3V, SB1.8V, VCC1.8V, VDDQ
SB3V, SB1.8V, VCC1.8V, VDDQ
SB3V, SB1.8V, VCC1.8V, VDDQ
661M08
661M08
661M08
TECHNOLOGY COPR.
of
39 44Monday, August 01, 2005
of
39 44Monday, August 01, 2005
of
39 44Monday, August 01, 2005
1
A
A
A
5
D D
C C
4
3
2
1
B B
H5
H5
Mounting Hole
Mounting Hole
mh40x80_8
mh40x80_8
5
6
4
A A
5
4
3
7
3
8
2
9
1
TECHNOLOGY COPR.
TECHNOLOGY COPR.
Title
Title
Title
Document Number Rev
Document Number Rev
Document Number Rev
Date: Sheet
Date: Sheet of
2
Date: Sheet of
TI1394(NA)
TI1394(NA)
TI1394(NA)
661M08
661M08
661M08
1
TECHNOLOGY COPR.
of
40 44Monday, August 01, 2005
40 44Monday, August 01, 2005
40 44Monday, August 01, 2005
A
A
A
5
D D
4
VCC5_DUAL
3
2
1
12
F2
F2
F1813_2.6A
F1813_2.6A
Reserved
Reserved
C C
11
10
USB
USB
8
7
6
5
4
3
2
BOTTOM TOP
BOTTOM TOP
1
B B
USBX2
USBX2
9
12
642
7 8
Dummy
Dummy
R_USBPOWER
BC820
BC820
0.1uF
0.1uF
*
*
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
C0603
C0603
*
*
135
RN72
RN72
0
0
8P4R0603
8P4R0603
+/-5%
+/-5%
R_USBPOWER 27
UV1+
UV1-
UV1+ 15
UV1- 15
UV0+ 15
UV0- 15
A A
TECHNOLOGY COPR.
TECHNOLOGY COPR.
Title
Title
Title
Document Number Rev
Document Number Rev
Document Number Rev
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
SB3V, SB1.8V, VCC1.8V, VDDQ
SB3V, SB1.8V, VCC1.8V, VDDQ
SB3V, SB1.8V, VCC1.8V, VDDQ
661M08
661M08
661M08
TECHNOLOGY COPR.
of
41 44Monday, August 01, 2005
of
41 44Monday, August 01, 2005
of
41 44Monday, August 01, 2005
1
A
A
A
5
1. VRMPWD change pull up net from 3V to 12V for clock gen enable level. 7/11
2. R2488 connect to RSTSW- net for C1->C3 power on issue. 7/11
D D
3. Stuff R2466 ,R2467 , R2468 and Pin 91 pull high 10K on ATXPG net for COM port
debug. 7/15
4. to modify R805 net for HW monitor 5V. 7/18
5. Change Q80 AP15N03H as AP9916H for S3 DDR power loss. 7/5
6. Change LAN RESET from GPIO6 as GPIO9 for resueme state and co-layout with
PCIRESET-. R310 and R311 are switch. 7/18
7. Change R952, R954, R964, TC2 value for VR10.1 debug. 7/20
8. P31 Link WPJ 7/20
9. Add RN5 For VGMII link to 3V_SB 7/20
4
3
2
1
10. Change BC264,BC265 to 2.2uF (BC0805)
11. Link LANRSTJ and GPIO7. 7/28
12. Add GPWAK_ link GPIO9. 7/28
C C
B B
A A
TECHNOLOGY COPR.
TECHNOLOGY COPR.
Title
Title
Title
Document Number Rev
Document Number Rev
Document Number Rev
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
661FX-1 HOST & AGP
661FX-1 HOST & AGP
661FX-1 HOST & AGP
661M08
661M08
661M08
TECHNOLOGY COPR.
of
42 44Monday, August 01, 2005
of
42 44Monday, August 01, 2005
of
42 44Monday, August 01, 2005
1
A
A
A
5
4
3
2
1
Jumper and Header Summary
Clear CMOS
Header_1X3
D D
Header_2X5_8
1-2 : Clear CMOS
2-3 : Normal
F_AUDIO
1 : MIC
2 : GND
3 : MIC BIAS
4 : 5V
5-6 : Line Out - R
9-10: Line Out - L
7 : NC
8 : Key
Header_1X2
C C
Header_1X3 (FAN3P)
Header_1X4 (FAN4P)
INTR
SYS_FAN
CPU_FAN
Header_1X4_2 SPEAKER
Header_1X4_3
Header_2X17_3 (FDD)
B B
Front Panel Switch/LED
1-3 : HDD LED
2-4 : Power / Suspend LED
Header_2X5_10
5-7 : Reset
6-8 : Power Button
Header_2X5_9
SPDIF_OUT
FLOPPY
S0 : steady green
S1 : blinking
S3~S5 : off
9 : NC
10 : Key
FUSB1,FUSB2
Header_2X20_20 (IDE) PIDE
A A
3
SIDE
FOXCONN PCEG
FOXCONN PCEG
FOXCONN PCEG
Title
Title
Title
Jumper Setting / Option Table
Jumper Setting / Option Table
Jumper Setting / Option Table
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
2
Date: Sheet
661M08
661M08
661M08
43 44Monday, August 01, 2005
43 44Monday, August 01, 2005
43 44Monday, August 01, 2005
of
of
1
of
AB
AB
AB
Header_2X20_20 (IDE)
5
4
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