Page 1
123
Industrial ScopeMeter
Service Manual
4822 872 05375
August 1997, Rev. 3, 01/00
© 1997 Fluke Corporation. All rights reserved. Printed in the Netherlands
All product names are trademarks of their respective companies.
Page 2
SERVICE CENTERS
To locate an authorized service center, visit us on the World Wide Web:
http://www.fluke.com
or call Fluke using any of the phone numbers listed below:
+1-888-993-5853 in U.S.A. and Canada
+31-402-678-200 in Europe
+1-425-356-5500 from other countries
Page 3
Table of Contents
Chapter Title Page
1 Safety Instructions ............................................................................. 1-1
1.1 Introduction................................................................................................. 1-3
1.2 Safety Precautions....................................................................................... 1-3
1.3 Caution and Warning Statements................................................................ 1-3
1.4 Symbols....................................................................................................... 1-3
1.5 Impaired Safety........................................................................................... 1-4
1.6 General Safety Information......................................................................... 1-4
2 Characteristics ................................................................................... 2-1
2.1 Introduction................................................................................................. 2-3
2.2 Dual Input Oscilloscope.............................................................................. 2-3
2.2.1 Vertical ................................................................................................ 2-3
2.2.2 Horizontal ............................................................................................ 2-4
2.2.3 Trigger ................................................................................................. 2-4
2.2.4 Advanced Scope Functions.................................................................. 2-5
2.3 Dual Input Meter......................................................................................... 2-5
2.3.1 Input A and Input B ............................................................................. 2-5
2.3.2 Input A ................................................................................................. 2-8
2.3.3 Advanced Meter Functions.................................................................. 2-8
2.4 Miscellaneous ............................................................................................. 2-9
2.5 Environmental............................................................................................. 2-10
2.6 Service and Maintenance ............................................................................ 2-11
2.7 Safety .......................................................................................................... 2-11
2.8 EMC Immunity ........................................................................................... 2-12
3 Circuit Descriptions ........................................................................... 3-1
3.1 Introduction................................................................................................. 3-3
3.2 Block Diagram ............................................................................................ 3-3
3.2.1 Channel A, Channel B Measurement Circuits..................................... 3-4
3.2.2 Trigger Circuit ..................................................................................... 3-4
3.2.3 Digital Circuit ...................................................................................... 3-5
3.2.4 Power Circuit....................................................................................... 3-6
3.2.5 Start-up Sequence, Operating Modes .................................................. 3-7
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3.3 Detailed Circuit Descriptions...................................................................... 3-9
3.3.1 Power Circuit....................................................................................... 3-9
3.3.2 Channel A - Channel B Measurement Circuits ................................... 3-15
3.3.3 Trigger Circuit ..................................................................................... 3-20
3.3.4 Digital Circuit ...................................................................................... 3-25
4 Performance Verification ................................................................... 4-1
4.1 Introduction................................................................................................. 4-3
4.2 Equipment Required For Verification ........................................................ 4-3
4.3 How To Verify ............................................................................................ 4-3
4.4 Display and Backlight Test......................................................................... 4-4
4.5 Input A and Input B Tests ........................................................................... 4-5
4.5.1 Input A and B Base Line Jump Test.................................................... 4-6
4.5.2 Input A Trigger Sensitivity Test.......................................................... 4-7
4.5.3 Input A Frequency Response Upper Transition Point Test................. 4-8
4.5.4 Input A Frequency Measurement Accuracy Test ................................ 4-8
4.5.5 Input B Frequency Measurement Accuracy Test ................................ 4-9
4.5.6 Input B Frequency Response Upper Transition Point Test ................. 4-10
4.5.7 Input B Trigger Sensitivity Test .......................................................... 4-10
4.5.8 Input A and B Trigger Level and Trigger Slope Test.......................... 4-11
4.5.9 Input A and B DC Voltage Accuracy Test .......................................... 4-14
4.5.10 Input A and B AC Voltage Accuracy Test ........................................ 4-15
4.5.11 Input A and B AC Input Coupling Test............................................. 4-16
4.5.12 Input A and B Volts Peak Measurements Test.................................. 4-17
4.5.13 Input A and B Phase Measurements Test.......................................... 4-18
4.5.14 Input A and B High Voltage AC/DC Accuracy Test......................... 4-19
4.5.15 Resistance Measurements Test.......................................................... 4-20
4.5.16 Continuity Function Test ................................................................... 4-21
4.5.17 Diode Test Function Test .................................................................. 4-22
4.5.18 Capacitance Measurements Test ....................................................... 4-22
4.5.19 Video Trigger Test............................................................................. 4-23
5 Calibration Adjustment ...................................................................... 5-1
5.1 General ........................................................................................................ 5-3
5.1.1 Introduction.......................................................................................... 5-3
5.1.2 Calibration number and date................................................................ 5-3
5.1.3 General Instructions............................................................................. 5-3
5.2 Equipment Required For Calibration.......................................................... 5-4
5.3 Starting Calibration Adjustment ................................................................. 5-4
5.4 Contrast Calibration Adjustment ................................................................ 5-6
5.5 Warming Up & Pre-Calibration.................................................................. 5-7
5.6 Final Calibration ......................................................................................... 5-7
5.6.1 HF Gain Input A&B ............................................................................ 5-7
5.6.2 Delta T Gain, Trigger Delay Time & Pulse Adjust Input A................ 5-9
5.6.3 Pulse Adjust Input A (firmware V01.00 only) .................................... 5-10
5.6.4 Pulse Adjust Input B............................................................................ 5-11
5.6.5 Gain DMM (Gain Volt)....................................................................... 5-11
5.6.6 Volt Zero.............................................................................................. 5-13
5.6.7 Zero Ohm (firmware V01.00 only)...................................................... 5-13
5.6.8 Gain Ohm............................................................................................. 5-14
5.6.9 Capacitance Gain Low and High......................................................... 5-15
5.6.10 Capacitance Clamp & Zero................................................................ 5-15
5.6.11 Capacitance Gain............................................................................... 5-16
5.7 Save Calibration Data and Exit................................................................... 5-16
Page 5
Contents (continued)
6 Disassembling the Test Tool............................................................. 6-1
6.1. Introduction................................................................................................ 6-3
6.2. Disassembling Procedures ......................................................................... 6-3
6.1.1 Required Tools .................................................................................... 6-3
6.2.2 Removing the Battery Pack ................................................................. 6-3
6.2.3 Removing the Bail ............................................................................... 6-3
6.2.4 Opening the Test Tool ......................................................................... 6-3
6.2.5 Removing the Main PCA Unit............................................................. 6-5
6.2.6 Removing the Display Assembly......................................................... 6-6
6.2.7 Removing the Keypad and Keypad Foil.............................................. 6-6
6.3 Disassembling the Main PCA Unit............................................................. 6-6
6.4 Reassembling the Main PCA Unit.............................................................. 6-8
6.5 Reassembling the Test Tool........................................................................ 6-8
7 Corrective Maintenance..................................................................... 7-1
7.1 Introduction................................................................................................. 7-3
7.2 Starting Fault Finding. ................................................................................ 7-4
7.3 Charger Circuit............................................................................................ 7-4
7.4 Starting with a Dead Test Tool ................................................................... 7-6
7.4.1 Test Tool Completely Dead................................................................. 7-6
7.4.2 Test Tool Software Does not Run. ...................................................... 7-7
7.4.3 Software Runs, Test Tool not Operative ............................................. 7-7
7.5 Miscellaneous Functions............................................................................. 7-8
7.5.1 Display and Back Light ....................................................................... 7-8
7.5.2 Fly Back Converter.............................................................................. 7-9
7.5.3 Slow ADC............................................................................................ 7-10
7.5.4 Keyboard.............................................................................................. 7-11
7.5.5 Optical Port (Serial RS232 Interface).................................................. 7-11
7.5.6 Channel A, Channel B Voltage Measurements ................................... 7-12
7.5.7 Channel A Ohms and Capacitance Measurements.............................. 7-13
7.5.8 Trigger Functions................................................................................. 7-14
7.5.9 Reference Voltages.............................................................................. 7-15
7.5.10 Buzzer Circuit.................................................................................... 7-15
7.5.11 Reset ROM Circuit (PCB version <8 only)....................................... 7-16
7.5.12 RAM Test .......................................................................................... 7-16
7.5.13 Power ON/OFF.................................................................................. 7-16
7.5.14 PWM Circuit...................................................................................... 7-17
7.5.15 Randomize Circuit............................................................................. 7-17
7.6 Loading Software........................................................................................ 7-17
8 List of Replaceable Parts................................................................... 8-1
8.1 Introduction................................................................................................. 8-3
8.2 How to Obtain Parts.................................................................................... 8-3
8.3 Final Assembly Parts .................................................................................. 8-4
8.4 Main PCA Unit Parts .................................................................................. 8-6
8.5 Main PCA Parts .......................................................................................... 8-7
8.6 Accessory Replacement Parts ..................................................................... 8-24
8.7 Service Tools............................................................................................... 8-24
9 Circuit Diagrams................................................................................. 9-1
9.1 Introduction................................................................................................. 9-3
9.2 Schematic Diagrams.................................................................................... 9-4
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10 Modifications ...................................................................................... 10-1
10.1 Software modifications ............................................................................. 10-1
10.2 Hardware modifications............................................................................ 10-1
Page 7
List of Tables
Table Title Page
2-1. No Visible Trace Disturbance ............................................................................... 2-12
2-2. Trace Disturbance < 10%...................................................................................... 2-12
2-3. Multimeter Disturbance < 1%............................................................................... 2-12
3-1. Fluke 123 Main Blocks ......................................................................................... 3-3
3-2. Fluke 123 Operating Modes.................................................................................. 3-9
3-3. Voltage Ranges And Trace Sensitivity ................................................................. 3-18
3-4. Ohms Ranges, Trace Sensitivity, and Current ...................................................... 3-18
3-5. Capacitance Ranges, Current, and Pulse Width.................................................... 3-20
3-6. D-ASIC PWM Signals........................................................................................... 3-29
4-1. Input A,B Frequency Measurement Accuracy Test .............................................. 4-9
4-2. Volts DC Measurement Verification Points ......................................................... 4-15
4-3. Volts AC Measurement Verification Points ......................................................... 4-16
4-4. Input A and B AC Input Coupling Verification Points......................................... 4-17
4-5. Volts Peak Measurement Verification Points ....................................................... 4-18
4-6. Phase Measurement Verification Points ............................................................... 4-18
4-7. V DC and V AC High Voltage Verification Tests................................................ 4-20
4-8. Resistance Measurement Verification Points........................................................ 4-21
4-9. Capacitance Measurement Verification Points ..................................................... 4-23
5-1. HF Gain Calibration Points Fast ........................................................................... 5-8
5-2. HF Gain Calibration Points Slow.......................................................................... 5-9
5-3. Volt Gain Calibration Points <300V..................................................................... 5-12
5-4. Ohm Gain Calibration Points ................................................................................ 5-14
7-1. Starting Fault Finding............................................................................................ 7-4
8-1. Final Assembly Parts............................................................................................. 8-4
8-2. Main PCA Unit...................................................................................................... 8-6
8-3. Main PCA.............................................................................................................. 8-7
9-1. Parts Location Main PCA Side 1 .......................................................................... 9-4
9-2. Parts Location Main PCA Side 2 .......................................................................... 9-5
Page 8
Page 9
List of Figures
Figure Title Page
3-1. Fluke 123 Block Diagram...................................................................................... 3-2
3-2. Fluke 123 Start-up Sequence, Operating Modes................................................... 3-8
3-3. Power Supply Block Diagram............................................................................... 3-9
3-4. CHAGATE Control Voltage ................................................................................. 3-12
3-5. Fly-Back Converter Current and Control Voltage ................................................ 3-12
3-6. Fly-Back Converter Block Diagram...................................................................... 3-13
3-7. Back Light Converter Voltages............................................................................. 3-15
3-8. C-ASIC Block Diagram......................................................................................... 3-15
3-9. Capacitance Measurement..................................................................................... 3-19
3-10. T-ASIC Trigger Section Block Diagram............................................................... 3-21
3-11. Random Repetitive Sampling Mode ..................................................................... 3-22
3-12. Reference Voltage Section .................................................................................... 3-24
3-13. LCD Control .......................................................................................................... 3-28
4-1. Display Pixel Test Pattern ..................................................................................... 4-4
4-2. Menu item selection .............................................................................................. 4-6
4-3. Test Tool Input A to 5500A Scope Output 50Ω ................................................... 4-7
4-4. Test Tool Input B to 5500A Scope Output 50Ω ................................................... 4-9
4-5. Test Tool Input A-B to 5500A Normal Output..................................................... 4-11
4-6. Test Tool Input A-B to 5500A Normal Output for >300V ................................... 4-19
4-7. Test Tool Input A to 5500A Normal Output 4-Wire............................................. 4-20
4-8. Test Tool Input A to TV Signal Generator ........................................................... 4-23
4-9. Test Tool Screen for PAL/SECAM line 622 ........................................................ 4-24
4-10. Test Tool Screen for NTSC line 525..................................................................... 4-24
4-11. Test Tool Screen for PAL/SECAM line 310 ........................................................ 4-25
4-12. Test Tool Screen for NTSC line 262..................................................................... 4-25
4-13. Test Tool Input A to TV Signal Generator Inverted ............................................. 4-25
4-14. Test Tool Screen for PAL/SECAM line 310 Negative Video .............................. 4-26
4-15. Test Tool Screen for NTSC line 262 Negative Video .......................................... 4-26
5-1. Version & Calibration Screen ............................................................................... 5-3
5-2. Display Test Pattern .............................................................................................. 5-6
5-3. HF Gain Calibration Input Connections................................................................ 5-7
5-4. 5500A Scope Output to Input A............................................................................ 5-9
5-5. 5500A Scope Output to Input B ............................................................................ 5-11
5-6. Volt Gain Calibration Input Connections <300V ................................................. 5-12
5-7. Volt Gain Calibration Input Connections 500V.................................................... 5-13
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5-8. Four-wire Ohms calibration connections .............................................................. 5-14
5-9. Capacitance Gain Calibration Input Connections ................................................. 5-15
5-10. 20 V Supply Cable for Calibration........................................................................ 5-16
6-1. Fluke 123 Main Assembly..................................................................................... 6-4
6-2. Flex Cable Connectors .......................................................................................... 6-5
6-3. Main PCA Unit Assembly..................................................................................... 6-7
6-4. Mounting the display shielding bracket ................................................................ 6-9
6-5. Battery pack installation........................................................................................ 6-9
7-1. Operative Test Tool without Case......................................................................... 7-3
7-2. 20V Supply Cable for Loading Software.............................................................. 7-17
8-1. Fluke 123 Final Assembly..................................................................................... 8-5
8-2. Main PCA Unit...................................................................................................... 8-6
9-1. Circuit Diagram 1, Channel A Circuit................................................................... 9-7
9-2. Circuit Diagram 2, Channel B Circuit................................................................... 9-8
9-3. Circuit Diagram 3, Trigger Circuit........................................................................ 9-9
9-4. Circuit Diagram 4, Digital Circuit......................................................................... 9-10
9-5. Circuit Diagram 4 (cont), Digital Circuit Keyboard ............................................. 9-11
9-6. Circuit Diagram 5, Power Circuit.......................................................................... 9-12
9-7. Main PCA side 1 ................................................................................................... 9-13
9-8. Main PCA side 2 ................................................................................................... 9-14
9-9. Main PCA side 1, PCB version 8 .......................................................................... 9-15
9-10. Main PCA side 2, PCB version 8 .......................................................................... 9-16
Page 11
Chapter 1
Safety Instructions
Title Page
1.1 Introduction................................................................................................. 1-3
1.2 Safety Precautions....................................................................................... 1-3
1.3 Caution and Warning Statements................................................................ 1-3
1.4 Symbols....................................................................................................... 1-3
1.5 Impaired Safety........................................................................................... 1-4
1.6 General Safety Information......................................................................... 1-4
1-1
Page 12
Page 13
1.1 Introduction
Read these pages carefully before beginning to install and use the instrument.
The following paragraphs contain information, cautions and warnings which must be
followed to ensure safe operation and to keep the instrument in a safe condition.
Servicing described in this manual is to be done only by
qualified service personnel. To avoid electrical shock, do not
service the instrument unless you are qualified to do so.
1.2 Safety Precautions
For the correct and safe use of this instrument it is essential that both operating and
service personnel follow generally accepted safety procedures in addition to the safety
precautions specified in this manual. Specific warning and caution statements, where
they apply, will be found throughout the manual. Where necessary, the warning and
caution statements and/or symbols are marked on the instrument.
Warning
Safety Instructions
1.1 Introduction
1
1.3 Caution and Warning Statements
Caution
Used to indicate correct operating or maintenance procedures
to prevent damage to or destruction of the equipment or other
property.
Warning
Calls attention to a potential danger that requires correct
procedures or practices to prevent personal injury.
1.4 Symbols
Read the safety information in the Users
Manual
Equal potential inputs, connected
internally
Live voltage Recycling information
Earth Disposal information
DOUBLE INSULATION (Protection Class)
Static sensitive components
(black/yellow).
Conformité Européenne
1-3
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1.5 Impaired Safety
1.6 General Safety Information
Whenever it is likely that safety has been impaired, the instrument must be turned off
and disconnected from line power. The matter should then be referred to qualified
technicians. Safety is likely to be impaired if, for example, the instrument fails to
perform the intended measurements or shows visible damage.
Warning
Removing the instrument covers or removing parts, except
those to which access can be gained by hand, is likely to
expose live parts and accessible terminals which can be
dangerous to life.
The instrument shall be disconnected from all voltage sources before it is opened.
Capacitors inside the instrument can hold their charge even if the instrument has been
separated from all voltage sources.
Components which are important for the safety of the instrument may only be replaced
by components obtained through your local FLUKE organization. These parts are
indicated with an asterisk (*) in the List of Replaceable Parts, Chapter 8.
1-4
Page 15
Chapter 2
Characteristics
Title Page
2.1 Introduction................................................................................................. 2-3
2.2 Dual Input Oscilloscope.............................................................................. 2-3
2.2.1 Vertical ................................................................................................ 2-3
2.2.2 Horizontal ............................................................................................ 2-4
2.2.3 Trigger ................................................................................................. 2-4
2.2.4 Advanced Scope Functions.................................................................. 2-5
2.3 Dual Input Meter......................................................................................... 2-5
2.3.1 Input A and Input B ............................................................................. 2-5
2.3.2 Input A ................................................................................................. 2-8
2.3.3 Advanced Meter Functions.................................................................. 2-8
2.4 Miscellaneous ............................................................................................. 2-9
2.5 Environmental............................................................................................. 2-10
2.6 Service and Maintenance ............................................................................ 2-11
2.7 Safety .......................................................................................................... 2-11
2.8 EMC Immunity ........................................................................................... 2-12
2-1
Page 16
Page 17
2.1 Introduction
Performance Characteristics
FLUKE guarantees the properties expressed in numerical values with the stated
tolerance. Specified non-tolerance numerical values indicate those that could be
nominally expected from the mean of a range of identical ScopeMeter test tools.
Environmental Data
The environmental data mentioned in this manual are based on the results of the
manufacturer’s verification procedures.
Safety Characteristics
The test tool has been designed and tested in accordance with Standards ANSI/ISA
S82.01-1994, EN 61010-1 (1993) (IEC 1010-1), CAN/CSA-C22.2 No.1010.1-92
(including approval), UL3111-1 (including approval) Safety Requirements for Electrical
Equipment for Measurement, Control, and Laboratory Use. Use of this equipment in a
manner not specified by the manufacturer may impair protection provided by the
equipment.
Characteristics
2.1 Introduction
2
2.2 Dual Input Oscilloscope
2.2.1 Vertical
Frequency Response
DC Coupled:
excluding probes and test leads: DC to 20 MHz (-3 dB)
with STL120 1:1 shielded test leads: DC to 12.5 MHz (-3 dB)
with PM8918 10:1 probe: DC to 20 MHz (-3 dB)
(optional accessory)
AC Coupled (LF roll off):
excluding probes and test leads <10 Hz (-3 dB)
with STL120 <10 Hz (-3dB)
with PM8918 <1 Hz (-3 dB)
Rise Time
excluding probes and test leads <17.5 ns
Input Impedance
excluding probes and test leads 1 MΩ//12 pF
with BB120 1 MΩ//20 pF
with STL120 1 MΩ//225 pF
with PM8918 10 MΩ//15 pF
DC to 20 MHz (-6 dB)
Sensitivity 5 mV to 500 V/div
Display Modes A, -A, B, -B
2-3
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2.2.2 Horizontal
Max. Input Voltage A and B
direct or with test leads 600 Vrms
with BB120 300 Vrms
(For detailed specifications see “2.7 Safety”)
Max. Floating Voltage
from any terminal to ground 600 Vrms, up to 400Hz
Resolution 8 bit
Vertical Accuracy ±(1% + 0.05 range/div)
Max. Vertical Move ±4 divisions
Max. Base Line Jump After changing time base or sensitivity
Normal & Single mode ±0.04 divisions (= ±1 pixel)
Scope Modes Normal, Single, Roll
Ranges
Normal:
equivalent sampling 20 ns to 500 ns/div
real time sampling 1 µs to 5 s/div
Single (real time) 1 µs to 5 s/div
Roll (real time) 1s to 60 s/div
Sampling Rate (for both channels simultaneously)
Equivalent sampling (repetitive signals) up to 1.25 GS/s
Real time sampling:
1 µs to 5 ms/div 25 MS/s
10 ms to 5 s/div 5 MS/s
Time Base Accuracy
Equivalent sampling ±(0.4% +0.04 time/div)
Real time sampling ±(0.1% +0.04 time/div)
Glitch Detection ≥40 ns @ 20 ns to 5 ms/div
≥200 ns @ 10 ms to 60 s/div
Glitch detection is always active.
Horizontal Move 10 divisions
Trigger point can be positioned anywhere
across the screen.
2-4
2.2.3 Trigger
Screen Update Free Run, On Trigger
Source A, B, EXT
EXTernal via optically isolated trigger
probe ITP120 (optional accessory)
Page 19
Sensitivity A and B
@ DC to 5 MHz 0.5 divisions or 5 mV
@ 25 MHz 1.5 divisions
@ 40 MHz 4 divisions
Voltage level error ±0.5 div. max.
Slope Positive, Negative
Video on A Interlaced video signals only
Modes Lines, Line Select
Standards PAL , NTSC, PAL+, SECAM
Polarity Positive, Negative
Sensitivity 0.6 divisions sync.
2.2.4 Advanced Scope Functions
Display Modes
Normal Captures up to 40 ns glitches and displays analog-like persistence
waveform.
Smooth Suppresses noise from a waveform.
Envelope Records and displays the minimum and maximum of waveforms
over time.
Characteristics
2.3 Dual Input Meter
2
Auto Set
Continuous fully automatic adjustment of amplitude, time base, trigger levels, trigger
gap, and hold-off. Manual override by user adjustment of amplitude, time base, or
trigger level.
2.3 Dual Input Meter
The accuracy of all measurements is within ± (% of reading + number of counts) from
18 °C to 28 °C.
Add 0.1x (specific accuracy) for each °C below 18 °C or above 28 °C. For voltage
measurements with 10:1 probe, add probe uncertainty +1%.
More than one waveform period must be visible on the screen.
2.3.1 Input A and Input B
DC Voltage (VDC)
Ranges 500 mV, 5V, 50V, 500V, 1250V
Accuracy ±(0.5% +5 counts)
Turnover ±12 counts
Normal Mode Rejection (SMR) >60 dB @ 50 or 60 Hz ±1%
Common Mode Rejection (CMRR) >100 dB @ DC
>60 dB @ 50, 60, or 400 Hz
Full Scale Reading 5000 counts
Move influence ±6 counts max.
2-5
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True RMS Voltages (VAC and VAC+DC)
Ranges 500 mV, 5V, 50V, 500V, 1250V
Accuracy for 5 to 100% of range
DC coupled:
DC to 60 Hz (VAC+DC) ±(1% +10 counts)
1 Hz to 60 Hz (VAC) ±(1% +10 counts)
AC or DC coupled:
60 Hz to 20 kHz ± (2.5% +15 counts)
20 kHz to 1 MHz ±(5% +20 counts)
1 MHz to 5 MHz ±(10% +25 counts)
5 MHz to 12.5 MHz ±(30% +25 counts)
5 MHz to 20 MHz ±(30% +25 counts), excluding test leads or
probes
AC coupled with 1:1 (shielded) test leads:
60 Hz (6 Hz with 10:1 probe) -1.5%
50 Hz (5 Hz with 10:1 probe) -2%
33 Hz (3.3 Hz with 10:1 probe) -5%
10 Hz (1 Hz with 10:1 probe) -30%
DC Rejection (only VAC) >50 dB
Common Mode Rejection (CMRR) >100 dB @ DC
>60 dB @ 50, 60, or 400 Hz
Full Scale Reading 5000 counts
The reading is independent of any signal
crest factor.
Move influence ±6 counts max.
Peak
Modes Max peak, Min peak, or pk-to-pk
Ranges 500 mV, 5V, 50V, 500V, 1250V
Accuracy:
Max peak or Min peak 5% of full scale
Peak-to-Peak 10% of full scale
Full Scale Reading 500 counts
Frequency (Hz)
Ranges 1Hz, 10Hz, 100Hz, 1 kHz, 10 kHz,
100 kHz,1 MHz, 10 MHz, 40 MHz
Frequency Range for Continuous Autoset 15Hz (1Hz) to 30 MHz
2-6
Accuracy:
@1Hz to 1 MHz ±(0.5% +2 counts)
@1 MHz to 10 MHz ±(1.0% +2 counts)
@10 MHz to 40 MHz ±(2.5% +2 counts)
Full Scale Reading 10 000 counts
Page 21
Duty Cycle (DUTY)
Range 2% to 98%
Frequency Range for Continuous Autoset 15Hz (1Hz) to 30 MHz
Accuracy:
@1Hz to 1 MHz ±(0.5% +2 counts)
@1 MHz to 10 MHz ±(1.0% +2 counts)
@10 MHz to 40 MHz ±(2.5% +2 counts)
Resolution 0.1%
Pulse Width (PULSE)
Frequency Range for Continuous Autoset 15Hz (1Hz) to 30 MHz
Accuracy:
@1Hz to 1 MHz ±(0.5% +2 counts)
@1 MHz to 10 MHz ±(1.0% +2 counts)
@10 MHz to 40 MHz ±(2.5% +2 counts)
Full Scale reading 1000 counts
Characteristics
2.3 Dual Input Meter
2
Amperes (AMP) with optional current probe
Ranges same as VDC, VAC, VAC+DC, or PEAK
Scale Factor 1 mV/A, 10 mV/A, 100 mV/A, and 1 V/A
Accuracy same as VDC, VAC, VAC+DC, or PEAK
(add current probe uncertainty)
Temperature (TEMP) with optional temperature probe
Range 200 °C/div (200 °F/div)
Scale Factor 1 mV/°C and 1 mV/°F
Accuracy as VDC (add temperature probe
uncertainty)
Decibel (dB)
0 dBV 1V
0 dBm (600Ω /50Ω) 1 mW, referenced to 600Ω or 50Ω
dB on VDC, VAC, or VAC+DC
Full Scale Reading 1000 counts
Crest Factor (CREST)
Range 1 to 10
Accuracy ±(5% +1 count)
Full Scale Reading 100 counts
Phase
Modes A to B, B to A
Range 0 to 359 degrees
Accuracy ±(1 degree +1 count)
Resolution 1 degree
2-7
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2.3.2 Input A
Ohm (ΩΩΩΩ)
Ranges 500Ω, 5 kΩ, 50 kΩ, 500 kΩ, 5 MΩ,
30 MΩ
Accuracy ±(0.6% +5 counts)
Full Scale Reading
500Ω to 5 MΩ 5000 counts
30 MΩ 3000 counts
Measurement Current 0.5 mA to 50 nA
decreases with increasing ranges
Open Circuit Voltage <4V
Continuity (CONT)
Beep 30Ω ± 5Ω in 50Ω range
Measurement Current 0.5 mA
Detection of shorts of ≥1 ms
Diode
Maximum Voltage:
@0.5 mA >2.8V
@open circuit <4V
Accuracy ±(2% +5 counts)
Measurement Current 0.5 mA
Polarity + on input A, - on COM
Capacitance (CAP)
Ranges 50 nF, 500 nF, 5 µF, 50 µF, 500 µF
Accuracy ±(2% +10 counts)
Full Scale Reading 5000 counts
Measurement Current 5 µA to 0.5 mA, increases with increasing
Measurement principle Dual slope integrating measurement with
2.3.3 Advanced Meter Functions
ranges
parasitic serial and parallel resistance
cancellation.
2-8
Zero Set Set actual value to reference
Fast/Normal/Smooth
Meter settling time Fast 1s @ 1µs to 10 ms/div
Meter settling time Normal 2s @ 1µs to 10 ms/div
Meter settling time Smooth 10s @ 1µs to 10 ms/div
Page 23
Touch Hold (on A) Captures and freezes a stable measurement
TrendPlot Graphs meter readings of the Min and
Fixed Decimal Point Possible by using attenuation keys.
2.4 Miscellaneous
Display
Size 72 x 72 mm (2.83 x 2.83 in)
Characteristics
2.4 Miscellaneous
result. Beeps when stable. Touch Hold
works on the main meter reading , with
threshholds of 1 Vpp for AC signals and
100mV for DC signals.
Max values from 15 s/div (120 seconds) to
2 days/div (16 days) with time and date
stamp. Automatic vertical scaling and time
compression.
Displays the actual and Minimum,
Maximum, or average (AVG) reading.
2
Resolution 240 x 240 pixels
Waveform display:
Vertical 8 divisions of 20 pixels
Horizontal 9.6 divisions of 25 pixels
Backlight Cold Cathode Fluorescent (CCFL)
Power
External: via Power Adapter PM8907
Input Voltage 10 to 21V DC
Power 5W typical
Input Connector 5 mm jack
Internal:
Battery Power Rechargeable Ni-Cd 4.8V
Operating Time 4 hours with bright backlight
5 hours with dimmed backlight
Charging Time 4 hours with test tool off
12 hours with test tool on
12 hours with refresh cycle
Allowable ambient temperature
during charging 0 to 45 °C (32 to 113 °F)
Memory
Number of Screens 2
Number of User Setups 10
Mechanical
Size 232 x 115 x 50 mm (9.1 x 4.5 x 2 in)
Weight 1.1 kg (2.5 lbs), including battery pack.
2-9
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2.5 Environmental
Interface RS-232, optically isolated
To Printer supports Epson FX, LQ, and HP Deskjet
Laserjet
, and Postscript
Serial via PM9080 (optically isolated
RS232 adapter/cable, optional).
Parallel via PAC91 (optically isolated
print adapter cable, optional).
To PC Dump and load settings and data.
Serial via PM9080 (optically isolated
RS232 adapter/cable, optional), using
SW90W (FlukeView software for
Windows).
Environmental MIL 28800E, Type 3, Class III, Style B
Temperature
Operating 0 to 50 °C (32 to 122 °F)
Storage -20 to 60 °C (-4 to 140 °F)
,
Humidity
Operating:
@0 to 10 °C (32 to 50 °F) noncondensing
@10 to 30 °C (50 to 86 °F) 95%
@30 to 40 °C (86 to 104 °F) 75%
@40 to 50 °C (104 to 122 °F) 45%
Storage:
@-20 to 60 °C (-4 to 140 °F) noncondensing
Altitude
Operating 4.5 km (15 000 feet)
Max. Input and Floating Voltage 600
Vrms up to 2 km, linearly derating to 400
Vrms @ 4.5 km
Storage 12 km (40 000 feet)
Vibration max. 3g
Shock max. 30g
Fungus Resistance MIL28800E, Class 3, 3.7.7 & 4.5.6.1
Salt Exposure MIL28800E, Class 3, 3.7.8.2 & 4.5.6.2.2.
Structural parts meet 48 hours 5% salt
solution test.
Electromagnetic Compatibility (EMC)
2-10
Emission EN 50081-1 (1992): EN55022 and
EN60555-2
Immunity EN 50082-2(1992): IEC1000-4-2, -3, -4, -5
(see also Section 2.8, Tables 2-1 to 2-3)
Enclosure Protection IP51, ref: IEC529
Page 25
2.6 Service and Maintenance
Calibration Interval 1 Year
2.7 Safety
Designed for measurements on 600 Vrms Category III Installations, Pollution Degree 2,
per:
• ANSI/ISA S82.01-1994
• EN61010-1 (1993) (IEC1010-1)
• CAN/CSA-C22.2 No.1010.1-92 (including approval)
• UL3111-1 (including approval)
Max. Input Voltage Input A and B
Direct on input or with leads 600 Vrms. For derating see Figure 2-1.
With Banana-to-BNC Adapter BB120 300V rms. For derating see Figure 2-1.
Max. Floating Voltage
from any terminal to ground 600 Vrms up to 400Hz
Characteristics
2.6 Service and Maintenance
2
Figure 2-1. Maximum Input Voltage vs Frequency
ST8112.CGM
2-11
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2.8 EMC Immunity
No visible disturbance E= 3 V/m E= 10 V/m
The Fluke 123, including standard accessories, conforms with the EEC directive 89/336
for EMC immunity, as defined by IEC1000-4-3, with the addition of tables 2-1 to 2-3.
Trace Disturbance with STL120 See Table 2-1 and Table 2-2.
Table 2-1. No Visible Trace Disturbance
Frequency range 10 kHz to 27 MHz
Frequency range 27 MHz to 1 GHz
Table 2-2. Trace Disturbance < 10%
Disturbance less than 10% of full scale E= 3 V/m E= 10 V/m
Frequency range 10 kHz to 27 MHz
Frequency range 2 MHz to 1 GHz
(-): no visible disturbance
Test tool ranges not specified in Table 2-1 and Table 2-2 may have a disturbance of more than 10% of full
scale.
50 mV/div to 500 V/div
50 mV/div to 500 V/div
10 mV/div to 20 mV/div
5 mV/div to 20 mV/div
500 mV/div to 500 V/div
50 mV/div to 500 V/div
50 mV/div to 200 mV/div
-
Multimeter disturbance See Table 2-3.
• VDC, VAC, and VAC+DC with STL 120 and short ground lead
• OHM, CONT, DIODE, and CAP with STL120 and black test lead to COM
Table 2-3. Multimeter Disturbance < 1%
Disturbance less than 1% of full scale E= 3 V/m E= 10 V/m
2-12
Frequency range 10 kHz to 27 MHz
VDC, VAC, VAC+DC
OHM, CONT, DIODE
CAP
Frequency range 27 MHz to 1 GHz
VDC, VAC, VAC+DC
OHM, CONT, DIODE
CAP
Test tool ranges not specified in Table 2-3 may have a disturbance of more than 10% of full scale.
500 mV to 1250V
500Ω to 30 MΩ
50 nF to 500 µF
500 mV to 1250V
500Ω to 30 MΩ
50 nF to 500 µF
500 mV to 1250V
500Ω to 30 MΩ
50 nF to 500 µF
500 mV to 1250V
500Ω to 30 MΩ
50 nF to 500 µF
Page 27
Chapter 3
Circuit Descriptions
Title Page
3.1 Introduction................................................................................................. 3-3
3.2 Block Diagram ............................................................................................ 3-3
3.2.1 Channel A, Channel B Measurement Circuits..................................... 3-4
3.2.2 Trigger Circuit ..................................................................................... 3-4
3.2.3 Digital Circuit ...................................................................................... 3-5
3.2.4 Power Circuit....................................................................................... 3-6
3.2.5 Start-up Sequence, Operating Modes .................................................. 3-7
3.3 Detailed Circuit Descriptions...................................................................... 3-9
3.3.1 Power Circuit....................................................................................... 3-9
3.3.2 Channel A - Channel B Measurement Circuits ................................... 3-15
3.3.3 Trigger Circuit ..................................................................................... 3-20
3.3.4 Digital Circuit ...................................................................................... 3-25
3-1
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3-2
Figure 3-1. Fluke 123 Block Diagram
ST7965.EPS
Page 29
3.1 Introduction
Section 3.2 describes the functional block diagram shown in Figure 3-1. It provides a
quick way to get familiar with the test tool basic build-up.
Section 3.3 describes the principle of operation of the test tool functions in detail, on the
basis of the circuit diagrams shown in Figures 9-1 to 9-5.
For all measurements, input signals are applied to the shielded input banana jackets.
Traces and readings are derived from the same input signal samples. So readings are
related to the displayed readings.
3.2 Block Diagram
In the overall block diagram Figure 3-1, the test tool is divided in five main blocks. Each
block represents a functional part, build up around an Application Specific Integrated
Circuit (ASIC). A detailed circuit diagram of each block is shown in Section 9.
See Table 3-1. for an overview of the blocks in which the test tool is broken down, the
main block function, the ASIC name, and the applicable circuit diagram.
Circuit Descriptions
3.1 Introduction
3
Table 3-1. Fluke 123 Main Blocks
Block Main Functions ASIC Circuit
Diagram
CHANNEL A Input A signal (V-Ω-F) conditioning C(hannel)-ASIC OQ0258 Figure 9-1
CHANNEL B Input B signal (V) conditioning C(hannel)-ASIC OQ0258 Figure 9-2
TRIGGER Trigger selection and conditioning
Current source for resistance, capacitance,
continuity, and diode measurements
AC/DC input coupling and Ω/F relay control
Voltage reference source
DIGITAL Analog to Digital Conversion
Acquisition of ADC samples
Micro controller (µP-ROM-RAM)
Keyboard- and LCD control
POWER Power supply, battery charger
LCD back light voltage converter
Optical interface input
T(rigger)-ASIC OQ0257 Figure 9-3
D(igital)-ASIC MOT0002 Figure 9-4
P(ower)-ASIC OQ0256 Figure 9-5
All circuits, except the LCD unit and the KEYBOARD, are located on one Printed
Circuit Board (PCB), called the MAIN PCB.
The ASIC’s are referred to as C-ASIC (Channel ASIC), T-ASIC (Trigger ASIC), P-ASIC
(Power ASIC), and D-ASIC (Digital ASIC).
3-3
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3.2.1 Channel A, Channel B Measurement Circuits
The Channel A and Channel B circuit are similar. The only difference is that Channel A
can do all measurements, whereas Channel B does not provide resistance, diode, and
capacitance measurements.
Volts, and derived measurements (e.g. current with optional probe)
The input voltage is supplied to the C-ASIC, via the LF and HF path. The C-ASIC
converts (attenuates, amplifies) the input signal to a normalized output voltage ADCA/ADC-B, which is supplied to the Analog to Digital Converters (ADC-A and ADC-B)
on the DIGITAL part. The D-ASIC acquires the digital samples to build the trace, and to
calculate readings. For the HF and LF attenuation section of the C-ASIC some external
components are required: the HF DECade ATTenuator and LF DECade ATTenuator
section.
Resistance, continuity, and diode measurements (Input A only)
The T-ASIC supplies a current via the Ω/F relays to the unknown resistance Rx,
connected to the Input A and the COM input jacket. The voltage drop across Rx is
measured as for voltage measurements.
Capacitance measurements (Input A only)
The T-ASIC supplies a current via the Ω/F relays to the unknown capacitance Cx,
connected to the Input A and the COM input jacket. Cx is charged and discharged by
this current. The C-ASIC converts the charging time and the discharging time into a
pulse width signal. This signal is supplied to the T-ASIC via the C-ASIC trigger output
TRIG-A. The T-ASIC shapes and levels the signal, and supplies the resulting pulse
width signal ALLTRIG to the D-ASIC. The D-ASIC counts the pulse width and
calculates the capacitance reading.
When the capacitance function is selected no other measurement or wave form display is
possible. There is only a numeric readout of the capacitance value.
Frequency, pulse width, and duty cycle measurements
The input voltage is measured as described above. From the ADC samples to built the
trace, also the frequency, pulse width, and duty cycle of the input signal are calculated.
Miscellaneous
Control of the C-ASIC, e.g. selecting the attenuation factor, is done by the D-ASIC via
the SDAT and SCLK serial communication lines.
An offset compensation voltage and a trace position control voltage are provided by the
D-ASIC via the APWM bus.
The C-ASIC’s also provide conditioned input voltages on the TRIG-A/TRIG-B line.
These voltages can be selected as trigger source by the T-ASIC.
3.2.2 Trigger Circuit
The T ASIC selects one of the possible trigger sources TRIG-A (Input A) or TRIG-B
(Input B). For TV triggering the selected trigger source signal is processed via the
Sync(hronization) Pulse Separator circuit (TVOUT-TVSYNC lines). Two adjustable
trigger levels are supplied by the D-ASIC via the PWM FILTERS (TRIGLEV1 and
TRIGLEV2 line). Depending on the selected trigger conditions (- source, - level, - edge,
- mode), the T-ASIC generates the final trigger signal TRIGDT, which is supplied to the
D-ASIC.
3-4
Page 31
Circuit Descriptions
3.2 Block Diagram
Note
External triggers, supplied via the optical interface RXDA line, are
buffered by the P-ASIC, and then supplied to the D-ASIC (RXD signal).
The TRIG-A input is also used for capacitance measurements, as described in
Section 3.2.1.
The T-ASIC includes a constant current source for resistance and capacitance
measurements. The current is supplied via the GENOUT output and the Ω/F relays to
the unknown resistance Rx or capacitance Cx connected to Input A. The SENSE signal
senses the voltage across Cx and controls a CLAMP circuit in the T-ASIC. This circuit
limits the voltage on Input A at capacitance measurements. The protection circuit
prevents the T-ASIC from being damaged by voltages supplied to the input during
resistance or capacitance measurements.
For probe adjustment, a voltage generator circuit in the T-ASIC can provide a square
wave voltage via the GENOUT output to the Input A connector.
The T-ASIC contains opamps to derive reference voltages from a 1.23V reference
source. The gain factors for these opamps are determined by resistors in the REF GAIN
circuit. The reference voltages are supplied to various circuits.
The T-ASIC also controls the Channel A and B AC/DC input coupling relays, and the
Ω/F relays.
3
Control data for the T-ASIC are provided by the D-ASIC via the SDAT and SCLK serial
communication lines.
3.2.3 Digital Circuit
The D-ASIC includes a micro processor, ADC sample acquisition logic, trigger
processing logic, display and keyboard control logic, I/O ports, and various other logic
circuits.
The instrument software is stored in the FlashROM, the RAM is used for temporary data
storage. The RESET ROM circuit controls the operating mode of the FlashROM (reset,
programmable, operational).
For Voltage and Resistance measurements, the conditioned Input A/ Input B voltages are
supplied to the ADC-A and ADC-B ADC. The voltages are sampled, and digitized by
the ADC’s. The output data of the ADC’s are acquired and processed by the D-ASIC.
For capacitance measurements, the ALLTRIG signal generated by the T-ASIC, is used.
The D-ASIC counts the ALLTRIG signal pulse width, which is proportional to the
unknown capacitance.
The DPWM-BUS (Digital Pulse Width Modulation) supplies square wave signals with a
variable duty cycle to the PWM FILTERS circuit (RC filters). The outgoing APWMBUS (Analog PWM) provides analog signals of which the amplitude is controlled by the
D-ASIC. These voltages are used to control e.g. the trace positions (C-ASIC), the trigger
levels (T-ASIC), and the battery charge current (P-ASIC).
In random sampling mode (time base faster than 1 µs/div.), a trace is built-up from
several acquisition cycles. During each acquisition, a number of trace samples are
placed as pixels in the LCD. The RANDOMIZE circuit takes care that the starting
moment of each acquisition cycle (trigger release signal HOLDOFF goes low) is random.
This prevents that at each next acquisition the trace is sampled at the same time
positions, and that the displayed trace misses samples at some places on the LCD.
The D-ASIC supplies control data and display data to the LCD module. The LCD
module is connected to the main board via connector X453. It consists of the LCD, LCD
3-5
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3.2.4 Power Circuit
drivers, and a fluorescent back light lamp. As the module is not repairable, no detailed
description and diagrams are provided. The back light supply voltage is generated by the
back light converter on the POWER part.
The keys of the keyboard are arranged in a matrix. The D-ASIC drives the rows and
scans the matrix. The contact pads on the keyboard foil are connected to the main board
via connector X452. The ON-OFF key is not included in the matrix, but is sensed by a
logic circuit in the D-ASIC, that is active even when the test tool is turned off.
Via the PROBE-A and PROBE-B lines, connected to the Input A and Input B banana
shielding, the D-ASIC can detect if a probe is connected. This function is not supported
by the Fluke 123 software.
The D-ASIC sends commands to the C-ASICs and T-ASIC via the SCLK and SDAT
serial control lines, e.g. to select the required trigger source.
Various I/O lines are provided, e.g. to control the BUZZER and the Slow-ADC (via the
SADC bus.
The test tool can be powered via the power adapter, or by the battery pack.
If the power adapter is connected, it powers the test tool and charges the battery via the
CHARGER-CONVERTER circuit. The battery charge current is sensed by sense
resistor Rs (signal IBAT). It is controlled by changing the output current of the
CHARGER-CONVERTER (control signal CHAGATE).
If no power adapter is connected, the battery pack supplies the VBAT voltage. The
VBAT voltage powers the P-ASIC, and is also supplied to the FLY BACK
CONVERTER (switched mode power supply).
If the test tool is turned on, the FLY BACK CONVERTER generates supply voltages for
various test tool circuits.
The +3V3GAR supply voltage powers the D-ASIC, RAM and ROM. If the test tool is
turned off, the battery supplies the +3V3GAR voltage via transistor V569. This
transistor is controlled by the P-ASIC. So when the test tool is turned off, the D-ASIC
can still control the battery charging process (CHARCURR signal), the real time clock,
the on/off key, and the serial RS232 interface (to turn the test tool on).
3-6
To monitor and control the battery charging process, the P-ASIC senses and buffers
various battery signals, as e.g. temperature (TEMP), voltage (BATVOLT), current
(IBAT).
Via the SLOW ADC various analog signals can be measured by the D-ASIC. Involved
signals are: battery voltage (BATVOLT), battery type (IDENT), battery temperature
(TEMP), battery current (BATCUR) LCD temperature (LCDTEMP, from LCD unit),
and 3 test output pins of the C-ASIC’s, and the T-ASIC (DACTEST). The signals are
used for control and test purposes.
The BACK LIGHT CONVERTER generates the 400V ! supply voltage for the LCD
fluorescent back light lamp. If the lamp is defective a 1.5 kV voltage can be present for
0.2 second maximum. The brightness is controlled by the BACKBRIG signal supplied
by the D-ASIC.
Serial communication with a PC or printer is possible via the RS232 optically isolated
interface. This interface is also used for external trigger input using the Isolated Trigger
Probe. The P-ASIC buffers the received data line (RXDA) and supplies the buffered
data (RXD) to the D-ASIC. The transmit data line TXD is directly connected to the DASIC.
Page 33
A linear regulator in the P-ASIC derives a +12V voltage from the power adapter voltage.
The +12V is used as programming voltage for the Flash EPROM on the Digital part.
3.2.5 Start-up Sequence, Operating Modes
The test tool sequences through the following steps when power is applied (see also
Figure 3-2):
1. The P-ASIC is directly powered by the battery or power adapter voltage VBAT.
Initially the Fly Back Converter is off, and the D-ASIC is powered by VBAT via
transistor V569 (+3V3GAR).
If the voltage +3V3GAR is below 3.05V, the P-ASIC keeps its output signal
VGARVAL (supplied to the D-ASIC) low, and the D-ASIC will not start up. The
test tool is not working, and is in the Idle mode.
2. If the voltage +3V3GAR is above 3.05V, the P-ASIC makes the line VGARVAL
high, and the D-ASIC will start up. The test tool is operative now. If it is powered
by batteries only, and not turned on, it is in the Off mode. In this mode the D-
ASIC is active: the real time clock runs, and the ON/OFF key is monitored to see if
the test tool will be turned on.
Circuit Descriptions
3.2 Block Diagram
3
3. If the power adapter is connected (P-ASIC output MAINVAL high), and/or the
test tool is turned on, the embedded D-ASIC program, called mask software, starts
up. The mask software checks if valid instrument software is present in the Flash
ROM’s. If not, the test tool does not start up and the mask software continues
running until the test tool is turned off, or the power is removed. This is called the
Mask active mode. The mask active mode can also be entered by pressing the ^ and
> key when turning on the test tool.
If valid instrument software is present, one of the following modes will become
active:
Charge mode
The Charge mode is entered when the test tool is powered by the power adapter,
and is turned off. The FLY-BACK CONVERTER is off. The CHARGER-
CONVERTER charges the batteries (if installed).
Operational & Charge mode
The Operational & Charge mode is entered when the test tool is powered by the
power adapter, and is turned on. The FLY-BACK CONVERTER is on, the
CHARGER-CONVERTER supplies the primary current. If batteries are installed,
they will be charged. In this mode a battery refresh (see below) can be done.
Operational mode
The Operational mode is entered when the test tool is powered by batteries only,
and is turned on. The FLY-BACK CONVERTER is on, the batteries supply the
primary current. If the battery voltage (VBAT) drops below 4V when starting up the
fly back converter, the Off mode is entered.
3-7
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Battery Refresh
In the following situations the batteries will need a deep discharge-full charge cycle,
called a “refresh”:
• every 50 not-full discharge/charge cycles, or each 6 months. This prevents
battery capacity loss due to the memory effect.
• after the battery has been removed, as the test tool does not know the battery
status then.
The user will be prompted for this action when he turns the test tool on, directly
following the start up screen. A refresh cycle takes 16 hours maximum, depending
on the battery status. It can be started via the keyboard (USER OPTIONS, F1,
activate refresh) if the test tool is on, and the power adapter is connected. During a
refresh, first the battery is completely charged, then it is completely discharged (the
test tool is powered by the battery only, and the power adapter must be connected!),
and then it is completely charged again.
VGARVAL=L
VGARVAL=H
Idle mode
Off mode
TURN ON or
MAINVAL=H
Flash ROM
Mask StartUp
Flash ROM OK
Extern StartUp
NOT OK
OR
& TURN ON&
MAINVAL=L & (TURN OFF or BATTVOLT<4V)
Software
TURN ON & BATTVOLT > 4 & MAINVAL=L TURN OFF&MAINVAL=H
TURN ON & MAINVAL=H
Operational
Mode
MAINVAL=H
Operational &
Charge Mode
MAINVAL=L TURN ON
TURN OFF
Mask Active
mode
Charge Mode
TURN OFF
3-8
BATTVOLT < 4V
or
AutoShutDown
or
TURN OFF
Figure 3-2. Fluke 123 Start-up Sequence, Operating Modes
Battery refresh
Table 3-2 shows an overview of the test tool operating modes.
MAINVAL=L
Page 35
3.3 Detailed Circuit Descriptions
R
E
P
P
P
E
R
P
R
L
T
P
2
7
7
C
Table 3-2. Fluke 123 Operating Modes
Mode Conditions Remark
Idle mode No power adapter and no battery no activity
Circuit Descriptions
3
Off mode No power adapter connected, battery
installed, test tool off
Mask active mode No valid instrument software, or ^ and > key
P-ASIC & D-ASIC powered
(VBAT & +3V3GAR).
Mask software runs
pressed when turning on
Charge mode Power adapter connected and test tool off Batteries will be charged
Operational &
Charge mode
Operational mode No power adapter connected, battery
Power adapter connected and test tool on Test tool operational, and
batteries will be charged
Test tool operational, powered
installed, and test tool on
by batteries
3.3 Detailed Circuit Descriptions
3.3.1 Power Circuit
The description below refers to circuit diagram Figure 9-5.
Power Sources , Operating Modes
Figure 3-3 shows a simplified diagram of the power supply and battery charger circuit.
FLY BACK
CONVERTER
VBAT
V569
SUPPLY
+3V3GAR
FROM POWER
ADAPTER
R501
R502
C502
CHARGER/CONVERTER
V506
V503
L501
C503
Figure 3-3. Power Supply Block Diagram
R504
R506
R507
R503
R513
R512
R514
R516
VBATSU
VBATHIGH
VBAT
TEM
TEMPHI
IBAT
CHAGAT
CHASENSN
CHASENS
IIMAXCHA
VCHDRI V
VADALOW
VADAPTE
60
69 66
Vref
3
5
4
9
16
CONTROL
14
15
6
19
8
20
linear regulator
linear regulator
linear regulator
POWER ASIC
Amplify
Level shift
100kHz
64
78
79
7
80
1
18
18
22
VGARVA
BATVOLT
BATTEM
BATCU
CHARCUR
43
COS
V565
V566
P7VCHA
+12V
C553
MAI NVAL
C507
3-9
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As described in Section 3.2.5, the test tool operating mode depends on the connected
power source.
The voltage VBAT is supplied either by the power adapter via V506/L501, or by the
battery pack. It powers a part of the P-ASIC via R503 to pin 60 (VBATSUP). If the test
tool is off, the Fly Back Converter is off, and VBAT powers the D-ASIC via transistor
V569 (+3V3GAR). This +3V3GAR voltage is controlled and sensed by the P-ASIC. If it
is NOT OK (<3.05V), the output VGARVAL (pin 64) is low. The VGARVAL line is
connected to the D-ASIC, and if the line is low, the D-ASIC is inactive: the test tool is in
the Idle mode. A low VGARVAL line operates as a reset for the D-ASIC.
If VGARVAL is high (+3V3GAR > 3.05V), the D-ASIC becomes active, and the Off
mode is entered. The D-ASIC monitors the P-ASIC output pin 12 MAINVAL, and the
test tool ON/OFF status. By pressing the ON/OFF key, a bit in the D-ASIC, indicating
the test tool ON/OFF status is toggled. If neither a correct power adapter voltage is
supplied (MAINVAL is low), or the test tool is turned on, the Off mode will be
maintained.
If a correct power adapter voltage is supplied (MAINVAL high), or if the test tool is
turned on, the mask software starts up. The mask software checks if valid instrument
software is present. If not, e.g. no instrument firmware is loaded, the mask software will
keep running, and the test tool is not operative: the test tool is in the Mask active state.
For test purposes the mask active mode can also be entered by pressing the ^ and > key
when the test tool is turned on.
If valid software is present, one of the three modes Operational, Operational &
Charge or Charge will become active. The Charger/Converter circuit is active in the
Operational & Charge and in the Charge mode. The Fly back converter is active in the
Operational and in the Operational & Charge mode.
Charger/Converter (See Also Figure 3-3.)
The power adapter powers the Charge Control circuit in the P-ASIC via an internal linear
regulator. The power adapter voltage is applied to R501. The Charger/Converter circuit
controls the battery charge current. If a charged battery pack is installed, VBAT is
approximately +4.8V. If no battery pack is installed, VBAT is approximately +15V.
The voltage VBAT is supplied to the battery pack, to the P-ASIC, to the Fly Back
Converter, and to transistor V569. The FET control signal CHAGATE is a 100 kHz
square wave voltage with a variable duty cycle , supplied by the P-ASIC Control circuit.
The duty cycle determines the amount of energy loaded into L501/C503. By controlling
the voltage VBAT, the battery charge current can be controlled. The various test tool
circuits are supplied by the Fly Back Converter, and/or V569.
Required power adapter voltage
The P-ASIC supplies a current to reference resistor R516 (VADALOW pin 8). It
compares the voltage on R516 to the power adapter voltage VADAPTER on pin 20
(supplied via R502, and attenuated in the P-ASIC). If the power adapter voltage is below
10V, the P-ASIC output pin 12, and the line MAINVAL, are low. This signal on pin 12
is also supplied to the P-ASIC internal control circuit, which then makes the CHAGATE
signal high. As a result FET V506 becomes non-conductive, and the Charger/Converter
is off.
3-10
Battery charge current control
The actual charge current is sensed via resistors R504-R506-507, and filter R509-C509,
on pin 9 of the P-ASIC (IBATP). The sense voltage is supplied to the control circuit.
The required charge current information is supplied by the D-ASIC via the CHARCUR
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Circuit Descriptions
3.3 Detailed Circuit Descriptions
line and filter R534-C534 to pin 80. A control loop in the control circuit adjusts the
actual charge current to the required value.
The filtered CHARCUR voltage range on pin 80 is 0... 2.7V for a charge current from
0.5A to zero. A voltage of 0V complies to 0.5A (fast charge), 1.5V to 0.2A (top off
charge), 2.3V to 0.06A (trickle charge), and 2.7V to 0A (no charge). If the voltage is > 3
Volt, the charger converter is off (V506 permanently non-conductive).
The D-ASIC derives the required charge current value from the battery voltage VBAT.
The P-ASIC converts this voltage to an appropriate level and supplies it to output pin 78
(BATVOLT). The D-ASIC measures this voltage via the Slow ADC. The momentary
value, and the voltage change as a function of time (-dV/dt), are used as control
parameters.
Charging process
If the battery voltage drops below 5.2V, and the battery temperature is between 10 and
45°C, the charge current is set to 0.5A (fast charge). From the battery voltage change dV/dt the D-ASIC can see when the battery is fully charged, and stop fast charge.
Additionally a timer in the D-ASIC limits the fast charge time to 6 hours. After fast
charge, a 0.2A top off charge current is supplied for 2 hours. Then a 0.06A trickle
charge current is applied for 48 hours maximum. If the battery temperature becomes
higher than 50°C, the charge current is set to zero
3
Battery temperature monitoring
The P-ASIC supplies a current to a NTC resistor in the battery pack (TEMP pin 5). It
conditions the voltage on pin 5 and supplies it to output pin 79 BATTEMP. The D-ASIC
measures this voltage via the slow ADC. It uses the BATTEMP voltage to decide if fast
charge is allowed (10-45°C), or no charge is allowed at all (<10°C, >50°C).
Additionally the temperature is monitored by the P-ASIC. The P-ASIC supplies a
current to reference resistor R512 (TEMPHI pin 4), and compares the resulting TEMPHI
voltage to the voltage on pin 5 (TEMP). If the battery temperature is too high, the PASIC Control circuit will set the charge current to zero, in case the D-ASIC fails to do
this.
If the battery temperature monitoring system fails, a bimetal switch in the battery pack
interrupts the battery current if the temperature becomes higher then 70 °C
Maximum VBAT
The P-ASIC supplies a current to reference resistor R513 (VBATHIGH pin 7). It
compares the voltage on R513 to the battery voltage VBAT on pin 3 (after being
attenuated in the P-ASIC). The P-ASIC limits the voltage VBAT to 7.4V via its internal
Control circuit. This situation arises in case no battery or a defective battery (open) is
present.
Charger/Converter input current
This input current is sensed by R501. The P-ASIC supplies a reference current to R514.
The P-ASIC compares the voltage drop on R501 (CHASENSP-CHASENSN pin 14 and
15) to the voltage on R514 (IMAXCHA pin 6). It limits the input current (e.g. when
loading C503 and C555 just after connecting the power adapter) via its internal Control
circuit.
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CHAGATE control signal
To make the FET conductive its Vgs (gate-source voltage) must be negative. For that
purpose, the CHAGATE voltage must be negative with respect to VCHDRIVE. The
P-ASIC voltage VCHDRIVE also limits the swing of the CHAGATE signal to 13V.
VCHDRIVE
VCHDRIVE -13V
10 µs
Figure 3-4. CHAGATE Control Voltage
V506 “OFF”
V506 “ON”
+3V3GAR Voltage
When the test tool is not turned on, the Fly Back Converter does not run. In this
situation, the +3V3GAR voltage for the D-ASIC, the FlashROM, and the RAM is
supplied via transistor V569. The voltage is controlled by the VGARDRV signal
supplied by the P-ASIC (pin 69). The current sense voltage across R580 is supplied to
pin 70 (VGARCURR). The voltage +3V3GAR is sensed on pin 66 for regulation. The
internal regulator in the P-ASIC regulates the +3V3GAR voltage, and limits the current.
Fly Back Converter
When the test tool is turned on, the D-ASIC makes the PWRONOFF line (P-ASIC pin
62) high. Then the self oscillating Fly Back Converter becomes active. It is started up
by the internal 100 kHz oscillator that is also used for the Charger/Converter circuit.
First the FLYGATE signal turns FET V554 on (see Figure 3-5), and an increasing
current flows in the primary transformer winding to ground, via sense resistor R551. If
the voltage FLYSENSP across this resistor exceeds a certain value, the P-ASIC turns
FET V554 off. Then a decreasing current flows in the secondary windings to ground. If
the windings are “empty” (all energy transferred), the voltage VCOIL sensed by the PASIC (pin 52) is zero, and the FLYGATE signal will turn FET V554 on again.
3-12
Primary current
Secondary current
V554 “ON”
FLYGATE SIGNAL
Figure 3-5. Fly-Back Converter Current and Control Voltage
V554 “OFF”
The output voltage is regulated by feeding back a part of the +3V3A output voltage via
R552-R553-R554 to pin 54 (VSENS). This voltage is referred to a 1.23V reference
voltage. Any deviation of the +3V3A voltage from the required 3.3V changes the
current level at which current FET V554 will be switched off. If the output voltage
increases, the current level at which V554 is switched off will become lower, and less
energy is transferred to the secondary winding. As a result the output voltage will
become lower.
An internal current source supplies a current to R559. The resulting voltage is a
reference for the maximum allowable primary current (IMAXFLY). The voltage across
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Circuit Descriptions
3.3 Detailed Circuit Descriptions
the sense resistor (FLYSENSP) is compared to the IMAXFLY voltage. If the current
exceeds the set limit, FET V554 will be turned off.
Another internal current source supplies a current to R558. This resulting voltage is a
reference for the maximum allowable output voltage (VOUTHI). The -3V3A output
voltage (M3V3A) is attenuated and level shifted in the P-ASIC, and then compared to
the VOUTHI voltage. If the -3V3A voltage exceeds the set limit, FET V554 will be
turned off.
The FREQPS control signal is converted to appropriate voltage levels for the FET switch
V554 by the BOOST circuit. The voltage VBAT supplies the BOOST circuit power via
V553 and R561. The FREQPS signal is also supplied to the D-ASIC, in order to detect
if the Fly Back converter is running well.
V551 and C552 limit the voltage on the primary winding of T552 when the FET V554 is
turned of. The signal SNUB increases the FLYGATE high level to decreases ONresistance of V554 (less power dissipation in V554).
+5VA
V553
R561
T552
V561
V562
+3V3A
3
FLYBOOST
C551
C553
SNUB
48 47
BOOST
CONTROL
C552
49
63
55
57
V551
FLYGATE
FREQPS
FLYSENSP
IMAXFLY
-3V3A
VOUTHI
VSENS
PWRONOFF
REFP (1.23V)
V554
R551
R559
R558
V563
V564
R570
R552
R554
R553
-3V3A
-30VD
POWER ASIC
Figure 3-6. Fly-Back Converter Block Diagram
Slow ADC
The Slow ADC enables the D-ASIC to measure the following signals:
BATCUR, BATVOLT, BATTEMP, BATIDENT (Battery current, - voltage, temperature, - type ), DACTEST-A, DACTEST-B, and DACTEST-T (test output of the
C-ASIC’s and the T-ASIC).
De-multiplexer D531 supplies one of these signals to its output, and to the input of
comparator N531 TP536). The D-ASIC supplies the selection control signals
SELMUX0-2. The Slow ADC works according to the successive approximation
principle. The D-ASIC changes the SADCLEV signal level, and thus the voltage level
on pin 3 of the comparator step wise, by changing the duty cycle of the PWM signal
SADCLEVD. The comparator output SLOWADC is monitored by the D-ASIC, who
3-13
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Service Manual
knows now if the previous input voltage step caused the comparator output to switch. By
increasing the voltage steps, the voltage level can be approximated within the smallest
possible step of the SADCLEV voltage. From its set SADCLEVD duty cycle, the DASIC knows voltage level of the selected input.
RS232
The optical interface is used for two purposes:
• enable serial communication (RS232) between the test tool and a PC or printer
• enable external triggering using the Isolated Trigger Probe ITP120
The received data line RXDA (P-ASIC pin 75) is connected to ground via a 20 kΩ
resistor in the P-ASIC.
If no light is received by the light sensitive diode H522, the RXDA line is +200 mV,
which corresponds to a “1” (+3V) on the RXD (P-ASIC output pin 76) line.
If light is received, the light sensitive diode will conduct, and the RXDA line goes low
(0...-0.6V), which corresponds to a “0” on the RXD line.
The level on the RXDA line is compared by a comparator in the P-ASIC to a 100 mV
level. The comparator output is the RXD line, which is supplied to the D-ASIC for
communication, and for external triggering.
The D-ASIC controls the transmit data line TXD. If the line is low, diode H521 will
emit light.
The supply voltage for the optical interface receive circuit (RXDA), is the +3V3SADC
voltage. The +3V3SADC voltage is present if the test tool is turned on, or if the Power
Adapter is connected (or both). So if the Power Adapter is present, serial
communication is always possible, even when the test tool is off.
Backlight Converter
The LCD back light is provided by a ∅2.4 mm fluorescent lamp in LCD unit. The back
light converter generates the 300-400 Vpp ! supply voltage. The circuit consist of:
• A pulse width modulated (PWM) buck regulator to generate a variable, regulated
voltage (V600, V602, L600, C602).
• A zero voltage switched (ZVS) resonant push-pull converter to transform the
variable, regulated voltage into a high voltage AC output (V601, T600).
The PWM buck regulator consists of FET V600, V602, L600, C602, and a control circuit
in N600. FET V600 is turned on and off by a square wave voltage on the COUT output
of N600 pin 14). By changing the duty cycle of this signal, the output on C602 provides
a variable, regulated voltage. The turn on edge of the COUT signal is synchronized with
each zero detect.
Outputs AOUT and BOUT of N600 provide complementary drive signals for the pushpull FETs V601a/b (dual FET). If V601a conducts, the circuit consisting of the primary
winding of transformer T600 and C608, will start oscillating at its resonance frequency.
After half a cycle, a zero voltage is detected on pin 9 (ZD) of N600, V601a will be
turned off, and V601b is turned on. This process goes on each time a zero is detected.
The secondary current is sensed by R600/R604, and fed back to N600 pin 7 and pin 4 for
regulation of the PWM buck regulator output voltage. The BACKBRIG signal supplied
by the D-ASIC provides a pulse width modulated (variable duty cycle) square wave. By
changing the duty cycle of this signal, the average on-resistance of V604 can be changed.
This will change the secondary current, and thus the back light intensity. The voltage on
the “cold” side of the lamp is limited by V605 and V603. This limits the emission of
electrical interference.
3-14
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Circuit Descriptions
3.3 Detailed Circuit Descriptions
In PCB versions 8 and newer R605 and R606 provide a more reliable startup of the
backlight converter.
Voltage at T600 pin 4
Voltage AOUT
Voltage BOUT
Voltage COUT
3
zero
detect
zero
detect
Figure 3-7. Back Light Converter Voltages
3.3.2 Channel A - Channel B Measurement Circuits
The description below refers to circuit diagrams Figure 9-1 and Figure 9-2.
The Channel A and Channel B circuits are almost identical. Both channels can measure
voltage, and do time related measurements (frequency, pulse width, etc.). Channel A
also provides resistance, continuity, diode, and capacitance measurements.
The Channel A/B circuitry is built-up around a C-ASIC OQ0258. The C-ASIC is placed
directly behind the input connector and transforms the input signal to levels that are
suitable for the ADC and trigger circuits.
The C-ASIC
Figure 3-8 shows the simplified C-ASIC block diagram. The C-ASIC consists of
separate paths for HF and LF signals, an output stage that delivers signals to the trigger
and ADC circuits and a control block that allows software control of all modes and
adjustments. The transition frequency from the LF-path to the HF-path is approximately
20 kHz, but there is a large overlap.
INPUT
CHANNEL ASIC OQ 0258
C
AC
R
DC
HF IN
LF IN
GROUND
PROTECT
Figure 3-8. C-ASIC Block Diagram
HF-PATH
LF-PATH
CAL POS BUS SUPPLY
OUTPUT
STAGE
CONTROL SUPPLY
ADC
TRIGGER
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LF input
The LF-input (pin 42) is connected to a LF decade attenuator in voltage mode, or to a
high impedance buffer for resistance and capacitance measurements. The LF decade
attenuator consists of an amplifier with switchable external feedback resistors R131 to
R136. Depending on the selected range the LF attenuation factor which will be set to 110-100-1000-10,000. The C-ASIC includes a LF pre-amplifier with switchable gain
factors for the 1-2-5 steps.
HF input
The HF component of the input signal is supplied to four external HF capacitive
attenuators via C104 and R108. Depending on the required range, the C-ASIC selects
and buffers one of the attenuator outputs :1 (HF0), :10 (HF1), :100 (HF2), or :1000
(HF3). By attenuating the HF3 input internally by a factor 10, the C-ASIC can also
create a :10000 attenuation factor. Inputs of not selected input buffers are internally
shorted. If required, optional FETs V151-V153 can be installed. They will provide an
additional input buffer short for the not-selected buffers, to eliminate internal (in the CASIC) cross talk. To control the DC bias of the buffers inputs, their output voltage is fed
back via an internal feed back resistor and external resistors R115, R111/R120, R112,
R113, and-R114. The internal feed back resistor and filter R110/C105 will eliminate HF
feed back, to obtain a large HF gain. The C-ASIC includes a HF pre-amplifier with
switchable gain factors for the 1-2-5 steps. The C-ASIC also includes circuitry to adjust
the gain, and pulse response.
ADC output pin 27
The combined conditioned HF/LF signal is supplied to the ADC output (pin 27) via an
internal ADC buffer. The output voltage is 150 mV/division. The MIDADC signal (pin
28), supplied by the ADC, matches the middle of the C-ASIC output voltage swing to the
middle if the ADC input voltage swing.
TRIGGER output pin 29
The combined conditioned HF/LF signal is also supplied to the trigger output (pin 29)
via an internal trigger buffer. The output voltage is 100 mV/div. This signal (TRIG-A)
is supplied to the TRIGGER ASIC for triggering, and time related measurements (See
3.3.4 “Triggering”).
For capacitance measurements the ADC output is not used, but the TRIG-A output pulse
length indicates the measured capacitance, see “Capacitance measurements” below.
GPROT input pin 2
PTC (Positive Temperature Coefficient) resistors (R106-R206) are provided between the
Input A and Input B shield ground, and the COM input (instrument ground). This
prevents damage to the test tool if the various ground inputs are connected to different
voltage levels. The voltage across the PTC resistor is supplied via the GPROT input pin
2 to an input buffer. If this voltage exceeds ±200 mV, the ground protect circuit in the
C-ASIC makes the DACTEST output (pin 24) high. The DACTEST line output level is
read by the D-ASIC via the slow ADC (See 3.3.2 “Power”). The test tool will give a
ground error warning.
3-16
Because of ground loops, a LF interference voltage can arise across PTC resistor R106
(mainly mains interference when the power adapter is connected). To eliminate this LF
interference voltage, it is buffered (also via input GPROT, pin 2), and subtracted from
the input signal. Pin 43 (PROTGND) is the ground reference of the input buffer.
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Circuit Descriptions
3.3 Detailed Circuit Descriptions
CALSIG input pin 36
The reference circuit on the TRIGGER part supplies an accurate +1.23V DC voltage to
the CALSIG input pin 36 via R141. This voltage is used for internal calibration of the
gain, and the capacitance measurement threshold levels. A reference current Ical is
supplied by the T-ASIC via R144 for calibration of the resistance and capacitance
measurement function. For ICAL see also Section 3.3.3.
POS input pin 1
The PWM circuit on the Digital part provides an adjustable voltage (0 to 3.3V) to the
POS input via R151. The voltage level is used to move the input signal trace on the
LCD. The REFN line provides a negative bias voltage via R152, to create the correct
voltage swing level on the C-ASIC POS input.
OFFSET input pin 44
The PWM circuit on the Digital part supplies an adjustable voltage (0 to +3.3V) to the
OFFSET input via R153. The voltage level is used to compensate the offset in the LF
path of the C-ASIC. The REFN line provides a negative bias voltage via R152, to create
the correct voltage swing level on the C-ASIC POS input.
DACTEST output pin 24
As described above, the DACTEST output is used for signaling a ground protect error. It
can also be used for testing purposes. Furthermore the DACTEST output provides a CASIC reset output signal (+1.75V) after a power on.
3
ADDRESS output pin 23
The output provides a replica of the input voltage to the SENSE line via R165. In
capacitance mode, the sense signal controls the CLAMP function in the T-ASIC (See
Section 3.3.3).
TRACEROT input pin 31
The TRACEROT signal is supplied by the T-ASIC. It is a triangle sawtooth voltage.
SDAT, SCLK
Control information for the C-ASIC, e.g. selection of the attenuation factor, is sent by the
D-ASIC via the SDA data line. The SCL line provides the synchronization clock signal.
Voltage Measurements (Channel A & Channel B)
The following description applies to both Channel A and Channel B.
The input voltage is applied to the HF attenuator inputs of the C-ASIC via C104, and to
the LF input of the C-ASIC via R101/R102, AC/DC input coupling relay K171, and
R104. The C-ASIC conditions the input voltage to an output voltage of 50 mV/div. This
voltage is supplied to the ADC on the Digital part. The ADC output data is read and
processed by the D-ASIC, and represented as a numerical reading, and as a graphical
trace.
Table 3-3. shows the relation between the reading range (V) and the trace sensitivity
(V/div.) The selected trace sensitivity determines the C-ASIC attenuation/gain factor.
The reading range is only a readout function, it does not change the hardware range or
the wave form display.
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Table 3-3. Voltage Ranges And Trace Sensitivity
range 50 mV 50 mV 50 mV 500 mV 500 mV 500 mV 5V 5V
trace ../div 5 mV 10 mV 20 mV 50 mV 100 mV 200 mV 500 mV 1V
range 5V 50V 50V 50V 500V 500V 500V 1250V
trace ../div 2V 5V 10V 20V 50V 100V 200V 500V
During measuring, input voltage measurements, gain measurements, and zero
measurements are done. As a result, the voltage supplied to the ADC is a multiplexed
(zero, + reference, -reference, input voltage) signal. In ROLL mode however, no gain
and zero measurements are done. Now the ADC input voltage includes only the
conditioned input voltage.
The input voltage is connected to Input A. The shield of the input is connected to system
ground (⊥⊥⊥⊥) via a PTC ground protection resistor. If a voltage is applied between the
Input A and Input B ground shield, or between one of these ground shields and the black
COM input, the PTC resistor will limit the resulting current. The voltage across the PTC
resistor is supplied to the C-ASIC GPROT input, and causes a ground error warning
(high voltage level) on output pin 24 (DACTEST).
Resistance Measurements (Channel A)
The unknown resistance Rx is connected to Input A, and the black COM input. The T-
ASIC supplies a constant current to Rx via relay contacts K173, and the PTC resistor
R172. The voltage across Rx is supplied to a high impedance input buffer in the C-ASIC
via the LF input pin 42. The C-ASIC conditions the voltage across Rx to an output
voltage of 50 mV/div. This voltage is supplied to the ADC on the Digital part. The
ADC data is read and processed by the D-ASIC, and represented as a numerical reading,
and a graphical trace in a fixed time base.
Table 3-4 shows the relation between the reading range (Ω), the trace sensitivity
(Ω/div.), and the current in Rx. The selected trace sensitivity determines the C-ASIC
attenuation/gain factor. The reading range is only a readout function, it does not change
the hardware range or the wave form display.
Table 3-4. Ohms Ranges, Trace Sensitivity, and Current
Range 50Ω 500Ω 5kΩ 50 kΩ 500 kΩ 5 MΩ 30 MΩ
Sensitivity ../div 20Ω 200Ω 2 kΩ 20 kΩ 200 kΩ 2 MΩ 10 MΩ
Current in Rx 500 µA 500 µA 50 µA5 µA 500 nA 50 nA 50 nA
To protect the current source from being damaged by a voltage applied to the input, a
PTC resistor R172 and a protection circuit are provided (See Section 3.3.3 “Current
Source”).
3-18
During measuring, input voltage measurements, gain measurements, and zero
measurements are done. As a result, the voltage supplied to the ADC is a multiplexed
(zero, + reference, -reference, input voltage) signal.
Capacitance Measurements (Channel A)
The capacitance measurement is based on the equation: C x dV = I x dt. The unknown
capacitor Cx is charged with a constant known current. The voltage across Cx increases,
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Circuit Descriptions
f
3.3 Detailed Circuit Descriptions
and the time lapse between two different known threshold crossings is measured. Thus
dV, I and dt are known and the capacitance can be calculated.
The unknown capacitance Cx is connected to the red Input A safety banana socket, and
the black COM input. The T-ASIC supplies a constant current to Cx via relay contacts
K173, and protection PTC resistor R172. The voltage on Cx is supplied to two
comparators in the C-ASIC via the LF input. The threshold levels th
and th2of the
1
comparators are fixed (see Figure 3-9). The time lapse between the first and the second
threshold crossing depends on the value of Cx. The resulting pulse is supplied to the
TRIGGER output pin 29, which is connected to the analog trigger input of the T-ASIC
(TRIG-A signal). The T-ASIC adjusts the pulse to an appropriate level, and supplies it
to the D-ASIC via its ALLTRIG output. The pulse width is measured and processed by
the D-ASIC, and represented on the LCD as numerical reading. There will be no trace
displayed.
+Ire
0
-Iref
pos. clamp active
ref clamp
th2
I-Cx
3
th1
0
neg. clamp active neg. clamp active
U-Cx
TRIG-A
Figure 3-9. Capacitance Measurement
The T-ASIC supplies a positive (charge) and a negative (discharge) current. A
measurement cycle starts from a discharged situation (U
After reaching the first threshold level (th
) the pulse width measurement is started. The
1
=0) with a charge current.
CX
dead zone between start of charge and start of pulse width measurement avoids
measurement errors due to a series resistance of Cx.
The pulse width measurement is stopped after crossing the second threshold level (th
),
2
the completes the first part of the cycle.
Unlimited increase of the capacitor voltage is avoided by the positive clamp in the TASIC. The output of the high impedance buffer in the C-ASIC supplies a replica of the
voltage across Cx to output pin 23 (ADDRESS). Via R165, this voltage is supplied to a
clamp circuit in the T-ASIC (SENSE, pin 59). This clamp circuit limits the positive
voltage on Cx to 0.45V.
Now the second part of the measurement is started by reversing the charge current. The
capacitor will be discharged in the same way as the charge cycle. The time between
passing both threshold levels is measured again. A clamp limits the minimum voltage on
Cx to 0V.
Averaging the results of both measurements cancels the effect of a possible parallel
resistance, and suppresses the influence of mains interference voltages.
Table 3-5 shows the relation between the capacitance ranges, the charge current and the
pulse width at full scale.
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Table 3-5. Capacitance Ranges, Current, and Pulse Width
Range 50 nF 500 nF 5000 nF 50 µF 500 µF
Current µA0.5 µA5 µA 50 µA500 µA 500 µA
Pulse width at Full Scale 25 ms 25 ms 25 ms 25 ms 250 ms
To protect the current source if a voltage is applied to the input, a PTC resistor R172,
and a protection circuit on the TRIGGER part, are provided (see Section 3.3.3).
Frequency & Pulse Width Measurements
The input voltage is measured as described above. From the ADC samples to built the
trace, also the frequency, pulse width, and duty cycle of the input signal are calculated.
Probe Detection
The Input A and Input B safety banana jacks are provided with a ground shield,
consisting of two separated half round parts. One half is connected to ground via the
protection PTC resistor R106/R206. Via a 220K resistor installed on the input block, the
other half is connected to the probe input of the D-ASIC (pin 54, 55). If the shielded
STL120 test lead, or a BB120 shielded banana-to-BNC adapter, is inserted in Input A or
Input B, it will short the two ground shield halves This can be detected by the D-ASIC.
Supply Voltages
The +5VA, +3V3A, and -3V3A supply voltages are supplied by the Fly Back Converter
on the POWER part. The voltages are present only if the test tool is turned on.
3.3.3 Trigger Circuit
The description refers to circuit diagram Figure 9-3. The trigger section is built up
around the T-ASIC OQ0257. It provides the following functions:
• Triggering: trigger source selection, trigger signal conditioning, and generation of
trigger information to be supplied to the D-ASIC.
• Current source for resistance and capacitance measurements.
• Voltage reference source: buffering and generation of reference voltages.
• AC/DC relay and Resistance/Capacitance (Ω/F) relay control.
3-20
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3.3 Detailed Circuit Descriptions
A
Triggering
Figure 3-10 shows the block diagram of the T-ASIC trigger section.
Circuit Descriptions
3
trigger section
select
logic
freq.
detect
synchronize
delta-t
35
ALLTRIG
42
TRIGQUAL
34
TRIGDT
39
HOLDOFF
38
SMPCLK
29
DACTEST
TRIGLEV1
TRIGLEV2
TRIG A
TRIG B
10
11
13
15
Figure 3-10. T-ASIC Trigger Section Block Diagram
TRIGGER ASIC OQ0257
analog
path
trigger
colour filter
+/- amplifier
16
TVSYNC
sync. pulse
separator
LLTRIG
DUALTRI G
12
TVOUT
In normal trigger modes (= not TV triggering), the analog trigger path directly uses the
Input A (TRIG A) or Input B (TRIG B) signal for triggering.
In the TV trigger mode, the analog trigger path uses the TVSYNC signal for triggering.
This signal is the synchronization pulse, derived from the TRIGA or TRIGB composite
video signal. The color filter +/- amplify section in the T-ASIC blocks the color
information, and amplifies and inverts (if required) the video signal. The TVOUT output
signal is supplied to the synchronization pulse separator circuit. This circuit consists of
C395, V395 and related parts. The output signal TVSYNC is the synchronization pulse
at the appropriate voltage level and amplitude for the T-ASIC analog trigger path.
Note
External triggers provided by the Isolated Trigger Probe to the optical
interface are processed directly by the D-ASIC.
The TRIG-A, TRIG-B, or TVSYNC signal, and two trigger level voltages TRIGLEV1
and TRIGLEV2, are supplied to the analog trigger part. The trigger level voltages are,
supplied by the PWM section on the Digital part See Section 3.3.4). The TRIGLEV1
voltage is used for triggering on a negative slope of the Input A/B voltage. The
TRIGLEV2 voltage is used for triggering on a positive slope of the Input A/B voltage.
As the C-ASIC inverts the Input A/B voltage, the TRIGA, TRIGB slopes on the T-ASIC
input are inverted! From the selected trigger source signal and the used trigger level
voltages, the ALLTRIG and the DUALTRIG trigger signal are derived. The select logic
selects which one will be used by the synchronization/delta-T circuit to generate the final
trigger. There are three possibilities:
1. Single shot triggering.
The DUALTRIG signal is supplied to the synchronization/delta-T circuit. The
trigger levels TRIGLEV1 and TRIGLEV2 are set just above and below the DC level
of the input signal. A trigger is generated when the signal crosses the trigger levels.
A trigger will occur on both a positive or a negative glitch. This mode ensures
triggering, when the polarity of an expected glitch is not known.
2. Qualified triggering (e.g. TV triggering).
The ALLTRIG signal is supplied to T-ASIC output pin 35, which is connected to the
D-ASIC input pin 21. The D-ASIC derives a qualified trigger signal TRIGQUAL
3-21
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Service Manual
from ALLTRIG, e.g. on each 10th ALLTRIG pulse a TRIGQUAL pulse is given.
The TRIGQUAL is supplied this to the synchronize/delta-T circuit via the select
logic.
3. Normal triggering.
The ALLTRIG signal is supplied to the synchronization/delta-T circuit.
The ALLTRIG signal includes all triggers. It is used by the D-ASIC for signal analysis
during AUTOSET.
Traditionally a small trigger gap is applied for each the trigger level. In noisy signals,
this small-gap-triggering would lead to unstable displaying of the wave form, if the noise
is larger than the gap. The result is that the system will trigger randomly. This problem
is solved by increasing the trigger gap (TRIGLEV1 - TRIGLEV2) automatically to 80%
(10 to 90%) of the input signal peak-to-peak value. This 80% gap is used in AUTOSET.
Note
The ALLTRIG signal is also used for frequency/pulse width -, and
capacitance measurements. Section 3.3.2.
The Synchronize/Delta-t part provides an output pulse TRIGDT. The front edge of this
pulse is the real trigger moment. The pulse width is a measure for the time between the
trigger moment, and the moment of the first sample after the trigger. This pulse width
information is required in random repetitive sampling mode (see below). The
HOLDOFF signal, supplied by the D-ASIC, releases the trigger system. The sample
clock SMPCLK, also provided by the D-ASIC, is used for synchronization.
Real time sampling TRIGDT signal
For time base settings of 1 µs/div and slower, the pixel distance on the LCD is ≥40 ns (1
division is 25 pixels). As the maximum sample rate is 25 MHz, a sample is taken each
40 ns. So the first sample after a trigger can be assigned to the first pixel, and successive
samples to each next pixel. So a trace can be built-up from a single period of the input
signal.
Random repetitive (equivalent) sampling TRIGDT signal
For time base settings below 1 µs/div, the time between two successive pixels on the
screen is smaller than the time between two successive samples. For example at 20
ns/div, the time between two pixels is 20:25=0.8 ns, and the sample distance is 40 ns
(sample rate 25 MHz). A number of sweeps must be taken to reconstruct the original
signal, see Figure 3-11. As the samples are taken randomly with respect to the trigger
moment, the time dt must be known to position the samples on the correct LCD pixel.
The TRIGDT signal is a measure for the time between the trigger and the sample
moment dt. The pulse duration of the TRIGDT signal is approximately 4 µs...20 µs.
TRIGGER
SAMPLES SWEEP 1
SAMPLES SWEEP 2
3
dt1
4
dt2
13
14
3-22
PIXEL
21346591078 11
Figure 3-11. Random Repetitive Sampling Mode
1512 13 16
14
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Circuit Descriptions
3.3 Detailed Circuit Descriptions
DACTEST output
A frequency detector in the T-ASIC monitors the ALLTRIG signal frequency. If the
frequency is too high to obtain a reliable transmission to the D-ASIC, the DACTEST
output pin 29 will become high. The DACTEST signal is read by the D-ASIC via the
slow ADC on the Power part. It and indicates that the D-ASIC cannot use the ALLTRIG
signal (e.g. for qualified triggering).
Current Source
A current source in the T-ASIC supplies a DC current to the GENOUT output pin 1. The
current is used for resistance and capacitance measurements. It is adjustable in decades
between 50 nA and 500 µA depending on the measurement range, and is derived from an
external reference current. This reference current is supplied by the REFP reference
voltage via R323 and R324 to input REFOHMIN (pin 6).
The SENSE input signal is the buffered voltage on Input A. For capacitance
measurements it is supplied to a clamp circuit in the T-ASIC (pin 59). The clamp circuit
limits the positive voltage on the unknown capacitance to 0.45V.
The protection circuit prevents the T-ASIC from being damaged by a voltage applied to
Input A during resistance or capacitance measurements. If a voltage is applied, a current
will flow via PTC resistor R172 (on the Channel A part), V358/V359, V353, V354 to
ground. The resulting voltage across the diodes is approximately -2V or +15V.
R354/R356, and V356/V357 limit the voltage on the T-ASIC GENOUT output (pin 1).
The BOOTSTRAP output signal on pin 3 is the buffered GENOUT signal on pin 1, or
the buffered SENSE signal on pin 59. It is supplied to the protection diodes via R352,
R353, and to protection transistor V356, to minimize leakage currents.
3
On the ICAL-output of the T-ASIC (pin 5) a copy of the output current on GENOUT is
available. The current is supplied to the Channel A C-ASIC via R144. ICAL shows the
same time/temperature drift as the GENOUT measurement current, it can be used for
internal calibration of the resistance and capacitance measurement function.
Capacitor C356 is use for hum/noise suppression.
Square Wave Voltage Generator For Probe Adjustment
For probe adjustment, a voltage generator circuit in the T-ASIC can provide a 2.5Vpp,
760Hz, square wave voltage via the GENOUT output pin 1 to the Input A connector.
Capacitor C357 is the external timing capacitor for the generator.
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2
655576364
453
2518
2
P
M
F
N
N
Service Manual
Reference Voltage Circuit
This circuit derives several reference voltages from the 1.23V main reference source.
+3.3V
+3.3V
-1.23V
+0.1V
+1.23V
R309
R311
R312
R308
R306
R310
R303
R307
V301
1.23V
REFPWM2
REFP
REF
GAINPW
REFPWM1
GNDRE
GAINREF
REF
GAINADCB
REFADCB
73
P-ASIC
OQ0256
7
71
6
5
5
+
-
T-ASIC
+
1
-
+
2
-
+
3
-
OQ0257
+
+1.6V
R302
R301
R305
GAINADCT
REFADCT
REFATT
5
4
-
Figure 3-12. Reference Voltage Section
The output of an amplifier in the P-ASIC supplies a current to the +1.23V reference
source V301 via R307. The +3.3V REFPWM2 voltage is used as reference for the
PWMB outputs of the D-ASIC on the Digital part.
The +1.23V REFP voltage is used as main reference source for the reference circuit.
This circuit consists of four amplifiers in the T-ASIC, external gain resistors, and filter
capacitors.
Amplifier 1 and connected resistors supply the REFPWM1 reference voltage. This
voltage is a reference for the PWMA outputs of the D-ASIC on the Digital section. It is
also used as reference voltage for the LCD supply on the LCD unit.
Amplifier 2 and connected resistors supply the -1.23V REFN reference voltage, used for
the trigger level voltages TRIGLEV1&2, the C-ASIC POS-A and POS-B voltages, and
the C-ASIC OFFSET-A and OFFSET-B voltages. REFN is also the input reference for
amplifiers 3 and 4.
3-24
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Circuit Descriptions
3.3 Detailed Circuit Descriptions
Amplifier 3 and 4 and connected resistors supply the REFADCT and REFADCB
reference voltages for the ADC’s. Both voltages directly influence the gain accuracy of
the ADC’s.
The T-ASIC can select some of the reference voltages to be output to pin 8 (REFATT).
The REFATT voltage is used for internal calibration of the input A and B overall gain.
Tracerot Signal
The T-ASIC generates the TRACEROT signal, used by the C-ASIC’s. Control signals
TROTRST and TROTCLK are provided by the D-ASIC.
AC/DC Relay and ΩΩΩΩ/F Relay Control
The Channel A/B AC/DC relays K171/K271, and the Channel A Ω/F relay K173 are
controlled by the T-ASIC output signals ACDCA (pin 22), ACDCB (pin 23) and OHMA
(pin 24).
SCLK, SDAT Signals
T-ASIC control data, e.g. for trigger source/mode/edge selection and relay control, are
provided by the D-ASIC via the SCLK and SDAT serial control lines..
3
3.3.4 Digital Circuit
See the Fluke 123 block diagram Figure 3-1, and circuit diagram Figure 9-4.
The Digital part is built up around the D-ASIC MOT0002. It provides the following
functions:
• Analog to Digital Conversion of the conditioned Input A and Input B signals
• ADC data acquisition for traces and numerical readings
• Trigger processing
• Pulse width measurements, e.g. for capacitance measurement function
• Microprocessor, Flash EPROM and RAM control
• Display control
• Keyboard control, ON/OFF control
• Miscellaneous functions, as PWM signal generation, SDA-SCL serial data control,
probe detection, Slow ADC control, serial RS232 interface control, buzzer control,
etc.
The D-ASIC is permanently powered by the +3V3GAR voltage. The P-ASIC indicates
the status of the +3V3GAR voltage via the VGARVAL line connected to D-ASIC pin
89. If +3V3GAR is correct, VGARVAL is high, and the D-ASIC will start-up. as a
result the D-ASIC functions are operative regardless of the test tool is ON/OFF status.
Analog to Digital Conversion
For voltage and resistance measurements, the Input A/B (B for voltage only) signal is
conditioned by the C-ASIC to 150 mV/division. Zero and gain measurement are done to
eliminate offset and gain errors. The C-ASIC output voltage is supplied to the Channel
A/B ADC (D401/D451 pin 5). The ADC samples the analog voltage, and converts it into
an 8-bit data byte (D0-D7). The data are read and processed by the D-ASIC, see below
“ADC data Acquisition”.
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The sample rate depends on the sample clock supplied to pin 24. The sample rate is 5
MHz or 25 MHz, depending on the instrument mode. The ADC input signal is sampled
on the rising edge of the sample clock. The digital equivalent of this sample is available
on the outputs D0-D7 with a delay of 6 sample clock cycles.
The reference voltages REFADCT and REFADCB determine the input voltage swing
that corresponds to an output data swing of 00000000 to 11111111 (D0-D7). The
reference voltages are supplied by the reference circuit on the Trigger part. The ADC
output voltages MIDADC-A/B are supplied to the C-ASIC’s (input pin 28), and are
added to the conditioned input signal. The MIDADC voltage matches the middle of the
C-ASIC output swing to the middle of the ADC input swing.
Current IREF is supplied to pin 7 of the ADC’s via R403/R453 for biasing internal ADC
circuits.
The D-ASIC can disable the ADC conversion by making the STBY-A/STBY-B line pin
1 high. Conversion also stops if the sample clock stops.
ADC data acquisition for traces and numerical readings
During an acquisition cycle, ADC samples are acquired to complete a trace on the LCD.
Numerical readings (METER readings) are derived from the trace. So in single shot
mode a new reading becomes available when a new trace is started.
The test tool software starts an acquisition cycle. The D-ASIC acquires data from the
ADC, and stores them internally in a cyclic Fast Acquisition Memory (FAM). The DASIC also makes the HOLDOFF line low, to enable the T-ASIC to generate the trigger
signal TRIGDT. The acquisition cycle is stopped if the required number of samples is
acquired. From the FAM the ADC data are moved to the RAM D475. The ADC data
stored in the RAM are processed and represented as traces and readings.
Triggering (HOLDOFF, TRIGDT, Randomize)
To start a new trace, the D-ASIC makes the HOLDOFF signal low. Now the T-ASIC
can generate the trigger signal TRIGDT. For signal frequencies higher than the system
clock frequency, and in the random repetitive sampling mode, no fixed time relation
between the HOLDOFF signal and the system clock is allowed. The RANDOMIZE
circuit desynchronizes the HOLDOFF from the clock, by phase modulation with a LF
ramp signal.
Trigger qualifying (ALLTRIG, TRIGQUAL)
The ALLTRIG signal supplied by the T-ASIC contains all possible triggers. For normal
triggering, the T-ASIC uses ALLTRIG to generate the final trigger TRIGDT. For
qualified triggering (e.g. TV triggering), the D-ASIC returns a qualified, e.g. each n
th
,
trigger pulse to the T-ASIC (TRIGQUAL). Now the T-ASIC derives the final trigger
TRIGDT from the qualified trigger signal TRIGQUAL.
Capacitance measurements (ALLTRIG)
As described in Section 3.3.2, capacitance measurements are based on measuring the
capacitor charging time using a known current. The ALLTRIG pulse signal represents
the charging time. The time is counted by the D-ASIC
3-26
Microprocessor
The D-ASIC includes a microprocessor with a 16 bit data bus. The instrument software
is loaded in a 8 Mb Flash ROM D474.
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Circuit Descriptions
3.3 Detailed Circuit Descriptions
ROM control for PCB versions < 8
The Flash ROM mode depends on the output signal of the RESET ROM circuit, RP#:
• RP#>2V, software can run. True if +12V present and/or ROMRST is high.
• RP#<2V, software cannot run. True if +12V not present and/or ROMRST is low
(test tool off).
• RP#>12V, software can run, and ROM can be programmed. True if +12V is present.
The +12VPROG voltage is derived from the power adapter input voltage by the P-ASIC
on the POWER part. To program the ROM, the power adapter voltage must be
+20V±1V, to ensure a correct +12V voltage level.
ROM control for PCB versions 8 and newer
FlashROMs used on PCB version 8 and newer do not need the 12V programming
voltage.
The circuit D480 and related parts create a delay for the ROMWRITE enable signal.
This prevents the ROM write proces being disabled before all data have been written.
RAM
Measurement data and instrument settings are stored in RAM D475. All RAM data will
be lost if all power sources (battery and power adapter) are removed.
3
mask ROM
The D-ASIC has on-chip mask ROM. If no valid Flash ROM software is present when
the test tool is turned on, the mask ROM software will become activate. The test tool
can be forced to stay in the mask ROM software by pressing the ^ and > key, and then
turning the test tool on. When active, the mask ROM software generates a 100 kHz
square wave on pin 59 of the D-ASIC.
Display Control
The LCD unit includes the LCD, the LCD drivers, and the fluorescent back light lamp.
It is connected to the main board via connector X453. The LCD is built up of 240
columns of 240 pixels each (240x240 matrix). The D-ASIC supplies the data and
control signals for the LCD drivers on the LCD unit (Figure 3-13).
3-27
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Service Manual
FRAME
Column
Driver
Din
DCl
LnCl
M
Carry
Column
Driver
Din
DCl
LnCl
M
Carry
Column
Driver
LCDAT0-3
DATACLK0
LINECLK
MM
Din
DCl
LnCl
Common Driver Common Driver Common Driver
LnCl
MMM
X1..80 X81..160 X161..240
Y1..80
LEFT
Y81..160
Y161..240
Figure 3-13. LCD Control
Do Di Do
LnCl LnCl
TOP
FRONTVIEW
LCD
PIXEL (0,0)
Di
Each 14 ms the LCD picture is refreshed during a frame. The frame pulse (FRAME)
indicates that the concurrent LINECLK pulse is for the first column. The column drivers
must have been filled with data for the first column. Data nibbles (4 bit) are supplied via
lines LCDAT0-LCDAT3. During 20 data clock pulses (DATACLK0) the driver for
Y161..240 is filled. When it is full, it generates a carry to enable the driver above it,
which is filled now. When a column is full, the LINECLK signal transfers the data to the
column driver outputs. Via the common drivers, the LINECLK also selects the next
column to be filled. So after 240 column clocks a full screen image is built up on the
LCD.
The LCD unit generates various voltage levels for the LCD drivers outputs to drive the
LCD. The various levels are supplied to the driver outputs, depending on the supplied
data and the M(ultiplex) signal. The M signal (back plane modulation) is used by the
LCD drivers to supply the various DC voltages in such an order, that the average voltage
does not contain a DC component. A DC component in the LCD drive voltage may
cause memory effects in the LCD.
The LCD contrast is controlled by the CONTRAST voltage. This voltage is controlled
by the D-ASIC, which supplies a PWM signal (pin 37 CONTR-D) to PWM filter
R436/C436. The voltage REFPWM1 is used as bias voltage for the contrast adjustment
circuit on the LCD unit. To compensate for contrast variations due to temperature
variations, a temperature dependent resistor is mounted in the LCD unit. It is connected
to the LCDTEMP1 line. The resistance change, which represents the LCD temperature,
is measured by the D-ASIC via the S-ADC on the POWER part.
The back light lamp is located at the left side of the LCD, so this side becomes warmer
than the right side. As a result the contrast changes from left to right. To eliminate this
unwanted effect, the CONTRAST control voltage is increased during building up a
screen image. A FRAME pulse starts the new screen image. The FRAME pulse is also
used to discharge C404. After the FRAME pulse, the voltage on C404 increases during
building up a sreen image.
3-28
Keyboard Control, ON/OFF Control
Page 55
Circuit Descriptions
3.3 Detailed Circuit Descriptions
The keys are arranged in a 6 rows x 6 columns matrix. If a key is pressed, the D-ASIC
drives the rows, and senses the columns. The ON/OFF key is not included in the matrix.
This key toggles a flip-flop in the D-ASIC via the ONKEY line (D-ASIC pin 72). As the
D-ASIC is permanently powered, the flip-flop can signal the test tool on/off status.
PWM Signals
The D-ASIC generates various pulse signals, by switching a reference voltage
(REFPWM1 or REFPWM2), with software controllable duty cycle (PWMA, PWMB
pins 26-40). By filtering the pulses in low pass filters (RC), software controlled DC
voltages are generated. The voltages are used for various control purposes, as shown in
Table 3-6.
Table 3-6. D-ASIC PWM Signals
PWM signal Function Destination Reference
HO-RNDM HOLDOFF randomize control R487 of RANDOMIZE circuit REFPWM1
3
TRGLEV1D,
TRIGLEV2D
POS-AD, POS-BD Channel A,B position control C-ASIC REFPWM1
OFFSETAD,
OFFSETBD
BACKBRIG Back light brightness control Back light converter (POWER part) REFPWM1
CONTR-D Display contrast control LCD unit REFPWM1
SADCLEVD S ADC comparator voltage SLOW ADC (POWER part) REFPWM2
CHARCURD Battery charge current control P-ASIC REFPWM2
Trigger level control T-ASIC REFPWM1
Channel A,B offset control C-ASIC REFPWM1
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SDA-SCL Serial Bus
The unidirectional SDA-SCL serial bus (pin 56, 57) is used to send control data to the CASIC’s (e.g. change attenuation factor), and the T-ASIC (e.g. select other trigger source).
The SDA line transmits the data bursts, the SCL line transmits the synchronization clock
(1.25 MHz).
Probe Detection
Via the probe detection inputs PROBE-A and PROBE-B (pin 54, 55), the D-ASIC
detects if the Input A and B probes have been connected/disconnected. The SUPPRDET
signal (pin 99) can suppress the probe detection. If this signal is low, The PROBE-A and
PROBE-B lines are permanently low (via R471, R472), regardless of a probe is
connected or not connected. This function is not supported by the Fluke 123 software.
See also Section 3.3.2 “Probe detection”.
TXD, RXD Serial Interface (Optical Port)
The optical interface output is directly connected to the TXD line (pin 86). The optical
input line is buffered by the P-ASIC on the power part. The buffered line is supplied to
the RXD input (pin 87). The serial data communication (RS232) is controlled by the DASIC.
Slow ADC Control, SADC Bus
The SELMUX0-2 (pins 96-98) and SLOWADC (pin 100) lines are used for
measurements of various analog signals, as described in Section 3.3.1. “SLOW ADC”.
BATIDENT
The BATTIDENT line (pin 90) is connected to R508 on the Power part, and to a resistor
in the battery pack. If the battery is removed, this is signaled to the D-ASIC
(BATTIDENT line goes high).
MAINVAL, FREQPS
The MAINVAL signal (pin91) is supplied by the P-ASIC, and indicates the presence of
the power adapter voltage (high = present).
The FREQPS signal (pin 93) is also supplied by the P-ASIC. It is the same signal that
controls the Fly Back Converter control voltage FLYGATE. The D-ASIC measures the
frequency in order to detect if the Fly Back Converter is running within specified
frequency limits.
D-ASIC Clocks
A 25 MHz crystal (B403) controls the D-ASIC system clock. For the real time clock,
counting the time and date, an additional 32.768 kHz crystal (B401) is provided. When
the test tool is turned on, a 16MHz microprocessor clock (derived from B402) becomes
active.
3-30
Buzzer
The Buzzer is directly driven by a 4 kHz square wave from the D-ASIC (pin 101) via
FET V522. If the test tool is on, the -30VD supply from the Fly Back converter is
present, and the buzzer sounds loudly. If the -30VD is not present, the buzzer sounds
weak, e.g. when the Mask Active mode is entered.
Page 57
Chapter 4
Performance Verification
Title Page
4.1 Introduction................................................................................................. 4-3
4.2 Equipment Required For Verification ........................................................ 4-3
4.3 How To Verify ............................................................................................ 4-3
4.4 Display and Backlight Test......................................................................... 4-4
4.5 Input A and Input B Tests ........................................................................... 4-5
4.5.1 Input A and B Base Line Jump Test.................................................... 4-6
4.5.2 Input A Trigger Sensitivity Test.......................................................... 4-7
4.5.3 Input A Frequency Response Upper Transition Point Test................. 4-8
4.5.4 Input A Frequency Measurement Accuracy Test ................................ 4-8
4.5.5 Input B Frequency Measurement Accuracy Test ................................ 4-9
4.5.6 Input B Frequency Response Upper Transition Point Test ................. 4-10
4.5.7 Input B Trigger Sensitivity Test .......................................................... 4-10
4.5.8 Input A and B Trigger Level and Trigger Slope Test.......................... 4-11
4.5.9 Input A and B DC Voltage Accuracy Test .......................................... 4-14
4.5.10 Input A and B AC Voltage Accuracy Test ........................................ 4-15
4.5.11 Input A and B AC Input Coupling Test............................................. 4-16
4.5.12 Input A and B Volts Peak Measurements Test.................................. 4-17
4.5.13 Input A and B Phase Measurements Test.......................................... 4-18
4.5.14 Input A and B High Voltage AC/DC Accuracy Test......................... 4-19
4.5.15 Resistance Measurements Test.......................................................... 4-20
4.5.16 Continuity Function Test ................................................................... 4-21
4.5.17 Diode Test Function Test .................................................................. 4-22
4.5.18 Capacitance Measurements Test ....................................................... 4-22
4.5.19 Video Trigger Test............................................................................. 4-23
4-1
Page 58
Page 59
4.1 Introduction
Procedures in this chapter should be performed by qualified
service personnel only. To avoid electrical shock, do not
perform any servicing unless you are qualified to do so.
The test tool should be calibrated and in operating condition when you receive it.
The following performance tests are provided to ensure that the test tool is in a proper
operating condition. If the test tool fails any of the performance tests, calibration
adjustment (see Chapter 5) and/or repair (see Chapter 7) is necessary.
The Performance Verification Procedure is based on the specifications, listed in Chapter
2 of this Service Manual. The values given here are valid for ambient temperatures
between 18 °C and 28 °C.
The Performance Verification Procedure is a quick way to check most of the test tool’s
specifications. Because of the highly integrated design of the test tool, it is not always
necessary to check all features separately. For example: the duty cycle, pulse width, and
frequency measurement are based on the same measurement principles; so only one of
these functions needs to be verified.
Warning
Performance Verification
4.1 Introduction
4
4.2 Equipment Required For Verification
The primary source instrument used in the verification procedures is the Fluke 5500A. If
a 5500A is not available, you can substitute another calibrator as long as it meets the
minimum test requirements.
• Fluke 5500A Multi Product Calibrator, including 5500A-SC Oscilloscope
Calibration Option.
• Stackable Test Leads (4x), supplied with the 5500A.
• 50Ω Coax Cables (2x), Fluke PM9091 (1.5m) or PM9092 (0.5m).
• 50Ω feed through terminations (2x), Fluke PM9585.
• Fluke BB120 Shielded Banana to Female BNC adapters (2x), supplied with the
Fluke 123.
• Dual Banana Plug to Female BNC Adapter (1x), Fluke PM9081/001.
• Dual Banana Jack to Male BNC Adapter (1x), Fluke PM9082/001.
• TV Signal Generator, Philips PM5418.
• 75Ω Coax cable (1x), Fluke PM9075.
• 75Ω Feed through termination (1x), ITT-Pomona model 4119-75.
• PM9093/001 Male BNC to Dual Female BNC Adapter
4.3 How To Verify
Verification procedures for the display function and measure functions follow. For each
procedure the test requirements are listed. If the result of the test does not meet the
requirements, the test tool should be recalibrated or repaired if necessary.
4-3
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4.4 Display and Backlight Test
Follow these general instructions for all tests:
• For all tests, power the test tool with the PM8907 power adapter. The battery pack
must be installed.
• Allow the 5500A to satisfy its specified warm-up period.
• For each test point , wait for the 5500A to settle.
• Allow the test tool a minimum of 20 minutes to warm up.
Proceed as follows to test the display and the backlight:
1. Press
2. Press
TO TURN THE Test tool on.
and verify that the backlight is dimmed. Then select maximum backlight
brightness again.
3. Remove the adapter power, and verify that the backlight is dimmed.
4. Apply the adapter power and verify that the backlight brightness is set to maximum.
5. Press and hold
.
6. Press and release .
7. Release
.
The test tool shows the calibration menu in the bottom of the display.
Do not press now! If you did, turn the test tool off and on, and start at 5.
8. Press (PREV) three times.
The test tool shows
Contrast (CL 0100):MANUAL
9. Press (CAL) .
The test tool shows a dark display; the test pattern as shown in Figure 4-1 may not be
visible or hardly visible.
Observe the display closely, and verify that no light pixels are shown.
4-4
Figure 4-1. Display Pixel Test Pattern
11. Press .
The test pattern is removed; the test tool shows
Contrast (CL 0110):MANUAL
Page 61
Performance Verification
4.5 Input A and Input B Tests
12. Press (CAL) .
The test tool shows the display test pattern shown in Figure 4-1, at default contrast.
Observe the test pattern closely, and verify that the no pixels with abnormal contrast
are present in the display pattern squares. Also verify that the contrast of the upper
left and upper right square of the test pattern are equal.
4
13. Press
.
The test pattern is removed; the test tool shows
14. Press (CAL) .
The test tool shows a light display; the test pattern as shown in Figure 4-1 may not be
visible or hardly visible.
Observe the display closely, and verify that no dark pixels are shown.
15. Turn the test tool OFF and ON to exit the calibration menu and to return to the
normal operating mode.
4.5 Input A and Input B Tests
Before performing the Input A and Input B tests, the test tool must be set in a defined
state, by performing a RESET.
Proceed as follows to reset the test tool:
• Press
• Press and hold
• Press and release to turn the test tool on.
Wait until the test tool has beeped twice, and then release
beeped twice, the RESET was successful.
to turn the test tool off.
.
Contrast (CL 0120):MANUAL
. When the test tool has
.
For most tests, you must turn Input B on. Input A is always on.
Proceed as follows to turn Input B on:
• Press
• Using
• Press
from the next item group will be highlighted (for example ■
to open the Meter B menu.
select INPUT B: ON .
to confirm the selection; the mark changes to ■ . The active setting
VAC ), and maintained
after leaving the menu.
• Press
During verification you must open menus, and to choose items from the menu.
Proceed as follows to make choices in a menu (see Figure 4.2):
• Open the menu, for example press
• Press
• Press
to exit the menu.
.
to highlight the item to be selected in a menu.
to confirm the selection and to jump to the next item group (if present).
Item groups in a menu are separated by a vertical line.
• After pressing
in the last menu item group, the menu is closed.
4-5
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Figure 4-2. Menu item selection
If an item is selected, it is marked by ■. Not selected items are marked by . If a
selected item is highlighted, an then
is pressed, the item remains selected.
You can also navigate through the menu using
you must press
.
4.5.1 Input A and B Base Line Jump Test
Proceed as follows to check the Input A and Input B base line jump:
1. Short circuit the Input A and the Input B shielded banana sockets of the test tool.
Use the BB120 banana to BNC adapter, and a 50Ω (or lower) BNC termination.
2. Select the following test tool setup:
• Turn Input B on (if not already on).
• Press
(
• Press to open the SCOPE INPUTS menu.
• Press
to select auto ranging (AUTO in top of display).
toggles between AUTO and MANUAL ranging).
to open the SCOPE OPTIONS menu, and choose :
ST7968.CGM
. To conform the highlighted item
4-6
SCOPE MODE: ■ NORMAL | WAVEFORM MODE: ■ SMOOTH
3. Using toggle the time base between 10 ms/div and 5 ms/div.
(the time base ranging is set to manual now, the input sensitivity is still automatic; no
indication
AUTO or MANUAL is displayed).
After changing the time base wait some seconds until the trace has settled.
Observe the Input A trace, and check to see if it returns to the same position after
changing the time base. The allowed difference is ±0.04 division (= 1 pixel).
Observe the Input B trace for the same conditions.
4. Using
toggle the time base between 1 µs/div and 500 ns/div. After changing
the time base wait some seconds until the trace has settled.
Observe the Input A trace, and check to see if it is set to the same position after
changing the time base. The allowed difference is ±0.04 division (= 1 pixel).
Observe the Input B trace for the same conditions.
Page 63
5. Using set the time base to 10 ms/div.
Performance Verification
4.5 Input A and Input B Tests
4
6. Using
toggle the sensitivity of Input A between 5 and 10 mV/div. After
changing the sensitivity wait some seconds until the trace has settled.
Observe the Input A trace, and check to see if it is set to the same position after
changing the sensitivity. The allowed difference is ±0.04 division (= 1 pixel).
7. Using
toggle the sensitivity of Input B between 5 and 10 mV/div. After
changing the sensitivity wait some seconds until the trace has settled.
Observe the Input B trace, and check to see if it is set to the same position after
changing the sensitivity. The allowed difference is ±0.04 division (= 1 pixel).
8. When you are finished, remove the Input A and Input B short.
4.5.2 Input A Trigger Sensitivity Test
Proceed as follows to test the Input A trigger sensitivity:
1. Connect the test tool to the 5500A as shown in Figure 4-3.
Figure 4-3. Test Tool Input A to 5500A Scope Output 50ΩΩΩΩ
2. Select the following test tool setup:
• Press
Do not press
• Using
to select auto ranging (AUTO in top of display).
anymore!
change the sensitivity to select manual sensitivity ranging, and
lock the Input A sensitivity on 200 mV/div.
3. Set the 5500A to source a 5 MHz leveled sine wave of 100 mV peak-to-peak
(SCOPE output, MODE levsin).
4. Adjust the amplitude of the sine wave to 0.5 division on the display.
5. Verify that the signal is well triggered.
If it is not, press
adjustment; adjust the trigger level using
triggered now. The trigger level is indicated by the trigger icon (
to enable the up/down arrow keys for Trigger Level
and verify that the signal will be
).
6. Set the 5500A to source a 25 MHz leveled sine wave of 400 mV peak-to-peak.
7. Adjust the amplitude of the sine wave to 1.5 divisions on the test tool display.
ST8004.CGM
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4.5.3 Input A Frequency Response Upper Transition Point Test
8. Verify that the signal is well triggered.
If it is not, press
to enable the up/down arrow keys for Trigger Level
adjustment; adjust the trigger level and verify that the signal will be triggered now.
9. Set the 5500A to source a 40 MHz leveled sine wave of 1.8V peak-to-peak.
10. Adjust the amplitude of the sine wave to 4 divisions on the test tool display.
11. Verify that the signal is well triggered.
If it is not, press
to enable the up/down arrow keys for Trigger Level
adjustment; adjust the trigger level and verify that the signal will be triggered now.
12. When you are finished, set the 5500A to Standby.
Proceed as follows to test the Input A frequency response upper transition point:
1. Connect the test tool to the 5500A as for the previous test (see Figure 4-3).
2. Select the following test tool setup:
• Press
Do not press
• Using
to select auto ranging (AUTO in top of display).
anymore!
change the sensitivity to select manual sensitivity ranging, and
lock the Input A sensitivity on 200 mV/div.
3. Set the 5500A to source a leveled sine wave of 1.2V peak-to-peak, 50 kHz (SCOPE
output, MODE levsin).
4. Adjust the amplitude of the sine wave to 6 divisions on the test tool display.
5. Set the 5500A to 20 MHz, without changing the amplitude.
6. Observe the Input A trace check to see if it is ≥ 4.2 divisions.
7. When you are finished, set the 5500A to Standby.
Note
The lower transition point is tested in Section 4.5.11.
4.5.4 Input A Frequency Measurement Accuracy Test
Proceed as follows to test the Input A frequency measurement accuracy:
1. Connect the test tool to the 5500A as for the previous test (see Figure 4-3).
2. Select the following test tool setup:
4-8
• Press
• Press
MEASURE on A: ■ Hz
to select auto ranging (AUTO in top of display).
to open the INPUT A MEASUREMENTS menu, and choose:
3. Set the 5500A to source a leveled sine wave of 600 mV peak-to-peak (SCOPE
output, MODE levsin).
4. Set the 5500A frequency according to the first test point in Table 4-1.
5. Observe the Input A main reading on the test tool and check to see if it is within the
range shown under the appropriate column.
Page 65
6. Continue through the test points.
7. When you are finished, set the 5500A to Standby.
Table 4-1. Input A,B Frequency Measurement Accuracy Test
5500A output, 600 mVpp Input A, B Reading
1 MHz 0.993 to 1.007 MHz
10 MHz 09.88 to 10.12 MHz
40 MHz 38.98 to 41.02 MHz
Note
Duty Cycle and Pulse Width measurements are based on the same
principles as Frequency measurements. Therefore the Duty Cycle and
Pulse Width measurement function will not be verified separately.
4.5.5 Input B Frequency Measurement Accuracy Test
Proceed as follows to test the Input B frequency measurement accuracy:
Performance Verification
4.5 Input A and Input B Tests
4
1. Connect the test tool to the 5500A as shown in Figure 4-4.
Figure 4-4. Test Tool Input B to 5500A Scope Output 50ΩΩΩΩ
2. Select the following test tool setup:
• Press
• Press
INPUT B: ■ ON | MEASURE on B: ■ Hz
select auto ranging (AUTO in top of display).
to open the INPUT B MEASUREMENTS menu, and choose:
ST8005.CGM
• Press to open the SCOPE INPUTS menu.
• Press
INPUT: ■ B | SCREEN UPDATE: ■ FREE RUN | AUTO RANGE: ■ >15HZ
to open the TRIGGER menu, and choose:
3. Set the 5500A to source a leveled sine wave of 600 mV peak-to-peak (SCOPE
output, MODE levsin).
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4.5.6 Input B Frequency Response Upper Transition Point Test
4. Set the 5500A frequency according to the first test point in Table 4-1.
5. Observe the Input B main reading on the test tool and check to see if it is within the
range shown under the appropriate column.
6. Continue through the test points.
7. When you are finished, set the 5500A to Standby.
Proceed as follows to test the Input B frequency response upper transition point:
1. Connect the test tool to the 5500A as for the previous test (see Figure 4-4).
2. Select the following test tool setup:
• Turn Input B on (if not already on).
• Press
Do not press
• Using
to select auto ranging (AUTO in top of display).
anymore!
change the sensitivity to select manual sensitivity ranging, and
lock the Input B sensitivity on 200 mV/div.
• Press
• Press
INPUT: ■ B | SCREEN UPDATE: ■ FREE RUN | AUTO RANGE: ■ >15HZ
to open the SCOPE INPUTS menu.
to open the TRIGGER menu, and choose:
3. Set the 5500A to source a leveled sine wave of 1.2V peak-to-peak, 50 kHz (SCOPE
output, MODE levsin).
4. Adjust the amplitude of the sine wave to 6 divisions on the test tool display.
5. Set the 5500A to 20 MHz, without changing the amplitude.
6. Observe the Input B trace check to see if it is ≥ 4.2 divisions.
7. When you are finished, set the 5500A to Standby.
The lower transition point is tested in Section 4.5.11.
4.5.7 Input B Trigger Sensitivity Test
Note
4-10
Proceed as follows to test the Input B trigger sensitivity:
1. Connect the test tool to the 5500A as for the previous test (see Figure 4-4).
2. Select the following test tool setup:
• Turn Input B on (if not already on).
• Press
Do not press
• Using
to select auto ranging (AUTO in top of display).
anymore!
change the sensitivity to select manual sensitivity ranging, and
lock the Input B sensitivity on 200 mV/div.
• Press
to open the SCOPE INPUTS menu.
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Performance Verification
4.5 Input A and Input B Tests
• Press to open the TRIGGER menu, and choose:
INPUT: ■ B | SCREEN UPDATE: ■ FREE RUN | AUTO RANGE: ■ >15HZ
3. Set the 5500A to source a 5 MHz leveled sine wave of 100 mV peak-to-peak
(SCOPE output, MODE levsin).
4. Adjust the amplitude of the sine wave to 0.5 division on the display.
5. Verify that the signal is well triggered.
If it is not, press
adjustment; adjust the trigger level and verify that the signal will be triggered now.
The trigger level is indicated by the trigger icon (
6. Set the 5500A to source a 25 MHz leveled sine wave of 400 mV peak-to-peak.
7. Adjust the amplitude of the sine wave 1.5 divisions on the test tool display.
8. Verify that the signal is well triggered.
If it is not, press
adjustment; adjust the trigger level and verify that the signal will be triggered now.
9. Set the 5500A to source a 40 MHz leveled sine wave of 1.8V peak-to-peak.
10. Adjust the amplitude of the sine wave to exactly 4 divisions on the test tool display.
to enable the up/down arrow keys for Trigger Level
).
to enable the up/down arrow keys for Trigger Level
4
11. Verify that the signal is well triggered.
If it is not, press
adjustment; adjust the trigger level and verify that the signal will be triggered now.
12. When you are finished, set the 5500A to Standby.
to enable the up/down arrow keys for Trigger Level
4.5.8 Input A and B Trigger Level and Trigger Slope Test
Proceed as follows:
1. Connect the test tool to the 5500A as shown in Figure 4-5.
Figure 4-5. Test Tool Input A-B to 5500A Normal Output
2. Select the following test tool setup:
• Turn Input B on ( if not already on).
• Using
lock the Input A and Input B sensitivity on 1V/div.
change the sensitivity to select manual sensitivity ranging, and
ST8001.CGM
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• Move the Input A and Input B ground level (indicated by zero icon ) to the
center grid line. Proceed as follows:
Press
Press
Using the
• Using
to enable the arrow keys for moving the Input A ground level.
to enable the arrow keys for moving the Input B ground level.
keys move the ground level.
change the time base to select manual time base ranging, and lock
the time base on 10 ms/div.
• Press
• Press
INPUT: ■ A | SCREEN UPDATE: ■ FREE RUN | AUTO RANGE: ■ >15HZ
to open the SCOPE INPUTS menu.
to open the TRIGGER menu, and choose:
• Press to enable the arrow keys for Trigger Level and Slope adjustment.
• Using
• Using
select positive slope triggering (trigger icon ).
set the trigger level to +2 divisions from the screen center. For
positive slope triggering, the trigger level is the top of the trigger icon (
• Press to open the SCOPE INPUTS menu.
• Press
SCOPE MODE: ■ SINGLE SHOT | WAVEFORM MODE: ■ NORMAL
to open the SCOPE OPTIONS menu, and choose:
3. Set the 5500A to source 0.4V DC.
).
4. Verify that no trace is shown on the test tool display, and that the status line at the
display bottom shows
then press
to re-arm the test tool for a trigger.
Wait:A . If the display shows the traces and status Hold:A ,
5. Increase the 5500A voltage slowly in 0.1V steps, using the 5500A EDIT FIELD
function, until the test tool is triggered, and the traces are shown.
6. Verify that the 5500A voltage is between +1.5V and +2.5V when the test tool is
triggered. To repeat the test, start at step 3.
7. Set the 5500A to Standby.
8. Press
9. Press
10. Using
11. Using
negative slope triggering, the trigger level is the bottom of the trigger icon (
to clear the display.
to enable the arrow keys for Trigger Level and Slope adjustment.
select negative slope triggering ( ).
set the trigger level to +2 divisions from the screen center. For
).
12. Set the 5500A to source +3V DC.
13. Verify that no trace is shown on the test tool display, and that the status line at the
display bottom shows
then press
to re-arm the test tool for a trigger.
Wait:A . If the display shows the traces and status Hold:A ,
4-12
14. Decrease the 5500A voltage slowly in 0.1V steps, using the 5500A EDIT FIELD
function, until the test tool is triggered, and the traces are shown.
Page 69
Performance Verification
4.5 Input A and Input B Tests
15. Verify that the 5500A voltage is between +1.5V and +2.5V when the test tool is
triggered. To repeat the test, start at step 12.
16. Set the 5500A to Standby.
4
17. Press
18. Select the following test tool setup:
• Press
• Press
INPUT: ■ B | SCREEN UPDATE: ■ FREE RUN | AUTO RANGE: ■ >15HZ
• Press to enable the arrow keys for Trigger Level and Slope adjustment.
• Using
• Using
19. Set the 5500A to source 0.4V DC.
20. Verify that no trace is shown on the test tool display, and that the status line at the
display bottom shows
then press
21. Increase the 5500A voltage slowly in 0.1V steps, using the 5500A EDIT FIELD
function, until the test tool is triggered, and the traces are shown.
22. Verify that the 5500A voltage is between +1.5V and +2.5V when the test tool is
triggered.
To repeat the test, start at step 19.
to clear the display.
to open the SCOPE INPUTS menu.
to open the TRIGGER menu, and choose:
select positive slope triggering (trigger icon ).
set the trigger level to +2 divisions from the screen center. For
positive slope triggering, the trigger level is the top of the trigger icon (
Wait:B . If the display shows the traces and status Hold:B ,
to re-arm the test tool for a trigger.
).
23. Set the 5500A to Standby.
24. Press
25. Press
26. Using
27. Using set the trigger level to +2 divisions from the screen center. For
negative slope triggering, the trigger level is the bottom of the trigger icon (
28. Set the 5500A to source +3V DC.
29. Verify that no trace is shown on the test tool display, and that the status line at the
display bottom shows
then press
30. Decrease the 5500A voltage in 0.1V steps, using the 5500A EDIT FIELD function,
until the test tool is triggered, and the traces are shown.
31. Verify that the 5500A voltage is between +1.5V and +2.5V when the test tool is
triggered. To repeat the test, start at step 28.
32. When you are finished, set the 5500A to Standby.
to clear the display.
to enable the arrow keys for Trigger Level and Slope adjustment.
select negative slope triggering ( ).
).
Wait:B . If the display shows the traces and status Hold:B ,
to re-arm the test tool for a trigger.
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4.5.9 Input A and B DC Voltage Accuracy Test
WARNING
Dangerous voltages will be present on the calibration source
and connecting cables during the following steps. Ensure that
the calibrator is in standby mode before making any connection
between the calibrator and the test tool.
Proceed as follows:
1. Connect the test tool to the 5500A as for the previous test (see Figure 4-5).
2. Select the following test tool setup:
• Press
select auto ranging (AUTO in top of display).
• Press to open the INPUT A MEASUREMENTS menu, and choose:
MEASURE on A: ■ VDC
• Press to open the INPUT B MEASUREMENTS menu, and choose:
INPUT B: ■ ON | MEASURE on B: ■ VDC
• Using change the time base to select manual time base ranging, and lock
the time base on 10 ms/div.
• Press
• Press
SCOPE MODE: ■ NORMAL | WAVEFORM MODE: ■ SMOOTH
to open the SCOPE INPUTS menu.
to open the SCOPE OPTIONS menu, and choose:
• Move the Input A and Input B ground level (indicated by zero icon ) to the
center grid line. Proceed as follows:
Press
Press
Using the
3. Using
to enable the arrow keys for moving the Input A ground level.
to enable the arrow keys for moving the Input B ground level.
keys move the ground level.
set the Input A and B sensitivity to the first test point in Table 4-2.
The corresponding range is shown in the second column of the table.
4-14
4. Set the 5500A to source the appropriate DC voltage.
5. Observe the main reading and check to see if it is within the range shown under the
appropriate column.
6. Continue through the test points.
7. When you are finished, set the 5500A to 0 (zero) Volt, and to Standby.
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Performance Verification
4.5 Input A and Input B Tests
Table 4-2. Volts DC Measurement Verification Points
(Meter)
1)
5500A output,
V DC
-500 mV -497.0 to -503.0
0 mV -000.5 to + 000.5
Input A-B DC Reading
Sensitivity
(Oscilloscope)
5 mV/div 500 mV 15 mV 014.4 to 015.6
10 mV/div 500 mV 30 mV 029.3 to 030.7
20 mV/div 500 mV 60 mV 059.2 to 060.8
50 mV/div 500 mV 150 mV 148.7 to 151.3
100 mV/div 500 mV 300 mV 298.0 to 302.0
200 mV/div 500 mV 500 mV 497.0 to 503.0
500 mV/div 5V 1.5V 1.487 to 1.513
1 V/div 5V 3V 2.980 to 3.020
2 V/div 5V 5V 4.970 to 5.030
Range
4
2)
2)
-5V -4.970 to -5.030
0V -0.005 to +0.005
5 V/div 50V 15V 14.87 to 15.13
10 V/div 50V 30V 29.80 to 30.20
20 V/div 50V 50V 49.70 to 50.30
-50V -49.70 to -50.30
0V -00.05 to +00.05
50 V/div 500V 150V 148.7 to 151.3
100 V/div 500V 300V 298.0 to 302.0
1)
The 500V and 1250V range will be tested in Section 4.5.14
2)
Due to calibrator noise, occasionally OL (overload) can be shown.
4.5.10 Input A and B AC Voltage Accuracy Test
Warning
Dangerous voltages will be present on the calibration source
and connecting cables during the following steps. Ensure that
the calibrator is in standby mode before making any connection
between the calibrator and the test tool.
Proceed as follows to test the Input A and B AC Voltage accuracy:
1. Connect the test tool to the 5500A as for the previous test (see Figure 4-5).
4-15
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2. Select the following test tool setup:
• Press to select auto ranging (AUTO in top of display).
Do not press
anymore!
• Press to open the INPUT A MEASUREMENTS menu, and choose:
MEASURE on A: ■ VAC
• Press to open the INPUT B MEASUREMENTS menu, and choose:
INPUT B: ■ ON | MEASURE on B: ■ VAC
• Move the Input A and Input B ground level (indicated by zero icon ) to the
center grid line. Proceed as follows:
Press
Press
Using the
3. Using
to enable the arrow keys for moving the Input A ground level.
to enable the arrow keys for moving the Input B ground level.
keys move the ground level.
set the Input A and B sensitivity to the first test point in Table 4-3.
The corresponding range is shown in the second column of the table.
4. Set the 5500A to source the required AC voltage (NORMAL output, WAVE sine).
5. Observe the Input A and Input B main reading and check to see if it is within the
range shown under the appropriate column.
6. Continue through the test points.
7. When you are finished, set the 5500A to Standby.
Table 4-3. Volts AC Measurement Verification Points
Sensitivity
(Oscilloscope)
200 mV/div 500 mV 500 mV 60 Hz 494.0 to 506.0
2V/div 5V 5V 20 kHz 4.860 to 5.140
Range
(Meter)
1)
5500A output
Volts rms
500 mV 20 kHz 486.0 to 514.0
5500A
Frequency
Reading A-B
4-16
5V 60 Hz 4.940 to 5.060
20V/div 50V 50V 60 Hz 49.40 to 50.60
50V 20 kHz 48.60 to 51.40
1)
The 500V and 1250V range will be tested in Section 4.5.14
4.5.11 Input A and B AC Input Coupling Test
Proceed as follows to test the Input A and B AC coupled input lower transition point:
1. Connect the test tool to the 5500A as for the previous test (see Figure 4-5).
2. Select the following test tool setup:
• Use the setup of the previous step (AUTO time base, traces at vertical center).
• Using
select 200 mV/div for Input A and B (500 mV range).
Page 73
• Press to open the SCOPE INPUTS menu, and choose:
INPUT A: ■ AC | ■ NORMAL | INPUT B: ■ AC | NORMAL■
• Press to open the SCOPE INPUTS menu.
Performance Verification
4.5 Input A and Input B Tests
4
• Press
INPUT: A | SCREEN UPDATE: ■ FREE RUN | AUTO RANGE: ■ > 1HZ
to open the TRIGGER menu, and choose:
3. Set the 5500A to source an AC voltage, to the first test point in Table 4-4
(NORMAL output, WAVE sine).
4. Observe the Input A and Input B main reading and check to see if it is within the
range shown under the appropriate column.
5. Continue through the test points.
6. When you are finished, set the 5500A to Standby.
Table 4-4. Input A and B AC Input Coupling Verification Points
5500A output, V rms 5500A Frequency Reading A-B
500.0 mV 10 Hz > 344.0
500.0 mV 33 Hz > 469.0
500.0 mV 60 Hz > 486.5
4.5.12 Input A and B Volts Peak Measurements Test
WARNING
Dangerous voltages will be present on the calibration source
and connecting cables during the following steps. Ensure that
the calibrator is in standby mode before making any connection
between the calibrator and the test tool.
Proceed as follows to test the Volts Peak measurement function:
1. Connect the test tool to the 5500A as for the previous test (see Figure 4-5).
2. Select the following test tool setup:
• Press to open the SCOPE INPUTS menu.
• Press
INPUT: A | SCREEN UPDATE: ■ FREE RUN | AUTO RANGE: ■ > 15HZ
to open the TRIGGER menu, and choose:
• Press to select auto ranging (AUTO in top of display).
• Press to open the INPUT A MEASUREMENTS menu, and choose:
MEASURE on A: ■ PEAK
From the INPUT A PEAK sub-menu choose:
PEAK TYPE : ■ PEAK-PEAK
• Press to open the INPUT B MEASUREMENTS menu, and choose:
INPUT B: ■ ON | MEASURE on B: ■ PEAK
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4.5.13 Input A and B Phase Measurements Test
From the INPUT B PEAK sub-menu choose:
PEAK TYPE : ■ PEAK-PEAK
•
Using select 1V/div for input A and B.
3. Set the 5500A to source a sine wave, to the first test point in Table 4-5 (NORMAL
output, WAVE sine).
4. Observe the Input A and Input B main reading and check to see if it is within the
range shown under the appropriate column.
5. Continue through the test points.
6. When you are finished, set the 5500A to Standby.
Table 4-5. Volts Peak Measurement Verification Points
5500A output, Vrms (sine) 5500A Frequency Reading A-B
1.768 (5V peak) 1 kHz 4.50 to 5.50
Proceed as follows:
1. Connect the test tool to the 5500A as for the previous test (see Figure 4-5).
2. Select the following test tool setup:
• Press
to select auto ranging (AUTO in top of display).
• Press to open the INPUT A MEASUREMENTS menu, and choose:
MEASURE on A: ■ PHASE
• Press to open the INPUT B MEASUREMENTS menu, and choose:
INPUT B: ■ ON | MEASURE on B: ■ PHASE
•
Using select 1V/div for input A and B.
3. Set the 5500A to source a sine wave, to the first test point in Table 4-6 (NORMAL
output, WAVE sine).
4. Observe the Input A and Input B main reading and check to see if it is within the
range shown under the appropriate column.
5. Continue through the test points.
6. When you are finished, set the 5500A to Standby.
Table 4-6. Phase Measurement Verification Points
4-18
5500A output, Vrms (sine) 5500A Frequency Reading A-B
1.5V 1 kHz -2 to +2 Deg
Page 75
4.5.14 Input A and B High Voltage AC/DC Accuracy Test
Warning
Dangerous voltages will be present on the calibration source
and connecting cables during the following steps. Ensure that
the calibrator is in standby mode before making any connection
between the calibrator and the test tool.
Proceed as follows to test the Input A&B High Voltage AC and DC Accuracy:
1. Connect the test tool to the 5500A as shown in Figure 4-6.
Performance Verification
4.5 Input A and Input B Tests
4
Figure 4-6. Test Tool Input A-B to 5500A Normal Output for >300V
2. Select the following test tool setup:
• Press to select auto ranging (AUTO in top of display).
Do not press
• Press to open the INPUT A MEASUREMENTS menu, and choose:
MEASURE on A: ■ VAC
• Press to open the INPUT A MEASUREMENTS menu, and choose:
MEASURE on A: ■ VDC (VDC becomes main reading, VAC secondary reading)
• Press to open the INPUT B MEASUREMENTS menu, and choose:
INPUT B: ■ ON | MEASURE on B: ■ VAC
• Press to open the INPUT B MEASUREMENTS menu, and choose:
INPUT B: ■ ON | MEASURE on B: ■ VDC
• Move the Input A and Input B ground level (indicated by zero icon ) to the
center grid line. Proceed as follows:
Press
anymore!
to enable the arrow keys for moving the Input A ground level.
ST8129.CGM
Press
Using the
to enable the arrow keys for moving the Input B ground level.
keys move the ground level.
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3. Using set the Input A and B sensitivity to the first test point in Table 4-7.
The corresponding range is shown in the second column of the table.
4. Set the 5500A to source the required AC voltage (NORMAL output, WAVE sine).
5. Observe the Input A and B main reading (V DC) and secondary reading (V-AC) and
check to see if it is within the range shown under the appropriate column.
6. Continue through the test points.
7. When you are finished, set the 5500A to Standby
Table 4-7. V DC and V AC High Voltage Verification Tests
Sensitivity
(Scope)
200V/div 500V 0V DC -000.5 to +000.5
500V/div 1250V 600V 10 kHz 0.570 to 0.630
Range
(Meter)
5500A
output Vrms
+500V DC +497.0 to +503.0
-500V DC -497.0 to -503.0
500V 60Hz 494.0 to 506.0
500V 10 kHz 486.0 to 514.0
600V 60Hz 0.584 to 0.616
+600V DC +0.592 to +0.608
-600V DC -0.592 to -0.608
0V DC -0.005 to +0.005
5500A
Frequency
Main (DC)
Reading A-B
Secondary (AC)
Reading A-B
4.5.15 Resistance Measurements Test
Proceed as follows:
1. Connect the test tool to the 5500A as shown in Figure 4-7.
4-20
Figure 4-7. Test Tool Input A to 5500A Normal Output 4-Wire
ST8003.CGM
Page 77
Performance Verification
4.5 Input A and Input B Tests
2. Select the following test tool setup:
• Press to select auto ranging (AUTO in top of display).
• Press to open the INPUT A MEASUREMENTS menu, and choose:
4
MEASURE on A: ■ OHM Ω
Ω
ΩΩ
3. Set the 5500A to the first test point in Table 4-8.
Use the 5500A “COMP 2 wire” mode for the verifications up to and including
50 kΩ. For the higher values, the 5500A will turn off the “COMP 2 wire” mode.
4. Observe the Input A main reading and check to see if it is within the range shown
under the appropriate column.
5. Continue through the test points.
6. When you are finished, set the 5500A to Standby.
Table 4-8. Resistance Measurement Verification Points
5500A output Reading
0Ω 000.0 to 000.5
400Ω 397.1 to 402.9
4 kΩ 3.971 to 4.029
40 kΩ 39.71 to 40.29
400 kΩ 397.1 to 402.9
4 MΩ 3.971 to 4.029
30 MΩ 29.77 to 30.23
4.5.16 Continuity Function Test
Proceed as follows:
1. Connect the test tool to the 5500A as for the previous test (see Figure 4-7).
2. Select the following test tool setup:
• Press
• Press
MEASURE on A: ■ CONT )))
3. Set the 5500A to 25Ω. Use the 5500A “COMP 2 wire” mode.
4. Listen to hear that the beeper sounds continuously.
5. Set the 5500A to 35Ω.
6. Listen to hear that the beeper does not sound.
7. When you are finished, set the 5500A to Standby.
to select auto ranging (AUTO in top of display).
to open the INPUT A MEASUREMENTS menu, and choose:
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4.5.17 Diode Test Function Test
Proceed as follows to test the Diode Test function :
1. Connect the test tool to the 5500A as for the previous test (see Figure 4-7).
2. Press
MEASURE on A: ■ DIODE
to open the INPUT A MEASUREMENTS menu, and choose:
3. Set the 5500A to 1 kΩΩΩΩ. Use the 5500A “COMP 2 wire” mode.
4. Observe the main reading and check to see if it is within 0.425 and 0.575V.
5. Set the 5500A to 1V DC.
6. Observe the main reading and check to see if it is within 0.975 and 1.025V.
7. When you are finished, set the 5500A to Standby.
4.5.18 Capacitance Measurements Test
Proceed as follows:
1. Connect the test tool to the 5500A as for the previous test (see Figure 4-7).
Ensure that the 5500A is in Standby.
2. Select the following test tool setup:
• Press
MEASURE on A: ■ CAP
• Press
to open the INPUT A MEASUREMENTS menu, and choose:
to select auto ranging (AUTO in top of display).
• Press to open the INPUT A MEASUREMENTS menu.
• Press
SMOOTHING: ■ NORMAL | ZERO REF: ■ ON
The ZERO REF function is used to eliminate the capacitance of the test leads.
the select the METER A OPTIONS MENU, and choose:
3. Set the 5500A to the first test point in Table 4-9. Use the 5500A “COMP OFF”
mode.
4. Observe the Input A main reading and check to see if it is within the range shown
under the appropriate column.
5. Continue through the test points.
6. When you are finished, set the 5500A to Standby.
7. Remove all test leads from the test tool to check the zero point.
8. Press
to open the INPUT A MEASUREMENTS menu.
9. Press the select the METER A OPTIONS MENU, and choose:
SMOOTHING: ■ NORMAL | ZERO REF: ■ OFF
10. Observe the Input A reading and check to see if it is between 00.00 and 00.10 nF.
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4.5 Input A and Input B Tests
Table 4-9. Capacitance Measurement Verification Points
5500A output Reading
40 nF 39.10 to 40.90
300 nF 293.0 to 307.0
3 µF 2.930 to 3.070
30 µF 29.30 to 30.70
300 µF 293.0 to 307.0
Performance Verification
4
0
(remove test tool input connections )
4.5.19 Video Trigger Test
Only one of the systems NTSC, PAL, or SECAM has to be verified.
Proceed as follows:
1. Connect the test tool to the TV Signal Generator as shown in Figure 4-8.
00.00 to 00.10
(see steps 7...10)
Figure 4-8. Test Tool Input A to TV Signal Generator
2. Select the following test tool setup:
• Reset the test tool (power off and then on with
• Press to open the SCOPE INPUTS menu.
• Press
■ VIDEO on A...
From the shown VIDEO TRIGGER menu choose:
SYSTEM: ■ NTSC or ■ PAL or ■ SECAM
LINE: ■ SELECT
POLARITY: ■ POSITIVE
to open the TRIGGER menu and choose:
ST8141.CGM
).
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• Using set the Input A sensitivity to 200 mV/div.
• Using
• Press
• Using
select 20 µs/div.
to enable the arrow keys for selecting the video line number.
select the line number:
622 for PAL or SECAM
525 for NTSC.
3. Set the TV Signal Generator to source a signal with the following properties:
• the system selected in step 2
• gray scale
• video amplitude 1V (5 divisions on the test tool)
• chroma amplitude zero.
4. Observe the trace, and check to see if the test tool triggers on line number:
622 for PAL or SECAM, see Figure 4-9
525 for NTSC, see Figure 4-10.
Note
Numerical readings in the pictures shown below may deviate from those
shown in the test tool display during verification.
4-24
Figure 4-9. Test Tool Screen for PAL/SECAM
PAL622.BMP
line 622
5. Using select the line number:
310 for PAL or SECAM
262 for NTSC
6. Observe the trace, and check to see if the test tool triggers on:
line number 310 for PAL or SECAM, see Figure 4-11.
line number 262 for NTSC, see Figure 4-12.
Figure 4-10. Test Tool Screen for NTSC line
NTSC525.BMP
525
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Performance Verification
4.5 Input A and Input B Tests
4
Figure 4-11. Test Tool Screen for PAL/SECAM
PAL310.BMP
line 310
7. Apply the inverted TV Signal Generator signal to the test tool.
You can invert the signal by using a Banana Plug to BNC adapter (Fluke
PM9081/001) and a Banana Jack to BNC adapters (Fluke PM9082/001), as shown in
Figure 4-13.
Figure 4-12. Test Tool Screen for NTSC line
NTSC262.BMP
262
Figure 4-13. Test Tool Input A to TV Signal Generator Inverted
8. Select the following test tool setup:
• Press to open the SCOPE INPUTS menu.
• Press
■ VIDEO on A
The VIDEO TRIGGER sub-menu is shown now. From the VIDEO TRIGGER
to open the TRIGGER menu and choose:
menu choose:
ST8142.CGM
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SYSTEM: ■ NTSC or ■ PAL or ■ SECAM or ■ PALplus |
LINE: ■ SELECT |
• POLARITY: ■ NEGATIVE
• Using set the Input A sensitivity to 200 mV/div.
• Using
9. Using
select 20 µs/div.
select the line number:
310 for PAL or SECAM
262 for NTSC
10. Observe the trace, and check to see if the test tool triggers on:
line number 311 for PAL or SECAM, see Figure 4-14
line number 262 for NTSC, see Figure 4-15.
Figure 4-14. Test Tool Screen for PAL/SECAM
line 310 Negative Video
PAL310I..BMP
Figure 4-15. Test Tool Screen for NTSC line
NTSC262I.BMP
262 Negative Video
4-26
This is the end of the Performance Verification Procedure.
Page 83
Chapter 5
Calibration Adjustment
Title Page
5.1 General ........................................................................................................ 5-3
5.1.1 Introduction.......................................................................................... 5-3
5.1.2 Calibration number and date................................................................ 5-3
5.1.3 General Instructions............................................................................. 5-3
5.2 Equipment Required For Calibration.......................................................... 5-4
5.3 Starting Calibration Adjustment ................................................................. 5-4
5.4 Contrast Calibration Adjustment ................................................................ 5-6
5.5 Warming Up & Pre-Calibration.................................................................. 5-7
5.6 Final Calibration ......................................................................................... 5-7
5.6.1 HF Gain Input A&B ............................................................................ 5-7
5.6.2 Delta T Gain, Trigger Delay Time & Pulse Adjust Input A................ 5-9
5.6.3 Pulse Adjust Input A (firmware V01.00 only) .................................... 5-10
5.6.4 Pulse Adjust Input B............................................................................ 5-11
5.6.5 Gain DMM (Gain Volt)....................................................................... 5-11
5.6.6 Volt Zero.............................................................................................. 5-13
5.6.7 Zero Ohm (firmware V01.00 only)...................................................... 5-13
5.6.8 Gain Ohm............................................................................................. 5-14
5.6.9 Capacitance Gain Low and High......................................................... 5-15
5.6.10 Capacitance Clamp & Zero................................................................ 5-15
5.6.11 Capacitance Gain............................................................................... 5-16
5.7 Save Calibration Data and Exit................................................................... 5-16
5-1
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Page 85
5.1 General
5.1.1 Introduction
The following information, provides the complete Calibration Adjustment procedure for
the Fluke 123 test tool. The test tool allows closed-case calibration using known
reference sources. It measures the reference signals, calculates the correction factors,
and stores the correction factors in RAM. After completing the calibration, the
correction factors can be stored in FlashROM.
The test tool should be calibrated after repair, or if it fails the performance test. The test
tool has a normal calibration cycle of one year.
5.1.2 Calibration number and date
When storing valid calibration data in FlashROM after performing the calibration
adjustment procedure, the calibration date is set to the actual test tool date, and
calibration number is raised by one. To display the calibration date and - number:
Calibration Adjustment
5.1 General
5
1. Press
2. Press to show the VERSION&CALIBRATION screen (see Figure 5.1).
3. Press to return to normal mode.
to open the USER OPTIONS menu.
Figure 5-1. Version & Calibration Screen
VERSION.BMP
5.1.3 General Instructions
Follow these general instructions for all calibration steps:
• Allow the 5500A to satisfy its specified warm-up period. For each calibration point ,
wait for the 5500A to settle.
• The required warm up period for the test tool is included in the WarmingUp &
PreCal calibration step.
• Ensure that the test tool battery is charged sufficiently.
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5.2 Equipment Required For Calibration
The primary source instrument used in the calibration procedures is the Fluke 5500A. If
a 5500A is not available, you can substitute another calibrator as long as it meets the
minimum test requirements.
• Fluke 5500A Multi Product Calibrator, including 5500A-SC Oscilloscope
Calibration Option.
• Stackable Test Leads (4x), supplied with the 5500A.
• 50Ω Coax Cables (2x), Fluke PM9091 or PM9092.
• 50Ω feed through terminations (2x), Fluke PM9585.
• Fluke BB120 Shielded Banana to Female BNC adapters (2x), supplied with the
Fluke 123.
• Dual Banana Plug to Female BNC Adapter (1x), Fluke PM9081/001.
• Male BNC to Dual Female BNC Adapter (1x), Fluke PM9093/001.
• 20V ± 1V, 0.5A, DC power supply (not for serial numbers > DM7000000).
• Power adapter input supply cable (not for serial numbers > DM7000000); refer to
Section 8.8 for the ordering number.
5.3 Starting Calibration Adjustment
Follow the steps below to start calibration adjustments.
1. Power the test tool via the power adapter input, using the PM8907 power adapter.
2. Check the actual test tool date, and adjust the date if necessary:
• press
• using
• press
• adjust the date if necessary.
3. Select the Maintenance mode.
The Calibration Adjustment Procedure uses built-in calibration setups, that can be
accessed in the Maintenance mode.
To enter the Maintenance mode proceed as follows:
• Press and hold
• Press and release
• Release
• The display shows the Calibration Adjustment Screen.
to open the USER OPTIONS menu
select DATE ADJUST
to open the DATE ADJUST menu
5-4
The display shows the first calibration step
calibration status
:IDLE (valid) or :IDLE (invalid).
Warming Up (CL 0200) , and the
Page 87
Calibration Adjustment
5.3 Starting Calibration Adjustment
4. Continue with either a. or b. below:
a. To calibrate the display contrast adjustment range and the default contrast, go to
Section 5.4 Contrast Calibration Adjustment.
This calibration step is only required if the display cannot made dark or light
enough, or if the display after a test tool reset is too light or too dark.
b. To calibrate the test tool without calibrating the contrast , go to Section 5.5
Warming Up & Pre-calibration.
Explanation of screen messages and key functions.
When the test tool is in the Maintenance Mode, only the F1 to F4 soft keys, the ON/OFF
key, and the backlight key can be operated, unless otherwise stated.
The calibration adjustment screen shows the actual calibration step (name and number)
and its status :
Cal Name (CL nnnn) :Status Calibration step nnnn
Status can be:
IDLE (valid) After (re)entering this step, the calibration process is not started.
The calibration data of this step are valid. This means that the
last time this step was done, the calibration process was
successful. It does not necessarily mean that the unit meets the
specifications related to this step!
5
IDLE (invalid) After (re)entering this step, the calibration process is not started.
The calibration data are invalid. This means that the unit will not
meet the specifications if the calibration data are saved.
BUSY aaa% bbb% Calibration adjustment step in progress; progress % for Input A
and Input B.
READY Calibration adjustment step finished.
Error :xxxx Calibration adjustment failed, due to wrong input signal(s) or
because the test tool is defective. The error codes xxxx are
shown for production purposes only.
Functions of the keys F1-F4 are:
PREV select the previous step
NEXT select the next step
CAL start the calibration adjustment of the actual step
EXIT leave the Maintenance mode
Readings and traces
After completing a calibration step, readings and traces are shown using the new
calibration data.
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5.4 Contrast Calibration Adjustment
After entering the Maintenance mode, the test tool display shows
Warming Up (CL 0200):IDLE (valid).
Do not press
now! If you did, turn the test tool off and on, and enter the
Maintenance mode again.
Proceed as follows to adjust the maximum display darkness (CL0100), the default
contrast (CL0110) , and the maximum display brightness (CL0120).
1. Press a three times to select the first calibration step. The display shows:
Contrast (CL 0100) :MANUAL
2. Press CAL. The display will show a dark test pattern, see Figure 5-2
3. Using
adjust the display to the maximum darkness, at which the test pattern
is only just visible.
4. Press to select the default contrast calibration. The display shows:
Contrast (CL 0110) :MANUAL
5. Press CAL. The display shows the test pattern at default contrast.
6. Using
7. Press to select maximum brightness calibration. The display shows:
Contrast (CL 0120) :MANUAL
set the display to optimal (becomes default) contrast.
8. Press CAL. The display shows a bright test pattern.
9. Using
adjust the display to the maximum brightness, at which the test
pattern is only just visible.
10. You can now :
• Exit, if only the Contrast had to be adjusted. Continue at Section 5.7.
OR
• Do the complete calibration. Press
to select the next step (Warming Up),
and continue at Section 5.5.
5-6
Figure 5-2. Display Test Pattern
Page 89
5.5 Warming Up & Pre-Calibration
After entering the Warming-Up & Pre-Calibration state, the display shows:
WarmingUp (CL 0200):IDLE (valid) or (invalid).
Calibration Adjustment
5.5 Warming Up & Pre-Calibration
5
You must always start the Warming Up & Pre Calibration at
Starting at another step will make the calibration invalid!
Proceed as follows:
1. Remove all input connections from the test tool.
2. Press
The display shows the calibration step in progress, and its status.
The first step is
counted down from 00:29:59 to 00:00:00. Then the other pre-calibration steps are
performed automatically. The procedure takes about 60 minutes.
3. Wait until the display shows End Precal :READY
4. Continue at Section 5.6.
to start the Warming-Up & Pre-Calibration.
WarmingUp (CL0200) :BUSY 00:29:59 . The warming-up period is
5.6 Final Calibration
You must always start the Final Calibration at the first step of Section 5.6.1. Starting at
another step will make the calibration invalid!
If you proceeded to step N (for example step CL 0615), then return to a previous step
(for example step CL 0613) , and then calibrate this step, the complete final calibration
becomes invalid. You must do the final calibration from the beginning (step CL 0600)
again.
Warming Up (CL0200) .
You can repeat a step that shows the status
5.6.1 HF Gain Input A&B
Proceed as follows to do the HF Gain Input A&B calibration:
1. Press
2. Connect the test tool to the 5500A as shown in Figure 5-3. Do NOT use 50Ω
terminations!
to select the first calibration step in Table 5-1 ( HFG & FI AB (CL 0600): )
Figure 5-3. HF Gain Calibration Input Connections
:READY by pressing again.
ST8097.CGM
5-7
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Service Manual
3. Set the 5500A to source a 1 kHz fast rising edge square wave (Output SCOPE,
MODE edge) to the first calibration point in Table 5-1.
4. Set the 5500A in operate (OPR).
5. Press
6. Wait until the display shows calibration status
7. Press
to start the calibration.
READY .
to select the next calibration step, set the 5500A to the next calibration
point, and start the calibration. Continue through all calibration points in Table 5-1.
8. Set the 5500A to source a 1 kHz square wave (Output SCOPE, MODE wavegen,
WAVE square), to the first calibration point in Table 5-2.
9. Press
to select the first step in Table 5-2.
10. Press to start the calibration.
11. Wait until the display shows calibration status
12. Press
to select the next calibration step, set the 5500A to the next calibration
READY.
point, and start the calibration. Continue through all calibration points Table 5-2.
13. When you are finished, set the 5500A to Standby.
14. Continue at Section 5.6.2.
Table 5-1. HF Gain Calibration Points Fast
Cal step 5500A Setting
1)
(1 kHz, no
50Ω!)
Test Tool Input Signal
Requirements
(1 kHz, t
flatness after rising edge:
<0.5% after 200 ns)
rise
1)
<100 ns,
HFG & FI AB (CL 0600) 10 mV 20 mV
HFG & FI AB (CL 0601) 25 mV 50 mV
HFG & FI AB (CL 0602) 50 mV 100 mV
HFG & FI AB (CL 0603) 100 mV 200 mV
HFG & FI AB (CL 0604) 250 mV 500 mV
HFG & FI AB (CL 0605) 500 mV 1V
HFG & FI AB (CL 0606) 1V 2V
HFG & FI AB (CL 0607)
[HFG & FI A (CL 0608), HFG & FI B (CL 0628)]
1)
As the 5500A output is not terminated with 50Ω, its output voltage is two times its set voltage
2)
After starting the first step in this table cell, these steps are done automatically.
2)
2.5V 5V
5-8
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Table 5-2. HF Gain Calibration Points Slow
Calibration Adjustment
5.6 Final Calibration
5
Cal step 5500A Setting
(1 kHz, MODE
wavegen,
WAVE square)
HF-Gain AB (CL 0609) 25V 25V
For firmware V01.00
HF-Gain AB (CL 0610)
[HF-Gain A (CL 0611), HF-Gain B (CL 0631)
HF-Gain A (CL 0612), HF-Gain B (CL 0632)
HF-Gain A (CL 0613), HF-Gain B (CL 0633)
HF-Gain A (CL 0614), HF-Gain B (CL 0634)
HF-Gain A (CL 0615), HF-Gain B (CL 0635)]
For firmware > V01.00
HF-Gain A (CL 0612),
[HF-Gain B (CL 0632)
HF-Gain A (CL 0615), HF-Gain B (CL 0635)]
1)
After starting the first step in this table cell, these steps are done automatically.
1)
1)
50V 50V
Test Tool Input Signal
Requirements
(1 kHz square, t
flatness after rising edge:
<0.5% after 4 µs)
5.6.2 Delta T Gain, Trigger Delay Time & Pulse Adjust Input A
rise
<2 µs,
Note
For firmware version V01.00 the Pulse adjust Input A calibration is a
separate step, described in Section 5.6.3.
Proceed as follows to do the calibrations:
1. Press
to select calibration step Delta T (CL 0700):IDLE
2. Connect the test tool to the 5500A as shown in Figure 5-4.
Figure 5-4. 5500A Scope Output to Input A
ST8004.CGM
3. Set the 5500A to source a 1V, 1 MHz fast rising (rise time ≤ 1 ns) square wave
(SCOPE output, MODE edge).
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4. Set the 5500A to operate (OPR).
5. Press to start the calibration.
The Delta T gain, Trigger Delay (CL0720), and Pulse Adjust Input A (CL0640) will
be calibrated.
(For firmware V01.00 CL0640 is a separate step!).
6. Wait until the display shows
Pulse Adj A (CL 0640):READY.
(For firmware V01.00 wait until the display shows
7. When you are finished, set the 5500A to Standby.
8. Continue at Section 5.6.4.
(For firmware V01.00 continue at Section 5.6.3).
5.6.3 Pulse Adjust Input A (firmware V01.00 only)
Note
For firmware versions newer than V01.00 the Pulse Adjust Input A
(CL0640) step is included in Section 5.6.2.
Proceed as follows to do the Pulse Adjust Input A calibration:
1. Press
2. Connect the test tool to the 5500A as for the previous calibration (Figure 5-4).
3. Set the 5500A to source a 1V, 1 MHz fast rising square wave (SCOPE output,
MODE edge) (rise time ≤ 1 ns, aberrations <2% pp).
4. Set the 5500A to operate (OPR).
5. Press
to select calibration step Pulse Adj A (CL 0640):IDLE
to start the calibration.
Delay (CL 0720):READY
5-10
6. Wait until the display shows
Pulse Adj A (CL 0640): READY.
7. When you are finished, set the 5500A to Standby.
8. Continue at Section 5.6.4.
Page 93
5.6.4 Pulse Adjust Input B
Proceed as follows to do the Pulse Adjust Input A calibration:
Calibration Adjustment
5.6 Final Calibration
5
1. Press
2. Connect the test tool to the 5500A as shown in Figure 5-5.
3. Set the 5500A to source a 1V, 1 MHz fast rising square wave (SCOPE output,
MODE edge) (rise time ≤ 1 ns, aberrations <2% pp).
4. Set the 5500A to operate (OPR).
to select calibration step Pulse Adj B (CL 0660):IDLE
Figure 5-5. 5500A Scope Output to Input B
ST8005.CGM
5. Press
6. Wait until the display shows
7. When you are finished, set the 5500A to Standby.
8. Continue at Section 5.6.5.
to start the calibration.
5.6.5 Gain DMM (Gain Volt)
Dangerous voltages will be present on the calibration source
and connection cables during the following steps. Ensure that
the calibrator is in standby mode before making any connection
between the calibrator and the test tool.
Proceed as follows to do the Gain DMM calibration.
1. Press
2. Connect the test tool to the 5500A as shown in Figure 5-6.
to select the first calibration step in Table 5-3.
Pulse Adj B (CL 0660):READY.
Warning
5-11
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Service Manual
Figure 5-6. Volt Gain Calibration Input Connections <300V
ST8001.CGM
3. Set the 5500A to supply a DC voltage, to the first calibration point in Table 5-3.
4. Set the 5500A to operate (OPR).
5. Press
6. Wait until the display shows calibration status
to start the calibration.
:READY.
7. Press to select the next calibration step, set the 5500A to the next calibration
point, and start the calibration. Continue through all calibration points of Table 5-3
8. Set the 5500A to Standby, and continue with step 9.
Table 5-3. Volt Gain Calibration Points <300V
Cal step Input value
Gain DMM (CL0800) 12.5 mV
Gain DMM (CL0801) 25 mV
Gain DMM (CL0802) 50 mV
Gain DMM (CL0803) 125 mV
Gain DMM (CL0804) 250 mV
5-12
Gain DMM (CL0805) 500 mV
Gain DMM (CL0806) 1.25V
Gain DMM (CL0807) 2.5V
Gain DMM (CL0808) 5V
Gain DMM (CL0809) 12.5V
Gain DMM (CL0810) 25V
Gain DMM (CL0811) 50V (set 5500A to OPR!)
Gain DMM (CL0812) 125V
Gain DMM (CL0813) 250V
9. Press to select calibration step Gain DMM (CL0814) :IDLE
Page 95
10. Connect the test tool to the 5500A as shown in Figure 5-7.
Calibration Adjustment
5.6 Final Calibration
5
11. Set the 5500A to supply a DC voltage of 500V.
12. Set the 5500A to operate (OPR).
13. Press
Gain DMM (CL0814) and Gain DMM (CL0815) will be calibrated now.
14. Wait until the display shows calibration status
15. Set the 5500A to 0V (zero) and to Standby.
16. Continue at Section 5.6.6.
5.6.6 Volt Zero
Proceed as follows to do the Volt Zero calibration:
1. Press
2. Terminate Input A and Input B with the BB120 and a 50Ω or lower termination.
3. Press
4. Wait until the display shows Volt Zero (CL 0835):READY.
5. Remove the 50Ω terminations from the inputs.
Figure 5-7. Volt Gain Calibration Input Connections 500V
ST8129.CGM
to start the calibration.
Gain DMM (CL0815):READY.
to select calibration adjustment step Volt Zero (CL 0820):IDLE.
to start the zero calibration of all mV/d settings (CL0820...CL0835)
6. Continue at Section 5.6.8. (For firmware version V01.00 continue at Section 5.6.7).
5.6.7 Zero Ohm (firmware V01.00 only)
Proceed as follows to do the Zero Ohm calibration:
1. Press
2. Make a short circuit between the Input A banana socket and the COM input .
3. Press
4. Wait until the display shows the calibration status
5. Remove the Input A to COM short.
6. Continue at Section 5.6.8.
to select calibration adjustment step Zero Ohm (CL 0840):IDLE
to start the Ohm Zero calibration of all ranges (CL 0840...CL 0846).
Zero Ohm (CL 0846):READY.
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5.6.8 Gain Ohm
Proceed as follows to do the Gain Ohm calibration:
1. Press
to select calibration adjustment step Gain Ohm (CL 0860):IDLE
2. Connect the UUT to the 5500A as shown in Figure 5-8.
Notice that the sense leads must be connected directly to the test tool.
Figure 5-8. Four-wire Ohms calibration connections
ST8003.CGM
3. Set the 5500A to the first test point in Table 5-4. Use the 5500A “COMP 2 wire”
mode for the calibration adjustments up to and including 100 kΩ. For the higher
values, the 5500A will turn off the “COMP 2 wire” mode.
4. Set the 5500A to operate (OPR).
5. Press
6. Wait until the display shows the calibration status
to start the calibration.
:READY.
7. Press to select the next calibration step, set the 5500A to the next calibration
point, and start the calibration. Continue through all calibration points.
8. When you are finished, set the 5500A to Standby.
9. Continue at Section 5.6.9.
Table 5-4. Ohm Gain Calibration Points
Cal Step Input Value
Gain Ohm (CL 0860) [Cap. Pos. (CL 0920), Cap.Neg. (CL 0921)]
Gain Ohm (CL 0861) [Cap. Pos. (CL 0922), Cap.Neg. (CL 0923)]
Gain Ohm (CL 0862) [Cap. Pos. (CL 0924), Cap.Neg. (CL 0925)]
Gain Ohm (CL 0863) [Cap. Pos. (CL 0926), Cap.Neg. (CL 0927)]
Gain Ohm (CL 0864) 1 MΩ
Gain Ohm (CL 0865) [Gain Ohm (CL 0866)]
1)
The capacitance measurement current calibrations (Cap.Pos. and Cap.Neg) are done automatically after
the Gain Ohm calibration.
2)
The Gain Ohm (CL0866) calibration step is done automatically after the Gain Ohm (CL0865) calibration.
2)
1)
1)
1)
1)
100Ω
1 kΩ
10 kΩ
100 kΩ
10 MΩ
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5.6.9 Capacitance Gain Low and High
Proceed as follows to do the Capacitance Gain calibration:
Calibration Adjustment
5.6 Final Calibration
5
1. Press
to select calibration adjustment step Cap. Low (CL 0900):IDLE
2. Connect the test tool to the 5500A as shown in Figure 5-9.
Figure 5-9. Capacitance Gain Calibration Input Connections
3. Set the 5500A to supply 250 mV DC.
4. Set the 5500A to operate (OPR).
5. Press
6. Wait until the display shows
to start the calibration.
Cap. Low (CL 0900):READY.
ST8002.CGM
7. Press to select calibration adjustment step Cap. High (CL 0910):IDLE
8. Set the 5500A to supply 50 mV DC.
9. Press
10. Wait until the display shows
to start the calibration.
Cap High (CL 910):READY.
11. Set the 5500A to Standby.
12. Continue at Section 5.6.10.
5.6.10 Capacitance Clamp & Zero
Proceed as follows to do the Capacitance Clamp Voltage & Zero calibration:
1. Press
2. Remove any input connection from the test tool (open inputs).
3. Press
The capacitance measurement clamp voltage
the capacitance ranges
now. Firmware version V01.00 has an additional step
4. Wait until the display shows
(For firmware V01.00 wait until the display shows
5. Continue at Section 5.6.11.
to select calibration adjustment step Cap. Clamp (CL 0940):IDLE
to start the calibration.
Cap. Zero (CL 0950)... Cap. Zero (CL 0953) will be calibrated
Cap. Clamp (CL 0940), and the zero of
Cap. Zero (CL 0954).
Cap. Zero (CL 0953): READY.
Cap. Zero (CL 0954): READY).
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5.6.11 Capacitance Gain
Proceed as follows to do the Capacitance Gain calibration:
1. Press
to select calibration adjustment step Cap. Gain (CL 0960):IDLE
2. Connect the test tool to the 5500A as shown in Figure 5-9 (Section 5.6.9).
3. Set the 5500A to 500 nF.
4. Set the 5500A to operate (OPR).
5. Press
6. Wait until the display shows
to start the calibration.
Cap. Gain (CL 0960):READY.
7. Continue at Section 5.7 to save the calibration data.
5.7 Save Calibration Data and Exit
Proceed as follows to save the calibration data, and to exit the Maintenance mode:
1. Remove all test leads from the test tool inputs. Do NOT turn off the test tool!
Steps 2 and 3 are required for serial numbers below DM7000000 only.
2. Remove the PM8907 power adapter supply from the test tool.
3. Power the test tool via the power adapter input, using a 20V ± 1V, 0.5A, DC supply.
For this purpose, a special supply cable (see Figure 5-10) can be ordered; refer to
Section 8.7 for the ordering number.
RED
-
+
-
WHITE
+
Figure 5-10. 20 V Supply Cable for Calibration
CAUTION
To avoid damaging the test tool be sure to apply the polarity
and voltage level of the 20V supply voltage correctly.
4. Press
Calibration data is valid
Save data and EXIT maintenance?
(EXIT). The test tool will display:
Note
Calibration data valid indicates that the calibration adjustment procedure
is performed correctly. It does not indicate that the test tool meets the
characteristics listed in Chapter 2.
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5.7 Save Calibration Data and Exit
4. Press (YES) to save and exit.
Notes
- The calibration number and date will be updated only if the
calibration data have been changed and the data are valid.
- The calibration data will change when a calibration adjustment has
been done. The data will not change when just entering and then
leaving the maintenance mode without doing a calibration
adjustment.
- The calibration number and date will NOT be updated if only the
display contrast has been adjusted.
Possible error messages.
The following messages can be shown on the test tool display:
WARNING.Calibration data NOT valid.
Save data and EXIT?
Calibration Adjustment
5
Proceed as follows:
• To return to the Maintenance mode:
Press
Now press until the display shows WarmingUp (CL 0200):IDLE, and calibrate the
NO.
test tool, starting at Section 5.5.
• To exit and save the INVALID calibration data:
Press
The test tool will show the message
service center
YES.
The test tool needs calibration. Please contact your
at power on. The calibration date and number will not be updated. A
complete recalibration must be done.
• To exit and maintain the old calibration data:
Turn the test tool off.
WARNING.No adapter present.
Calibration data will not be saved.
Exit maintenance mode?
• To save the calibration data:
Press
The test tool returns to the maintenance mode. Then supply the correct adapter
input voltage, and press
NO
to exit and save.
• To exit without saving the calibration data:
Press
YES
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Chapter 6
Disassembling the Test Tool
Title Page
6.1. Introduction................................................................................................ 6-3
6.2. Disassembling Procedures ......................................................................... 6-3
6.1.1 Required Tools .................................................................................... 6-3
6.2.2 Removing the Battery Pack ................................................................. 6-3
6.2.3 Removing the Bail ............................................................................... 6-3
6.2.4 Opening the Test Tool ......................................................................... 6-3
6.2.5 Removing the Main PCA Unit............................................................. 6-5
6.2.6 Removing the Display Assembly......................................................... 6-6
6.2.7 Removing the Keypad and Keypad Foil.............................................. 6-6
6.3 Disassembling the Main PCA Unit............................................................. 6-6
6.4 Reassembling the Main PCA Unit.............................................................. 6-8
6.5 Reassembling the Test Tool........................................................................ 6-8
`
6-1
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